2012-12-01 Alessandro Fanfarillo <alessandro.fanfarillo@gmail.com>
[official-gcc.git] / gcc / reorg.c
blobcce5cf5747264fe6f9644f2c80af34a3bb93ef78
1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2012
4 Free Software Foundation, Inc.
5 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
6 Hacked by Michael Tiemann (tiemann@cygnus.com).
8 This file is part of GCC.
10 GCC is free software; you can redistribute it and/or modify it under
11 the terms of the GNU General Public License as published by the Free
12 Software Foundation; either version 3, or (at your option) any later
13 version.
15 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
16 WARRANTY; without even the implied warranty of MERCHANTABILITY or
17 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 for more details.
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
24 /* Instruction reorganization pass.
26 This pass runs after register allocation and final jump
27 optimization. It should be the last pass to run before peephole.
28 It serves primarily to fill delay slots of insns, typically branch
29 and call insns. Other insns typically involve more complicated
30 interactions of data dependencies and resource constraints, and
31 are better handled by scheduling before register allocation (by the
32 function `schedule_insns').
34 The Branch Penalty is the number of extra cycles that are needed to
35 execute a branch insn. On an ideal machine, branches take a single
36 cycle, and the Branch Penalty is 0. Several RISC machines approach
37 branch delays differently:
39 The MIPS has a single branch delay slot. Most insns
40 (except other branches) can be used to fill this slot. When the
41 slot is filled, two insns execute in two cycles, reducing the
42 branch penalty to zero.
44 The SPARC always has a branch delay slot, but its effects can be
45 annulled when the branch is not taken. This means that failing to
46 find other sources of insns, we can hoist an insn from the branch
47 target that would only be safe to execute knowing that the branch
48 is taken.
50 The HP-PA always has a branch delay slot. For unconditional branches
51 its effects can be annulled when the branch is taken. The effects
52 of the delay slot in a conditional branch can be nullified for forward
53 taken branches, or for untaken backward branches. This means
54 we can hoist insns from the fall-through path for forward branches or
55 steal insns from the target of backward branches.
57 The TMS320C3x and C4x have three branch delay slots. When the three
58 slots are filled, the branch penalty is zero. Most insns can fill the
59 delay slots except jump insns.
61 Three techniques for filling delay slots have been implemented so far:
63 (1) `fill_simple_delay_slots' is the simplest, most efficient way
64 to fill delay slots. This pass first looks for insns which come
65 from before the branch and which are safe to execute after the
66 branch. Then it searches after the insn requiring delay slots or,
67 in the case of a branch, for insns that are after the point at
68 which the branch merges into the fallthrough code, if such a point
69 exists. When such insns are found, the branch penalty decreases
70 and no code expansion takes place.
72 (2) `fill_eager_delay_slots' is more complicated: it is used for
73 scheduling conditional jumps, or for scheduling jumps which cannot
74 be filled using (1). A machine need not have annulled jumps to use
75 this strategy, but it helps (by keeping more options open).
76 `fill_eager_delay_slots' tries to guess the direction the branch
77 will go; if it guesses right 100% of the time, it can reduce the
78 branch penalty as much as `fill_simple_delay_slots' does. If it
79 guesses wrong 100% of the time, it might as well schedule nops. When
80 `fill_eager_delay_slots' takes insns from the fall-through path of
81 the jump, usually there is no code expansion; when it takes insns
82 from the branch target, there is code expansion if it is not the
83 only way to reach that target.
85 (3) `relax_delay_slots' uses a set of rules to simplify code that
86 has been reorganized by (1) and (2). It finds cases where
87 conditional test can be eliminated, jumps can be threaded, extra
88 insns can be eliminated, etc. It is the job of (1) and (2) to do a
89 good job of scheduling locally; `relax_delay_slots' takes care of
90 making the various individual schedules work well together. It is
91 especially tuned to handle the control flow interactions of branch
92 insns. It does nothing for insns with delay slots that do not
93 branch.
95 On machines that use CC0, we are very conservative. We will not make
96 a copy of an insn involving CC0 since we want to maintain a 1-1
97 correspondence between the insn that sets and uses CC0. The insns are
98 allowed to be separated by placing an insn that sets CC0 (but not an insn
99 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
100 delay slot. In that case, we point each insn at the other with REG_CC_USER
101 and REG_CC_SETTER notes. Note that these restrictions affect very few
102 machines because most RISC machines with delay slots will not use CC0
103 (the RT is the only known exception at this point).
105 Not yet implemented:
107 The Acorn Risc Machine can conditionally execute most insns, so
108 it is profitable to move single insns into a position to execute
109 based on the condition code of the previous insn.
111 The HP-PA can conditionally nullify insns, providing a similar
112 effect to the ARM, differing mostly in which insn is "in charge". */
114 #include "config.h"
115 #include "system.h"
116 #include "coretypes.h"
117 #include "tm.h"
118 #include "diagnostic-core.h"
119 #include "rtl.h"
120 #include "tm_p.h"
121 #include "expr.h"
122 #include "function.h"
123 #include "insn-config.h"
124 #include "conditions.h"
125 #include "hard-reg-set.h"
126 #include "basic-block.h"
127 #include "regs.h"
128 #include "recog.h"
129 #include "flags.h"
130 #include "obstack.h"
131 #include "insn-attr.h"
132 #include "resource.h"
133 #include "except.h"
134 #include "params.h"
135 #include "target.h"
136 #include "tree-pass.h"
137 #include "emit-rtl.h"
139 #ifdef DELAY_SLOTS
141 #ifndef ANNUL_IFTRUE_SLOTS
142 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
143 #endif
144 #ifndef ANNUL_IFFALSE_SLOTS
145 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
146 #endif
148 /* Insns which have delay slots that have not yet been filled. */
150 static struct obstack unfilled_slots_obstack;
151 static rtx *unfilled_firstobj;
153 /* Define macros to refer to the first and last slot containing unfilled
154 insns. These are used because the list may move and its address
155 should be recomputed at each use. */
157 #define unfilled_slots_base \
158 ((rtx *) obstack_base (&unfilled_slots_obstack))
160 #define unfilled_slots_next \
161 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
163 /* Points to the label before the end of the function, or before a
164 return insn. */
165 static rtx function_return_label;
166 /* Likewise for a simple_return. */
167 static rtx function_simple_return_label;
169 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
170 not always monotonically increase. */
171 static int *uid_to_ruid;
173 /* Highest valid index in `uid_to_ruid'. */
174 static int max_uid;
176 static int stop_search_p (rtx, int);
177 static int resource_conflicts_p (struct resources *, struct resources *);
178 static int insn_references_resource_p (rtx, struct resources *, bool);
179 static int insn_sets_resource_p (rtx, struct resources *, bool);
180 static rtx find_end_label (rtx);
181 static rtx emit_delay_sequence (rtx, rtx, int);
182 static rtx add_to_delay_list (rtx, rtx);
183 static rtx delete_from_delay_slot (rtx);
184 static void delete_scheduled_jump (rtx);
185 static void note_delay_statistics (int, int);
186 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
187 static rtx optimize_skip (rtx);
188 #endif
189 static int get_jump_flags (rtx, rtx);
190 static int mostly_true_jump (rtx);
191 static rtx get_branch_condition (rtx, rtx);
192 static int condition_dominates_p (rtx, rtx);
193 static int redirect_with_delay_slots_safe_p (rtx, rtx, rtx);
194 static int redirect_with_delay_list_safe_p (rtx, rtx, rtx);
195 static int check_annul_list_true_false (int, rtx);
196 static rtx steal_delay_list_from_target (rtx, rtx, rtx, rtx,
197 struct resources *,
198 struct resources *,
199 struct resources *,
200 int, int *, int *, rtx *);
201 static rtx steal_delay_list_from_fallthrough (rtx, rtx, rtx, rtx,
202 struct resources *,
203 struct resources *,
204 struct resources *,
205 int, int *, int *);
206 static void try_merge_delay_insns (rtx, rtx);
207 static rtx redundant_insn (rtx, rtx, rtx);
208 static int own_thread_p (rtx, rtx, int);
209 static void update_block (rtx, rtx);
210 static int reorg_redirect_jump (rtx, rtx);
211 static void update_reg_dead_notes (rtx, rtx);
212 static void fix_reg_dead_note (rtx, rtx);
213 static void update_reg_unused_notes (rtx, rtx);
214 static void fill_simple_delay_slots (int);
215 static rtx fill_slots_from_thread (rtx, rtx, rtx, rtx,
216 int, int, int, int,
217 int *, rtx);
218 static void fill_eager_delay_slots (void);
219 static void relax_delay_slots (rtx);
220 static void make_return_insns (rtx);
222 /* A wrapper around next_active_insn which takes care to return ret_rtx
223 unchanged. */
225 static rtx
226 first_active_target_insn (rtx insn)
228 if (ANY_RETURN_P (insn))
229 return insn;
230 return next_active_insn (insn);
233 /* Return true iff INSN is a simplejump, or any kind of return insn. */
235 static bool
236 simplejump_or_return_p (rtx insn)
238 return (JUMP_P (insn)
239 && (simplejump_p (insn) || ANY_RETURN_P (PATTERN (insn))));
242 /* Return TRUE if this insn should stop the search for insn to fill delay
243 slots. LABELS_P indicates that labels should terminate the search.
244 In all cases, jumps terminate the search. */
246 static int
247 stop_search_p (rtx insn, int labels_p)
249 if (insn == 0)
250 return 1;
252 /* If the insn can throw an exception that is caught within the function,
253 it may effectively perform a jump from the viewpoint of the function.
254 Therefore act like for a jump. */
255 if (can_throw_internal (insn))
256 return 1;
258 switch (GET_CODE (insn))
260 case NOTE:
261 case CALL_INSN:
262 return 0;
264 case CODE_LABEL:
265 return labels_p;
267 case JUMP_INSN:
268 case BARRIER:
269 return 1;
271 case INSN:
272 /* OK unless it contains a delay slot or is an `asm' insn of some type.
273 We don't know anything about these. */
274 return (GET_CODE (PATTERN (insn)) == SEQUENCE
275 || GET_CODE (PATTERN (insn)) == ASM_INPUT
276 || asm_noperands (PATTERN (insn)) >= 0);
278 default:
279 gcc_unreachable ();
283 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
284 resource set contains a volatile memory reference. Otherwise, return FALSE. */
286 static int
287 resource_conflicts_p (struct resources *res1, struct resources *res2)
289 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
290 || (res1->unch_memory && res2->unch_memory)
291 || res1->volatil || res2->volatil)
292 return 1;
294 return hard_reg_set_intersect_p (res1->regs, res2->regs);
297 /* Return TRUE if any resource marked in RES, a `struct resources', is
298 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
299 routine is using those resources.
301 We compute this by computing all the resources referenced by INSN and
302 seeing if this conflicts with RES. It might be faster to directly check
303 ourselves, and this is the way it used to work, but it means duplicating
304 a large block of complex code. */
306 static int
307 insn_references_resource_p (rtx insn, struct resources *res,
308 bool include_delayed_effects)
310 struct resources insn_res;
312 CLEAR_RESOURCE (&insn_res);
313 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
314 return resource_conflicts_p (&insn_res, res);
317 /* Return TRUE if INSN modifies resources that are marked in RES.
318 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
319 included. CC0 is only modified if it is explicitly set; see comments
320 in front of mark_set_resources for details. */
322 static int
323 insn_sets_resource_p (rtx insn, struct resources *res,
324 bool include_delayed_effects)
326 struct resources insn_sets;
328 CLEAR_RESOURCE (&insn_sets);
329 mark_set_resources (insn, &insn_sets, 0,
330 (include_delayed_effects
331 ? MARK_SRC_DEST_CALL
332 : MARK_SRC_DEST));
333 return resource_conflicts_p (&insn_sets, res);
336 /* Find a label at the end of the function or before a RETURN. If there
337 is none, try to make one. If that fails, returns 0.
339 The property of such a label is that it is placed just before the
340 epilogue or a bare RETURN insn, so that another bare RETURN can be
341 turned into a jump to the label unconditionally. In particular, the
342 label cannot be placed before a RETURN insn with a filled delay slot.
344 ??? There may be a problem with the current implementation. Suppose
345 we start with a bare RETURN insn and call find_end_label. It may set
346 function_return_label just before the RETURN. Suppose the machinery
347 is able to fill the delay slot of the RETURN insn afterwards. Then
348 function_return_label is no longer valid according to the property
349 described above and find_end_label will still return it unmodified.
350 Note that this is probably mitigated by the following observation:
351 once function_return_label is made, it is very likely the target of
352 a jump, so filling the delay slot of the RETURN will be much more
353 difficult.
354 KIND is either simple_return_rtx or ret_rtx, indicating which type of
355 return we're looking for. */
357 static rtx
358 find_end_label (rtx kind)
360 rtx insn;
361 rtx *plabel;
363 if (kind == ret_rtx)
364 plabel = &function_return_label;
365 else
367 gcc_assert (kind == simple_return_rtx);
368 plabel = &function_simple_return_label;
371 /* If we found one previously, return it. */
372 if (*plabel)
373 return *plabel;
375 /* Otherwise, see if there is a label at the end of the function. If there
376 is, it must be that RETURN insns aren't needed, so that is our return
377 label and we don't have to do anything else. */
379 insn = get_last_insn ();
380 while (NOTE_P (insn)
381 || (NONJUMP_INSN_P (insn)
382 && (GET_CODE (PATTERN (insn)) == USE
383 || GET_CODE (PATTERN (insn)) == CLOBBER)))
384 insn = PREV_INSN (insn);
386 /* When a target threads its epilogue we might already have a
387 suitable return insn. If so put a label before it for the
388 function_return_label. */
389 if (BARRIER_P (insn)
390 && JUMP_P (PREV_INSN (insn))
391 && PATTERN (PREV_INSN (insn)) == kind)
393 rtx temp = PREV_INSN (PREV_INSN (insn));
394 rtx label = gen_label_rtx ();
395 LABEL_NUSES (label) = 0;
397 /* Put the label before any USE insns that may precede the RETURN
398 insn. */
399 while (GET_CODE (temp) == USE)
400 temp = PREV_INSN (temp);
402 emit_label_after (label, temp);
403 *plabel = label;
406 else if (LABEL_P (insn))
407 *plabel = insn;
408 else
410 rtx label = gen_label_rtx ();
411 LABEL_NUSES (label) = 0;
412 /* If the basic block reorder pass moves the return insn to
413 some other place try to locate it again and put our
414 function_return_label there. */
415 while (insn && ! (JUMP_P (insn) && (PATTERN (insn) == kind)))
416 insn = PREV_INSN (insn);
417 if (insn)
419 insn = PREV_INSN (insn);
421 /* Put the label before any USE insns that may precede the
422 RETURN insn. */
423 while (GET_CODE (insn) == USE)
424 insn = PREV_INSN (insn);
426 emit_label_after (label, insn);
428 else
430 #ifdef HAVE_epilogue
431 if (HAVE_epilogue
432 #ifdef HAVE_return
433 && ! HAVE_return
434 #endif
436 /* The RETURN insn has its delay slot filled so we cannot
437 emit the label just before it. Since we already have
438 an epilogue and cannot emit a new RETURN, we cannot
439 emit the label at all. */
440 return NULL_RTX;
441 #endif /* HAVE_epilogue */
443 /* Otherwise, make a new label and emit a RETURN and BARRIER,
444 if needed. */
445 emit_label (label);
446 #ifdef HAVE_return
447 /* We don't bother trying to create a return insn if the
448 epilogue has filled delay-slots; we would have to try and
449 move the delay-slot fillers to the delay-slots for the new
450 return insn or in front of the new return insn. */
451 if (crtl->epilogue_delay_list == NULL
452 && HAVE_return)
454 /* The return we make may have delay slots too. */
455 rtx insn = gen_return ();
456 insn = emit_jump_insn (insn);
457 set_return_jump_label (insn);
458 emit_barrier ();
459 if (num_delay_slots (insn) > 0)
460 obstack_ptr_grow (&unfilled_slots_obstack, insn);
462 #endif
464 *plabel = label;
467 /* Show one additional use for this label so it won't go away until
468 we are done. */
469 ++LABEL_NUSES (*plabel);
471 return *plabel;
474 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
475 the pattern of INSN with the SEQUENCE.
477 Chain the insns so that NEXT_INSN of each insn in the sequence points to
478 the next and NEXT_INSN of the last insn in the sequence points to
479 the first insn after the sequence. Similarly for PREV_INSN. This makes
480 it easier to scan all insns.
482 Returns the SEQUENCE that replaces INSN. */
484 static rtx
485 emit_delay_sequence (rtx insn, rtx list, int length)
487 int i = 1;
488 rtx li;
489 int had_barrier = 0;
491 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
492 rtvec seqv = rtvec_alloc (length + 1);
493 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
494 rtx seq_insn = make_insn_raw (seq);
495 rtx first = get_insns ();
496 rtx last = get_last_insn ();
498 /* Make a copy of the insn having delay slots. */
499 rtx delay_insn = copy_rtx (insn);
501 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
502 confuse further processing. Update LAST in case it was the last insn.
503 We will put the BARRIER back in later. */
504 if (NEXT_INSN (insn) && BARRIER_P (NEXT_INSN (insn)))
506 delete_related_insns (NEXT_INSN (insn));
507 last = get_last_insn ();
508 had_barrier = 1;
511 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
512 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
513 PREV_INSN (seq_insn) = PREV_INSN (insn);
515 if (insn != last)
516 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
518 if (insn != first)
519 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
521 /* Note the calls to set_new_first_and_last_insn must occur after
522 SEQ_INSN has been completely spliced into the insn stream.
524 Otherwise CUR_INSN_UID will get set to an incorrect value because
525 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
526 if (insn == last)
527 set_new_first_and_last_insn (first, seq_insn);
529 if (insn == first)
530 set_new_first_and_last_insn (seq_insn, last);
532 /* Build our SEQUENCE and rebuild the insn chain. */
533 XVECEXP (seq, 0, 0) = delay_insn;
534 INSN_DELETED_P (delay_insn) = 0;
535 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
537 INSN_LOCATION (seq_insn) = INSN_LOCATION (delay_insn);
539 for (li = list; li; li = XEXP (li, 1), i++)
541 rtx tem = XEXP (li, 0);
542 rtx note, next;
544 /* Show that this copy of the insn isn't deleted. */
545 INSN_DELETED_P (tem) = 0;
547 XVECEXP (seq, 0, i) = tem;
548 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
549 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
551 /* SPARC assembler, for instance, emit warning when debug info is output
552 into the delay slot. */
553 if (INSN_LOCATION (tem) && !INSN_LOCATION (seq_insn))
554 INSN_LOCATION (seq_insn) = INSN_LOCATION (tem);
555 INSN_LOCATION (tem) = 0;
557 for (note = REG_NOTES (tem); note; note = next)
559 next = XEXP (note, 1);
560 switch (REG_NOTE_KIND (note))
562 case REG_DEAD:
563 /* Remove any REG_DEAD notes because we can't rely on them now
564 that the insn has been moved. */
565 remove_note (tem, note);
566 break;
568 case REG_LABEL_OPERAND:
569 case REG_LABEL_TARGET:
570 /* Keep the label reference count up to date. */
571 if (LABEL_P (XEXP (note, 0)))
572 LABEL_NUSES (XEXP (note, 0)) ++;
573 break;
575 default:
576 break;
581 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
583 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
584 last insn in that SEQUENCE to point to us. Similarly for the first
585 insn in the following insn if it is a SEQUENCE. */
587 if (PREV_INSN (seq_insn) && NONJUMP_INSN_P (PREV_INSN (seq_insn))
588 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
589 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
590 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
591 = seq_insn;
593 if (NEXT_INSN (seq_insn) && NONJUMP_INSN_P (NEXT_INSN (seq_insn))
594 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
595 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
597 /* If there used to be a BARRIER, put it back. */
598 if (had_barrier)
599 emit_barrier_after (seq_insn);
601 gcc_assert (i == length + 1);
603 return seq_insn;
606 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
607 be in the order in which the insns are to be executed. */
609 static rtx
610 add_to_delay_list (rtx insn, rtx delay_list)
612 /* If we have an empty list, just make a new list element. If
613 INSN has its block number recorded, clear it since we may
614 be moving the insn to a new block. */
616 if (delay_list == 0)
618 clear_hashed_info_for_insn (insn);
619 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
622 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
623 list. */
624 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
626 return delay_list;
629 /* Delete INSN from the delay slot of the insn that it is in, which may
630 produce an insn with no delay slots. Return the new insn. */
632 static rtx
633 delete_from_delay_slot (rtx insn)
635 rtx trial, seq_insn, seq, prev;
636 rtx delay_list = 0;
637 int i;
638 int had_barrier = 0;
640 /* We first must find the insn containing the SEQUENCE with INSN in its
641 delay slot. Do this by finding an insn, TRIAL, where
642 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
644 for (trial = insn;
645 PREV_INSN (NEXT_INSN (trial)) == trial;
646 trial = NEXT_INSN (trial))
649 seq_insn = PREV_INSN (NEXT_INSN (trial));
650 seq = PATTERN (seq_insn);
652 if (NEXT_INSN (seq_insn) && BARRIER_P (NEXT_INSN (seq_insn)))
653 had_barrier = 1;
655 /* Create a delay list consisting of all the insns other than the one
656 we are deleting (unless we were the only one). */
657 if (XVECLEN (seq, 0) > 2)
658 for (i = 1; i < XVECLEN (seq, 0); i++)
659 if (XVECEXP (seq, 0, i) != insn)
660 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
662 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
663 list, and rebuild the delay list if non-empty. */
664 prev = PREV_INSN (seq_insn);
665 trial = XVECEXP (seq, 0, 0);
666 delete_related_insns (seq_insn);
667 add_insn_after (trial, prev, NULL);
669 /* If there was a barrier after the old SEQUENCE, remit it. */
670 if (had_barrier)
671 emit_barrier_after (trial);
673 /* If there are any delay insns, remit them. Otherwise clear the
674 annul flag. */
675 if (delay_list)
676 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
677 else if (JUMP_P (trial))
678 INSN_ANNULLED_BRANCH_P (trial) = 0;
680 INSN_FROM_TARGET_P (insn) = 0;
682 /* Show we need to fill this insn again. */
683 obstack_ptr_grow (&unfilled_slots_obstack, trial);
685 return trial;
688 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
689 the insn that sets CC0 for it and delete it too. */
691 static void
692 delete_scheduled_jump (rtx insn)
694 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
695 delete the insn that sets the condition code, but it is hard to find it.
696 Since this case is rare anyway, don't bother trying; there would likely
697 be other insns that became dead anyway, which we wouldn't know to
698 delete. */
700 #ifdef HAVE_cc0
701 if (reg_mentioned_p (cc0_rtx, insn))
703 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
705 /* If a reg-note was found, it points to an insn to set CC0. This
706 insn is in the delay list of some other insn. So delete it from
707 the delay list it was in. */
708 if (note)
710 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
711 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
712 delete_from_delay_slot (XEXP (note, 0));
714 else
716 /* The insn setting CC0 is our previous insn, but it may be in
717 a delay slot. It will be the last insn in the delay slot, if
718 it is. */
719 rtx trial = previous_insn (insn);
720 if (NOTE_P (trial))
721 trial = prev_nonnote_insn (trial);
722 if (sets_cc0_p (PATTERN (trial)) != 1
723 || FIND_REG_INC_NOTE (trial, NULL_RTX))
724 return;
725 if (PREV_INSN (NEXT_INSN (trial)) == trial)
726 delete_related_insns (trial);
727 else
728 delete_from_delay_slot (trial);
731 #endif
733 delete_related_insns (insn);
736 /* Counters for delay-slot filling. */
738 #define NUM_REORG_FUNCTIONS 2
739 #define MAX_DELAY_HISTOGRAM 3
740 #define MAX_REORG_PASSES 2
742 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
744 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
746 static int reorg_pass_number;
748 static void
749 note_delay_statistics (int slots_filled, int index)
751 num_insns_needing_delays[index][reorg_pass_number]++;
752 if (slots_filled > MAX_DELAY_HISTOGRAM)
753 slots_filled = MAX_DELAY_HISTOGRAM;
754 num_filled_delays[index][slots_filled][reorg_pass_number]++;
757 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
759 /* Optimize the following cases:
761 1. When a conditional branch skips over only one instruction,
762 use an annulling branch and put that insn in the delay slot.
763 Use either a branch that annuls when the condition if true or
764 invert the test with a branch that annuls when the condition is
765 false. This saves insns, since otherwise we must copy an insn
766 from the L1 target.
768 (orig) (skip) (otherwise)
769 Bcc.n L1 Bcc',a L1 Bcc,a L1'
770 insn insn insn2
771 L1: L1: L1:
772 insn2 insn2 insn2
773 insn3 insn3 L1':
774 insn3
776 2. When a conditional branch skips over only one instruction,
777 and after that, it unconditionally branches somewhere else,
778 perform the similar optimization. This saves executing the
779 second branch in the case where the inverted condition is true.
781 Bcc.n L1 Bcc',a L2
782 insn insn
783 L1: L1:
784 Bra L2 Bra L2
786 INSN is a JUMP_INSN.
788 This should be expanded to skip over N insns, where N is the number
789 of delay slots required. */
791 static rtx
792 optimize_skip (rtx insn)
794 rtx trial = next_nonnote_insn (insn);
795 rtx next_trial = next_active_insn (trial);
796 rtx delay_list = 0;
797 int flags;
799 flags = get_jump_flags (insn, JUMP_LABEL (insn));
801 if (trial == 0
802 || !NONJUMP_INSN_P (trial)
803 || GET_CODE (PATTERN (trial)) == SEQUENCE
804 || recog_memoized (trial) < 0
805 || (! eligible_for_annul_false (insn, 0, trial, flags)
806 && ! eligible_for_annul_true (insn, 0, trial, flags))
807 || can_throw_internal (trial))
808 return 0;
810 /* There are two cases where we are just executing one insn (we assume
811 here that a branch requires only one insn; this should be generalized
812 at some point): Where the branch goes around a single insn or where
813 we have one insn followed by a branch to the same label we branch to.
814 In both of these cases, inverting the jump and annulling the delay
815 slot give the same effect in fewer insns. */
816 if ((next_trial == next_active_insn (JUMP_LABEL (insn))
817 && ! (next_trial == 0 && crtl->epilogue_delay_list != 0))
818 || (next_trial != 0
819 && simplejump_or_return_p (next_trial)
820 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)))
822 if (eligible_for_annul_false (insn, 0, trial, flags))
824 if (invert_jump (insn, JUMP_LABEL (insn), 1))
825 INSN_FROM_TARGET_P (trial) = 1;
826 else if (! eligible_for_annul_true (insn, 0, trial, flags))
827 return 0;
830 delay_list = add_to_delay_list (trial, NULL_RTX);
831 next_trial = next_active_insn (trial);
832 update_block (trial, trial);
833 delete_related_insns (trial);
835 /* Also, if we are targeting an unconditional
836 branch, thread our jump to the target of that branch. Don't
837 change this into a RETURN here, because it may not accept what
838 we have in the delay slot. We'll fix this up later. */
839 if (next_trial && simplejump_or_return_p (next_trial))
841 rtx target_label = JUMP_LABEL (next_trial);
842 if (ANY_RETURN_P (target_label))
843 target_label = find_end_label (target_label);
845 if (target_label)
847 /* Recompute the flags based on TARGET_LABEL since threading
848 the jump to TARGET_LABEL may change the direction of the
849 jump (which may change the circumstances in which the
850 delay slot is nullified). */
851 flags = get_jump_flags (insn, target_label);
852 if (eligible_for_annul_true (insn, 0, trial, flags))
853 reorg_redirect_jump (insn, target_label);
857 INSN_ANNULLED_BRANCH_P (insn) = 1;
860 return delay_list;
862 #endif
864 /* Encode and return branch direction and prediction information for
865 INSN assuming it will jump to LABEL.
867 Non conditional branches return no direction information and
868 are predicted as very likely taken. */
870 static int
871 get_jump_flags (rtx insn, rtx label)
873 int flags;
875 /* get_jump_flags can be passed any insn with delay slots, these may
876 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
877 direction information, and only if they are conditional jumps.
879 If LABEL is a return, then there is no way to determine the branch
880 direction. */
881 if (JUMP_P (insn)
882 && (condjump_p (insn) || condjump_in_parallel_p (insn))
883 && !ANY_RETURN_P (label)
884 && INSN_UID (insn) <= max_uid
885 && INSN_UID (label) <= max_uid)
886 flags
887 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
888 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
889 /* No valid direction information. */
890 else
891 flags = 0;
893 return flags;
896 /* Return truth value of the statement that this branch
897 is mostly taken. If we think that the branch is extremely likely
898 to be taken, we return 2. If the branch is slightly more likely to be
899 taken, return 1. If the branch is slightly less likely to be taken,
900 return 0 and if the branch is highly unlikely to be taken, return -1. */
902 static int
903 mostly_true_jump (rtx jump_insn)
905 /* If branch probabilities are available, then use that number since it
906 always gives a correct answer. */
907 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
908 if (note)
910 int prob = INTVAL (XEXP (note, 0));
912 if (prob >= REG_BR_PROB_BASE * 9 / 10)
913 return 2;
914 else if (prob >= REG_BR_PROB_BASE / 2)
915 return 1;
916 else if (prob >= REG_BR_PROB_BASE / 10)
917 return 0;
918 else
919 return -1;
922 /* If there is no note, assume branches are not taken.
923 This should be rare. */
924 return 0;
927 /* Return the condition under which INSN will branch to TARGET. If TARGET
928 is zero, return the condition under which INSN will return. If INSN is
929 an unconditional branch, return const_true_rtx. If INSN isn't a simple
930 type of jump, or it doesn't go to TARGET, return 0. */
932 static rtx
933 get_branch_condition (rtx insn, rtx target)
935 rtx pat = PATTERN (insn);
936 rtx src;
938 if (condjump_in_parallel_p (insn))
939 pat = XVECEXP (pat, 0, 0);
941 if (ANY_RETURN_P (pat))
942 return pat == target ? const_true_rtx : 0;
944 if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
945 return 0;
947 src = SET_SRC (pat);
948 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
949 return const_true_rtx;
951 else if (GET_CODE (src) == IF_THEN_ELSE
952 && XEXP (src, 2) == pc_rtx
953 && GET_CODE (XEXP (src, 1)) == LABEL_REF
954 && XEXP (XEXP (src, 1), 0) == target)
955 return XEXP (src, 0);
957 else if (GET_CODE (src) == IF_THEN_ELSE
958 && XEXP (src, 1) == pc_rtx
959 && GET_CODE (XEXP (src, 2)) == LABEL_REF
960 && XEXP (XEXP (src, 2), 0) == target)
962 enum rtx_code rev;
963 rev = reversed_comparison_code (XEXP (src, 0), insn);
964 if (rev != UNKNOWN)
965 return gen_rtx_fmt_ee (rev, GET_MODE (XEXP (src, 0)),
966 XEXP (XEXP (src, 0), 0),
967 XEXP (XEXP (src, 0), 1));
970 return 0;
973 /* Return nonzero if CONDITION is more strict than the condition of
974 INSN, i.e., if INSN will always branch if CONDITION is true. */
976 static int
977 condition_dominates_p (rtx condition, rtx insn)
979 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
980 enum rtx_code code = GET_CODE (condition);
981 enum rtx_code other_code;
983 if (rtx_equal_p (condition, other_condition)
984 || other_condition == const_true_rtx)
985 return 1;
987 else if (condition == const_true_rtx || other_condition == 0)
988 return 0;
990 other_code = GET_CODE (other_condition);
991 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
992 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
993 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
994 return 0;
996 return comparison_dominates_p (code, other_code);
999 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1000 any insns already in the delay slot of JUMP. */
1002 static int
1003 redirect_with_delay_slots_safe_p (rtx jump, rtx newlabel, rtx seq)
1005 int flags, i;
1006 rtx pat = PATTERN (seq);
1008 /* Make sure all the delay slots of this jump would still
1009 be valid after threading the jump. If they are still
1010 valid, then return nonzero. */
1012 flags = get_jump_flags (jump, newlabel);
1013 for (i = 1; i < XVECLEN (pat, 0); i++)
1014 if (! (
1015 #ifdef ANNUL_IFFALSE_SLOTS
1016 (INSN_ANNULLED_BRANCH_P (jump)
1017 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1018 ? eligible_for_annul_false (jump, i - 1,
1019 XVECEXP (pat, 0, i), flags) :
1020 #endif
1021 #ifdef ANNUL_IFTRUE_SLOTS
1022 (INSN_ANNULLED_BRANCH_P (jump)
1023 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1024 ? eligible_for_annul_true (jump, i - 1,
1025 XVECEXP (pat, 0, i), flags) :
1026 #endif
1027 eligible_for_delay (jump, i - 1, XVECEXP (pat, 0, i), flags)))
1028 break;
1030 return (i == XVECLEN (pat, 0));
1033 /* Return nonzero if redirecting JUMP to NEWLABEL does not invalidate
1034 any insns we wish to place in the delay slot of JUMP. */
1036 static int
1037 redirect_with_delay_list_safe_p (rtx jump, rtx newlabel, rtx delay_list)
1039 int flags, i;
1040 rtx li;
1042 /* Make sure all the insns in DELAY_LIST would still be
1043 valid after threading the jump. If they are still
1044 valid, then return nonzero. */
1046 flags = get_jump_flags (jump, newlabel);
1047 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1048 if (! (
1049 #ifdef ANNUL_IFFALSE_SLOTS
1050 (INSN_ANNULLED_BRANCH_P (jump)
1051 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1052 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1053 #endif
1054 #ifdef ANNUL_IFTRUE_SLOTS
1055 (INSN_ANNULLED_BRANCH_P (jump)
1056 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1057 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1058 #endif
1059 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1060 break;
1062 return (li == NULL);
1065 /* DELAY_LIST is a list of insns that have already been placed into delay
1066 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1067 If not, return 0; otherwise return 1. */
1069 static int
1070 check_annul_list_true_false (int annul_true_p, rtx delay_list)
1072 rtx temp;
1074 if (delay_list)
1076 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1078 rtx trial = XEXP (temp, 0);
1080 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1081 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1082 return 0;
1086 return 1;
1089 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1090 the condition tested by INSN is CONDITION and the resources shown in
1091 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1092 from SEQ's delay list, in addition to whatever insns it may execute
1093 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1094 needed while searching for delay slot insns. Return the concatenated
1095 delay list if possible, otherwise, return 0.
1097 SLOTS_TO_FILL is the total number of slots required by INSN, and
1098 PSLOTS_FILLED points to the number filled so far (also the number of
1099 insns in DELAY_LIST). It is updated with the number that have been
1100 filled from the SEQUENCE, if any.
1102 PANNUL_P points to a nonzero value if we already know that we need
1103 to annul INSN. If this routine determines that annulling is needed,
1104 it may set that value nonzero.
1106 PNEW_THREAD points to a location that is to receive the place at which
1107 execution should continue. */
1109 static rtx
1110 steal_delay_list_from_target (rtx insn, rtx condition, rtx seq,
1111 rtx delay_list, struct resources *sets,
1112 struct resources *needed,
1113 struct resources *other_needed,
1114 int slots_to_fill, int *pslots_filled,
1115 int *pannul_p, rtx *pnew_thread)
1117 rtx temp;
1118 int slots_remaining = slots_to_fill - *pslots_filled;
1119 int total_slots_filled = *pslots_filled;
1120 rtx new_delay_list = 0;
1121 int must_annul = *pannul_p;
1122 int used_annul = 0;
1123 int i;
1124 struct resources cc_set;
1126 /* We can't do anything if there are more delay slots in SEQ than we
1127 can handle, or if we don't know that it will be a taken branch.
1128 We know that it will be a taken branch if it is either an unconditional
1129 branch or a conditional branch with a stricter branch condition.
1131 Also, exit if the branch has more than one set, since then it is computing
1132 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1133 ??? It may be possible to move other sets into INSN in addition to
1134 moving the instructions in the delay slots.
1136 We can not steal the delay list if one of the instructions in the
1137 current delay_list modifies the condition codes and the jump in the
1138 sequence is a conditional jump. We can not do this because we can
1139 not change the direction of the jump because the condition codes
1140 will effect the direction of the jump in the sequence. */
1142 CLEAR_RESOURCE (&cc_set);
1143 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1145 rtx trial = XEXP (temp, 0);
1147 mark_set_resources (trial, &cc_set, 0, MARK_SRC_DEST_CALL);
1148 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, false))
1149 return delay_list;
1152 if (XVECLEN (seq, 0) - 1 > slots_remaining
1153 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1154 || ! single_set (XVECEXP (seq, 0, 0)))
1155 return delay_list;
1157 #ifdef MD_CAN_REDIRECT_BRANCH
1158 /* On some targets, branches with delay slots can have a limited
1159 displacement. Give the back end a chance to tell us we can't do
1160 this. */
1161 if (! MD_CAN_REDIRECT_BRANCH (insn, XVECEXP (seq, 0, 0)))
1162 return delay_list;
1163 #endif
1165 for (i = 1; i < XVECLEN (seq, 0); i++)
1167 rtx trial = XVECEXP (seq, 0, i);
1168 int flags;
1170 if (insn_references_resource_p (trial, sets, false)
1171 || insn_sets_resource_p (trial, needed, false)
1172 || insn_sets_resource_p (trial, sets, false)
1173 #ifdef HAVE_cc0
1174 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1175 delay list. */
1176 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1177 #endif
1178 /* If TRIAL is from the fallthrough code of an annulled branch insn
1179 in SEQ, we cannot use it. */
1180 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1181 && ! INSN_FROM_TARGET_P (trial)))
1182 return delay_list;
1184 /* If this insn was already done (usually in a previous delay slot),
1185 pretend we put it in our delay slot. */
1186 if (redundant_insn (trial, insn, new_delay_list))
1187 continue;
1189 /* We will end up re-vectoring this branch, so compute flags
1190 based on jumping to the new label. */
1191 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1193 if (! must_annul
1194 && ((condition == const_true_rtx
1195 || (! insn_sets_resource_p (trial, other_needed, false)
1196 && ! may_trap_or_fault_p (PATTERN (trial)))))
1197 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1198 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1199 && (must_annul = 1,
1200 check_annul_list_true_false (0, delay_list)
1201 && check_annul_list_true_false (0, new_delay_list)
1202 && eligible_for_annul_false (insn, total_slots_filled,
1203 trial, flags)))
1205 if (must_annul)
1206 used_annul = 1;
1207 temp = copy_delay_slot_insn (trial);
1208 INSN_FROM_TARGET_P (temp) = 1;
1209 new_delay_list = add_to_delay_list (temp, new_delay_list);
1210 total_slots_filled++;
1212 if (--slots_remaining == 0)
1213 break;
1215 else
1216 return delay_list;
1219 /* Show the place to which we will be branching. */
1220 *pnew_thread = first_active_target_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1222 /* Add any new insns to the delay list and update the count of the
1223 number of slots filled. */
1224 *pslots_filled = total_slots_filled;
1225 if (used_annul)
1226 *pannul_p = 1;
1228 if (delay_list == 0)
1229 return new_delay_list;
1231 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1232 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1234 return delay_list;
1237 /* Similar to steal_delay_list_from_target except that SEQ is on the
1238 fallthrough path of INSN. Here we only do something if the delay insn
1239 of SEQ is an unconditional branch. In that case we steal its delay slot
1240 for INSN since unconditional branches are much easier to fill. */
1242 static rtx
1243 steal_delay_list_from_fallthrough (rtx insn, rtx condition, rtx seq,
1244 rtx delay_list, struct resources *sets,
1245 struct resources *needed,
1246 struct resources *other_needed,
1247 int slots_to_fill, int *pslots_filled,
1248 int *pannul_p)
1250 int i;
1251 int flags;
1252 int must_annul = *pannul_p;
1253 int used_annul = 0;
1255 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1257 /* We can't do anything if SEQ's delay insn isn't an
1258 unconditional branch. */
1260 if (! simplejump_or_return_p (XVECEXP (seq, 0, 0)))
1261 return delay_list;
1263 for (i = 1; i < XVECLEN (seq, 0); i++)
1265 rtx trial = XVECEXP (seq, 0, i);
1267 /* If TRIAL sets CC0, stealing it will move it too far from the use
1268 of CC0. */
1269 if (insn_references_resource_p (trial, sets, false)
1270 || insn_sets_resource_p (trial, needed, false)
1271 || insn_sets_resource_p (trial, sets, false)
1272 #ifdef HAVE_cc0
1273 || sets_cc0_p (PATTERN (trial))
1274 #endif
1277 break;
1279 /* If this insn was already done, we don't need it. */
1280 if (redundant_insn (trial, insn, delay_list))
1282 delete_from_delay_slot (trial);
1283 continue;
1286 if (! must_annul
1287 && ((condition == const_true_rtx
1288 || (! insn_sets_resource_p (trial, other_needed, false)
1289 && ! may_trap_or_fault_p (PATTERN (trial)))))
1290 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1291 : (must_annul || delay_list == NULL) && (must_annul = 1,
1292 check_annul_list_true_false (1, delay_list)
1293 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1295 if (must_annul)
1296 used_annul = 1;
1297 delete_from_delay_slot (trial);
1298 delay_list = add_to_delay_list (trial, delay_list);
1300 if (++(*pslots_filled) == slots_to_fill)
1301 break;
1303 else
1304 break;
1307 if (used_annul)
1308 *pannul_p = 1;
1309 return delay_list;
1312 /* Try merging insns starting at THREAD which match exactly the insns in
1313 INSN's delay list.
1315 If all insns were matched and the insn was previously annulling, the
1316 annul bit will be cleared.
1318 For each insn that is merged, if the branch is or will be non-annulling,
1319 we delete the merged insn. */
1321 static void
1322 try_merge_delay_insns (rtx insn, rtx thread)
1324 rtx trial, next_trial;
1325 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1326 int annul_p = JUMP_P (delay_insn) && INSN_ANNULLED_BRANCH_P (delay_insn);
1327 int slot_number = 1;
1328 int num_slots = XVECLEN (PATTERN (insn), 0);
1329 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1330 struct resources set, needed;
1331 rtx merged_insns = 0;
1332 int i;
1333 int flags;
1335 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1337 CLEAR_RESOURCE (&needed);
1338 CLEAR_RESOURCE (&set);
1340 /* If this is not an annulling branch, take into account anything needed in
1341 INSN's delay slot. This prevents two increments from being incorrectly
1342 folded into one. If we are annulling, this would be the correct
1343 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1344 will essentially disable this optimization. This method is somewhat of
1345 a kludge, but I don't see a better way.) */
1346 if (! annul_p)
1347 for (i = 1 ; i < num_slots; i++)
1348 if (XVECEXP (PATTERN (insn), 0, i))
1349 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed,
1350 true);
1352 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1354 rtx pat = PATTERN (trial);
1355 rtx oldtrial = trial;
1357 next_trial = next_nonnote_insn (trial);
1359 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1360 if (NONJUMP_INSN_P (trial)
1361 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1362 continue;
1364 if (GET_CODE (next_to_match) == GET_CODE (trial)
1365 #ifdef HAVE_cc0
1366 /* We can't share an insn that sets cc0. */
1367 && ! sets_cc0_p (pat)
1368 #endif
1369 && ! insn_references_resource_p (trial, &set, true)
1370 && ! insn_sets_resource_p (trial, &set, true)
1371 && ! insn_sets_resource_p (trial, &needed, true)
1372 && (trial = try_split (pat, trial, 0)) != 0
1373 /* Update next_trial, in case try_split succeeded. */
1374 && (next_trial = next_nonnote_insn (trial))
1375 /* Likewise THREAD. */
1376 && (thread = oldtrial == thread ? trial : thread)
1377 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1378 /* Have to test this condition if annul condition is different
1379 from (and less restrictive than) non-annulling one. */
1380 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1383 if (! annul_p)
1385 update_block (trial, thread);
1386 if (trial == thread)
1387 thread = next_active_insn (thread);
1389 delete_related_insns (trial);
1390 INSN_FROM_TARGET_P (next_to_match) = 0;
1392 else
1393 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1395 if (++slot_number == num_slots)
1396 break;
1398 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1401 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
1402 mark_referenced_resources (trial, &needed, true);
1405 /* See if we stopped on a filled insn. If we did, try to see if its
1406 delay slots match. */
1407 if (slot_number != num_slots
1408 && trial && NONJUMP_INSN_P (trial)
1409 && GET_CODE (PATTERN (trial)) == SEQUENCE
1410 && !(JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
1411 && INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0))))
1413 rtx pat = PATTERN (trial);
1414 rtx filled_insn = XVECEXP (pat, 0, 0);
1416 /* Account for resources set/needed by the filled insn. */
1417 mark_set_resources (filled_insn, &set, 0, MARK_SRC_DEST_CALL);
1418 mark_referenced_resources (filled_insn, &needed, true);
1420 for (i = 1; i < XVECLEN (pat, 0); i++)
1422 rtx dtrial = XVECEXP (pat, 0, i);
1424 if (! insn_references_resource_p (dtrial, &set, true)
1425 && ! insn_sets_resource_p (dtrial, &set, true)
1426 && ! insn_sets_resource_p (dtrial, &needed, true)
1427 #ifdef HAVE_cc0
1428 && ! sets_cc0_p (PATTERN (dtrial))
1429 #endif
1430 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1431 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1433 if (! annul_p)
1435 rtx new_rtx;
1437 update_block (dtrial, thread);
1438 new_rtx = delete_from_delay_slot (dtrial);
1439 if (INSN_DELETED_P (thread))
1440 thread = new_rtx;
1441 INSN_FROM_TARGET_P (next_to_match) = 0;
1443 else
1444 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1445 merged_insns);
1447 if (++slot_number == num_slots)
1448 break;
1450 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1452 else
1454 /* Keep track of the set/referenced resources for the delay
1455 slots of any trial insns we encounter. */
1456 mark_set_resources (dtrial, &set, 0, MARK_SRC_DEST_CALL);
1457 mark_referenced_resources (dtrial, &needed, true);
1462 /* If all insns in the delay slot have been matched and we were previously
1463 annulling the branch, we need not any more. In that case delete all the
1464 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1465 the delay list so that we know that it isn't only being used at the
1466 target. */
1467 if (slot_number == num_slots && annul_p)
1469 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1471 if (GET_MODE (merged_insns) == SImode)
1473 rtx new_rtx;
1475 update_block (XEXP (merged_insns, 0), thread);
1476 new_rtx = delete_from_delay_slot (XEXP (merged_insns, 0));
1477 if (INSN_DELETED_P (thread))
1478 thread = new_rtx;
1480 else
1482 update_block (XEXP (merged_insns, 0), thread);
1483 delete_related_insns (XEXP (merged_insns, 0));
1487 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1489 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1490 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1494 /* See if INSN is redundant with an insn in front of TARGET. Often this
1495 is called when INSN is a candidate for a delay slot of TARGET.
1496 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1497 of INSN. Often INSN will be redundant with an insn in a delay slot of
1498 some previous insn. This happens when we have a series of branches to the
1499 same label; in that case the first insn at the target might want to go
1500 into each of the delay slots.
1502 If we are not careful, this routine can take up a significant fraction
1503 of the total compilation time (4%), but only wins rarely. Hence we
1504 speed this routine up by making two passes. The first pass goes back
1505 until it hits a label and sees if it finds an insn with an identical
1506 pattern. Only in this (relatively rare) event does it check for
1507 data conflicts.
1509 We do not split insns we encounter. This could cause us not to find a
1510 redundant insn, but the cost of splitting seems greater than the possible
1511 gain in rare cases. */
1513 static rtx
1514 redundant_insn (rtx insn, rtx target, rtx delay_list)
1516 rtx target_main = target;
1517 rtx ipat = PATTERN (insn);
1518 rtx trial, pat;
1519 struct resources needed, set;
1520 int i;
1521 unsigned insns_to_search;
1523 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1524 are allowed to not actually assign to such a register. */
1525 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1526 return 0;
1528 /* Scan backwards looking for a match. */
1529 for (trial = PREV_INSN (target),
1530 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1531 trial && insns_to_search > 0;
1532 trial = PREV_INSN (trial))
1534 if (LABEL_P (trial))
1535 return 0;
1537 if (!INSN_P (trial))
1538 continue;
1539 --insns_to_search;
1541 pat = PATTERN (trial);
1542 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1543 continue;
1545 if (GET_CODE (pat) == SEQUENCE)
1547 /* Stop for a CALL and its delay slots because it is difficult to
1548 track its resource needs correctly. */
1549 if (CALL_P (XVECEXP (pat, 0, 0)))
1550 return 0;
1552 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1553 slots because it is difficult to track its resource needs
1554 correctly. */
1556 #ifdef INSN_SETS_ARE_DELAYED
1557 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1558 return 0;
1559 #endif
1561 #ifdef INSN_REFERENCES_ARE_DELAYED
1562 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1563 return 0;
1564 #endif
1566 /* See if any of the insns in the delay slot match, updating
1567 resource requirements as we go. */
1568 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1569 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1570 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1571 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1572 break;
1574 /* If found a match, exit this loop early. */
1575 if (i > 0)
1576 break;
1579 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1580 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1581 break;
1584 /* If we didn't find an insn that matches, return 0. */
1585 if (trial == 0)
1586 return 0;
1588 /* See what resources this insn sets and needs. If they overlap, or
1589 if this insn references CC0, it can't be redundant. */
1591 CLEAR_RESOURCE (&needed);
1592 CLEAR_RESOURCE (&set);
1593 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1594 mark_referenced_resources (insn, &needed, true);
1596 /* If TARGET is a SEQUENCE, get the main insn. */
1597 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1598 target_main = XVECEXP (PATTERN (target), 0, 0);
1600 if (resource_conflicts_p (&needed, &set)
1601 #ifdef HAVE_cc0
1602 || reg_mentioned_p (cc0_rtx, ipat)
1603 #endif
1604 /* The insn requiring the delay may not set anything needed or set by
1605 INSN. */
1606 || insn_sets_resource_p (target_main, &needed, true)
1607 || insn_sets_resource_p (target_main, &set, true))
1608 return 0;
1610 /* Insns we pass may not set either NEEDED or SET, so merge them for
1611 simpler tests. */
1612 needed.memory |= set.memory;
1613 needed.unch_memory |= set.unch_memory;
1614 IOR_HARD_REG_SET (needed.regs, set.regs);
1616 /* This insn isn't redundant if it conflicts with an insn that either is
1617 or will be in a delay slot of TARGET. */
1619 while (delay_list)
1621 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, true))
1622 return 0;
1623 delay_list = XEXP (delay_list, 1);
1626 if (NONJUMP_INSN_P (target) && GET_CODE (PATTERN (target)) == SEQUENCE)
1627 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1628 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed,
1629 true))
1630 return 0;
1632 /* Scan backwards until we reach a label or an insn that uses something
1633 INSN sets or sets something insn uses or sets. */
1635 for (trial = PREV_INSN (target),
1636 insns_to_search = MAX_DELAY_SLOT_INSN_SEARCH;
1637 trial && !LABEL_P (trial) && insns_to_search > 0;
1638 trial = PREV_INSN (trial))
1640 if (!INSN_P (trial))
1641 continue;
1642 --insns_to_search;
1644 pat = PATTERN (trial);
1645 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1646 continue;
1648 if (GET_CODE (pat) == SEQUENCE)
1650 bool annul_p = false;
1651 rtx control = XVECEXP (pat, 0, 0);
1653 /* If this is a CALL_INSN and its delay slots, it is hard to track
1654 the resource needs properly, so give up. */
1655 if (CALL_P (control))
1656 return 0;
1658 /* If this is an INSN or JUMP_INSN with delayed effects, it
1659 is hard to track the resource needs properly, so give up. */
1661 #ifdef INSN_SETS_ARE_DELAYED
1662 if (INSN_SETS_ARE_DELAYED (control))
1663 return 0;
1664 #endif
1666 #ifdef INSN_REFERENCES_ARE_DELAYED
1667 if (INSN_REFERENCES_ARE_DELAYED (control))
1668 return 0;
1669 #endif
1671 if (JUMP_P (control))
1672 annul_p = INSN_ANNULLED_BRANCH_P (control);
1674 /* See if any of the insns in the delay slot match, updating
1675 resource requirements as we go. */
1676 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1678 rtx candidate = XVECEXP (pat, 0, i);
1680 /* If an insn will be annulled if the branch is false, it isn't
1681 considered as a possible duplicate insn. */
1682 if (rtx_equal_p (PATTERN (candidate), ipat)
1683 && ! (annul_p && INSN_FROM_TARGET_P (candidate)))
1685 /* Show that this insn will be used in the sequel. */
1686 INSN_FROM_TARGET_P (candidate) = 0;
1687 return candidate;
1690 /* Unless this is an annulled insn from the target of a branch,
1691 we must stop if it sets anything needed or set by INSN. */
1692 if ((!annul_p || !INSN_FROM_TARGET_P (candidate))
1693 && insn_sets_resource_p (candidate, &needed, true))
1694 return 0;
1697 /* If the insn requiring the delay slot conflicts with INSN, we
1698 must stop. */
1699 if (insn_sets_resource_p (control, &needed, true))
1700 return 0;
1702 else
1704 /* See if TRIAL is the same as INSN. */
1705 pat = PATTERN (trial);
1706 if (rtx_equal_p (pat, ipat))
1707 return trial;
1709 /* Can't go any further if TRIAL conflicts with INSN. */
1710 if (insn_sets_resource_p (trial, &needed, true))
1711 return 0;
1715 return 0;
1718 /* Return 1 if THREAD can only be executed in one way. If LABEL is nonzero,
1719 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1720 is nonzero, we are allowed to fall into this thread; otherwise, we are
1721 not.
1723 If LABEL is used more than one or we pass a label other than LABEL before
1724 finding an active insn, we do not own this thread. */
1726 static int
1727 own_thread_p (rtx thread, rtx label, int allow_fallthrough)
1729 rtx active_insn;
1730 rtx insn;
1732 /* We don't own the function end. */
1733 if (thread == 0 || ANY_RETURN_P (thread))
1734 return 0;
1736 /* Get the first active insn, or THREAD, if it is an active insn. */
1737 active_insn = next_active_insn (PREV_INSN (thread));
1739 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1740 if (LABEL_P (insn)
1741 && (insn != label || LABEL_NUSES (insn) != 1))
1742 return 0;
1744 if (allow_fallthrough)
1745 return 1;
1747 /* Ensure that we reach a BARRIER before any insn or label. */
1748 for (insn = prev_nonnote_insn (thread);
1749 insn == 0 || !BARRIER_P (insn);
1750 insn = prev_nonnote_insn (insn))
1751 if (insn == 0
1752 || LABEL_P (insn)
1753 || (NONJUMP_INSN_P (insn)
1754 && GET_CODE (PATTERN (insn)) != USE
1755 && GET_CODE (PATTERN (insn)) != CLOBBER))
1756 return 0;
1758 return 1;
1761 /* Called when INSN is being moved from a location near the target of a jump.
1762 We leave a marker of the form (use (INSN)) immediately in front
1763 of WHERE for mark_target_live_regs. These markers will be deleted when
1764 reorg finishes.
1766 We used to try to update the live status of registers if WHERE is at
1767 the start of a basic block, but that can't work since we may remove a
1768 BARRIER in relax_delay_slots. */
1770 static void
1771 update_block (rtx insn, rtx where)
1773 /* Ignore if this was in a delay slot and it came from the target of
1774 a branch. */
1775 if (INSN_FROM_TARGET_P (insn))
1776 return;
1778 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1780 /* INSN might be making a value live in a block where it didn't use to
1781 be. So recompute liveness information for this block. */
1783 incr_ticks_for_insn (insn);
1786 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1787 the basic block containing the jump. */
1789 static int
1790 reorg_redirect_jump (rtx jump, rtx nlabel)
1792 incr_ticks_for_insn (jump);
1793 return redirect_jump (jump, nlabel, 1);
1796 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1797 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1798 that reference values used in INSN. If we find one, then we move the
1799 REG_DEAD note to INSN.
1801 This is needed to handle the case where a later insn (after INSN) has a
1802 REG_DEAD note for a register used by INSN, and this later insn subsequently
1803 gets moved before a CODE_LABEL because it is a redundant insn. In this
1804 case, mark_target_live_regs may be confused into thinking the register
1805 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1807 static void
1808 update_reg_dead_notes (rtx insn, rtx delayed_insn)
1810 rtx p, link, next;
1812 for (p = next_nonnote_insn (insn); p != delayed_insn;
1813 p = next_nonnote_insn (p))
1814 for (link = REG_NOTES (p); link; link = next)
1816 next = XEXP (link, 1);
1818 if (REG_NOTE_KIND (link) != REG_DEAD
1819 || !REG_P (XEXP (link, 0)))
1820 continue;
1822 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1824 /* Move the REG_DEAD note from P to INSN. */
1825 remove_note (p, link);
1826 XEXP (link, 1) = REG_NOTES (insn);
1827 REG_NOTES (insn) = link;
1832 /* Called when an insn redundant with start_insn is deleted. If there
1833 is a REG_DEAD note for the target of start_insn between start_insn
1834 and stop_insn, then the REG_DEAD note needs to be deleted since the
1835 value no longer dies there.
1837 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1838 confused into thinking the register is dead. */
1840 static void
1841 fix_reg_dead_note (rtx start_insn, rtx stop_insn)
1843 rtx p, link, next;
1845 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1846 p = next_nonnote_insn (p))
1847 for (link = REG_NOTES (p); link; link = next)
1849 next = XEXP (link, 1);
1851 if (REG_NOTE_KIND (link) != REG_DEAD
1852 || !REG_P (XEXP (link, 0)))
1853 continue;
1855 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1857 remove_note (p, link);
1858 return;
1863 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1865 This handles the case of udivmodXi4 instructions which optimize their
1866 output depending on whether any REG_UNUSED notes are present.
1867 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1868 does. */
1870 static void
1871 update_reg_unused_notes (rtx insn, rtx redundant_insn)
1873 rtx link, next;
1875 for (link = REG_NOTES (insn); link; link = next)
1877 next = XEXP (link, 1);
1879 if (REG_NOTE_KIND (link) != REG_UNUSED
1880 || !REG_P (XEXP (link, 0)))
1881 continue;
1883 if (! find_regno_note (redundant_insn, REG_UNUSED,
1884 REGNO (XEXP (link, 0))))
1885 remove_note (insn, link);
1889 /* Return the label before INSN, or put a new label there. */
1891 static rtx
1892 get_label_before (rtx insn)
1894 rtx label;
1896 /* Find an existing label at this point
1897 or make a new one if there is none. */
1898 label = prev_nonnote_insn (insn);
1900 if (label == 0 || !LABEL_P (label))
1902 rtx prev = PREV_INSN (insn);
1904 label = gen_label_rtx ();
1905 emit_label_after (label, prev);
1906 LABEL_NUSES (label) = 0;
1908 return label;
1911 /* Scan a function looking for insns that need a delay slot and find insns to
1912 put into the delay slot.
1914 NON_JUMPS_P is nonzero if we are to only try to fill non-jump insns (such
1915 as calls). We do these first since we don't want jump insns (that are
1916 easier to fill) to get the only insns that could be used for non-jump insns.
1917 When it is zero, only try to fill JUMP_INSNs.
1919 When slots are filled in this manner, the insns (including the
1920 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
1921 it is possible to tell whether a delay slot has really been filled
1922 or not. `final' knows how to deal with this, by communicating
1923 through FINAL_SEQUENCE. */
1925 static void
1926 fill_simple_delay_slots (int non_jumps_p)
1928 rtx insn, pat, trial, next_trial;
1929 int i;
1930 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
1931 struct resources needed, set;
1932 int slots_to_fill, slots_filled;
1933 rtx delay_list;
1935 for (i = 0; i < num_unfilled_slots; i++)
1937 int flags;
1938 /* Get the next insn to fill. If it has already had any slots assigned,
1939 we can't do anything with it. Maybe we'll improve this later. */
1941 insn = unfilled_slots_base[i];
1942 if (insn == 0
1943 || INSN_DELETED_P (insn)
1944 || (NONJUMP_INSN_P (insn)
1945 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1946 || (JUMP_P (insn) && non_jumps_p)
1947 || (!JUMP_P (insn) && ! non_jumps_p))
1948 continue;
1950 /* It may have been that this insn used to need delay slots, but
1951 now doesn't; ignore in that case. This can happen, for example,
1952 on the HP PA RISC, where the number of delay slots depends on
1953 what insns are nearby. */
1954 slots_to_fill = num_delay_slots (insn);
1956 /* Some machine description have defined instructions to have
1957 delay slots only in certain circumstances which may depend on
1958 nearby insns (which change due to reorg's actions).
1960 For example, the PA port normally has delay slots for unconditional
1961 jumps.
1963 However, the PA port claims such jumps do not have a delay slot
1964 if they are immediate successors of certain CALL_INSNs. This
1965 allows the port to favor filling the delay slot of the call with
1966 the unconditional jump. */
1967 if (slots_to_fill == 0)
1968 continue;
1970 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
1971 says how many. After initialization, first try optimizing
1973 call _foo call _foo
1974 nop add %o7,.-L1,%o7
1975 b,a L1
1978 If this case applies, the delay slot of the call is filled with
1979 the unconditional jump. This is done first to avoid having the
1980 delay slot of the call filled in the backward scan. Also, since
1981 the unconditional jump is likely to also have a delay slot, that
1982 insn must exist when it is subsequently scanned.
1984 This is tried on each insn with delay slots as some machines
1985 have insns which perform calls, but are not represented as
1986 CALL_INSNs. */
1988 slots_filled = 0;
1989 delay_list = 0;
1991 if (JUMP_P (insn))
1992 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1993 else
1994 flags = get_jump_flags (insn, NULL_RTX);
1996 if ((trial = next_active_insn (insn))
1997 && JUMP_P (trial)
1998 && simplejump_p (trial)
1999 && eligible_for_delay (insn, slots_filled, trial, flags)
2000 && no_labels_between_p (insn, trial)
2001 && ! can_throw_internal (trial))
2003 rtx *tmp;
2004 slots_filled++;
2005 delay_list = add_to_delay_list (trial, delay_list);
2007 /* TRIAL may have had its delay slot filled, then unfilled. When
2008 the delay slot is unfilled, TRIAL is placed back on the unfilled
2009 slots obstack. Unfortunately, it is placed on the end of the
2010 obstack, not in its original location. Therefore, we must search
2011 from entry i + 1 to the end of the unfilled slots obstack to
2012 try and find TRIAL. */
2013 tmp = &unfilled_slots_base[i + 1];
2014 while (*tmp != trial && tmp != unfilled_slots_next)
2015 tmp++;
2017 /* Remove the unconditional jump from consideration for delay slot
2018 filling and unthread it. */
2019 if (*tmp == trial)
2020 *tmp = 0;
2022 rtx next = NEXT_INSN (trial);
2023 rtx prev = PREV_INSN (trial);
2024 if (prev)
2025 NEXT_INSN (prev) = next;
2026 if (next)
2027 PREV_INSN (next) = prev;
2031 /* Now, scan backwards from the insn to search for a potential
2032 delay-slot candidate. Stop searching when a label or jump is hit.
2034 For each candidate, if it is to go into the delay slot (moved
2035 forward in execution sequence), it must not need or set any resources
2036 that were set by later insns and must not set any resources that
2037 are needed for those insns.
2039 The delay slot insn itself sets resources unless it is a call
2040 (in which case the called routine, not the insn itself, is doing
2041 the setting). */
2043 if (slots_filled < slots_to_fill)
2045 CLEAR_RESOURCE (&needed);
2046 CLEAR_RESOURCE (&set);
2047 mark_set_resources (insn, &set, 0, MARK_SRC_DEST);
2048 mark_referenced_resources (insn, &needed, false);
2050 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2051 trial = next_trial)
2053 next_trial = prev_nonnote_insn (trial);
2055 /* This must be an INSN or CALL_INSN. */
2056 pat = PATTERN (trial);
2058 /* Stand-alone USE and CLOBBER are just for flow. */
2059 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2060 continue;
2062 /* Check for resource conflict first, to avoid unnecessary
2063 splitting. */
2064 if (! insn_references_resource_p (trial, &set, true)
2065 && ! insn_sets_resource_p (trial, &set, true)
2066 && ! insn_sets_resource_p (trial, &needed, true)
2067 #ifdef HAVE_cc0
2068 /* Can't separate set of cc0 from its use. */
2069 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2070 #endif
2071 && ! can_throw_internal (trial))
2073 trial = try_split (pat, trial, 1);
2074 next_trial = prev_nonnote_insn (trial);
2075 if (eligible_for_delay (insn, slots_filled, trial, flags))
2077 /* In this case, we are searching backward, so if we
2078 find insns to put on the delay list, we want
2079 to put them at the head, rather than the
2080 tail, of the list. */
2082 update_reg_dead_notes (trial, insn);
2083 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2084 trial, delay_list);
2085 update_block (trial, trial);
2086 delete_related_insns (trial);
2087 if (slots_to_fill == ++slots_filled)
2088 break;
2089 continue;
2093 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2094 mark_referenced_resources (trial, &needed, true);
2098 /* If all needed slots haven't been filled, we come here. */
2100 /* Try to optimize case of jumping around a single insn. */
2101 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2102 if (slots_filled != slots_to_fill
2103 && delay_list == 0
2104 && JUMP_P (insn)
2105 && (condjump_p (insn) || condjump_in_parallel_p (insn))
2106 && !ANY_RETURN_P (JUMP_LABEL (insn)))
2108 delay_list = optimize_skip (insn);
2109 if (delay_list)
2110 slots_filled += 1;
2112 #endif
2114 /* Try to get insns from beyond the insn needing the delay slot.
2115 These insns can neither set or reference resources set in insns being
2116 skipped, cannot set resources in the insn being skipped, and, if this
2117 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2118 call might not return).
2120 There used to be code which continued past the target label if
2121 we saw all uses of the target label. This code did not work,
2122 because it failed to account for some instructions which were
2123 both annulled and marked as from the target. This can happen as a
2124 result of optimize_skip. Since this code was redundant with
2125 fill_eager_delay_slots anyways, it was just deleted. */
2127 if (slots_filled != slots_to_fill
2128 /* If this instruction could throw an exception which is
2129 caught in the same function, then it's not safe to fill
2130 the delay slot with an instruction from beyond this
2131 point. For example, consider:
2133 int i = 2;
2135 try {
2136 f();
2137 i = 3;
2138 } catch (...) {}
2140 return i;
2142 Even though `i' is a local variable, we must be sure not
2143 to put `i = 3' in the delay slot if `f' might throw an
2144 exception.
2146 Presumably, we should also check to see if we could get
2147 back to this function via `setjmp'. */
2148 && ! can_throw_internal (insn)
2149 && (!JUMP_P (insn)
2150 || ((condjump_p (insn) || condjump_in_parallel_p (insn))
2151 && ! simplejump_p (insn)
2152 && !ANY_RETURN_P (JUMP_LABEL (insn)))))
2154 /* Invariant: If insn is a JUMP_INSN, the insn's jump
2155 label. Otherwise, zero. */
2156 rtx target = 0;
2157 int maybe_never = 0;
2158 rtx pat, trial_delay;
2160 CLEAR_RESOURCE (&needed);
2161 CLEAR_RESOURCE (&set);
2163 if (CALL_P (insn))
2165 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2166 mark_referenced_resources (insn, &needed, true);
2167 maybe_never = 1;
2169 else
2171 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
2172 mark_referenced_resources (insn, &needed, true);
2173 if (JUMP_P (insn))
2174 target = JUMP_LABEL (insn);
2177 if (target == 0 || ANY_RETURN_P (target))
2178 for (trial = next_nonnote_insn (insn); !stop_search_p (trial, 1);
2179 trial = next_trial)
2181 next_trial = next_nonnote_insn (trial);
2183 /* This must be an INSN or CALL_INSN. */
2184 pat = PATTERN (trial);
2186 /* Stand-alone USE and CLOBBER are just for flow. */
2187 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2188 continue;
2190 /* If this already has filled delay slots, get the insn needing
2191 the delay slots. */
2192 if (GET_CODE (pat) == SEQUENCE)
2193 trial_delay = XVECEXP (pat, 0, 0);
2194 else
2195 trial_delay = trial;
2197 /* Stop our search when seeing a jump. */
2198 if (JUMP_P (trial_delay))
2199 break;
2201 /* See if we have a resource problem before we try to
2202 split. */
2203 if (GET_CODE (pat) != SEQUENCE
2204 && ! insn_references_resource_p (trial, &set, true)
2205 && ! insn_sets_resource_p (trial, &set, true)
2206 && ! insn_sets_resource_p (trial, &needed, true)
2207 #ifdef HAVE_cc0
2208 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2209 #endif
2210 && ! (maybe_never && may_trap_or_fault_p (pat))
2211 && (trial = try_split (pat, trial, 0))
2212 && eligible_for_delay (insn, slots_filled, trial, flags)
2213 && ! can_throw_internal(trial))
2215 next_trial = next_nonnote_insn (trial);
2216 delay_list = add_to_delay_list (trial, delay_list);
2218 #ifdef HAVE_cc0
2219 if (reg_mentioned_p (cc0_rtx, pat))
2220 link_cc0_insns (trial);
2221 #endif
2223 delete_related_insns (trial);
2224 if (slots_to_fill == ++slots_filled)
2225 break;
2226 continue;
2229 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2230 mark_referenced_resources (trial, &needed, true);
2232 /* Ensure we don't put insns between the setting of cc and the
2233 comparison by moving a setting of cc into an earlier delay
2234 slot since these insns could clobber the condition code. */
2235 set.cc = 1;
2237 /* If this is a call or jump, we might not get here. */
2238 if (CALL_P (trial_delay)
2239 || JUMP_P (trial_delay))
2240 maybe_never = 1;
2243 /* If there are slots left to fill and our search was stopped by an
2244 unconditional branch, try the insn at the branch target. We can
2245 redirect the branch if it works.
2247 Don't do this if the insn at the branch target is a branch. */
2248 if (slots_to_fill != slots_filled
2249 && trial
2250 && jump_to_label_p (trial)
2251 && simplejump_p (trial)
2252 && (target == 0 || JUMP_LABEL (trial) == target)
2253 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2254 && ! (NONJUMP_INSN_P (next_trial)
2255 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2256 && !JUMP_P (next_trial)
2257 && ! insn_references_resource_p (next_trial, &set, true)
2258 && ! insn_sets_resource_p (next_trial, &set, true)
2259 && ! insn_sets_resource_p (next_trial, &needed, true)
2260 #ifdef HAVE_cc0
2261 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2262 #endif
2263 && ! (maybe_never && may_trap_or_fault_p (PATTERN (next_trial)))
2264 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2265 && eligible_for_delay (insn, slots_filled, next_trial, flags)
2266 && ! can_throw_internal (trial))
2268 /* See comment in relax_delay_slots about necessity of using
2269 next_real_insn here. */
2270 rtx new_label = next_real_insn (next_trial);
2272 if (new_label != 0)
2273 new_label = get_label_before (new_label);
2274 else
2275 new_label = find_end_label (simple_return_rtx);
2277 if (new_label)
2279 delay_list
2280 = add_to_delay_list (copy_delay_slot_insn (next_trial),
2281 delay_list);
2282 slots_filled++;
2283 reorg_redirect_jump (trial, new_label);
2285 /* If we merged because we both jumped to the same place,
2286 redirect the original insn also. */
2287 if (target)
2288 reorg_redirect_jump (insn, new_label);
2293 /* If this is an unconditional jump, then try to get insns from the
2294 target of the jump. */
2295 if (JUMP_P (insn)
2296 && simplejump_p (insn)
2297 && slots_filled != slots_to_fill)
2298 delay_list
2299 = fill_slots_from_thread (insn, const_true_rtx,
2300 next_active_insn (JUMP_LABEL (insn)),
2301 NULL, 1, 1,
2302 own_thread_p (JUMP_LABEL (insn),
2303 JUMP_LABEL (insn), 0),
2304 slots_to_fill, &slots_filled,
2305 delay_list);
2307 if (delay_list)
2308 unfilled_slots_base[i]
2309 = emit_delay_sequence (insn, delay_list, slots_filled);
2311 if (slots_to_fill == slots_filled)
2312 unfilled_slots_base[i] = 0;
2314 note_delay_statistics (slots_filled, 0);
2318 /* Follow any unconditional jump at LABEL, for the purpose of redirecting JUMP;
2319 return the ultimate label reached by any such chain of jumps.
2320 Return a suitable return rtx if the chain ultimately leads to a
2321 return instruction.
2322 If LABEL is not followed by a jump, return LABEL.
2323 If the chain loops or we can't find end, return LABEL,
2324 since that tells caller to avoid changing the insn.
2325 If the returned label is obtained by following a REG_CROSSING_JUMP
2326 jump, set *CROSSING to true, otherwise set it to false. */
2328 static rtx
2329 follow_jumps (rtx label, rtx jump, bool *crossing)
2331 rtx insn;
2332 rtx next;
2333 rtx value = label;
2334 int depth;
2336 *crossing = false;
2337 if (ANY_RETURN_P (label))
2338 return label;
2339 for (depth = 0;
2340 (depth < 10
2341 && (insn = next_active_insn (value)) != 0
2342 && JUMP_P (insn)
2343 && JUMP_LABEL (insn) != NULL_RTX
2344 && ((any_uncondjump_p (insn) && onlyjump_p (insn))
2345 || ANY_RETURN_P (PATTERN (insn)))
2346 && (next = NEXT_INSN (insn))
2347 && BARRIER_P (next));
2348 depth++)
2350 rtx this_label = JUMP_LABEL (insn);
2351 rtx tem;
2353 /* If we have found a cycle, make the insn jump to itself. */
2354 if (this_label == label)
2355 return label;
2356 if (ANY_RETURN_P (this_label))
2357 return this_label;
2358 tem = next_active_insn (this_label);
2359 if (tem
2360 && (GET_CODE (PATTERN (tem)) == ADDR_VEC
2361 || GET_CODE (PATTERN (tem)) == ADDR_DIFF_VEC))
2362 break;
2364 if (!targetm.can_follow_jump (jump, insn))
2365 break;
2366 if (!*crossing)
2367 *crossing
2368 = find_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX) != NULL_RTX;
2369 value = this_label;
2371 if (depth == 10)
2372 return label;
2373 return value;
2376 /* Try to find insns to place in delay slots.
2378 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2379 or is an unconditional branch if CONDITION is const_true_rtx.
2380 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2382 THREAD is a flow-of-control, either the insns to be executed if the
2383 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2385 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2386 to see if any potential delay slot insns set things needed there.
2388 LIKELY is nonzero if it is extremely likely that the branch will be
2389 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2390 end of a loop back up to the top.
2392 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2393 thread. I.e., it is the fallthrough code of our jump or the target of the
2394 jump when we are the only jump going there.
2396 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2397 case, we can only take insns from the head of the thread for our delay
2398 slot. We then adjust the jump to point after the insns we have taken. */
2400 static rtx
2401 fill_slots_from_thread (rtx insn, rtx condition, rtx thread,
2402 rtx opposite_thread, int likely, int thread_if_true,
2403 int own_thread, int slots_to_fill,
2404 int *pslots_filled, rtx delay_list)
2406 rtx new_thread;
2407 struct resources opposite_needed, set, needed;
2408 rtx trial;
2409 int lose = 0;
2410 int must_annul = 0;
2411 int flags;
2413 /* Validate our arguments. */
2414 gcc_assert(condition != const_true_rtx || thread_if_true);
2415 gcc_assert(own_thread || thread_if_true);
2417 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2419 /* If our thread is the end of subroutine, we can't get any delay
2420 insns from that. */
2421 if (thread == NULL_RTX || ANY_RETURN_P (thread))
2422 return delay_list;
2424 /* If this is an unconditional branch, nothing is needed at the
2425 opposite thread. Otherwise, compute what is needed there. */
2426 if (condition == const_true_rtx)
2427 CLEAR_RESOURCE (&opposite_needed);
2428 else
2429 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2431 /* If the insn at THREAD can be split, do it here to avoid having to
2432 update THREAD and NEW_THREAD if it is done in the loop below. Also
2433 initialize NEW_THREAD. */
2435 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2437 /* Scan insns at THREAD. We are looking for an insn that can be removed
2438 from THREAD (it neither sets nor references resources that were set
2439 ahead of it and it doesn't set anything needs by the insns ahead of
2440 it) and that either can be placed in an annulling insn or aren't
2441 needed at OPPOSITE_THREAD. */
2443 CLEAR_RESOURCE (&needed);
2444 CLEAR_RESOURCE (&set);
2446 /* If we do not own this thread, we must stop as soon as we find
2447 something that we can't put in a delay slot, since all we can do
2448 is branch into THREAD at a later point. Therefore, labels stop
2449 the search if this is not the `true' thread. */
2451 for (trial = thread;
2452 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2453 trial = next_nonnote_insn (trial))
2455 rtx pat, old_trial;
2457 /* If we have passed a label, we no longer own this thread. */
2458 if (LABEL_P (trial))
2460 own_thread = 0;
2461 continue;
2464 pat = PATTERN (trial);
2465 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2466 continue;
2468 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2469 don't separate or copy insns that set and use CC0. */
2470 if (! insn_references_resource_p (trial, &set, true)
2471 && ! insn_sets_resource_p (trial, &set, true)
2472 && ! insn_sets_resource_p (trial, &needed, true)
2473 #ifdef HAVE_cc0
2474 && ! (reg_mentioned_p (cc0_rtx, pat)
2475 && (! own_thread || ! sets_cc0_p (pat)))
2476 #endif
2477 && ! can_throw_internal (trial))
2479 rtx prior_insn;
2481 /* If TRIAL is redundant with some insn before INSN, we don't
2482 actually need to add it to the delay list; we can merely pretend
2483 we did. */
2484 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2486 fix_reg_dead_note (prior_insn, insn);
2487 if (own_thread)
2489 update_block (trial, thread);
2490 if (trial == thread)
2492 thread = next_active_insn (thread);
2493 if (new_thread == trial)
2494 new_thread = thread;
2497 delete_related_insns (trial);
2499 else
2501 update_reg_unused_notes (prior_insn, trial);
2502 new_thread = next_active_insn (trial);
2505 continue;
2508 /* There are two ways we can win: If TRIAL doesn't set anything
2509 needed at the opposite thread and can't trap, or if it can
2510 go into an annulled delay slot. */
2511 if (!must_annul
2512 && (condition == const_true_rtx
2513 || (! insn_sets_resource_p (trial, &opposite_needed, true)
2514 && ! may_trap_or_fault_p (pat)
2515 && ! RTX_FRAME_RELATED_P (trial))))
2517 old_trial = trial;
2518 trial = try_split (pat, trial, 0);
2519 if (new_thread == old_trial)
2520 new_thread = trial;
2521 if (thread == old_trial)
2522 thread = trial;
2523 pat = PATTERN (trial);
2524 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2525 goto winner;
2527 else if (0
2528 #ifdef ANNUL_IFTRUE_SLOTS
2529 || ! thread_if_true
2530 #endif
2531 #ifdef ANNUL_IFFALSE_SLOTS
2532 || thread_if_true
2533 #endif
2536 old_trial = trial;
2537 trial = try_split (pat, trial, 0);
2538 if (new_thread == old_trial)
2539 new_thread = trial;
2540 if (thread == old_trial)
2541 thread = trial;
2542 pat = PATTERN (trial);
2543 if ((must_annul || delay_list == NULL) && (thread_if_true
2544 ? check_annul_list_true_false (0, delay_list)
2545 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2546 : check_annul_list_true_false (1, delay_list)
2547 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2549 rtx temp;
2551 must_annul = 1;
2552 winner:
2554 #ifdef HAVE_cc0
2555 if (reg_mentioned_p (cc0_rtx, pat))
2556 link_cc0_insns (trial);
2557 #endif
2559 /* If we own this thread, delete the insn. If this is the
2560 destination of a branch, show that a basic block status
2561 may have been updated. In any case, mark the new
2562 starting point of this thread. */
2563 if (own_thread)
2565 rtx note;
2567 update_block (trial, thread);
2568 if (trial == thread)
2570 thread = next_active_insn (thread);
2571 if (new_thread == trial)
2572 new_thread = thread;
2575 /* We are moving this insn, not deleting it. We must
2576 temporarily increment the use count on any referenced
2577 label lest it be deleted by delete_related_insns. */
2578 for (note = REG_NOTES (trial);
2579 note != NULL_RTX;
2580 note = XEXP (note, 1))
2581 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2582 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2584 /* REG_LABEL_OPERAND could be
2585 NOTE_INSN_DELETED_LABEL too. */
2586 if (LABEL_P (XEXP (note, 0)))
2587 LABEL_NUSES (XEXP (note, 0))++;
2588 else
2589 gcc_assert (REG_NOTE_KIND (note)
2590 == REG_LABEL_OPERAND);
2592 if (jump_to_label_p (trial))
2593 LABEL_NUSES (JUMP_LABEL (trial))++;
2595 delete_related_insns (trial);
2597 for (note = REG_NOTES (trial);
2598 note != NULL_RTX;
2599 note = XEXP (note, 1))
2600 if (REG_NOTE_KIND (note) == REG_LABEL_OPERAND
2601 || REG_NOTE_KIND (note) == REG_LABEL_TARGET)
2603 /* REG_LABEL_OPERAND could be
2604 NOTE_INSN_DELETED_LABEL too. */
2605 if (LABEL_P (XEXP (note, 0)))
2606 LABEL_NUSES (XEXP (note, 0))--;
2607 else
2608 gcc_assert (REG_NOTE_KIND (note)
2609 == REG_LABEL_OPERAND);
2611 if (jump_to_label_p (trial))
2612 LABEL_NUSES (JUMP_LABEL (trial))--;
2614 else
2615 new_thread = next_active_insn (trial);
2617 temp = own_thread ? trial : copy_delay_slot_insn (trial);
2618 if (thread_if_true)
2619 INSN_FROM_TARGET_P (temp) = 1;
2621 delay_list = add_to_delay_list (temp, delay_list);
2623 if (slots_to_fill == ++(*pslots_filled))
2625 /* Even though we have filled all the slots, we
2626 may be branching to a location that has a
2627 redundant insn. Skip any if so. */
2628 while (new_thread && ! own_thread
2629 && ! insn_sets_resource_p (new_thread, &set, true)
2630 && ! insn_sets_resource_p (new_thread, &needed,
2631 true)
2632 && ! insn_references_resource_p (new_thread,
2633 &set, true)
2634 && (prior_insn
2635 = redundant_insn (new_thread, insn,
2636 delay_list)))
2638 /* We know we do not own the thread, so no need
2639 to call update_block and delete_insn. */
2640 fix_reg_dead_note (prior_insn, insn);
2641 update_reg_unused_notes (prior_insn, new_thread);
2642 new_thread = next_active_insn (new_thread);
2644 break;
2647 continue;
2652 /* This insn can't go into a delay slot. */
2653 lose = 1;
2654 mark_set_resources (trial, &set, 0, MARK_SRC_DEST_CALL);
2655 mark_referenced_resources (trial, &needed, true);
2657 /* Ensure we don't put insns between the setting of cc and the comparison
2658 by moving a setting of cc into an earlier delay slot since these insns
2659 could clobber the condition code. */
2660 set.cc = 1;
2662 /* If this insn is a register-register copy and the next insn has
2663 a use of our destination, change it to use our source. That way,
2664 it will become a candidate for our delay slot the next time
2665 through this loop. This case occurs commonly in loops that
2666 scan a list.
2668 We could check for more complex cases than those tested below,
2669 but it doesn't seem worth it. It might also be a good idea to try
2670 to swap the two insns. That might do better.
2672 We can't do this if the next insn modifies our destination, because
2673 that would make the replacement into the insn invalid. We also can't
2674 do this if it modifies our source, because it might be an earlyclobber
2675 operand. This latter test also prevents updating the contents of
2676 a PRE_INC. We also can't do this if there's overlap of source and
2677 destination. Overlap may happen for larger-than-register-size modes. */
2679 if (NONJUMP_INSN_P (trial) && GET_CODE (pat) == SET
2680 && REG_P (SET_SRC (pat))
2681 && REG_P (SET_DEST (pat))
2682 && !reg_overlap_mentioned_p (SET_DEST (pat), SET_SRC (pat)))
2684 rtx next = next_nonnote_insn (trial);
2686 if (next && NONJUMP_INSN_P (next)
2687 && GET_CODE (PATTERN (next)) != USE
2688 && ! reg_set_p (SET_DEST (pat), next)
2689 && ! reg_set_p (SET_SRC (pat), next)
2690 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2691 && ! modified_in_p (SET_DEST (pat), next))
2692 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2696 /* If we stopped on a branch insn that has delay slots, see if we can
2697 steal some of the insns in those slots. */
2698 if (trial && NONJUMP_INSN_P (trial)
2699 && GET_CODE (PATTERN (trial)) == SEQUENCE
2700 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0)))
2702 /* If this is the `true' thread, we will want to follow the jump,
2703 so we can only do this if we have taken everything up to here. */
2704 if (thread_if_true && trial == new_thread)
2706 delay_list
2707 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2708 delay_list, &set, &needed,
2709 &opposite_needed, slots_to_fill,
2710 pslots_filled, &must_annul,
2711 &new_thread);
2712 /* If we owned the thread and are told that it branched
2713 elsewhere, make sure we own the thread at the new location. */
2714 if (own_thread && trial != new_thread)
2715 own_thread = own_thread_p (new_thread, new_thread, 0);
2717 else if (! thread_if_true)
2718 delay_list
2719 = steal_delay_list_from_fallthrough (insn, condition,
2720 PATTERN (trial),
2721 delay_list, &set, &needed,
2722 &opposite_needed, slots_to_fill,
2723 pslots_filled, &must_annul);
2726 /* If we haven't found anything for this delay slot and it is very
2727 likely that the branch will be taken, see if the insn at our target
2728 increments or decrements a register with an increment that does not
2729 depend on the destination register. If so, try to place the opposite
2730 arithmetic insn after the jump insn and put the arithmetic insn in the
2731 delay slot. If we can't do this, return. */
2732 if (delay_list == 0 && likely
2733 && new_thread && !ANY_RETURN_P (new_thread)
2734 && NONJUMP_INSN_P (new_thread)
2735 && !RTX_FRAME_RELATED_P (new_thread)
2736 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2737 && asm_noperands (PATTERN (new_thread)) < 0)
2739 rtx pat = PATTERN (new_thread);
2740 rtx dest;
2741 rtx src;
2743 trial = new_thread;
2744 pat = PATTERN (trial);
2746 if (!NONJUMP_INSN_P (trial)
2747 || GET_CODE (pat) != SET
2748 || ! eligible_for_delay (insn, 0, trial, flags)
2749 || can_throw_internal (trial))
2750 return 0;
2752 dest = SET_DEST (pat), src = SET_SRC (pat);
2753 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2754 && rtx_equal_p (XEXP (src, 0), dest)
2755 && (!FLOAT_MODE_P (GET_MODE (src))
2756 || flag_unsafe_math_optimizations)
2757 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1))
2758 && ! side_effects_p (pat))
2760 rtx other = XEXP (src, 1);
2761 rtx new_arith;
2762 rtx ninsn;
2764 /* If this is a constant adjustment, use the same code with
2765 the negated constant. Otherwise, reverse the sense of the
2766 arithmetic. */
2767 if (CONST_INT_P (other))
2768 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2769 negate_rtx (GET_MODE (src), other));
2770 else
2771 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2772 GET_MODE (src), dest, other);
2774 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2775 insn);
2777 if (recog_memoized (ninsn) < 0
2778 || (extract_insn (ninsn), ! constrain_operands (1)))
2780 delete_related_insns (ninsn);
2781 return 0;
2784 if (own_thread)
2786 update_block (trial, thread);
2787 if (trial == thread)
2789 thread = next_active_insn (thread);
2790 if (new_thread == trial)
2791 new_thread = thread;
2793 delete_related_insns (trial);
2795 else
2796 new_thread = next_active_insn (trial);
2798 ninsn = own_thread ? trial : copy_delay_slot_insn (trial);
2799 if (thread_if_true)
2800 INSN_FROM_TARGET_P (ninsn) = 1;
2802 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2803 (*pslots_filled)++;
2807 if (delay_list && must_annul)
2808 INSN_ANNULLED_BRANCH_P (insn) = 1;
2810 /* If we are to branch into the middle of this thread, find an appropriate
2811 label or make a new one if none, and redirect INSN to it. If we hit the
2812 end of the function, use the end-of-function label. */
2813 if (new_thread != thread)
2815 rtx label;
2816 bool crossing = false;
2818 gcc_assert (thread_if_true);
2820 if (new_thread && simplejump_or_return_p (new_thread)
2821 && redirect_with_delay_list_safe_p (insn,
2822 JUMP_LABEL (new_thread),
2823 delay_list))
2824 new_thread = follow_jumps (JUMP_LABEL (new_thread), insn, &crossing);
2826 if (ANY_RETURN_P (new_thread))
2827 label = find_end_label (new_thread);
2828 else if (LABEL_P (new_thread))
2829 label = new_thread;
2830 else
2831 label = get_label_before (new_thread);
2833 if (label)
2835 reorg_redirect_jump (insn, label);
2836 if (crossing)
2837 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
2841 return delay_list;
2844 /* Make another attempt to find insns to place in delay slots.
2846 We previously looked for insns located in front of the delay insn
2847 and, for non-jump delay insns, located behind the delay insn.
2849 Here only try to schedule jump insns and try to move insns from either
2850 the target or the following insns into the delay slot. If annulling is
2851 supported, we will be likely to do this. Otherwise, we can do this only
2852 if safe. */
2854 static void
2855 fill_eager_delay_slots (void)
2857 rtx insn;
2858 int i;
2859 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2861 for (i = 0; i < num_unfilled_slots; i++)
2863 rtx condition;
2864 rtx target_label, insn_at_target, fallthrough_insn;
2865 rtx delay_list = 0;
2866 int own_target;
2867 int own_fallthrough;
2868 int prediction, slots_to_fill, slots_filled;
2870 insn = unfilled_slots_base[i];
2871 if (insn == 0
2872 || INSN_DELETED_P (insn)
2873 || !JUMP_P (insn)
2874 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2875 continue;
2877 slots_to_fill = num_delay_slots (insn);
2878 /* Some machine description have defined instructions to have
2879 delay slots only in certain circumstances which may depend on
2880 nearby insns (which change due to reorg's actions).
2882 For example, the PA port normally has delay slots for unconditional
2883 jumps.
2885 However, the PA port claims such jumps do not have a delay slot
2886 if they are immediate successors of certain CALL_INSNs. This
2887 allows the port to favor filling the delay slot of the call with
2888 the unconditional jump. */
2889 if (slots_to_fill == 0)
2890 continue;
2892 slots_filled = 0;
2893 target_label = JUMP_LABEL (insn);
2894 condition = get_branch_condition (insn, target_label);
2896 if (condition == 0)
2897 continue;
2899 /* Get the next active fallthrough and target insns and see if we own
2900 them. Then see whether the branch is likely true. We don't need
2901 to do a lot of this for unconditional branches. */
2903 insn_at_target = first_active_target_insn (target_label);
2904 own_target = own_thread_p (target_label, target_label, 0);
2906 if (condition == const_true_rtx)
2908 own_fallthrough = 0;
2909 fallthrough_insn = 0;
2910 prediction = 2;
2912 else
2914 fallthrough_insn = next_active_insn (insn);
2915 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2916 prediction = mostly_true_jump (insn);
2919 /* If this insn is expected to branch, first try to get insns from our
2920 target, then our fallthrough insns. If it is not expected to branch,
2921 try the other order. */
2923 if (prediction > 0)
2925 delay_list
2926 = fill_slots_from_thread (insn, condition, insn_at_target,
2927 fallthrough_insn, prediction == 2, 1,
2928 own_target,
2929 slots_to_fill, &slots_filled, delay_list);
2931 if (delay_list == 0 && own_fallthrough)
2933 /* Even though we didn't find anything for delay slots,
2934 we might have found a redundant insn which we deleted
2935 from the thread that was filled. So we have to recompute
2936 the next insn at the target. */
2937 target_label = JUMP_LABEL (insn);
2938 insn_at_target = first_active_target_insn (target_label);
2940 delay_list
2941 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2942 insn_at_target, 0, 0,
2943 own_fallthrough,
2944 slots_to_fill, &slots_filled,
2945 delay_list);
2948 else
2950 if (own_fallthrough)
2951 delay_list
2952 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2953 insn_at_target, 0, 0,
2954 own_fallthrough,
2955 slots_to_fill, &slots_filled,
2956 delay_list);
2958 if (delay_list == 0)
2959 delay_list
2960 = fill_slots_from_thread (insn, condition, insn_at_target,
2961 next_active_insn (insn), 0, 1,
2962 own_target,
2963 slots_to_fill, &slots_filled,
2964 delay_list);
2967 if (delay_list)
2968 unfilled_slots_base[i]
2969 = emit_delay_sequence (insn, delay_list, slots_filled);
2971 if (slots_to_fill == slots_filled)
2972 unfilled_slots_base[i] = 0;
2974 note_delay_statistics (slots_filled, 1);
2978 static void delete_computation (rtx insn);
2980 /* Recursively delete prior insns that compute the value (used only by INSN
2981 which the caller is deleting) stored in the register mentioned by NOTE
2982 which is a REG_DEAD note associated with INSN. */
2984 static void
2985 delete_prior_computation (rtx note, rtx insn)
2987 rtx our_prev;
2988 rtx reg = XEXP (note, 0);
2990 for (our_prev = prev_nonnote_insn (insn);
2991 our_prev && (NONJUMP_INSN_P (our_prev)
2992 || CALL_P (our_prev));
2993 our_prev = prev_nonnote_insn (our_prev))
2995 rtx pat = PATTERN (our_prev);
2997 /* If we reach a CALL which is not calling a const function
2998 or the callee pops the arguments, then give up. */
2999 if (CALL_P (our_prev)
3000 && (! RTL_CONST_CALL_P (our_prev)
3001 || GET_CODE (pat) != SET || GET_CODE (SET_SRC (pat)) != CALL))
3002 break;
3004 /* If we reach a SEQUENCE, it is too complex to try to
3005 do anything with it, so give up. We can be run during
3006 and after reorg, so SEQUENCE rtl can legitimately show
3007 up here. */
3008 if (GET_CODE (pat) == SEQUENCE)
3009 break;
3011 if (GET_CODE (pat) == USE
3012 && NONJUMP_INSN_P (XEXP (pat, 0)))
3013 /* reorg creates USEs that look like this. We leave them
3014 alone because reorg needs them for its own purposes. */
3015 break;
3017 if (reg_set_p (reg, pat))
3019 if (side_effects_p (pat) && !CALL_P (our_prev))
3020 break;
3022 if (GET_CODE (pat) == PARALLEL)
3024 /* If we find a SET of something else, we can't
3025 delete the insn. */
3027 int i;
3029 for (i = 0; i < XVECLEN (pat, 0); i++)
3031 rtx part = XVECEXP (pat, 0, i);
3033 if (GET_CODE (part) == SET
3034 && SET_DEST (part) != reg)
3035 break;
3038 if (i == XVECLEN (pat, 0))
3039 delete_computation (our_prev);
3041 else if (GET_CODE (pat) == SET
3042 && REG_P (SET_DEST (pat)))
3044 int dest_regno = REGNO (SET_DEST (pat));
3045 int dest_endregno = END_REGNO (SET_DEST (pat));
3046 int regno = REGNO (reg);
3047 int endregno = END_REGNO (reg);
3049 if (dest_regno >= regno
3050 && dest_endregno <= endregno)
3051 delete_computation (our_prev);
3053 /* We may have a multi-word hard register and some, but not
3054 all, of the words of the register are needed in subsequent
3055 insns. Write REG_UNUSED notes for those parts that were not
3056 needed. */
3057 else if (dest_regno <= regno
3058 && dest_endregno >= endregno)
3060 int i;
3062 add_reg_note (our_prev, REG_UNUSED, reg);
3064 for (i = dest_regno; i < dest_endregno; i++)
3065 if (! find_regno_note (our_prev, REG_UNUSED, i))
3066 break;
3068 if (i == dest_endregno)
3069 delete_computation (our_prev);
3073 break;
3076 /* If PAT references the register that dies here, it is an
3077 additional use. Hence any prior SET isn't dead. However, this
3078 insn becomes the new place for the REG_DEAD note. */
3079 if (reg_overlap_mentioned_p (reg, pat))
3081 XEXP (note, 1) = REG_NOTES (our_prev);
3082 REG_NOTES (our_prev) = note;
3083 break;
3088 /* Delete INSN and recursively delete insns that compute values used only
3089 by INSN. This uses the REG_DEAD notes computed during flow analysis.
3091 Look at all our REG_DEAD notes. If a previous insn does nothing other
3092 than set a register that dies in this insn, we can delete that insn
3093 as well.
3095 On machines with CC0, if CC0 is used in this insn, we may be able to
3096 delete the insn that set it. */
3098 static void
3099 delete_computation (rtx insn)
3101 rtx note, next;
3103 #ifdef HAVE_cc0
3104 if (reg_referenced_p (cc0_rtx, PATTERN (insn)))
3106 rtx prev = prev_nonnote_insn (insn);
3107 /* We assume that at this stage
3108 CC's are always set explicitly
3109 and always immediately before the jump that
3110 will use them. So if the previous insn
3111 exists to set the CC's, delete it
3112 (unless it performs auto-increments, etc.). */
3113 if (prev && NONJUMP_INSN_P (prev)
3114 && sets_cc0_p (PATTERN (prev)))
3116 if (sets_cc0_p (PATTERN (prev)) > 0
3117 && ! side_effects_p (PATTERN (prev)))
3118 delete_computation (prev);
3119 else
3120 /* Otherwise, show that cc0 won't be used. */
3121 add_reg_note (prev, REG_UNUSED, cc0_rtx);
3124 #endif
3126 for (note = REG_NOTES (insn); note; note = next)
3128 next = XEXP (note, 1);
3130 if (REG_NOTE_KIND (note) != REG_DEAD
3131 /* Verify that the REG_NOTE is legitimate. */
3132 || !REG_P (XEXP (note, 0)))
3133 continue;
3135 delete_prior_computation (note, insn);
3138 delete_related_insns (insn);
3141 /* If all INSN does is set the pc, delete it,
3142 and delete the insn that set the condition codes for it
3143 if that's what the previous thing was. */
3145 static void
3146 delete_jump (rtx insn)
3148 rtx set = single_set (insn);
3150 if (set && GET_CODE (SET_DEST (set)) == PC)
3151 delete_computation (insn);
3154 static rtx
3155 label_before_next_insn (rtx x, rtx scan_limit)
3157 rtx insn = next_active_insn (x);
3158 while (insn)
3160 insn = PREV_INSN (insn);
3161 if (insn == scan_limit || insn == NULL_RTX)
3162 return NULL_RTX;
3163 if (LABEL_P (insn))
3164 break;
3166 return insn;
3170 /* Once we have tried two ways to fill a delay slot, make a pass over the
3171 code to try to improve the results and to do such things as more jump
3172 threading. */
3174 static void
3175 relax_delay_slots (rtx first)
3177 rtx insn, next, pat;
3178 rtx trial, delay_insn, target_label;
3180 /* Look at every JUMP_INSN and see if we can improve it. */
3181 for (insn = first; insn; insn = next)
3183 rtx other;
3184 bool crossing;
3186 next = next_active_insn (insn);
3188 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3189 the next insn, or jumps to a label that is not the last of a
3190 group of consecutive labels. */
3191 if (JUMP_P (insn)
3192 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3193 && !ANY_RETURN_P (target_label = JUMP_LABEL (insn)))
3195 target_label
3196 = skip_consecutive_labels (follow_jumps (target_label, insn,
3197 &crossing));
3198 if (ANY_RETURN_P (target_label))
3199 target_label = find_end_label (target_label);
3201 if (target_label && next_active_insn (target_label) == next
3202 && ! condjump_in_parallel_p (insn))
3204 delete_jump (insn);
3205 continue;
3208 if (target_label && target_label != JUMP_LABEL (insn))
3210 reorg_redirect_jump (insn, target_label);
3211 if (crossing)
3212 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3215 /* See if this jump conditionally branches around an unconditional
3216 jump. If so, invert this jump and point it to the target of the
3217 second jump. */
3218 if (next && simplejump_or_return_p (next)
3219 && any_condjump_p (insn)
3220 && target_label
3221 && next_active_insn (target_label) == next_active_insn (next)
3222 && no_labels_between_p (insn, next))
3224 rtx label = JUMP_LABEL (next);
3226 /* Be careful how we do this to avoid deleting code or
3227 labels that are momentarily dead. See similar optimization
3228 in jump.c.
3230 We also need to ensure we properly handle the case when
3231 invert_jump fails. */
3233 ++LABEL_NUSES (target_label);
3234 if (!ANY_RETURN_P (label))
3235 ++LABEL_NUSES (label);
3237 if (invert_jump (insn, label, 1))
3239 delete_related_insns (next);
3240 next = insn;
3243 if (!ANY_RETURN_P (label))
3244 --LABEL_NUSES (label);
3246 if (--LABEL_NUSES (target_label) == 0)
3247 delete_related_insns (target_label);
3249 continue;
3253 /* If this is an unconditional jump and the previous insn is a
3254 conditional jump, try reversing the condition of the previous
3255 insn and swapping our targets. The next pass might be able to
3256 fill the slots.
3258 Don't do this if we expect the conditional branch to be true, because
3259 we would then be making the more common case longer. */
3261 if (simplejump_or_return_p (insn)
3262 && (other = prev_active_insn (insn)) != 0
3263 && any_condjump_p (other)
3264 && no_labels_between_p (other, insn)
3265 && 0 > mostly_true_jump (other))
3267 rtx other_target = JUMP_LABEL (other);
3268 target_label = JUMP_LABEL (insn);
3270 if (invert_jump (other, target_label, 0))
3271 reorg_redirect_jump (insn, other_target);
3274 /* Now look only at cases where we have a filled delay slot. */
3275 if (!NONJUMP_INSN_P (insn) || GET_CODE (PATTERN (insn)) != SEQUENCE)
3276 continue;
3278 pat = PATTERN (insn);
3279 delay_insn = XVECEXP (pat, 0, 0);
3281 /* See if the first insn in the delay slot is redundant with some
3282 previous insn. Remove it from the delay slot if so; then set up
3283 to reprocess this insn. */
3284 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3286 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3287 next = prev_active_insn (next);
3288 continue;
3291 /* See if we have a RETURN insn with a filled delay slot followed
3292 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3293 the first RETURN (but not its delay insn). This gives the same
3294 effect in fewer instructions.
3296 Only do so if optimizing for size since this results in slower, but
3297 smaller code. */
3298 if (optimize_function_for_size_p (cfun)
3299 && ANY_RETURN_P (PATTERN (delay_insn))
3300 && next
3301 && JUMP_P (next)
3302 && PATTERN (next) == PATTERN (delay_insn))
3304 rtx after;
3305 int i;
3307 /* Delete the RETURN and just execute the delay list insns.
3309 We do this by deleting the INSN containing the SEQUENCE, then
3310 re-emitting the insns separately, and then deleting the RETURN.
3311 This allows the count of the jump target to be properly
3312 decremented.
3314 Note that we need to change the INSN_UID of the re-emitted insns
3315 since it is used to hash the insns for mark_target_live_regs and
3316 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3318 Clear the from target bit, since these insns are no longer
3319 in delay slots. */
3320 for (i = 0; i < XVECLEN (pat, 0); i++)
3321 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3323 trial = PREV_INSN (insn);
3324 delete_related_insns (insn);
3325 gcc_assert (GET_CODE (pat) == SEQUENCE);
3326 add_insn_after (delay_insn, trial, NULL);
3327 after = delay_insn;
3328 for (i = 1; i < XVECLEN (pat, 0); i++)
3329 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3330 delete_scheduled_jump (delay_insn);
3331 continue;
3334 /* Now look only at the cases where we have a filled JUMP_INSN. */
3335 if (!JUMP_P (delay_insn)
3336 || !(condjump_p (delay_insn) || condjump_in_parallel_p (delay_insn)))
3337 continue;
3339 target_label = JUMP_LABEL (delay_insn);
3340 if (target_label && ANY_RETURN_P (target_label))
3341 continue;
3343 /* If this jump goes to another unconditional jump, thread it, but
3344 don't convert a jump into a RETURN here. */
3345 trial = skip_consecutive_labels (follow_jumps (target_label, delay_insn,
3346 &crossing));
3347 if (ANY_RETURN_P (trial))
3348 trial = find_end_label (trial);
3350 if (trial && trial != target_label
3351 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3353 reorg_redirect_jump (delay_insn, trial);
3354 target_label = trial;
3355 if (crossing)
3356 set_unique_reg_note (insn, REG_CROSSING_JUMP, NULL_RTX);
3359 /* If the first insn at TARGET_LABEL is redundant with a previous
3360 insn, redirect the jump to the following insn and process again.
3361 We use next_real_insn instead of next_active_insn so we
3362 don't skip USE-markers, or we'll end up with incorrect
3363 liveness info. */
3364 trial = next_real_insn (target_label);
3365 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3366 && redundant_insn (trial, insn, 0)
3367 && ! can_throw_internal (trial))
3369 /* Figure out where to emit the special USE insn so we don't
3370 later incorrectly compute register live/death info. */
3371 rtx tmp = next_active_insn (trial);
3372 if (tmp == 0)
3373 tmp = find_end_label (simple_return_rtx);
3375 if (tmp)
3377 /* Insert the special USE insn and update dataflow info. */
3378 update_block (trial, tmp);
3380 /* Now emit a label before the special USE insn, and
3381 redirect our jump to the new label. */
3382 target_label = get_label_before (PREV_INSN (tmp));
3383 reorg_redirect_jump (delay_insn, target_label);
3384 next = insn;
3385 continue;
3389 /* Similarly, if it is an unconditional jump with one insn in its
3390 delay list and that insn is redundant, thread the jump. */
3391 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3392 && XVECLEN (PATTERN (trial), 0) == 2
3393 && JUMP_P (XVECEXP (PATTERN (trial), 0, 0))
3394 && simplejump_or_return_p (XVECEXP (PATTERN (trial), 0, 0))
3395 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3397 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3398 if (ANY_RETURN_P (target_label))
3399 target_label = find_end_label (target_label);
3401 if (target_label
3402 && redirect_with_delay_slots_safe_p (delay_insn, target_label,
3403 insn))
3405 reorg_redirect_jump (delay_insn, target_label);
3406 next = insn;
3407 continue;
3411 /* See if we have a simple (conditional) jump that is useless. */
3412 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3413 && ! condjump_in_parallel_p (delay_insn)
3414 && prev_active_insn (target_label) == insn
3415 && ! BARRIER_P (prev_nonnote_insn (target_label))
3416 #ifdef HAVE_cc0
3417 /* If the last insn in the delay slot sets CC0 for some insn,
3418 various code assumes that it is in a delay slot. We could
3419 put it back where it belonged and delete the register notes,
3420 but it doesn't seem worthwhile in this uncommon case. */
3421 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3422 REG_CC_USER, NULL_RTX)
3423 #endif
3426 rtx after;
3427 int i;
3429 /* All this insn does is execute its delay list and jump to the
3430 following insn. So delete the jump and just execute the delay
3431 list insns.
3433 We do this by deleting the INSN containing the SEQUENCE, then
3434 re-emitting the insns separately, and then deleting the jump.
3435 This allows the count of the jump target to be properly
3436 decremented.
3438 Note that we need to change the INSN_UID of the re-emitted insns
3439 since it is used to hash the insns for mark_target_live_regs and
3440 the re-emitted insns will no longer be wrapped up in a SEQUENCE.
3442 Clear the from target bit, since these insns are no longer
3443 in delay slots. */
3444 for (i = 0; i < XVECLEN (pat, 0); i++)
3445 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3447 trial = PREV_INSN (insn);
3448 delete_related_insns (insn);
3449 gcc_assert (GET_CODE (pat) == SEQUENCE);
3450 add_insn_after (delay_insn, trial, NULL);
3451 after = delay_insn;
3452 for (i = 1; i < XVECLEN (pat, 0); i++)
3453 after = emit_copy_of_insn_after (XVECEXP (pat, 0, i), after);
3454 delete_scheduled_jump (delay_insn);
3455 continue;
3458 /* See if this is an unconditional jump around a single insn which is
3459 identical to the one in its delay slot. In this case, we can just
3460 delete the branch and the insn in its delay slot. */
3461 if (next && NONJUMP_INSN_P (next)
3462 && label_before_next_insn (next, insn) == target_label
3463 && simplejump_p (insn)
3464 && XVECLEN (pat, 0) == 2
3465 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3467 delete_related_insns (insn);
3468 continue;
3471 /* See if this jump (with its delay slots) conditionally branches
3472 around an unconditional jump (without delay slots). If so, invert
3473 this jump and point it to the target of the second jump. We cannot
3474 do this for annulled jumps, though. Again, don't convert a jump to
3475 a RETURN here. */
3476 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3477 && any_condjump_p (delay_insn)
3478 && next && simplejump_or_return_p (next)
3479 && next_active_insn (target_label) == next_active_insn (next)
3480 && no_labels_between_p (insn, next))
3482 rtx label = JUMP_LABEL (next);
3483 rtx old_label = JUMP_LABEL (delay_insn);
3485 if (ANY_RETURN_P (label))
3486 label = find_end_label (label);
3488 /* find_end_label can generate a new label. Check this first. */
3489 if (label
3490 && no_labels_between_p (insn, next)
3491 && redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3493 /* Be careful how we do this to avoid deleting code or labels
3494 that are momentarily dead. See similar optimization in
3495 jump.c */
3496 if (old_label)
3497 ++LABEL_NUSES (old_label);
3499 if (invert_jump (delay_insn, label, 1))
3501 int i;
3503 /* Must update the INSN_FROM_TARGET_P bits now that
3504 the branch is reversed, so that mark_target_live_regs
3505 will handle the delay slot insn correctly. */
3506 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3508 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3509 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3512 delete_related_insns (next);
3513 next = insn;
3516 if (old_label && --LABEL_NUSES (old_label) == 0)
3517 delete_related_insns (old_label);
3518 continue;
3522 /* If we own the thread opposite the way this insn branches, see if we
3523 can merge its delay slots with following insns. */
3524 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3525 && own_thread_p (NEXT_INSN (insn), 0, 1))
3526 try_merge_delay_insns (insn, next);
3527 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3528 && own_thread_p (target_label, target_label, 0))
3529 try_merge_delay_insns (insn, next_active_insn (target_label));
3531 /* If we get here, we haven't deleted INSN. But we may have deleted
3532 NEXT, so recompute it. */
3533 next = next_active_insn (insn);
3538 /* Look for filled jumps to the end of function label. We can try to convert
3539 them into RETURN insns if the insns in the delay slot are valid for the
3540 RETURN as well. */
3542 static void
3543 make_return_insns (rtx first)
3545 rtx insn, jump_insn, pat;
3546 rtx real_return_label = function_return_label;
3547 rtx real_simple_return_label = function_simple_return_label;
3548 int slots, i;
3550 /* See if there is a RETURN insn in the function other than the one we
3551 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3552 into a RETURN to jump to it. */
3553 for (insn = first; insn; insn = NEXT_INSN (insn))
3554 if (JUMP_P (insn) && ANY_RETURN_P (PATTERN (insn)))
3556 rtx t = get_label_before (insn);
3557 if (PATTERN (insn) == ret_rtx)
3558 real_return_label = t;
3559 else
3560 real_simple_return_label = t;
3561 break;
3564 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3565 was equal to END_OF_FUNCTION_LABEL. */
3566 if (real_return_label)
3567 LABEL_NUSES (real_return_label)++;
3568 if (real_simple_return_label)
3569 LABEL_NUSES (real_simple_return_label)++;
3571 /* Clear the list of insns to fill so we can use it. */
3572 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3574 for (insn = first; insn; insn = NEXT_INSN (insn))
3576 int flags;
3577 rtx kind, real_label;
3579 /* Only look at filled JUMP_INSNs that go to the end of function
3580 label. */
3581 if (!NONJUMP_INSN_P (insn)
3582 || GET_CODE (PATTERN (insn)) != SEQUENCE
3583 || !jump_to_label_p (XVECEXP (PATTERN (insn), 0, 0)))
3584 continue;
3586 if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) == function_return_label)
3588 kind = ret_rtx;
3589 real_label = real_return_label;
3591 else if (JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0))
3592 == function_simple_return_label)
3594 kind = simple_return_rtx;
3595 real_label = real_simple_return_label;
3597 else
3598 continue;
3600 pat = PATTERN (insn);
3601 jump_insn = XVECEXP (pat, 0, 0);
3603 /* If we can't make the jump into a RETURN, try to redirect it to the best
3604 RETURN and go on to the next insn. */
3605 if (!reorg_redirect_jump (jump_insn, kind))
3607 /* Make sure redirecting the jump will not invalidate the delay
3608 slot insns. */
3609 if (redirect_with_delay_slots_safe_p (jump_insn, real_label, insn))
3610 reorg_redirect_jump (jump_insn, real_label);
3611 continue;
3614 /* See if this RETURN can accept the insns current in its delay slot.
3615 It can if it has more or an equal number of slots and the contents
3616 of each is valid. */
3618 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3619 slots = num_delay_slots (jump_insn);
3620 if (slots >= XVECLEN (pat, 0) - 1)
3622 for (i = 1; i < XVECLEN (pat, 0); i++)
3623 if (! (
3624 #ifdef ANNUL_IFFALSE_SLOTS
3625 (INSN_ANNULLED_BRANCH_P (jump_insn)
3626 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3627 ? eligible_for_annul_false (jump_insn, i - 1,
3628 XVECEXP (pat, 0, i), flags) :
3629 #endif
3630 #ifdef ANNUL_IFTRUE_SLOTS
3631 (INSN_ANNULLED_BRANCH_P (jump_insn)
3632 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3633 ? eligible_for_annul_true (jump_insn, i - 1,
3634 XVECEXP (pat, 0, i), flags) :
3635 #endif
3636 eligible_for_delay (jump_insn, i - 1,
3637 XVECEXP (pat, 0, i), flags)))
3638 break;
3640 else
3641 i = 0;
3643 if (i == XVECLEN (pat, 0))
3644 continue;
3646 /* We have to do something with this insn. If it is an unconditional
3647 RETURN, delete the SEQUENCE and output the individual insns,
3648 followed by the RETURN. Then set things up so we try to find
3649 insns for its delay slots, if it needs some. */
3650 if (ANY_RETURN_P (PATTERN (jump_insn)))
3652 rtx prev = PREV_INSN (insn);
3654 delete_related_insns (insn);
3655 for (i = 1; i < XVECLEN (pat, 0); i++)
3656 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3658 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3659 emit_barrier_after (insn);
3661 if (slots)
3662 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3664 else
3665 /* It is probably more efficient to keep this with its current
3666 delay slot as a branch to a RETURN. */
3667 reorg_redirect_jump (jump_insn, real_label);
3670 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3671 new delay slots we have created. */
3672 if (real_return_label != NULL_RTX && --LABEL_NUSES (real_return_label) == 0)
3673 delete_related_insns (real_return_label);
3674 if (real_simple_return_label != NULL_RTX
3675 && --LABEL_NUSES (real_simple_return_label) == 0)
3676 delete_related_insns (real_simple_return_label);
3678 fill_simple_delay_slots (1);
3679 fill_simple_delay_slots (0);
3682 /* Try to find insns to place in delay slots. */
3684 void
3685 dbr_schedule (rtx first)
3687 rtx insn, next, epilogue_insn = 0;
3688 int i;
3689 bool need_return_insns;
3691 /* If the current function has no insns other than the prologue and
3692 epilogue, then do not try to fill any delay slots. */
3693 if (n_basic_blocks == NUM_FIXED_BLOCKS)
3694 return;
3696 /* Find the highest INSN_UID and allocate and initialize our map from
3697 INSN_UID's to position in code. */
3698 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3700 if (INSN_UID (insn) > max_uid)
3701 max_uid = INSN_UID (insn);
3702 if (NOTE_P (insn)
3703 && NOTE_KIND (insn) == NOTE_INSN_EPILOGUE_BEG)
3704 epilogue_insn = insn;
3707 uid_to_ruid = XNEWVEC (int, max_uid + 1);
3708 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3709 uid_to_ruid[INSN_UID (insn)] = i;
3711 /* Initialize the list of insns that need filling. */
3712 if (unfilled_firstobj == 0)
3714 gcc_obstack_init (&unfilled_slots_obstack);
3715 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3718 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3720 rtx target;
3722 if (JUMP_P (insn))
3723 INSN_ANNULLED_BRANCH_P (insn) = 0;
3724 INSN_FROM_TARGET_P (insn) = 0;
3726 /* Skip vector tables. We can't get attributes for them. */
3727 if (JUMP_TABLE_DATA_P (insn))
3728 continue;
3730 if (num_delay_slots (insn) > 0)
3731 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3733 /* Ensure all jumps go to the last of a set of consecutive labels. */
3734 if (JUMP_P (insn)
3735 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3736 && !ANY_RETURN_P (JUMP_LABEL (insn))
3737 && ((target = skip_consecutive_labels (JUMP_LABEL (insn)))
3738 != JUMP_LABEL (insn)))
3739 redirect_jump (insn, target, 1);
3742 init_resource_info (epilogue_insn);
3744 /* Show we haven't computed an end-of-function label yet. */
3745 function_return_label = function_simple_return_label = NULL_RTX;
3747 /* Initialize the statistics for this function. */
3748 memset (num_insns_needing_delays, 0, sizeof num_insns_needing_delays);
3749 memset (num_filled_delays, 0, sizeof num_filled_delays);
3751 /* Now do the delay slot filling. Try everything twice in case earlier
3752 changes make more slots fillable. */
3754 for (reorg_pass_number = 0;
3755 reorg_pass_number < MAX_REORG_PASSES;
3756 reorg_pass_number++)
3758 fill_simple_delay_slots (1);
3759 fill_simple_delay_slots (0);
3760 fill_eager_delay_slots ();
3761 relax_delay_slots (first);
3764 /* If we made an end of function label, indicate that it is now
3765 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3766 If it is now unused, delete it. */
3767 if (function_return_label && --LABEL_NUSES (function_return_label) == 0)
3768 delete_related_insns (function_return_label);
3769 if (function_simple_return_label
3770 && --LABEL_NUSES (function_simple_return_label) == 0)
3771 delete_related_insns (function_simple_return_label);
3773 need_return_insns = false;
3774 #ifdef HAVE_return
3775 need_return_insns |= HAVE_return && function_return_label != 0;
3776 #endif
3777 #ifdef HAVE_simple_return
3778 need_return_insns |= HAVE_simple_return && function_simple_return_label != 0;
3779 #endif
3780 if (need_return_insns)
3781 make_return_insns (first);
3783 /* Delete any USE insns made by update_block; subsequent passes don't need
3784 them or know how to deal with them. */
3785 for (insn = first; insn; insn = next)
3787 next = NEXT_INSN (insn);
3789 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == USE
3790 && INSN_P (XEXP (PATTERN (insn), 0)))
3791 next = delete_related_insns (insn);
3794 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3796 /* It is not clear why the line below is needed, but it does seem to be. */
3797 unfilled_firstobj = XOBNEWVAR (&unfilled_slots_obstack, rtx, 0);
3799 if (dump_file)
3801 int i, j, need_comma;
3802 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3803 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3805 for (reorg_pass_number = 0;
3806 reorg_pass_number < MAX_REORG_PASSES;
3807 reorg_pass_number++)
3809 fprintf (dump_file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3810 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3812 need_comma = 0;
3813 fprintf (dump_file, ";; Reorg function #%d\n", i);
3815 fprintf (dump_file, ";; %d insns needing delay slots\n;; ",
3816 num_insns_needing_delays[i][reorg_pass_number]);
3818 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3819 if (num_filled_delays[i][j][reorg_pass_number])
3821 if (need_comma)
3822 fprintf (dump_file, ", ");
3823 need_comma = 1;
3824 fprintf (dump_file, "%d got %d delays",
3825 num_filled_delays[i][j][reorg_pass_number], j);
3827 fprintf (dump_file, "\n");
3830 memset (total_delay_slots, 0, sizeof total_delay_slots);
3831 memset (total_annul_slots, 0, sizeof total_annul_slots);
3832 for (insn = first; insn; insn = NEXT_INSN (insn))
3834 if (! INSN_DELETED_P (insn)
3835 && NONJUMP_INSN_P (insn)
3836 && GET_CODE (PATTERN (insn)) != USE
3837 && GET_CODE (PATTERN (insn)) != CLOBBER)
3839 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3841 rtx control;
3842 j = XVECLEN (PATTERN (insn), 0) - 1;
3843 if (j > MAX_DELAY_HISTOGRAM)
3844 j = MAX_DELAY_HISTOGRAM;
3845 control = XVECEXP (PATTERN (insn), 0, 0);
3846 if (JUMP_P (control) && INSN_ANNULLED_BRANCH_P (control))
3847 total_annul_slots[j]++;
3848 else
3849 total_delay_slots[j]++;
3851 else if (num_delay_slots (insn) > 0)
3852 total_delay_slots[0]++;
3855 fprintf (dump_file, ";; Reorg totals: ");
3856 need_comma = 0;
3857 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3859 if (total_delay_slots[j])
3861 if (need_comma)
3862 fprintf (dump_file, ", ");
3863 need_comma = 1;
3864 fprintf (dump_file, "%d got %d delays", total_delay_slots[j], j);
3867 fprintf (dump_file, "\n");
3868 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3869 fprintf (dump_file, ";; Reorg annuls: ");
3870 need_comma = 0;
3871 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3873 if (total_annul_slots[j])
3875 if (need_comma)
3876 fprintf (dump_file, ", ");
3877 need_comma = 1;
3878 fprintf (dump_file, "%d got %d delays", total_annul_slots[j], j);
3881 fprintf (dump_file, "\n");
3882 #endif
3883 fprintf (dump_file, "\n");
3886 free_resource_info ();
3887 free (uid_to_ruid);
3888 crtl->dbr_scheduled_p = true;
3890 #endif /* DELAY_SLOTS */
3892 static bool
3893 gate_handle_delay_slots (void)
3895 #ifdef DELAY_SLOTS
3896 /* At -O0 dataflow info isn't updated after RA. */
3897 return optimize > 0 && flag_delayed_branch && !crtl->dbr_scheduled_p;
3898 #else
3899 return 0;
3900 #endif
3903 /* Run delay slot optimization. */
3904 static unsigned int
3905 rest_of_handle_delay_slots (void)
3907 #ifdef DELAY_SLOTS
3908 dbr_schedule (get_insns ());
3909 #endif
3910 return 0;
3913 struct rtl_opt_pass pass_delay_slots =
3916 RTL_PASS,
3917 "dbr", /* name */
3918 OPTGROUP_NONE, /* optinfo_flags */
3919 gate_handle_delay_slots, /* gate */
3920 rest_of_handle_delay_slots, /* execute */
3921 NULL, /* sub */
3922 NULL, /* next */
3923 0, /* static_pass_number */
3924 TV_DBR_SCHED, /* tv_id */
3925 0, /* properties_required */
3926 0, /* properties_provided */
3927 0, /* properties_destroyed */
3928 0, /* todo_flags_start */
3929 TODO_ggc_collect /* todo_flags_finish */
3933 /* Machine dependent reorg pass. */
3934 static bool
3935 gate_handle_machine_reorg (void)
3937 return targetm.machine_dependent_reorg != 0;
3941 static unsigned int
3942 rest_of_handle_machine_reorg (void)
3944 targetm.machine_dependent_reorg ();
3945 return 0;
3948 struct rtl_opt_pass pass_machine_reorg =
3951 RTL_PASS,
3952 "mach", /* name */
3953 OPTGROUP_NONE, /* optinfo_flags */
3954 gate_handle_machine_reorg, /* gate */
3955 rest_of_handle_machine_reorg, /* execute */
3956 NULL, /* sub */
3957 NULL, /* next */
3958 0, /* static_pass_number */
3959 TV_MACH_DEP, /* tv_id */
3960 0, /* properties_required */
3961 0, /* properties_provided */
3962 0, /* properties_destroyed */
3963 0, /* todo_flags_start */
3964 TODO_ggc_collect /* todo_flags_finish */