1 /* Subroutines used for macro/preprocessor support on the ia-32.
2 Copyright (C) 2008-2018 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3, or (at your option)
11 GCC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #define IN_TARGET_CODE 1
24 #include "coretypes.h"
26 #include "c-family/c-common.h"
29 #include "c-family/c-pragma.h"
31 static bool ix86_pragma_target_parse (tree
, tree
);
32 static void ix86_target_macros_internal
33 (HOST_WIDE_INT
, HOST_WIDE_INT
, enum processor_type
, enum processor_type
, enum fpmath_unit
,
34 void (*def_or_undef
) (cpp_reader
*, const char *));
36 /* Internal function to either define or undef the appropriate system
39 ix86_target_macros_internal (HOST_WIDE_INT isa_flag
,
40 HOST_WIDE_INT isa_flag2
,
41 enum processor_type arch
,
42 enum processor_type tune
,
43 enum fpmath_unit fpmath
,
44 void (*def_or_undef
) (cpp_reader
*,
47 /* For some of the k6/pentium varients there weren't separate ISA bits to
48 identify which tune/arch flag was passed, so figure it out here. */
49 size_t arch_len
= strlen (ix86_arch_string
);
50 size_t tune_len
= strlen (ix86_tune_string
);
51 int last_arch_char
= ix86_arch_string
[arch_len
- 1];
52 int last_tune_char
= ix86_tune_string
[tune_len
- 1];
54 /* Built-ins based on -march=. */
60 def_or_undef (parse_in
, "__i486");
61 def_or_undef (parse_in
, "__i486__");
63 case PROCESSOR_LAKEMONT
:
64 /* Intel MCU is based on Intel Pentium CPU. */
65 case PROCESSOR_PENTIUM
:
66 def_or_undef (parse_in
, "__i586");
67 def_or_undef (parse_in
, "__i586__");
68 def_or_undef (parse_in
, "__pentium");
69 def_or_undef (parse_in
, "__pentium__");
70 if (isa_flag
& OPTION_MASK_ISA_MMX
)
71 def_or_undef (parse_in
, "__pentium_mmx__");
73 case PROCESSOR_PENTIUMPRO
:
74 def_or_undef (parse_in
, "__i686");
75 def_or_undef (parse_in
, "__i686__");
76 def_or_undef (parse_in
, "__pentiumpro");
77 def_or_undef (parse_in
, "__pentiumpro__");
80 def_or_undef (parse_in
, "__geode");
81 def_or_undef (parse_in
, "__geode__");
84 def_or_undef (parse_in
, "__k6");
85 def_or_undef (parse_in
, "__k6__");
86 if (last_arch_char
== '2')
87 def_or_undef (parse_in
, "__k6_2__");
88 else if (last_arch_char
== '3')
89 def_or_undef (parse_in
, "__k6_3__");
90 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
91 def_or_undef (parse_in
, "__k6_3__");
93 case PROCESSOR_ATHLON
:
94 def_or_undef (parse_in
, "__athlon");
95 def_or_undef (parse_in
, "__athlon__");
96 if (isa_flag
& OPTION_MASK_ISA_SSE
)
97 def_or_undef (parse_in
, "__athlon_sse__");
100 def_or_undef (parse_in
, "__k8");
101 def_or_undef (parse_in
, "__k8__");
103 case PROCESSOR_AMDFAM10
:
104 def_or_undef (parse_in
, "__amdfam10");
105 def_or_undef (parse_in
, "__amdfam10__");
107 case PROCESSOR_BDVER1
:
108 def_or_undef (parse_in
, "__bdver1");
109 def_or_undef (parse_in
, "__bdver1__");
111 case PROCESSOR_BDVER2
:
112 def_or_undef (parse_in
, "__bdver2");
113 def_or_undef (parse_in
, "__bdver2__");
115 case PROCESSOR_BDVER3
:
116 def_or_undef (parse_in
, "__bdver3");
117 def_or_undef (parse_in
, "__bdver3__");
119 case PROCESSOR_BDVER4
:
120 def_or_undef (parse_in
, "__bdver4");
121 def_or_undef (parse_in
, "__bdver4__");
123 case PROCESSOR_ZNVER1
:
124 def_or_undef (parse_in
, "__znver1");
125 def_or_undef (parse_in
, "__znver1__");
127 case PROCESSOR_BTVER1
:
128 def_or_undef (parse_in
, "__btver1");
129 def_or_undef (parse_in
, "__btver1__");
131 case PROCESSOR_BTVER2
:
132 def_or_undef (parse_in
, "__btver2");
133 def_or_undef (parse_in
, "__btver2__");
135 case PROCESSOR_PENTIUM4
:
136 def_or_undef (parse_in
, "__pentium4");
137 def_or_undef (parse_in
, "__pentium4__");
139 case PROCESSOR_NOCONA
:
140 def_or_undef (parse_in
, "__nocona");
141 def_or_undef (parse_in
, "__nocona__");
143 case PROCESSOR_CORE2
:
144 def_or_undef (parse_in
, "__core2");
145 def_or_undef (parse_in
, "__core2__");
147 case PROCESSOR_NEHALEM
:
148 def_or_undef (parse_in
, "__corei7");
149 def_or_undef (parse_in
, "__corei7__");
150 def_or_undef (parse_in
, "__nehalem");
151 def_or_undef (parse_in
, "__nehalem__");
153 case PROCESSOR_SANDYBRIDGE
:
154 def_or_undef (parse_in
, "__corei7_avx");
155 def_or_undef (parse_in
, "__corei7_avx__");
156 def_or_undef (parse_in
, "__sandybridge");
157 def_or_undef (parse_in
, "__sandybridge__");
159 case PROCESSOR_HASWELL
:
160 def_or_undef (parse_in
, "__core_avx2");
161 def_or_undef (parse_in
, "__core_avx2__");
162 def_or_undef (parse_in
, "__haswell");
163 def_or_undef (parse_in
, "__haswell__");
165 case PROCESSOR_BONNELL
:
166 def_or_undef (parse_in
, "__atom");
167 def_or_undef (parse_in
, "__atom__");
168 def_or_undef (parse_in
, "__bonnell");
169 def_or_undef (parse_in
, "__bonnell__");
171 case PROCESSOR_SILVERMONT
:
172 def_or_undef (parse_in
, "__slm");
173 def_or_undef (parse_in
, "__slm__");
174 def_or_undef (parse_in
, "__silvermont");
175 def_or_undef (parse_in
, "__silvermont__");
178 def_or_undef (parse_in
, "__knl");
179 def_or_undef (parse_in
, "__knl__");
182 def_or_undef (parse_in
, "__knm");
183 def_or_undef (parse_in
, "__knm__");
185 case PROCESSOR_SKYLAKE_AVX512
:
186 def_or_undef (parse_in
, "__skylake_avx512");
187 def_or_undef (parse_in
, "__skylake_avx512__");
189 case PROCESSOR_CANNONLAKE
:
190 def_or_undef (parse_in
, "__cannonlake");
191 def_or_undef (parse_in
, "__cannonlake__");
193 case PROCESSOR_ICELAKE
:
194 def_or_undef (parse_in
, "__icelake");
195 def_or_undef (parse_in
, "__icelake__");
197 /* use PROCESSOR_max to not set/unset the arch macro. */
200 case PROCESSOR_INTEL
:
201 case PROCESSOR_GENERIC
:
205 /* Built-ins based on -mtune=. */
209 def_or_undef (parse_in
, "__tune_i386__");
212 def_or_undef (parse_in
, "__tune_i486__");
214 case PROCESSOR_PENTIUM
:
215 def_or_undef (parse_in
, "__tune_i586__");
216 def_or_undef (parse_in
, "__tune_pentium__");
217 if (last_tune_char
== 'x')
218 def_or_undef (parse_in
, "__tune_pentium_mmx__");
220 case PROCESSOR_PENTIUMPRO
:
221 def_or_undef (parse_in
, "__tune_i686__");
222 def_or_undef (parse_in
, "__tune_pentiumpro__");
223 switch (last_tune_char
)
226 def_or_undef (parse_in
, "__tune_pentium3__");
229 def_or_undef (parse_in
, "__tune_pentium2__");
233 case PROCESSOR_GEODE
:
234 def_or_undef (parse_in
, "__tune_geode__");
237 def_or_undef (parse_in
, "__tune_k6__");
238 if (last_tune_char
== '2')
239 def_or_undef (parse_in
, "__tune_k6_2__");
240 else if (last_tune_char
== '3')
241 def_or_undef (parse_in
, "__tune_k6_3__");
242 else if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
243 def_or_undef (parse_in
, "__tune_k6_3__");
245 case PROCESSOR_ATHLON
:
246 def_or_undef (parse_in
, "__tune_athlon__");
247 if (isa_flag
& OPTION_MASK_ISA_SSE
)
248 def_or_undef (parse_in
, "__tune_athlon_sse__");
251 def_or_undef (parse_in
, "__tune_k8__");
253 case PROCESSOR_AMDFAM10
:
254 def_or_undef (parse_in
, "__tune_amdfam10__");
256 case PROCESSOR_BDVER1
:
257 def_or_undef (parse_in
, "__tune_bdver1__");
259 case PROCESSOR_BDVER2
:
260 def_or_undef (parse_in
, "__tune_bdver2__");
262 case PROCESSOR_BDVER3
:
263 def_or_undef (parse_in
, "__tune_bdver3__");
265 case PROCESSOR_BDVER4
:
266 def_or_undef (parse_in
, "__tune_bdver4__");
268 case PROCESSOR_ZNVER1
:
269 def_or_undef (parse_in
, "__tune_znver1__");
271 case PROCESSOR_BTVER1
:
272 def_or_undef (parse_in
, "__tune_btver1__");
274 case PROCESSOR_BTVER2
:
275 def_or_undef (parse_in
, "__tune_btver2__");
277 case PROCESSOR_PENTIUM4
:
278 def_or_undef (parse_in
, "__tune_pentium4__");
280 case PROCESSOR_NOCONA
:
281 def_or_undef (parse_in
, "__tune_nocona__");
283 case PROCESSOR_CORE2
:
284 def_or_undef (parse_in
, "__tune_core2__");
286 case PROCESSOR_NEHALEM
:
287 def_or_undef (parse_in
, "__tune_corei7__");
288 def_or_undef (parse_in
, "__tune_nehalem__");
290 case PROCESSOR_SANDYBRIDGE
:
291 def_or_undef (parse_in
, "__tune_corei7_avx__");
292 def_or_undef (parse_in
, "__tune_sandybridge__");
294 case PROCESSOR_HASWELL
:
295 def_or_undef (parse_in
, "__tune_core_avx2__");
296 def_or_undef (parse_in
, "__tune_haswell__");
298 case PROCESSOR_BONNELL
:
299 def_or_undef (parse_in
, "__tune_atom__");
300 def_or_undef (parse_in
, "__tune_bonnell__");
302 case PROCESSOR_SILVERMONT
:
303 def_or_undef (parse_in
, "__tune_slm__");
304 def_or_undef (parse_in
, "__tune_silvermont__");
307 def_or_undef (parse_in
, "__tune_knl__");
310 def_or_undef (parse_in
, "__tune_knm__");
312 case PROCESSOR_SKYLAKE_AVX512
:
313 def_or_undef (parse_in
, "__tune_skylake_avx512__");
315 case PROCESSOR_CANNONLAKE
:
316 def_or_undef (parse_in
, "__tune_cannonlake__");
318 case PROCESSOR_ICELAKE
:
319 def_or_undef (parse_in
, "__tune_icelake__");
321 case PROCESSOR_LAKEMONT
:
322 def_or_undef (parse_in
, "__tune_lakemont__");
324 case PROCESSOR_INTEL
:
325 case PROCESSOR_GENERIC
:
327 /* use PROCESSOR_max to not set/unset the tune macro. */
336 def_or_undef (parse_in
, "__code_model_small__");
340 def_or_undef (parse_in
, "__code_model_medium__");
344 def_or_undef (parse_in
, "__code_model_large__");
347 def_or_undef (parse_in
, "__code_model_32__");
350 def_or_undef (parse_in
, "__code_model_kernel__");
356 if (isa_flag2
& OPTION_MASK_ISA_WBNOINVD
)
357 def_or_undef (parse_in
, "__WBNOINVD__");
358 if (isa_flag
& OPTION_MASK_ISA_MMX
)
359 def_or_undef (parse_in
, "__MMX__");
360 if (isa_flag
& OPTION_MASK_ISA_3DNOW
)
361 def_or_undef (parse_in
, "__3dNOW__");
362 if (isa_flag
& OPTION_MASK_ISA_3DNOW_A
)
363 def_or_undef (parse_in
, "__3dNOW_A__");
364 if (isa_flag
& OPTION_MASK_ISA_SSE
)
365 def_or_undef (parse_in
, "__SSE__");
366 if (isa_flag
& OPTION_MASK_ISA_SSE2
)
367 def_or_undef (parse_in
, "__SSE2__");
368 if (isa_flag
& OPTION_MASK_ISA_SSE3
)
369 def_or_undef (parse_in
, "__SSE3__");
370 if (isa_flag
& OPTION_MASK_ISA_SSSE3
)
371 def_or_undef (parse_in
, "__SSSE3__");
372 if (isa_flag
& OPTION_MASK_ISA_SSE4_1
)
373 def_or_undef (parse_in
, "__SSE4_1__");
374 if (isa_flag
& OPTION_MASK_ISA_SSE4_2
)
375 def_or_undef (parse_in
, "__SSE4_2__");
376 if (isa_flag
& OPTION_MASK_ISA_AES
)
377 def_or_undef (parse_in
, "__AES__");
378 if (isa_flag
& OPTION_MASK_ISA_SHA
)
379 def_or_undef (parse_in
, "__SHA__");
380 if (isa_flag
& OPTION_MASK_ISA_PCLMUL
)
381 def_or_undef (parse_in
, "__PCLMUL__");
382 if (isa_flag
& OPTION_MASK_ISA_AVX
)
383 def_or_undef (parse_in
, "__AVX__");
384 if (isa_flag
& OPTION_MASK_ISA_AVX2
)
385 def_or_undef (parse_in
, "__AVX2__");
386 if (isa_flag
& OPTION_MASK_ISA_AVX512F
)
387 def_or_undef (parse_in
, "__AVX512F__");
388 if (isa_flag
& OPTION_MASK_ISA_AVX512ER
)
389 def_or_undef (parse_in
, "__AVX512ER__");
390 if (isa_flag
& OPTION_MASK_ISA_AVX512CD
)
391 def_or_undef (parse_in
, "__AVX512CD__");
392 if (isa_flag
& OPTION_MASK_ISA_AVX512PF
)
393 def_or_undef (parse_in
, "__AVX512PF__");
394 if (isa_flag
& OPTION_MASK_ISA_AVX512DQ
)
395 def_or_undef (parse_in
, "__AVX512DQ__");
396 if (isa_flag
& OPTION_MASK_ISA_AVX512BW
)
397 def_or_undef (parse_in
, "__AVX512BW__");
398 if (isa_flag
& OPTION_MASK_ISA_AVX512VL
)
399 def_or_undef (parse_in
, "__AVX512VL__");
400 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI
)
401 def_or_undef (parse_in
, "__AVX512VBMI__");
402 if (isa_flag
& OPTION_MASK_ISA_AVX512IFMA
)
403 def_or_undef (parse_in
, "__AVX512IFMA__");
404 if (isa_flag2
& OPTION_MASK_ISA_AVX5124VNNIW
)
405 def_or_undef (parse_in
, "__AVX5124VNNIW__");
406 if (isa_flag
& OPTION_MASK_ISA_AVX512VBMI2
)
407 def_or_undef (parse_in
, "__AVX512VBMI2__");
408 if (isa_flag
& OPTION_MASK_ISA_AVX512VNNI
)
409 def_or_undef (parse_in
, "__AVX512VNNI__");
410 if (isa_flag2
& OPTION_MASK_ISA_PCONFIG
)
411 def_or_undef (parse_in
, "__PCONFIG__");
412 if (isa_flag2
& OPTION_MASK_ISA_SGX
)
413 def_or_undef (parse_in
, "__SGX__");
414 if (isa_flag2
& OPTION_MASK_ISA_AVX5124FMAPS
)
415 def_or_undef (parse_in
, "__AVX5124FMAPS__");
416 if (isa_flag
& OPTION_MASK_ISA_AVX512BITALG
)
417 def_or_undef (parse_in
, "__AVX512BITALG__");
418 if (isa_flag
& OPTION_MASK_ISA_AVX512VPOPCNTDQ
)
419 def_or_undef (parse_in
, "__AVX512VPOPCNTDQ__");
420 if (isa_flag
& OPTION_MASK_ISA_FMA
)
421 def_or_undef (parse_in
, "__FMA__");
422 if (isa_flag
& OPTION_MASK_ISA_RTM
)
423 def_or_undef (parse_in
, "__RTM__");
424 if (isa_flag
& OPTION_MASK_ISA_SSE4A
)
425 def_or_undef (parse_in
, "__SSE4A__");
426 if (isa_flag
& OPTION_MASK_ISA_FMA4
)
427 def_or_undef (parse_in
, "__FMA4__");
428 if (isa_flag
& OPTION_MASK_ISA_XOP
)
429 def_or_undef (parse_in
, "__XOP__");
430 if (isa_flag
& OPTION_MASK_ISA_LWP
)
431 def_or_undef (parse_in
, "__LWP__");
432 if (isa_flag
& OPTION_MASK_ISA_ABM
)
433 def_or_undef (parse_in
, "__ABM__");
434 if (isa_flag
& OPTION_MASK_ISA_BMI
)
435 def_or_undef (parse_in
, "__BMI__");
436 if (isa_flag
& OPTION_MASK_ISA_BMI2
)
437 def_or_undef (parse_in
, "__BMI2__");
438 if (isa_flag
& OPTION_MASK_ISA_LZCNT
)
439 def_or_undef (parse_in
, "__LZCNT__");
440 if (isa_flag
& OPTION_MASK_ISA_TBM
)
441 def_or_undef (parse_in
, "__TBM__");
442 if (isa_flag
& OPTION_MASK_ISA_POPCNT
)
443 def_or_undef (parse_in
, "__POPCNT__");
444 if (isa_flag
& OPTION_MASK_ISA_FSGSBASE
)
445 def_or_undef (parse_in
, "__FSGSBASE__");
446 if (isa_flag
& OPTION_MASK_ISA_RDRND
)
447 def_or_undef (parse_in
, "__RDRND__");
448 if (isa_flag
& OPTION_MASK_ISA_F16C
)
449 def_or_undef (parse_in
, "__F16C__");
450 if (isa_flag
& OPTION_MASK_ISA_RDSEED
)
451 def_or_undef (parse_in
, "__RDSEED__");
452 if (isa_flag
& OPTION_MASK_ISA_PRFCHW
)
453 def_or_undef (parse_in
, "__PRFCHW__");
454 if (isa_flag
& OPTION_MASK_ISA_ADX
)
455 def_or_undef (parse_in
, "__ADX__");
456 if (isa_flag
& OPTION_MASK_ISA_FXSR
)
457 def_or_undef (parse_in
, "__FXSR__");
458 if (isa_flag
& OPTION_MASK_ISA_XSAVE
)
459 def_or_undef (parse_in
, "__XSAVE__");
460 if (isa_flag
& OPTION_MASK_ISA_XSAVEOPT
)
461 def_or_undef (parse_in
, "__XSAVEOPT__");
462 if (isa_flag
& OPTION_MASK_ISA_PREFETCHWT1
)
463 def_or_undef (parse_in
, "__PREFETCHWT1__");
464 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE
))
465 def_or_undef (parse_in
, "__SSE_MATH__");
466 if ((fpmath
& FPMATH_SSE
) && (isa_flag
& OPTION_MASK_ISA_SSE2
))
467 def_or_undef (parse_in
, "__SSE2_MATH__");
468 if (isa_flag
& OPTION_MASK_ISA_CLFLUSHOPT
)
469 def_or_undef (parse_in
, "__CLFLUSHOPT__");
470 if (isa_flag2
& OPTION_MASK_ISA_CLZERO
)
471 def_or_undef (parse_in
, "__CLZERO__");
472 if (isa_flag
& OPTION_MASK_ISA_XSAVEC
)
473 def_or_undef (parse_in
, "__XSAVEC__");
474 if (isa_flag
& OPTION_MASK_ISA_XSAVES
)
475 def_or_undef (parse_in
, "__XSAVES__");
476 if (isa_flag2
& OPTION_MASK_ISA_MPX
)
477 def_or_undef (parse_in
, "__MPX__");
478 if (isa_flag
& OPTION_MASK_ISA_CLWB
)
479 def_or_undef (parse_in
, "__CLWB__");
480 if (isa_flag2
& OPTION_MASK_ISA_MWAITX
)
481 def_or_undef (parse_in
, "__MWAITX__");
482 if (isa_flag
& OPTION_MASK_ISA_PKU
)
483 def_or_undef (parse_in
, "__PKU__");
484 if (isa_flag2
& OPTION_MASK_ISA_RDPID
)
485 def_or_undef (parse_in
, "__RDPID__");
486 if (isa_flag
& OPTION_MASK_ISA_GFNI
)
487 def_or_undef (parse_in
, "__GFNI__");
488 if (isa_flag2
& OPTION_MASK_ISA_IBT
)
490 def_or_undef (parse_in
, "__IBT__");
491 if (flag_cf_protection
!= CF_NONE
)
492 def_or_undef (parse_in
, "__CET__");
494 if (isa_flag
& OPTION_MASK_ISA_SHSTK
)
496 def_or_undef (parse_in
, "__SHSTK__");
497 if (flag_cf_protection
!= CF_NONE
)
498 def_or_undef (parse_in
, "__CET__");
500 if (isa_flag2
& OPTION_MASK_ISA_VAES
)
501 def_or_undef (parse_in
, "__VAES__");
502 if (isa_flag
& OPTION_MASK_ISA_VPCLMULQDQ
)
503 def_or_undef (parse_in
, "__VPCLMULQDQ__");
506 def_or_undef (parse_in
, "__iamcu");
507 def_or_undef (parse_in
, "__iamcu__");
512 /* Hook to validate the current #pragma GCC target and set the state, and
513 update the macros based on what was changed. If ARGS is NULL, then
514 POP_TARGET is used to reset the options. */
517 ix86_pragma_target_parse (tree args
, tree pop_target
)
519 tree prev_tree
= build_target_option_node (&global_options
);
521 struct cl_target_option
*prev_opt
;
522 struct cl_target_option
*cur_opt
;
523 HOST_WIDE_INT prev_isa
;
524 HOST_WIDE_INT cur_isa
;
525 HOST_WIDE_INT diff_isa
;
526 HOST_WIDE_INT prev_isa2
;
527 HOST_WIDE_INT cur_isa2
;
528 HOST_WIDE_INT diff_isa2
;
529 enum processor_type prev_arch
;
530 enum processor_type prev_tune
;
531 enum processor_type cur_arch
;
532 enum processor_type cur_tune
;
536 cur_tree
= (pop_target
? pop_target
: target_option_default_node
);
537 cl_target_option_restore (&global_options
,
538 TREE_TARGET_OPTION (cur_tree
));
542 cur_tree
= ix86_valid_target_attribute_tree (args
, &global_options
,
543 &global_options_set
);
544 if (!cur_tree
|| cur_tree
== error_mark_node
)
546 cl_target_option_restore (&global_options
,
547 TREE_TARGET_OPTION (prev_tree
));
552 target_option_current_node
= cur_tree
;
553 ix86_reset_previous_fndecl ();
555 /* Figure out the previous/current isa, arch, tune and the differences. */
556 prev_opt
= TREE_TARGET_OPTION (prev_tree
);
557 cur_opt
= TREE_TARGET_OPTION (cur_tree
);
558 prev_isa
= prev_opt
->x_ix86_isa_flags
;
559 cur_isa
= cur_opt
->x_ix86_isa_flags
;
560 diff_isa
= (prev_isa
^ cur_isa
);
561 prev_isa2
= prev_opt
->x_ix86_isa_flags2
;
562 cur_isa2
= cur_opt
->x_ix86_isa_flags2
;
563 diff_isa2
= (prev_isa2
^ cur_isa2
);
564 prev_arch
= (enum processor_type
) prev_opt
->arch
;
565 prev_tune
= (enum processor_type
) prev_opt
->tune
;
566 cur_arch
= (enum processor_type
) cur_opt
->arch
;
567 cur_tune
= (enum processor_type
) cur_opt
->tune
;
569 /* If the same processor is used for both previous and current options, don't
570 change the macros. */
571 if (cur_arch
== prev_arch
)
572 cur_arch
= prev_arch
= PROCESSOR_max
;
574 if (cur_tune
== prev_tune
)
575 cur_tune
= prev_tune
= PROCESSOR_max
;
577 /* Undef all of the macros for that are no longer current. */
578 ix86_target_macros_internal (prev_isa
& diff_isa
,
579 prev_isa2
& diff_isa2
,
582 (enum fpmath_unit
) prev_opt
->x_ix86_fpmath
,
585 /* For the definitions, ensure all newly defined macros are considered
586 as used for -Wunused-macros. There is no point warning about the
587 compiler predefined macros. */
588 cpp_options
*cpp_opts
= cpp_get_options (parse_in
);
589 unsigned char saved_warn_unused_macros
= cpp_opts
->warn_unused_macros
;
590 cpp_opts
->warn_unused_macros
= 0;
592 /* Define all of the macros for new options that were just turned on. */
593 ix86_target_macros_internal (cur_isa
& diff_isa
,
594 cur_isa2
& diff_isa2
,
597 (enum fpmath_unit
) cur_opt
->x_ix86_fpmath
,
600 cpp_opts
->warn_unused_macros
= saved_warn_unused_macros
;
605 /* Function to tell the preprocessor about the defines for the current target. */
608 ix86_target_macros (void)
610 /* 32/64-bit won't change with target specific options, so do the assert and
611 builtin_define_std calls here. */
614 cpp_assert (parse_in
, "cpu=x86_64");
615 cpp_assert (parse_in
, "machine=x86_64");
616 cpp_define (parse_in
, "__amd64");
617 cpp_define (parse_in
, "__amd64__");
618 cpp_define (parse_in
, "__x86_64");
619 cpp_define (parse_in
, "__x86_64__");
622 cpp_define (parse_in
, "_ILP32");
623 cpp_define (parse_in
, "__ILP32__");
628 cpp_assert (parse_in
, "cpu=i386");
629 cpp_assert (parse_in
, "machine=i386");
630 builtin_define_std ("i386");
634 cpp_define (parse_in
, "_SOFT_FLOAT");
636 if (TARGET_LONG_DOUBLE_64
)
637 cpp_define (parse_in
, "__LONG_DOUBLE_64__");
639 if (TARGET_LONG_DOUBLE_128
)
640 cpp_define (parse_in
, "__LONG_DOUBLE_128__");
642 if (TARGET_128BIT_LONG_DOUBLE
)
643 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=16");
645 cpp_define (parse_in
, "__SIZEOF_FLOAT80__=12");
647 cpp_define (parse_in
, "__SIZEOF_FLOAT128__=16");
649 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_ACQUIRE=%d", IX86_HLE_ACQUIRE
);
650 cpp_define_formatted (parse_in
, "__ATOMIC_HLE_RELEASE=%d", IX86_HLE_RELEASE
);
652 cpp_define (parse_in
, "__GCC_ASM_FLAG_OUTPUTS__");
654 ix86_target_macros_internal (ix86_isa_flags
,
661 cpp_define (parse_in
, "__SEG_FS");
662 cpp_define (parse_in
, "__SEG_GS");
666 /* Register target pragmas. We need to add the hook for parsing #pragma GCC
667 option here rather than in i386.c since it will pull in various preprocessor
668 functions, and those are not present in languages like fortran without a
672 ix86_register_pragmas (void)
674 /* Update pragma hook to allow parsing #pragma GCC target. */
675 targetm
.target_option
.pragma_parse
= ix86_pragma_target_parse
;
677 c_register_addr_space ("__seg_fs", ADDR_SPACE_SEG_FS
);
678 c_register_addr_space ("__seg_gs", ADDR_SPACE_SEG_GS
);
680 #ifdef REGISTER_SUBTARGET_PRAGMAS
681 REGISTER_SUBTARGET_PRAGMAS ();