1 /* Generate code from machine description to emit insns as rtl.
2 Copyright (C) 1987, 1988, 1991, 1994, 1995, 1997, 1998, 1999, 2000
3 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
27 #include "gensupport.h"
31 static int max_dup_opno
;
32 static int max_scratch_opno
;
33 static int register_constraints
;
34 static int insn_code_number
;
35 static int insn_index_number
;
37 /* Data structure for recording the patterns of insns that have CLOBBERs.
38 We use this to output a function that adds these CLOBBERs to a
39 previously-allocated PARALLEL expression. */
43 struct clobber_ent
*insns
;
46 struct clobber_pat
*next
;
49 /* Records one insn that uses the clobber list. */
53 int code_number
; /* Counts only insns. */
54 struct clobber_ent
*next
;
57 static void max_operand_1
PARAMS ((rtx
));
58 static int max_operand_vec
PARAMS ((rtx
, int));
59 static void print_code
PARAMS ((RTX_CODE
));
60 static void gen_exp
PARAMS ((rtx
, enum rtx_code
));
61 static void gen_insn
PARAMS ((rtx
));
62 static void gen_expand
PARAMS ((rtx
));
63 static void gen_split
PARAMS ((rtx
));
64 static void output_add_clobbers
PARAMS ((void));
65 static void gen_rtx_scratch
PARAMS ((rtx
, enum rtx_code
));
66 static void output_peephole2_scratches
PARAMS ((rtx
));
73 register RTX_CODE code
;
76 register const char *fmt
;
83 if (code
== MATCH_OPERAND
&& XSTR (x
, 2) != 0 && *XSTR (x
, 2) != '\0')
84 register_constraints
= 1;
85 if (code
== MATCH_SCRATCH
&& XSTR (x
, 1) != 0 && *XSTR (x
, 1) != '\0')
86 register_constraints
= 1;
87 if (code
== MATCH_OPERAND
|| code
== MATCH_OPERATOR
88 || code
== MATCH_PARALLEL
)
89 max_opno
= MAX (max_opno
, XINT (x
, 0));
90 if (code
== MATCH_DUP
|| code
== MATCH_OP_DUP
|| code
== MATCH_PAR_DUP
)
91 max_dup_opno
= MAX (max_dup_opno
, XINT (x
, 0));
92 if (code
== MATCH_SCRATCH
)
93 max_scratch_opno
= MAX (max_scratch_opno
, XINT (x
, 0));
95 fmt
= GET_RTX_FORMAT (code
);
96 len
= GET_RTX_LENGTH (code
);
97 for (i
= 0; i
< len
; i
++)
99 if (fmt
[i
] == 'e' || fmt
[i
] == 'u')
100 max_operand_1 (XEXP (x
, i
));
101 else if (fmt
[i
] == 'E')
104 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
105 max_operand_1 (XVECEXP (x
, i
, j
));
111 max_operand_vec (insn
, arg
)
115 register int len
= XVECLEN (insn
, arg
);
120 max_scratch_opno
= -1;
122 for (i
= 0; i
< len
; i
++)
123 max_operand_1 (XVECEXP (insn
, arg
, i
));
132 register const char *p1
;
133 for (p1
= GET_RTX_NAME (code
); *p1
; p1
++)
134 putchar (TOUPPER(*p1
));
138 gen_rtx_scratch (x
, subroutine_type
)
140 enum rtx_code subroutine_type
;
142 if (subroutine_type
== DEFINE_PEEPHOLE2
)
144 printf ("operand%d", XINT (x
, 0));
148 printf ("gen_rtx_SCRATCH (%smode)", GET_MODE_NAME (GET_MODE (x
)));
152 /* Print a C expression to construct an RTX just like X,
153 substituting any operand references appearing within. */
156 gen_exp (x
, subroutine_type
)
158 enum rtx_code subroutine_type
;
160 register RTX_CODE code
;
163 register const char *fmt
;
177 printf ("operand%d", XINT (x
, 0));
181 printf ("gen_rtx (GET_CODE (operand%d), ", XINT (x
, 0));
182 if (GET_MODE (x
) == VOIDmode
)
183 printf ("GET_MODE (operand%d)", XINT (x
, 0));
185 printf ("%smode", GET_MODE_NAME (GET_MODE (x
)));
186 for (i
= 0; i
< XVECLEN (x
, 1); i
++)
189 gen_exp (XVECEXP (x
, 1, i
), subroutine_type
);
195 printf ("gen_rtx (GET_CODE (operand%d)", XINT (x
, 0));
196 printf (", %smode", GET_MODE_NAME (GET_MODE (x
)));
197 for (i
= 0; i
< XVECLEN (x
, 2); i
++)
200 gen_exp (XVECEXP (x
, 2, i
), subroutine_type
);
207 printf ("operand%d", XINT (x
, 0));
211 gen_rtx_scratch (x
, subroutine_type
);
215 fatal ("ADDRESS expression code used in named instruction pattern");
227 printf ("const0_rtx");
228 else if (INTVAL (x
) == 1)
229 printf ("const1_rtx");
230 else if (INTVAL (x
) == -1)
231 printf ("constm1_rtx");
232 else if (INTVAL (x
) == STORE_FLAG_VALUE
)
233 printf ("const_true_rtx");
236 printf ("GEN_INT (");
237 printf (HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
243 /* These shouldn't be written in MD files. Instead, the appropriate
244 routines in varasm.c should be called. */
253 printf (" (%smode", GET_MODE_NAME (GET_MODE (x
)));
255 fmt
= GET_RTX_FORMAT (code
);
256 len
= GET_RTX_LENGTH (code
);
257 for (i
= 0; i
< len
; i
++)
262 if (fmt
[i
] == 'e' || fmt
[i
] == 'u')
263 gen_exp (XEXP (x
, i
), subroutine_type
);
264 else if (fmt
[i
] == 'i')
265 printf ("%u", XINT (x
, i
));
266 else if (fmt
[i
] == 's')
267 printf ("\"%s\"", XSTR (x
, i
));
268 else if (fmt
[i
] == 'E')
271 printf ("gen_rtvec (%d", XVECLEN (x
, i
));
272 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
275 gen_exp (XVECEXP (x
, i
, j
), subroutine_type
);
285 /* Generate the `gen_...' function for a DEFINE_INSN. */
294 /* See if the pattern for this insn ends with a group of CLOBBERs of (hard)
295 registers or MATCH_SCRATCHes. If so, store away the information for
300 for (i
= XVECLEN (insn
, 1) - 1; i
> 0; i
--)
301 if (GET_CODE (XVECEXP (insn
, 1, i
)) != CLOBBER
302 || (GET_CODE (XEXP (XVECEXP (insn
, 1, i
), 0)) != REG
303 && GET_CODE (XEXP (XVECEXP (insn
, 1, i
), 0)) != MATCH_SCRATCH
))
306 if (i
!= XVECLEN (insn
, 1) - 1)
308 register struct clobber_pat
*p
;
309 register struct clobber_ent
*link
310 = (struct clobber_ent
*) xmalloc (sizeof (struct clobber_ent
));
313 link
->code_number
= insn_code_number
;
315 /* See if any previous CLOBBER_LIST entry is the same as this
318 for (p
= clobber_list
; p
; p
= p
->next
)
320 if (p
->first_clobber
!= i
+ 1
321 || XVECLEN (p
->pattern
, 1) != XVECLEN (insn
, 1))
324 for (j
= i
+ 1; j
< XVECLEN (insn
, 1); j
++)
326 rtx old
= XEXP (XVECEXP (p
->pattern
, 1, j
), 0);
327 rtx
new = XEXP (XVECEXP (insn
, 1, j
), 0);
329 /* OLD and NEW are the same if both are to be a SCRATCH
331 or if both are registers of the same mode and number. */
332 if (! (GET_MODE (old
) == GET_MODE (new)
333 && ((GET_CODE (old
) == MATCH_SCRATCH
334 && GET_CODE (new) == MATCH_SCRATCH
)
335 || (GET_CODE (old
) == REG
&& GET_CODE (new) == REG
336 && REGNO (old
) == REGNO (new)))))
340 if (j
== XVECLEN (insn
, 1))
346 p
= (struct clobber_pat
*) xmalloc (sizeof (struct clobber_pat
));
350 p
->first_clobber
= i
+ 1;
351 p
->next
= clobber_list
;
355 link
->next
= p
->insns
;
360 /* Don't mention instructions whose names are the null string
361 or begin with '*'. They are in the machine description just
363 if (XSTR (insn
, 0)[0] == 0 || XSTR (insn
, 0)[0] == '*')
366 /* Find out how many operands this function has,
367 and also whether any of them have register constraints. */
368 register_constraints
= 0;
369 operands
= max_operand_vec (insn
, 1);
370 if (max_dup_opno
>= operands
)
371 fatal ("match_dup operand number has no match_operand");
373 /* Output the function name and argument declarations. */
374 printf ("rtx\ngen_%s (", XSTR (insn
, 0));
375 for (i
= 0; i
< operands
; i
++)
377 printf (", operand%d", i
);
379 printf ("operand%d", i
);
381 for (i
= 0; i
< operands
; i
++)
382 printf (" rtx operand%d;\n", i
);
385 /* Output code to construct and return the rtl for the instruction body */
387 if (XVECLEN (insn
, 1) == 1)
390 gen_exp (XVECEXP (insn
, 1, 0), DEFINE_INSN
);
395 printf (" return gen_rtx_PARALLEL (VOIDmode, gen_rtvec (%d",
398 for (i
= 0; i
< XVECLEN (insn
, 1); i
++)
401 gen_exp (XVECEXP (insn
, 1, i
), DEFINE_INSN
);
403 printf ("));\n}\n\n");
407 /* Generate the `gen_...' function for a DEFINE_EXPAND. */
416 if (strlen (XSTR (expand
, 0)) == 0)
417 fatal ("define_expand lacks a name");
418 if (XVEC (expand
, 1) == 0)
419 fatal ("define_expand for %s lacks a pattern", XSTR (expand
, 0));
421 /* Find out how many operands this function has,
422 and also whether any of them have register constraints. */
423 register_constraints
= 0;
425 operands
= max_operand_vec (expand
, 1);
427 /* Output the function name and argument declarations. */
428 printf ("rtx\ngen_%s (", XSTR (expand
, 0));
429 for (i
= 0; i
< operands
; i
++)
431 printf (", operand%d", i
);
433 printf ("operand%d", i
);
435 for (i
= 0; i
< operands
; i
++)
436 printf (" rtx operand%d;\n", i
);
439 /* If we don't have any C code to write, only one insn is being written,
440 and no MATCH_DUPs are present, we can just return the desired insn
441 like we do for a DEFINE_INSN. This saves memory. */
442 if ((XSTR (expand
, 3) == 0 || *XSTR (expand
, 3) == '\0')
443 && operands
> max_dup_opno
444 && XVECLEN (expand
, 1) == 1)
447 gen_exp (XVECEXP (expand
, 1, 0), DEFINE_EXPAND
);
452 /* For each operand referred to only with MATCH_DUPs,
453 make a local variable. */
454 for (i
= operands
; i
<= max_dup_opno
; i
++)
455 printf (" rtx operand%d;\n", i
);
456 for (; i
<= max_scratch_opno
; i
++)
457 printf (" rtx operand%d;\n", i
);
458 printf (" rtx _val = 0;\n");
459 printf (" start_sequence ();\n");
461 /* The fourth operand of DEFINE_EXPAND is some code to be executed
462 before the actual construction.
463 This code expects to refer to `operands'
464 just as the output-code in a DEFINE_INSN does,
465 but here `operands' is an automatic array.
466 So copy the operand values there before executing it. */
467 if (XSTR (expand
, 3) && *XSTR (expand
, 3))
470 if (operands
> 0 || max_dup_opno
>= 0 || max_scratch_opno
>= 0)
471 printf (" rtx operands[%d];\n",
472 MAX (operands
, MAX (max_scratch_opno
, max_dup_opno
) + 1));
473 /* Output code to copy the arguments into `operands'. */
474 for (i
= 0; i
< operands
; i
++)
475 printf (" operands[%d] = operand%d;\n", i
, i
);
477 /* Output the special code to be executed before the sequence
479 printf ("%s\n", XSTR (expand
, 3));
481 /* Output code to copy the arguments back out of `operands'
482 (unless we aren't going to use them at all). */
483 if (XVEC (expand
, 1) != 0)
485 for (i
= 0; i
< operands
; i
++)
486 printf (" operand%d = operands[%d];\n", i
, i
);
487 for (; i
<= max_dup_opno
; i
++)
488 printf (" operand%d = operands[%d];\n", i
, i
);
489 for (; i
<= max_scratch_opno
; i
++)
490 printf (" operand%d = operands[%d];\n", i
, i
);
495 /* Output code to construct the rtl for the instruction bodies.
496 Use emit_insn to add them to the sequence being accumulated.
497 But don't do this if the user's code has set `no_more' nonzero. */
499 for (i
= 0; i
< XVECLEN (expand
, 1); i
++)
501 rtx next
= XVECEXP (expand
, 1, i
);
502 if ((GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
)
503 || (GET_CODE (next
) == PARALLEL
504 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
505 && GET_CODE (SET_DEST (XVECEXP (next
, 0, 0))) == PC
)
506 || GET_CODE (next
) == RETURN
)
507 printf (" emit_jump_insn (");
508 else if ((GET_CODE (next
) == SET
&& GET_CODE (SET_SRC (next
)) == CALL
)
509 || GET_CODE (next
) == CALL
510 || (GET_CODE (next
) == PARALLEL
511 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
512 && GET_CODE (SET_SRC (XVECEXP (next
, 0, 0))) == CALL
)
513 || (GET_CODE (next
) == PARALLEL
514 && GET_CODE (XVECEXP (next
, 0, 0)) == CALL
))
515 printf (" emit_call_insn (");
516 else if (GET_CODE (next
) == CODE_LABEL
)
517 printf (" emit_label (");
518 else if (GET_CODE (next
) == MATCH_OPERAND
519 || GET_CODE (next
) == MATCH_DUP
520 || GET_CODE (next
) == MATCH_OPERATOR
521 || GET_CODE (next
) == MATCH_OP_DUP
522 || GET_CODE (next
) == MATCH_PARALLEL
523 || GET_CODE (next
) == MATCH_PAR_DUP
524 || GET_CODE (next
) == PARALLEL
)
527 printf (" emit_insn (");
528 gen_exp (next
, DEFINE_EXPAND
);
530 if (GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
531 && GET_CODE (SET_SRC (next
)) == LABEL_REF
)
532 printf (" emit_barrier ();");
535 /* Call `gen_sequence' to make a SEQUENCE out of all the
536 insns emitted within this gen_... function. */
538 printf (" _val = gen_sequence ();\n");
539 printf (" end_sequence ();\n");
540 printf (" return _val;\n}\n\n");
543 /* Like gen_expand, but generates a SEQUENCE. */
551 const char *name
= "split";
553 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
556 if (XVEC (split
, 0) == 0)
557 fatal ("define_%s (definition %d) lacks a pattern", name
,
559 else if (XVEC (split
, 2) == 0)
560 fatal ("define_%s (definition %d) lacks a replacement pattern", name
,
563 /* Find out how many operands this function has. */
565 max_operand_vec (split
, 2);
566 operands
= MAX (max_opno
, MAX (max_dup_opno
, max_scratch_opno
)) + 1;
568 /* Output the prototype, function name and argument declarations. */
569 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
571 printf ("extern rtx gen_%s_%d PARAMS ((rtx, rtx *));\n",
572 name
, insn_code_number
);
573 printf ("rtx\ngen_%s_%d (curr_insn, operands)\n\
574 rtx curr_insn ATTRIBUTE_UNUSED;\n\
576 name
, insn_code_number
);
580 printf ("extern rtx gen_split_%d PARAMS ((rtx *));\n", insn_code_number
);
581 printf ("rtx\ngen_%s_%d (operands)\n rtx *operands;\n", name
,
586 /* Declare all local variables. */
587 for (i
= 0; i
< operands
; i
++)
588 printf (" rtx operand%d;\n", i
);
589 printf (" rtx _val = 0;\n");
591 if (GET_CODE (split
) == DEFINE_PEEPHOLE2
)
592 output_peephole2_scratches (split
);
594 printf (" start_sequence ();\n");
596 /* The fourth operand of DEFINE_SPLIT is some code to be executed
597 before the actual construction. */
600 printf ("%s\n", XSTR (split
, 3));
602 /* Output code to copy the arguments back out of `operands' */
603 for (i
= 0; i
< operands
; i
++)
604 printf (" operand%d = operands[%d];\n", i
, i
);
606 /* Output code to construct the rtl for the instruction bodies.
607 Use emit_insn to add them to the sequence being accumulated.
608 But don't do this if the user's code has set `no_more' nonzero. */
610 for (i
= 0; i
< XVECLEN (split
, 2); i
++)
612 rtx next
= XVECEXP (split
, 2, i
);
613 if ((GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
)
614 || (GET_CODE (next
) == PARALLEL
615 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
616 && GET_CODE (SET_DEST (XVECEXP (next
, 0, 0))) == PC
)
617 || GET_CODE (next
) == RETURN
)
618 printf (" emit_jump_insn (");
619 else if ((GET_CODE (next
) == SET
&& GET_CODE (SET_SRC (next
)) == CALL
)
620 || GET_CODE (next
) == CALL
621 || (GET_CODE (next
) == PARALLEL
622 && GET_CODE (XVECEXP (next
, 0, 0)) == SET
623 && GET_CODE (SET_SRC (XVECEXP (next
, 0, 0))) == CALL
)
624 || (GET_CODE (next
) == PARALLEL
625 && GET_CODE (XVECEXP (next
, 0, 0)) == CALL
))
626 printf (" emit_call_insn (");
627 else if (GET_CODE (next
) == CODE_LABEL
)
628 printf (" emit_label (");
629 else if (GET_CODE (next
) == MATCH_OPERAND
630 || GET_CODE (next
) == MATCH_OPERATOR
631 || GET_CODE (next
) == MATCH_PARALLEL
632 || GET_CODE (next
) == MATCH_OP_DUP
633 || GET_CODE (next
) == MATCH_DUP
634 || GET_CODE (next
) == PARALLEL
)
637 printf (" emit_insn (");
638 gen_exp (next
, GET_CODE (split
));
640 if (GET_CODE (next
) == SET
&& GET_CODE (SET_DEST (next
)) == PC
641 && GET_CODE (SET_SRC (next
)) == LABEL_REF
)
642 printf (" emit_barrier ();");
645 /* Call `gen_sequence' to make a SEQUENCE out of all the
646 insns emitted within this gen_... function. */
648 printf (" _val = gen_sequence ();\n");
649 printf (" end_sequence ();\n");
650 printf (" return _val;\n}\n\n");
653 /* Write a function, `add_clobbers', that is given a PARALLEL of sufficient
654 size for the insn and an INSN_CODE, and inserts the required CLOBBERs at
655 the end of the vector. */
658 output_add_clobbers ()
660 struct clobber_pat
*clobber
;
661 struct clobber_ent
*ent
;
664 printf ("\n\nvoid\nadd_clobbers (pattern, insn_code_number)\n");
665 printf (" rtx pattern;\n int insn_code_number;\n");
667 printf (" switch (insn_code_number)\n");
670 for (clobber
= clobber_list
; clobber
; clobber
= clobber
->next
)
672 for (ent
= clobber
->insns
; ent
; ent
= ent
->next
)
673 printf (" case %d:\n", ent
->code_number
);
675 for (i
= clobber
->first_clobber
; i
< XVECLEN (clobber
->pattern
, 1); i
++)
677 printf (" XVECEXP (pattern, 0, %d) = ", i
);
678 gen_exp (XVECEXP (clobber
->pattern
, 1, i
),
679 GET_CODE (clobber
->pattern
));
683 printf (" break;\n\n");
686 printf (" default:\n");
687 printf (" abort ();\n");
692 /* Generate code to invoke find_free_register () as needed for the
693 scratch registers used by the peephole2 pattern in SPLIT. */
696 output_peephole2_scratches (split
)
702 printf (" HARD_REG_SET _regs_allocated;\n");
703 printf (" CLEAR_HARD_REG_SET (_regs_allocated);\n");
705 for (i
= 0; i
< XVECLEN (split
, 0); i
++)
707 rtx elt
= XVECEXP (split
, 0, i
);
708 if (GET_CODE (elt
) == MATCH_SCRATCH
)
710 int last_insn_nr
= insn_nr
;
711 int cur_insn_nr
= insn_nr
;
713 for (j
= i
+ 1; j
< XVECLEN (split
, 0); j
++)
714 if (GET_CODE (XVECEXP (split
, 0, j
)) == MATCH_DUP
)
716 if (XINT (XVECEXP (split
, 0, j
), 0) == XINT (elt
, 0))
717 last_insn_nr
= cur_insn_nr
;
719 else if (GET_CODE (XVECEXP (split
, 0, j
)) != MATCH_SCRATCH
)
722 printf (" if ((operands[%d] = peep2_find_free_register (%d, %d, \"%s\", %smode, &_regs_allocated)) == NULL_RTX)\n\
725 insn_nr
, last_insn_nr
,
727 GET_MODE_NAME (GET_MODE (elt
)));
730 else if (GET_CODE (elt
) != MATCH_DUP
)
735 extern int main
PARAMS ((int, char **));
744 progname
= "genemit";
747 fatal ("No input file name.");
749 if (init_md_reader (argv
[1]) != SUCCESS_EXIT_CODE
)
750 return (FATAL_EXIT_CODE
);
752 /* Assign sequential codes to all entries in the machine description
753 in parallel with the tables in insn-output.c. */
755 insn_code_number
= 0;
756 insn_index_number
= 0;
758 printf ("/* Generated automatically by the program `genemit'\n\
759 from the machine description file `md'. */\n\n");
761 printf ("#include \"config.h\"\n");
762 printf ("#include \"system.h\"\n");
763 printf ("#include \"rtl.h\"\n");
764 printf ("#include \"tm_p.h\"\n");
765 printf ("#include \"function.h\"\n");
766 printf ("#include \"expr.h\"\n");
767 printf ("#include \"real.h\"\n");
768 printf ("#include \"flags.h\"\n");
769 printf ("#include \"output.h\"\n");
770 printf ("#include \"insn-config.h\"\n");
771 printf ("#include \"insn-flags.h\"\n");
772 printf ("#include \"insn-codes.h\"\n");
773 printf ("#include \"hard-reg-set.h\"\n");
774 printf ("#include \"recog.h\"\n");
775 printf ("#include \"resource.h\"\n");
776 printf ("#include \"reload.h\"\n");
777 printf ("#include \"ggc.h\"\n\n");
778 printf ("#define FAIL return (end_sequence (), _val)\n");
779 printf ("#define DONE return (_val = gen_sequence (), end_sequence (), _val)\n");
781 /* Read the machine description. */
787 desc
= read_md_rtx (&line_no
, &insn_code_number
);
791 switch (GET_CODE (desc
))
805 case DEFINE_PEEPHOLE2
:
815 /* Write out the routine to add CLOBBERs to a pattern. */
816 output_add_clobbers ();
819 return (ferror (stdout
) != 0 ? FATAL_EXIT_CODE
: SUCCESS_EXIT_CODE
);
822 /* Define this so we can link with print-rtl.o to get debug_rtx function. */
825 int code ATTRIBUTE_UNUSED
;