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explow.c (promote_mode): Use PROMOTE_FUNCTION_MODE instead of PROMOTE_FOR_CALL_ONLY.
[official-gcc.git] / gcc / config / s390 / s390.h
blob3354f45beedccd84853a755dffae0a5a6175899a
1 /* Definitions of target machine for GNU compiler, for IBM S/390
2 Copyright (C) 1999, 2000, 2001, 2002, 2003, 2004
3 Free Software Foundation, Inc.
4 Contributed by Hartmut Penner (hpenner@de.ibm.com) and
5 Ulrich Weigand (uweigand@de.ibm.com).
6
7 This file is part of GCC.
8
9 GCC is free software; you can redistribute it and/or modify it under
10 the terms of the GNU General Public License as published by the Free
11 Software Foundation; either version 2, or (at your option) any later
12 version.
13
14 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
15 WARRANTY; without even the implied warranty of MERCHANTABILITY or
16 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 for more details.
18
19 You should have received a copy of the GNU General Public License
20 along with GCC; see the file COPYING. If not, write to the Free
21 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
22 02111-1307, USA. */
23
24 #ifndef _S390_H
25 #define _S390_H
26
27 /* Override the __fixdfdi etc. routines when building libgcc2.
28 ??? This should be done in a cleaner way ... */
29 #if defined (IN_LIBGCC2) && !defined (__s390x__)
30 #include <config/s390/fixdfdi.h>
31 #endif
32
33 /* Which processor to generate code or schedule for. The cpu attribute
34 defines a list that mirrors this list, so changes to s390.md must be
35 made at the same time. */
36
37 enum processor_type
38 {
39 PROCESSOR_9672_G5,
40 PROCESSOR_9672_G6,
41 PROCESSOR_2064_Z900,
42 PROCESSOR_2084_Z990,
43 PROCESSOR_max
44 };
45
46 /* Optional architectural facilities supported by the processor. */
47
48 enum processor_flags
49 {
50 PF_IEEE_FLOAT = 1,
51 PF_ZARCH = 2,
52 PF_LONG_DISPLACEMENT = 4
53 };
54
55 extern enum processor_type s390_tune;
56 extern enum processor_flags s390_tune_flags;
57 extern const char *s390_tune_string;
58
59 extern enum processor_type s390_arch;
60 extern enum processor_flags s390_arch_flags;
61 extern const char *s390_arch_string;
62
63 #define TARGET_CPU_IEEE_FLOAT \
64 (s390_arch_flags & PF_IEEE_FLOAT)
65 #define TARGET_CPU_ZARCH \
66 (s390_arch_flags & PF_ZARCH)
67 #define TARGET_CPU_LONG_DISPLACEMENT \
68 (s390_arch_flags & PF_LONG_DISPLACEMENT)
69
70 #define TARGET_LONG_DISPLACEMENT \
71 (TARGET_ZARCH && TARGET_CPU_LONG_DISPLACEMENT)
72
73
74 /* Run-time target specification. */
75
76 /* Target CPU builtins. */
77 #define TARGET_CPU_CPP_BUILTINS() \
78 do \
79 { \
80 builtin_assert ("cpu=s390"); \
81 builtin_assert ("machine=s390"); \
82 builtin_define ("__s390__"); \
83 if (TARGET_64BIT) \
84 builtin_define ("__s390x__"); \
85 } \
86 while (0)
87
88 /* Optional target features. */
89 extern int target_flags;
90
91 #define MASK_HARD_FLOAT 0x01
92 #define MASK_BACKCHAIN 0x02
93 #define MASK_SMALL_EXEC 0x04
94 #define MASK_DEBUG_ARG 0x08
95 #define MASK_64BIT 0x10
96 #define MASK_ZARCH 0x20
97 #define MASK_MVCLE 0x40
98 #define MASK_TPF 0x80
99 #define MASK_NO_FUSED_MADD 0x100
100
101 #define TARGET_HARD_FLOAT (target_flags & MASK_HARD_FLOAT)
102 #define TARGET_SOFT_FLOAT (!(target_flags & MASK_HARD_FLOAT))
103 #define TARGET_BACKCHAIN (target_flags & MASK_BACKCHAIN)
104 #define TARGET_SMALL_EXEC (target_flags & MASK_SMALL_EXEC)
105 #define TARGET_DEBUG_ARG (target_flags & MASK_DEBUG_ARG)
106 #define TARGET_64BIT (target_flags & MASK_64BIT)
107 #define TARGET_ZARCH (target_flags & MASK_ZARCH)
108 #define TARGET_MVCLE (target_flags & MASK_MVCLE)
109 #define TARGET_TPF (target_flags & MASK_TPF)
110 #define TARGET_NO_FUSED_MADD (target_flags & MASK_NO_FUSED_MADD)
111 #define TARGET_FUSED_MADD (! TARGET_NO_FUSED_MADD)
112
113 /* ??? Once this actually works, it could be made a runtime option. */
114 #define TARGET_IBM_FLOAT 0
115 #define TARGET_IEEE_FLOAT 1
116
117 #ifdef DEFAULT_TARGET_64BIT
118 #define TARGET_DEFAULT 0x31
119 #else
120 #define TARGET_DEFAULT 0x1
121 #endif
122
123 #define TARGET_SWITCHES \
124 { { "hard-float", 1, N_("Use hardware fp")}, \
125 { "soft-float", -1, N_("Don't use hardware fp")}, \
126 { "backchain", 2, N_("Set backchain")}, \
127 { "no-backchain", -2, N_("Don't set backchain (faster, but debug harder")},\
128 { "small-exec", 4, N_("Use bras for executable < 64k")}, \
129 { "no-small-exec", -4, N_("Don't use bras")}, \
130 { "debug", 8, N_("Additional debug prints")}, \
131 { "no-debug", -8, N_("Don't print additional debug prints")}, \
132 { "64", 16, N_("64 bit ABI")}, \
133 { "31", -16, N_("31 bit ABI")}, \
134 { "zarch", 32, N_("z/Architecture")}, \
135 { "esa", -32, N_("ESA/390 architecture")}, \
136 { "mvcle", 64, N_("mvcle use")}, \
137 { "no-mvcle", -64, N_("mvc&ex")}, \
138 { "tpf", 128, N_("enable tpf OS code")}, \
139 { "no-tpf", -128, N_("disable tpf OS code")}, \
140 { "no-fused-madd", 256, N_("disable fused multiply/add instructions")},\
141 { "fused-madd", -256, N_("enable fused multiply/add instructions")}, \
142 { "", TARGET_DEFAULT, 0 } }
143
144 #define TARGET_OPTIONS \
145 { { "tune=", &s390_tune_string, \
146 N_("Schedule code for given CPU"), 0}, \
147 { "arch=", &s390_arch_string, \
148 N_("Generate code for given CPU"), 0}, \
149 }
150
151 /* Support for configure-time defaults. */
152 #define OPTION_DEFAULT_SPECS \
153 { "mode", "%{!mesa:%{!mzarch:-m%(VALUE)}}" }, \
154 { "arch", "%{!march=*:-march=%(VALUE)}" }, \
155 { "tune", "%{!mtune=*:-mtune=%(VALUE)}" }
156
157 /* Defaulting rules. */
158 #ifdef DEFAULT_TARGET_64BIT
159 #define DRIVER_SELF_SPECS \
160 "%{!m31:%{!m64:-m64}}", \
161 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
162 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
163 #else
164 #define DRIVER_SELF_SPECS \
165 "%{!m31:%{!m64:-m31}}", \
166 "%{!mesa:%{!mzarch:%{m31:-mesa}%{m64:-mzarch}}}", \
167 "%{!march=*:%{mesa:-march=g5}%{mzarch:-march=z900}}"
168 #endif
169
170 /* Target version string. Overridden by the OS header. */
171 #ifdef DEFAULT_TARGET_64BIT
172 #define TARGET_VERSION fprintf (stderr, " (zSeries)");
173 #else
174 #define TARGET_VERSION fprintf (stderr, " (S/390)");
175 #endif
176
177 /* Hooks to override options. */
178 #define OPTIMIZATION_OPTIONS(LEVEL, SIZE) optimization_options(LEVEL, SIZE)
179 #define OVERRIDE_OPTIONS override_options ()
180
181 /* Frame pointer is not used for debugging. */
182 #define CAN_DEBUG_WITHOUT_FP
183
184
185 /* In libgcc2, determine target settings as compile-time constants. */
186 #ifdef IN_LIBGCC2
187 #undef TARGET_64BIT
188 #ifdef __s390x__
189 #define TARGET_64BIT 1
190 #else
191 #define TARGET_64BIT 0
192 #endif
193 #endif
194
195
196 /* Target machine storage layout. */
197
198 /* Everything is big-endian. */
199 #define BITS_BIG_ENDIAN 1
200 #define BYTES_BIG_ENDIAN 1
201 #define WORDS_BIG_ENDIAN 1
202
203 /* Width of a word, in units (bytes). */
204 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
205 #ifndef IN_LIBGCC2
206 #define MIN_UNITS_PER_WORD 4
207 #endif
208 #define MAX_BITS_PER_WORD 64
209
210 /* Function arguments and return values are promoted to word size. */
211 #define PROMOTE_FUNCTION_MODE(MODE, UNSIGNEDP, TYPE) \
212 if (INTEGRAL_MODE_P (MODE) && \
213 GET_MODE_SIZE (MODE) < UNITS_PER_WORD) { \
214 (MODE) = Pmode; \
215 }
216
217 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
218 #define PARM_BOUNDARY (TARGET_64BIT ? 64 : 32)
219
220 /* Boundary (in *bits*) on which stack pointer should be aligned. */
221 #define STACK_BOUNDARY 64
222
223 /* Allocation boundary (in *bits*) for the code of a function. */
224 #define FUNCTION_BOUNDARY 32
225
226 /* There is no point aligning anything to a rounder boundary than this. */
227 #define BIGGEST_ALIGNMENT 64
228
229 /* Alignment of field after `int : 0' in a structure. */
230 #define EMPTY_FIELD_BOUNDARY 32
231
232 /* Alignment on even addresses for LARL instruction. */
233 #define CONSTANT_ALIGNMENT(EXP, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
234 #define DATA_ALIGNMENT(TYPE, ALIGN) (ALIGN) < 16 ? 16 : (ALIGN)
235
236 /* Alignment is not required by the hardware. */
237 #define STRICT_ALIGNMENT 0
238
239 /* Mode of stack savearea.
240 FUNCTION is VOIDmode because calling convention maintains SP.
241 BLOCK needs Pmode for SP.
242 NONLOCAL needs twice Pmode to maintain both backchain and SP. */
243 #define STACK_SAVEAREA_MODE(LEVEL) \
244 (LEVEL == SAVE_FUNCTION ? VOIDmode \
245 : LEVEL == SAVE_NONLOCAL ? (TARGET_64BIT ? OImode : TImode) : Pmode)
246
247 /* Define target floating point format. */
248 #define TARGET_FLOAT_FORMAT \
249 (TARGET_IEEE_FLOAT? IEEE_FLOAT_FORMAT : IBM_FLOAT_FORMAT)
250
251
252 /* Type layout. */
253
254 /* Sizes in bits of the source language data types. */
255 #define SHORT_TYPE_SIZE 16
256 #define INT_TYPE_SIZE 32
257 #define LONG_TYPE_SIZE (TARGET_64BIT ? 64 : 32)
258 #define LONG_LONG_TYPE_SIZE 64
259 #define FLOAT_TYPE_SIZE 32
260 #define DOUBLE_TYPE_SIZE 64
261 #define LONG_DOUBLE_TYPE_SIZE 64 /* ??? Should support extended format. */
262
263 /* We use "unsigned char" as default. */
264 #define DEFAULT_SIGNED_CHAR 0
265
266
267 /* Register usage. */
268
269 /* We have 16 general purpose registers (registers 0-15),
270 and 16 floating point registers (registers 16-31).
271 (On non-IEEE machines, we have only 4 fp registers.)
272
273 Amongst the general purpose registers, some are used
274 for specific purposes:
275 GPR 11: Hard frame pointer (if needed)
276 GPR 12: Global offset table pointer (if needed)
277 GPR 13: Literal pool base register
278 GPR 14: Return address register
279 GPR 15: Stack pointer
280
281 Registers 32-34 are 'fake' hard registers that do not
282 correspond to actual hardware:
283 Reg 32: Argument pointer
284 Reg 33: Condition code
285 Reg 34: Frame pointer */
286
287 #define FIRST_PSEUDO_REGISTER 35
288
289 /* Standard register usage. */
290 #define GENERAL_REGNO_P(N) ((int)(N) >= 0 && (N) < 16)
291 #define ADDR_REGNO_P(N) ((N) >= 1 && (N) < 16)
292 #define FP_REGNO_P(N) ((N) >= 16 && (N) < (TARGET_IEEE_FLOAT? 32 : 20))
293 #define CC_REGNO_P(N) ((N) == 33)
294 #define FRAME_REGNO_P(N) ((N) == 32 || (N) == 34)
295
296 #define GENERAL_REG_P(X) (REG_P (X) && GENERAL_REGNO_P (REGNO (X)))
297 #define ADDR_REG_P(X) (REG_P (X) && ADDR_REGNO_P (REGNO (X)))
298 #define FP_REG_P(X) (REG_P (X) && FP_REGNO_P (REGNO (X)))
299 #define CC_REG_P(X) (REG_P (X) && CC_REGNO_P (REGNO (X)))
300 #define FRAME_REG_P(X) (REG_P (X) && FRAME_REGNO_P (REGNO (X)))
301
302 #define BASE_REGISTER 13
303 #define RETURN_REGNUM 14
304 #define CC_REGNUM 33
305
306 /* Set up fixed registers and calling convention:
307
308 GPRs 0-5 are always call-clobbered,
309 GPRs 6-15 are always call-saved.
310 GPR 12 is fixed if used as GOT pointer.
311 GPR 13 is always fixed (as literal pool pointer).
312 GPR 14 is always fixed on S/390 machines (as return address).
313 GPR 15 is always fixed (as stack pointer).
314 The 'fake' hard registers are call-clobbered and fixed.
315
316 On 31-bit, FPRs 18-19 are call-clobbered;
317 on 64-bit, FPRs 24-31 are call-clobbered.
318 The remaining FPRs are call-saved. */
319
320 #define FIXED_REGISTERS \
321 { 0, 0, 0, 0, \
322 0, 0, 0, 0, \
323 0, 0, 0, 0, \
324 0, 1, 1, 1, \
325 0, 0, 0, 0, \
326 0, 0, 0, 0, \
327 0, 0, 0, 0, \
328 0, 0, 0, 0, \
329 1, 1, 1 }
330
331 #define CALL_USED_REGISTERS \
332 { 1, 1, 1, 1, \
333 1, 1, 0, 0, \
334 0, 0, 0, 0, \
335 0, 1, 1, 1, \
336 1, 1, 1, 1, \
337 1, 1, 1, 1, \
338 1, 1, 1, 1, \
339 1, 1, 1, 1, \
340 1, 1, 1 }
341
342 #define CALL_REALLY_USED_REGISTERS \
343 { 1, 1, 1, 1, \
344 1, 1, 0, 0, \
345 0, 0, 0, 0, \
346 0, 0, 0, 0, \
347 1, 1, 1, 1, \
348 1, 1, 1, 1, \
349 1, 1, 1, 1, \
350 1, 1, 1, 1, \
351 1, 1, 1 }
352
353 #define CONDITIONAL_REGISTER_USAGE \
354 do \
355 { \
356 int i; \
357 \
358 if (flag_pic) \
359 { \
360 fixed_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
361 call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1; \
362 } \
363 if (TARGET_CPU_ZARCH) \
364 { \
365 fixed_regs[RETURN_REGNUM] = 0; \
366 call_used_regs[RETURN_REGNUM] = 0; \
367 } \
368 if (TARGET_64BIT) \
369 { \
370 for (i = 24; i < 32; i++) \
371 call_used_regs[i] = call_really_used_regs[i] = 0; \
372 } \
373 else \
374 { \
375 for (i = 18; i < 20; i++) \
376 call_used_regs[i] = call_really_used_regs[i] = 0; \
377 } \
378 } while (0)
379
380 /* Preferred register allocation order. */
381 #define REG_ALLOC_ORDER \
382 { 1, 2, 3, 4, 5, 0, 13, 12, 11, 10, 9, 8, 7, 6, 14, \
383 16, 17, 18, 19, 20, 21, 22, 23, \
384 24, 25, 26, 27, 28, 29, 30, 31, \
385 15, 32, 33, 34 }
386
387
388 /* Fitting values into registers. */
389
390 /* Integer modes <= word size fit into any GPR.
391 Integer modes > word size fit into successive GPRs, starting with
392 an even-numbered register.
393 SImode and DImode fit into FPRs as well.
394
395 Floating point modes <= word size fit into any FPR or GPR.
396 Floating point modes > word size (i.e. DFmode on 32-bit) fit
397 into any FPR, or an even-odd GPR pair.
398
399 Complex floating point modes fit either into two FPRs, or into
400 successive GPRs (again starting with an even number).
401
402 Condition code modes fit only into the CC register. */
403
404 #define HARD_REGNO_NREGS(REGNO, MODE) \
405 (FP_REGNO_P(REGNO)? \
406 (GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
407 GENERAL_REGNO_P(REGNO)? \
408 ((GET_MODE_SIZE(MODE)+UNITS_PER_WORD-1) / UNITS_PER_WORD) : \
409 1)
410
411 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
412 (FP_REGNO_P(REGNO)? \
413 ((MODE) == SImode || (MODE) == DImode || \
414 GET_MODE_CLASS(MODE) == MODE_FLOAT || \
415 GET_MODE_CLASS(MODE) == MODE_COMPLEX_FLOAT) : \
416 GENERAL_REGNO_P(REGNO)? \
417 (HARD_REGNO_NREGS(REGNO, MODE) == 1 || !((REGNO) & 1)) : \
418 CC_REGNO_P(REGNO)? \
419 GET_MODE_CLASS (MODE) == MODE_CC : \
420 FRAME_REGNO_P(REGNO)? \
421 (enum machine_mode) (MODE) == Pmode : \
422 0)
423
424 #define MODES_TIEABLE_P(MODE1, MODE2) \
425 (((MODE1) == SFmode || (MODE1) == DFmode) \
426 == ((MODE2) == SFmode || (MODE2) == DFmode))
427
428 /* Maximum number of registers to represent a value of mode MODE
429 in a register of class CLASS. */
430 #define CLASS_MAX_NREGS(CLASS, MODE) \
431 ((CLASS) == FP_REGS ? \
432 (GET_MODE_CLASS (MODE) == MODE_COMPLEX_FLOAT ? 2 : 1) : \
433 (GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
434
435 /* If a 4-byte value is loaded into a FPR, it is placed into the
436 *upper* half of the register, not the lower. Therefore, we
437 cannot use SUBREGs to switch between modes in FP registers. */
438 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
439 (GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO) \
440 ? reg_classes_intersect_p (FP_REGS, CLASS) : 0)
441
442 /* Register classes. */
443
444 /* We use the following register classes:
445 GENERAL_REGS All general purpose registers
446 ADDR_REGS All general purpose registers except %r0
447 (These registers can be used in address generation)
448 FP_REGS All floating point registers
449
450 GENERAL_FP_REGS Union of GENERAL_REGS and FP_REGS
451 ADDR_FP_REGS Union of ADDR_REGS and FP_REGS
452
453 NO_REGS No registers
454 ALL_REGS All registers
455
456 Note that the 'fake' frame pointer and argument pointer registers
457 are included amongst the address registers here. The condition
458 code register is only included in ALL_REGS. */
459
460 enum reg_class
461 {
462 NO_REGS, ADDR_REGS, GENERAL_REGS,
463 FP_REGS, ADDR_FP_REGS, GENERAL_FP_REGS,
464 ALL_REGS, LIM_REG_CLASSES
465 };
466 #define N_REG_CLASSES (int) LIM_REG_CLASSES
467
468 #define REG_CLASS_NAMES \
469 { "NO_REGS", "ADDR_REGS", "GENERAL_REGS", \
470 "FP_REGS", "ADDR_FP_REGS", "GENERAL_FP_REGS", "ALL_REGS" }
471
472 /* Class -> register mapping. */
473 #define REG_CLASS_CONTENTS \
474 { \
475 { 0x00000000, 0x00000000 }, /* NO_REGS */ \
476 { 0x0000fffe, 0x00000005 }, /* ADDR_REGS */ \
477 { 0x0000ffff, 0x00000005 }, /* GENERAL_REGS */ \
478 { 0xffff0000, 0x00000000 }, /* FP_REGS */ \
479 { 0xfffffffe, 0x00000005 }, /* ADDR_FP_REGS */ \
480 { 0xffffffff, 0x00000005 }, /* GENERAL_FP_REGS */ \
481 { 0xffffffff, 0x00000007 }, /* ALL_REGS */ \
482 }
483
484 /* Register -> class mapping. */
485 extern const enum reg_class regclass_map[FIRST_PSEUDO_REGISTER];
486 #define REGNO_REG_CLASS(REGNO) (regclass_map[REGNO])
487
488 /* ADDR_REGS can be used as base or index register. */
489 #define INDEX_REG_CLASS ADDR_REGS
490 #define BASE_REG_CLASS ADDR_REGS
491
492 /* Check whether REGNO is a hard register of the suitable class
493 or a pseudo register currently allocated to one such. */
494 #define REGNO_OK_FOR_INDEX_P(REGNO) \
495 (((REGNO) < FIRST_PSEUDO_REGISTER \
496 && REGNO_REG_CLASS ((REGNO)) == ADDR_REGS) \
497 || (reg_renumber[REGNO] > 0 && reg_renumber[REGNO] < 16))
498 #define REGNO_OK_FOR_BASE_P(REGNO) REGNO_OK_FOR_INDEX_P (REGNO)
499
500
501 /* Given an rtx X being reloaded into a reg required to be in class CLASS,
502 return the class of reg to actually use. */
503 #define PREFERRED_RELOAD_CLASS(X, CLASS) \
504 s390_preferred_reload_class ((X), (CLASS))
505
506 /* We need a secondary reload when loading a PLUS which is
507 not a valid operand for LOAD ADDRESS. */
508 #define SECONDARY_INPUT_RELOAD_CLASS(CLASS, MODE, IN) \
509 s390_secondary_input_reload_class ((CLASS), (MODE), (IN))
510
511 /* We need a secondary reload when storing a double-word
512 to a non-offsettable memory address. */
513 #define SECONDARY_OUTPUT_RELOAD_CLASS(CLASS, MODE, OUT) \
514 s390_secondary_output_reload_class ((CLASS), (MODE), (OUT))
515
516 /* We need secondary memory to move data between GPRs and FPRs. */
517 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
518 ((CLASS1) != (CLASS2) && ((CLASS1) == FP_REGS || (CLASS2) == FP_REGS))
519
520 /* Get_secondary_mem widens its argument to BITS_PER_WORD which loses on 64bit
521 because the movsi and movsf patterns don't handle r/f moves. */
522 #define SECONDARY_MEMORY_NEEDED_MODE(MODE) \
523 (GET_MODE_BITSIZE (MODE) < 32 \
524 ? mode_for_size (32, GET_MODE_CLASS (MODE), 0) \
525 : MODE)
526
527
528 /* Define various machine-dependent constraint letters. */
529
530 #define REG_CLASS_FROM_LETTER(C) \
531 ((C) == 'a' ? ADDR_REGS : \
532 (C) == 'd' ? GENERAL_REGS : \
533 (C) == 'f' ? FP_REGS : NO_REGS)
534
535 #define CONST_OK_FOR_CONSTRAINT_P(VALUE, C, STR) \
536 s390_const_ok_for_constraint_p ((VALUE), (C), (STR))
537
538 #define CONST_DOUBLE_OK_FOR_CONSTRAINT_P(VALUE, C, STR) 1
539
540 #define EXTRA_CONSTRAINT_STR(OP, C, STR) \
541 s390_extra_constraint_str ((OP), (C), (STR))
542 #define EXTRA_MEMORY_CONSTRAINT(C, STR) \
543 ((C) == 'Q' || (C) == 'R' || (C) == 'S' || (C) == 'T')
544 #define EXTRA_ADDRESS_CONSTRAINT(C, STR) \
545 ((C) == 'U' || (C) == 'W' || (C) == 'Y')
546
547 #define CONSTRAINT_LEN(C, STR) \
548 ((C) == 'N' ? 5 : DEFAULT_CONSTRAINT_LEN ((C), (STR)))
549
550 /* Stack layout and calling conventions. */
551
552 /* Our stack grows from higher to lower addresses. However, local variables
553 are accessed by positive offsets, and function arguments are stored at
554 increasing addresses. */
555 #define STACK_GROWS_DOWNWARD
556 /* #undef FRAME_GROWS_DOWNWARD */
557 /* #undef ARGS_GROW_DOWNWARD */
558
559 /* The basic stack layout looks like this: the stack pointer points
560 to the register save area for called functions. Above that area
561 is the location to place outgoing arguments. Above those follow
562 dynamic allocations (alloca), and finally the local variables. */
563
564 /* Offset from stack-pointer to first location of outgoing args. */
565 #define STACK_POINTER_OFFSET (TARGET_64BIT ? 160 : 96)
566
567 /* Offset within stack frame to start allocating local variables at. */
568 extern int current_function_outgoing_args_size;
569 #define STARTING_FRAME_OFFSET \
570 (STACK_POINTER_OFFSET + current_function_outgoing_args_size)
571
572 /* Offset from the stack pointer register to an item dynamically
573 allocated on the stack, e.g., by `alloca'. */
574 #define STACK_DYNAMIC_OFFSET(FUNDECL) (STARTING_FRAME_OFFSET)
575
576 /* Offset of first parameter from the argument pointer register value.
577 We have a fake argument pointer register that points directly to
578 the argument area. */
579 #define FIRST_PARM_OFFSET(FNDECL) 0
580
581 /* The return address of the current frame is retrieved
582 from the initial value of register RETURN_REGNUM.
583 For frames farther back, we use the stack slot where
584 the corresponding RETURN_REGNUM register was saved. */
585
586 #define DYNAMIC_CHAIN_ADDRESS(FRAME) \
587 ((FRAME) != hard_frame_pointer_rtx ? (FRAME) : \
588 plus_constant (arg_pointer_rtx, -STACK_POINTER_OFFSET))
589
590 #define RETURN_ADDR_RTX(COUNT, FRAME) \
591 s390_return_addr_rtx ((COUNT), DYNAMIC_CHAIN_ADDRESS ((FRAME)))
592
593 /* In 31-bit mode, we need to mask off the high bit of return addresses. */
594 #define MASK_RETURN_ADDR (TARGET_64BIT ? constm1_rtx : GEN_INT (0x7fffffff))
595
596
597 /* Exception handling. */
598
599 /* Describe calling conventions for DWARF-2 exception handling. */
600 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, RETURN_REGNUM)
601 #define INCOMING_FRAME_SP_OFFSET STACK_POINTER_OFFSET
602 #define DWARF_FRAME_RETURN_COLUMN 14
603
604 /* Describe how we implement __builtin_eh_return. */
605 #define EH_RETURN_DATA_REGNO(N) ((N) < 4 ? (N) + 6 : INVALID_REGNUM)
606 #define EH_RETURN_HANDLER_RTX \
607 gen_rtx_MEM (Pmode, plus_constant (arg_pointer_rtx, \
608 -STACK_POINTER_OFFSET + UNITS_PER_WORD*RETURN_REGNUM))
609
610 /* Select a format to encode pointers in exception handling data. */
611 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE, GLOBAL) \
612 (flag_pic \
613 ? ((GLOBAL) ? DW_EH_PE_indirect : 0) | DW_EH_PE_pcrel | DW_EH_PE_sdata4 \
614 : DW_EH_PE_absptr)
615
616
617 /* Frame registers. */
618
619 #define STACK_POINTER_REGNUM 15
620 #define FRAME_POINTER_REGNUM 34
621 #define HARD_FRAME_POINTER_REGNUM 11
622 #define ARG_POINTER_REGNUM 32
623
624 /* The static chain must be call-clobbered, but not used for
625 function argument passing. As register 1 is clobbered by
626 the trampoline code, we only have one option. */
627 #define STATIC_CHAIN_REGNUM 0
628
629 /* Number of hardware registers that go into the DWARF-2 unwind info.
630 To avoid ABI incompatibility, this number must not change even as
631 'fake' hard registers are added or removed. */
632 #define DWARF_FRAME_REGISTERS 34
633
634
635 /* Frame pointer and argument pointer elimination. */
636
637 #define FRAME_POINTER_REQUIRED 0
638
639 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) (DEPTH) = 0
640
641 #define ELIMINABLE_REGS \
642 {{ FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
643 { FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}, \
644 { ARG_POINTER_REGNUM, STACK_POINTER_REGNUM}, \
645 { ARG_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
646
647 #define CAN_ELIMINATE(FROM, TO) (1)
648
649 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
650 { if ((FROM) == FRAME_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
651 { (OFFSET) = 0; } \
652 else if ((FROM) == FRAME_POINTER_REGNUM \
653 && (TO) == HARD_FRAME_POINTER_REGNUM) \
654 { (OFFSET) = 0; } \
655 else if ((FROM) == ARG_POINTER_REGNUM \
656 && (TO) == HARD_FRAME_POINTER_REGNUM) \
657 { (OFFSET) = s390_arg_frame_offset (); } \
658 else if ((FROM) == ARG_POINTER_REGNUM && (TO) == STACK_POINTER_REGNUM) \
659 { (OFFSET) = s390_arg_frame_offset (); } \
660 else \
661 abort(); \
662 }
663
664
665 /* Stack arguments. */
666
667 /* We need current_function_outgoing_args to be valid. */
668 #define ACCUMULATE_OUTGOING_ARGS 1
669
670 /* Return doesn't modify the stack. */
671 #define RETURN_POPS_ARGS(FUNDECL, FUNTYPE, SIZE) 0
672
673
674 /* Register arguments. */
675
676 typedef struct s390_arg_structure
677 {
678 int gprs; /* gpr so far */
679 int fprs; /* fpr so far */
680 }
681 CUMULATIVE_ARGS;
682
683 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, NN, N_NAMED_ARGS) \
684 ((CUM).gprs=0, (CUM).fprs=0)
685
686 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
687 s390_function_arg_advance (&CUM, MODE, TYPE, NAMED)
688
689 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
690 s390_function_arg (&CUM, MODE, TYPE, NAMED)
691
692 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
693 s390_function_arg_pass_by_reference (MODE, TYPE)
694
695 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
696
697 /* Arguments can be placed in general registers 2 to 6,
698 or in floating point registers 0 and 2. */
699 #define FUNCTION_ARG_REGNO_P(N) (((N) >=2 && (N) <7) || \
700 (N) == 16 || (N) == 17)
701
702
703 /* Scalar return values. */
704
705 #define FUNCTION_VALUE(VALTYPE, FUNC) \
706 s390_function_value ((VALTYPE), VOIDmode)
707
708 #define LIBCALL_VALUE(MODE) \
709 s390_function_value (NULL, (MODE))
710
711 /* Only gpr 2 and fpr 0 are ever used as return registers. */
712 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 2 || (N) == 16)
713
714
715 /* Function entry and exit. */
716
717 /* When returning from a function, the stack pointer does not matter. */
718 #define EXIT_IGNORE_STACK 1
719
720
721 /* Profiling. */
722
723 #define FUNCTION_PROFILER(FILE, LABELNO) \
724 s390_function_profiler ((FILE), ((LABELNO)))
725
726 #define PROFILE_BEFORE_PROLOGUE 1
727
728
729 /* Implementing the varargs macros. */
730
731 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
732 s390_va_start (valist, nextarg)
733
734 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
735 s390_va_arg (valist, type)
736
737
738 /* Trampolines for nested functions. */
739
740 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 36 : 20)
741
742 #define INITIALIZE_TRAMPOLINE(ADDR, FNADDR, CXT) \
743 s390_initialize_trampoline ((ADDR), (FNADDR), (CXT))
744
745 #define TRAMPOLINE_TEMPLATE(FILE) \
746 s390_trampoline_template (FILE)
747
748
749 /* Library calls. */
750
751 /* We should use memcpy, not bcopy. */
752 #define TARGET_MEM_FUNCTIONS
753
754
755 /* Addressing modes, and classification of registers for them. */
756
757 /* Recognize any constant value that is a valid address. */
758 #define CONSTANT_ADDRESS_P(X) 0
759
760 /* Maximum number of registers that can appear in a valid memory address. */
761 #define MAX_REGS_PER_ADDRESS 2
762
763 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx and check
764 its validity for a certain class. We have two alternate definitions
765 for each of them. The usual definition accepts all pseudo regs; the
766 other rejects them all. The symbol REG_OK_STRICT causes the latter
767 definition to be used.
768
769 Most source files want to accept pseudo regs in the hope that they will
770 get allocated to the class that the insn wants them to be in.
771 Some source files that are used after register allocation
772 need to be strict. */
773
774 #define REG_OK_FOR_INDEX_NONSTRICT_P(X) \
775 ((GET_MODE (X) == Pmode) && \
776 ((REGNO (X) >= FIRST_PSEUDO_REGISTER) \
777 || REGNO_REG_CLASS (REGNO (X)) == ADDR_REGS))
778
779 #define REG_OK_FOR_BASE_NONSTRICT_P(X) REG_OK_FOR_INDEX_NONSTRICT_P (X)
780
781 #define REG_OK_FOR_INDEX_STRICT_P(X) \
782 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_INDEX_P (REGNO (X))))
783
784 #define REG_OK_FOR_BASE_STRICT_P(X) \
785 ((GET_MODE (X) == Pmode) && (REGNO_OK_FOR_BASE_P (REGNO (X))))
786
787 #ifndef REG_OK_STRICT
788 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_NONSTRICT_P(X)
789 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_NONSTRICT_P(X)
790 #else
791 #define REG_OK_FOR_INDEX_P(X) REG_OK_FOR_INDEX_STRICT_P(X)
792 #define REG_OK_FOR_BASE_P(X) REG_OK_FOR_BASE_STRICT_P(X)
793 #endif
794
795 /* S/390 has no mode dependent addresses. */
796 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL)
797
798 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression that is a
799 valid memory address for an instruction.
800 The MODE argument is the machine mode for the MEM expression
801 that wants to use this address. */
802 #ifdef REG_OK_STRICT
803 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
804 { \
805 if (legitimate_address_p (MODE, X, 1)) \
806 goto ADDR; \
807 }
808 #else
809 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
810 { \
811 if (legitimate_address_p (MODE, X, 0)) \
812 goto ADDR; \
813 }
814 #endif
815
816 /* Try machine-dependent ways of modifying an illegitimate address
817 to be legitimate. If we find one, return the new, valid address.
818 This macro is used in only one place: `memory_address' in explow.c. */
819 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
820 { \
821 (X) = legitimize_address (X, OLDX, MODE); \
822 if (memory_address_p (MODE, X)) \
823 goto WIN; \
824 }
825
826 /* Nonzero if the constant value X is a legitimate general operand.
827 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
828 #define LEGITIMATE_CONSTANT_P(X) \
829 legitimate_constant_p (X)
830
831 /* Helper macro for s390.c and s390.md to check for symbolic constants. */
832 #define SYMBOLIC_CONST(X) \
833 (GET_CODE (X) == SYMBOL_REF \
834 || GET_CODE (X) == LABEL_REF \
835 || (GET_CODE (X) == CONST && symbolic_reference_mentioned_p (X)))
836
837 #define TLS_SYMBOLIC_CONST(X) \
838 ((GET_CODE (X) == SYMBOL_REF && tls_symbolic_operand (X)) \
839 || (GET_CODE (X) == CONST && tls_symbolic_reference_mentioned_p (X)))
840
841
842 /* Condition codes. */
843
844 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
845 return the mode to be used for the comparison. */
846 #define SELECT_CC_MODE(OP, X, Y) s390_select_ccmode ((OP), (X), (Y))
847
848 /* Define the information needed to generate branch and scc insns. This is
849 stored from the compare operation. Note that we can't use "rtx" here
850 since it hasn't been defined! */
851 extern struct rtx_def *s390_compare_op0, *s390_compare_op1;
852
853
854 /* Relative costs of operations. */
855
856 /* On s390, copy between fprs and gprs is expensive. */
857 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
858 (( ( reg_classes_intersect_p ((CLASS1), GENERAL_REGS) \
859 && reg_classes_intersect_p ((CLASS2), FP_REGS)) \
860 || ( reg_classes_intersect_p ((CLASS1), FP_REGS) \
861 && reg_classes_intersect_p ((CLASS2), GENERAL_REGS))) ? 10 : 1)
862
863 /* A C expression for the cost of moving data of mode M between a
864 register and memory. A value of 2 is the default; this cost is
865 relative to those in `REGISTER_MOVE_COST'. */
866 #define MEMORY_MOVE_COST(M, C, I) 1
867
868 /* A C expression for the cost of a branch instruction. A value of 1
869 is the default; other values are interpreted relative to that. */
870 #define BRANCH_COST 1
871
872 /* Nonzero if access to memory by bytes is slow and undesirable. */
873 #define SLOW_BYTE_ACCESS 1
874
875 /* The maximum number of bytes that a single instruction can move quickly
876 between memory and registers or between two memory locations. */
877 #define MOVE_MAX (TARGET_64BIT ? 16 : 8)
878 #define MAX_MOVE_MAX 16
879
880 /* Determine whether to use move_by_pieces or block move insn. */
881 #define MOVE_BY_PIECES_P(SIZE, ALIGN) \
882 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
883 || (TARGET_64BIT && (SIZE) == 8) )
884
885 /* Determine whether to use clear_by_pieces or block clear insn. */
886 #define CLEAR_BY_PIECES_P(SIZE, ALIGN) \
887 ( (SIZE) == 1 || (SIZE) == 2 || (SIZE) == 4 \
888 || (TARGET_64BIT && (SIZE) == 8) )
889
890 /* Don't perform CSE on function addresses. */
891 #define NO_FUNCTION_CSE
892
893
894 /* Sections. */
895
896 /* Output before read-only data. */
897 #define TEXT_SECTION_ASM_OP ".text"
898
899 /* Output before writable (initialized) data. */
900 #define DATA_SECTION_ASM_OP ".data"
901
902 /* Output before writable (uninitialized) data. */
903 #define BSS_SECTION_ASM_OP ".bss"
904
905 /* S/390 constant pool breaks the devices in crtstuff.c to control section
906 in where code resides. We have to write it as asm code. */
907 #ifndef __s390x__
908 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC) \
909 asm (SECTION_OP "\n\
910 bras\t%r2,1f\n\
911 0: .long\t" USER_LABEL_PREFIX #FUNC " - 0b\n\
912 1: l\t%r3,0(%r2)\n\
913 bas\t%r14,0(%r3,%r2)\n\
914 .previous");
915 #endif
916
917
918 /* Position independent code. */
919
920 extern int flag_pic;
921
922 #define PIC_OFFSET_TABLE_REGNUM (flag_pic ? 12 : INVALID_REGNUM)
923
924 #define LEGITIMATE_PIC_OPERAND_P(X) legitimate_pic_operand_p (X)
925
926
927 /* Assembler file format. */
928
929 /* Character to start a comment. */
930 #define ASM_COMMENT_START "#"
931
932 /* Declare an uninitialized external linkage data object. */
933 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
934 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
935
936 /* Globalizing directive for a label. */
937 #define GLOBAL_ASM_OP ".globl "
938
939 /* Advance the location counter to a multiple of 2**LOG bytes. */
940 #define ASM_OUTPUT_ALIGN(FILE, LOG) \
941 if ((LOG)) fprintf ((FILE), "\t.align\t%d\n", 1 << (LOG))
942
943 /* Advance the location counter by SIZE bytes. */
944 #define ASM_OUTPUT_SKIP(FILE, SIZE) \
945 fprintf ((FILE), "\t.set\t.,.+"HOST_WIDE_INT_PRINT_UNSIGNED"\n", (SIZE))
946
947 /* The LOCAL_LABEL_PREFIX variable is used by dbxelf.h. */
948 #define LOCAL_LABEL_PREFIX "."
949
950 /* How to refer to registers in assembler output. This sequence is
951 indexed by compiler's hard-register-number (see above). */
952 #define REGISTER_NAMES \
953 { "%r0", "%r1", "%r2", "%r3", "%r4", "%r5", "%r6", "%r7", \
954 "%r8", "%r9", "%r10", "%r11", "%r12", "%r13", "%r14", "%r15", \
955 "%f0", "%f2", "%f4", "%f6", "%f1", "%f3", "%f5", "%f7", \
956 "%f8", "%f10", "%f12", "%f14", "%f9", "%f11", "%f13", "%f15", \
957 "%ap", "%cc", "%fp" \
958 }
959
960 /* Emit a dtp-relative reference to a TLS variable. */
961
962 #ifdef HAVE_AS_TLS
963 #define ASM_OUTPUT_DWARF_DTPREL(FILE, SIZE, X) \
964 s390_output_dwarf_dtprel (FILE, SIZE, X)
965 #endif
966
967 /* Print operand X (an rtx) in assembler syntax to file FILE. */
968 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
969 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
970
971 /* Output machine-dependent UNSPECs in address constants. */
972 #define OUTPUT_ADDR_CONST_EXTRA(FILE, X, FAIL) \
973 do { \
974 if (!s390_output_addr_const_extra (FILE, (X))) \
975 goto FAIL; \
976 } while (0);
977
978 /* Output an element of a case-vector that is absolute. */
979 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
980 do { \
981 char buf[32]; \
982 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
983 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
984 assemble_name ((FILE), buf); \
985 fputc ('\n', (FILE)); \
986 } while (0)
987
988 /* Output an element of a case-vector that is relative. */
989 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
990 do { \
991 char buf[32]; \
992 fputs (integer_asm_op (UNITS_PER_WORD, TRUE), (FILE)); \
993 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (VALUE)); \
994 assemble_name ((FILE), buf); \
995 fputc ('-', (FILE)); \
996 ASM_GENERATE_INTERNAL_LABEL (buf, "L", (REL)); \
997 assemble_name ((FILE), buf); \
998 fputc ('\n', (FILE)); \
999 } while (0)
1000
1001
1002 /* Miscellaneous parameters. */
1003
1004 /* Define the codes that are matched by predicates in aux-output.c. */
1005 #define PREDICATE_CODES \
1006 {"s_operand", { SUBREG, MEM }}, \
1007 {"s_imm_operand", { CONST_INT, CONST_DOUBLE, SUBREG, MEM }}, \
1008 {"shift_count_operand", { REG, SUBREG, PLUS, CONST_INT }}, \
1009 {"bras_sym_operand",{ SYMBOL_REF, CONST }}, \
1010 {"larl_operand", { SYMBOL_REF, CONST, CONST_INT, CONST_DOUBLE }}, \
1011 {"load_multiple_operation", {PARALLEL}}, \
1012 {"store_multiple_operation", {PARALLEL}}, \
1013 {"const0_operand", { CONST_INT, CONST_DOUBLE }}, \
1014 {"consttable_operand", { SYMBOL_REF, LABEL_REF, CONST, \
1015 CONST_INT, CONST_DOUBLE }}, \
1016 {"s390_plus_operand", { PLUS }}, \
1017 {"s390_alc_comparison", { LTU, GTU, LEU, GEU }}, \
1018 {"s390_slb_comparison", { LTU, GTU, LEU, GEU }},
1019
1020 /* Specify the machine mode that this machine uses for the index in the
1021 tablejump instruction. */
1022 #define CASE_VECTOR_MODE (TARGET_64BIT ? DImode : SImode)
1023
1024 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1025 is done just by pretending it is already truncated. */
1026 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1027
1028 /* Specify the machine mode that pointers have.
1029 After generation of rtl, the compiler makes no further distinction
1030 between pointers and any other objects of this machine mode. */
1031 #define Pmode ((enum machine_mode) (TARGET_64BIT ? DImode : SImode))
1032
1033 /* This is -1 for "pointer mode" extend. See ptr_extend in s390.md. */
1034 #define POINTERS_EXTEND_UNSIGNED -1
1035
1036 /* A function address in a call instruction is a byte address (for
1037 indexing purposes) so give the MEM rtx a byte's mode. */
1038 #define FUNCTION_MODE QImode
1039
1040 /* This macro definition sets up a default value for `main' to return. */
1041 #define DEFAULT_MAIN_RETURN c_expand_return (integer_zero_node)
1042
1043 #endif
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