1 ;; Marvell ARM Processor Pipeline Description
2 ;; Copyright (C) 2010-2013 Free Software Foundation, Inc.
3 ;; Contributed by Marvell.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify it
8 ;; under the terms of the GNU General Public License as published
9 ;; by the Free Software Foundation; either version 3, or (at your
10 ;; option) any later version.
12 ;; GCC is distributed in the hope that it will be useful, but WITHOUT
13 ;; ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
14 ;; or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
15 ;; License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
21 ;; Pipeline description for the Marvell PJ4, aka "Flareon".
22 (define_automaton "pj4")
25 (define_cpu_unit "pj4_is1,pj4_is2" "pj4")
26 (define_reservation "pj4_is" "(pj4_is1|pj4_is2)")
27 (define_reservation "pj4_isb" "(pj4_is1+pj4_is2)")
30 (define_cpu_unit "pj4_alu1,pj4_alu2,pj4_mul,pj4_div" "pj4")
33 (define_cpu_unit "pj4_w1,pj4_w2" "pj4")
35 ;; Complete/Retire control
36 (define_cpu_unit "pj4_c1,pj4_c2" "pj4")
37 (define_reservation "pj4_cp" "(pj4_c1|pj4_c2)")
38 (define_reservation "pj4_cpb" "(pj4_c1+pj4_c2)")
40 ;; Integer arithmetic instructions
42 (define_insn_reservation "pj4_alu_e1" 1
43 (and (eq_attr "tune" "marvell_pj4")
44 (eq_attr "type" "simple_alu_imm,alu_reg")
45 (not (eq_attr "conds" "set"))
46 (eq_attr "insn" "mov,mvn"))
47 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
49 (define_insn_reservation "pj4_alu_e1_conds" 4
50 (and (eq_attr "tune" "marvell_pj4")
51 (eq_attr "type" "simple_alu_imm,alu_reg")
52 (eq_attr "conds" "set")
53 (eq_attr "insn" "mov,mvn"))
54 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
56 (define_insn_reservation "pj4_alu" 1
57 (and (eq_attr "tune" "marvell_pj4")
58 (eq_attr "type" "simple_alu_imm,alu_reg")
59 (not (eq_attr "conds" "set"))
60 (not (eq_attr "insn" "mov,mvn")))
61 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
63 (define_insn_reservation "pj4_alu_conds" 4
64 (and (eq_attr "tune" "marvell_pj4")
65 (eq_attr "type" "simple_alu_imm,alu_reg")
66 (eq_attr "conds" "set")
67 (not (eq_attr "insn" "mov,mvn")))
68 "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
70 (define_insn_reservation "pj4_shift" 1
71 (and (eq_attr "tune" "marvell_pj4")
72 (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift")
73 (not (eq_attr "conds" "set"))
74 (eq_attr "shift" "1")) "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
76 (define_insn_reservation "pj4_shift_conds" 4
77 (and (eq_attr "tune" "marvell_pj4")
78 (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift")
79 (eq_attr "conds" "set")
80 (eq_attr "shift" "1")) "pj4_is,(pj4_alu1,pj4_w1+pj4_cp)|(pj4_alu2,pj4_w2+pj4_cp)")
82 (define_insn_reservation "pj4_alu_shift" 1
83 (and (eq_attr "tune" "marvell_pj4")
84 (not (eq_attr "conds" "set"))
85 (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift"))
86 "pj4_is,(pj4_alu1,nothing,pj4_w1+pj4_cp)|(pj4_alu2,nothing,pj4_w2+pj4_cp)")
88 (define_insn_reservation "pj4_alu_shift_conds" 4
89 (and (eq_attr "tune" "marvell_pj4")
90 (eq_attr "conds" "set")
91 (eq_attr "type" "alu_shift,alu_shift_reg,simple_alu_shift"))
92 "pj4_is,(pj4_alu1,nothing,pj4_w1+pj4_cp)|(pj4_alu2,nothing,pj4_w2+pj4_cp)")
94 (define_bypass 2 "pj4_alu_shift,pj4_shift"
95 "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp")
97 (define_insn_reservation "pj4_ir_mul" 3
98 (and (eq_attr "tune" "marvell_pj4") (eq_attr "type" "mult")) "pj4_is,pj4_mul,nothing*2,pj4_cp")
100 (define_insn_reservation "pj4_ir_div" 20
101 (and (eq_attr "tune" "marvell_pj4") (eq_attr "insn" "udiv,sdiv")) "pj4_is,pj4_div*19,pj4_cp")
103 ;; Branches and calls.
105 (define_insn_reservation "pj4_branches" 0
106 (and (eq_attr "tune" "marvell_pj4") (eq_attr "type" "branch")) "pj4_is")
108 (define_insn_reservation "pj4_calls" 32
109 (and (eq_attr "tune" "marvell_pj4") (eq_attr "type" "call")) "pj4_is")
111 ;; Load/store instructions
113 (define_insn_reservation "pj4_ldr" 3
114 (and (eq_attr "tune" "marvell_pj4")
115 (eq_attr "type" "load_byte,load1"))
116 "pj4_is,pj4_alu1,nothing*2,pj4_cp")
118 (define_insn_reservation "pj4_ldrd" 3
119 (and (eq_attr "tune" "marvell_pj4")
120 (eq_attr "type" "load2"))
121 "pj4_is,pj4_alu1,nothing*2,pj4_cpb")
123 (define_insn_reservation "pj4_str" 1
124 (and (eq_attr "tune" "marvell_pj4")
125 (eq_attr "type" "store1"))
126 "pj4_is,pj4_alu1,nothing*2,pj4_cp")
128 (define_insn_reservation "pj4_strd" 1
129 (and (eq_attr "tune" "marvell_pj4")
130 (eq_attr "type" "store2"))
131 "pj4_is,pj4_alu1,nothing*2,pj4_cpb")
133 (define_insn_reservation "pj4_ldm" 4
134 (and (eq_attr "tune" "marvell_pj4")
135 (eq_attr "type" "load3,load4")) "pj4_isb,pj4_isb+pj4_alu1,pj4_alu1,nothing,pj4_cp,pj4_cp")
137 (define_insn_reservation "pj4_stm" 2
138 (and (eq_attr "tune" "marvell_pj4")
139 (eq_attr "type" "store3,store4")) "pj4_isb,pj4_isb+pj4_alu1,pj4_alu1,nothing,pj4_cp,pj4_cp")
141 ;; Loads forward at WR-stage to ALU pipes
142 (define_bypass 2 "pj4_ldr,pj4_ldrd" "pj4_alu")
143 (define_bypass 2 "pj4_ldr,pj4_ldrd" "pj4_alu_shift" "arm_no_early_alu_shift_dep")
145 (define_bypass 4 "pj4_ldr,pj4_ldrd" "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp")
146 (define_bypass 5 "pj4_ldm" "pj4_ir_mul,pj4_ir_div,pj4_core_to_vfp")
148 ;; Loads to stores can back-to-back forward
149 (define_bypass 1 "pj4_ldr,pj4_ldrd" "pj4_str,pj4_strd" "arm_no_early_store_addr_dep")
151 ;; PJ4 VFP floating point unit
152 (define_automaton "pj4_vfp")
154 (define_cpu_unit "vissue" "pj4_vfp")
155 (define_cpu_unit "vadd" "pj4_vfp")
156 (define_cpu_unit "vmul" "pj4_vfp")
157 (define_cpu_unit "vdiv" "pj4_vfp")
158 (define_cpu_unit "vfast" "pj4_vfp")
160 (define_insn_reservation "pj4_vfp_add" 5
161 (and (eq_attr "tune" "marvell_pj4")
162 (eq_attr "type" "fadds,faddd")) "pj4_is,nothing*2,vissue,vadd,nothing*3")
164 (define_insn_reservation "pj4_vfp_mul" 6
165 (and (eq_attr "tune" "marvell_pj4")
166 (eq_attr "type" "fmuls,fmuld")) "pj4_is,nothing*2,vissue,vmul,nothing*4")
168 (define_insn_reservation "pj4_vfp_divs" 20
169 (and (eq_attr "tune" "marvell_pj4")
170 (eq_attr "type" "fdivs")) "pj4_is,nothing*2,vissue,vdiv*18,nothing")
172 (define_insn_reservation "pj4_vfp_divd" 34
173 (and (eq_attr "tune" "marvell_pj4")
174 (eq_attr "type" "fdivd")) "pj4_is,nothing*2,vissue,vdiv*32,nothing")
176 (define_insn_reservation "pj4_vfp_mac" 9
177 (and (eq_attr "tune" "marvell_pj4")
178 (eq_attr "type" "fmacs,fmacd"))
179 "pj4_is,nothing*2,vissue,vmul,nothing*3,vadd,nothing*3")
181 (define_bypass 5 "pj4_vfp_mac" "pj4_vfp_mac" "arm_no_early_mul_dep")
183 (define_insn_reservation "pj4_vfp_cpy" 4
184 (and (eq_attr "tune" "marvell_pj4")
185 (eq_attr "type" "fcpys,ffariths,ffarithd,fconsts,fconstd,\
186 fcmps,fcmpd,f_cvt")) "pj4_is,nothing*2,vissue,vfast,nothing*2")
188 ;; Enlarge latency, and wish that more nondependent insns are
189 ;; scheduled immediately after VFP load.
190 (define_insn_reservation "pj4_vfp_load" 4
191 (and (eq_attr "tune" "marvell_pj4")
192 (eq_attr "type" "f_loads,f_loadd")) "pj4_isb,pj4_alu1,nothing,vissue,pj4_cp")
194 (define_insn_reservation "pj4_vfp_store" 1
195 (and (eq_attr "tune" "marvell_pj4")
196 (eq_attr "type" "f_stores,f_stored")) "pj4_isb,pj4_alu1,nothing,vissue,pj4_cp")
198 (define_insn_reservation "pj4_vfp_to_core" 7
199 (and (eq_attr "tune" "marvell_pj4")
200 (eq_attr "type" "f_2_r,f_flag")) "pj4_isb,nothing,nothing,vissue,vfast,nothing*2")
202 (define_insn_reservation "pj4_core_to_vfp" 2
203 (and (eq_attr "tune" "marvell_pj4")
204 (eq_attr "type" "r_2_f")) "pj4_isb,pj4_alu1,pj4_w1,vissue,pj4_cp")