1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006 Free Software Foundation,
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
31 init_reload actually has to be called earlier anyway.
33 To scan an insn, call `find_reloads'. This does two things:
34 1. sets up tables describing which values must be reloaded
35 for this insn, and what kind of hard regs they must be reloaded into;
36 2. optionally record the locations where those values appear in
37 the data, so they can be replaced properly later.
38 This is done only if the second arg to `find_reloads' is nonzero.
40 The third arg to `find_reloads' specifies the number of levels
41 of indirect addressing supported by the machine. If it is zero,
42 indirect addressing is not valid. If it is one, (MEM (REG n))
43 is valid even if (REG n) did not get a hard register; if it is two,
44 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
45 hard register, and similarly for higher values.
47 Then you must choose the hard regs to reload those pseudo regs into,
48 and generate appropriate load insns before this insn and perhaps
49 also store insns after this insn. Set up the array `reload_reg_rtx'
50 to contain the REG rtx's for the registers you used. In some
51 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
52 for certain reloads. Then that tells you which register to use,
53 so you do not need to allocate one. But you still do need to add extra
54 instructions to copy the value into and out of that register.
56 Finally you must call `subst_reloads' to substitute the reload reg rtx's
57 into the locations already recorded.
61 find_reloads can alter the operands of the instruction it is called on.
63 1. Two operands of any sort may be interchanged, if they are in a
64 commutative instruction.
65 This happens only if find_reloads thinks the instruction will compile
68 2. Pseudo-registers that are equivalent to constants are replaced
69 with those constants if they are not in hard registers.
71 1 happens every time find_reloads is called.
72 2 happens only when REPLACE is 1, which is only when
73 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
93 #include "coretypes.h"
97 #include "insn-config.h"
103 #include "addresses.h"
104 #include "hard-reg-set.h"
108 #include "function.h"
113 /* True if X is a constant that can be forced into the constant pool. */
114 #define CONST_POOL_OK_P(X) \
116 && GET_CODE (X) != HIGH \
117 && !targetm.cannot_force_const_mem (X))
119 /* True if C is a non-empty register class that has too few registers
120 to be safely used as a reload target class. */
121 #define SMALL_REGISTER_CLASS_P(C) \
122 (reg_class_size [(C)] == 1 \
123 || (reg_class_size [(C)] >= 1 && CLASS_LIKELY_SPILLED_P (C)))
126 /* All reloads of the current insn are recorded here. See reload.h for
129 struct reload rld
[MAX_RELOADS
];
131 /* All the "earlyclobber" operands of the current insn
132 are recorded here. */
134 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
136 int reload_n_operands
;
138 /* Replacing reloads.
140 If `replace_reloads' is nonzero, then as each reload is recorded
141 an entry is made for it in the table `replacements'.
142 Then later `subst_reloads' can look through that table and
143 perform all the replacements needed. */
145 /* Nonzero means record the places to replace. */
146 static int replace_reloads
;
148 /* Each replacement is recorded with a structure like this. */
151 rtx
*where
; /* Location to store in */
152 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
153 a SUBREG; 0 otherwise. */
154 int what
; /* which reload this is for */
155 enum machine_mode mode
; /* mode it must have */
158 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
160 /* Number of replacements currently recorded. */
161 static int n_replacements
;
163 /* Used to track what is modified by an operand. */
166 int reg_flag
; /* Nonzero if referencing a register. */
167 int safe
; /* Nonzero if this can't conflict with anything. */
168 rtx base
; /* Base address for MEM. */
169 HOST_WIDE_INT start
; /* Starting offset or register number. */
170 HOST_WIDE_INT end
; /* Ending offset or register number. */
173 #ifdef SECONDARY_MEMORY_NEEDED
175 /* Save MEMs needed to copy from one class of registers to another. One MEM
176 is used per mode, but normally only one or two modes are ever used.
178 We keep two versions, before and after register elimination. The one
179 after register elimination is record separately for each operand. This
180 is done in case the address is not valid to be sure that we separately
183 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
184 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
185 static int secondary_memlocs_elim_used
= 0;
188 /* The instruction we are doing reloads for;
189 so we can test whether a register dies in it. */
190 static rtx this_insn
;
192 /* Nonzero if this instruction is a user-specified asm with operands. */
193 static int this_insn_is_asm
;
195 /* If hard_regs_live_known is nonzero,
196 we can tell which hard regs are currently live,
197 at least enough to succeed in choosing dummy reloads. */
198 static int hard_regs_live_known
;
200 /* Indexed by hard reg number,
201 element is nonnegative if hard reg has been spilled.
202 This vector is passed to `find_reloads' as an argument
203 and is not changed here. */
204 static short *static_reload_reg_p
;
206 /* Set to 1 in subst_reg_equivs if it changes anything. */
207 static int subst_reg_equivs_changed
;
209 /* On return from push_reload, holds the reload-number for the OUT
210 operand, which can be different for that from the input operand. */
211 static int output_reloadnum
;
213 /* Compare two RTX's. */
214 #define MATCHES(x, y) \
215 (x == y || (x != 0 && (REG_P (x) \
216 ? REG_P (y) && REGNO (x) == REGNO (y) \
217 : rtx_equal_p (x, y) && ! side_effects_p (x))))
219 /* Indicates if two reloads purposes are for similar enough things that we
220 can merge their reloads. */
221 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
222 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
223 || ((when1) == (when2) && (op1) == (op2)) \
224 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
225 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
226 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
227 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
228 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
230 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
231 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
232 ((when1) != (when2) \
233 || ! ((op1) == (op2) \
234 || (when1) == RELOAD_FOR_INPUT \
235 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
236 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
238 /* If we are going to reload an address, compute the reload type to
240 #define ADDR_TYPE(type) \
241 ((type) == RELOAD_FOR_INPUT_ADDRESS \
242 ? RELOAD_FOR_INPADDR_ADDRESS \
243 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
244 ? RELOAD_FOR_OUTADDR_ADDRESS \
247 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
248 enum machine_mode
, enum reload_type
,
249 enum insn_code
*, secondary_reload_info
*);
250 static enum reg_class
find_valid_class (enum machine_mode
, enum machine_mode
,
252 static int reload_inner_reg_of_subreg (rtx
, enum machine_mode
, int);
253 static void push_replacement (rtx
*, int, enum machine_mode
);
254 static void dup_replacements (rtx
*, rtx
*);
255 static void combine_reloads (void);
256 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
257 enum reload_type
, int, int);
258 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, enum machine_mode
,
259 enum machine_mode
, enum reg_class
, int, int);
260 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
261 static struct decomposition
decompose (rtx
);
262 static int immune_p (rtx
, rtx
, struct decomposition
);
263 static int alternative_allows_memconst (const char *, int);
264 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int, rtx
,
266 static rtx
make_memloc (rtx
, int);
267 static int maybe_memory_address_p (enum machine_mode
, rtx
, rtx
*);
268 static int find_reloads_address (enum machine_mode
, rtx
*, rtx
, rtx
*,
269 int, enum reload_type
, int, rtx
);
270 static rtx
subst_reg_equivs (rtx
, rtx
);
271 static rtx
subst_indexed_address (rtx
);
272 static void update_auto_inc_notes (rtx
, int, int);
273 static int find_reloads_address_1 (enum machine_mode
, rtx
, int,
274 enum rtx_code
, enum rtx_code
, rtx
*,
275 int, enum reload_type
,int, rtx
);
276 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
277 enum machine_mode
, int,
278 enum reload_type
, int);
279 static rtx
find_reloads_subreg_address (rtx
, int, int, enum reload_type
,
281 static void copy_replacements_1 (rtx
*, rtx
*, int);
282 static int find_inc_amount (rtx
, rtx
);
283 static int refers_to_mem_for_reload_p (rtx
);
284 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
287 /* Determine if any secondary reloads are needed for loading (if IN_P is
288 nonzero) or storing (if IN_P is zero) X to or from a reload register of
289 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
290 are needed, push them.
292 Return the reload number of the secondary reload we made, or -1 if
293 we didn't need one. *PICODE is set to the insn_code to use if we do
294 need a secondary reload. */
297 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
298 enum reg_class reload_class
,
299 enum machine_mode reload_mode
, enum reload_type type
,
300 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
302 enum reg_class
class = NO_REGS
;
303 enum reg_class scratch_class
;
304 enum machine_mode mode
= reload_mode
;
305 enum insn_code icode
= CODE_FOR_nothing
;
306 enum insn_code t_icode
= CODE_FOR_nothing
;
307 enum reload_type secondary_type
;
308 int s_reload
, t_reload
= -1;
309 const char *scratch_constraint
;
311 secondary_reload_info sri
;
313 if (type
== RELOAD_FOR_INPUT_ADDRESS
314 || type
== RELOAD_FOR_OUTPUT_ADDRESS
315 || type
== RELOAD_FOR_INPADDR_ADDRESS
316 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
317 secondary_type
= type
;
319 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
321 *picode
= CODE_FOR_nothing
;
323 /* If X is a paradoxical SUBREG, use the inner value to determine both the
324 mode and object being reloaded. */
325 if (GET_CODE (x
) == SUBREG
326 && (GET_MODE_SIZE (GET_MODE (x
))
327 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
330 reload_mode
= GET_MODE (x
);
333 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
334 is still a pseudo-register by now, it *must* have an equivalent MEM
335 but we don't want to assume that), use that equivalent when seeing if
336 a secondary reload is needed since whether or not a reload is needed
337 might be sensitive to the form of the MEM. */
339 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
340 && reg_equiv_mem
[REGNO (x
)] != 0)
341 x
= reg_equiv_mem
[REGNO (x
)];
343 sri
.icode
= CODE_FOR_nothing
;
344 sri
.prev_sri
= prev_sri
;
345 class = targetm
.secondary_reload (in_p
, x
, reload_class
, reload_mode
, &sri
);
348 /* If we don't need any secondary registers, done. */
349 if (class == NO_REGS
&& icode
== CODE_FOR_nothing
)
352 if (class != NO_REGS
)
353 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, class,
354 reload_mode
, type
, &t_icode
, &sri
);
356 /* If we will be using an insn, the secondary reload is for a
359 if (icode
!= CODE_FOR_nothing
)
361 /* If IN_P is nonzero, the reload register will be the output in
362 operand 0. If IN_P is zero, the reload register will be the input
363 in operand 1. Outputs should have an initial "=", which we must
366 /* ??? It would be useful to be able to handle only two, or more than
367 three, operands, but for now we can only handle the case of having
368 exactly three: output, input and one temp/scratch. */
369 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
371 /* ??? We currently have no way to represent a reload that needs
372 an icode to reload from an intermediate tertiary reload register.
373 We should probably have a new field in struct reload to tag a
374 chain of scratch operand reloads onto. */
375 gcc_assert (class == NO_REGS
);
377 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
378 gcc_assert (*scratch_constraint
== '=');
379 scratch_constraint
++;
380 if (*scratch_constraint
== '&')
381 scratch_constraint
++;
382 letter
= *scratch_constraint
;
383 scratch_class
= (letter
== 'r' ? GENERAL_REGS
384 : REG_CLASS_FROM_CONSTRAINT ((unsigned char) letter
,
385 scratch_constraint
));
387 class = scratch_class
;
388 mode
= insn_data
[(int) icode
].operand
[2].mode
;
391 /* This case isn't valid, so fail. Reload is allowed to use the same
392 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
393 in the case of a secondary register, we actually need two different
394 registers for correct code. We fail here to prevent the possibility of
395 silently generating incorrect code later.
397 The convention is that secondary input reloads are valid only if the
398 secondary_class is different from class. If you have such a case, you
399 can not use secondary reloads, you must work around the problem some
402 Allow this when a reload_in/out pattern is being used. I.e. assume
403 that the generated code handles this case. */
405 gcc_assert (!in_p
|| class != reload_class
|| icode
!= CODE_FOR_nothing
406 || t_icode
!= CODE_FOR_nothing
);
408 /* See if we can reuse an existing secondary reload. */
409 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
410 if (rld
[s_reload
].secondary_p
411 && (reg_class_subset_p (class, rld
[s_reload
].class)
412 || reg_class_subset_p (rld
[s_reload
].class, class))
413 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
414 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
415 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
416 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
417 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
418 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
419 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
420 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
421 opnum
, rld
[s_reload
].opnum
))
424 rld
[s_reload
].inmode
= mode
;
426 rld
[s_reload
].outmode
= mode
;
428 if (reg_class_subset_p (class, rld
[s_reload
].class))
429 rld
[s_reload
].class = class;
431 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
432 rld
[s_reload
].optional
&= optional
;
433 rld
[s_reload
].secondary_p
= 1;
434 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
435 opnum
, rld
[s_reload
].opnum
))
436 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
439 if (s_reload
== n_reloads
)
441 #ifdef SECONDARY_MEMORY_NEEDED
442 /* If we need a memory location to copy between the two reload regs,
443 set it up now. Note that we do the input case before making
444 the reload and the output case after. This is due to the
445 way reloads are output. */
447 if (in_p
&& icode
== CODE_FOR_nothing
448 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
450 get_secondary_mem (x
, reload_mode
, opnum
, type
);
452 /* We may have just added new reloads. Make sure we add
453 the new reload at the end. */
454 s_reload
= n_reloads
;
458 /* We need to make a new secondary reload for this register class. */
459 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
460 rld
[s_reload
].class = class;
462 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
463 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
464 rld
[s_reload
].reg_rtx
= 0;
465 rld
[s_reload
].optional
= optional
;
466 rld
[s_reload
].inc
= 0;
467 /* Maybe we could combine these, but it seems too tricky. */
468 rld
[s_reload
].nocombine
= 1;
469 rld
[s_reload
].in_reg
= 0;
470 rld
[s_reload
].out_reg
= 0;
471 rld
[s_reload
].opnum
= opnum
;
472 rld
[s_reload
].when_needed
= secondary_type
;
473 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
474 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
475 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
476 rld
[s_reload
].secondary_out_icode
477 = ! in_p
? t_icode
: CODE_FOR_nothing
;
478 rld
[s_reload
].secondary_p
= 1;
482 #ifdef SECONDARY_MEMORY_NEEDED
483 if (! in_p
&& icode
== CODE_FOR_nothing
484 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
485 get_secondary_mem (x
, mode
, opnum
, type
);
493 /* If a secondary reload is needed, return its class. If both an intermediate
494 register and a scratch register is needed, we return the class of the
495 intermediate register. */
497 secondary_reload_class (bool in_p
, enum reg_class
class,
498 enum machine_mode mode
, rtx x
)
500 enum insn_code icode
;
501 secondary_reload_info sri
;
503 sri
.icode
= CODE_FOR_nothing
;
505 class = targetm
.secondary_reload (in_p
, x
, class, mode
, &sri
);
508 /* If there are no secondary reloads at all, we return NO_REGS.
509 If an intermediate register is needed, we return its class. */
510 if (icode
== CODE_FOR_nothing
|| class != NO_REGS
)
513 /* No intermediate register is needed, but we have a special reload
514 pattern, which we assume for now needs a scratch register. */
515 return scratch_reload_class (icode
);
518 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
519 three operands, verify that operand 2 is an output operand, and return
521 ??? We'd like to be able to handle any pattern with at least 2 operands,
522 for zero or more scratch registers, but that needs more infrastructure. */
524 scratch_reload_class (enum insn_code icode
)
526 const char *scratch_constraint
;
528 enum reg_class
class;
530 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
531 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
532 gcc_assert (*scratch_constraint
== '=');
533 scratch_constraint
++;
534 if (*scratch_constraint
== '&')
535 scratch_constraint
++;
536 scratch_letter
= *scratch_constraint
;
537 if (scratch_letter
== 'r')
539 class = REG_CLASS_FROM_CONSTRAINT ((unsigned char) scratch_letter
,
541 gcc_assert (class != NO_REGS
);
545 #ifdef SECONDARY_MEMORY_NEEDED
547 /* Return a memory location that will be used to copy X in mode MODE.
548 If we haven't already made a location for this mode in this insn,
549 call find_reloads_address on the location being returned. */
552 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, enum machine_mode mode
,
553 int opnum
, enum reload_type type
)
558 /* By default, if MODE is narrower than a word, widen it to a word.
559 This is required because most machines that require these memory
560 locations do not support short load and stores from all registers
561 (e.g., FP registers). */
563 #ifdef SECONDARY_MEMORY_NEEDED_MODE
564 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
566 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
567 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
570 /* If we already have made a MEM for this operand in MODE, return it. */
571 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
572 return secondary_memlocs_elim
[(int) mode
][opnum
];
574 /* If this is the first time we've tried to get a MEM for this mode,
575 allocate a new one. `something_changed' in reload will get set
576 by noticing that the frame size has changed. */
578 if (secondary_memlocs
[(int) mode
] == 0)
580 #ifdef SECONDARY_MEMORY_NEEDED_RTX
581 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
583 secondary_memlocs
[(int) mode
]
584 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
588 /* Get a version of the address doing any eliminations needed. If that
589 didn't give us a new MEM, make a new one if it isn't valid. */
591 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
592 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
594 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
595 loc
= copy_rtx (loc
);
597 /* The only time the call below will do anything is if the stack
598 offset is too large. In that case IND_LEVELS doesn't matter, so we
599 can just pass a zero. Adjust the type to be the address of the
600 corresponding object. If the address was valid, save the eliminated
601 address. If it wasn't valid, we need to make a reload each time, so
606 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
607 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
610 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
614 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
615 if (secondary_memlocs_elim_used
<= (int)mode
)
616 secondary_memlocs_elim_used
= (int)mode
+ 1;
620 /* Clear any secondary memory locations we've made. */
623 clear_secondary_mem (void)
625 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
627 #endif /* SECONDARY_MEMORY_NEEDED */
630 /* Find the largest class which has at least one register valid in
631 mode INNER, and which for every such register, that register number
632 plus N is also valid in OUTER (if in range) and is cheap to move
633 into REGNO. Such a class must exist. */
635 static enum reg_class
636 find_valid_class (enum machine_mode outer ATTRIBUTE_UNUSED
,
637 enum machine_mode inner ATTRIBUTE_UNUSED
, int n
,
638 unsigned int dest_regno ATTRIBUTE_UNUSED
)
643 enum reg_class best_class
= NO_REGS
;
644 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
645 unsigned int best_size
= 0;
648 for (class = 1; class < N_REG_CLASSES
; class++)
652 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
653 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
))
655 if (HARD_REGNO_MODE_OK (regno
, inner
))
658 if (! TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
659 || ! HARD_REGNO_MODE_OK (regno
+ n
, outer
))
666 cost
= REGISTER_MOVE_COST (outer
, class, dest_class
);
668 if ((reg_class_size
[class] > best_size
669 && (best_cost
< 0 || best_cost
>= cost
))
673 best_size
= reg_class_size
[class];
674 best_cost
= REGISTER_MOVE_COST (outer
, class, dest_class
);
678 gcc_assert (best_size
!= 0);
683 /* Return the number of a previously made reload that can be combined with
684 a new one, or n_reloads if none of the existing reloads can be used.
685 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
686 push_reload, they determine the kind of the new reload that we try to
687 combine. P_IN points to the corresponding value of IN, which can be
688 modified by this function.
689 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
692 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class
class,
693 enum reload_type type
, int opnum
, int dont_share
)
697 /* We can't merge two reloads if the output of either one is
700 if (earlyclobber_operand_p (out
))
703 /* We can use an existing reload if the class is right
704 and at least one of IN and OUT is a match
705 and the other is at worst neutral.
706 (A zero compared against anything is neutral.)
708 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
709 for the same thing since that can cause us to need more reload registers
710 than we otherwise would. */
712 for (i
= 0; i
< n_reloads
; i
++)
713 if ((reg_class_subset_p (class, rld
[i
].class)
714 || reg_class_subset_p (rld
[i
].class, class))
715 /* If the existing reload has a register, it must fit our class. */
716 && (rld
[i
].reg_rtx
== 0
717 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
718 true_regnum (rld
[i
].reg_rtx
)))
719 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
720 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
721 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
722 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
723 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
724 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
725 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
728 /* Reloading a plain reg for input can match a reload to postincrement
729 that reg, since the postincrement's value is the right value.
730 Likewise, it can match a preincrement reload, since we regard
731 the preincrementation as happening before any ref in this insn
733 for (i
= 0; i
< n_reloads
; i
++)
734 if ((reg_class_subset_p (class, rld
[i
].class)
735 || reg_class_subset_p (rld
[i
].class, class))
736 /* If the existing reload has a register, it must fit our
738 && (rld
[i
].reg_rtx
== 0
739 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
740 true_regnum (rld
[i
].reg_rtx
)))
741 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
743 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
744 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
745 || (REG_P (rld
[i
].in
)
746 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
747 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
748 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
749 && (SMALL_REGISTER_CLASS_P (class) || SMALL_REGISTER_CLASSES
)
750 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
751 opnum
, rld
[i
].opnum
))
753 /* Make sure reload_in ultimately has the increment,
754 not the plain register. */
762 /* Return nonzero if X is a SUBREG which will require reloading of its
763 SUBREG_REG expression. */
766 reload_inner_reg_of_subreg (rtx x
, enum machine_mode mode
, int output
)
770 /* Only SUBREGs are problematical. */
771 if (GET_CODE (x
) != SUBREG
)
774 inner
= SUBREG_REG (x
);
776 /* If INNER is a constant or PLUS, then INNER must be reloaded. */
777 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
780 /* If INNER is not a hard register, then INNER will not need to
783 || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
786 /* If INNER is not ok for MODE, then INNER will need reloading. */
787 if (! HARD_REGNO_MODE_OK (subreg_regno (x
), mode
))
790 /* If the outer part is a word or smaller, INNER larger than a
791 word and the number of regs for INNER is not the same as the
792 number of words in INNER, then INNER will need reloading. */
793 return (GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
795 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
796 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
797 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
800 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
801 requiring an extra reload register. The caller has already found that
802 IN contains some reference to REGNO, so check that we can produce the
803 new value in a single step. E.g. if we have
804 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
805 instruction that adds one to a register, this should succeed.
806 However, if we have something like
807 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
808 needs to be loaded into a register first, we need a separate reload
810 Such PLUS reloads are generated by find_reload_address_part.
811 The out-of-range PLUS expressions are usually introduced in the instruction
812 patterns by register elimination and substituting pseudos without a home
813 by their function-invariant equivalences. */
815 can_reload_into (rtx in
, int regno
, enum machine_mode mode
)
819 struct recog_data save_recog_data
;
821 /* For matching constraints, we often get notional input reloads where
822 we want to use the original register as the reload register. I.e.
823 technically this is a non-optional input-output reload, but IN is
824 already a valid register, and has been chosen as the reload register.
825 Speed this up, since it trivially works. */
829 /* To test MEMs properly, we'd have to take into account all the reloads
830 that are already scheduled, which can become quite complicated.
831 And since we've already handled address reloads for this MEM, it
832 should always succeed anyway. */
836 /* If we can make a simple SET insn that does the job, everything should
838 dst
= gen_rtx_REG (mode
, regno
);
839 test_insn
= make_insn_raw (gen_rtx_SET (VOIDmode
, dst
, in
));
840 save_recog_data
= recog_data
;
841 if (recog_memoized (test_insn
) >= 0)
843 extract_insn (test_insn
);
844 r
= constrain_operands (1);
846 recog_data
= save_recog_data
;
850 /* Record one reload that needs to be performed.
851 IN is an rtx saying where the data are to be found before this instruction.
852 OUT says where they must be stored after the instruction.
853 (IN is zero for data not read, and OUT is zero for data not written.)
854 INLOC and OUTLOC point to the places in the instructions where
855 IN and OUT were found.
856 If IN and OUT are both nonzero, it means the same register must be used
857 to reload both IN and OUT.
859 CLASS is a register class required for the reloaded data.
860 INMODE is the machine mode that the instruction requires
861 for the reg that replaces IN and OUTMODE is likewise for OUT.
863 If IN is zero, then OUT's location and mode should be passed as
866 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
868 OPTIONAL nonzero means this reload does not need to be performed:
869 it can be discarded if that is more convenient.
871 OPNUM and TYPE say what the purpose of this reload is.
873 The return value is the reload-number for this reload.
875 If both IN and OUT are nonzero, in some rare cases we might
876 want to make two separate reloads. (Actually we never do this now.)
877 Therefore, the reload-number for OUT is stored in
878 output_reloadnum when we return; the return value applies to IN.
879 Usually (presently always), when IN and OUT are nonzero,
880 the two reload-numbers are equal, but the caller should be careful to
884 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
885 enum reg_class
class, enum machine_mode inmode
,
886 enum machine_mode outmode
, int strict_low
, int optional
,
887 int opnum
, enum reload_type type
)
891 int dont_remove_subreg
= 0;
892 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
893 int secondary_in_reload
= -1, secondary_out_reload
= -1;
894 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
895 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
897 /* INMODE and/or OUTMODE could be VOIDmode if no mode
898 has been specified for the operand. In that case,
899 use the operand's mode as the mode to reload. */
900 if (inmode
== VOIDmode
&& in
!= 0)
901 inmode
= GET_MODE (in
);
902 if (outmode
== VOIDmode
&& out
!= 0)
903 outmode
= GET_MODE (out
);
905 /* If IN is a pseudo register everywhere-equivalent to a constant, and
906 it is not in a hard register, reload straight from the constant,
907 since we want to get rid of such pseudo registers.
908 Often this is done earlier, but not always in find_reloads_address. */
909 if (in
!= 0 && REG_P (in
))
911 int regno
= REGNO (in
);
913 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
914 && reg_equiv_constant
[regno
] != 0)
915 in
= reg_equiv_constant
[regno
];
918 /* Likewise for OUT. Of course, OUT will never be equivalent to
919 an actual constant, but it might be equivalent to a memory location
920 (in the case of a parameter). */
921 if (out
!= 0 && REG_P (out
))
923 int regno
= REGNO (out
);
925 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
926 && reg_equiv_constant
[regno
] != 0)
927 out
= reg_equiv_constant
[regno
];
930 /* If we have a read-write operand with an address side-effect,
931 change either IN or OUT so the side-effect happens only once. */
932 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
933 switch (GET_CODE (XEXP (in
, 0)))
935 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
936 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
939 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
940 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
947 /* If we are reloading a (SUBREG constant ...), really reload just the
948 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
949 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
950 a pseudo and hence will become a MEM) with M1 wider than M2 and the
951 register is a pseudo, also reload the inside expression.
952 For machines that extend byte loads, do this for any SUBREG of a pseudo
953 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
954 M2 is an integral mode that gets extended when loaded.
955 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
956 either M1 is not valid for R or M2 is wider than a word but we only
957 need one word to store an M2-sized quantity in R.
958 (However, if OUT is nonzero, we need to reload the reg *and*
959 the subreg, so do nothing here, and let following statement handle it.)
961 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
962 we can't handle it here because CONST_INT does not indicate a mode.
964 Similarly, we must reload the inside expression if we have a
965 STRICT_LOW_PART (presumably, in == out in the cas).
967 Also reload the inner expression if it does not require a secondary
968 reload but the SUBREG does.
970 Finally, reload the inner expression if it is a register that is in
971 the class whose registers cannot be referenced in a different size
972 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
973 cannot reload just the inside since we might end up with the wrong
974 register class. But if it is inside a STRICT_LOW_PART, we have
975 no choice, so we hope we do get the right register class there. */
977 if (in
!= 0 && GET_CODE (in
) == SUBREG
978 && (subreg_lowpart_p (in
) || strict_low
)
979 #ifdef CANNOT_CHANGE_MODE_CLASS
980 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, class)
982 && (CONSTANT_P (SUBREG_REG (in
))
983 || GET_CODE (SUBREG_REG (in
)) == PLUS
985 || (((REG_P (SUBREG_REG (in
))
986 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
987 || MEM_P (SUBREG_REG (in
)))
988 && ((GET_MODE_SIZE (inmode
)
989 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
990 #ifdef LOAD_EXTEND_OP
991 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
992 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
994 && (GET_MODE_SIZE (inmode
)
995 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
996 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
997 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != UNKNOWN
)
999 #ifdef WORD_REGISTER_OPERATIONS
1000 || ((GET_MODE_SIZE (inmode
)
1001 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
1002 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1003 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1007 || (REG_P (SUBREG_REG (in
))
1008 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1009 /* The case where out is nonzero
1010 is handled differently in the following statement. */
1011 && (out
== 0 || subreg_lowpart_p (in
))
1012 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1013 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1015 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1017 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1018 [GET_MODE (SUBREG_REG (in
))]))
1019 || ! HARD_REGNO_MODE_OK (subreg_regno (in
), inmode
)))
1020 || (secondary_reload_class (1, class, inmode
, in
) != NO_REGS
1021 && (secondary_reload_class (1, class, GET_MODE (SUBREG_REG (in
)),
1024 #ifdef CANNOT_CHANGE_MODE_CLASS
1025 || (REG_P (SUBREG_REG (in
))
1026 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1027 && REG_CANNOT_CHANGE_MODE_P
1028 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1032 in_subreg_loc
= inloc
;
1033 inloc
= &SUBREG_REG (in
);
1035 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1037 /* This is supposed to happen only for paradoxical subregs made by
1038 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1039 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1041 inmode
= GET_MODE (in
);
1044 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1045 either M1 is not valid for R or M2 is wider than a word but we only
1046 need one word to store an M2-sized quantity in R.
1048 However, we must reload the inner reg *as well as* the subreg in
1051 /* Similar issue for (SUBREG constant ...) if it was not handled by the
1052 code above. This can happen if SUBREG_BYTE != 0. */
1054 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, 0))
1056 enum reg_class in_class
= class;
1058 if (REG_P (SUBREG_REG (in
)))
1060 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1061 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1062 GET_MODE (SUBREG_REG (in
)),
1065 REGNO (SUBREG_REG (in
)));
1067 /* This relies on the fact that emit_reload_insns outputs the
1068 instructions for input reloads of type RELOAD_OTHER in the same
1069 order as the reloads. Thus if the outer reload is also of type
1070 RELOAD_OTHER, we are guaranteed that this inner reload will be
1071 output before the outer reload. */
1072 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1073 in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1074 dont_remove_subreg
= 1;
1077 /* Similarly for paradoxical and problematical SUBREGs on the output.
1078 Note that there is no reason we need worry about the previous value
1079 of SUBREG_REG (out); even if wider than out,
1080 storing in a subreg is entitled to clobber it all
1081 (except in the case of STRICT_LOW_PART,
1082 and in that case the constraint should label it input-output.) */
1083 if (out
!= 0 && GET_CODE (out
) == SUBREG
1084 && (subreg_lowpart_p (out
) || strict_low
)
1085 #ifdef CANNOT_CHANGE_MODE_CLASS
1086 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, class)
1088 && (CONSTANT_P (SUBREG_REG (out
))
1090 || (((REG_P (SUBREG_REG (out
))
1091 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1092 || MEM_P (SUBREG_REG (out
)))
1093 && ((GET_MODE_SIZE (outmode
)
1094 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1095 #ifdef WORD_REGISTER_OPERATIONS
1096 || ((GET_MODE_SIZE (outmode
)
1097 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1098 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1099 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1103 || (REG_P (SUBREG_REG (out
))
1104 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1105 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1106 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1108 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1110 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (out
))]
1111 [GET_MODE (SUBREG_REG (out
))]))
1112 || ! HARD_REGNO_MODE_OK (subreg_regno (out
), outmode
)))
1113 || (secondary_reload_class (0, class, outmode
, out
) != NO_REGS
1114 && (secondary_reload_class (0, class, GET_MODE (SUBREG_REG (out
)),
1117 #ifdef CANNOT_CHANGE_MODE_CLASS
1118 || (REG_P (SUBREG_REG (out
))
1119 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1120 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1121 GET_MODE (SUBREG_REG (out
)),
1126 out_subreg_loc
= outloc
;
1127 outloc
= &SUBREG_REG (out
);
1129 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1130 gcc_assert (!MEM_P (out
)
1131 || GET_MODE_SIZE (GET_MODE (out
))
1132 <= GET_MODE_SIZE (outmode
));
1134 outmode
= GET_MODE (out
);
1137 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1138 either M1 is not valid for R or M2 is wider than a word but we only
1139 need one word to store an M2-sized quantity in R.
1141 However, we must reload the inner reg *as well as* the subreg in
1142 that case. In this case, the inner reg is an in-out reload. */
1144 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, 1))
1146 /* This relies on the fact that emit_reload_insns outputs the
1147 instructions for output reloads of type RELOAD_OTHER in reverse
1148 order of the reloads. Thus if the outer reload is also of type
1149 RELOAD_OTHER, we are guaranteed that this inner reload will be
1150 output after the outer reload. */
1151 dont_remove_subreg
= 1;
1152 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1154 find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1155 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1156 GET_MODE (SUBREG_REG (out
)),
1159 REGNO (SUBREG_REG (out
))),
1160 VOIDmode
, VOIDmode
, 0, 0,
1161 opnum
, RELOAD_OTHER
);
1164 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1165 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1166 && (REG_P (in
) || MEM_P (in
))
1167 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1170 /* If IN is a SUBREG of a hard register, make a new REG. This
1171 simplifies some of the cases below. */
1173 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1174 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1175 && ! dont_remove_subreg
)
1176 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1178 /* Similarly for OUT. */
1179 if (out
!= 0 && GET_CODE (out
) == SUBREG
1180 && REG_P (SUBREG_REG (out
))
1181 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1182 && ! dont_remove_subreg
)
1183 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1185 /* Narrow down the class of register wanted if that is
1186 desirable on this machine for efficiency. */
1188 enum reg_class preferred_class
= class;
1191 preferred_class
= PREFERRED_RELOAD_CLASS (in
, class);
1193 /* Output reloads may need analogous treatment, different in detail. */
1194 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1196 preferred_class
= PREFERRED_OUTPUT_RELOAD_CLASS (out
, preferred_class
);
1199 /* Discard what the target said if we cannot do it. */
1200 if (preferred_class
!= NO_REGS
1201 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1202 class = preferred_class
;
1205 /* Make sure we use a class that can handle the actual pseudo
1206 inside any subreg. For example, on the 386, QImode regs
1207 can appear within SImode subregs. Although GENERAL_REGS
1208 can handle SImode, QImode needs a smaller class. */
1209 #ifdef LIMIT_RELOAD_CLASS
1211 class = LIMIT_RELOAD_CLASS (inmode
, class);
1212 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1213 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1216 class = LIMIT_RELOAD_CLASS (outmode
, class);
1217 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1218 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1221 /* Verify that this class is at least possible for the mode that
1223 if (this_insn_is_asm
)
1225 enum machine_mode mode
;
1226 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1230 if (mode
== VOIDmode
)
1232 error_for_asm (this_insn
, "cannot reload integer constant "
1233 "operand in %<asm%>");
1238 outmode
= word_mode
;
1240 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1241 if (HARD_REGNO_MODE_OK (i
, mode
)
1242 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1244 int nregs
= hard_regno_nregs
[i
][mode
];
1247 for (j
= 1; j
< nregs
; j
++)
1248 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1253 if (i
== FIRST_PSEUDO_REGISTER
)
1255 error_for_asm (this_insn
, "impossible register constraint "
1257 /* Avoid further trouble with this insn. */
1258 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1259 /* We used to continue here setting class to ALL_REGS, but it triggers
1260 sanity check on i386 for:
1261 void foo(long double d)
1265 Returning zero here ought to be safe as we take care in
1266 find_reloads to not process the reloads when instruction was
1273 /* Optional output reloads are always OK even if we have no register class,
1274 since the function of these reloads is only to have spill_reg_store etc.
1275 set, so that the storing insn can be deleted later. */
1276 gcc_assert (class != NO_REGS
1277 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1279 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1283 /* See if we need a secondary reload register to move between CLASS
1284 and IN or CLASS and OUT. Get the icode and push any required reloads
1285 needed for each of them if so. */
1289 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1290 &secondary_in_icode
, NULL
);
1291 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1292 secondary_out_reload
1293 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1294 type
, &secondary_out_icode
, NULL
);
1296 /* We found no existing reload suitable for re-use.
1297 So add an additional reload. */
1299 #ifdef SECONDARY_MEMORY_NEEDED
1300 /* If a memory location is needed for the copy, make one. */
1303 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1304 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
1305 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (reg_or_subregno (in
)),
1307 get_secondary_mem (in
, inmode
, opnum
, type
);
1313 rld
[i
].class = class;
1314 rld
[i
].inmode
= inmode
;
1315 rld
[i
].outmode
= outmode
;
1317 rld
[i
].optional
= optional
;
1319 rld
[i
].nocombine
= 0;
1320 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1321 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1322 rld
[i
].opnum
= opnum
;
1323 rld
[i
].when_needed
= type
;
1324 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1325 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1326 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1327 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1328 rld
[i
].secondary_p
= 0;
1332 #ifdef SECONDARY_MEMORY_NEEDED
1335 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1336 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1337 && SECONDARY_MEMORY_NEEDED (class,
1338 REGNO_REG_CLASS (reg_or_subregno (out
)),
1340 get_secondary_mem (out
, outmode
, opnum
, type
);
1345 /* We are reusing an existing reload,
1346 but we may have additional information for it.
1347 For example, we may now have both IN and OUT
1348 while the old one may have just one of them. */
1350 /* The modes can be different. If they are, we want to reload in
1351 the larger mode, so that the value is valid for both modes. */
1352 if (inmode
!= VOIDmode
1353 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1354 rld
[i
].inmode
= inmode
;
1355 if (outmode
!= VOIDmode
1356 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1357 rld
[i
].outmode
= outmode
;
1360 rtx in_reg
= inloc
? *inloc
: 0;
1361 /* If we merge reloads for two distinct rtl expressions that
1362 are identical in content, there might be duplicate address
1363 reloads. Remove the extra set now, so that if we later find
1364 that we can inherit this reload, we can get rid of the
1365 address reloads altogether.
1367 Do not do this if both reloads are optional since the result
1368 would be an optional reload which could potentially leave
1369 unresolved address replacements.
1371 It is not sufficient to call transfer_replacements since
1372 choose_reload_regs will remove the replacements for address
1373 reloads of inherited reloads which results in the same
1375 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1376 && ! (rld
[i
].optional
&& optional
))
1378 /* We must keep the address reload with the lower operand
1380 if (opnum
> rld
[i
].opnum
)
1382 remove_address_replacements (in
);
1384 in_reg
= rld
[i
].in_reg
;
1387 remove_address_replacements (rld
[i
].in
);
1390 rld
[i
].in_reg
= in_reg
;
1395 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1397 if (reg_class_subset_p (class, rld
[i
].class))
1398 rld
[i
].class = class;
1399 rld
[i
].optional
&= optional
;
1400 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1401 opnum
, rld
[i
].opnum
))
1402 rld
[i
].when_needed
= RELOAD_OTHER
;
1403 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1406 /* If the ostensible rtx being reloaded differs from the rtx found
1407 in the location to substitute, this reload is not safe to combine
1408 because we cannot reliably tell whether it appears in the insn. */
1410 if (in
!= 0 && in
!= *inloc
)
1411 rld
[i
].nocombine
= 1;
1414 /* This was replaced by changes in find_reloads_address_1 and the new
1415 function inc_for_reload, which go with a new meaning of reload_inc. */
1417 /* If this is an IN/OUT reload in an insn that sets the CC,
1418 it must be for an autoincrement. It doesn't work to store
1419 the incremented value after the insn because that would clobber the CC.
1420 So we must do the increment of the value reloaded from,
1421 increment it, store it back, then decrement again. */
1422 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1426 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1427 /* If we did not find a nonzero amount-to-increment-by,
1428 that contradicts the belief that IN is being incremented
1429 in an address in this insn. */
1430 gcc_assert (rld
[i
].inc
!= 0);
1434 /* If we will replace IN and OUT with the reload-reg,
1435 record where they are located so that substitution need
1436 not do a tree walk. */
1438 if (replace_reloads
)
1442 struct replacement
*r
= &replacements
[n_replacements
++];
1444 r
->subreg_loc
= in_subreg_loc
;
1448 if (outloc
!= 0 && outloc
!= inloc
)
1450 struct replacement
*r
= &replacements
[n_replacements
++];
1453 r
->subreg_loc
= out_subreg_loc
;
1458 /* If this reload is just being introduced and it has both
1459 an incoming quantity and an outgoing quantity that are
1460 supposed to be made to match, see if either one of the two
1461 can serve as the place to reload into.
1463 If one of them is acceptable, set rld[i].reg_rtx
1466 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1468 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1471 earlyclobber_operand_p (out
));
1473 /* If the outgoing register already contains the same value
1474 as the incoming one, we can dispense with loading it.
1475 The easiest way to tell the caller that is to give a phony
1476 value for the incoming operand (same as outgoing one). */
1477 if (rld
[i
].reg_rtx
== out
1478 && (REG_P (in
) || CONSTANT_P (in
))
1479 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1480 static_reload_reg_p
, i
, inmode
))
1484 /* If this is an input reload and the operand contains a register that
1485 dies in this insn and is used nowhere else, see if it is the right class
1486 to be used for this reload. Use it if so. (This occurs most commonly
1487 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1488 this if it is also an output reload that mentions the register unless
1489 the output is a SUBREG that clobbers an entire register.
1491 Note that the operand might be one of the spill regs, if it is a
1492 pseudo reg and we are in a block where spilling has not taken place.
1493 But if there is no spilling in this block, that is OK.
1494 An explicitly used hard reg cannot be a spill reg. */
1496 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1500 enum machine_mode rel_mode
= inmode
;
1502 if (out
&& GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (inmode
))
1505 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1506 if (REG_NOTE_KIND (note
) == REG_DEAD
1507 && REG_P (XEXP (note
, 0))
1508 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1509 && reg_mentioned_p (XEXP (note
, 0), in
)
1510 /* Check that we don't use a hardreg for an uninitialized
1511 pseudo. See also find_dummy_reload(). */
1512 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1513 || ! bitmap_bit_p (ENTRY_BLOCK_PTR
->il
.rtl
->global_live_at_end
,
1514 ORIGINAL_REGNO (XEXP (note
, 0))))
1515 && ! refers_to_regno_for_reload_p (regno
,
1517 + hard_regno_nregs
[regno
]
1519 PATTERN (this_insn
), inloc
)
1520 /* If this is also an output reload, IN cannot be used as
1521 the reload register if it is set in this insn unless IN
1523 && (out
== 0 || in
== out
1524 || ! hard_reg_set_here_p (regno
,
1526 + hard_regno_nregs
[regno
]
1528 PATTERN (this_insn
)))
1529 /* ??? Why is this code so different from the previous?
1530 Is there any simple coherent way to describe the two together?
1531 What's going on here. */
1533 || (GET_CODE (in
) == SUBREG
1534 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1536 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1537 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1538 /* Make sure the operand fits in the reg that dies. */
1539 && (GET_MODE_SIZE (rel_mode
)
1540 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1541 && HARD_REGNO_MODE_OK (regno
, inmode
)
1542 && HARD_REGNO_MODE_OK (regno
, outmode
))
1545 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1546 hard_regno_nregs
[regno
][outmode
]);
1548 for (offs
= 0; offs
< nregs
; offs
++)
1549 if (fixed_regs
[regno
+ offs
]
1550 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1555 && (! (refers_to_regno_for_reload_p
1556 (regno
, (regno
+ hard_regno_nregs
[regno
][inmode
]),
1558 || can_reload_into (in
, regno
, inmode
)))
1560 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1567 output_reloadnum
= i
;
1572 /* Record an additional place we must replace a value
1573 for which we have already recorded a reload.
1574 RELOADNUM is the value returned by push_reload
1575 when the reload was recorded.
1576 This is used in insn patterns that use match_dup. */
1579 push_replacement (rtx
*loc
, int reloadnum
, enum machine_mode mode
)
1581 if (replace_reloads
)
1583 struct replacement
*r
= &replacements
[n_replacements
++];
1584 r
->what
= reloadnum
;
1591 /* Duplicate any replacement we have recorded to apply at
1592 location ORIG_LOC to also be performed at DUP_LOC.
1593 This is used in insn patterns that use match_dup. */
1596 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1598 int i
, n
= n_replacements
;
1600 for (i
= 0; i
< n
; i
++)
1602 struct replacement
*r
= &replacements
[i
];
1603 if (r
->where
== orig_loc
)
1604 push_replacement (dup_loc
, r
->what
, r
->mode
);
1608 /* Transfer all replacements that used to be in reload FROM to be in
1612 transfer_replacements (int to
, int from
)
1616 for (i
= 0; i
< n_replacements
; i
++)
1617 if (replacements
[i
].what
== from
)
1618 replacements
[i
].what
= to
;
1621 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1622 or a subpart of it. If we have any replacements registered for IN_RTX,
1623 cancel the reloads that were supposed to load them.
1624 Return nonzero if we canceled any reloads. */
1626 remove_address_replacements (rtx in_rtx
)
1629 char reload_flags
[MAX_RELOADS
];
1630 int something_changed
= 0;
1632 memset (reload_flags
, 0, sizeof reload_flags
);
1633 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1635 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1636 reload_flags
[replacements
[i
].what
] |= 1;
1639 replacements
[j
++] = replacements
[i
];
1640 reload_flags
[replacements
[i
].what
] |= 2;
1643 /* Note that the following store must be done before the recursive calls. */
1646 for (i
= n_reloads
- 1; i
>= 0; i
--)
1648 if (reload_flags
[i
] == 1)
1650 deallocate_reload_reg (i
);
1651 remove_address_replacements (rld
[i
].in
);
1653 something_changed
= 1;
1656 return something_changed
;
1659 /* If there is only one output reload, and it is not for an earlyclobber
1660 operand, try to combine it with a (logically unrelated) input reload
1661 to reduce the number of reload registers needed.
1663 This is safe if the input reload does not appear in
1664 the value being output-reloaded, because this implies
1665 it is not needed any more once the original insn completes.
1667 If that doesn't work, see we can use any of the registers that
1668 die in this insn as a reload register. We can if it is of the right
1669 class and does not appear in the value being output-reloaded. */
1672 combine_reloads (void)
1675 int output_reload
= -1;
1676 int secondary_out
= -1;
1679 /* Find the output reload; return unless there is exactly one
1680 and that one is mandatory. */
1682 for (i
= 0; i
< n_reloads
; i
++)
1683 if (rld
[i
].out
!= 0)
1685 if (output_reload
>= 0)
1690 if (output_reload
< 0 || rld
[output_reload
].optional
)
1693 /* An input-output reload isn't combinable. */
1695 if (rld
[output_reload
].in
!= 0)
1698 /* If this reload is for an earlyclobber operand, we can't do anything. */
1699 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1702 /* If there is a reload for part of the address of this operand, we would
1703 need to chnage it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1704 its life to the point where doing this combine would not lower the
1705 number of spill registers needed. */
1706 for (i
= 0; i
< n_reloads
; i
++)
1707 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1708 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1709 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1712 /* Check each input reload; can we combine it? */
1714 for (i
= 0; i
< n_reloads
; i
++)
1715 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1716 /* Life span of this reload must not extend past main insn. */
1717 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1718 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1719 && rld
[i
].when_needed
!= RELOAD_OTHER
1720 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1721 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1722 rld
[output_reload
].outmode
))
1724 && rld
[i
].reg_rtx
== 0
1725 #ifdef SECONDARY_MEMORY_NEEDED
1726 /* Don't combine two reloads with different secondary
1727 memory locations. */
1728 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1729 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1730 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1731 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1733 && (SMALL_REGISTER_CLASSES
1734 ? (rld
[i
].class == rld
[output_reload
].class)
1735 : (reg_class_subset_p (rld
[i
].class,
1736 rld
[output_reload
].class)
1737 || reg_class_subset_p (rld
[output_reload
].class,
1739 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1740 /* Args reversed because the first arg seems to be
1741 the one that we imagine being modified
1742 while the second is the one that might be affected. */
1743 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1745 /* However, if the input is a register that appears inside
1746 the output, then we also can't share.
1747 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1748 If the same reload reg is used for both reg 69 and the
1749 result to be stored in memory, then that result
1750 will clobber the address of the memory ref. */
1751 && ! (REG_P (rld
[i
].in
)
1752 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1753 rld
[output_reload
].out
))))
1754 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1755 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1756 && (reg_class_size
[(int) rld
[i
].class]
1757 || SMALL_REGISTER_CLASSES
)
1758 /* We will allow making things slightly worse by combining an
1759 input and an output, but no worse than that. */
1760 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1761 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1765 /* We have found a reload to combine with! */
1766 rld
[i
].out
= rld
[output_reload
].out
;
1767 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1768 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1769 /* Mark the old output reload as inoperative. */
1770 rld
[output_reload
].out
= 0;
1771 /* The combined reload is needed for the entire insn. */
1772 rld
[i
].when_needed
= RELOAD_OTHER
;
1773 /* If the output reload had a secondary reload, copy it. */
1774 if (rld
[output_reload
].secondary_out_reload
!= -1)
1776 rld
[i
].secondary_out_reload
1777 = rld
[output_reload
].secondary_out_reload
;
1778 rld
[i
].secondary_out_icode
1779 = rld
[output_reload
].secondary_out_icode
;
1782 #ifdef SECONDARY_MEMORY_NEEDED
1783 /* Copy any secondary MEM. */
1784 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1785 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1786 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1788 /* If required, minimize the register class. */
1789 if (reg_class_subset_p (rld
[output_reload
].class,
1791 rld
[i
].class = rld
[output_reload
].class;
1793 /* Transfer all replacements from the old reload to the combined. */
1794 for (j
= 0; j
< n_replacements
; j
++)
1795 if (replacements
[j
].what
== output_reload
)
1796 replacements
[j
].what
= i
;
1801 /* If this insn has only one operand that is modified or written (assumed
1802 to be the first), it must be the one corresponding to this reload. It
1803 is safe to use anything that dies in this insn for that output provided
1804 that it does not occur in the output (we already know it isn't an
1805 earlyclobber. If this is an asm insn, give up. */
1807 if (INSN_CODE (this_insn
) == -1)
1810 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1811 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1812 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1815 /* See if some hard register that dies in this insn and is not used in
1816 the output is the right class. Only works if the register we pick
1817 up can fully hold our output reload. */
1818 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1819 if (REG_NOTE_KIND (note
) == REG_DEAD
1820 && REG_P (XEXP (note
, 0))
1821 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1822 rld
[output_reload
].out
)
1823 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1824 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1825 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1826 REGNO (XEXP (note
, 0)))
1827 && (hard_regno_nregs
[REGNO (XEXP (note
, 0))][rld
[output_reload
].outmode
]
1828 <= hard_regno_nregs
[REGNO (XEXP (note
, 0))][GET_MODE (XEXP (note
, 0))])
1829 /* Ensure that a secondary or tertiary reload for this output
1830 won't want this register. */
1831 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1832 || (! (TEST_HARD_REG_BIT
1833 (reg_class_contents
[(int) rld
[secondary_out
].class],
1834 REGNO (XEXP (note
, 0))))
1835 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1836 || ! (TEST_HARD_REG_BIT
1837 (reg_class_contents
[(int) rld
[secondary_out
].class],
1838 REGNO (XEXP (note
, 0)))))))
1839 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1841 rld
[output_reload
].reg_rtx
1842 = gen_rtx_REG (rld
[output_reload
].outmode
,
1843 REGNO (XEXP (note
, 0)));
1848 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1849 See if one of IN and OUT is a register that may be used;
1850 this is desirable since a spill-register won't be needed.
1851 If so, return the register rtx that proves acceptable.
1853 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1854 CLASS is the register class required for the reload.
1856 If FOR_REAL is >= 0, it is the number of the reload,
1857 and in some cases when it can be discovered that OUT doesn't need
1858 to be computed, clear out rld[FOR_REAL].out.
1860 If FOR_REAL is -1, this should not be done, because this call
1861 is just to see if a register can be found, not to find and install it.
1863 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1864 puts an additional constraint on being able to use IN for OUT since
1865 IN must not appear elsewhere in the insn (it is assumed that IN itself
1866 is safe from the earlyclobber). */
1869 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1870 enum machine_mode inmode
, enum machine_mode outmode
,
1871 enum reg_class
class, int for_real
, int earlyclobber
)
1879 /* If operands exceed a word, we can't use either of them
1880 unless they have the same size. */
1881 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1882 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1883 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1886 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1887 respectively refers to a hard register. */
1889 /* Find the inside of any subregs. */
1890 while (GET_CODE (out
) == SUBREG
)
1892 if (REG_P (SUBREG_REG (out
))
1893 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1894 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1895 GET_MODE (SUBREG_REG (out
)),
1898 out
= SUBREG_REG (out
);
1900 while (GET_CODE (in
) == SUBREG
)
1902 if (REG_P (SUBREG_REG (in
))
1903 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1904 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1905 GET_MODE (SUBREG_REG (in
)),
1908 in
= SUBREG_REG (in
);
1911 /* Narrow down the reg class, the same way push_reload will;
1912 otherwise we might find a dummy now, but push_reload won't. */
1914 enum reg_class preferred_class
= PREFERRED_RELOAD_CLASS (in
, class);
1915 if (preferred_class
!= NO_REGS
)
1916 class = preferred_class
;
1919 /* See if OUT will do. */
1921 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1923 unsigned int regno
= REGNO (out
) + out_offset
;
1924 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
1927 /* When we consider whether the insn uses OUT,
1928 ignore references within IN. They don't prevent us
1929 from copying IN into OUT, because those refs would
1930 move into the insn that reloads IN.
1932 However, we only ignore IN in its role as this reload.
1933 If the insn uses IN elsewhere and it contains OUT,
1934 that counts. We can't be sure it's the "same" operand
1935 so it might not go through this reload. */
1937 *inloc
= const0_rtx
;
1939 if (regno
< FIRST_PSEUDO_REGISTER
1940 && HARD_REGNO_MODE_OK (regno
, outmode
)
1941 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1942 PATTERN (this_insn
), outloc
))
1946 for (i
= 0; i
< nwords
; i
++)
1947 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1953 if (REG_P (real_out
))
1956 value
= gen_rtx_REG (outmode
, regno
);
1963 /* Consider using IN if OUT was not acceptable
1964 or if OUT dies in this insn (like the quotient in a divmod insn).
1965 We can't use IN unless it is dies in this insn,
1966 which means we must know accurately which hard regs are live.
1967 Also, the result can't go in IN if IN is used within OUT,
1968 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1969 if (hard_regs_live_known
1971 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1973 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1974 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1975 && !fixed_regs
[REGNO (in
)]
1976 && HARD_REGNO_MODE_OK (REGNO (in
),
1977 /* The only case where out and real_out might
1978 have different modes is where real_out
1979 is a subreg, and in that case, out
1981 (GET_MODE (out
) != VOIDmode
1982 ? GET_MODE (out
) : outmode
))
1983 /* But only do all this if we can be sure, that this input
1984 operand doesn't correspond with an uninitialized pseudoreg.
1985 global can assign some hardreg to it, which is the same as
1986 a different pseudo also currently live (as it can ignore the
1987 conflict). So we never must introduce writes to such hardregs,
1988 as they would clobber the other live pseudo using the same.
1989 See also PR20973. */
1990 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
1991 || ! bitmap_bit_p (ENTRY_BLOCK_PTR
->il
.rtl
->global_live_at_end
,
1992 ORIGINAL_REGNO (in
))))
1994 unsigned int regno
= REGNO (in
) + in_offset
;
1995 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
1997 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
1998 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1999 PATTERN (this_insn
))
2001 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2002 PATTERN (this_insn
), inloc
)))
2006 for (i
= 0; i
< nwords
; i
++)
2007 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
2013 /* If we were going to use OUT as the reload reg
2014 and changed our mind, it means OUT is a dummy that
2015 dies here. So don't bother copying value to it. */
2016 if (for_real
>= 0 && value
== real_out
)
2017 rld
[for_real
].out
= 0;
2018 if (REG_P (real_in
))
2021 value
= gen_rtx_REG (inmode
, regno
);
2029 /* This page contains subroutines used mainly for determining
2030 whether the IN or an OUT of a reload can serve as the
2033 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2036 earlyclobber_operand_p (rtx x
)
2040 for (i
= 0; i
< n_earlyclobbers
; i
++)
2041 if (reload_earlyclobbers
[i
] == x
)
2047 /* Return 1 if expression X alters a hard reg in the range
2048 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2049 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2050 X should be the body of an instruction. */
2053 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2055 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2057 rtx op0
= SET_DEST (x
);
2059 while (GET_CODE (op0
) == SUBREG
)
2060 op0
= SUBREG_REG (op0
);
2063 unsigned int r
= REGNO (op0
);
2065 /* See if this reg overlaps range under consideration. */
2067 && r
+ hard_regno_nregs
[r
][GET_MODE (op0
)] > beg_regno
)
2071 else if (GET_CODE (x
) == PARALLEL
)
2073 int i
= XVECLEN (x
, 0) - 1;
2076 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2083 /* Return 1 if ADDR is a valid memory address for mode MODE,
2084 and check that each pseudo reg has the proper kind of
2088 strict_memory_address_p (enum machine_mode mode ATTRIBUTE_UNUSED
, rtx addr
)
2090 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2097 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2098 if they are the same hard reg, and has special hacks for
2099 autoincrement and autodecrement.
2100 This is specifically intended for find_reloads to use
2101 in determining whether two operands match.
2102 X is the operand whose number is the lower of the two.
2104 The value is 2 if Y contains a pre-increment that matches
2105 a non-incrementing address in X. */
2107 /* ??? To be completely correct, we should arrange to pass
2108 for X the output operand and for Y the input operand.
2109 For now, we assume that the output operand has the lower number
2110 because that is natural in (SET output (... input ...)). */
2113 operands_match_p (rtx x
, rtx y
)
2116 RTX_CODE code
= GET_CODE (x
);
2122 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2123 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2124 && REG_P (SUBREG_REG (y
)))))
2130 i
= REGNO (SUBREG_REG (x
));
2131 if (i
>= FIRST_PSEUDO_REGISTER
)
2133 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2134 GET_MODE (SUBREG_REG (x
)),
2141 if (GET_CODE (y
) == SUBREG
)
2143 j
= REGNO (SUBREG_REG (y
));
2144 if (j
>= FIRST_PSEUDO_REGISTER
)
2146 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2147 GET_MODE (SUBREG_REG (y
)),
2154 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2155 multiple hard register group of scalar integer registers, so that
2156 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2158 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2159 && SCALAR_INT_MODE_P (GET_MODE (x
))
2160 && i
< FIRST_PSEUDO_REGISTER
)
2161 i
+= hard_regno_nregs
[i
][GET_MODE (x
)] - 1;
2162 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2163 && SCALAR_INT_MODE_P (GET_MODE (y
))
2164 && j
< FIRST_PSEUDO_REGISTER
)
2165 j
+= hard_regno_nregs
[j
][GET_MODE (y
)] - 1;
2169 /* If two operands must match, because they are really a single
2170 operand of an assembler insn, then two postincrements are invalid
2171 because the assembler insn would increment only once.
2172 On the other hand, a postincrement matches ordinary indexing
2173 if the postincrement is the output operand. */
2174 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2175 return operands_match_p (XEXP (x
, 0), y
);
2176 /* Two preincrements are invalid
2177 because the assembler insn would increment only once.
2178 On the other hand, a preincrement matches ordinary indexing
2179 if the preincrement is the input operand.
2180 In this case, return 2, since some callers need to do special
2181 things when this happens. */
2182 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2183 || GET_CODE (y
) == PRE_MODIFY
)
2184 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2188 /* Now we have disposed of all the cases in which different rtx codes
2190 if (code
!= GET_CODE (y
))
2193 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2194 if (GET_MODE (x
) != GET_MODE (y
))
2204 return XEXP (x
, 0) == XEXP (y
, 0);
2206 return XSTR (x
, 0) == XSTR (y
, 0);
2212 /* Compare the elements. If any pair of corresponding elements
2213 fail to match, return 0 for the whole things. */
2216 fmt
= GET_RTX_FORMAT (code
);
2217 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2223 if (XWINT (x
, i
) != XWINT (y
, i
))
2228 if (XINT (x
, i
) != XINT (y
, i
))
2233 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2236 /* If any subexpression returns 2,
2237 we should return 2 if we are successful. */
2246 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2248 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2250 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2258 /* It is believed that rtx's at this level will never
2259 contain anything but integers and other rtx's,
2260 except for within LABEL_REFs and SYMBOL_REFs. */
2265 return 1 + success_2
;
2268 /* Describe the range of registers or memory referenced by X.
2269 If X is a register, set REG_FLAG and put the first register
2270 number into START and the last plus one into END.
2271 If X is a memory reference, put a base address into BASE
2272 and a range of integer offsets into START and END.
2273 If X is pushing on the stack, we can assume it causes no trouble,
2274 so we set the SAFE field. */
2276 static struct decomposition
2279 struct decomposition val
;
2282 memset (&val
, 0, sizeof (val
));
2284 switch (GET_CODE (x
))
2288 rtx base
= NULL_RTX
, offset
= 0;
2289 rtx addr
= XEXP (x
, 0);
2291 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2292 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2294 val
.base
= XEXP (addr
, 0);
2295 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2296 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2297 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2301 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2303 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2304 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2305 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2307 val
.base
= XEXP (addr
, 0);
2308 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2309 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2310 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2315 if (GET_CODE (addr
) == CONST
)
2317 addr
= XEXP (addr
, 0);
2320 if (GET_CODE (addr
) == PLUS
)
2322 if (CONSTANT_P (XEXP (addr
, 0)))
2324 base
= XEXP (addr
, 1);
2325 offset
= XEXP (addr
, 0);
2327 else if (CONSTANT_P (XEXP (addr
, 1)))
2329 base
= XEXP (addr
, 0);
2330 offset
= XEXP (addr
, 1);
2337 offset
= const0_rtx
;
2339 if (GET_CODE (offset
) == CONST
)
2340 offset
= XEXP (offset
, 0);
2341 if (GET_CODE (offset
) == PLUS
)
2343 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2345 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2346 offset
= XEXP (offset
, 0);
2348 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2350 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2351 offset
= XEXP (offset
, 1);
2355 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2356 offset
= const0_rtx
;
2359 else if (GET_CODE (offset
) != CONST_INT
)
2361 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2362 offset
= const0_rtx
;
2365 if (all_const
&& GET_CODE (base
) == PLUS
)
2366 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2368 gcc_assert (GET_CODE (offset
) == CONST_INT
);
2370 val
.start
= INTVAL (offset
);
2371 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2378 val
.start
= true_regnum (x
);
2379 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2381 /* A pseudo with no hard reg. */
2382 val
.start
= REGNO (x
);
2383 val
.end
= val
.start
+ 1;
2387 val
.end
= val
.start
+ hard_regno_nregs
[val
.start
][GET_MODE (x
)];
2391 if (!REG_P (SUBREG_REG (x
)))
2392 /* This could be more precise, but it's good enough. */
2393 return decompose (SUBREG_REG (x
));
2395 val
.start
= true_regnum (x
);
2396 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2397 return decompose (SUBREG_REG (x
));
2400 val
.end
= val
.start
+ hard_regno_nregs
[val
.start
][GET_MODE (x
)];
2404 /* This hasn't been assigned yet, so it can't conflict yet. */
2409 gcc_assert (CONSTANT_P (x
));
2416 /* Return 1 if altering Y will not modify the value of X.
2417 Y is also described by YDATA, which should be decompose (Y). */
2420 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2422 struct decomposition xdata
;
2425 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2429 gcc_assert (MEM_P (y
));
2430 /* If Y is memory and X is not, Y can't affect X. */
2434 xdata
= decompose (x
);
2436 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2438 /* If bases are distinct symbolic constants, there is no overlap. */
2439 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2441 /* Constants and stack slots never overlap. */
2442 if (CONSTANT_P (xdata
.base
)
2443 && (ydata
.base
== frame_pointer_rtx
2444 || ydata
.base
== hard_frame_pointer_rtx
2445 || ydata
.base
== stack_pointer_rtx
))
2447 if (CONSTANT_P (ydata
.base
)
2448 && (xdata
.base
== frame_pointer_rtx
2449 || xdata
.base
== hard_frame_pointer_rtx
2450 || xdata
.base
== stack_pointer_rtx
))
2452 /* If either base is variable, we don't know anything. */
2456 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2459 /* Similar, but calls decompose. */
2462 safe_from_earlyclobber (rtx op
, rtx clobber
)
2464 struct decomposition early_data
;
2466 early_data
= decompose (clobber
);
2467 return immune_p (op
, clobber
, early_data
);
2470 /* Main entry point of this file: search the body of INSN
2471 for values that need reloading and record them with push_reload.
2472 REPLACE nonzero means record also where the values occur
2473 so that subst_reloads can be used.
2475 IND_LEVELS says how many levels of indirection are supported by this
2476 machine; a value of zero means that a memory reference is not a valid
2479 LIVE_KNOWN says we have valid information about which hard
2480 regs are live at each point in the program; this is true when
2481 we are called from global_alloc but false when stupid register
2482 allocation has been done.
2484 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2485 which is nonnegative if the reg has been commandeered for reloading into.
2486 It is copied into STATIC_RELOAD_REG_P and referenced from there
2487 by various subroutines.
2489 Return TRUE if some operands need to be changed, because of swapping
2490 commutative operands, reg_equiv_address substitution, or whatever. */
2493 find_reloads (rtx insn
, int replace
, int ind_levels
, int live_known
,
2494 short *reload_reg_p
)
2496 int insn_code_number
;
2499 /* These start out as the constraints for the insn
2500 and they are chewed up as we consider alternatives. */
2501 char *constraints
[MAX_RECOG_OPERANDS
];
2502 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2504 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2505 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2506 /* Nonzero for a MEM operand whose entire address needs a reload.
2507 May be -1 to indicate the entire address may or may not need a reload. */
2508 int address_reloaded
[MAX_RECOG_OPERANDS
];
2509 /* Nonzero for an address operand that needs to be completely reloaded.
2510 May be -1 to indicate the entire operand may or may not need a reload. */
2511 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2512 /* Value of enum reload_type to use for operand. */
2513 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2514 /* Value of enum reload_type to use within address of operand. */
2515 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2516 /* Save the usage of each operand. */
2517 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2518 int no_input_reloads
= 0, no_output_reloads
= 0;
2520 int this_alternative
[MAX_RECOG_OPERANDS
];
2521 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2522 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2523 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2524 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2525 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2527 int goal_alternative
[MAX_RECOG_OPERANDS
];
2528 int this_alternative_number
;
2529 int goal_alternative_number
= 0;
2530 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2531 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2532 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2533 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2534 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2535 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2536 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2537 int goal_alternative_swapped
;
2540 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2541 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2542 rtx body
= PATTERN (insn
);
2543 rtx set
= single_set (insn
);
2544 int goal_earlyclobber
= 0, this_earlyclobber
;
2545 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2551 n_earlyclobbers
= 0;
2552 replace_reloads
= replace
;
2553 hard_regs_live_known
= live_known
;
2554 static_reload_reg_p
= reload_reg_p
;
2556 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2557 neither are insns that SET cc0. Insns that use CC0 are not allowed
2558 to have any input reloads. */
2559 if (JUMP_P (insn
) || CALL_P (insn
))
2560 no_output_reloads
= 1;
2563 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2564 no_input_reloads
= 1;
2565 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2566 no_output_reloads
= 1;
2569 #ifdef SECONDARY_MEMORY_NEEDED
2570 /* The eliminated forms of any secondary memory locations are per-insn, so
2571 clear them out here. */
2573 if (secondary_memlocs_elim_used
)
2575 memset (secondary_memlocs_elim
, 0,
2576 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2577 secondary_memlocs_elim_used
= 0;
2581 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2582 is cheap to move between them. If it is not, there may not be an insn
2583 to do the copy, so we may need a reload. */
2584 if (GET_CODE (body
) == SET
2585 && REG_P (SET_DEST (body
))
2586 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2587 && REG_P (SET_SRC (body
))
2588 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2589 && REGISTER_MOVE_COST (GET_MODE (SET_SRC (body
)),
2590 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2591 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2594 extract_insn (insn
);
2596 noperands
= reload_n_operands
= recog_data
.n_operands
;
2597 n_alternatives
= recog_data
.n_alternatives
;
2599 /* Just return "no reloads" if insn has no operands with constraints. */
2600 if (noperands
== 0 || n_alternatives
== 0)
2603 insn_code_number
= INSN_CODE (insn
);
2604 this_insn_is_asm
= insn_code_number
< 0;
2606 memcpy (operand_mode
, recog_data
.operand_mode
,
2607 noperands
* sizeof (enum machine_mode
));
2608 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2612 /* If we will need to know, later, whether some pair of operands
2613 are the same, we must compare them now and save the result.
2614 Reloading the base and index registers will clobber them
2615 and afterward they will fail to match. */
2617 for (i
= 0; i
< noperands
; i
++)
2622 substed_operand
[i
] = recog_data
.operand
[i
];
2625 modified
[i
] = RELOAD_READ
;
2627 /* Scan this operand's constraint to see if it is an output operand,
2628 an in-out operand, is commutative, or should match another. */
2632 p
+= CONSTRAINT_LEN (c
, p
);
2636 modified
[i
] = RELOAD_WRITE
;
2639 modified
[i
] = RELOAD_READ_WRITE
;
2643 /* The last operand should not be marked commutative. */
2644 gcc_assert (i
!= noperands
- 1);
2646 /* We currently only support one commutative pair of
2647 operands. Some existing asm code currently uses more
2648 than one pair. Previously, that would usually work,
2649 but sometimes it would crash the compiler. We
2650 continue supporting that case as well as we can by
2651 silently ignoring all but the first pair. In the
2652 future we may handle it correctly. */
2653 if (commutative
< 0)
2656 gcc_assert (this_insn_is_asm
);
2659 /* Use of ISDIGIT is tempting here, but it may get expensive because
2660 of locale support we don't want. */
2661 case '0': case '1': case '2': case '3': case '4':
2662 case '5': case '6': case '7': case '8': case '9':
2664 c
= strtoul (p
- 1, &p
, 10);
2666 operands_match
[c
][i
]
2667 = operands_match_p (recog_data
.operand
[c
],
2668 recog_data
.operand
[i
]);
2670 /* An operand may not match itself. */
2671 gcc_assert (c
!= i
);
2673 /* If C can be commuted with C+1, and C might need to match I,
2674 then C+1 might also need to match I. */
2675 if (commutative
>= 0)
2677 if (c
== commutative
|| c
== commutative
+ 1)
2679 int other
= c
+ (c
== commutative
? 1 : -1);
2680 operands_match
[other
][i
]
2681 = operands_match_p (recog_data
.operand
[other
],
2682 recog_data
.operand
[i
]);
2684 if (i
== commutative
|| i
== commutative
+ 1)
2686 int other
= i
+ (i
== commutative
? 1 : -1);
2687 operands_match
[c
][other
]
2688 = operands_match_p (recog_data
.operand
[c
],
2689 recog_data
.operand
[other
]);
2691 /* Note that C is supposed to be less than I.
2692 No need to consider altering both C and I because in
2693 that case we would alter one into the other. */
2700 /* Examine each operand that is a memory reference or memory address
2701 and reload parts of the addresses into index registers.
2702 Also here any references to pseudo regs that didn't get hard regs
2703 but are equivalent to constants get replaced in the insn itself
2704 with those constants. Nobody will ever see them again.
2706 Finally, set up the preferred classes of each operand. */
2708 for (i
= 0; i
< noperands
; i
++)
2710 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2712 address_reloaded
[i
] = 0;
2713 address_operand_reloaded
[i
] = 0;
2714 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2715 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2718 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2719 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2722 if (*constraints
[i
] == 0)
2723 /* Ignore things like match_operator operands. */
2725 else if (constraints
[i
][0] == 'p'
2726 || EXTRA_ADDRESS_CONSTRAINT (constraints
[i
][0], constraints
[i
]))
2728 address_operand_reloaded
[i
]
2729 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2730 recog_data
.operand
[i
],
2731 recog_data
.operand_loc
[i
],
2732 i
, operand_type
[i
], ind_levels
, insn
);
2734 /* If we now have a simple operand where we used to have a
2735 PLUS or MULT, re-recognize and try again. */
2736 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2737 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2738 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2739 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2741 INSN_CODE (insn
) = -1;
2742 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2747 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2748 substed_operand
[i
] = recog_data
.operand
[i
];
2750 /* Address operands are reloaded in their existing mode,
2751 no matter what is specified in the machine description. */
2752 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2754 else if (code
== MEM
)
2757 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2758 recog_data
.operand_loc
[i
],
2759 XEXP (recog_data
.operand
[i
], 0),
2760 &XEXP (recog_data
.operand
[i
], 0),
2761 i
, address_type
[i
], ind_levels
, insn
);
2762 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2763 substed_operand
[i
] = recog_data
.operand
[i
];
2765 else if (code
== SUBREG
)
2767 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2769 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2772 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2774 &address_reloaded
[i
]);
2776 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2777 that didn't get a hard register, emit a USE with a REG_EQUAL
2778 note in front so that we might inherit a previous, possibly
2784 && (GET_MODE_SIZE (GET_MODE (reg
))
2785 >= GET_MODE_SIZE (GET_MODE (op
))))
2786 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2788 REG_EQUAL
, reg_equiv_memory_loc
[REGNO (reg
)]);
2790 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2792 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2793 /* We can get a PLUS as an "operand" as a result of register
2794 elimination. See eliminate_regs and gen_reload. We handle
2795 a unary operator by reloading the operand. */
2796 substed_operand
[i
] = recog_data
.operand
[i
]
2797 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2798 ind_levels
, 0, insn
,
2799 &address_reloaded
[i
]);
2800 else if (code
== REG
)
2802 /* This is equivalent to calling find_reloads_toplev.
2803 The code is duplicated for speed.
2804 When we find a pseudo always equivalent to a constant,
2805 we replace it by the constant. We must be sure, however,
2806 that we don't try to replace it in the insn in which it
2808 int regno
= REGNO (recog_data
.operand
[i
]);
2809 if (reg_equiv_constant
[regno
] != 0
2810 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2812 /* Record the existing mode so that the check if constants are
2813 allowed will work when operand_mode isn't specified. */
2815 if (operand_mode
[i
] == VOIDmode
)
2816 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2818 substed_operand
[i
] = recog_data
.operand
[i
]
2819 = reg_equiv_constant
[regno
];
2821 if (reg_equiv_memory_loc
[regno
] != 0
2822 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2823 /* We need not give a valid is_set_dest argument since the case
2824 of a constant equivalence was checked above. */
2825 substed_operand
[i
] = recog_data
.operand
[i
]
2826 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2827 ind_levels
, 0, insn
,
2828 &address_reloaded
[i
]);
2830 /* If the operand is still a register (we didn't replace it with an
2831 equivalent), get the preferred class to reload it into. */
2832 code
= GET_CODE (recog_data
.operand
[i
]);
2834 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2835 >= FIRST_PSEUDO_REGISTER
)
2836 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2840 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2841 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2844 /* If this is simply a copy from operand 1 to operand 0, merge the
2845 preferred classes for the operands. */
2846 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2847 && recog_data
.operand
[1] == SET_SRC (set
))
2849 preferred_class
[0] = preferred_class
[1]
2850 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2851 pref_or_nothing
[0] |= pref_or_nothing
[1];
2852 pref_or_nothing
[1] |= pref_or_nothing
[0];
2855 /* Now see what we need for pseudo-regs that didn't get hard regs
2856 or got the wrong kind of hard reg. For this, we must consider
2857 all the operands together against the register constraints. */
2859 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2862 goal_alternative_swapped
= 0;
2865 /* The constraints are made of several alternatives.
2866 Each operand's constraint looks like foo,bar,... with commas
2867 separating the alternatives. The first alternatives for all
2868 operands go together, the second alternatives go together, etc.
2870 First loop over alternatives. */
2872 for (this_alternative_number
= 0;
2873 this_alternative_number
< n_alternatives
;
2874 this_alternative_number
++)
2876 /* Loop over operands for one constraint alternative. */
2877 /* LOSERS counts those that don't fit this alternative
2878 and would require loading. */
2880 /* BAD is set to 1 if it some operand can't fit this alternative
2881 even after reloading. */
2883 /* REJECT is a count of how undesirable this alternative says it is
2884 if any reloading is required. If the alternative matches exactly
2885 then REJECT is ignored, but otherwise it gets this much
2886 counted against it in addition to the reloading needed. Each
2887 ? counts three times here since we want the disparaging caused by
2888 a bad register class to only count 1/3 as much. */
2891 this_earlyclobber
= 0;
2893 for (i
= 0; i
< noperands
; i
++)
2895 char *p
= constraints
[i
];
2900 /* 0 => this operand can be reloaded somehow for this alternative. */
2902 /* 0 => this operand can be reloaded if the alternative allows regs. */
2906 rtx operand
= recog_data
.operand
[i
];
2908 /* Nonzero means this is a MEM that must be reloaded into a reg
2909 regardless of what the constraint says. */
2910 int force_reload
= 0;
2912 /* Nonzero if a constant forced into memory would be OK for this
2915 int earlyclobber
= 0;
2917 /* If the predicate accepts a unary operator, it means that
2918 we need to reload the operand, but do not do this for
2919 match_operator and friends. */
2920 if (UNARY_P (operand
) && *p
!= 0)
2921 operand
= XEXP (operand
, 0);
2923 /* If the operand is a SUBREG, extract
2924 the REG or MEM (or maybe even a constant) within.
2925 (Constants can occur as a result of reg_equiv_constant.) */
2927 while (GET_CODE (operand
) == SUBREG
)
2929 /* Offset only matters when operand is a REG and
2930 it is a hard reg. This is because it is passed
2931 to reg_fits_class_p if it is a REG and all pseudos
2932 return 0 from that function. */
2933 if (REG_P (SUBREG_REG (operand
))
2934 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
2936 if (!subreg_offset_representable_p
2937 (REGNO (SUBREG_REG (operand
)),
2938 GET_MODE (SUBREG_REG (operand
)),
2939 SUBREG_BYTE (operand
),
2940 GET_MODE (operand
)))
2942 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
2943 GET_MODE (SUBREG_REG (operand
)),
2944 SUBREG_BYTE (operand
),
2945 GET_MODE (operand
));
2947 operand
= SUBREG_REG (operand
);
2948 /* Force reload if this is a constant or PLUS or if there may
2949 be a problem accessing OPERAND in the outer mode. */
2950 if (CONSTANT_P (operand
)
2951 || GET_CODE (operand
) == PLUS
2952 /* We must force a reload of paradoxical SUBREGs
2953 of a MEM because the alignment of the inner value
2954 may not be enough to do the outer reference. On
2955 big-endian machines, it may also reference outside
2958 On machines that extend byte operations and we have a
2959 SUBREG where both the inner and outer modes are no wider
2960 than a word and the inner mode is narrower, is integral,
2961 and gets extended when loaded from memory, combine.c has
2962 made assumptions about the behavior of the machine in such
2963 register access. If the data is, in fact, in memory we
2964 must always load using the size assumed to be in the
2965 register and let the insn do the different-sized
2968 This is doubly true if WORD_REGISTER_OPERATIONS. In
2969 this case eliminate_regs has left non-paradoxical
2970 subregs for push_reload to see. Make sure it does
2971 by forcing the reload.
2973 ??? When is it right at this stage to have a subreg
2974 of a mem that is _not_ to be handled specially? IMO
2975 those should have been reduced to just a mem. */
2976 || ((MEM_P (operand
)
2978 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2979 #ifndef WORD_REGISTER_OPERATIONS
2980 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2981 < BIGGEST_ALIGNMENT
)
2982 && (GET_MODE_SIZE (operand_mode
[i
])
2983 > GET_MODE_SIZE (GET_MODE (operand
))))
2985 #ifdef LOAD_EXTEND_OP
2986 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2987 && (GET_MODE_SIZE (GET_MODE (operand
))
2989 && (GET_MODE_SIZE (operand_mode
[i
])
2990 > GET_MODE_SIZE (GET_MODE (operand
)))
2991 && INTEGRAL_MODE_P (GET_MODE (operand
))
2992 && LOAD_EXTEND_OP (GET_MODE (operand
)) != UNKNOWN
)
3001 this_alternative
[i
] = (int) NO_REGS
;
3002 this_alternative_win
[i
] = 0;
3003 this_alternative_match_win
[i
] = 0;
3004 this_alternative_offmemok
[i
] = 0;
3005 this_alternative_earlyclobber
[i
] = 0;
3006 this_alternative_matches
[i
] = -1;
3008 /* An empty constraint or empty alternative
3009 allows anything which matched the pattern. */
3010 if (*p
== 0 || *p
== ',')
3013 /* Scan this alternative's specs for this operand;
3014 set WIN if the operand fits any letter in this alternative.
3015 Otherwise, clear BADOP if this operand could
3016 fit some letter after reloads,
3017 or set WINREG if this operand could fit after reloads
3018 provided the constraint allows some registers. */
3021 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3030 case '=': case '+': case '*':
3034 /* We only support one commutative marker, the first
3035 one. We already set commutative above. */
3047 /* Ignore rest of this alternative as far as
3048 reloading is concerned. */
3051 while (*p
&& *p
!= ',');
3055 case '0': case '1': case '2': case '3': case '4':
3056 case '5': case '6': case '7': case '8': case '9':
3057 m
= strtoul (p
, &end
, 10);
3061 this_alternative_matches
[i
] = m
;
3062 /* We are supposed to match a previous operand.
3063 If we do, we win if that one did.
3064 If we do not, count both of the operands as losers.
3065 (This is too conservative, since most of the time
3066 only a single reload insn will be needed to make
3067 the two operands win. As a result, this alternative
3068 may be rejected when it is actually desirable.) */
3069 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3070 /* If we are matching as if two operands were swapped,
3071 also pretend that operands_match had been computed
3073 But if I is the second of those and C is the first,
3074 don't exchange them, because operands_match is valid
3075 only on one side of its diagonal. */
3077 [(m
== commutative
|| m
== commutative
+ 1)
3078 ? 2 * commutative
+ 1 - m
: m
]
3079 [(i
== commutative
|| i
== commutative
+ 1)
3080 ? 2 * commutative
+ 1 - i
: i
])
3081 : operands_match
[m
][i
])
3083 /* If we are matching a non-offsettable address where an
3084 offsettable address was expected, then we must reject
3085 this combination, because we can't reload it. */
3086 if (this_alternative_offmemok
[m
]
3087 && MEM_P (recog_data
.operand
[m
])
3088 && this_alternative
[m
] == (int) NO_REGS
3089 && ! this_alternative_win
[m
])
3092 did_match
= this_alternative_win
[m
];
3096 /* Operands don't match. */
3099 /* Retroactively mark the operand we had to match
3100 as a loser, if it wasn't already. */
3101 if (this_alternative_win
[m
])
3103 this_alternative_win
[m
] = 0;
3104 if (this_alternative
[m
] == (int) NO_REGS
)
3106 /* But count the pair only once in the total badness of
3107 this alternative, if the pair can be a dummy reload.
3108 The pointers in operand_loc are not swapped; swap
3109 them by hand if necessary. */
3110 if (swapped
&& i
== commutative
)
3111 loc1
= commutative
+ 1;
3112 else if (swapped
&& i
== commutative
+ 1)
3116 if (swapped
&& m
== commutative
)
3117 loc2
= commutative
+ 1;
3118 else if (swapped
&& m
== commutative
+ 1)
3123 = find_dummy_reload (recog_data
.operand
[i
],
3124 recog_data
.operand
[m
],
3125 recog_data
.operand_loc
[loc1
],
3126 recog_data
.operand_loc
[loc2
],
3127 operand_mode
[i
], operand_mode
[m
],
3128 this_alternative
[m
], -1,
3129 this_alternative_earlyclobber
[m
]);
3134 /* This can be fixed with reloads if the operand
3135 we are supposed to match can be fixed with reloads. */
3137 this_alternative
[i
] = this_alternative
[m
];
3139 /* If we have to reload this operand and some previous
3140 operand also had to match the same thing as this
3141 operand, we don't know how to do that. So reject this
3143 if (! did_match
|| force_reload
)
3144 for (j
= 0; j
< i
; j
++)
3145 if (this_alternative_matches
[j
]
3146 == this_alternative_matches
[i
])
3151 /* All necessary reloads for an address_operand
3152 were handled in find_reloads_address. */
3154 = (int) base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
);
3164 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3165 && reg_renumber
[REGNO (operand
)] < 0))
3167 if (CONST_POOL_OK_P (operand
))
3174 && ! address_reloaded
[i
]
3175 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3176 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3182 && ! address_reloaded
[i
]
3183 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3184 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3188 /* Memory operand whose address is not offsettable. */
3193 && ! (ind_levels
? offsettable_memref_p (operand
)
3194 : offsettable_nonstrict_memref_p (operand
))
3195 /* Certain mem addresses will become offsettable
3196 after they themselves are reloaded. This is important;
3197 we don't want our own handling of unoffsettables
3198 to override the handling of reg_equiv_address. */
3199 && !(REG_P (XEXP (operand
, 0))
3201 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3205 /* Memory operand whose address is offsettable. */
3209 if ((MEM_P (operand
)
3210 /* If IND_LEVELS, find_reloads_address won't reload a
3211 pseudo that didn't get a hard reg, so we have to
3212 reject that case. */
3213 && ((ind_levels
? offsettable_memref_p (operand
)
3214 : offsettable_nonstrict_memref_p (operand
))
3215 /* A reloaded address is offsettable because it is now
3216 just a simple register indirect. */
3217 || address_reloaded
[i
] == 1))
3219 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3220 && reg_renumber
[REGNO (operand
)] < 0
3221 /* If reg_equiv_address is nonzero, we will be
3222 loading it into a register; hence it will be
3223 offsettable, but we cannot say that reg_equiv_mem
3224 is offsettable without checking. */
3225 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3226 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3227 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3229 if (CONST_POOL_OK_P (operand
)
3237 /* Output operand that is stored before the need for the
3238 input operands (and their index registers) is over. */
3239 earlyclobber
= 1, this_earlyclobber
= 1;
3244 if (GET_CODE (operand
) == CONST_DOUBLE
3245 || (GET_CODE (operand
) == CONST_VECTOR
3246 && (GET_MODE_CLASS (GET_MODE (operand
))
3247 == MODE_VECTOR_FLOAT
)))
3253 if (GET_CODE (operand
) == CONST_DOUBLE
3254 && CONST_DOUBLE_OK_FOR_CONSTRAINT_P (operand
, c
, p
))
3259 if (GET_CODE (operand
) == CONST_INT
3260 || (GET_CODE (operand
) == CONST_DOUBLE
3261 && GET_MODE (operand
) == VOIDmode
))
3264 if (CONSTANT_P (operand
)
3265 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
)))
3270 if (GET_CODE (operand
) == CONST_INT
3271 || (GET_CODE (operand
) == CONST_DOUBLE
3272 && GET_MODE (operand
) == VOIDmode
))
3284 if (GET_CODE (operand
) == CONST_INT
3285 && CONST_OK_FOR_CONSTRAINT_P (INTVAL (operand
), c
, p
))
3296 /* A PLUS is never a valid operand, but reload can make
3297 it from a register when eliminating registers. */
3298 && GET_CODE (operand
) != PLUS
3299 /* A SCRATCH is not a valid operand. */
3300 && GET_CODE (operand
) != SCRATCH
3301 && (! CONSTANT_P (operand
)
3303 || LEGITIMATE_PIC_OPERAND_P (operand
))
3304 && (GENERAL_REGS
== ALL_REGS
3306 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3307 && reg_renumber
[REGNO (operand
)] < 0)))
3309 /* Drop through into 'r' case. */
3313 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3317 if (REG_CLASS_FROM_CONSTRAINT (c
, p
) == NO_REGS
)
3319 #ifdef EXTRA_CONSTRAINT_STR
3320 if (EXTRA_MEMORY_CONSTRAINT (c
, p
))
3324 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3326 /* If the address was already reloaded,
3328 else if (MEM_P (operand
)
3329 && address_reloaded
[i
] == 1)
3331 /* Likewise if the address will be reloaded because
3332 reg_equiv_address is nonzero. For reg_equiv_mem
3333 we have to check. */
3334 else if (REG_P (operand
)
3335 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3336 && reg_renumber
[REGNO (operand
)] < 0
3337 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3338 && EXTRA_CONSTRAINT_STR (reg_equiv_mem
[REGNO (operand
)], c
, p
))
3339 || (reg_equiv_address
[REGNO (operand
)] != 0)))
3342 /* If we didn't already win, we can reload
3343 constants via force_const_mem, and other
3344 MEMs by reloading the address like for 'o'. */
3345 if (CONST_POOL_OK_P (operand
)
3352 if (EXTRA_ADDRESS_CONSTRAINT (c
, p
))
3354 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3357 /* If we didn't already win, we can reload
3358 the address into a base register. */
3360 = (int) base_reg_class (VOIDmode
, ADDRESS
, SCRATCH
);
3365 if (EXTRA_CONSTRAINT_STR (operand
, c
, p
))
3372 = (int) (reg_class_subunion
3373 [this_alternative
[i
]]
3374 [(int) REG_CLASS_FROM_CONSTRAINT (c
, p
)]);
3376 if (GET_MODE (operand
) == BLKmode
)
3380 && reg_fits_class_p (operand
, this_alternative
[i
],
3381 offset
, GET_MODE (recog_data
.operand
[i
])))
3385 while ((p
+= len
), c
);
3389 /* If this operand could be handled with a reg,
3390 and some reg is allowed, then this operand can be handled. */
3391 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3394 /* Record which operands fit this alternative. */
3395 this_alternative_earlyclobber
[i
] = earlyclobber
;
3396 if (win
&& ! force_reload
)
3397 this_alternative_win
[i
] = 1;
3398 else if (did_match
&& ! force_reload
)
3399 this_alternative_match_win
[i
] = 1;
3402 int const_to_mem
= 0;
3404 this_alternative_offmemok
[i
] = offmemok
;
3408 /* Alternative loses if it has no regs for a reg operand. */
3410 && this_alternative
[i
] == (int) NO_REGS
3411 && this_alternative_matches
[i
] < 0)
3414 /* If this is a constant that is reloaded into the desired
3415 class by copying it to memory first, count that as another
3416 reload. This is consistent with other code and is
3417 required to avoid choosing another alternative when
3418 the constant is moved into memory by this function on
3419 an early reload pass. Note that the test here is
3420 precisely the same as in the code below that calls
3422 if (CONST_POOL_OK_P (operand
)
3423 && ((PREFERRED_RELOAD_CLASS (operand
,
3424 (enum reg_class
) this_alternative
[i
])
3426 || no_input_reloads
)
3427 && operand_mode
[i
] != VOIDmode
)
3430 if (this_alternative
[i
] != (int) NO_REGS
)
3434 /* Alternative loses if it requires a type of reload not
3435 permitted for this insn. We can always reload SCRATCH
3436 and objects with a REG_UNUSED note. */
3437 if (GET_CODE (operand
) != SCRATCH
3438 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3439 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3441 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3445 /* If we can't reload this value at all, reject this
3446 alternative. Note that we could also lose due to
3447 LIMIT_RELOAD_CLASS, but we don't check that
3450 if (! CONSTANT_P (operand
)
3451 && (enum reg_class
) this_alternative
[i
] != NO_REGS
)
3453 if (PREFERRED_RELOAD_CLASS
3454 (operand
, (enum reg_class
) this_alternative
[i
])
3458 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
3459 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3460 && PREFERRED_OUTPUT_RELOAD_CLASS
3461 (operand
, (enum reg_class
) this_alternative
[i
])
3467 /* We prefer to reload pseudos over reloading other things,
3468 since such reloads may be able to be eliminated later.
3469 If we are reloading a SCRATCH, we won't be generating any
3470 insns, just using a register, so it is also preferred.
3471 So bump REJECT in other cases. Don't do this in the
3472 case where we are forcing a constant into memory and
3473 it will then win since we don't want to have a different
3474 alternative match then. */
3475 if (! (REG_P (operand
)
3476 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3477 && GET_CODE (operand
) != SCRATCH
3478 && ! (const_to_mem
&& constmemok
))
3481 /* Input reloads can be inherited more often than output
3482 reloads can be removed, so penalize output reloads. */
3483 if (operand_type
[i
] != RELOAD_FOR_INPUT
3484 && GET_CODE (operand
) != SCRATCH
)
3488 /* If this operand is a pseudo register that didn't get a hard
3489 reg and this alternative accepts some register, see if the
3490 class that we want is a subset of the preferred class for this
3491 register. If not, but it intersects that class, use the
3492 preferred class instead. If it does not intersect the preferred
3493 class, show that usage of this alternative should be discouraged;
3494 it will be discouraged more still if the register is `preferred
3495 or nothing'. We do this because it increases the chance of
3496 reusing our spill register in a later insn and avoiding a pair
3497 of memory stores and loads.
3499 Don't bother with this if this alternative will accept this
3502 Don't do this for a multiword operand, since it is only a
3503 small win and has the risk of requiring more spill registers,
3504 which could cause a large loss.
3506 Don't do this if the preferred class has only one register
3507 because we might otherwise exhaust the class. */
3509 if (! win
&& ! did_match
3510 && this_alternative
[i
] != (int) NO_REGS
3511 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3512 && reg_class_size
[(int) preferred_class
[i
]] > 0
3513 && ! SMALL_REGISTER_CLASS_P (preferred_class
[i
]))
3515 if (! reg_class_subset_p (this_alternative
[i
],
3516 preferred_class
[i
]))
3518 /* Since we don't have a way of forming the intersection,
3519 we just do something special if the preferred class
3520 is a subset of the class we have; that's the most
3521 common case anyway. */
3522 if (reg_class_subset_p (preferred_class
[i
],
3523 this_alternative
[i
]))
3524 this_alternative
[i
] = (int) preferred_class
[i
];
3526 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3531 /* Now see if any output operands that are marked "earlyclobber"
3532 in this alternative conflict with any input operands
3533 or any memory addresses. */
3535 for (i
= 0; i
< noperands
; i
++)
3536 if (this_alternative_earlyclobber
[i
]
3537 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3539 struct decomposition early_data
;
3541 early_data
= decompose (recog_data
.operand
[i
]);
3543 gcc_assert (modified
[i
] != RELOAD_READ
);
3545 if (this_alternative
[i
] == NO_REGS
)
3547 this_alternative_earlyclobber
[i
] = 0;
3548 gcc_assert (this_insn_is_asm
);
3549 error_for_asm (this_insn
,
3550 "%<&%> constraint used with no register class");
3553 for (j
= 0; j
< noperands
; j
++)
3554 /* Is this an input operand or a memory ref? */
3555 if ((MEM_P (recog_data
.operand
[j
])
3556 || modified
[j
] != RELOAD_WRITE
)
3558 /* Ignore things like match_operator operands. */
3559 && *recog_data
.constraints
[j
] != 0
3560 /* Don't count an input operand that is constrained to match
3561 the early clobber operand. */
3562 && ! (this_alternative_matches
[j
] == i
3563 && rtx_equal_p (recog_data
.operand
[i
],
3564 recog_data
.operand
[j
]))
3565 /* Is it altered by storing the earlyclobber operand? */
3566 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3569 /* If the output is in a non-empty few-regs class,
3570 it's costly to reload it, so reload the input instead. */
3571 if (SMALL_REGISTER_CLASS_P (this_alternative
[i
])
3572 && (REG_P (recog_data
.operand
[j
])
3573 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3576 this_alternative_win
[j
] = 0;
3577 this_alternative_match_win
[j
] = 0;
3582 /* If an earlyclobber operand conflicts with something,
3583 it must be reloaded, so request this and count the cost. */
3587 this_alternative_win
[i
] = 0;
3588 this_alternative_match_win
[j
] = 0;
3589 for (j
= 0; j
< noperands
; j
++)
3590 if (this_alternative_matches
[j
] == i
3591 && this_alternative_match_win
[j
])
3593 this_alternative_win
[j
] = 0;
3594 this_alternative_match_win
[j
] = 0;
3600 /* If one alternative accepts all the operands, no reload required,
3601 choose that alternative; don't consider the remaining ones. */
3604 /* Unswap these so that they are never swapped at `finish'. */
3605 if (commutative
>= 0)
3607 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3608 recog_data
.operand
[commutative
+ 1]
3609 = substed_operand
[commutative
+ 1];
3611 for (i
= 0; i
< noperands
; i
++)
3613 goal_alternative_win
[i
] = this_alternative_win
[i
];
3614 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3615 goal_alternative
[i
] = this_alternative
[i
];
3616 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3617 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3618 goal_alternative_earlyclobber
[i
]
3619 = this_alternative_earlyclobber
[i
];
3621 goal_alternative_number
= this_alternative_number
;
3622 goal_alternative_swapped
= swapped
;
3623 goal_earlyclobber
= this_earlyclobber
;
3627 /* REJECT, set by the ! and ? constraint characters and when a register
3628 would be reloaded into a non-preferred class, discourages the use of
3629 this alternative for a reload goal. REJECT is incremented by six
3630 for each ? and two for each non-preferred class. */
3631 losers
= losers
* 6 + reject
;
3633 /* If this alternative can be made to work by reloading,
3634 and it needs less reloading than the others checked so far,
3635 record it as the chosen goal for reloading. */
3636 if (! bad
&& best
> losers
)
3638 for (i
= 0; i
< noperands
; i
++)
3640 goal_alternative
[i
] = this_alternative
[i
];
3641 goal_alternative_win
[i
] = this_alternative_win
[i
];
3642 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3643 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3644 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3645 goal_alternative_earlyclobber
[i
]
3646 = this_alternative_earlyclobber
[i
];
3648 goal_alternative_swapped
= swapped
;
3650 goal_alternative_number
= this_alternative_number
;
3651 goal_earlyclobber
= this_earlyclobber
;
3655 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3656 then we need to try each alternative twice,
3657 the second time matching those two operands
3658 as if we had exchanged them.
3659 To do this, really exchange them in operands.
3661 If we have just tried the alternatives the second time,
3662 return operands to normal and drop through. */
3664 if (commutative
>= 0)
3669 enum reg_class tclass
;
3672 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3673 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3674 /* Swap the duplicates too. */
3675 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3676 if (recog_data
.dup_num
[i
] == commutative
3677 || recog_data
.dup_num
[i
] == commutative
+ 1)
3678 *recog_data
.dup_loc
[i
]
3679 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3681 tclass
= preferred_class
[commutative
];
3682 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3683 preferred_class
[commutative
+ 1] = tclass
;
3685 t
= pref_or_nothing
[commutative
];
3686 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3687 pref_or_nothing
[commutative
+ 1] = t
;
3689 t
= address_reloaded
[commutative
];
3690 address_reloaded
[commutative
] = address_reloaded
[commutative
+ 1];
3691 address_reloaded
[commutative
+ 1] = t
;
3693 memcpy (constraints
, recog_data
.constraints
,
3694 noperands
* sizeof (char *));
3699 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3700 recog_data
.operand
[commutative
+ 1]
3701 = substed_operand
[commutative
+ 1];
3702 /* Unswap the duplicates too. */
3703 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3704 if (recog_data
.dup_num
[i
] == commutative
3705 || recog_data
.dup_num
[i
] == commutative
+ 1)
3706 *recog_data
.dup_loc
[i
]
3707 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3711 /* The operands don't meet the constraints.
3712 goal_alternative describes the alternative
3713 that we could reach by reloading the fewest operands.
3714 Reload so as to fit it. */
3716 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3718 /* No alternative works with reloads?? */
3719 if (insn_code_number
>= 0)
3720 fatal_insn ("unable to generate reloads for:", insn
);
3721 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3722 /* Avoid further trouble with this insn. */
3723 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3728 /* Jump to `finish' from above if all operands are valid already.
3729 In that case, goal_alternative_win is all 1. */
3732 /* Right now, for any pair of operands I and J that are required to match,
3734 goal_alternative_matches[J] is I.
3735 Set up goal_alternative_matched as the inverse function:
3736 goal_alternative_matched[I] = J. */
3738 for (i
= 0; i
< noperands
; i
++)
3739 goal_alternative_matched
[i
] = -1;
3741 for (i
= 0; i
< noperands
; i
++)
3742 if (! goal_alternative_win
[i
]
3743 && goal_alternative_matches
[i
] >= 0)
3744 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3746 for (i
= 0; i
< noperands
; i
++)
3747 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3749 /* If the best alternative is with operands 1 and 2 swapped,
3750 consider them swapped before reporting the reloads. Update the
3751 operand numbers of any reloads already pushed. */
3753 if (goal_alternative_swapped
)
3757 tem
= substed_operand
[commutative
];
3758 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3759 substed_operand
[commutative
+ 1] = tem
;
3760 tem
= recog_data
.operand
[commutative
];
3761 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3762 recog_data
.operand
[commutative
+ 1] = tem
;
3763 tem
= *recog_data
.operand_loc
[commutative
];
3764 *recog_data
.operand_loc
[commutative
]
3765 = *recog_data
.operand_loc
[commutative
+ 1];
3766 *recog_data
.operand_loc
[commutative
+ 1] = tem
;
3768 for (i
= 0; i
< n_reloads
; i
++)
3770 if (rld
[i
].opnum
== commutative
)
3771 rld
[i
].opnum
= commutative
+ 1;
3772 else if (rld
[i
].opnum
== commutative
+ 1)
3773 rld
[i
].opnum
= commutative
;
3777 for (i
= 0; i
< noperands
; i
++)
3779 operand_reloadnum
[i
] = -1;
3781 /* If this is an earlyclobber operand, we need to widen the scope.
3782 The reload must remain valid from the start of the insn being
3783 reloaded until after the operand is stored into its destination.
3784 We approximate this with RELOAD_OTHER even though we know that we
3785 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3787 One special case that is worth checking is when we have an
3788 output that is earlyclobber but isn't used past the insn (typically
3789 a SCRATCH). In this case, we only need have the reload live
3790 through the insn itself, but not for any of our input or output
3792 But we must not accidentally narrow the scope of an existing
3793 RELOAD_OTHER reload - leave these alone.
3795 In any case, anything needed to address this operand can remain
3796 however they were previously categorized. */
3798 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3800 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3801 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3804 /* Any constants that aren't allowed and can't be reloaded
3805 into registers are here changed into memory references. */
3806 for (i
= 0; i
< noperands
; i
++)
3807 if (! goal_alternative_win
[i
]
3808 && CONST_POOL_OK_P (recog_data
.operand
[i
])
3809 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3810 (enum reg_class
) goal_alternative
[i
])
3812 || no_input_reloads
)
3813 && operand_mode
[i
] != VOIDmode
)
3815 substed_operand
[i
] = recog_data
.operand
[i
]
3816 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3817 recog_data
.operand
[i
]),
3818 i
, address_type
[i
], ind_levels
, 0, insn
,
3820 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3821 goal_alternative_number
))
3822 goal_alternative_win
[i
] = 1;
3825 /* Likewise any invalid constants appearing as operand of a PLUS
3826 that is to be reloaded. */
3827 for (i
= 0; i
< noperands
; i
++)
3828 if (! goal_alternative_win
[i
]
3829 && GET_CODE (recog_data
.operand
[i
]) == PLUS
3830 && CONST_POOL_OK_P (XEXP (recog_data
.operand
[i
], 1))
3831 && (PREFERRED_RELOAD_CLASS (XEXP (recog_data
.operand
[i
], 1),
3832 (enum reg_class
) goal_alternative
[i
])
3834 && operand_mode
[i
] != VOIDmode
)
3836 rtx tem
= force_const_mem (operand_mode
[i
],
3837 XEXP (recog_data
.operand
[i
], 1));
3838 tem
= gen_rtx_PLUS (operand_mode
[i
],
3839 XEXP (recog_data
.operand
[i
], 0), tem
);
3841 substed_operand
[i
] = recog_data
.operand
[i
]
3842 = find_reloads_toplev (tem
, i
, address_type
[i
],
3843 ind_levels
, 0, insn
, NULL
);
3846 /* Record the values of the earlyclobber operands for the caller. */
3847 if (goal_earlyclobber
)
3848 for (i
= 0; i
< noperands
; i
++)
3849 if (goal_alternative_earlyclobber
[i
])
3850 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3852 /* Now record reloads for all the operands that need them. */
3853 for (i
= 0; i
< noperands
; i
++)
3854 if (! goal_alternative_win
[i
])
3856 /* Operands that match previous ones have already been handled. */
3857 if (goal_alternative_matches
[i
] >= 0)
3859 /* Handle an operand with a nonoffsettable address
3860 appearing where an offsettable address will do
3861 by reloading the address into a base register.
3863 ??? We can also do this when the operand is a register and
3864 reg_equiv_mem is not offsettable, but this is a bit tricky,
3865 so we don't bother with it. It may not be worth doing. */
3866 else if (goal_alternative_matched
[i
] == -1
3867 && goal_alternative_offmemok
[i
]
3868 && MEM_P (recog_data
.operand
[i
]))
3870 /* If the address to be reloaded is a VOIDmode constant,
3871 use Pmode as mode of the reload register, as would have
3872 been done by find_reloads_address. */
3873 enum machine_mode address_mode
;
3874 address_mode
= GET_MODE (XEXP (recog_data
.operand
[i
], 0));
3875 if (address_mode
== VOIDmode
)
3876 address_mode
= Pmode
;
3878 operand_reloadnum
[i
]
3879 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3880 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3881 base_reg_class (VOIDmode
, MEM
, SCRATCH
),
3883 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3884 rld
[operand_reloadnum
[i
]].inc
3885 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3887 /* If this operand is an output, we will have made any
3888 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3889 now we are treating part of the operand as an input, so
3890 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3892 if (modified
[i
] == RELOAD_WRITE
)
3894 for (j
= 0; j
< n_reloads
; j
++)
3896 if (rld
[j
].opnum
== i
)
3898 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3899 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3900 else if (rld
[j
].when_needed
3901 == RELOAD_FOR_OUTADDR_ADDRESS
)
3902 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3907 else if (goal_alternative_matched
[i
] == -1)
3909 operand_reloadnum
[i
]
3910 = push_reload ((modified
[i
] != RELOAD_WRITE
3911 ? recog_data
.operand
[i
] : 0),
3912 (modified
[i
] != RELOAD_READ
3913 ? recog_data
.operand
[i
] : 0),
3914 (modified
[i
] != RELOAD_WRITE
3915 ? recog_data
.operand_loc
[i
] : 0),
3916 (modified
[i
] != RELOAD_READ
3917 ? recog_data
.operand_loc
[i
] : 0),
3918 (enum reg_class
) goal_alternative
[i
],
3919 (modified
[i
] == RELOAD_WRITE
3920 ? VOIDmode
: operand_mode
[i
]),
3921 (modified
[i
] == RELOAD_READ
3922 ? VOIDmode
: operand_mode
[i
]),
3923 (insn_code_number
< 0 ? 0
3924 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3925 0, i
, operand_type
[i
]);
3927 /* In a matching pair of operands, one must be input only
3928 and the other must be output only.
3929 Pass the input operand as IN and the other as OUT. */
3930 else if (modified
[i
] == RELOAD_READ
3931 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3933 operand_reloadnum
[i
]
3934 = push_reload (recog_data
.operand
[i
],
3935 recog_data
.operand
[goal_alternative_matched
[i
]],
3936 recog_data
.operand_loc
[i
],
3937 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3938 (enum reg_class
) goal_alternative
[i
],
3940 operand_mode
[goal_alternative_matched
[i
]],
3941 0, 0, i
, RELOAD_OTHER
);
3942 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3944 else if (modified
[i
] == RELOAD_WRITE
3945 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3947 operand_reloadnum
[goal_alternative_matched
[i
]]
3948 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3949 recog_data
.operand
[i
],
3950 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3951 recog_data
.operand_loc
[i
],
3952 (enum reg_class
) goal_alternative
[i
],
3953 operand_mode
[goal_alternative_matched
[i
]],
3955 0, 0, i
, RELOAD_OTHER
);
3956 operand_reloadnum
[i
] = output_reloadnum
;
3960 gcc_assert (insn_code_number
< 0);
3961 error_for_asm (insn
, "inconsistent operand constraints "
3963 /* Avoid further trouble with this insn. */
3964 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3969 else if (goal_alternative_matched
[i
] < 0
3970 && goal_alternative_matches
[i
] < 0
3971 && address_operand_reloaded
[i
] != 1
3974 /* For each non-matching operand that's a MEM or a pseudo-register
3975 that didn't get a hard register, make an optional reload.
3976 This may get done even if the insn needs no reloads otherwise. */
3978 rtx operand
= recog_data
.operand
[i
];
3980 while (GET_CODE (operand
) == SUBREG
)
3981 operand
= SUBREG_REG (operand
);
3982 if ((MEM_P (operand
)
3984 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3985 /* If this is only for an output, the optional reload would not
3986 actually cause us to use a register now, just note that
3987 something is stored here. */
3988 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3989 || modified
[i
] == RELOAD_WRITE
)
3990 && ! no_input_reloads
3991 /* An optional output reload might allow to delete INSN later.
3992 We mustn't make in-out reloads on insns that are not permitted
3994 If this is an asm, we can't delete it; we must not even call
3995 push_reload for an optional output reload in this case,
3996 because we can't be sure that the constraint allows a register,
3997 and push_reload verifies the constraints for asms. */
3998 && (modified
[i
] == RELOAD_READ
3999 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4000 operand_reloadnum
[i
]
4001 = push_reload ((modified
[i
] != RELOAD_WRITE
4002 ? recog_data
.operand
[i
] : 0),
4003 (modified
[i
] != RELOAD_READ
4004 ? recog_data
.operand
[i
] : 0),
4005 (modified
[i
] != RELOAD_WRITE
4006 ? recog_data
.operand_loc
[i
] : 0),
4007 (modified
[i
] != RELOAD_READ
4008 ? recog_data
.operand_loc
[i
] : 0),
4009 (enum reg_class
) goal_alternative
[i
],
4010 (modified
[i
] == RELOAD_WRITE
4011 ? VOIDmode
: operand_mode
[i
]),
4012 (modified
[i
] == RELOAD_READ
4013 ? VOIDmode
: operand_mode
[i
]),
4014 (insn_code_number
< 0 ? 0
4015 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4016 1, i
, operand_type
[i
]);
4017 /* If a memory reference remains (either as a MEM or a pseudo that
4018 did not get a hard register), yet we can't make an optional
4019 reload, check if this is actually a pseudo register reference;
4020 we then need to emit a USE and/or a CLOBBER so that reload
4021 inheritance will do the right thing. */
4025 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4026 && reg_renumber
[REGNO (operand
)] < 0)))
4028 operand
= *recog_data
.operand_loc
[i
];
4030 while (GET_CODE (operand
) == SUBREG
)
4031 operand
= SUBREG_REG (operand
);
4032 if (REG_P (operand
))
4034 if (modified
[i
] != RELOAD_WRITE
)
4035 /* We mark the USE with QImode so that we recognize
4036 it as one that can be safely deleted at the end
4038 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4040 if (modified
[i
] != RELOAD_READ
)
4041 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
4045 else if (goal_alternative_matches
[i
] >= 0
4046 && goal_alternative_win
[goal_alternative_matches
[i
]]
4047 && modified
[i
] == RELOAD_READ
4048 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4049 && ! no_input_reloads
&& ! no_output_reloads
4052 /* Similarly, make an optional reload for a pair of matching
4053 objects that are in MEM or a pseudo that didn't get a hard reg. */
4055 rtx operand
= recog_data
.operand
[i
];
4057 while (GET_CODE (operand
) == SUBREG
)
4058 operand
= SUBREG_REG (operand
);
4059 if ((MEM_P (operand
)
4061 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4062 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
4064 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4065 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4066 recog_data
.operand
[i
],
4067 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4068 recog_data
.operand_loc
[i
],
4069 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4070 operand_mode
[goal_alternative_matches
[i
]],
4072 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4075 /* Perform whatever substitutions on the operands we are supposed
4076 to make due to commutativity or replacement of registers
4077 with equivalent constants or memory slots. */
4079 for (i
= 0; i
< noperands
; i
++)
4081 /* We only do this on the last pass through reload, because it is
4082 possible for some data (like reg_equiv_address) to be changed during
4083 later passes. Moreover, we lose the opportunity to get a useful
4084 reload_{in,out}_reg when we do these replacements. */
4088 rtx substitution
= substed_operand
[i
];
4090 *recog_data
.operand_loc
[i
] = substitution
;
4092 /* If we're replacing an operand with a LABEL_REF, we need
4093 to make sure that there's a REG_LABEL note attached to
4094 this instruction. */
4096 && GET_CODE (substitution
) == LABEL_REF
4097 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
4098 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
4099 XEXP (substitution
, 0),
4103 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4106 /* If this insn pattern contains any MATCH_DUP's, make sure that
4107 they will be substituted if the operands they match are substituted.
4108 Also do now any substitutions we already did on the operands.
4110 Don't do this if we aren't making replacements because we might be
4111 propagating things allocated by frame pointer elimination into places
4112 it doesn't expect. */
4114 if (insn_code_number
>= 0 && replace
)
4115 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4117 int opno
= recog_data
.dup_num
[i
];
4118 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4119 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4123 /* This loses because reloading of prior insns can invalidate the equivalence
4124 (or at least find_equiv_reg isn't smart enough to find it any more),
4125 causing this insn to need more reload regs than it needed before.
4126 It may be too late to make the reload regs available.
4127 Now this optimization is done safely in choose_reload_regs. */
4129 /* For each reload of a reg into some other class of reg,
4130 search for an existing equivalent reg (same value now) in the right class.
4131 We can use it as long as we don't need to change its contents. */
4132 for (i
= 0; i
< n_reloads
; i
++)
4133 if (rld
[i
].reg_rtx
== 0
4135 && REG_P (rld
[i
].in
)
4139 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
4140 static_reload_reg_p
, 0, rld
[i
].inmode
);
4141 /* Prevent generation of insn to load the value
4142 because the one we found already has the value. */
4144 rld
[i
].in
= rld
[i
].reg_rtx
;
4148 /* If we detected error and replaced asm instruction by USE, forget about the
4150 if (GET_CODE (PATTERN (insn
)) == USE
4151 && GET_CODE (XEXP (PATTERN (insn
), 0)) == CONST_INT
)
4154 /* Perhaps an output reload can be combined with another
4155 to reduce needs by one. */
4156 if (!goal_earlyclobber
)
4159 /* If we have a pair of reloads for parts of an address, they are reloading
4160 the same object, the operands themselves were not reloaded, and they
4161 are for two operands that are supposed to match, merge the reloads and
4162 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4164 for (i
= 0; i
< n_reloads
; i
++)
4168 for (j
= i
+ 1; j
< n_reloads
; j
++)
4169 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4170 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4171 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4172 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4173 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4174 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4175 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4176 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4177 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4178 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4179 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4180 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4181 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4182 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4183 || (goal_alternative_matches
[rld
[j
].opnum
]
4186 for (k
= 0; k
< n_replacements
; k
++)
4187 if (replacements
[k
].what
== j
)
4188 replacements
[k
].what
= i
;
4190 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4191 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4192 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4194 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4199 /* Scan all the reloads and update their type.
4200 If a reload is for the address of an operand and we didn't reload
4201 that operand, change the type. Similarly, change the operand number
4202 of a reload when two operands match. If a reload is optional, treat it
4203 as though the operand isn't reloaded.
4205 ??? This latter case is somewhat odd because if we do the optional
4206 reload, it means the object is hanging around. Thus we need only
4207 do the address reload if the optional reload was NOT done.
4209 Change secondary reloads to be the address type of their operand, not
4212 If an operand's reload is now RELOAD_OTHER, change any
4213 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4214 RELOAD_FOR_OTHER_ADDRESS. */
4216 for (i
= 0; i
< n_reloads
; i
++)
4218 if (rld
[i
].secondary_p
4219 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4220 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4222 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4223 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4224 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4225 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4226 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4227 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4229 /* If we have a secondary reload to go along with this reload,
4230 change its type to RELOAD_FOR_OPADDR_ADDR. */
4232 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4233 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4234 && rld
[i
].secondary_in_reload
!= -1)
4236 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4238 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4240 /* If there's a tertiary reload we have to change it also. */
4241 if (secondary_in_reload
> 0
4242 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4243 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4244 = RELOAD_FOR_OPADDR_ADDR
;
4247 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4248 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4249 && rld
[i
].secondary_out_reload
!= -1)
4251 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4253 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4255 /* If there's a tertiary reload we have to change it also. */
4256 if (secondary_out_reload
4257 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4258 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4259 = RELOAD_FOR_OPADDR_ADDR
;
4262 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4263 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4264 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4266 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4269 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4270 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4271 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4272 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4274 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4276 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4277 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4280 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4281 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4282 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4284 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4285 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4286 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4287 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4288 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4289 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4290 This is complicated by the fact that a single operand can have more
4291 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4292 choose_reload_regs without affecting code quality, and cases that
4293 actually fail are extremely rare, so it turns out to be better to fix
4294 the problem here by not generating cases that choose_reload_regs will
4296 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4297 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4299 We can reduce the register pressure by exploiting that a
4300 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4301 does not conflict with any of them, if it is only used for the first of
4302 the RELOAD_FOR_X_ADDRESS reloads. */
4304 int first_op_addr_num
= -2;
4305 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4306 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4307 int need_change
= 0;
4308 /* We use last_op_addr_reload and the contents of the above arrays
4309 first as flags - -2 means no instance encountered, -1 means exactly
4310 one instance encountered.
4311 If more than one instance has been encountered, we store the reload
4312 number of the first reload of the kind in question; reload numbers
4313 are known to be non-negative. */
4314 for (i
= 0; i
< noperands
; i
++)
4315 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4316 for (i
= n_reloads
- 1; i
>= 0; i
--)
4318 switch (rld
[i
].when_needed
)
4320 case RELOAD_FOR_OPERAND_ADDRESS
:
4321 if (++first_op_addr_num
>= 0)
4323 first_op_addr_num
= i
;
4327 case RELOAD_FOR_INPUT_ADDRESS
:
4328 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4330 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4334 case RELOAD_FOR_OUTPUT_ADDRESS
:
4335 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4337 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4348 for (i
= 0; i
< n_reloads
; i
++)
4351 enum reload_type type
;
4353 switch (rld
[i
].when_needed
)
4355 case RELOAD_FOR_OPADDR_ADDR
:
4356 first_num
= first_op_addr_num
;
4357 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4359 case RELOAD_FOR_INPADDR_ADDRESS
:
4360 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4361 type
= RELOAD_FOR_INPUT_ADDRESS
;
4363 case RELOAD_FOR_OUTADDR_ADDRESS
:
4364 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4365 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4372 else if (i
> first_num
)
4373 rld
[i
].when_needed
= type
;
4376 /* Check if the only TYPE reload that uses reload I is
4377 reload FIRST_NUM. */
4378 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4380 if (rld
[j
].when_needed
== type
4381 && (rld
[i
].secondary_p
4382 ? rld
[j
].secondary_in_reload
== i
4383 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4385 rld
[i
].when_needed
= type
;
4394 /* See if we have any reloads that are now allowed to be merged
4395 because we've changed when the reload is needed to
4396 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4397 check for the most common cases. */
4399 for (i
= 0; i
< n_reloads
; i
++)
4400 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4401 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4402 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4403 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4404 for (j
= 0; j
< n_reloads
; j
++)
4405 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4406 && rld
[j
].when_needed
== rld
[i
].when_needed
4407 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4408 && rld
[i
].class == rld
[j
].class
4409 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4410 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4412 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4413 transfer_replacements (i
, j
);
4418 /* If we made any reloads for addresses, see if they violate a
4419 "no input reloads" requirement for this insn. But loads that we
4420 do after the insn (such as for output addresses) are fine. */
4421 if (no_input_reloads
)
4422 for (i
= 0; i
< n_reloads
; i
++)
4423 gcc_assert (rld
[i
].in
== 0
4424 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4425 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4428 /* Compute reload_mode and reload_nregs. */
4429 for (i
= 0; i
< n_reloads
; i
++)
4432 = (rld
[i
].inmode
== VOIDmode
4433 || (GET_MODE_SIZE (rld
[i
].outmode
)
4434 > GET_MODE_SIZE (rld
[i
].inmode
)))
4435 ? rld
[i
].outmode
: rld
[i
].inmode
;
4437 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4440 /* Special case a simple move with an input reload and a
4441 destination of a hard reg, if the hard reg is ok, use it. */
4442 for (i
= 0; i
< n_reloads
; i
++)
4443 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4444 && GET_CODE (PATTERN (insn
)) == SET
4445 && REG_P (SET_DEST (PATTERN (insn
)))
4446 && SET_SRC (PATTERN (insn
)) == rld
[i
].in
)
4448 rtx dest
= SET_DEST (PATTERN (insn
));
4449 unsigned int regno
= REGNO (dest
);
4451 if (regno
< FIRST_PSEUDO_REGISTER
4452 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
)
4453 && HARD_REGNO_MODE_OK (regno
, rld
[i
].mode
))
4455 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4458 for (nri
= 1; nri
< nr
; nri
++)
4459 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].class], regno
+ nri
))
4463 rld
[i
].reg_rtx
= dest
;
4470 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4471 accepts a memory operand with constant address. */
4474 alternative_allows_memconst (const char *constraint
, int altnum
)
4477 /* Skip alternatives before the one requested. */
4480 while (*constraint
++ != ',');
4483 /* Scan the requested alternative for 'm' or 'o'.
4484 If one of them is present, this alternative accepts memory constants. */
4485 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4486 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4487 if (c
== 'm' || c
== 'o' || EXTRA_MEMORY_CONSTRAINT (c
, constraint
))
4492 /* Scan X for memory references and scan the addresses for reloading.
4493 Also checks for references to "constant" regs that we want to eliminate
4494 and replaces them with the values they stand for.
4495 We may alter X destructively if it contains a reference to such.
4496 If X is just a constant reg, we return the equivalent value
4499 IND_LEVELS says how many levels of indirect addressing this machine
4502 OPNUM and TYPE identify the purpose of the reload.
4504 IS_SET_DEST is true if X is the destination of a SET, which is not
4505 appropriate to be replaced by a constant.
4507 INSN, if nonzero, is the insn in which we do the reload. It is used
4508 to determine if we may generate output reloads, and where to put USEs
4509 for pseudos that we have to replace with stack slots.
4511 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4512 result of find_reloads_address. */
4515 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4516 int ind_levels
, int is_set_dest
, rtx insn
,
4517 int *address_reloaded
)
4519 RTX_CODE code
= GET_CODE (x
);
4521 const char *fmt
= GET_RTX_FORMAT (code
);
4527 /* This code is duplicated for speed in find_reloads. */
4528 int regno
= REGNO (x
);
4529 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4530 x
= reg_equiv_constant
[regno
];
4532 /* This creates (subreg (mem...)) which would cause an unnecessary
4533 reload of the mem. */
4534 else if (reg_equiv_mem
[regno
] != 0)
4535 x
= reg_equiv_mem
[regno
];
4537 else if (reg_equiv_memory_loc
[regno
]
4538 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4540 rtx mem
= make_memloc (x
, regno
);
4541 if (reg_equiv_address
[regno
]
4542 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4544 /* If this is not a toplevel operand, find_reloads doesn't see
4545 this substitution. We have to emit a USE of the pseudo so
4546 that delete_output_reload can see it. */
4547 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4548 /* We mark the USE with QImode so that we recognize it
4549 as one that can be safely deleted at the end of
4551 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4554 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4555 opnum
, type
, ind_levels
, insn
);
4556 if (address_reloaded
)
4557 *address_reloaded
= i
;
4566 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4567 opnum
, type
, ind_levels
, insn
);
4568 if (address_reloaded
)
4569 *address_reloaded
= i
;
4574 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4576 /* Check for SUBREG containing a REG that's equivalent to a
4577 constant. If the constant has a known value, truncate it
4578 right now. Similarly if we are extracting a single-word of a
4579 multi-word constant. If the constant is symbolic, allow it
4580 to be substituted normally. push_reload will strip the
4581 subreg later. The constant must not be VOIDmode, because we
4582 will lose the mode of the register (this should never happen
4583 because one of the cases above should handle it). */
4585 int regno
= REGNO (SUBREG_REG (x
));
4588 if (subreg_lowpart_p (x
)
4589 && regno
>= FIRST_PSEUDO_REGISTER
4590 && reg_renumber
[regno
] < 0
4591 && reg_equiv_constant
[regno
] != 0
4592 && (tem
= gen_lowpart_common (GET_MODE (x
),
4593 reg_equiv_constant
[regno
])) != 0)
4596 if (regno
>= FIRST_PSEUDO_REGISTER
4597 && reg_renumber
[regno
] < 0
4598 && reg_equiv_constant
[regno
] != 0)
4601 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant
[regno
],
4602 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4607 /* If the subreg contains a reg that will be converted to a mem,
4608 convert the subreg to a narrower memref now.
4609 Otherwise, we would get (subreg (mem ...) ...),
4610 which would force reload of the mem.
4612 We also need to do this if there is an equivalent MEM that is
4613 not offsettable. In that case, alter_subreg would produce an
4614 invalid address on big-endian machines.
4616 For machines that extend byte loads, we must not reload using
4617 a wider mode if we have a paradoxical SUBREG. find_reloads will
4618 force a reload in that case. So we should not do anything here. */
4620 if (regno
>= FIRST_PSEUDO_REGISTER
4621 #ifdef LOAD_EXTEND_OP
4622 && (GET_MODE_SIZE (GET_MODE (x
))
4623 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4625 && (reg_equiv_address
[regno
] != 0
4626 || (reg_equiv_mem
[regno
] != 0
4627 && (! strict_memory_address_p (GET_MODE (x
),
4628 XEXP (reg_equiv_mem
[regno
], 0))
4629 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4630 || num_not_at_initial_offset
))))
4631 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4635 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4639 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4640 ind_levels
, is_set_dest
, insn
,
4642 /* If we have replaced a reg with it's equivalent memory loc -
4643 that can still be handled here e.g. if it's in a paradoxical
4644 subreg - we must make the change in a copy, rather than using
4645 a destructive change. This way, find_reloads can still elect
4646 not to do the change. */
4647 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4649 x
= shallow_copy_rtx (x
);
4652 XEXP (x
, i
) = new_part
;
4658 /* Return a mem ref for the memory equivalent of reg REGNO.
4659 This mem ref is not shared with anything. */
4662 make_memloc (rtx ad
, int regno
)
4664 /* We must rerun eliminate_regs, in case the elimination
4665 offsets have changed. */
4667 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4669 /* If TEM might contain a pseudo, we must copy it to avoid
4670 modifying it when we do the substitution for the reload. */
4671 if (rtx_varies_p (tem
, 0))
4672 tem
= copy_rtx (tem
);
4674 tem
= replace_equiv_address_nv (reg_equiv_memory_loc
[regno
], tem
);
4675 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4677 /* Copy the result if it's still the same as the equivalence, to avoid
4678 modifying it when we do the substitution for the reload. */
4679 if (tem
== reg_equiv_memory_loc
[regno
])
4680 tem
= copy_rtx (tem
);
4684 /* Returns true if AD could be turned into a valid memory reference
4685 to mode MODE by reloading the part pointed to by PART into a
4689 maybe_memory_address_p (enum machine_mode mode
, rtx ad
, rtx
*part
)
4693 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4696 retv
= memory_address_p (mode
, ad
);
4702 /* Record all reloads needed for handling memory address AD
4703 which appears in *LOC in a memory reference to mode MODE
4704 which itself is found in location *MEMREFLOC.
4705 Note that we take shortcuts assuming that no multi-reg machine mode
4706 occurs as part of an address.
4708 OPNUM and TYPE specify the purpose of this reload.
4710 IND_LEVELS says how many levels of indirect addressing this machine
4713 INSN, if nonzero, is the insn in which we do the reload. It is used
4714 to determine if we may generate output reloads, and where to put USEs
4715 for pseudos that we have to replace with stack slots.
4717 Value is one if this address is reloaded or replaced as a whole; it is
4718 zero if the top level of this address was not reloaded or replaced, and
4719 it is -1 if it may or may not have been reloaded or replaced.
4721 Note that there is no verification that the address will be valid after
4722 this routine does its work. Instead, we rely on the fact that the address
4723 was valid when reload started. So we need only undo things that reload
4724 could have broken. These are wrong register types, pseudos not allocated
4725 to a hard register, and frame pointer elimination. */
4728 find_reloads_address (enum machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4729 rtx
*loc
, int opnum
, enum reload_type type
,
4730 int ind_levels
, rtx insn
)
4733 int removed_and
= 0;
4737 /* If the address is a register, see if it is a legitimate address and
4738 reload if not. We first handle the cases where we need not reload
4739 or where we must reload in a non-standard way. */
4745 /* If the register is equivalent to an invariant expression, substitute
4746 the invariant, and eliminate any eliminable register references. */
4747 tem
= reg_equiv_constant
[regno
];
4749 && (tem
= eliminate_regs (tem
, mode
, insn
))
4750 && strict_memory_address_p (mode
, tem
))
4756 tem
= reg_equiv_memory_loc
[regno
];
4759 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4761 tem
= make_memloc (ad
, regno
);
4762 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4764 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4765 &XEXP (tem
, 0), opnum
,
4766 ADDR_TYPE (type
), ind_levels
, insn
);
4768 /* We can avoid a reload if the register's equivalent memory
4769 expression is valid as an indirect memory address.
4770 But not all addresses are valid in a mem used as an indirect
4771 address: only reg or reg+constant. */
4774 && strict_memory_address_p (mode
, tem
)
4775 && (REG_P (XEXP (tem
, 0))
4776 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4777 && REG_P (XEXP (XEXP (tem
, 0), 0))
4778 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4780 /* TEM is not the same as what we'll be replacing the
4781 pseudo with after reload, put a USE in front of INSN
4782 in the final reload pass. */
4784 && num_not_at_initial_offset
4785 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4788 /* We mark the USE with QImode so that we
4789 recognize it as one that can be safely
4790 deleted at the end of reload. */
4791 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4794 /* This doesn't really count as replacing the address
4795 as a whole, since it is still a memory access. */
4803 /* The only remaining case where we can avoid a reload is if this is a
4804 hard register that is valid as a base register and which is not the
4805 subject of a CLOBBER in this insn. */
4807 else if (regno
< FIRST_PSEUDO_REGISTER
4808 && regno_ok_for_base_p (regno
, mode
, MEM
, SCRATCH
)
4809 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4812 /* If we do not have one of the cases above, we must do the reload. */
4813 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0, base_reg_class (mode
, MEM
, SCRATCH
),
4814 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4818 if (strict_memory_address_p (mode
, ad
))
4820 /* The address appears valid, so reloads are not needed.
4821 But the address may contain an eliminable register.
4822 This can happen because a machine with indirect addressing
4823 may consider a pseudo register by itself a valid address even when
4824 it has failed to get a hard reg.
4825 So do a tree-walk to find and eliminate all such regs. */
4827 /* But first quickly dispose of a common case. */
4828 if (GET_CODE (ad
) == PLUS
4829 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4830 && REG_P (XEXP (ad
, 0))
4831 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4834 subst_reg_equivs_changed
= 0;
4835 *loc
= subst_reg_equivs (ad
, insn
);
4837 if (! subst_reg_equivs_changed
)
4840 /* Check result for validity after substitution. */
4841 if (strict_memory_address_p (mode
, ad
))
4845 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4850 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4855 *memrefloc
= copy_rtx (*memrefloc
);
4856 XEXP (*memrefloc
, 0) = ad
;
4857 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4863 /* The address is not valid. We have to figure out why. First see if
4864 we have an outer AND and remove it if so. Then analyze what's inside. */
4866 if (GET_CODE (ad
) == AND
)
4869 loc
= &XEXP (ad
, 0);
4873 /* One possibility for why the address is invalid is that it is itself
4874 a MEM. This can happen when the frame pointer is being eliminated, a
4875 pseudo is not allocated to a hard register, and the offset between the
4876 frame and stack pointers is not its initial value. In that case the
4877 pseudo will have been replaced by a MEM referring to the
4881 /* First ensure that the address in this MEM is valid. Then, unless
4882 indirect addresses are valid, reload the MEM into a register. */
4884 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4885 opnum
, ADDR_TYPE (type
),
4886 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4888 /* If tem was changed, then we must create a new memory reference to
4889 hold it and store it back into memrefloc. */
4890 if (tem
!= ad
&& memrefloc
)
4892 *memrefloc
= copy_rtx (*memrefloc
);
4893 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4894 loc
= &XEXP (*memrefloc
, 0);
4896 loc
= &XEXP (*loc
, 0);
4899 /* Check similar cases as for indirect addresses as above except
4900 that we can allow pseudos and a MEM since they should have been
4901 taken care of above. */
4904 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4905 || MEM_P (XEXP (tem
, 0))
4906 || ! (REG_P (XEXP (tem
, 0))
4907 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4908 && REG_P (XEXP (XEXP (tem
, 0), 0))
4909 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4911 /* Must use TEM here, not AD, since it is the one that will
4912 have any subexpressions reloaded, if needed. */
4913 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
4914 base_reg_class (mode
, MEM
, SCRATCH
), GET_MODE (tem
),
4917 return ! removed_and
;
4923 /* If we have address of a stack slot but it's not valid because the
4924 displacement is too large, compute the sum in a register.
4925 Handle all base registers here, not just fp/ap/sp, because on some
4926 targets (namely SH) we can also get too large displacements from
4927 big-endian corrections. */
4928 else if (GET_CODE (ad
) == PLUS
4929 && REG_P (XEXP (ad
, 0))
4930 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4931 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4932 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, PLUS
,
4936 /* Unshare the MEM rtx so we can safely alter it. */
4939 *memrefloc
= copy_rtx (*memrefloc
);
4940 loc
= &XEXP (*memrefloc
, 0);
4942 loc
= &XEXP (*loc
, 0);
4945 if (double_reg_address_ok
)
4947 /* Unshare the sum as well. */
4948 *loc
= ad
= copy_rtx (ad
);
4950 /* Reload the displacement into an index reg.
4951 We assume the frame pointer or arg pointer is a base reg. */
4952 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4953 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4959 /* If the sum of two regs is not necessarily valid,
4960 reload the sum into a base reg.
4961 That will at least work. */
4962 find_reloads_address_part (ad
, loc
,
4963 base_reg_class (mode
, MEM
, SCRATCH
),
4964 Pmode
, opnum
, type
, ind_levels
);
4966 return ! removed_and
;
4969 /* If we have an indexed stack slot, there are three possible reasons why
4970 it might be invalid: The index might need to be reloaded, the address
4971 might have been made by frame pointer elimination and hence have a
4972 constant out of range, or both reasons might apply.
4974 We can easily check for an index needing reload, but even if that is the
4975 case, we might also have an invalid constant. To avoid making the
4976 conservative assumption and requiring two reloads, we see if this address
4977 is valid when not interpreted strictly. If it is, the only problem is
4978 that the index needs a reload and find_reloads_address_1 will take care
4981 Handle all base registers here, not just fp/ap/sp, because on some
4982 targets (namely SPARC) we can also get invalid addresses from preventive
4983 subreg big-endian corrections made by find_reloads_toplev. We
4984 can also get expressions involving LO_SUM (rather than PLUS) from
4985 find_reloads_subreg_address.
4987 If we decide to do something, it must be that `double_reg_address_ok'
4988 is true. We generate a reload of the base register + constant and
4989 rework the sum so that the reload register will be added to the index.
4990 This is safe because we know the address isn't shared.
4992 We check for the base register as both the first and second operand of
4993 the innermost PLUS and/or LO_SUM. */
4995 for (op_index
= 0; op_index
< 2; ++op_index
)
4997 rtx operand
, addend
;
4998 enum rtx_code inner_code
;
5000 if (GET_CODE (ad
) != PLUS
)
5003 inner_code
= GET_CODE (XEXP (ad
, 0));
5004 if (!(GET_CODE (ad
) == PLUS
5005 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
5006 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5009 operand
= XEXP (XEXP (ad
, 0), op_index
);
5010 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5013 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5015 if ((regno_ok_for_base_p (REGNO (operand
), mode
, inner_code
,
5017 || operand
== frame_pointer_rtx
5018 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
5019 || operand
== hard_frame_pointer_rtx
5021 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
5022 || operand
== arg_pointer_rtx
5024 || operand
== stack_pointer_rtx
)
5025 && ! maybe_memory_address_p (mode
, ad
,
5026 &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5031 offset_reg
= plus_constant (operand
, INTVAL (XEXP (ad
, 1)));
5033 /* Form the adjusted address. */
5034 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5035 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5036 op_index
== 0 ? offset_reg
: addend
,
5037 op_index
== 0 ? addend
: offset_reg
);
5039 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5040 op_index
== 0 ? offset_reg
: addend
,
5041 op_index
== 0 ? addend
: offset_reg
);
5044 cls
= base_reg_class (mode
, MEM
, GET_CODE (addend
));
5045 find_reloads_address_part (XEXP (ad
, op_index
),
5046 &XEXP (ad
, op_index
), cls
,
5047 GET_MODE (ad
), opnum
, type
, ind_levels
);
5048 find_reloads_address_1 (mode
,
5049 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5050 GET_CODE (XEXP (ad
, op_index
)),
5051 &XEXP (ad
, 1 - op_index
), opnum
,
5058 /* See if address becomes valid when an eliminable register
5059 in a sum is replaced. */
5062 if (GET_CODE (ad
) == PLUS
)
5063 tem
= subst_indexed_address (ad
);
5064 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
5066 /* Ok, we win that way. Replace any additional eliminable
5069 subst_reg_equivs_changed
= 0;
5070 tem
= subst_reg_equivs (tem
, insn
);
5072 /* Make sure that didn't make the address invalid again. */
5074 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
5081 /* If constants aren't valid addresses, reload the constant address
5083 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
5085 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5086 Unshare it so we can safely alter it. */
5087 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5088 && CONSTANT_POOL_ADDRESS_P (ad
))
5090 *memrefloc
= copy_rtx (*memrefloc
);
5091 loc
= &XEXP (*memrefloc
, 0);
5093 loc
= &XEXP (*loc
, 0);
5096 find_reloads_address_part (ad
, loc
, base_reg_class (mode
, MEM
, SCRATCH
),
5097 Pmode
, opnum
, type
, ind_levels
);
5098 return ! removed_and
;
5101 return find_reloads_address_1 (mode
, ad
, 0, MEM
, SCRATCH
, loc
, opnum
, type
,
5105 /* Find all pseudo regs appearing in AD
5106 that are eliminable in favor of equivalent values
5107 and do not have hard regs; replace them by their equivalents.
5108 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5109 front of it for pseudos that we have to replace with stack slots. */
5112 subst_reg_equivs (rtx ad
, rtx insn
)
5114 RTX_CODE code
= GET_CODE (ad
);
5133 int regno
= REGNO (ad
);
5135 if (reg_equiv_constant
[regno
] != 0)
5137 subst_reg_equivs_changed
= 1;
5138 return reg_equiv_constant
[regno
];
5140 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
5142 rtx mem
= make_memloc (ad
, regno
);
5143 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
5145 subst_reg_equivs_changed
= 1;
5146 /* We mark the USE with QImode so that we recognize it
5147 as one that can be safely deleted at the end of
5149 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5158 /* Quickly dispose of a common case. */
5159 if (XEXP (ad
, 0) == frame_pointer_rtx
5160 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
5168 fmt
= GET_RTX_FORMAT (code
);
5169 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5171 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5175 /* Compute the sum of X and Y, making canonicalizations assumed in an
5176 address, namely: sum constant integers, surround the sum of two
5177 constants with a CONST, put the constant as the second operand, and
5178 group the constant on the outermost sum.
5180 This routine assumes both inputs are already in canonical form. */
5183 form_sum (rtx x
, rtx y
)
5186 enum machine_mode mode
= GET_MODE (x
);
5188 if (mode
== VOIDmode
)
5189 mode
= GET_MODE (y
);
5191 if (mode
== VOIDmode
)
5194 if (GET_CODE (x
) == CONST_INT
)
5195 return plus_constant (y
, INTVAL (x
));
5196 else if (GET_CODE (y
) == CONST_INT
)
5197 return plus_constant (x
, INTVAL (y
));
5198 else if (CONSTANT_P (x
))
5199 tem
= x
, x
= y
, y
= tem
;
5201 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5202 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
5204 /* Note that if the operands of Y are specified in the opposite
5205 order in the recursive calls below, infinite recursion will occur. */
5206 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5207 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
5209 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5210 constant will have been placed second. */
5211 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5213 if (GET_CODE (x
) == CONST
)
5215 if (GET_CODE (y
) == CONST
)
5218 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5221 return gen_rtx_PLUS (mode
, x
, y
);
5224 /* If ADDR is a sum containing a pseudo register that should be
5225 replaced with a constant (from reg_equiv_constant),
5226 return the result of doing so, and also apply the associative
5227 law so that the result is more likely to be a valid address.
5228 (But it is not guaranteed to be one.)
5230 Note that at most one register is replaced, even if more are
5231 replaceable. Also, we try to put the result into a canonical form
5232 so it is more likely to be a valid address.
5234 In all other cases, return ADDR. */
5237 subst_indexed_address (rtx addr
)
5239 rtx op0
= 0, op1
= 0, op2
= 0;
5243 if (GET_CODE (addr
) == PLUS
)
5245 /* Try to find a register to replace. */
5246 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5248 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5249 && reg_renumber
[regno
] < 0
5250 && reg_equiv_constant
[regno
] != 0)
5251 op0
= reg_equiv_constant
[regno
];
5252 else if (REG_P (op1
)
5253 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5254 && reg_renumber
[regno
] < 0
5255 && reg_equiv_constant
[regno
] != 0)
5256 op1
= reg_equiv_constant
[regno
];
5257 else if (GET_CODE (op0
) == PLUS
5258 && (tem
= subst_indexed_address (op0
)) != op0
)
5260 else if (GET_CODE (op1
) == PLUS
5261 && (tem
= subst_indexed_address (op1
)) != op1
)
5266 /* Pick out up to three things to add. */
5267 if (GET_CODE (op1
) == PLUS
)
5268 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5269 else if (GET_CODE (op0
) == PLUS
)
5270 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5272 /* Compute the sum. */
5274 op1
= form_sum (op1
, op2
);
5276 op0
= form_sum (op0
, op1
);
5283 /* Update the REG_INC notes for an insn. It updates all REG_INC
5284 notes for the instruction which refer to REGNO the to refer
5285 to the reload number.
5287 INSN is the insn for which any REG_INC notes need updating.
5289 REGNO is the register number which has been reloaded.
5291 RELOADNUM is the reload number. */
5294 update_auto_inc_notes (rtx insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5295 int reloadnum ATTRIBUTE_UNUSED
)
5300 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5301 if (REG_NOTE_KIND (link
) == REG_INC
5302 && (int) REGNO (XEXP (link
, 0)) == regno
)
5303 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5307 /* Record the pseudo registers we must reload into hard registers in a
5308 subexpression of a would-be memory address, X referring to a value
5309 in mode MODE. (This function is not called if the address we find
5312 CONTEXT = 1 means we are considering regs as index regs,
5313 = 0 means we are considering them as base regs.
5314 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5316 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5317 is the code of the index part of the address. Otherwise, pass SCRATCH
5319 OPNUM and TYPE specify the purpose of any reloads made.
5321 IND_LEVELS says how many levels of indirect addressing are
5322 supported at this point in the address.
5324 INSN, if nonzero, is the insn in which we do the reload. It is used
5325 to determine if we may generate output reloads.
5327 We return nonzero if X, as a whole, is reloaded or replaced. */
5329 /* Note that we take shortcuts assuming that no multi-reg machine mode
5330 occurs as part of an address.
5331 Also, this is not fully machine-customizable; it works for machines
5332 such as VAXen and 68000's and 32000's, but other possible machines
5333 could have addressing modes that this does not handle right.
5334 If you add push_reload calls here, you need to make sure gen_reload
5335 handles those cases gracefully. */
5338 find_reloads_address_1 (enum machine_mode mode
, rtx x
, int context
,
5339 enum rtx_code outer_code
, enum rtx_code index_code
,
5340 rtx
*loc
, int opnum
, enum reload_type type
,
5341 int ind_levels
, rtx insn
)
5343 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, OUTER, INDEX) \
5345 ? regno_ok_for_base_p (REGNO, MODE, OUTER, INDEX) \
5346 : REGNO_OK_FOR_INDEX_P (REGNO))
5348 enum reg_class context_reg_class
;
5349 RTX_CODE code
= GET_CODE (x
);
5352 context_reg_class
= INDEX_REG_CLASS
;
5354 context_reg_class
= base_reg_class (mode
, outer_code
, index_code
);
5360 rtx orig_op0
= XEXP (x
, 0);
5361 rtx orig_op1
= XEXP (x
, 1);
5362 RTX_CODE code0
= GET_CODE (orig_op0
);
5363 RTX_CODE code1
= GET_CODE (orig_op1
);
5367 if (GET_CODE (op0
) == SUBREG
)
5369 op0
= SUBREG_REG (op0
);
5370 code0
= GET_CODE (op0
);
5371 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5372 op0
= gen_rtx_REG (word_mode
,
5374 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5375 GET_MODE (SUBREG_REG (orig_op0
)),
5376 SUBREG_BYTE (orig_op0
),
5377 GET_MODE (orig_op0
))));
5380 if (GET_CODE (op1
) == SUBREG
)
5382 op1
= SUBREG_REG (op1
);
5383 code1
= GET_CODE (op1
);
5384 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5385 /* ??? Why is this given op1's mode and above for
5386 ??? op0 SUBREGs we use word_mode? */
5387 op1
= gen_rtx_REG (GET_MODE (op1
),
5389 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5390 GET_MODE (SUBREG_REG (orig_op1
)),
5391 SUBREG_BYTE (orig_op1
),
5392 GET_MODE (orig_op1
))));
5394 /* Plus in the index register may be created only as a result of
5395 register rematerialization for expression like &localvar*4. Reload it.
5396 It may be possible to combine the displacement on the outer level,
5397 but it is probably not worthwhile to do so. */
5400 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5401 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5402 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5404 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5408 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5409 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5411 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5412 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5414 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5415 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5419 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5420 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5422 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5423 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5425 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5426 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5430 else if (code0
== CONST_INT
|| code0
== CONST
5431 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5432 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, code0
,
5433 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5436 else if (code1
== CONST_INT
|| code1
== CONST
5437 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5438 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, code1
,
5439 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5442 else if (code0
== REG
&& code1
== REG
)
5444 if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5445 && regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5447 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5448 && regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5450 else if (regno_ok_for_base_p (REGNO (op1
), mode
, PLUS
, REG
))
5451 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5452 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5454 else if (regno_ok_for_base_p (REGNO (op0
), mode
, PLUS
, REG
))
5455 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5456 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5458 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5459 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5460 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5462 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5463 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5464 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5468 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5469 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5471 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5472 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5477 else if (code0
== REG
)
5479 find_reloads_address_1 (mode
, orig_op0
, 1, PLUS
, SCRATCH
,
5480 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5482 find_reloads_address_1 (mode
, orig_op1
, 0, PLUS
, REG
,
5483 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5487 else if (code1
== REG
)
5489 find_reloads_address_1 (mode
, orig_op1
, 1, PLUS
, SCRATCH
,
5490 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5492 find_reloads_address_1 (mode
, orig_op0
, 0, PLUS
, REG
,
5493 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5503 rtx op0
= XEXP (x
, 0);
5504 rtx op1
= XEXP (x
, 1);
5505 enum rtx_code index_code
;
5509 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5512 /* Currently, we only support {PRE,POST}_MODIFY constructs
5513 where a base register is {inc,dec}remented by the contents
5514 of another register or by a constant value. Thus, these
5515 operands must match. */
5516 gcc_assert (op0
== XEXP (op1
, 0));
5518 /* Require index register (or constant). Let's just handle the
5519 register case in the meantime... If the target allows
5520 auto-modify by a constant then we could try replacing a pseudo
5521 register with its equivalent constant where applicable. */
5522 if (REG_P (XEXP (op1
, 1)))
5523 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5524 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5525 &XEXP (op1
, 1), opnum
, type
, ind_levels
,
5528 gcc_assert (REG_P (XEXP (op1
, 0)));
5530 regno
= REGNO (XEXP (op1
, 0));
5531 index_code
= GET_CODE (XEXP (op1
, 1));
5533 /* A register that is incremented cannot be constant! */
5534 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5535 || reg_equiv_constant
[regno
] == 0);
5537 /* Handle a register that is equivalent to a memory location
5538 which cannot be addressed directly. */
5539 if (reg_equiv_memory_loc
[regno
] != 0
5540 && (reg_equiv_address
[regno
] != 0
5541 || num_not_at_initial_offset
))
5543 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5545 if (reg_equiv_address
[regno
]
5546 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5548 /* First reload the memory location's address.
5549 We can't use ADDR_TYPE (type) here, because we need to
5550 write back the value after reading it, hence we actually
5551 need two registers. */
5552 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5553 &XEXP (tem
, 0), opnum
,
5557 /* Then reload the memory location into a base
5559 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5561 base_reg_class (mode
, code
,
5563 GET_MODE (x
), GET_MODE (x
), 0,
5564 0, opnum
, RELOAD_OTHER
);
5566 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5571 if (reg_renumber
[regno
] >= 0)
5572 regno
= reg_renumber
[regno
];
5574 /* We require a base register here... */
5575 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), code
, index_code
))
5577 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5578 &XEXP (op1
, 0), &XEXP (x
, 0),
5579 base_reg_class (mode
, code
, index_code
),
5580 GET_MODE (x
), GET_MODE (x
), 0, 0,
5581 opnum
, RELOAD_OTHER
);
5583 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5593 if (REG_P (XEXP (x
, 0)))
5595 int regno
= REGNO (XEXP (x
, 0));
5599 /* A register that is incremented cannot be constant! */
5600 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5601 || reg_equiv_constant
[regno
] == 0);
5603 /* Handle a register that is equivalent to a memory location
5604 which cannot be addressed directly. */
5605 if (reg_equiv_memory_loc
[regno
] != 0
5606 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5608 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5609 if (reg_equiv_address
[regno
]
5610 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5612 /* First reload the memory location's address.
5613 We can't use ADDR_TYPE (type) here, because we need to
5614 write back the value after reading it, hence we actually
5615 need two registers. */
5616 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5617 &XEXP (tem
, 0), opnum
, type
,
5619 /* Put this inside a new increment-expression. */
5620 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5621 /* Proceed to reload that, as if it contained a register. */
5625 /* If we have a hard register that is ok as an index,
5626 don't make a reload. If an autoincrement of a nice register
5627 isn't "valid", it must be that no autoincrement is "valid".
5628 If that is true and something made an autoincrement anyway,
5629 this must be a special context where one is allowed.
5630 (For example, a "push" instruction.)
5631 We can't improve this address, so leave it alone. */
5633 /* Otherwise, reload the autoincrement into a suitable hard reg
5634 and record how much to increment by. */
5636 if (reg_renumber
[regno
] >= 0)
5637 regno
= reg_renumber
[regno
];
5638 if (regno
>= FIRST_PSEUDO_REGISTER
5639 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5644 /* If we can output the register afterwards, do so, this
5645 saves the extra update.
5646 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5647 CALL_INSN - and it does not set CC0.
5648 But don't do this if we cannot directly address the
5649 memory location, since this will make it harder to
5650 reuse address reloads, and increases register pressure.
5651 Also don't do this if we can probably update x directly. */
5652 rtx equiv
= (MEM_P (XEXP (x
, 0))
5654 : reg_equiv_mem
[regno
]);
5655 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5656 if (insn
&& NONJUMP_INSN_P (insn
) && equiv
5657 && memory_operand (equiv
, GET_MODE (equiv
))
5659 && ! sets_cc0_p (PATTERN (insn
))
5661 && ! (icode
!= CODE_FOR_nothing
5662 && ((*insn_data
[icode
].operand
[0].predicate
)
5664 && ((*insn_data
[icode
].operand
[1].predicate
)
5667 /* We use the original pseudo for loc, so that
5668 emit_reload_insns() knows which pseudo this
5669 reload refers to and updates the pseudo rtx, not
5670 its equivalent memory location, as well as the
5671 corresponding entry in reg_last_reload_reg. */
5672 loc
= &XEXP (x_orig
, 0);
5675 = push_reload (x
, x
, loc
, loc
,
5677 GET_MODE (x
), GET_MODE (x
), 0, 0,
5678 opnum
, RELOAD_OTHER
);
5683 = push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5685 GET_MODE (x
), GET_MODE (x
), 0, 0,
5688 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5693 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5699 else if (MEM_P (XEXP (x
, 0)))
5701 /* This is probably the result of a substitution, by eliminate_regs,
5702 of an equivalent address for a pseudo that was not allocated to a
5703 hard register. Verify that the specified address is valid and
5704 reload it into a register. */
5705 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5706 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5710 /* Since we know we are going to reload this item, don't decrement
5711 for the indirection level.
5713 Note that this is actually conservative: it would be slightly
5714 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5716 /* We can't use ADDR_TYPE (type) here, because we need to
5717 write back the value after reading it, hence we actually
5718 need two registers. */
5719 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5720 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5721 opnum
, type
, ind_levels
, insn
);
5723 reloadnum
= push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5725 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5727 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5729 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5731 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5740 /* Look for parts to reload in the inner expression and reload them
5741 too, in addition to this operation. Reloading all inner parts in
5742 addition to this one shouldn't be necessary, but at this point,
5743 we don't know if we can possibly omit any part that *can* be
5744 reloaded. Targets that are better off reloading just either part
5745 (or perhaps even a different part of an outer expression), should
5746 define LEGITIMIZE_RELOAD_ADDRESS. */
5747 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), XEXP (x
, 0),
5748 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5749 type
, ind_levels
, insn
);
5750 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5752 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5756 /* This is probably the result of a substitution, by eliminate_regs, of
5757 an equivalent address for a pseudo that was not allocated to a hard
5758 register. Verify that the specified address is valid and reload it
5761 Since we know we are going to reload this item, don't decrement for
5762 the indirection level.
5764 Note that this is actually conservative: it would be slightly more
5765 efficient to use the value of SPILL_INDIRECT_LEVELS from
5768 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5769 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5770 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5772 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5777 int regno
= REGNO (x
);
5779 if (reg_equiv_constant
[regno
] != 0)
5781 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5783 GET_MODE (x
), opnum
, type
, ind_levels
);
5787 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5788 that feeds this insn. */
5789 if (reg_equiv_mem
[regno
] != 0)
5791 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, (rtx
*) 0,
5793 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5798 if (reg_equiv_memory_loc
[regno
]
5799 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5801 rtx tem
= make_memloc (x
, regno
);
5802 if (reg_equiv_address
[regno
] != 0
5803 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5806 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5807 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5812 if (reg_renumber
[regno
] >= 0)
5813 regno
= reg_renumber
[regno
];
5815 if (regno
>= FIRST_PSEUDO_REGISTER
5816 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5819 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5821 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5825 /* If a register appearing in an address is the subject of a CLOBBER
5826 in this insn, reload it into some other register to be safe.
5827 The CLOBBER is supposed to make the register unavailable
5828 from before this insn to after it. */
5829 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5831 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5833 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5840 if (REG_P (SUBREG_REG (x
)))
5842 /* If this is a SUBREG of a hard register and the resulting register
5843 is of the wrong class, reload the whole SUBREG. This avoids
5844 needless copies if SUBREG_REG is multi-word. */
5845 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5847 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5849 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, outer_code
,
5852 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5854 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5858 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5859 is larger than the class size, then reload the whole SUBREG. */
5862 enum reg_class
class = context_reg_class
;
5863 if ((unsigned) CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5864 > reg_class_size
[class])
5866 x
= find_reloads_subreg_address (x
, 0, opnum
,
5869 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5870 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5882 const char *fmt
= GET_RTX_FORMAT (code
);
5885 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5888 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
5890 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, code
, SCRATCH
,
5891 &XEXP (x
, i
), opnum
, type
, ind_levels
, insn
);
5895 #undef REG_OK_FOR_CONTEXT
5899 /* X, which is found at *LOC, is a part of an address that needs to be
5900 reloaded into a register of class CLASS. If X is a constant, or if
5901 X is a PLUS that contains a constant, check that the constant is a
5902 legitimate operand and that we are supposed to be able to load
5903 it into the register.
5905 If not, force the constant into memory and reload the MEM instead.
5907 MODE is the mode to use, in case X is an integer constant.
5909 OPNUM and TYPE describe the purpose of any reloads made.
5911 IND_LEVELS says how many levels of indirect addressing this machine
5915 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class
class,
5916 enum machine_mode mode
, int opnum
,
5917 enum reload_type type
, int ind_levels
)
5920 && (! LEGITIMATE_CONSTANT_P (x
)
5921 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5925 tem
= x
= force_const_mem (mode
, x
);
5926 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5927 opnum
, type
, ind_levels
, 0);
5930 else if (GET_CODE (x
) == PLUS
5931 && CONSTANT_P (XEXP (x
, 1))
5932 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5933 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5937 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5938 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5939 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5940 opnum
, type
, ind_levels
, 0);
5943 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, class,
5944 mode
, VOIDmode
, 0, 0, opnum
, type
);
5947 /* X, a subreg of a pseudo, is a part of an address that needs to be
5950 If the pseudo is equivalent to a memory location that cannot be directly
5951 addressed, make the necessary address reloads.
5953 If address reloads have been necessary, or if the address is changed
5954 by register elimination, return the rtx of the memory location;
5955 otherwise, return X.
5957 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5960 OPNUM and TYPE identify the purpose of the reload.
5962 IND_LEVELS says how many levels of indirect addressing are
5963 supported at this point in the address.
5965 INSN, if nonzero, is the insn in which we do the reload. It is used
5966 to determine where to put USEs for pseudos that we have to replace with
5970 find_reloads_subreg_address (rtx x
, int force_replace
, int opnum
,
5971 enum reload_type type
, int ind_levels
, rtx insn
)
5973 int regno
= REGNO (SUBREG_REG (x
));
5975 if (reg_equiv_memory_loc
[regno
])
5977 /* If the address is not directly addressable, or if the address is not
5978 offsettable, then it must be replaced. */
5980 && (reg_equiv_address
[regno
]
5981 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5984 if (force_replace
|| num_not_at_initial_offset
)
5986 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5988 /* If the address changes because of register elimination, then
5989 it must be replaced. */
5991 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5993 unsigned outer_size
= GET_MODE_SIZE (GET_MODE (x
));
5994 unsigned inner_size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5997 /* For big-endian paradoxical subregs, SUBREG_BYTE does not
5998 hold the correct (negative) byte offset. */
5999 if (BYTES_BIG_ENDIAN
&& outer_size
> inner_size
)
6000 offset
= inner_size
- outer_size
;
6002 offset
= SUBREG_BYTE (x
);
6004 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
6005 PUT_MODE (tem
, GET_MODE (x
));
6007 /* If this was a paradoxical subreg that we replaced, the
6008 resulting memory must be sufficiently aligned to allow
6009 us to widen the mode of the memory. */
6010 if (outer_size
> inner_size
)
6014 base
= XEXP (tem
, 0);
6015 if (GET_CODE (base
) == PLUS
)
6017 if (GET_CODE (XEXP (base
, 1)) == CONST_INT
6018 && INTVAL (XEXP (base
, 1)) % outer_size
!= 0)
6020 base
= XEXP (base
, 0);
6023 || (REGNO_POINTER_ALIGN (REGNO (base
))
6024 < outer_size
* BITS_PER_UNIT
))
6028 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
6029 &XEXP (tem
, 0), opnum
, type
,
6032 /* If this is not a toplevel operand, find_reloads doesn't see
6033 this substitution. We have to emit a USE of the pseudo so
6034 that delete_output_reload can see it. */
6035 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6036 /* We mark the USE with QImode so that we recognize it
6037 as one that can be safely deleted at the end of
6039 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
,
6049 /* Substitute into the current INSN the registers into which we have reloaded
6050 the things that need reloading. The array `replacements'
6051 contains the locations of all pointers that must be changed
6052 and says what to replace them with.
6054 Return the rtx that X translates into; usually X, but modified. */
6057 subst_reloads (rtx insn
)
6061 for (i
= 0; i
< n_replacements
; i
++)
6063 struct replacement
*r
= &replacements
[i
];
6064 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6067 #ifdef ENABLE_CHECKING
6068 /* Internal consistency test. Check that we don't modify
6069 anything in the equivalence arrays. Whenever something from
6070 those arrays needs to be reloaded, it must be unshared before
6071 being substituted into; the equivalence must not be modified.
6072 Otherwise, if the equivalence is used after that, it will
6073 have been modified, and the thing substituted (probably a
6074 register) is likely overwritten and not a usable equivalence. */
6077 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6079 #define CHECK_MODF(ARRAY) \
6080 gcc_assert (!ARRAY[check_regno] \
6081 || !loc_mentioned_in_p (r->where, \
6082 ARRAY[check_regno]))
6084 CHECK_MODF (reg_equiv_constant
);
6085 CHECK_MODF (reg_equiv_memory_loc
);
6086 CHECK_MODF (reg_equiv_address
);
6087 CHECK_MODF (reg_equiv_mem
);
6090 #endif /* ENABLE_CHECKING */
6092 /* If we're replacing a LABEL_REF with a register, add a
6093 REG_LABEL note to indicate to flow which label this
6094 register refers to. */
6095 if (GET_CODE (*r
->where
) == LABEL_REF
6098 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_LABEL
,
6099 XEXP (*r
->where
, 0),
6101 JUMP_LABEL (insn
) = XEXP (*r
->where
, 0);
6104 /* Encapsulate RELOADREG so its machine mode matches what
6105 used to be there. Note that gen_lowpart_common will
6106 do the wrong thing if RELOADREG is multi-word. RELOADREG
6107 will always be a REG here. */
6108 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6109 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6111 /* If we are putting this into a SUBREG and RELOADREG is a
6112 SUBREG, we would be making nested SUBREGs, so we have to fix
6113 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
6115 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
6117 if (GET_MODE (*r
->subreg_loc
)
6118 == GET_MODE (SUBREG_REG (reloadreg
)))
6119 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
6123 SUBREG_BYTE (*r
->subreg_loc
) + SUBREG_BYTE (reloadreg
);
6125 /* When working with SUBREGs the rule is that the byte
6126 offset must be a multiple of the SUBREG's mode. */
6127 final_offset
= (final_offset
/
6128 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6129 final_offset
= (final_offset
*
6130 GET_MODE_SIZE (GET_MODE (*r
->subreg_loc
)));
6132 *r
->where
= SUBREG_REG (reloadreg
);
6133 SUBREG_BYTE (*r
->subreg_loc
) = final_offset
;
6137 *r
->where
= reloadreg
;
6139 /* If reload got no reg and isn't optional, something's wrong. */
6141 gcc_assert (rld
[r
->what
].optional
);
6145 /* Make a copy of any replacements being done into X and move those
6146 copies to locations in Y, a copy of X. */
6149 copy_replacements (rtx x
, rtx y
)
6151 /* We can't support X being a SUBREG because we might then need to know its
6152 location if something inside it was replaced. */
6153 gcc_assert (GET_CODE (x
) != SUBREG
);
6155 copy_replacements_1 (&x
, &y
, n_replacements
);
6159 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6163 struct replacement
*r
;
6167 for (j
= 0; j
< orig_replacements
; j
++)
6169 if (replacements
[j
].subreg_loc
== px
)
6171 r
= &replacements
[n_replacements
++];
6172 r
->where
= replacements
[j
].where
;
6174 r
->what
= replacements
[j
].what
;
6175 r
->mode
= replacements
[j
].mode
;
6177 else if (replacements
[j
].where
== px
)
6179 r
= &replacements
[n_replacements
++];
6182 r
->what
= replacements
[j
].what
;
6183 r
->mode
= replacements
[j
].mode
;
6189 code
= GET_CODE (x
);
6190 fmt
= GET_RTX_FORMAT (code
);
6192 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6195 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6196 else if (fmt
[i
] == 'E')
6197 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6198 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6203 /* Change any replacements being done to *X to be done to *Y. */
6206 move_replacements (rtx
*x
, rtx
*y
)
6210 for (i
= 0; i
< n_replacements
; i
++)
6211 if (replacements
[i
].subreg_loc
== x
)
6212 replacements
[i
].subreg_loc
= y
;
6213 else if (replacements
[i
].where
== x
)
6215 replacements
[i
].where
= y
;
6216 replacements
[i
].subreg_loc
= 0;
6220 /* If LOC was scheduled to be replaced by something, return the replacement.
6221 Otherwise, return *LOC. */
6224 find_replacement (rtx
*loc
)
6226 struct replacement
*r
;
6228 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6230 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6232 if (reloadreg
&& r
->where
== loc
)
6234 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6235 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
6239 else if (reloadreg
&& r
->subreg_loc
== loc
)
6241 /* RELOADREG must be either a REG or a SUBREG.
6243 ??? Is it actually still ever a SUBREG? If so, why? */
6245 if (REG_P (reloadreg
))
6246 return gen_rtx_REG (GET_MODE (*loc
),
6247 (REGNO (reloadreg
) +
6248 subreg_regno_offset (REGNO (SUBREG_REG (*loc
)),
6249 GET_MODE (SUBREG_REG (*loc
)),
6252 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
6256 int final_offset
= SUBREG_BYTE (reloadreg
) + SUBREG_BYTE (*loc
);
6258 /* When working with SUBREGs the rule is that the byte
6259 offset must be a multiple of the SUBREG's mode. */
6260 final_offset
= (final_offset
/ GET_MODE_SIZE (GET_MODE (*loc
)));
6261 final_offset
= (final_offset
* GET_MODE_SIZE (GET_MODE (*loc
)));
6262 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
6268 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6269 what's inside and make a new rtl if so. */
6270 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6271 || GET_CODE (*loc
) == MULT
)
6273 rtx x
= find_replacement (&XEXP (*loc
, 0));
6274 rtx y
= find_replacement (&XEXP (*loc
, 1));
6276 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6277 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6283 /* Return nonzero if register in range [REGNO, ENDREGNO)
6284 appears either explicitly or implicitly in X
6285 other than being stored into (except for earlyclobber operands).
6287 References contained within the substructure at LOC do not count.
6288 LOC may be zero, meaning don't ignore anything.
6290 This is similar to refers_to_regno_p in rtlanal.c except that we
6291 look at equivalences for pseudos that didn't get hard registers. */
6294 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6306 code
= GET_CODE (x
);
6313 /* If this is a pseudo, a hard register must not have been allocated.
6314 X must therefore either be a constant or be in memory. */
6315 if (r
>= FIRST_PSEUDO_REGISTER
)
6317 if (reg_equiv_memory_loc
[r
])
6318 return refers_to_regno_for_reload_p (regno
, endregno
,
6319 reg_equiv_memory_loc
[r
],
6322 gcc_assert (reg_equiv_constant
[r
] || reg_equiv_invariant
[r
]);
6326 return (endregno
> r
6327 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6328 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6332 /* If this is a SUBREG of a hard reg, we can see exactly which
6333 registers are being modified. Otherwise, handle normally. */
6334 if (REG_P (SUBREG_REG (x
))
6335 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6337 unsigned int inner_regno
= subreg_regno (x
);
6338 unsigned int inner_endregno
6339 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6340 ? hard_regno_nregs
[inner_regno
][GET_MODE (x
)] : 1);
6342 return endregno
> inner_regno
&& regno
< inner_endregno
;
6348 if (&SET_DEST (x
) != loc
6349 /* Note setting a SUBREG counts as referring to the REG it is in for
6350 a pseudo but not for hard registers since we can
6351 treat each word individually. */
6352 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6353 && loc
!= &SUBREG_REG (SET_DEST (x
))
6354 && REG_P (SUBREG_REG (SET_DEST (x
)))
6355 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6356 && refers_to_regno_for_reload_p (regno
, endregno
,
6357 SUBREG_REG (SET_DEST (x
)),
6359 /* If the output is an earlyclobber operand, this is
6361 || ((!REG_P (SET_DEST (x
))
6362 || earlyclobber_operand_p (SET_DEST (x
)))
6363 && refers_to_regno_for_reload_p (regno
, endregno
,
6364 SET_DEST (x
), loc
))))
6367 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6376 /* X does not match, so try its subexpressions. */
6378 fmt
= GET_RTX_FORMAT (code
);
6379 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6381 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6389 if (refers_to_regno_for_reload_p (regno
, endregno
,
6393 else if (fmt
[i
] == 'E')
6396 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6397 if (loc
!= &XVECEXP (x
, i
, j
)
6398 && refers_to_regno_for_reload_p (regno
, endregno
,
6399 XVECEXP (x
, i
, j
), loc
))
6406 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6407 we check if any register number in X conflicts with the relevant register
6408 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6409 contains a MEM (we don't bother checking for memory addresses that can't
6410 conflict because we expect this to be a rare case.
6412 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6413 that we look at equivalences for pseudos that didn't get hard registers. */
6416 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6418 int regno
, endregno
;
6420 /* Overly conservative. */
6421 if (GET_CODE (x
) == STRICT_LOW_PART
6422 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6425 /* If either argument is a constant, then modifying X can not affect IN. */
6426 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6428 else if (GET_CODE (x
) == SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
)
6429 return refers_to_mem_for_reload_p (in
);
6430 else if (GET_CODE (x
) == SUBREG
)
6432 regno
= REGNO (SUBREG_REG (x
));
6433 if (regno
< FIRST_PSEUDO_REGISTER
)
6434 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6435 GET_MODE (SUBREG_REG (x
)),
6443 /* If this is a pseudo, it must not have been assigned a hard register.
6444 Therefore, it must either be in memory or be a constant. */
6446 if (regno
>= FIRST_PSEUDO_REGISTER
)
6448 if (reg_equiv_memory_loc
[regno
])
6449 return refers_to_mem_for_reload_p (in
);
6450 gcc_assert (reg_equiv_constant
[regno
]);
6455 return refers_to_mem_for_reload_p (in
);
6456 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6457 || GET_CODE (x
) == CC0
)
6458 return reg_mentioned_p (x
, in
);
6461 gcc_assert (GET_CODE (x
) == PLUS
);
6463 /* We actually want to know if X is mentioned somewhere inside IN.
6464 We must not say that (plus (sp) (const_int 124)) is in
6465 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6466 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6467 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6472 else if (GET_CODE (in
) == PLUS
)
6473 return (reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6474 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6475 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6476 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6479 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6480 ? hard_regno_nregs
[regno
][GET_MODE (x
)] : 1);
6482 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6485 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6489 refers_to_mem_for_reload_p (rtx x
)
6498 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6499 && reg_equiv_memory_loc
[REGNO (x
)]);
6501 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6502 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6504 && (MEM_P (XEXP (x
, i
))
6505 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6511 /* Check the insns before INSN to see if there is a suitable register
6512 containing the same value as GOAL.
6513 If OTHER is -1, look for a register in class CLASS.
6514 Otherwise, just see if register number OTHER shares GOAL's value.
6516 Return an rtx for the register found, or zero if none is found.
6518 If RELOAD_REG_P is (short *)1,
6519 we reject any hard reg that appears in reload_reg_rtx
6520 because such a hard reg is also needed coming into this insn.
6522 If RELOAD_REG_P is any other nonzero value,
6523 it is a vector indexed by hard reg number
6524 and we reject any hard reg whose element in the vector is nonnegative
6525 as well as any that appears in reload_reg_rtx.
6527 If GOAL is zero, then GOALREG is a register number; we look
6528 for an equivalent for that register.
6530 MODE is the machine mode of the value we want an equivalence for.
6531 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6533 This function is used by jump.c as well as in the reload pass.
6535 If GOAL is the sum of the stack pointer and a constant, we treat it
6536 as if it were a constant except that sp is required to be unchanging. */
6539 find_equiv_reg (rtx goal
, rtx insn
, enum reg_class
class, int other
,
6540 short *reload_reg_p
, int goalreg
, enum machine_mode mode
)
6543 rtx goaltry
, valtry
, value
, where
;
6549 int goal_mem_addr_varies
= 0;
6550 int need_stable_sp
= 0;
6557 else if (REG_P (goal
))
6558 regno
= REGNO (goal
);
6559 else if (MEM_P (goal
))
6561 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6562 if (MEM_VOLATILE_P (goal
))
6564 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6566 /* An address with side effects must be reexecuted. */
6581 else if (CONSTANT_P (goal
))
6583 else if (GET_CODE (goal
) == PLUS
6584 && XEXP (goal
, 0) == stack_pointer_rtx
6585 && CONSTANT_P (XEXP (goal
, 1)))
6586 goal_const
= need_stable_sp
= 1;
6587 else if (GET_CODE (goal
) == PLUS
6588 && XEXP (goal
, 0) == frame_pointer_rtx
6589 && CONSTANT_P (XEXP (goal
, 1)))
6595 /* Scan insns back from INSN, looking for one that copies
6596 a value into or out of GOAL.
6597 Stop and give up if we reach a label. */
6603 if (p
== 0 || LABEL_P (p
)
6604 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6607 if (NONJUMP_INSN_P (p
)
6608 /* If we don't want spill regs ... */
6609 && (! (reload_reg_p
!= 0
6610 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6611 /* ... then ignore insns introduced by reload; they aren't
6612 useful and can cause results in reload_as_needed to be
6613 different from what they were when calculating the need for
6614 spills. If we notice an input-reload insn here, we will
6615 reject it below, but it might hide a usable equivalent.
6616 That makes bad code. It may even fail: perhaps no reg was
6617 spilled for this insn because it was assumed we would find
6619 || INSN_UID (p
) < reload_first_uid
))
6622 pat
= single_set (p
);
6624 /* First check for something that sets some reg equal to GOAL. */
6627 && true_regnum (SET_SRC (pat
)) == regno
6628 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6631 && true_regnum (SET_DEST (pat
)) == regno
6632 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6634 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6635 /* When looking for stack pointer + const,
6636 make sure we don't use a stack adjust. */
6637 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6638 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6640 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6641 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6643 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6644 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6645 /* If we are looking for a constant,
6646 and something equivalent to that constant was copied
6647 into a reg, we can use that reg. */
6648 || (goal_const
&& REG_NOTES (p
) != 0
6649 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6650 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6652 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6653 || (REG_P (SET_DEST (pat
))
6654 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6655 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6656 && GET_CODE (goal
) == CONST_INT
6658 = operand_subword (XEXP (tem
, 0), 0, 0,
6660 && rtx_equal_p (goal
, goaltry
)
6662 = operand_subword (SET_DEST (pat
), 0, 0,
6664 && (valueno
= true_regnum (valtry
)) >= 0)))
6665 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6667 && REG_P (SET_DEST (pat
))
6668 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6669 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6670 && GET_CODE (goal
) == CONST_INT
6671 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6673 && rtx_equal_p (goal
, goaltry
)
6675 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6676 && (valueno
= true_regnum (valtry
)) >= 0)))
6680 if (valueno
!= other
)
6683 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6689 for (i
= hard_regno_nregs
[valueno
][mode
] - 1; i
>= 0; i
--)
6690 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6703 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6704 (or copying VALUE into GOAL, if GOAL is also a register).
6705 Now verify that VALUE is really valid. */
6707 /* VALUENO is the register number of VALUE; a hard register. */
6709 /* Don't try to re-use something that is killed in this insn. We want
6710 to be able to trust REG_UNUSED notes. */
6711 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6714 /* If we propose to get the value from the stack pointer or if GOAL is
6715 a MEM based on the stack pointer, we need a stable SP. */
6716 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6717 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6721 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6722 if (GET_MODE (value
) != mode
)
6725 /* Reject VALUE if it was loaded from GOAL
6726 and is also a register that appears in the address of GOAL. */
6728 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6729 && refers_to_regno_for_reload_p (valueno
,
6731 + hard_regno_nregs
[valueno
][mode
]),
6735 /* Reject registers that overlap GOAL. */
6737 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6738 nregs
= hard_regno_nregs
[regno
][mode
];
6741 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6743 if (!goal_mem
&& !goal_const
6744 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6747 /* Reject VALUE if it is one of the regs reserved for reloads.
6748 Reload1 knows how to reuse them anyway, and it would get
6749 confused if we allocated one without its knowledge.
6750 (Now that insns introduced by reload are ignored above,
6751 this case shouldn't happen, but I'm not positive.) */
6753 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6756 for (i
= 0; i
< valuenregs
; ++i
)
6757 if (reload_reg_p
[valueno
+ i
] >= 0)
6761 /* Reject VALUE if it is a register being used for an input reload
6762 even if it is not one of those reserved. */
6764 if (reload_reg_p
!= 0)
6767 for (i
= 0; i
< n_reloads
; i
++)
6768 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6770 int regno1
= REGNO (rld
[i
].reg_rtx
);
6771 int nregs1
= hard_regno_nregs
[regno1
]
6772 [GET_MODE (rld
[i
].reg_rtx
)];
6773 if (regno1
< valueno
+ valuenregs
6774 && regno1
+ nregs1
> valueno
)
6780 /* We must treat frame pointer as varying here,
6781 since it can vary--in a nonlocal goto as generated by expand_goto. */
6782 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6784 /* Now verify that the values of GOAL and VALUE remain unaltered
6785 until INSN is reached. */
6794 /* Don't trust the conversion past a function call
6795 if either of the two is in a call-clobbered register, or memory. */
6800 if (goal_mem
|| need_stable_sp
)
6803 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6804 for (i
= 0; i
< nregs
; ++i
)
6805 if (call_used_regs
[regno
+ i
]
6806 || HARD_REGNO_CALL_PART_CLOBBERED (regno
+ i
, mode
))
6809 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6810 for (i
= 0; i
< valuenregs
; ++i
)
6811 if (call_used_regs
[valueno
+ i
]
6812 || HARD_REGNO_CALL_PART_CLOBBERED (valueno
+ i
, mode
))
6820 /* Watch out for unspec_volatile, and volatile asms. */
6821 if (volatile_insn_p (pat
))
6824 /* If this insn P stores in either GOAL or VALUE, return 0.
6825 If GOAL is a memory ref and this insn writes memory, return 0.
6826 If GOAL is a memory ref and its address is not constant,
6827 and this insn P changes a register used in GOAL, return 0. */
6829 if (GET_CODE (pat
) == COND_EXEC
)
6830 pat
= COND_EXEC_CODE (pat
);
6831 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6833 rtx dest
= SET_DEST (pat
);
6834 while (GET_CODE (dest
) == SUBREG
6835 || GET_CODE (dest
) == ZERO_EXTRACT
6836 || GET_CODE (dest
) == STRICT_LOW_PART
)
6837 dest
= XEXP (dest
, 0);
6840 int xregno
= REGNO (dest
);
6842 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6843 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6846 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6848 if (xregno
< valueno
+ valuenregs
6849 && xregno
+ xnregs
> valueno
)
6851 if (goal_mem_addr_varies
6852 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6854 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6857 else if (goal_mem
&& MEM_P (dest
)
6858 && ! push_operand (dest
, GET_MODE (dest
)))
6860 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6861 && reg_equiv_memory_loc
[regno
] != 0)
6863 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6866 else if (GET_CODE (pat
) == PARALLEL
)
6869 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6871 rtx v1
= XVECEXP (pat
, 0, i
);
6872 if (GET_CODE (v1
) == COND_EXEC
)
6873 v1
= COND_EXEC_CODE (v1
);
6874 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6876 rtx dest
= SET_DEST (v1
);
6877 while (GET_CODE (dest
) == SUBREG
6878 || GET_CODE (dest
) == ZERO_EXTRACT
6879 || GET_CODE (dest
) == STRICT_LOW_PART
)
6880 dest
= XEXP (dest
, 0);
6883 int xregno
= REGNO (dest
);
6885 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6886 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6889 if (xregno
< regno
+ nregs
6890 && xregno
+ xnregs
> regno
)
6892 if (xregno
< valueno
+ valuenregs
6893 && xregno
+ xnregs
> valueno
)
6895 if (goal_mem_addr_varies
6896 && reg_overlap_mentioned_for_reload_p (dest
,
6899 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6902 else if (goal_mem
&& MEM_P (dest
)
6903 && ! push_operand (dest
, GET_MODE (dest
)))
6905 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6906 && reg_equiv_memory_loc
[regno
] != 0)
6908 else if (need_stable_sp
6909 && push_operand (dest
, GET_MODE (dest
)))
6915 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
6919 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6920 link
= XEXP (link
, 1))
6922 pat
= XEXP (link
, 0);
6923 if (GET_CODE (pat
) == CLOBBER
)
6925 rtx dest
= SET_DEST (pat
);
6929 int xregno
= REGNO (dest
);
6931 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6933 if (xregno
< regno
+ nregs
6934 && xregno
+ xnregs
> regno
)
6936 else if (xregno
< valueno
+ valuenregs
6937 && xregno
+ xnregs
> valueno
)
6939 else if (goal_mem_addr_varies
6940 && reg_overlap_mentioned_for_reload_p (dest
,
6945 else if (goal_mem
&& MEM_P (dest
)
6946 && ! push_operand (dest
, GET_MODE (dest
)))
6948 else if (need_stable_sp
6949 && push_operand (dest
, GET_MODE (dest
)))
6956 /* If this insn auto-increments or auto-decrements
6957 either regno or valueno, return 0 now.
6958 If GOAL is a memory ref and its address is not constant,
6959 and this insn P increments a register used in GOAL, return 0. */
6963 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6964 if (REG_NOTE_KIND (link
) == REG_INC
6965 && REG_P (XEXP (link
, 0)))
6967 int incno
= REGNO (XEXP (link
, 0));
6968 if (incno
< regno
+ nregs
&& incno
>= regno
)
6970 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6972 if (goal_mem_addr_varies
6973 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6983 /* Find a place where INCED appears in an increment or decrement operator
6984 within X, and return the amount INCED is incremented or decremented by.
6985 The value is always positive. */
6988 find_inc_amount (rtx x
, rtx inced
)
6990 enum rtx_code code
= GET_CODE (x
);
6996 rtx addr
= XEXP (x
, 0);
6997 if ((GET_CODE (addr
) == PRE_DEC
6998 || GET_CODE (addr
) == POST_DEC
6999 || GET_CODE (addr
) == PRE_INC
7000 || GET_CODE (addr
) == POST_INC
)
7001 && XEXP (addr
, 0) == inced
)
7002 return GET_MODE_SIZE (GET_MODE (x
));
7003 else if ((GET_CODE (addr
) == PRE_MODIFY
7004 || GET_CODE (addr
) == POST_MODIFY
)
7005 && GET_CODE (XEXP (addr
, 1)) == PLUS
7006 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7007 && XEXP (addr
, 0) == inced
7008 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
7010 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7011 return i
< 0 ? -i
: i
;
7015 fmt
= GET_RTX_FORMAT (code
);
7016 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7020 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7027 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7029 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7039 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7040 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7044 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7051 if (! INSN_P (insn
))
7054 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7055 if (REG_NOTE_KIND (link
) == REG_INC
)
7057 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7058 if (test
>= regno
&& test
< endregno
)
7065 #define reg_inc_found_and_valid_p(regno,endregno,insn) 0
7069 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7070 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7071 REG_INC. REGNO must refer to a hard register. */
7074 regno_clobbered_p (unsigned int regno
, rtx insn
, enum machine_mode mode
,
7077 unsigned int nregs
, endregno
;
7079 /* regno must be a hard register. */
7080 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7082 nregs
= hard_regno_nregs
[regno
][mode
];
7083 endregno
= regno
+ nregs
;
7085 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7086 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7087 && REG_P (XEXP (PATTERN (insn
), 0)))
7089 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7091 return test
>= regno
&& test
< endregno
;
7094 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7097 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7099 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7103 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7104 if ((GET_CODE (elt
) == CLOBBER
7105 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7106 && REG_P (XEXP (elt
, 0)))
7108 unsigned int test
= REGNO (XEXP (elt
, 0));
7110 if (test
>= regno
&& test
< endregno
)
7114 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7122 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7124 reload_adjust_reg_for_mode (rtx reloadreg
, enum machine_mode mode
)
7128 if (GET_MODE (reloadreg
) == mode
)
7131 regno
= REGNO (reloadreg
);
7133 if (WORDS_BIG_ENDIAN
)
7134 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7135 - (int) hard_regno_nregs
[regno
][mode
];
7137 return gen_rtx_REG (mode
, regno
);
7140 static const char *const reload_when_needed_name
[] =
7143 "RELOAD_FOR_OUTPUT",
7145 "RELOAD_FOR_INPUT_ADDRESS",
7146 "RELOAD_FOR_INPADDR_ADDRESS",
7147 "RELOAD_FOR_OUTPUT_ADDRESS",
7148 "RELOAD_FOR_OUTADDR_ADDRESS",
7149 "RELOAD_FOR_OPERAND_ADDRESS",
7150 "RELOAD_FOR_OPADDR_ADDR",
7152 "RELOAD_FOR_OTHER_ADDRESS"
7155 /* These functions are used to print the variables set by 'find_reloads' */
7158 debug_reload_to_stream (FILE *f
)
7165 for (r
= 0; r
< n_reloads
; r
++)
7167 fprintf (f
, "Reload %d: ", r
);
7171 fprintf (f
, "reload_in (%s) = ",
7172 GET_MODE_NAME (rld
[r
].inmode
));
7173 print_inline_rtx (f
, rld
[r
].in
, 24);
7174 fprintf (f
, "\n\t");
7177 if (rld
[r
].out
!= 0)
7179 fprintf (f
, "reload_out (%s) = ",
7180 GET_MODE_NAME (rld
[r
].outmode
));
7181 print_inline_rtx (f
, rld
[r
].out
, 24);
7182 fprintf (f
, "\n\t");
7185 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
7187 fprintf (f
, "%s (opnum = %d)",
7188 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7191 if (rld
[r
].optional
)
7192 fprintf (f
, ", optional");
7194 if (rld
[r
].nongroup
)
7195 fprintf (f
, ", nongroup");
7197 if (rld
[r
].inc
!= 0)
7198 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7200 if (rld
[r
].nocombine
)
7201 fprintf (f
, ", can't combine");
7203 if (rld
[r
].secondary_p
)
7204 fprintf (f
, ", secondary_reload_p");
7206 if (rld
[r
].in_reg
!= 0)
7208 fprintf (f
, "\n\treload_in_reg: ");
7209 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7212 if (rld
[r
].out_reg
!= 0)
7214 fprintf (f
, "\n\treload_out_reg: ");
7215 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7218 if (rld
[r
].reg_rtx
!= 0)
7220 fprintf (f
, "\n\treload_reg_rtx: ");
7221 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7225 if (rld
[r
].secondary_in_reload
!= -1)
7227 fprintf (f
, "%ssecondary_in_reload = %d",
7228 prefix
, rld
[r
].secondary_in_reload
);
7232 if (rld
[r
].secondary_out_reload
!= -1)
7233 fprintf (f
, "%ssecondary_out_reload = %d\n",
7234 prefix
, rld
[r
].secondary_out_reload
);
7237 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7239 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7240 insn_data
[rld
[r
].secondary_in_icode
].name
);
7244 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7245 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7246 insn_data
[rld
[r
].secondary_out_icode
].name
);
7255 debug_reload_to_stream (stderr
);