main/gcc/config/microblaze/microblaze.h

   1 /* Definitions of target machine for GNU compiler for Xilinx MicroBlaze.
   2    Copyright (C) 2009-2014 Free Software Foundation, Inc.
   3
   4    Contributed by Michael Eager <eager@eagercon.com>.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 /* Standard GCC variables that we reference.  */
  23
  24 /* MicroBlaze external variables defined in microblaze.c.  */
  25
  26 /* Which pipeline to schedule for.  */
  27 enum pipeline_type
  28 {
  29   MICROBLAZE_PIPE_3 = 0,
  30   MICROBLAZE_PIPE_5 = 1
  31 };
  32
  33 #define MICROBLAZE_MASK_NO_UNSAFE_DELAY         0x00000001
  34
  35 /* print_operand punctuation chars */
  36 extern char microblaze_print_operand_punct[];
  37
  38 /* # bytes of data/sdata cutoff */
  39 extern int microblaze_section_threshold;
  40
  41 /* Map register # to debug register # */
  42 extern int microblaze_dbx_regno[];
  43
  44 extern int microblaze_no_unsafe_delay;
  45 extern int microblaze_has_clz;
  46 extern enum pipeline_type microblaze_pipe;
  47
  48 #define OBJECT_FORMAT_ELF
  49
  50 #if TARGET_BIG_ENDIAN_DEFAULT
  51 #define TARGET_ENDIAN_DEFAULT    0
  52 #define TARGET_ENDIAN_OPTION     "mbig-endian"
  53 #else
  54 #define TARGET_ENDIAN_DEFAULT    MASK_LITTLE_ENDIAN
  55 #define TARGET_ENDIAN_OPTION     "mlittle-endian"
  56 #endif
  57
  58 /* Default target_flags if no switches are specified  */
  59 #define TARGET_DEFAULT      (MASK_SOFT_MUL | MASK_SOFT_DIV | MASK_SOFT_FLOAT \
  60                              | TARGET_ENDIAN_DEFAULT)
  61
  62 /* Do we have CLZ?  */
  63 #define TARGET_HAS_CLZ      (TARGET_PATTERN_COMPARE && microblaze_has_clz)
  64
  65 /* The default is to support PIC.  */
  66 #define TARGET_SUPPORTS_PIC 1
  67
  68 /* The default is to not need GOT for TLS.  */
  69 #define TLS_NEEDS_GOT 0
  70
  71 /* What is the default setting for -mcpu= . We set it to v4.00.a even though
  72    we are actually ahead. This is safest version that has generate code
  73    compatible for the original ISA */
  74 #define MICROBLAZE_DEFAULT_CPU      "v4.00.a"
  75
  76 /* Macros to decide whether certain features are available or not,
  77    depending on the instruction set architecture level.  */
  78
  79 #define DRIVER_SELF_SPECS                               \
  80         "%{mxl-soft-mul:%<mno-xl-soft-mul}",            \
  81         "%{mno-xl-barrel-shift:%<mxl-barrel-shift}",    \
  82         "%{mno-xl-pattern-compare:%<mxl-pattern-compare}", \
  83         "%{mxl-soft-div:%<mno-xl-soft-div}",            \
  84         "%{mxl-reorder:%<mno-xl-reorder}",              \
  85         "%{msoft-float:%<mhard-float}"
  86
  87 /* Tell collect what flags to pass to nm.  */
  88 #ifndef NM_FLAGS
  89 #define NM_FLAGS "-Bn"
  90 #endif
  91
  92 /* Names to predefine in the preprocessor for this target machine.  */
  93 #define TARGET_CPU_CPP_BUILTINS() microblaze_cpp_define (pfile)
  94
  95 /* Assembler specs.  */
  96
  97 #define TARGET_ASM_SPEC ""
  98
  99 #define ASM_SPEC "\
 100 %(target_asm_spec) \
 101 %{mbig-endian:-EB} \
 102 %{mlittle-endian:-EL}"
 103
 104 /* Extra switches sometimes passed to the linker.  */
 105 /* -xl-mode-xmdstub translated to -Zxl-mode-xmdstub -- deprecated.  */
 106
 107 #define LINK_SPEC "%{shared:-shared} -N -relax \
 108   %{mbig-endian:-EB --oformat=elf32-microblaze} \
 109   %{mlittle-endian:-EL --oformat=elf32-microblazeel} \
 110   %{Zxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
 111   %{mxl-mode-xmdstub:-defsym _TEXT_START_ADDR=0x800} \
 112   %{mxl-gp-opt:%{G*}} %{!mxl-gp-opt: -G 0} \
 113   %{!T*: -dT xilinx.ld%s}"
 114
 115 /* Specs for the compiler proper  */
 116
 117 #ifndef CC1_SPEC
 118 #define CC1_SPEC " \
 119 %{G*} \
 120 %(subtarget_cc1_spec) \
 121 %{mxl-multiply-high:-mcpu=v6.00.a} \
 122 "
 123 #endif
 124
 125 #define EXTRA_SPECS                                                     \
 126   { "target_asm_spec", TARGET_ASM_SPEC },                               \
 127   SUBTARGET_EXTRA_SPECS
 128
 129 /* Local compiler-generated symbols must have a prefix that the assembler
 130    understands.   */
 131
 132 #ifndef LOCAL_LABEL_PREFIX
 133 #define LOCAL_LABEL_PREFIX      "$"
 134 #endif
 135
 136 /* fixed registers.  */
 137 #define MB_ABI_BASE_REGNUM                   0
 138 #define MB_ABI_STACK_POINTER_REGNUM          1
 139 #define MB_ABI_GPRO_REGNUM                   2
 140 #define MB_ABI_GPRW_REGNUM                  13
 141 #define MB_ABI_INTR_RETURN_ADDR_REGNUM      14
 142 #define MB_ABI_SUB_RETURN_ADDR_REGNUM       15
 143 #define MB_ABI_DEBUG_RETURN_ADDR_REGNUM     16
 144 #define MB_ABI_EXCEPTION_RETURN_ADDR_REGNUM 17
 145 #define MB_ABI_ASM_TEMP_REGNUM              18
 146 /* This is our temp register.  */
 147 #define MB_ABI_FRAME_POINTER_REGNUM         19
 148 #define MB_ABI_PIC_ADDR_REGNUM              20
 149 #define MB_ABI_PIC_FUNC_REGNUM              21
 150 /* Volatile registers.  */
 151 #define MB_ABI_INT_RETURN_VAL_REGNUM         3
 152 #define MB_ABI_INT_RETURN_VAL2_REGNUM        4
 153 #define MB_ABI_FIRST_ARG_REGNUM              5
 154 #define MB_ABI_LAST_ARG_REGNUM              10
 155 #define MB_ABI_MAX_ARG_REGS                 (MB_ABI_LAST_ARG_REGNUM     \
 156                                              - MB_ABI_FIRST_ARG_REGNUM + 1)
 157 #define MB_ABI_STATIC_CHAIN_REGNUM           3
 158 #define MB_ABI_TEMP1_REGNUM                 11
 159 #define MB_ABI_TEMP2_REGNUM                 12
 160 #define MB_ABI_MSR_SAVE_REG                 11
 161 /* Volatile register used to save MSR in interrupt handlers.  */
 162
 163
 164 /* Debug stuff.  */
 165
 166 /* How to renumber registers for dbx and gdb.  */
 167 #define DBX_REGISTER_NUMBER(REGNO) microblaze_dbx_regno[(REGNO)]
 168
 169 /* Generate DWARF exception handling info.  */
 170 #define DWARF2_UNWIND_INFO 1
 171
 172 /* Don't generate .loc operations.  */
 173 #define DWARF2_ASM_LINE_DEBUG_INFO 0
 174
 175 /* The DWARF 2 CFA column which tracks the return address.  */
 176 #define DWARF_FRAME_RETURN_COLUMN \
 177         (GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 178
 179 /* Initial state of return address on entry to func = R15.
 180    Actually, the RA is at R15+8, but gcc doesn't know how
 181    to generate this.
 182    NOTE:  GDB has a workaround and expects this incorrect value.
 183    If this is fixed, a corresponding fix to GDB is needed.  */
 184 #define INCOMING_RETURN_ADDR_RTX                        \
 185   gen_rtx_REG (VOIDmode, GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM)
 186
 187 /* Use DWARF 2 debugging information by default.  */
 188 #define DWARF2_DEBUGGING_INFO
 189 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 190
 191 /* Target machine storage layout */
 192
 193 #define BITS_BIG_ENDIAN 0
 194 #define BYTES_BIG_ENDIAN (TARGET_LITTLE_ENDIAN == 0)
 195 #define WORDS_BIG_ENDIAN (BYTES_BIG_ENDIAN)
 196 #define BITS_PER_WORD           32
 197 #define UNITS_PER_WORD          4
 198 #define MIN_UNITS_PER_WORD      4
 199 #define INT_TYPE_SIZE           32
 200 #define SHORT_TYPE_SIZE         16
 201 #define LONG_TYPE_SIZE          32
 202 #define LONG_LONG_TYPE_SIZE     64
 203 #define FLOAT_TYPE_SIZE         32
 204 #define DOUBLE_TYPE_SIZE        64
 205 #define LONG_DOUBLE_TYPE_SIZE   64
 206 #define POINTER_SIZE            32
 207 #define PARM_BOUNDARY           32
 208 #define FUNCTION_BOUNDARY       32
 209 #define EMPTY_FIELD_BOUNDARY    32
 210 #define STRUCTURE_SIZE_BOUNDARY 8
 211 #define BIGGEST_ALIGNMENT       32
 212 #define STRICT_ALIGNMENT        1
 213 #define PCC_BITFIELD_TYPE_MATTERS 1
 214
 215 #undef SIZE_TYPE
 216 #define SIZE_TYPE "unsigned int"
 217
 218 #undef PTRDIFF_TYPE
 219 #define PTRDIFF_TYPE "int"
 220
 221 #define CONSTANT_ALIGNMENT(EXP, ALIGN)                                  \
 222   ((TREE_CODE (EXP) == STRING_CST  || TREE_CODE (EXP) == CONSTRUCTOR)   \
 223    && (ALIGN) < BITS_PER_WORD                                           \
 224         ? BITS_PER_WORD                                                 \
 225         : (ALIGN))
 226
 227 #define DATA_ALIGNMENT(TYPE, ALIGN)                                     \
 228   ((((ALIGN) < BITS_PER_WORD)                                           \
 229     && (TREE_CODE (TYPE) == ARRAY_TYPE                                  \
 230         || TREE_CODE (TYPE) == UNION_TYPE                               \
 231         || TREE_CODE (TYPE) == RECORD_TYPE)) ? BITS_PER_WORD : (ALIGN))
 232
 233 #define LOCAL_ALIGNMENT(TYPE, ALIGN)                                    \
 234     (((TREE_CODE (TYPE) == ARRAY_TYPE                                   \
 235        && TYPE_MODE (TREE_TYPE (TYPE)) == QImode)                       \
 236      && (ALIGN) < BITS_PER_WORD) ? BITS_PER_WORD : (ALIGN))
 237
 238 #define WORD_REGISTER_OPERATIONS
 239
 240 #define LOAD_EXTEND_OP(MODE)  ZERO_EXTEND
 241
 242 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 243   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 244       && GET_MODE_SIZE (MODE) < 4)              \
 245     (MODE) = SImode;
 246
 247 /* Standard register usage.  */
 248
 249 /* On the MicroBlaze, we have 32 integer registers */
 250
 251 #define FIRST_PSEUDO_REGISTER 36
 252
 253 #define FIXED_REGISTERS                                                 \
 254 {                                                                       \
 255   1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 1,                       \
 256   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 257   1, 1, 1, 1                                                            \
 258 }
 259
 260 #define CALL_USED_REGISTERS                                             \
 261 {                                                                       \
 262   1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1,                       \
 263   1, 1, 1, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0,                       \
 264   1, 1, 1, 1                                                            \
 265 }
 266
 267 #define GP_REG_FIRST    0
 268 #define GP_REG_LAST     31
 269 #define GP_REG_NUM      (GP_REG_LAST - GP_REG_FIRST + 1)
 270 #define GP_DBX_FIRST    0
 271
 272 #define ST_REG          32
 273 #define AP_REG_NUM      33
 274 #define RAP_REG_NUM     34
 275 #define FRP_REG_NUM     35
 276
 277 #define GP_REG_P(REGNO) ((unsigned) ((REGNO) - GP_REG_FIRST) < GP_REG_NUM)
 278 #define ST_REG_P(REGNO) ((REGNO) == ST_REG)
 279
 280 #define HARD_REGNO_NREGS(REGNO, MODE)                                   \
 281         ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 282
 283 /* Value is 1 if hard register REGNO can hold a value of machine-mode
 284    MODE.  In 32 bit mode, require that DImode and DFmode be in even
 285    registers.  For DImode, this makes some of the insns easier to
 286    write, since you don't have to worry about a DImode value in
 287    registers 3 & 4, producing a result in 4 & 5.
 288
 289    To make the code simpler HARD_REGNO_MODE_OK now just references an
 290    array built in override_options.  Because machmodes.h is not yet
 291    included before this file is processed, the MODE bound can't be
 292    expressed here.  */
 293 extern char microblaze_hard_regno_mode_ok[][FIRST_PSEUDO_REGISTER];
 294 #define HARD_REGNO_MODE_OK(REGNO, MODE)                                 \
 295             microblaze_hard_regno_mode_ok[ (int)(MODE) ][ (REGNO)]
 296
 297 #define MODES_TIEABLE_P(MODE1, MODE2)                                   \
 298   ((GET_MODE_CLASS (MODE1) == MODE_FLOAT ||                             \
 299     GET_MODE_CLASS (MODE1) == MODE_COMPLEX_FLOAT)                       \
 300    == (GET_MODE_CLASS (MODE2) == MODE_FLOAT ||                          \
 301        GET_MODE_CLASS (MODE2) == MODE_COMPLEX_FLOAT))
 302
 303 #define STACK_POINTER_REGNUM   (GP_REG_FIRST + MB_ABI_STACK_POINTER_REGNUM)
 304
 305 #define STACK_POINTER_OFFSET   FIRST_PARM_OFFSET(FNDECL)
 306
 307 /* Base register for access to local variables of the function.  We
 308    pretend that the frame pointer is
 309    MB_ABI_INTR_RETURN_ADDR_REGNUM, and then eliminate it
 310    to HARD_FRAME_POINTER_REGNUM.  We can get away with this because
 311    rMB_ABI_INTR_RETUREN_ADDR_REGNUM is a fixed
 312    register(return address for interrupt), and will not be used for
 313    anything else.  */
 314
 315 #define FRAME_POINTER_REGNUM            FRP_REG_NUM
 316 #define HARD_FRAME_POINTER_REGNUM       \
 317         (GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM)
 318 #define ARG_POINTER_REGNUM              AP_REG_NUM
 319 #define RETURN_ADDRESS_POINTER_REGNUM   RAP_REG_NUM
 320 #define STATIC_CHAIN_REGNUM             \
 321         (GP_REG_FIRST + MB_ABI_STATIC_CHAIN_REGNUM)
 322
 323 /* registers used in prologue/epilogue code when the stack frame
 324    is larger than 32K bytes.  These registers must come from the
 325    scratch register set, and not used for passing and returning
 326    arguments and any other information used in the calling sequence
 327    (such as pic).  */
 328
 329 #define MICROBLAZE_TEMP1_REGNUM         \
 330         (GP_REG_FIRST + MB_ABI_TEMP1_REGNUM)
 331
 332 #define MICROBLAZE_TEMP2_REGNUM         \
 333         (GP_REG_FIRST + MB_ABI_TEMP2_REGNUM)
 334
 335 #define NO_FUNCTION_CSE                 1
 336
 337 #define PIC_OFFSET_TABLE_REGNUM   (GP_REG_FIRST + MB_ABI_PIC_ADDR_REGNUM)
 338
 339 enum reg_class
 340 {
 341   NO_REGS,                      /* no registers in set.  */
 342   GR_REGS,                      /* integer registers.  */
 343   ST_REGS,                      /* status register.  */
 344   ALL_REGS,                     /* all registers.  */
 345   LIM_REG_CLASSES               /* max value + 1.  */
 346 };
 347
 348 #define N_REG_CLASSES           (int) LIM_REG_CLASSES
 349
 350 #define GENERAL_REGS            GR_REGS
 351
 352 #define REG_CLASS_NAMES                                                 \
 353 {                                                                       \
 354   "NO_REGS",                                                            \
 355   "GR_REGS",                                                            \
 356   "ST_REGS",                                                            \
 357   "ALL_REGS"                                                            \
 358 }
 359
 360 #define REG_CLASS_CONTENTS                                              \
 361 {                                                                       \
 362   { 0x00000000, 0x00000000 },           /* no registers.  */            \
 363   { 0xffffffff, 0x00000000 },           /* integer registers.  */       \
 364   { 0x00000000, 0x00000001 },           /* status registers.  */        \
 365   { 0xffffffff, 0x0000000f }            /* all registers.  */           \
 366 }
 367
 368 extern enum reg_class microblaze_regno_to_class[];
 369
 370 #define REGNO_REG_CLASS(REGNO)          microblaze_regno_to_class[ (REGNO) ]
 371
 372 #define BASE_REG_CLASS                  GR_REGS
 373
 374 #define INDEX_REG_CLASS                 GR_REGS
 375
 376 #define GR_REG_CLASS_P(CLASS)           ((CLASS) == GR_REGS)
 377
 378 /* REGISTER AND CONSTANT CLASSES */
 379
 380 #define SMALL_INT(X) ((unsigned HOST_WIDE_INT) (INTVAL (X) + 0x8000) < 0x10000)
 381 #define LARGE_INT(X) \
 382   (INTVAL (X) > 0 && UINTVAL (X) >= 0x80000000 && UINTVAL (X) <= 0xffffffff)
 383 #define PLT_ADDR_P(X) (GET_CODE (X) == UNSPEC && XINT (X,1) == UNSPEC_PLT)
 384 /* Test for a valid operand for a call instruction.
 385    Don't allow the arg pointer register or virtual regs
 386    since they may change into reg + const, which the patterns
 387    can't handle yet.  */
 388 #define CALL_INSN_OP(X) (CONSTANT_ADDRESS_P (X) \
 389                          || (GET_CODE (X) == REG && X != arg_pointer_rtx\
 390                              && ! (REGNO (X) >= FIRST_PSEUDO_REGISTER   \
 391                              && REGNO (X) <= LAST_VIRTUAL_REGISTER)))
 392
 393 /* True if VALUE is a signed 16-bit number.  */
 394 #define SMALL_OPERAND(VALUE)                                            \
 395   ((unsigned HOST_WIDE_INT) (VALUE) + 0x8000 < 0x10000)
 396
 397 /* Constant which cannot be loaded in one instruction.  */
 398 #define LARGE_OPERAND(VALUE)                                            \
 399   ((((VALUE) & ~0x0000ffff) != 0)                                       \
 400    && (((VALUE) & ~0x0000ffff) != ~0x0000ffff)                          \
 401    && (((VALUE) & 0x0000ffff) != 0                                      \
 402        || (((VALUE) & ~2147483647) != 0                                 \
 403            && ((VALUE) & ~2147483647) != ~2147483647)))
 404
 405 #define PREFERRED_RELOAD_CLASS(X,CLASS)                                 \
 406   ((CLASS) != ALL_REGS                                                  \
 407    ? (CLASS)                                                    \
 408    : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT                      \
 409        || GET_MODE_CLASS (GET_MODE (X)) == MODE_COMPLEX_FLOAT)          \
 410       ? (GR_REGS)                       \
 411       : ((GET_MODE_CLASS (GET_MODE (X)) == MODE_INT                     \
 412           || GET_MODE (X) == VOIDmode)                                  \
 413          ? (GR_REGS) : (CLASS))))
 414
 415 /* Stack layout; function entry, exit and calling.  */
 416
 417 #define STACK_GROWS_DOWNWARD
 418
 419 /* Changed the starting frame offset to including the new link stuff */
 420 #define STARTING_FRAME_OFFSET                                           \
 421    (crtl->outgoing_args_size + FIRST_PARM_OFFSET(FNDECL))
 422
 423 /* The return address for the current frame is in r31 if this is a leaf
 424    function.  Otherwise, it is on the stack.  It is at a variable offset
 425    from sp/fp/ap, so we define a fake hard register rap which is a
 426    poiner to the return address on the stack.  This always gets eliminated
 427    during reload to be either the frame pointer or the stack pointer plus
 428    an offset.  */
 429
 430 #define RETURN_ADDR_RTX(count, frame)                   \
 431   microblaze_return_addr(count,frame)
 432
 433 extern struct microblaze_frame_info current_frame_info;
 434
 435 #define ELIMINABLE_REGS                                                 \
 436 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM},                         \
 437  { ARG_POINTER_REGNUM,   GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},   \
 438  { RETURN_ADDRESS_POINTER_REGNUM, STACK_POINTER_REGNUM},                \
 439  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 440    GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM},                         \
 441  { RETURN_ADDRESS_POINTER_REGNUM,                                       \
 442    GP_REG_FIRST + MB_ABI_SUB_RETURN_ADDR_REGNUM},                       \
 443  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 444  { FRAME_POINTER_REGNUM, GP_REG_FIRST + MB_ABI_FRAME_POINTER_REGNUM}}
 445
 446 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)                     \
 447         (OFFSET) = microblaze_initial_elimination_offset ((FROM), (TO))
 448
 449 #define ACCUMULATE_OUTGOING_ARGS        1
 450
 451 #define FIRST_PARM_OFFSET(FNDECL)               (UNITS_PER_WORD)
 452
 453 #define ARG_POINTER_CFA_OFFSET(FNDECL)          0
 454
 455 #define REG_PARM_STACK_SPACE(FNDECL)            (MAX_ARGS_IN_REGISTERS * UNITS_PER_WORD)
 456
 457 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE)   1
 458
 459 #define STACK_BOUNDARY                          32
 460
 461 #define NUM_OF_ARGS                             6
 462
 463 #define GP_RETURN                               (GP_REG_FIRST + MB_ABI_INT_RETURN_VAL_REGNUM)
 464
 465 #define GP_ARG_FIRST                            (GP_REG_FIRST + MB_ABI_FIRST_ARG_REGNUM)
 466 #define GP_ARG_LAST                             (GP_REG_FIRST + MB_ABI_LAST_ARG_REGNUM)
 467
 468 #define MAX_ARGS_IN_REGISTERS                   MB_ABI_MAX_ARG_REGS
 469
 470 #define LIBCALL_VALUE(MODE)                                             \
 471   gen_rtx_REG (                                                         \
 472            ((GET_MODE_CLASS (MODE) != MODE_INT                          \
 473              || GET_MODE_SIZE (MODE) >= 4)                              \
 474             ? (MODE)                                                    \
 475             : SImode), GP_RETURN)
 476
 477 /* 1 if N is a possible register number for a function value.
 478    On the MicroBlaze, R2 R3 are the only register thus used.
 479    Currently, R2 are only implemented  here (C has no complex type)  */
 480
 481 #define FUNCTION_VALUE_REGNO_P(N)               ((N) == GP_RETURN)
 482
 483 #define FUNCTION_ARG_REGNO_P(N)                 (((N) >= GP_ARG_FIRST && (N) <= GP_ARG_LAST))
 484
 485 typedef struct microblaze_args
 486 {
 487   int gp_reg_found;             /* whether a gp register was found yet */
 488   int arg_number;               /* argument number */
 489   int arg_words;                /* # total words the arguments take */
 490   int fp_arg_words;             /* # words for FP args */
 491   int last_arg_fp;              /* nonzero if last arg was FP (EABI only) */
 492   int fp_code;                  /* Mode of FP arguments */
 493   int num_adjusts;              /* number of adjustments made */
 494   /* Adjustments made to args pass in regs.  */
 495   /* ??? The size is doubled to work around a bug in the code that sets the
 496      adjustments in function_arg.  */
 497   rtx adjust[MAX_ARGS_IN_REGISTERS * 2];
 498 } CUMULATIVE_ARGS;
 499
 500 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS)    \
 501   init_cumulative_args (&CUM, FNTYPE, LIBNAME)
 502
 503 #define NO_PROFILE_COUNTERS                     1
 504
 505 #define FUNCTION_PROFILER(FILE, LABELNO) { \
 506   {                                        \
 507     fprintf (FILE, "\tbrki\tr16,_mcount\n");           \
 508   }                                                    \
 509  }
 510
 511 #define EXIT_IGNORE_STACK                       1
 512
 513 /* 4 insns + 2 words of data.  */
 514 #define TRAMPOLINE_SIZE                         (6 * 4)
 515
 516 #define TRAMPOLINE_ALIGNMENT                    32
 517
 518 #define REGNO_OK_FOR_BASE_P(regno)              microblaze_regno_ok_for_base_p ((regno), 1)
 519
 520 #define REGNO_OK_FOR_INDEX_P(regno)             microblaze_regno_ok_for_base_p ((regno), 1)
 521
 522 #ifndef REG_OK_STRICT
 523 #define REG_STRICT_FLAG                         0
 524 #else
 525 #define REG_STRICT_FLAG                         1
 526 #endif
 527
 528 #define REG_OK_FOR_BASE_P(X)    \
 529   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 530
 531 #define REG_OK_FOR_INDEX_P(X)   \
 532   microblaze_regno_ok_for_base_p (REGNO (X), REG_STRICT_FLAG)
 533
 534 #define MAX_REGS_PER_ADDRESS 2
 535
 536
 537 /* Identify valid constant addresses.  Exclude if PIC addr which
 538    needs scratch register.  */
 539 #define CONSTANT_ADDRESS_P(X)                                           \
 540   (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF              \
 541     || GET_CODE (X) == CONST_INT                                        \
 542     || (GET_CODE (X) == CONST                                           \
 543         && ! (flag_pic && pic_address_needs_scratch (X))))
 544
 545 /* Define this, so that when PIC, reload won't try to reload invalid
 546    addresses which require two reload registers.  */
 547 #define LEGITIMATE_PIC_OPERAND_P(X)  microblaze_legitimate_pic_operand (X)
 548
 549 #define CASE_VECTOR_MODE                        (SImode)
 550
 551 #ifndef DEFAULT_SIGNED_CHAR
 552 #define DEFAULT_SIGNED_CHAR                     1
 553 #endif
 554
 555 #define MOVE_MAX                                4
 556 #define MAX_MOVE_MAX                            8
 557
 558 #define SLOW_BYTE_ACCESS                        1
 559
 560 /* sCOND operations return 1.  */
 561 #define STORE_FLAG_VALUE                        1
 562
 563 #define SHIFT_COUNT_TRUNCATED                   1
 564
 565 /* This results in inefficient code for 64 bit to 32 conversions.
 566    Something needs to be done about this.  Perhaps not use any 32 bit
 567    instructions?  Perhaps use PROMOTE_MODE?  */
 568 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)  1
 569
 570 #define Pmode SImode
 571
 572 #define FUNCTION_MODE   SImode
 573
 574 /* Mode should always be SImode */
 575 #define REGISTER_MOVE_COST(MODE, FROM, TO)                      \
 576   ( GR_REG_CLASS_P (FROM) && GR_REG_CLASS_P (TO) ? 2            \
 577    : (FROM) == ST_REGS && GR_REG_CLASS_P (TO) ? 4               \
 578    : 12)
 579
 580 #define MEMORY_MOVE_COST(MODE,CLASS,TO_P) \
 581   (4 + memory_move_secondary_cost ((MODE), (CLASS), (TO_P)))
 582
 583 #define BRANCH_COST(speed_p, predictable_p)     2
 584
 585 /* Control the assembler format that we output.  */
 586 #define ASM_APP_ON " #APP\n"
 587 #define ASM_APP_OFF " #NO_APP\n"
 588
 589 #define REGISTER_NAMES {                                                \
 590   "r0",   "r1",   "r2",   "r3",   "r4",   "r5",   "r6",   "r7",         \
 591   "r8",   "r9",   "r10",  "r11",  "r12",  "r13",  "r14",  "r15",        \
 592   "r16",  "r17",  "r18",  "r19",  "r20",  "r21",  "r22",  "r23",        \
 593   "r24",  "r25",  "r26",  "r27",  "r28",  "r29",  "r30",  "r31",        \
 594   "rmsr", "$ap",  "$rap", "$frp" }
 595
 596 #define ADDITIONAL_REGISTER_NAMES                                       \
 597 {                                                                       \
 598   { "r0",        0 + GP_REG_FIRST },                                    \
 599   { "r1",        1 + GP_REG_FIRST },                                    \
 600   { "r2",        2 + GP_REG_FIRST },                                    \
 601   { "r3",        3 + GP_REG_FIRST },                                    \
 602   { "r4",        4 + GP_REG_FIRST },                                    \
 603   { "r5",        5 + GP_REG_FIRST },                                    \
 604   { "r6",        6 + GP_REG_FIRST },                                    \
 605   { "r7",        7 + GP_REG_FIRST },                                    \
 606   { "r8",        8 + GP_REG_FIRST },                                    \
 607   { "r9",        9 + GP_REG_FIRST },                                    \
 608   { "r10",      10 + GP_REG_FIRST },                                    \
 609   { "r11",      11 + GP_REG_FIRST },                                    \
 610   { "r12",      12 + GP_REG_FIRST },                                    \
 611   { "r13",      13 + GP_REG_FIRST },                                    \
 612   { "r14",      14 + GP_REG_FIRST },                                    \
 613   { "r15",      15 + GP_REG_FIRST },                                    \
 614   { "r16",      16 + GP_REG_FIRST },                                    \
 615   { "r17",      17 + GP_REG_FIRST },                                    \
 616   { "r18",      18 + GP_REG_FIRST },                                    \
 617   { "r19",      19 + GP_REG_FIRST },                                    \
 618   { "r20",      20 + GP_REG_FIRST },                                    \
 619   { "r21",      21 + GP_REG_FIRST },                                    \
 620   { "r22",      22 + GP_REG_FIRST },                                    \
 621   { "r23",      23 + GP_REG_FIRST },                                    \
 622   { "r24",      24 + GP_REG_FIRST },                                    \
 623   { "r25",      25 + GP_REG_FIRST },                                    \
 624   { "r26",      26 + GP_REG_FIRST },                                    \
 625   { "r27",      27 + GP_REG_FIRST },                                    \
 626   { "r28",      28 + GP_REG_FIRST },                                    \
 627   { "r29",      29 + GP_REG_FIRST },                                    \
 628   { "r30",      30 + GP_REG_FIRST },                                    \
 629   { "r31",      31 + GP_REG_FIRST },                                    \
 630   { "rmsr",     ST_REG}                                                 \
 631 }
 632
 633 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
 634
 635 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) microblaze_print_operand_punct[CODE]
 636
 637 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
 638
 639 /* ASM_OUTPUT_ALIGNED_COMMON and ASM_OUTPUT_ALIGNED_LOCAL
 640
 641    Unfortunately, we still need to set the section explicitly. Somehow,
 642    our binutils assign .comm and .lcomm variables to the "current" section
 643    in the assembly file, rather than where they implicitly belong. We need to
 644    remove this explicit setting in GCC when binutils can understand sections
 645    better.  */
 646 #undef  ASM_OUTPUT_ALIGNED_COMMON
 647 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGN)              \
 648 do {                                                                    \
 649   if ((SIZE) > 0 && (SIZE) <= INT_MAX                                   \
 650       && (int) (SIZE) <= microblaze_section_threshold                   \
 651       && TARGET_XLGPOPT)                                                \
 652     {                                                                   \
 653       switch_to_section (sbss_section);                                 \
 654     }                                                                   \
 655   else                                                                  \
 656     {                                                                   \
 657       switch_to_section (bss_section);                                  \
 658     }                                                                   \
 659   fprintf (FILE, "%s", COMMON_ASM_OP);                                  \
 660   assemble_name ((FILE), (NAME));                                       \
 661   fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",              \
 662            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 663   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 664 } while (0)
 665
 666 #undef ASM_OUTPUT_ALIGNED_LOCAL
 667 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGN)               \
 668 do {                                                                    \
 669   if ((SIZE) > 0 && (SIZE) <= INT_MAX                                   \
 670       && (int) (SIZE) <= microblaze_section_threshold                   \
 671       && TARGET_XLGPOPT)                                                \
 672     {                                                                   \
 673       switch_to_section (sbss_section);                                 \
 674     }                                                                   \
 675   else                                                                  \
 676     {                                                                   \
 677       switch_to_section (bss_section);                                  \
 678     }                                                                   \
 679   fprintf (FILE, "%s", LCOMMON_ASM_OP);                                 \
 680   assemble_name ((FILE), (NAME));                                       \
 681   fprintf ((FILE), ","HOST_WIDE_INT_PRINT_UNSIGNED",%u\n",              \
 682            (SIZE), (ALIGN) / BITS_PER_UNIT);                            \
 683   ASM_OUTPUT_TYPE_DIRECTIVE (FILE, NAME, "object");                     \
 684 } while (0)
 685
 686 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN)           \
 687 do {                                                                    \
 688   ASM_OUTPUT_ALIGNED_LOCAL (FILE, NAME, SIZE, ALIGN);                   \
 689 } while (0)
 690
 691 #define ASM_DECLARE_FUNCTION_NAME(STREAM,NAME,DECL)                     \
 692 {                                                                       \
 693 }
 694
 695 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM)                   \
 696   sprintf ((LABEL), "*%s%s%ld", (LOCAL_LABEL_PREFIX), (PREFIX), (long)(NUM))
 697
 698 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE)                          \
 699   fprintf (STREAM, "\t%s\t%sL%d\n",                                     \
 700            ".gpword",                                                   \
 701            LOCAL_LABEL_PREFIX, VALUE)
 702
 703 #define ASM_OUTPUT_ADDR_DIFF_ELT(STREAM, BODY, VALUE, REL)              \
 704 do {                                                                    \
 705   if (flag_pic == 2)                                               \
 706     fprintf (STREAM, "\t%s\t%sL%d@GOTOFF\n",                            \
 707              ".gpword",                                                 \
 708              LOCAL_LABEL_PREFIX, VALUE);                                \
 709   else                                                                  \
 710     fprintf (STREAM, "\t%s\t%sL%d\n",                                   \
 711              ".gpword",                                                 \
 712              LOCAL_LABEL_PREFIX, VALUE);                                \
 713 } while (0)
 714
 715 #define ASM_OUTPUT_ALIGN(STREAM,LOG)                                    \
 716   fprintf (STREAM, "\t.align\t%d\n", (LOG))
 717
 718 #define ASM_OUTPUT_SKIP(STREAM,SIZE)                                    \
 719   fprintf (STREAM, "\t.space\t%lu\n", (SIZE))
 720
 721 #define ASCII_DATA_ASM_OP               "\t.ascii\t"
 722 #define STRING_ASM_OP                   "\t.asciz\t"
 723
 724 #undef TARGET_ASM_OUTPUT_IDENT
 725 #define TARGET_ASM_OUTPUT_IDENT microblaze_asm_output_ident
 726
 727 /* Default to -G 8 */
 728 #ifndef MICROBLAZE_DEFAULT_GVALUE
 729 #define MICROBLAZE_DEFAULT_GVALUE 8
 730 #endif
 731
 732 /* Given a decl node or constant node, choose the section to output it in
 733    and select that section.  */
 734
 735 /* Store in OUTPUT a string (made with alloca) containing
 736    an assembler-name for a local static variable named NAME.
 737    LABELNO is an integer which is different for each call.  */
 738 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO)                  \
 739 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10),                    \
 740   sprintf ((OUTPUT), "%s.%lu", (NAME), (unsigned long)(LABELNO)))
 741
 742 /* How to start an assembler comment.
 743    The leading space is important (the microblaze assembler requires it).  */
 744 #ifndef ASM_COMMENT_START
 745 #define ASM_COMMENT_START               " #"
 746 #endif
 747
 748 #define BSS_VAR         1
 749 #define SBSS_VAR        2
 750 #define DATA_VAR        4
 751 #define SDATA_VAR       5
 752 #define RODATA_VAR      6
 753 #define SDATA2_VAR      7
 754
 755 /* These definitions are used in with the shift_type flag in the rtl.  */
 756 #define SHIFT_CONST     1
 757 #define SHIFT_REG       2
 758 #define USE_ADDK        3
 759
 760 /* Handle interrupt attribute.  */
 761 extern int interrupt_handler;
 762 extern int fast_interrupt;
 763 extern int save_volatiles;
 764
 765 #define INTERRUPT_HANDLER_NAME "_interrupt_handler"
 766 #define FAST_INTERRUPT_NAME "_fast_interrupt"
 767
 768 /* The following #defines are used in the headers files. Always retain these.  */
 769
 770 /* Added for declaring size at the end of the function.  */
 771 #undef ASM_DECLARE_FUNCTION_SIZE
 772 #define ASM_DECLARE_FUNCTION_SIZE(FILE, FNAME, DECL)                    \
 773   do {                                                                  \
 774     if (!flag_inhibit_size_directive)                                   \
 775       {                                                                 \
 776         char label[256];                                                \
 777         static int labelno;                                             \
 778         labelno++;                                                      \
 779         ASM_GENERATE_INTERNAL_LABEL (label, "Lfe", labelno);            \
 780         (*targetm.asm_out.internal_label) (FILE, "Lfe", labelno);       \
 781         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 782         assemble_name (FILE, (FNAME));                                  \
 783         fprintf (FILE, ",");                                            \
 784         assemble_name (FILE, label);                                    \
 785         fprintf (FILE, "-");                                            \
 786         assemble_name (FILE, (FNAME));                                  \
 787         putc ('\n', FILE);                                              \
 788       }                                                                 \
 789   } while (0)
 790
 791 #define GLOBAL_ASM_OP                   "\t.globl\t"
 792 #define TYPE_ASM_OP                     "\t.type\t"
 793 #define SIZE_ASM_OP                     "\t.size\t"
 794 #define COMMON_ASM_OP                   "\t.comm\t"
 795 #define LCOMMON_ASM_OP                  "\t.lcomm\t"
 796
 797 #define MAX_OFILE_ALIGNMENT             (32768*8)
 798
 799 #define TYPE_OPERAND_FMT                "@%s"
 800
 801 /* Write the extra assembler code needed to declare an object properly.  */
 802 #undef ASM_DECLARE_OBJECT_NAME
 803 #define ASM_DECLARE_OBJECT_NAME(FILE, NAME, DECL)                       \
 804   do {                                                                  \
 805     fprintf (FILE, "%s", TYPE_ASM_OP);                                  \
 806     assemble_name (FILE, NAME);                                         \
 807     putc (',', FILE);                                                   \
 808     fprintf (FILE, TYPE_OPERAND_FMT, "object");                         \
 809     putc ('\n', FILE);                                                  \
 810     size_directive_output = 0;                                          \
 811     if (!flag_inhibit_size_directive && DECL_SIZE (DECL))               \
 812       {                                                                 \
 813         size_directive_output = 1;                                      \
 814         fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 815         assemble_name (FILE, NAME);                                     \
 816         fprintf (FILE, "," HOST_WIDE_INT_PRINT_DEC "\n",                \
 817         int_size_in_bytes (TREE_TYPE (DECL)));                          \
 818       }                                                                 \
 819     microblaze_declare_object (FILE, NAME, "", ":\n", 0);                       \
 820   } while (0)
 821
 822 #undef ASM_FINISH_DECLARE_OBJECT
 823 #define ASM_FINISH_DECLARE_OBJECT(FILE, DECL, TOP_LEVEL, AT_END)         \
 824 do {                                                                     \
 825      const char *name = XSTR (XEXP (DECL_RTL (DECL), 0), 0);             \
 826      if (!flag_inhibit_size_directive && DECL_SIZE (DECL)                \
 827          && ! AT_END && TOP_LEVEL                                        \
 828          && DECL_INITIAL (DECL) == error_mark_node                       \
 829          && !size_directive_output)                                      \
 830        {                                                                 \
 831          size_directive_output = 1;                                      \
 832          fprintf (FILE, "%s", SIZE_ASM_OP);                              \
 833          assemble_name (FILE, name);                                     \
 834          fprintf (FILE, "," HOST_WIDE_INT_PRINT_DEC "\n",                \
 835                   int_size_in_bytes (TREE_TYPE (DECL)));                 \
 836        }                                                                 \
 837    } while (0)
 838
 839 #define ASM_OUTPUT_DEF(FILE,LABEL1,LABEL2)                            \
 840  do { fputc ( '\t', FILE);                                            \
 841       assemble_name (FILE, LABEL1);                                   \
 842       fputs ( " = ", FILE);                                           \
 843       assemble_name (FILE, LABEL2);                                   \
 844       fputc ( '\n', FILE);                                            \
 845  } while (0)
 846
 847 #define ASM_WEAKEN_LABEL(FILE,NAME)                                     \
 848  do { fputs ("\t.weakext\t", FILE);                                     \
 849       assemble_name (FILE, NAME);                                       \
 850       fputc ('\n', FILE);                                               \
 851     } while (0)
 852
 853 #define MAKE_DECL_ONE_ONLY(DECL)        (DECL_WEAK (DECL) = 1)
 854 #undef UNIQUE_SECTION_P
 855 #define UNIQUE_SECTION_P(DECL)          (DECL_ONE_ONLY (DECL))
 856
 857 #undef TARGET_ASM_NAMED_SECTION
 858 #define TARGET_ASM_NAMED_SECTION        default_elf_asm_named_section
 859
 860 /* Define the strings to put out for each section in the object file.
 861
 862    Note: For ctors/dtors, we want to give these sections the SHF_WRITE
 863    attribute to allow shared libraries to patch/resolve addresses into
 864    these locations.  On Microblaze, there is no concept of shared libraries
 865    yet, so this is for future use.  */
 866 #define TEXT_SECTION_ASM_OP     "\t.text"
 867 #define DATA_SECTION_ASM_OP     "\t.data"
 868 #define READONLY_DATA_SECTION_ASM_OP    \
 869                                 "\t.rodata"
 870 #define BSS_SECTION_ASM_OP      "\t.bss"
 871 #define CTORS_SECTION_ASM_OP    "\t.section\t.ctors,\"aw\""
 872 #define DTORS_SECTION_ASM_OP    "\t.section\t.dtors,\"aw\""
 873 #define INIT_SECTION_ASM_OP     "\t.section\t.init,\"ax\""
 874 #define FINI_SECTION_ASM_OP     "\t.section\t.fini,\"ax\""
 875
 876 #define SDATA_SECTION_ASM_OP    "\t.sdata"      /* Small RW initialized data   */
 877 #define SDATA2_SECTION_ASM_OP   "\t.sdata2"     /* Small RO initialized data   */
 878 #define SBSS_SECTION_ASM_OP     "\t.sbss"       /* Small RW uninitialized data */
 879 #define SBSS2_SECTION_ASM_OP    "\t.sbss2"      /* Small RO uninitialized data */
 880
 881 /* We do this to save a few 10s of code space that would be taken up
 882    by the call_FUNC () wrappers, used by the generic CRT_CALL_STATIC_FUNCTION
 883    definition in crtstuff.c.  */
 884 #define CRT_CALL_STATIC_FUNCTION(SECTION_OP, FUNC)      \
 885     asm ( SECTION_OP "\n"                               \
 886           "\tbrlid   r15, " #FUNC "\n\t nop\n"         \
 887           TEXT_SECTION_ASM_OP);
 888
 889 /* We need to group -lm as well, since some Newlib math functions
 890    reference __errno!  */
 891 #undef LIB_SPEC
 892 #define LIB_SPEC \
 893 "%{!nostdlib: \
 894 %{pg:-start-group -lxilprofile -lgloss -lxil -lc -lm -end-group } \
 895 %{!pg:-start-group -lgloss -lxil -lc -lm -end-group }} "
 896
 897 /* microblaze-unknown-elf target has no support of C99 runtime */
 898 #undef TARGET_LIBC_HAS_FUNCTION
 899 #define TARGET_LIBC_HAS_FUNCTION no_c99_libc_has_function
 900
 901 #undef  ENDFILE_SPEC
 902 #define ENDFILE_SPEC "crtend.o%s crtn.o%s"
 903
 904 #define STARTFILE_EXECUTABLE_SPEC   "crt0.o%s crti.o%s crtbegin.o%s"
 905 #define STARTFILE_XMDSTUB_SPEC      "crt1.o%s crti.o%s crtbegin.o%s"
 906 #define STARTFILE_BOOTSTRAP_SPEC    "crt2.o%s crti.o%s crtbegin.o%s"
 907 #define STARTFILE_NOVECTORS_SPEC    "crt3.o%s crti.o%s crtbegin.o%s"
 908 #define STARTFILE_CRTINIT_SPEC      "%{!pg: %{!mno-clearbss: crtinit.o%s} \
 909 %{mno-clearbss: sim-crtinit.o%s}} \
 910 %{pg: %{!mno-clearbss: pgcrtinit.o%s} %{mno-clearbss: sim-pgcrtinit.o%s}}"
 911
 912 #define STARTFILE_DEFAULT_SPEC      STARTFILE_EXECUTABLE_SPEC
 913
 914 #undef SUBTARGET_EXTRA_SPECS
 915 #define SUBTARGET_EXTRA_SPECS                                           \
 916   { "startfile_executable",     STARTFILE_EXECUTABLE_SPEC },            \
 917   { "startfile_xmdstub",        STARTFILE_XMDSTUB_SPEC },               \
 918   { "startfile_bootstrap",      STARTFILE_BOOTSTRAP_SPEC },             \
 919   { "startfile_novectors",      STARTFILE_NOVECTORS_SPEC },             \
 920   { "startfile_crtinit",        STARTFILE_CRTINIT_SPEC },               \
 921   { "startfile_default",        STARTFILE_DEFAULT_SPEC },
 922
 923 #undef  STARTFILE_SPEC
 924 #define STARTFILE_SPEC  "\
 925 %{Zxl-mode-executable   : %(startfile_executable)  ; \
 926   mxl-mode-executable   : %(startfile_executable)  ; \
 927   Zxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 928   mxl-mode-xmdstub      : %(startfile_xmdstub)     ; \
 929   Zxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 930   mxl-mode-bootstrap    : %(startfile_bootstrap)   ; \
 931   Zxl-mode-novectors    : %(startfile_novectors)   ; \
 932   mxl-mode-novectors    : %(startfile_novectors)   ; \
 933   Zxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 934   mxl-mode-xilkernel    : %(startfile_xilkernel)   ; \
 935                         : %(startfile_default)       \
 936 } \
 937 %(startfile_crtinit)"