1 /* Dwarf2 Call Frame Information helper routines.
2 Copyright (C) 1992-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
30 #include "stor-layout.h"
31 #include "hard-reg-set.h"
35 #include "dwarf2out.h"
36 #include "dwarf2asm.h"
39 #include "common/common-target.h"
40 #include "tree-pass.h"
42 #include "except.h" /* expand_builtin_dwarf_sp_column */
43 #include "insn-config.h"
51 #include "expr.h" /* init_return_column_size */
52 #include "regs.h" /* expand_builtin_init_dwarf_reg_sizes */
53 #include "output.h" /* asm_out_file */
54 #include "debug.h" /* dwarf2out_do_frame, dwarf2out_do_cfi_asm */
57 /* ??? Poison these here until it can be done generically. They've been
58 totally replaced in this file; make sure it stays that way. */
59 #undef DWARF2_UNWIND_INFO
60 #undef DWARF2_FRAME_INFO
61 #if (GCC_VERSION >= 3000)
62 #pragma GCC poison DWARF2_UNWIND_INFO DWARF2_FRAME_INFO
65 #ifndef INCOMING_RETURN_ADDR_RTX
66 #define INCOMING_RETURN_ADDR_RTX (gcc_unreachable (), NULL_RTX)
69 /* Maximum size (in bytes) of an artificially generated label. */
70 #define MAX_ARTIFICIAL_LABEL_BYTES 30
72 /* A collected description of an entire row of the abstract CFI table. */
73 typedef struct GTY(()) dw_cfi_row_struct
75 /* The expression that computes the CFA, expressed in two different ways.
76 The CFA member for the simple cases, and the full CFI expression for
77 the complex cases. The later will be a DW_CFA_cfa_expression. */
81 /* The expressions for any register column that is saved. */
85 /* The caller's ORIG_REG is saved in SAVED_IN_REG. */
86 typedef struct GTY(()) reg_saved_in_data_struct
{
92 /* Since we no longer have a proper CFG, we're going to create a facsimile
93 of one on the fly while processing the frame-related insns.
95 We create dw_trace_info structures for each extended basic block beginning
96 and ending at a "save point". Save points are labels, barriers, certain
97 notes, and of course the beginning and end of the function.
99 As we encounter control transfer insns, we propagate the "current"
100 row state across the edges to the starts of traces. When checking is
101 enabled, we validate that we propagate the same data from all sources.
103 All traces are members of the TRACE_INFO array, in the order in which
104 they appear in the instruction stream.
106 All save points are present in the TRACE_INDEX hash, mapping the insn
107 starting a trace to the dw_trace_info describing the trace. */
111 /* The insn that begins the trace. */
114 /* The row state at the beginning and end of the trace. */
115 dw_cfi_row
*beg_row
, *end_row
;
117 /* Tracking for DW_CFA_GNU_args_size. The "true" sizes are those we find
118 while scanning insns. However, the args_size value is irrelevant at
119 any point except can_throw_internal_p insns. Therefore the "delay"
120 sizes the values that must actually be emitted for this trace. */
121 HOST_WIDE_INT beg_true_args_size
, end_true_args_size
;
122 HOST_WIDE_INT beg_delay_args_size
, end_delay_args_size
;
124 /* The first EH insn in the trace, where beg_delay_args_size must be set. */
127 /* The following variables contain data used in interpreting frame related
128 expressions. These are not part of the "real" row state as defined by
129 Dwarf, but it seems like they need to be propagated into a trace in case
130 frame related expressions have been sunk. */
131 /* ??? This seems fragile. These variables are fragments of a larger
132 expression. If we do not keep the entire expression together, we risk
133 not being able to put it together properly. Consider forcing targets
134 to generate self-contained expressions and dropping all of the magic
135 interpretation code in this file. Or at least refusing to shrink wrap
136 any frame related insn that doesn't contain a complete expression. */
138 /* The register used for saving registers to the stack, and its offset
140 dw_cfa_location cfa_store
;
142 /* A temporary register holding an integral value used in adjusting SP
143 or setting up the store_reg. The "offset" field holds the integer
144 value, not an offset. */
145 dw_cfa_location cfa_temp
;
147 /* A set of registers saved in other registers. This is the inverse of
148 the row->reg_save info, if the entry is a DW_CFA_register. This is
149 implemented as a flat array because it normally contains zero or 1
150 entry, depending on the target. IA-64 is the big spender here, using
151 a maximum of 5 entries. */
152 vec
<reg_saved_in_data
> regs_saved_in_regs
;
154 /* An identifier for this trace. Used only for debugging dumps. */
157 /* True if this trace immediately follows NOTE_INSN_SWITCH_TEXT_SECTIONS. */
158 bool switch_sections
;
160 /* True if we've seen different values incoming to beg_true_args_size. */
161 bool args_size_undefined
;
165 typedef dw_trace_info
*dw_trace_info_ref
;
168 /* Hashtable helpers. */
170 struct trace_info_hasher
: nofree_ptr_hash
<dw_trace_info
>
172 static inline hashval_t
hash (const dw_trace_info
*);
173 static inline bool equal (const dw_trace_info
*, const dw_trace_info
*);
177 trace_info_hasher::hash (const dw_trace_info
*ti
)
179 return INSN_UID (ti
->head
);
183 trace_info_hasher::equal (const dw_trace_info
*a
, const dw_trace_info
*b
)
185 return a
->head
== b
->head
;
189 /* The variables making up the pseudo-cfg, as described above. */
190 static vec
<dw_trace_info
> trace_info
;
191 static vec
<dw_trace_info_ref
> trace_work_list
;
192 static hash_table
<trace_info_hasher
> *trace_index
;
194 /* A vector of call frame insns for the CIE. */
197 /* The state of the first row of the FDE table, which includes the
198 state provided by the CIE. */
199 static GTY(()) dw_cfi_row
*cie_cfi_row
;
201 static GTY(()) reg_saved_in_data
*cie_return_save
;
203 static GTY(()) unsigned long dwarf2out_cfi_label_num
;
205 /* The insn after which a new CFI note should be emitted. */
206 static rtx_insn
*add_cfi_insn
;
208 /* When non-null, add_cfi will add the CFI to this vector. */
209 static cfi_vec
*add_cfi_vec
;
211 /* The current instruction trace. */
212 static dw_trace_info
*cur_trace
;
214 /* The current, i.e. most recently generated, row of the CFI table. */
215 static dw_cfi_row
*cur_row
;
217 /* A copy of the current CFA, for use during the processing of a
219 static dw_cfa_location
*cur_cfa
;
221 /* We delay emitting a register save until either (a) we reach the end
222 of the prologue or (b) the register is clobbered. This clusters
223 register saves so that there are fewer pc advances. */
228 HOST_WIDE_INT cfa_offset
;
232 static vec
<queued_reg_save
> queued_reg_saves
;
234 /* True if any CFI directives were emitted at the current insn. */
235 static bool any_cfis_emitted
;
237 /* Short-hand for commonly used register numbers. */
238 static unsigned dw_stack_pointer_regnum
;
239 static unsigned dw_frame_pointer_regnum
;
241 /* Hook used by __throw. */
244 expand_builtin_dwarf_sp_column (void)
246 unsigned int dwarf_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
247 return GEN_INT (DWARF2_FRAME_REG_OUT (dwarf_regnum
, 1));
250 /* MEM is a memory reference for the register size table, each element of
251 which has mode MODE. Initialize column C as a return address column. */
254 init_return_column_size (machine_mode mode
, rtx mem
, unsigned int c
)
256 HOST_WIDE_INT offset
= c
* GET_MODE_SIZE (mode
);
257 HOST_WIDE_INT size
= GET_MODE_SIZE (Pmode
);
258 emit_move_insn (adjust_address (mem
, mode
, offset
),
259 gen_int_mode (size
, mode
));
262 /* Datastructure used by expand_builtin_init_dwarf_reg_sizes and
263 init_one_dwarf_reg_size to communicate on what has been done by the
268 /* Whether the dwarf return column was initialized. */
269 bool wrote_return_column
;
271 /* For each hard register REGNO, whether init_one_dwarf_reg_size
272 was given REGNO to process already. */
273 bool processed_regno
[FIRST_PSEUDO_REGISTER
];
275 } init_one_dwarf_reg_state
;
277 /* Helper for expand_builtin_init_dwarf_reg_sizes. Generate code to
278 initialize the dwarf register size table entry corresponding to register
279 REGNO in REGMODE. TABLE is the table base address, SLOTMODE is the mode to
280 use for the size entry to initialize, and INIT_STATE is the communication
281 datastructure conveying what we're doing to our caller. */
284 void init_one_dwarf_reg_size (int regno
, machine_mode regmode
,
285 rtx table
, machine_mode slotmode
,
286 init_one_dwarf_reg_state
*init_state
)
288 const unsigned int dnum
= DWARF_FRAME_REGNUM (regno
);
289 const unsigned int rnum
= DWARF2_FRAME_REG_OUT (dnum
, 1);
290 const unsigned int dcol
= DWARF_REG_TO_UNWIND_COLUMN (rnum
);
292 const HOST_WIDE_INT slotoffset
= dcol
* GET_MODE_SIZE (slotmode
);
293 const HOST_WIDE_INT regsize
= GET_MODE_SIZE (regmode
);
295 init_state
->processed_regno
[regno
] = true;
297 if (rnum
>= DWARF_FRAME_REGISTERS
)
300 if (dnum
== DWARF_FRAME_RETURN_COLUMN
)
302 if (regmode
== VOIDmode
)
304 init_state
->wrote_return_column
= true;
310 emit_move_insn (adjust_address (table
, slotmode
, slotoffset
),
311 gen_int_mode (regsize
, slotmode
));
314 /* Generate code to initialize the dwarf register size table located
315 at the provided ADDRESS. */
318 expand_builtin_init_dwarf_reg_sizes (tree address
)
321 machine_mode mode
= TYPE_MODE (char_type_node
);
322 rtx addr
= expand_normal (address
);
323 rtx mem
= gen_rtx_MEM (BLKmode
, addr
);
325 init_one_dwarf_reg_state init_state
;
327 memset ((char *)&init_state
, 0, sizeof (init_state
));
329 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
331 machine_mode save_mode
;
334 /* No point in processing a register multiple times. This could happen
335 with register spans, e.g. when a reg is first processed as a piece of
336 a span, then as a register on its own later on. */
338 if (init_state
.processed_regno
[i
])
341 save_mode
= targetm
.dwarf_frame_reg_mode (i
);
342 span
= targetm
.dwarf_register_span (gen_rtx_REG (save_mode
, i
));
345 init_one_dwarf_reg_size (i
, save_mode
, mem
, mode
, &init_state
);
348 for (int si
= 0; si
< XVECLEN (span
, 0); si
++)
350 rtx reg
= XVECEXP (span
, 0, si
);
352 init_one_dwarf_reg_size
353 (REGNO (reg
), GET_MODE (reg
), mem
, mode
, &init_state
);
358 if (!init_state
.wrote_return_column
)
359 init_return_column_size (mode
, mem
, DWARF_FRAME_RETURN_COLUMN
);
361 #ifdef DWARF_ALT_FRAME_RETURN_COLUMN
362 init_return_column_size (mode
, mem
, DWARF_ALT_FRAME_RETURN_COLUMN
);
365 targetm
.init_dwarf_reg_sizes_extra (address
);
369 static dw_trace_info
*
370 get_trace_info (rtx_insn
*insn
)
374 return trace_index
->find_with_hash (&dummy
, INSN_UID (insn
));
378 save_point_p (rtx_insn
*insn
)
380 /* Labels, except those that are really jump tables. */
382 return inside_basic_block_p (insn
);
384 /* We split traces at the prologue/epilogue notes because those
385 are points at which the unwind info is usually stable. This
386 makes it easier to find spots with identical unwind info so
387 that we can use remember/restore_state opcodes. */
389 switch (NOTE_KIND (insn
))
391 case NOTE_INSN_PROLOGUE_END
:
392 case NOTE_INSN_EPILOGUE_BEG
:
399 /* Divide OFF by DWARF_CIE_DATA_ALIGNMENT, asserting no remainder. */
401 static inline HOST_WIDE_INT
402 div_data_align (HOST_WIDE_INT off
)
404 HOST_WIDE_INT r
= off
/ DWARF_CIE_DATA_ALIGNMENT
;
405 gcc_assert (r
* DWARF_CIE_DATA_ALIGNMENT
== off
);
409 /* Return true if we need a signed version of a given opcode
410 (e.g. DW_CFA_offset_extended_sf vs DW_CFA_offset_extended). */
413 need_data_align_sf_opcode (HOST_WIDE_INT off
)
415 return DWARF_CIE_DATA_ALIGNMENT
< 0 ? off
> 0 : off
< 0;
418 /* Return a pointer to a newly allocated Call Frame Instruction. */
420 static inline dw_cfi_ref
423 dw_cfi_ref cfi
= ggc_alloc
<dw_cfi_node
> ();
425 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= 0;
426 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= 0;
431 /* Return a newly allocated CFI row, with no defined data. */
436 dw_cfi_row
*row
= ggc_cleared_alloc
<dw_cfi_row
> ();
438 row
->cfa
.reg
= INVALID_REGNUM
;
443 /* Return a copy of an existing CFI row. */
446 copy_cfi_row (dw_cfi_row
*src
)
448 dw_cfi_row
*dst
= ggc_alloc
<dw_cfi_row
> ();
451 dst
->reg_save
= vec_safe_copy (src
->reg_save
);
456 /* Generate a new label for the CFI info to refer to. */
459 dwarf2out_cfi_label (void)
461 int num
= dwarf2out_cfi_label_num
++;
464 ASM_GENERATE_INTERNAL_LABEL (label
, "LCFI", num
);
466 return xstrdup (label
);
469 /* Add CFI either to the current insn stream or to a vector, or both. */
472 add_cfi (dw_cfi_ref cfi
)
474 any_cfis_emitted
= true;
476 if (add_cfi_insn
!= NULL
)
478 add_cfi_insn
= emit_note_after (NOTE_INSN_CFI
, add_cfi_insn
);
479 NOTE_CFI (add_cfi_insn
) = cfi
;
482 if (add_cfi_vec
!= NULL
)
483 vec_safe_push (*add_cfi_vec
, cfi
);
487 add_cfi_args_size (HOST_WIDE_INT size
)
489 dw_cfi_ref cfi
= new_cfi ();
491 /* While we can occasionally have args_size < 0 internally, this state
492 should not persist at a point we actually need an opcode. */
493 gcc_assert (size
>= 0);
495 cfi
->dw_cfi_opc
= DW_CFA_GNU_args_size
;
496 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= size
;
502 add_cfi_restore (unsigned reg
)
504 dw_cfi_ref cfi
= new_cfi ();
506 cfi
->dw_cfi_opc
= (reg
& ~0x3f ? DW_CFA_restore_extended
: DW_CFA_restore
);
507 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
512 /* Perform ROW->REG_SAVE[COLUMN] = CFI. CFI may be null, indicating
513 that the register column is no longer saved. */
516 update_row_reg_save (dw_cfi_row
*row
, unsigned column
, dw_cfi_ref cfi
)
518 if (vec_safe_length (row
->reg_save
) <= column
)
519 vec_safe_grow_cleared (row
->reg_save
, column
+ 1);
520 (*row
->reg_save
)[column
] = cfi
;
523 /* This function fills in aa dw_cfa_location structure from a dwarf location
524 descriptor sequence. */
527 get_cfa_from_loc_descr (dw_cfa_location
*cfa
, struct dw_loc_descr_node
*loc
)
529 struct dw_loc_descr_node
*ptr
;
531 cfa
->base_offset
= 0;
535 for (ptr
= loc
; ptr
!= NULL
; ptr
= ptr
->dw_loc_next
)
537 enum dwarf_location_atom op
= ptr
->dw_loc_opc
;
573 cfa
->reg
= op
- DW_OP_reg0
;
576 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
610 cfa
->reg
= op
- DW_OP_breg0
;
611 cfa
->base_offset
= ptr
->dw_loc_oprnd1
.v
.val_int
;
614 cfa
->reg
= ptr
->dw_loc_oprnd1
.v
.val_int
;
615 cfa
->base_offset
= ptr
->dw_loc_oprnd2
.v
.val_int
;
620 case DW_OP_plus_uconst
:
621 cfa
->offset
= ptr
->dw_loc_oprnd1
.v
.val_unsigned
;
629 /* Find the previous value for the CFA, iteratively. CFI is the opcode
630 to interpret, *LOC will be updated as necessary, *REMEMBER is used for
631 one level of remember/restore state processing. */
634 lookup_cfa_1 (dw_cfi_ref cfi
, dw_cfa_location
*loc
, dw_cfa_location
*remember
)
636 switch (cfi
->dw_cfi_opc
)
638 case DW_CFA_def_cfa_offset
:
639 case DW_CFA_def_cfa_offset_sf
:
640 loc
->offset
= cfi
->dw_cfi_oprnd1
.dw_cfi_offset
;
642 case DW_CFA_def_cfa_register
:
643 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
646 case DW_CFA_def_cfa_sf
:
647 loc
->reg
= cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
;
648 loc
->offset
= cfi
->dw_cfi_oprnd2
.dw_cfi_offset
;
650 case DW_CFA_def_cfa_expression
:
651 get_cfa_from_loc_descr (loc
, cfi
->dw_cfi_oprnd1
.dw_cfi_loc
);
654 case DW_CFA_remember_state
:
655 gcc_assert (!remember
->in_use
);
657 remember
->in_use
= 1;
659 case DW_CFA_restore_state
:
660 gcc_assert (remember
->in_use
);
662 remember
->in_use
= 0;
670 /* Determine if two dw_cfa_location structures define the same data. */
673 cfa_equal_p (const dw_cfa_location
*loc1
, const dw_cfa_location
*loc2
)
675 return (loc1
->reg
== loc2
->reg
676 && loc1
->offset
== loc2
->offset
677 && loc1
->indirect
== loc2
->indirect
678 && (loc1
->indirect
== 0
679 || loc1
->base_offset
== loc2
->base_offset
));
682 /* Determine if two CFI operands are identical. */
685 cfi_oprnd_equal_p (enum dw_cfi_oprnd_type t
, dw_cfi_oprnd
*a
, dw_cfi_oprnd
*b
)
689 case dw_cfi_oprnd_unused
:
691 case dw_cfi_oprnd_reg_num
:
692 return a
->dw_cfi_reg_num
== b
->dw_cfi_reg_num
;
693 case dw_cfi_oprnd_offset
:
694 return a
->dw_cfi_offset
== b
->dw_cfi_offset
;
695 case dw_cfi_oprnd_addr
:
696 return (a
->dw_cfi_addr
== b
->dw_cfi_addr
697 || strcmp (a
->dw_cfi_addr
, b
->dw_cfi_addr
) == 0);
698 case dw_cfi_oprnd_loc
:
699 return loc_descr_equal_p (a
->dw_cfi_loc
, b
->dw_cfi_loc
);
704 /* Determine if two CFI entries are identical. */
707 cfi_equal_p (dw_cfi_ref a
, dw_cfi_ref b
)
709 enum dwarf_call_frame_info opc
;
711 /* Make things easier for our callers, including missing operands. */
714 if (a
== NULL
|| b
== NULL
)
717 /* Obviously, the opcodes must match. */
719 if (opc
!= b
->dw_cfi_opc
)
722 /* Compare the two operands, re-using the type of the operands as
723 already exposed elsewhere. */
724 return (cfi_oprnd_equal_p (dw_cfi_oprnd1_desc (opc
),
725 &a
->dw_cfi_oprnd1
, &b
->dw_cfi_oprnd1
)
726 && cfi_oprnd_equal_p (dw_cfi_oprnd2_desc (opc
),
727 &a
->dw_cfi_oprnd2
, &b
->dw_cfi_oprnd2
));
730 /* Determine if two CFI_ROW structures are identical. */
733 cfi_row_equal_p (dw_cfi_row
*a
, dw_cfi_row
*b
)
735 size_t i
, n_a
, n_b
, n_max
;
739 if (!cfi_equal_p (a
->cfa_cfi
, b
->cfa_cfi
))
742 else if (!cfa_equal_p (&a
->cfa
, &b
->cfa
))
745 n_a
= vec_safe_length (a
->reg_save
);
746 n_b
= vec_safe_length (b
->reg_save
);
747 n_max
= MAX (n_a
, n_b
);
749 for (i
= 0; i
< n_max
; ++i
)
751 dw_cfi_ref r_a
= NULL
, r_b
= NULL
;
754 r_a
= (*a
->reg_save
)[i
];
756 r_b
= (*b
->reg_save
)[i
];
758 if (!cfi_equal_p (r_a
, r_b
))
765 /* The CFA is now calculated from NEW_CFA. Consider OLD_CFA in determining
766 what opcode to emit. Returns the CFI opcode to effect the change, or
767 NULL if NEW_CFA == OLD_CFA. */
770 def_cfa_0 (dw_cfa_location
*old_cfa
, dw_cfa_location
*new_cfa
)
774 /* If nothing changed, no need to issue any call frame instructions. */
775 if (cfa_equal_p (old_cfa
, new_cfa
))
780 if (new_cfa
->reg
== old_cfa
->reg
&& !new_cfa
->indirect
&& !old_cfa
->indirect
)
782 /* Construct a "DW_CFA_def_cfa_offset <offset>" instruction, indicating
783 the CFA register did not change but the offset did. The data
784 factoring for DW_CFA_def_cfa_offset_sf happens in output_cfi, or
785 in the assembler via the .cfi_def_cfa_offset directive. */
786 if (new_cfa
->offset
< 0)
787 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset_sf
;
789 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_offset
;
790 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
= new_cfa
->offset
;
792 else if (new_cfa
->offset
== old_cfa
->offset
793 && old_cfa
->reg
!= INVALID_REGNUM
794 && !new_cfa
->indirect
795 && !old_cfa
->indirect
)
797 /* Construct a "DW_CFA_def_cfa_register <register>" instruction,
798 indicating the CFA register has changed to <register> but the
799 offset has not changed. */
800 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_register
;
801 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
803 else if (new_cfa
->indirect
== 0)
805 /* Construct a "DW_CFA_def_cfa <register> <offset>" instruction,
806 indicating the CFA register has changed to <register> with
807 the specified offset. The data factoring for DW_CFA_def_cfa_sf
808 happens in output_cfi, or in the assembler via the .cfi_def_cfa
810 if (new_cfa
->offset
< 0)
811 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_sf
;
813 cfi
->dw_cfi_opc
= DW_CFA_def_cfa
;
814 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= new_cfa
->reg
;
815 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= new_cfa
->offset
;
819 /* Construct a DW_CFA_def_cfa_expression instruction to
820 calculate the CFA using a full location expression since no
821 register-offset pair is available. */
822 struct dw_loc_descr_node
*loc_list
;
824 cfi
->dw_cfi_opc
= DW_CFA_def_cfa_expression
;
825 loc_list
= build_cfa_loc (new_cfa
, 0);
826 cfi
->dw_cfi_oprnd1
.dw_cfi_loc
= loc_list
;
832 /* Similarly, but take OLD_CFA from CUR_ROW, and update it after the fact. */
835 def_cfa_1 (dw_cfa_location
*new_cfa
)
839 if (cur_trace
->cfa_store
.reg
== new_cfa
->reg
&& new_cfa
->indirect
== 0)
840 cur_trace
->cfa_store
.offset
= new_cfa
->offset
;
842 cfi
= def_cfa_0 (&cur_row
->cfa
, new_cfa
);
845 cur_row
->cfa
= *new_cfa
;
846 cur_row
->cfa_cfi
= (cfi
->dw_cfi_opc
== DW_CFA_def_cfa_expression
853 /* Add the CFI for saving a register. REG is the CFA column number.
854 If SREG is -1, the register is saved at OFFSET from the CFA;
855 otherwise it is saved in SREG. */
858 reg_save (unsigned int reg
, unsigned int sreg
, HOST_WIDE_INT offset
)
860 dw_fde_ref fde
= cfun
? cfun
->fde
: NULL
;
861 dw_cfi_ref cfi
= new_cfi ();
863 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
865 /* When stack is aligned, store REG using DW_CFA_expression with FP. */
867 && fde
->stack_realign
868 && sreg
== INVALID_REGNUM
)
870 cfi
->dw_cfi_opc
= DW_CFA_expression
;
871 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= reg
;
872 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
873 = build_cfa_aligned_loc (&cur_row
->cfa
, offset
,
874 fde
->stack_realignment
);
876 else if (sreg
== INVALID_REGNUM
)
878 if (need_data_align_sf_opcode (offset
))
879 cfi
->dw_cfi_opc
= DW_CFA_offset_extended_sf
;
880 else if (reg
& ~0x3f)
881 cfi
->dw_cfi_opc
= DW_CFA_offset_extended
;
883 cfi
->dw_cfi_opc
= DW_CFA_offset
;
884 cfi
->dw_cfi_oprnd2
.dw_cfi_offset
= offset
;
886 else if (sreg
== reg
)
888 /* While we could emit something like DW_CFA_same_value or
889 DW_CFA_restore, we never expect to see something like that
890 in a prologue. This is more likely to be a bug. A backend
891 can always bypass this by using REG_CFA_RESTORE directly. */
896 cfi
->dw_cfi_opc
= DW_CFA_register
;
897 cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
= sreg
;
901 update_row_reg_save (cur_row
, reg
, cfi
);
904 /* A subroutine of scan_trace. Check INSN for a REG_ARGS_SIZE note
905 and adjust data structures to match. */
908 notice_args_size (rtx_insn
*insn
)
910 HOST_WIDE_INT args_size
, delta
;
913 note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL
);
917 args_size
= INTVAL (XEXP (note
, 0));
918 delta
= args_size
- cur_trace
->end_true_args_size
;
922 cur_trace
->end_true_args_size
= args_size
;
924 /* If the CFA is computed off the stack pointer, then we must adjust
925 the computation of the CFA as well. */
926 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
928 gcc_assert (!cur_cfa
->indirect
);
930 /* Convert a change in args_size (always a positive in the
931 direction of stack growth) to a change in stack pointer. */
932 if (!STACK_GROWS_DOWNWARD
)
935 cur_cfa
->offset
+= delta
;
939 /* A subroutine of scan_trace. INSN is can_throw_internal. Update the
940 data within the trace related to EH insns and args_size. */
943 notice_eh_throw (rtx_insn
*insn
)
945 HOST_WIDE_INT args_size
;
947 args_size
= cur_trace
->end_true_args_size
;
948 if (cur_trace
->eh_head
== NULL
)
950 cur_trace
->eh_head
= insn
;
951 cur_trace
->beg_delay_args_size
= args_size
;
952 cur_trace
->end_delay_args_size
= args_size
;
954 else if (cur_trace
->end_delay_args_size
!= args_size
)
956 cur_trace
->end_delay_args_size
= args_size
;
958 /* ??? If the CFA is the stack pointer, search backward for the last
959 CFI note and insert there. Given that the stack changed for the
960 args_size change, there *must* be such a note in between here and
962 add_cfi_args_size (args_size
);
966 /* Short-hand inline for the very common D_F_R (REGNO (x)) operation. */
967 /* ??? This ought to go into dwarf2out.h, except that dwarf2out.h is
968 used in places where rtl is prohibited. */
970 static inline unsigned
971 dwf_regno (const_rtx reg
)
973 gcc_assert (REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
974 return DWARF_FRAME_REGNUM (REGNO (reg
));
977 /* Compare X and Y for equivalence. The inputs may be REGs or PC_RTX. */
980 compare_reg_or_pc (rtx x
, rtx y
)
982 if (REG_P (x
) && REG_P (y
))
983 return REGNO (x
) == REGNO (y
);
987 /* Record SRC as being saved in DEST. DEST may be null to delete an
988 existing entry. SRC may be a register or PC_RTX. */
991 record_reg_saved_in_reg (rtx dest
, rtx src
)
993 reg_saved_in_data
*elt
;
996 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, elt
)
997 if (compare_reg_or_pc (elt
->orig_reg
, src
))
1000 cur_trace
->regs_saved_in_regs
.unordered_remove (i
);
1002 elt
->saved_in_reg
= dest
;
1009 reg_saved_in_data e
= {src
, dest
};
1010 cur_trace
->regs_saved_in_regs
.safe_push (e
);
1013 /* Add an entry to QUEUED_REG_SAVES saying that REG is now saved at
1014 SREG, or if SREG is NULL then it is saved at OFFSET to the CFA. */
1017 queue_reg_save (rtx reg
, rtx sreg
, HOST_WIDE_INT offset
)
1020 queued_reg_save e
= {reg
, sreg
, offset
};
1023 /* Duplicates waste space, but it's also necessary to remove them
1024 for correctness, since the queue gets output in reverse order. */
1025 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1026 if (compare_reg_or_pc (q
->reg
, reg
))
1032 queued_reg_saves
.safe_push (e
);
1035 /* Output all the entries in QUEUED_REG_SAVES. */
1038 dwarf2out_flush_queued_reg_saves (void)
1043 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1045 unsigned int reg
, sreg
;
1047 record_reg_saved_in_reg (q
->saved_reg
, q
->reg
);
1049 if (q
->reg
== pc_rtx
)
1050 reg
= DWARF_FRAME_RETURN_COLUMN
;
1052 reg
= dwf_regno (q
->reg
);
1054 sreg
= dwf_regno (q
->saved_reg
);
1056 sreg
= INVALID_REGNUM
;
1057 reg_save (reg
, sreg
, q
->cfa_offset
);
1060 queued_reg_saves
.truncate (0);
1063 /* Does INSN clobber any register which QUEUED_REG_SAVES lists a saved
1064 location for? Or, does it clobber a register which we've previously
1065 said that some other register is saved in, and for which we now
1066 have a new location for? */
1069 clobbers_queued_reg_save (const_rtx insn
)
1074 FOR_EACH_VEC_ELT (queued_reg_saves
, iq
, q
)
1077 reg_saved_in_data
*rir
;
1079 if (modified_in_p (q
->reg
, insn
))
1082 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, ir
, rir
)
1083 if (compare_reg_or_pc (q
->reg
, rir
->orig_reg
)
1084 && modified_in_p (rir
->saved_in_reg
, insn
))
1091 /* What register, if any, is currently saved in REG? */
1094 reg_saved_in (rtx reg
)
1096 unsigned int regn
= REGNO (reg
);
1098 reg_saved_in_data
*rir
;
1101 FOR_EACH_VEC_ELT (queued_reg_saves
, i
, q
)
1102 if (q
->saved_reg
&& regn
== REGNO (q
->saved_reg
))
1105 FOR_EACH_VEC_ELT (cur_trace
->regs_saved_in_regs
, i
, rir
)
1106 if (regn
== REGNO (rir
->saved_in_reg
))
1107 return rir
->orig_reg
;
1112 /* A subroutine of dwarf2out_frame_debug, process a REG_DEF_CFA note. */
1115 dwarf2out_frame_debug_def_cfa (rtx pat
)
1117 memset (cur_cfa
, 0, sizeof (*cur_cfa
));
1119 if (GET_CODE (pat
) == PLUS
)
1121 cur_cfa
->offset
= INTVAL (XEXP (pat
, 1));
1122 pat
= XEXP (pat
, 0);
1126 cur_cfa
->indirect
= 1;
1127 pat
= XEXP (pat
, 0);
1128 if (GET_CODE (pat
) == PLUS
)
1130 cur_cfa
->base_offset
= INTVAL (XEXP (pat
, 1));
1131 pat
= XEXP (pat
, 0);
1134 /* ??? If this fails, we could be calling into the _loc functions to
1135 define a full expression. So far no port does that. */
1136 gcc_assert (REG_P (pat
));
1137 cur_cfa
->reg
= dwf_regno (pat
);
1140 /* A subroutine of dwarf2out_frame_debug, process a REG_ADJUST_CFA note. */
1143 dwarf2out_frame_debug_adjust_cfa (rtx pat
)
1147 gcc_assert (GET_CODE (pat
) == SET
);
1148 dest
= XEXP (pat
, 0);
1149 src
= XEXP (pat
, 1);
1151 switch (GET_CODE (src
))
1154 gcc_assert (dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
);
1155 cur_cfa
->offset
-= INTVAL (XEXP (src
, 1));
1165 cur_cfa
->reg
= dwf_regno (dest
);
1166 gcc_assert (cur_cfa
->indirect
== 0);
1169 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_OFFSET note. */
1172 dwarf2out_frame_debug_cfa_offset (rtx set
)
1174 HOST_WIDE_INT offset
;
1175 rtx src
, addr
, span
;
1176 unsigned int sregno
;
1178 src
= XEXP (set
, 1);
1179 addr
= XEXP (set
, 0);
1180 gcc_assert (MEM_P (addr
));
1181 addr
= XEXP (addr
, 0);
1183 /* As documented, only consider extremely simple addresses. */
1184 switch (GET_CODE (addr
))
1187 gcc_assert (dwf_regno (addr
) == cur_cfa
->reg
);
1188 offset
= -cur_cfa
->offset
;
1191 gcc_assert (dwf_regno (XEXP (addr
, 0)) == cur_cfa
->reg
);
1192 offset
= INTVAL (XEXP (addr
, 1)) - cur_cfa
->offset
;
1201 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1205 span
= targetm
.dwarf_register_span (src
);
1206 sregno
= dwf_regno (src
);
1209 /* ??? We'd like to use queue_reg_save, but we need to come up with
1210 a different flushing heuristic for epilogues. */
1212 reg_save (sregno
, INVALID_REGNUM
, offset
);
1215 /* We have a PARALLEL describing where the contents of SRC live.
1216 Adjust the offset for each piece of the PARALLEL. */
1217 HOST_WIDE_INT span_offset
= offset
;
1219 gcc_assert (GET_CODE (span
) == PARALLEL
);
1221 const int par_len
= XVECLEN (span
, 0);
1222 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1224 rtx elem
= XVECEXP (span
, 0, par_index
);
1225 sregno
= dwf_regno (src
);
1226 reg_save (sregno
, INVALID_REGNUM
, span_offset
);
1227 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1232 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_REGISTER note. */
1235 dwarf2out_frame_debug_cfa_register (rtx set
)
1238 unsigned sregno
, dregno
;
1240 src
= XEXP (set
, 1);
1241 dest
= XEXP (set
, 0);
1243 record_reg_saved_in_reg (dest
, src
);
1245 sregno
= DWARF_FRAME_RETURN_COLUMN
;
1247 sregno
= dwf_regno (src
);
1249 dregno
= dwf_regno (dest
);
1251 /* ??? We'd like to use queue_reg_save, but we need to come up with
1252 a different flushing heuristic for epilogues. */
1253 reg_save (sregno
, dregno
, 0);
1256 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_EXPRESSION note. */
1259 dwarf2out_frame_debug_cfa_expression (rtx set
)
1261 rtx src
, dest
, span
;
1262 dw_cfi_ref cfi
= new_cfi ();
1265 dest
= SET_DEST (set
);
1266 src
= SET_SRC (set
);
1268 gcc_assert (REG_P (src
));
1269 gcc_assert (MEM_P (dest
));
1271 span
= targetm
.dwarf_register_span (src
);
1274 regno
= dwf_regno (src
);
1276 cfi
->dw_cfi_opc
= DW_CFA_expression
;
1277 cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
= regno
;
1278 cfi
->dw_cfi_oprnd2
.dw_cfi_loc
1279 = mem_loc_descriptor (XEXP (dest
, 0), get_address_mode (dest
),
1280 GET_MODE (dest
), VAR_INIT_STATUS_INITIALIZED
);
1282 /* ??? We'd like to use queue_reg_save, were the interface different,
1283 and, as above, we could manage flushing for epilogues. */
1285 update_row_reg_save (cur_row
, regno
, cfi
);
1288 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_RESTORE note. */
1291 dwarf2out_frame_debug_cfa_restore (rtx reg
)
1293 gcc_assert (REG_P (reg
));
1295 rtx span
= targetm
.dwarf_register_span (reg
);
1298 unsigned int regno
= dwf_regno (reg
);
1299 add_cfi_restore (regno
);
1300 update_row_reg_save (cur_row
, regno
, NULL
);
1304 /* We have a PARALLEL describing where the contents of REG live.
1305 Restore the register for each piece of the PARALLEL. */
1306 gcc_assert (GET_CODE (span
) == PARALLEL
);
1308 const int par_len
= XVECLEN (span
, 0);
1309 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1311 reg
= XVECEXP (span
, 0, par_index
);
1312 gcc_assert (REG_P (reg
));
1313 unsigned int regno
= dwf_regno (reg
);
1314 add_cfi_restore (regno
);
1315 update_row_reg_save (cur_row
, regno
, NULL
);
1320 /* A subroutine of dwarf2out_frame_debug, process a REG_CFA_WINDOW_SAVE.
1321 ??? Perhaps we should note in the CIE where windows are saved (instead of
1322 assuming 0(cfa)) and what registers are in the window. */
1325 dwarf2out_frame_debug_cfa_window_save (void)
1327 dw_cfi_ref cfi
= new_cfi ();
1329 cfi
->dw_cfi_opc
= DW_CFA_GNU_window_save
;
1333 /* Record call frame debugging information for an expression EXPR,
1334 which either sets SP or FP (adjusting how we calculate the frame
1335 address) or saves a register to the stack or another register.
1336 LABEL indicates the address of EXPR.
1338 This function encodes a state machine mapping rtxes to actions on
1339 cfa, cfa_store, and cfa_temp.reg. We describe these rules so
1340 users need not read the source code.
1342 The High-Level Picture
1344 Changes in the register we use to calculate the CFA: Currently we
1345 assume that if you copy the CFA register into another register, we
1346 should take the other one as the new CFA register; this seems to
1347 work pretty well. If it's wrong for some target, it's simple
1348 enough not to set RTX_FRAME_RELATED_P on the insn in question.
1350 Changes in the register we use for saving registers to the stack:
1351 This is usually SP, but not always. Again, we deduce that if you
1352 copy SP into another register (and SP is not the CFA register),
1353 then the new register is the one we will be using for register
1354 saves. This also seems to work.
1356 Register saves: There's not much guesswork about this one; if
1357 RTX_FRAME_RELATED_P is set on an insn which modifies memory, it's a
1358 register save, and the register used to calculate the destination
1359 had better be the one we think we're using for this purpose.
1360 It's also assumed that a copy from a call-saved register to another
1361 register is saving that register if RTX_FRAME_RELATED_P is set on
1362 that instruction. If the copy is from a call-saved register to
1363 the *same* register, that means that the register is now the same
1364 value as in the caller.
1366 Except: If the register being saved is the CFA register, and the
1367 offset is nonzero, we are saving the CFA, so we assume we have to
1368 use DW_CFA_def_cfa_expression. If the offset is 0, we assume that
1369 the intent is to save the value of SP from the previous frame.
1371 In addition, if a register has previously been saved to a different
1374 Invariants / Summaries of Rules
1376 cfa current rule for calculating the CFA. It usually
1377 consists of a register and an offset. This is
1378 actually stored in *cur_cfa, but abbreviated
1379 for the purposes of this documentation.
1380 cfa_store register used by prologue code to save things to the stack
1381 cfa_store.offset is the offset from the value of
1382 cfa_store.reg to the actual CFA
1383 cfa_temp register holding an integral value. cfa_temp.offset
1384 stores the value, which will be used to adjust the
1385 stack pointer. cfa_temp is also used like cfa_store,
1386 to track stores to the stack via fp or a temp reg.
1388 Rules 1- 4: Setting a register's value to cfa.reg or an expression
1389 with cfa.reg as the first operand changes the cfa.reg and its
1390 cfa.offset. Rule 1 and 4 also set cfa_temp.reg and
1393 Rules 6- 9: Set a non-cfa.reg register value to a constant or an
1394 expression yielding a constant. This sets cfa_temp.reg
1395 and cfa_temp.offset.
1397 Rule 5: Create a new register cfa_store used to save items to the
1400 Rules 10-14: Save a register to the stack. Define offset as the
1401 difference of the original location and cfa_store's
1402 location (or cfa_temp's location if cfa_temp is used).
1404 Rules 16-20: If AND operation happens on sp in prologue, we assume
1405 stack is realigned. We will use a group of DW_OP_XXX
1406 expressions to represent the location of the stored
1407 register instead of CFA+offset.
1411 "{a,b}" indicates a choice of a xor b.
1412 "<reg>:cfa.reg" indicates that <reg> must equal cfa.reg.
1415 (set <reg1> <reg2>:cfa.reg)
1416 effects: cfa.reg = <reg1>
1417 cfa.offset unchanged
1418 cfa_temp.reg = <reg1>
1419 cfa_temp.offset = cfa.offset
1422 (set sp ({minus,plus,losum} {sp,fp}:cfa.reg
1423 {<const_int>,<reg>:cfa_temp.reg}))
1424 effects: cfa.reg = sp if fp used
1425 cfa.offset += {+/- <const_int>, cfa_temp.offset} if cfa.reg==sp
1426 cfa_store.offset += {+/- <const_int>, cfa_temp.offset}
1427 if cfa_store.reg==sp
1430 (set fp ({minus,plus,losum} <reg>:cfa.reg <const_int>))
1431 effects: cfa.reg = fp
1432 cfa_offset += +/- <const_int>
1435 (set <reg1> ({plus,losum} <reg2>:cfa.reg <const_int>))
1436 constraints: <reg1> != fp
1438 effects: cfa.reg = <reg1>
1439 cfa_temp.reg = <reg1>
1440 cfa_temp.offset = cfa.offset
1443 (set <reg1> (plus <reg2>:cfa_temp.reg sp:cfa.reg))
1444 constraints: <reg1> != fp
1446 effects: cfa_store.reg = <reg1>
1447 cfa_store.offset = cfa.offset - cfa_temp.offset
1450 (set <reg> <const_int>)
1451 effects: cfa_temp.reg = <reg>
1452 cfa_temp.offset = <const_int>
1455 (set <reg1>:cfa_temp.reg (ior <reg2>:cfa_temp.reg <const_int>))
1456 effects: cfa_temp.reg = <reg1>
1457 cfa_temp.offset |= <const_int>
1460 (set <reg> (high <exp>))
1464 (set <reg> (lo_sum <exp> <const_int>))
1465 effects: cfa_temp.reg = <reg>
1466 cfa_temp.offset = <const_int>
1469 (set (mem ({pre,post}_modify sp:cfa_store (???? <reg1> <const_int>))) <reg2>)
1470 effects: cfa_store.offset -= <const_int>
1471 cfa.offset = cfa_store.offset if cfa.reg == sp
1473 cfa.base_offset = -cfa_store.offset
1476 (set (mem ({pre_inc,pre_dec,post_dec} sp:cfa_store.reg)) <reg>)
1477 effects: cfa_store.offset += -/+ mode_size(mem)
1478 cfa.offset = cfa_store.offset if cfa.reg == sp
1480 cfa.base_offset = -cfa_store.offset
1483 (set (mem ({minus,plus,losum} <reg1>:{cfa_store,cfa_temp} <const_int>))
1486 effects: cfa.reg = <reg1>
1487 cfa.base_offset = -/+ <const_int> - {cfa_store,cfa_temp}.offset
1490 (set (mem <reg1>:{cfa_store,cfa_temp}) <reg2>)
1491 effects: cfa.reg = <reg1>
1492 cfa.base_offset = -{cfa_store,cfa_temp}.offset
1495 (set (mem (post_inc <reg1>:cfa_temp <const_int>)) <reg2>)
1496 effects: cfa.reg = <reg1>
1497 cfa.base_offset = -cfa_temp.offset
1498 cfa_temp.offset -= mode_size(mem)
1501 (set <reg> {unspec, unspec_volatile})
1502 effects: target-dependent
1505 (set sp (and: sp <const_int>))
1506 constraints: cfa_store.reg == sp
1507 effects: cfun->fde.stack_realign = 1
1508 cfa_store.offset = 0
1509 fde->drap_reg = cfa.reg if cfa.reg != sp and cfa.reg != fp
1512 (set (mem ({pre_inc, pre_dec} sp)) (mem (plus (cfa.reg) (const_int))))
1513 effects: cfa_store.offset += -/+ mode_size(mem)
1516 (set (mem ({pre_inc, pre_dec} sp)) fp)
1517 constraints: fde->stack_realign == 1
1518 effects: cfa_store.offset = 0
1519 cfa.reg != HARD_FRAME_POINTER_REGNUM
1522 (set (mem ({pre_inc, pre_dec} sp)) cfa.reg)
1523 constraints: fde->stack_realign == 1
1525 && cfa.indirect == 0
1526 && cfa.reg != HARD_FRAME_POINTER_REGNUM
1527 effects: Use DW_CFA_def_cfa_expression to define cfa
1528 cfa.reg == fde->drap_reg */
1531 dwarf2out_frame_debug_expr (rtx expr
)
1533 rtx src
, dest
, span
;
1534 HOST_WIDE_INT offset
;
1537 /* If RTX_FRAME_RELATED_P is set on a PARALLEL, process each member of
1538 the PARALLEL independently. The first element is always processed if
1539 it is a SET. This is for backward compatibility. Other elements
1540 are processed only if they are SETs and the RTX_FRAME_RELATED_P
1541 flag is set in them. */
1542 if (GET_CODE (expr
) == PARALLEL
|| GET_CODE (expr
) == SEQUENCE
)
1545 int limit
= XVECLEN (expr
, 0);
1548 /* PARALLELs have strict read-modify-write semantics, so we
1549 ought to evaluate every rvalue before changing any lvalue.
1550 It's cumbersome to do that in general, but there's an
1551 easy approximation that is enough for all current users:
1552 handle register saves before register assignments. */
1553 if (GET_CODE (expr
) == PARALLEL
)
1554 for (par_index
= 0; par_index
< limit
; par_index
++)
1556 elem
= XVECEXP (expr
, 0, par_index
);
1557 if (GET_CODE (elem
) == SET
1558 && MEM_P (SET_DEST (elem
))
1559 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1560 dwarf2out_frame_debug_expr (elem
);
1563 for (par_index
= 0; par_index
< limit
; par_index
++)
1565 elem
= XVECEXP (expr
, 0, par_index
);
1566 if (GET_CODE (elem
) == SET
1567 && (!MEM_P (SET_DEST (elem
)) || GET_CODE (expr
) == SEQUENCE
)
1568 && (RTX_FRAME_RELATED_P (elem
) || par_index
== 0))
1569 dwarf2out_frame_debug_expr (elem
);
1574 gcc_assert (GET_CODE (expr
) == SET
);
1576 src
= SET_SRC (expr
);
1577 dest
= SET_DEST (expr
);
1581 rtx rsi
= reg_saved_in (src
);
1588 switch (GET_CODE (dest
))
1591 switch (GET_CODE (src
))
1593 /* Setting FP from SP. */
1595 if (cur_cfa
->reg
== dwf_regno (src
))
1598 /* Update the CFA rule wrt SP or FP. Make sure src is
1599 relative to the current CFA register.
1601 We used to require that dest be either SP or FP, but the
1602 ARM copies SP to a temporary register, and from there to
1603 FP. So we just rely on the backends to only set
1604 RTX_FRAME_RELATED_P on appropriate insns. */
1605 cur_cfa
->reg
= dwf_regno (dest
);
1606 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1607 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1611 /* Saving a register in a register. */
1612 gcc_assert (!fixed_regs
[REGNO (dest
)]
1613 /* For the SPARC and its register window. */
1614 || (dwf_regno (src
) == DWARF_FRAME_RETURN_COLUMN
));
1616 /* After stack is aligned, we can only save SP in FP
1617 if drap register is used. In this case, we have
1618 to restore stack pointer with the CFA value and we
1619 don't generate this DWARF information. */
1621 && fde
->stack_realign
1622 && REGNO (src
) == STACK_POINTER_REGNUM
)
1623 gcc_assert (REGNO (dest
) == HARD_FRAME_POINTER_REGNUM
1624 && fde
->drap_reg
!= INVALID_REGNUM
1625 && cur_cfa
->reg
!= dwf_regno (src
));
1627 queue_reg_save (src
, dest
, 0);
1634 if (dest
== stack_pointer_rtx
)
1638 switch (GET_CODE (XEXP (src
, 1)))
1641 offset
= INTVAL (XEXP (src
, 1));
1644 gcc_assert (dwf_regno (XEXP (src
, 1))
1645 == cur_trace
->cfa_temp
.reg
);
1646 offset
= cur_trace
->cfa_temp
.offset
;
1652 if (XEXP (src
, 0) == hard_frame_pointer_rtx
)
1654 /* Restoring SP from FP in the epilogue. */
1655 gcc_assert (cur_cfa
->reg
== dw_frame_pointer_regnum
);
1656 cur_cfa
->reg
= dw_stack_pointer_regnum
;
1658 else if (GET_CODE (src
) == LO_SUM
)
1659 /* Assume we've set the source reg of the LO_SUM from sp. */
1662 gcc_assert (XEXP (src
, 0) == stack_pointer_rtx
);
1664 if (GET_CODE (src
) != MINUS
)
1666 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1667 cur_cfa
->offset
+= offset
;
1668 if (cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
)
1669 cur_trace
->cfa_store
.offset
+= offset
;
1671 else if (dest
== hard_frame_pointer_rtx
)
1674 /* Either setting the FP from an offset of the SP,
1675 or adjusting the FP */
1676 gcc_assert (frame_pointer_needed
);
1678 gcc_assert (REG_P (XEXP (src
, 0))
1679 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1680 && CONST_INT_P (XEXP (src
, 1)));
1681 offset
= INTVAL (XEXP (src
, 1));
1682 if (GET_CODE (src
) != MINUS
)
1684 cur_cfa
->offset
+= offset
;
1685 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1689 gcc_assert (GET_CODE (src
) != MINUS
);
1692 if (REG_P (XEXP (src
, 0))
1693 && dwf_regno (XEXP (src
, 0)) == cur_cfa
->reg
1694 && CONST_INT_P (XEXP (src
, 1)))
1696 /* Setting a temporary CFA register that will be copied
1697 into the FP later on. */
1698 offset
= - INTVAL (XEXP (src
, 1));
1699 cur_cfa
->offset
+= offset
;
1700 cur_cfa
->reg
= dwf_regno (dest
);
1701 /* Or used to save regs to the stack. */
1702 cur_trace
->cfa_temp
.reg
= cur_cfa
->reg
;
1703 cur_trace
->cfa_temp
.offset
= cur_cfa
->offset
;
1707 else if (REG_P (XEXP (src
, 0))
1708 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1709 && XEXP (src
, 1) == stack_pointer_rtx
)
1711 /* Setting a scratch register that we will use instead
1712 of SP for saving registers to the stack. */
1713 gcc_assert (cur_cfa
->reg
== dw_stack_pointer_regnum
);
1714 cur_trace
->cfa_store
.reg
= dwf_regno (dest
);
1715 cur_trace
->cfa_store
.offset
1716 = cur_cfa
->offset
- cur_trace
->cfa_temp
.offset
;
1720 else if (GET_CODE (src
) == LO_SUM
1721 && CONST_INT_P (XEXP (src
, 1)))
1723 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1724 cur_trace
->cfa_temp
.offset
= INTVAL (XEXP (src
, 1));
1733 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1734 cur_trace
->cfa_temp
.offset
= INTVAL (src
);
1739 gcc_assert (REG_P (XEXP (src
, 0))
1740 && dwf_regno (XEXP (src
, 0)) == cur_trace
->cfa_temp
.reg
1741 && CONST_INT_P (XEXP (src
, 1)));
1743 cur_trace
->cfa_temp
.reg
= dwf_regno (dest
);
1744 cur_trace
->cfa_temp
.offset
|= INTVAL (XEXP (src
, 1));
1747 /* Skip over HIGH, assuming it will be followed by a LO_SUM,
1748 which will fill in all of the bits. */
1755 case UNSPEC_VOLATILE
:
1756 /* All unspecs should be represented by REG_CFA_* notes. */
1762 /* If this AND operation happens on stack pointer in prologue,
1763 we assume the stack is realigned and we extract the
1765 if (fde
&& XEXP (src
, 0) == stack_pointer_rtx
)
1767 /* We interpret reg_save differently with stack_realign set.
1768 Thus we must flush whatever we have queued first. */
1769 dwarf2out_flush_queued_reg_saves ();
1771 gcc_assert (cur_trace
->cfa_store
.reg
1772 == dwf_regno (XEXP (src
, 0)));
1773 fde
->stack_realign
= 1;
1774 fde
->stack_realignment
= INTVAL (XEXP (src
, 1));
1775 cur_trace
->cfa_store
.offset
= 0;
1777 if (cur_cfa
->reg
!= dw_stack_pointer_regnum
1778 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1779 fde
->drap_reg
= cur_cfa
->reg
;
1790 /* Saving a register to the stack. Make sure dest is relative to the
1792 switch (GET_CODE (XEXP (dest
, 0)))
1798 /* We can't handle variable size modifications. */
1799 gcc_assert (GET_CODE (XEXP (XEXP (XEXP (dest
, 0), 1), 1))
1801 offset
= -INTVAL (XEXP (XEXP (XEXP (dest
, 0), 1), 1));
1803 gcc_assert (REGNO (XEXP (XEXP (dest
, 0), 0)) == STACK_POINTER_REGNUM
1804 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1806 cur_trace
->cfa_store
.offset
+= offset
;
1807 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1808 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1810 if (GET_CODE (XEXP (dest
, 0)) == POST_MODIFY
)
1811 offset
-= cur_trace
->cfa_store
.offset
;
1813 offset
= -cur_trace
->cfa_store
.offset
;
1820 offset
= GET_MODE_SIZE (GET_MODE (dest
));
1821 if (GET_CODE (XEXP (dest
, 0)) == PRE_INC
)
1824 gcc_assert ((REGNO (XEXP (XEXP (dest
, 0), 0))
1825 == STACK_POINTER_REGNUM
)
1826 && cur_trace
->cfa_store
.reg
== dw_stack_pointer_regnum
);
1828 cur_trace
->cfa_store
.offset
+= offset
;
1830 /* Rule 18: If stack is aligned, we will use FP as a
1831 reference to represent the address of the stored
1834 && fde
->stack_realign
1836 && REGNO (src
) == HARD_FRAME_POINTER_REGNUM
)
1838 gcc_assert (cur_cfa
->reg
!= dw_frame_pointer_regnum
);
1839 cur_trace
->cfa_store
.offset
= 0;
1842 if (cur_cfa
->reg
== dw_stack_pointer_regnum
)
1843 cur_cfa
->offset
= cur_trace
->cfa_store
.offset
;
1845 if (GET_CODE (XEXP (dest
, 0)) == POST_DEC
)
1846 offset
+= -cur_trace
->cfa_store
.offset
;
1848 offset
= -cur_trace
->cfa_store
.offset
;
1852 /* With an offset. */
1859 gcc_assert (CONST_INT_P (XEXP (XEXP (dest
, 0), 1))
1860 && REG_P (XEXP (XEXP (dest
, 0), 0)));
1861 offset
= INTVAL (XEXP (XEXP (dest
, 0), 1));
1862 if (GET_CODE (XEXP (dest
, 0)) == MINUS
)
1865 regno
= dwf_regno (XEXP (XEXP (dest
, 0), 0));
1867 if (cur_cfa
->reg
== regno
)
1868 offset
-= cur_cfa
->offset
;
1869 else if (cur_trace
->cfa_store
.reg
== regno
)
1870 offset
-= cur_trace
->cfa_store
.offset
;
1873 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1874 offset
-= cur_trace
->cfa_temp
.offset
;
1880 /* Without an offset. */
1883 unsigned int regno
= dwf_regno (XEXP (dest
, 0));
1885 if (cur_cfa
->reg
== regno
)
1886 offset
= -cur_cfa
->offset
;
1887 else if (cur_trace
->cfa_store
.reg
== regno
)
1888 offset
= -cur_trace
->cfa_store
.offset
;
1891 gcc_assert (cur_trace
->cfa_temp
.reg
== regno
);
1892 offset
= -cur_trace
->cfa_temp
.offset
;
1899 gcc_assert (cur_trace
->cfa_temp
.reg
1900 == dwf_regno (XEXP (XEXP (dest
, 0), 0)));
1901 offset
= -cur_trace
->cfa_temp
.offset
;
1902 cur_trace
->cfa_temp
.offset
-= GET_MODE_SIZE (GET_MODE (dest
));
1910 /* If the source operand of this MEM operation is a memory,
1911 we only care how much stack grew. */
1916 && REGNO (src
) != STACK_POINTER_REGNUM
1917 && REGNO (src
) != HARD_FRAME_POINTER_REGNUM
1918 && dwf_regno (src
) == cur_cfa
->reg
)
1920 /* We're storing the current CFA reg into the stack. */
1922 if (cur_cfa
->offset
== 0)
1925 /* If stack is aligned, putting CFA reg into stack means
1926 we can no longer use reg + offset to represent CFA.
1927 Here we use DW_CFA_def_cfa_expression instead. The
1928 result of this expression equals to the original CFA
1931 && fde
->stack_realign
1932 && cur_cfa
->indirect
== 0
1933 && cur_cfa
->reg
!= dw_frame_pointer_regnum
)
1935 gcc_assert (fde
->drap_reg
== cur_cfa
->reg
);
1937 cur_cfa
->indirect
= 1;
1938 cur_cfa
->reg
= dw_frame_pointer_regnum
;
1939 cur_cfa
->base_offset
= offset
;
1940 cur_cfa
->offset
= 0;
1942 fde
->drap_reg_saved
= 1;
1946 /* If the source register is exactly the CFA, assume
1947 we're saving SP like any other register; this happens
1949 queue_reg_save (stack_pointer_rtx
, NULL_RTX
, offset
);
1954 /* Otherwise, we'll need to look in the stack to
1955 calculate the CFA. */
1956 rtx x
= XEXP (dest
, 0);
1960 gcc_assert (REG_P (x
));
1962 cur_cfa
->reg
= dwf_regno (x
);
1963 cur_cfa
->base_offset
= offset
;
1964 cur_cfa
->indirect
= 1;
1970 span
= targetm
.dwarf_register_span (src
);
1975 queue_reg_save (src
, NULL_RTX
, offset
);
1978 /* We have a PARALLEL describing where the contents of SRC live.
1979 Queue register saves for each piece of the PARALLEL. */
1980 HOST_WIDE_INT span_offset
= offset
;
1982 gcc_assert (GET_CODE (span
) == PARALLEL
);
1984 const int par_len
= XVECLEN (span
, 0);
1985 for (int par_index
= 0; par_index
< par_len
; par_index
++)
1987 rtx elem
= XVECEXP (span
, 0, par_index
);
1988 queue_reg_save (elem
, NULL_RTX
, span_offset
);
1989 span_offset
+= GET_MODE_SIZE (GET_MODE (elem
));
1999 /* Record call frame debugging information for INSN, which either sets
2000 SP or FP (adjusting how we calculate the frame address) or saves a
2001 register to the stack. */
2004 dwarf2out_frame_debug (rtx_insn
*insn
)
2007 bool handled_one
= false;
2009 for (note
= REG_NOTES (insn
); note
; note
= XEXP (note
, 1))
2010 switch (REG_NOTE_KIND (note
))
2012 case REG_FRAME_RELATED_EXPR
:
2013 pat
= XEXP (note
, 0);
2016 case REG_CFA_DEF_CFA
:
2017 dwarf2out_frame_debug_def_cfa (XEXP (note
, 0));
2021 case REG_CFA_ADJUST_CFA
:
2026 if (GET_CODE (n
) == PARALLEL
)
2027 n
= XVECEXP (n
, 0, 0);
2029 dwarf2out_frame_debug_adjust_cfa (n
);
2033 case REG_CFA_OFFSET
:
2036 n
= single_set (insn
);
2037 dwarf2out_frame_debug_cfa_offset (n
);
2041 case REG_CFA_REGISTER
:
2046 if (GET_CODE (n
) == PARALLEL
)
2047 n
= XVECEXP (n
, 0, 0);
2049 dwarf2out_frame_debug_cfa_register (n
);
2053 case REG_CFA_EXPRESSION
:
2056 n
= single_set (insn
);
2057 dwarf2out_frame_debug_cfa_expression (n
);
2061 case REG_CFA_RESTORE
:
2066 if (GET_CODE (n
) == PARALLEL
)
2067 n
= XVECEXP (n
, 0, 0);
2070 dwarf2out_frame_debug_cfa_restore (n
);
2074 case REG_CFA_SET_VDRAP
:
2078 dw_fde_ref fde
= cfun
->fde
;
2081 gcc_assert (fde
->vdrap_reg
== INVALID_REGNUM
);
2083 fde
->vdrap_reg
= dwf_regno (n
);
2089 case REG_CFA_WINDOW_SAVE
:
2090 dwarf2out_frame_debug_cfa_window_save ();
2094 case REG_CFA_FLUSH_QUEUE
:
2095 /* The actual flush happens elsewhere. */
2105 pat
= PATTERN (insn
);
2107 dwarf2out_frame_debug_expr (pat
);
2109 /* Check again. A parallel can save and update the same register.
2110 We could probably check just once, here, but this is safer than
2111 removing the check at the start of the function. */
2112 if (clobbers_queued_reg_save (pat
))
2113 dwarf2out_flush_queued_reg_saves ();
2117 /* Emit CFI info to change the state from OLD_ROW to NEW_ROW. */
2120 change_cfi_row (dw_cfi_row
*old_row
, dw_cfi_row
*new_row
)
2122 size_t i
, n_old
, n_new
, n_max
;
2125 if (new_row
->cfa_cfi
&& !cfi_equal_p (old_row
->cfa_cfi
, new_row
->cfa_cfi
))
2126 add_cfi (new_row
->cfa_cfi
);
2129 cfi
= def_cfa_0 (&old_row
->cfa
, &new_row
->cfa
);
2134 n_old
= vec_safe_length (old_row
->reg_save
);
2135 n_new
= vec_safe_length (new_row
->reg_save
);
2136 n_max
= MAX (n_old
, n_new
);
2138 for (i
= 0; i
< n_max
; ++i
)
2140 dw_cfi_ref r_old
= NULL
, r_new
= NULL
;
2143 r_old
= (*old_row
->reg_save
)[i
];
2145 r_new
= (*new_row
->reg_save
)[i
];
2149 else if (r_new
== NULL
)
2150 add_cfi_restore (i
);
2151 else if (!cfi_equal_p (r_old
, r_new
))
2156 /* Examine CFI and return true if a cfi label and set_loc is needed
2157 beforehand. Even when generating CFI assembler instructions, we
2158 still have to add the cfi to the list so that lookup_cfa_1 works
2159 later on. When -g2 and above we even need to force emitting of
2160 CFI labels and add to list a DW_CFA_set_loc for convert_cfa_to_fb_loc_list
2161 purposes. If we're generating DWARF3 output we use DW_OP_call_frame_cfa
2162 and so don't use convert_cfa_to_fb_loc_list. */
2165 cfi_label_required_p (dw_cfi_ref cfi
)
2167 if (!dwarf2out_do_cfi_asm ())
2170 if (dwarf_version
== 2
2171 && debug_info_level
> DINFO_LEVEL_TERSE
2172 && (write_symbols
== DWARF2_DEBUG
2173 || write_symbols
== VMS_AND_DWARF2_DEBUG
))
2175 switch (cfi
->dw_cfi_opc
)
2177 case DW_CFA_def_cfa_offset
:
2178 case DW_CFA_def_cfa_offset_sf
:
2179 case DW_CFA_def_cfa_register
:
2180 case DW_CFA_def_cfa
:
2181 case DW_CFA_def_cfa_sf
:
2182 case DW_CFA_def_cfa_expression
:
2183 case DW_CFA_restore_state
:
2192 /* Walk the function, looking for NOTE_INSN_CFI notes. Add the CFIs to the
2193 function's FDE, adding CFI labels and set_loc/advance_loc opcodes as
2196 add_cfis_to_fde (void)
2198 dw_fde_ref fde
= cfun
->fde
;
2199 rtx_insn
*insn
, *next
;
2200 /* We always start with a function_begin label. */
2203 for (insn
= get_insns (); insn
; insn
= next
)
2205 next
= NEXT_INSN (insn
);
2207 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2209 fde
->dw_fde_switch_cfi_index
= vec_safe_length (fde
->dw_fde_cfi
);
2210 /* Don't attempt to advance_loc4 between labels
2211 in different sections. */
2215 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2217 bool required
= cfi_label_required_p (NOTE_CFI (insn
));
2219 if (NOTE_P (next
) && NOTE_KIND (next
) == NOTE_INSN_CFI
)
2221 required
|= cfi_label_required_p (NOTE_CFI (next
));
2222 next
= NEXT_INSN (next
);
2224 else if (active_insn_p (next
)
2225 || (NOTE_P (next
) && (NOTE_KIND (next
)
2226 == NOTE_INSN_SWITCH_TEXT_SECTIONS
)))
2229 next
= NEXT_INSN (next
);
2232 int num
= dwarf2out_cfi_label_num
;
2233 const char *label
= dwarf2out_cfi_label ();
2236 /* Set the location counter to the new label. */
2238 xcfi
->dw_cfi_opc
= (first
? DW_CFA_set_loc
2239 : DW_CFA_advance_loc4
);
2240 xcfi
->dw_cfi_oprnd1
.dw_cfi_addr
= label
;
2241 vec_safe_push (fde
->dw_fde_cfi
, xcfi
);
2243 rtx_note
*tmp
= emit_note_before (NOTE_INSN_CFI_LABEL
, insn
);
2244 NOTE_LABEL_NUMBER (tmp
) = num
;
2249 if (NOTE_P (insn
) && NOTE_KIND (insn
) == NOTE_INSN_CFI
)
2250 vec_safe_push (fde
->dw_fde_cfi
, NOTE_CFI (insn
));
2251 insn
= NEXT_INSN (insn
);
2253 while (insn
!= next
);
2259 /* If LABEL is the start of a trace, then initialize the state of that
2260 trace from CUR_TRACE and CUR_ROW. */
2263 maybe_record_trace_start (rtx_insn
*start
, rtx_insn
*origin
)
2266 HOST_WIDE_INT args_size
;
2268 ti
= get_trace_info (start
);
2269 gcc_assert (ti
!= NULL
);
2273 fprintf (dump_file
, " saw edge from trace %u to %u (via %s %d)\n",
2274 cur_trace
->id
, ti
->id
,
2275 (origin
? rtx_name
[(int) GET_CODE (origin
)] : "fallthru"),
2276 (origin
? INSN_UID (origin
) : 0));
2279 args_size
= cur_trace
->end_true_args_size
;
2280 if (ti
->beg_row
== NULL
)
2282 /* This is the first time we've encountered this trace. Propagate
2283 state across the edge and push the trace onto the work list. */
2284 ti
->beg_row
= copy_cfi_row (cur_row
);
2285 ti
->beg_true_args_size
= args_size
;
2287 ti
->cfa_store
= cur_trace
->cfa_store
;
2288 ti
->cfa_temp
= cur_trace
->cfa_temp
;
2289 ti
->regs_saved_in_regs
= cur_trace
->regs_saved_in_regs
.copy ();
2291 trace_work_list
.safe_push (ti
);
2294 fprintf (dump_file
, "\tpush trace %u to worklist\n", ti
->id
);
2299 /* We ought to have the same state incoming to a given trace no
2300 matter how we arrive at the trace. Anything else means we've
2301 got some kind of optimization error. */
2302 gcc_checking_assert (cfi_row_equal_p (cur_row
, ti
->beg_row
));
2304 /* The args_size is allowed to conflict if it isn't actually used. */
2305 if (ti
->beg_true_args_size
!= args_size
)
2306 ti
->args_size_undefined
= true;
2310 /* Similarly, but handle the args_size and CFA reset across EH
2311 and non-local goto edges. */
2314 maybe_record_trace_start_abnormal (rtx_insn
*start
, rtx_insn
*origin
)
2316 HOST_WIDE_INT save_args_size
, delta
;
2317 dw_cfa_location save_cfa
;
2319 save_args_size
= cur_trace
->end_true_args_size
;
2320 if (save_args_size
== 0)
2322 maybe_record_trace_start (start
, origin
);
2326 delta
= -save_args_size
;
2327 cur_trace
->end_true_args_size
= 0;
2329 save_cfa
= cur_row
->cfa
;
2330 if (cur_row
->cfa
.reg
== dw_stack_pointer_regnum
)
2332 /* Convert a change in args_size (always a positive in the
2333 direction of stack growth) to a change in stack pointer. */
2334 if (!STACK_GROWS_DOWNWARD
)
2337 cur_row
->cfa
.offset
+= delta
;
2340 maybe_record_trace_start (start
, origin
);
2342 cur_trace
->end_true_args_size
= save_args_size
;
2343 cur_row
->cfa
= save_cfa
;
2346 /* Propagate CUR_TRACE state to the destinations implied by INSN. */
2347 /* ??? Sadly, this is in large part a duplicate of make_edges. */
2350 create_trace_edges (rtx_insn
*insn
)
2357 rtx_jump_table_data
*table
;
2359 if (find_reg_note (insn
, REG_NON_LOCAL_GOTO
, NULL_RTX
))
2362 if (tablejump_p (insn
, NULL
, &table
))
2364 rtvec vec
= table
->get_labels ();
2366 n
= GET_NUM_ELEM (vec
);
2367 for (i
= 0; i
< n
; ++i
)
2369 rtx_insn
*lab
= as_a
<rtx_insn
*> (XEXP (RTVEC_ELT (vec
, i
), 0));
2370 maybe_record_trace_start (lab
, insn
);
2373 else if (computed_jump_p (insn
))
2375 for (rtx_insn_list
*lab
= forced_labels
; lab
; lab
= lab
->next ())
2376 maybe_record_trace_start (lab
->insn (), insn
);
2378 else if (returnjump_p (insn
))
2380 else if ((tmp
= extract_asm_operands (PATTERN (insn
))) != NULL
)
2382 n
= ASM_OPERANDS_LABEL_LENGTH (tmp
);
2383 for (i
= 0; i
< n
; ++i
)
2386 as_a
<rtx_insn
*> (XEXP (ASM_OPERANDS_LABEL (tmp
, i
), 0));
2387 maybe_record_trace_start (lab
, insn
);
2392 rtx_insn
*lab
= JUMP_LABEL_AS_INSN (insn
);
2393 gcc_assert (lab
!= NULL
);
2394 maybe_record_trace_start (lab
, insn
);
2397 else if (CALL_P (insn
))
2399 /* Sibling calls don't have edges inside this function. */
2400 if (SIBLING_CALL_P (insn
))
2403 /* Process non-local goto edges. */
2404 if (can_nonlocal_goto (insn
))
2405 for (rtx_insn_list
*lab
= nonlocal_goto_handler_labels
;
2408 maybe_record_trace_start_abnormal (lab
->insn (), insn
);
2410 else if (rtx_sequence
*seq
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2412 int i
, n
= seq
->len ();
2413 for (i
= 0; i
< n
; ++i
)
2414 create_trace_edges (seq
->insn (i
));
2418 /* Process EH edges. */
2419 if (CALL_P (insn
) || cfun
->can_throw_non_call_exceptions
)
2421 eh_landing_pad lp
= get_eh_landing_pad_from_rtx (insn
);
2423 maybe_record_trace_start_abnormal (lp
->landing_pad
, insn
);
2427 /* A subroutine of scan_trace. Do what needs to be done "after" INSN. */
2430 scan_insn_after (rtx_insn
*insn
)
2432 if (RTX_FRAME_RELATED_P (insn
))
2433 dwarf2out_frame_debug (insn
);
2434 notice_args_size (insn
);
2437 /* Scan the trace beginning at INSN and create the CFI notes for the
2438 instructions therein. */
2441 scan_trace (dw_trace_info
*trace
)
2443 rtx_insn
*prev
, *insn
= trace
->head
;
2444 dw_cfa_location this_cfa
;
2447 fprintf (dump_file
, "Processing trace %u : start at %s %d\n",
2448 trace
->id
, rtx_name
[(int) GET_CODE (insn
)],
2451 trace
->end_row
= copy_cfi_row (trace
->beg_row
);
2452 trace
->end_true_args_size
= trace
->beg_true_args_size
;
2455 cur_row
= trace
->end_row
;
2457 this_cfa
= cur_row
->cfa
;
2458 cur_cfa
= &this_cfa
;
2460 for (prev
= insn
, insn
= NEXT_INSN (insn
);
2462 prev
= insn
, insn
= NEXT_INSN (insn
))
2466 /* Do everything that happens "before" the insn. */
2467 add_cfi_insn
= prev
;
2469 /* Notice the end of a trace. */
2470 if (BARRIER_P (insn
))
2472 /* Don't bother saving the unneeded queued registers at all. */
2473 queued_reg_saves
.truncate (0);
2476 if (save_point_p (insn
))
2478 /* Propagate across fallthru edges. */
2479 dwarf2out_flush_queued_reg_saves ();
2480 maybe_record_trace_start (insn
, NULL
);
2484 if (DEBUG_INSN_P (insn
) || !inside_basic_block_p (insn
))
2487 /* Handle all changes to the row state. Sequences require special
2488 handling for the positioning of the notes. */
2489 if (rtx_sequence
*pat
= dyn_cast
<rtx_sequence
*> (PATTERN (insn
)))
2492 int i
, n
= pat
->len ();
2494 control
= pat
->insn (0);
2495 if (can_throw_internal (control
))
2496 notice_eh_throw (control
);
2497 dwarf2out_flush_queued_reg_saves ();
2499 if (JUMP_P (control
) && INSN_ANNULLED_BRANCH_P (control
))
2501 /* ??? Hopefully multiple delay slots are not annulled. */
2502 gcc_assert (n
== 2);
2503 gcc_assert (!RTX_FRAME_RELATED_P (control
));
2504 gcc_assert (!find_reg_note (control
, REG_ARGS_SIZE
, NULL
));
2506 elt
= pat
->insn (1);
2508 if (INSN_FROM_TARGET_P (elt
))
2510 HOST_WIDE_INT restore_args_size
;
2511 cfi_vec save_row_reg_save
;
2513 /* If ELT is an instruction from target of an annulled
2514 branch, the effects are for the target only and so
2515 the args_size and CFA along the current path
2516 shouldn't change. */
2517 add_cfi_insn
= NULL
;
2518 restore_args_size
= cur_trace
->end_true_args_size
;
2519 cur_cfa
= &cur_row
->cfa
;
2520 save_row_reg_save
= vec_safe_copy (cur_row
->reg_save
);
2522 scan_insn_after (elt
);
2524 /* ??? Should we instead save the entire row state? */
2525 gcc_assert (!queued_reg_saves
.length ());
2527 create_trace_edges (control
);
2529 cur_trace
->end_true_args_size
= restore_args_size
;
2530 cur_row
->cfa
= this_cfa
;
2531 cur_row
->reg_save
= save_row_reg_save
;
2532 cur_cfa
= &this_cfa
;
2536 /* If ELT is a annulled branch-taken instruction (i.e.
2537 executed only when branch is not taken), the args_size
2538 and CFA should not change through the jump. */
2539 create_trace_edges (control
);
2541 /* Update and continue with the trace. */
2542 add_cfi_insn
= insn
;
2543 scan_insn_after (elt
);
2544 def_cfa_1 (&this_cfa
);
2549 /* The insns in the delay slot should all be considered to happen
2550 "before" a call insn. Consider a call with a stack pointer
2551 adjustment in the delay slot. The backtrace from the callee
2552 should include the sp adjustment. Unfortunately, that leaves
2553 us with an unavoidable unwinding error exactly at the call insn
2554 itself. For jump insns we'd prefer to avoid this error by
2555 placing the notes after the sequence. */
2556 if (JUMP_P (control
))
2557 add_cfi_insn
= insn
;
2559 for (i
= 1; i
< n
; ++i
)
2561 elt
= pat
->insn (i
);
2562 scan_insn_after (elt
);
2565 /* Make sure any register saves are visible at the jump target. */
2566 dwarf2out_flush_queued_reg_saves ();
2567 any_cfis_emitted
= false;
2569 /* However, if there is some adjustment on the call itself, e.g.
2570 a call_pop, that action should be considered to happen after
2571 the call returns. */
2572 add_cfi_insn
= insn
;
2573 scan_insn_after (control
);
2577 /* Flush data before calls and jumps, and of course if necessary. */
2578 if (can_throw_internal (insn
))
2580 notice_eh_throw (insn
);
2581 dwarf2out_flush_queued_reg_saves ();
2583 else if (!NONJUMP_INSN_P (insn
)
2584 || clobbers_queued_reg_save (insn
)
2585 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2586 dwarf2out_flush_queued_reg_saves ();
2587 any_cfis_emitted
= false;
2589 add_cfi_insn
= insn
;
2590 scan_insn_after (insn
);
2594 /* Between frame-related-p and args_size we might have otherwise
2595 emitted two cfa adjustments. Do it now. */
2596 def_cfa_1 (&this_cfa
);
2598 /* Minimize the number of advances by emitting the entire queue
2599 once anything is emitted. */
2600 if (any_cfis_emitted
2601 || find_reg_note (insn
, REG_CFA_FLUSH_QUEUE
, NULL
))
2602 dwarf2out_flush_queued_reg_saves ();
2604 /* Note that a test for control_flow_insn_p does exactly the
2605 same tests as are done to actually create the edges. So
2606 always call the routine and let it not create edges for
2607 non-control-flow insns. */
2608 create_trace_edges (control
);
2611 add_cfi_insn
= NULL
;
2617 /* Scan the function and create the initial set of CFI notes. */
2620 create_cfi_notes (void)
2624 gcc_checking_assert (!queued_reg_saves
.exists ());
2625 gcc_checking_assert (!trace_work_list
.exists ());
2627 /* Always begin at the entry trace. */
2628 ti
= &trace_info
[0];
2631 while (!trace_work_list
.is_empty ())
2633 ti
= trace_work_list
.pop ();
2637 queued_reg_saves
.release ();
2638 trace_work_list
.release ();
2641 /* Return the insn before the first NOTE_INSN_CFI after START. */
2644 before_next_cfi_note (rtx_insn
*start
)
2646 rtx_insn
*prev
= start
;
2649 if (NOTE_P (start
) && NOTE_KIND (start
) == NOTE_INSN_CFI
)
2652 start
= NEXT_INSN (start
);
2657 /* Insert CFI notes between traces to properly change state between them. */
2660 connect_traces (void)
2662 unsigned i
, n
= trace_info
.length ();
2663 dw_trace_info
*prev_ti
, *ti
;
2665 /* ??? Ideally, we should have both queued and processed every trace.
2666 However the current representation of constant pools on various targets
2667 is indistinguishable from unreachable code. Assume for the moment that
2668 we can simply skip over such traces. */
2669 /* ??? Consider creating a DATA_INSN rtx code to indicate that
2670 these are not "real" instructions, and should not be considered.
2671 This could be generically useful for tablejump data as well. */
2672 /* Remove all unprocessed traces from the list. */
2673 for (i
= n
- 1; i
> 0; --i
)
2675 ti
= &trace_info
[i
];
2676 if (ti
->beg_row
== NULL
)
2678 trace_info
.ordered_remove (i
);
2682 gcc_assert (ti
->end_row
!= NULL
);
2685 /* Work from the end back to the beginning. This lets us easily insert
2686 remember/restore_state notes in the correct order wrt other notes. */
2687 prev_ti
= &trace_info
[n
- 1];
2688 for (i
= n
- 1; i
> 0; --i
)
2690 dw_cfi_row
*old_row
;
2693 prev_ti
= &trace_info
[i
- 1];
2695 add_cfi_insn
= ti
->head
;
2697 /* In dwarf2out_switch_text_section, we'll begin a new FDE
2698 for the portion of the function in the alternate text
2699 section. The row state at the very beginning of that
2700 new FDE will be exactly the row state from the CIE. */
2701 if (ti
->switch_sections
)
2702 old_row
= cie_cfi_row
;
2705 old_row
= prev_ti
->end_row
;
2706 /* If there's no change from the previous end state, fine. */
2707 if (cfi_row_equal_p (old_row
, ti
->beg_row
))
2709 /* Otherwise check for the common case of sharing state with
2710 the beginning of an epilogue, but not the end. Insert
2711 remember/restore opcodes in that case. */
2712 else if (cfi_row_equal_p (prev_ti
->beg_row
, ti
->beg_row
))
2716 /* Note that if we blindly insert the remember at the
2717 start of the trace, we can wind up increasing the
2718 size of the unwind info due to extra advance opcodes.
2719 Instead, put the remember immediately before the next
2720 state change. We know there must be one, because the
2721 state at the beginning and head of the trace differ. */
2722 add_cfi_insn
= before_next_cfi_note (prev_ti
->head
);
2724 cfi
->dw_cfi_opc
= DW_CFA_remember_state
;
2727 add_cfi_insn
= ti
->head
;
2729 cfi
->dw_cfi_opc
= DW_CFA_restore_state
;
2732 old_row
= prev_ti
->beg_row
;
2734 /* Otherwise, we'll simply change state from the previous end. */
2737 change_cfi_row (old_row
, ti
->beg_row
);
2739 if (dump_file
&& add_cfi_insn
!= ti
->head
)
2743 fprintf (dump_file
, "Fixup between trace %u and %u:\n",
2744 prev_ti
->id
, ti
->id
);
2749 note
= NEXT_INSN (note
);
2750 gcc_assert (NOTE_P (note
) && NOTE_KIND (note
) == NOTE_INSN_CFI
);
2751 output_cfi_directive (dump_file
, NOTE_CFI (note
));
2753 while (note
!= add_cfi_insn
);
2757 /* Connect args_size between traces that have can_throw_internal insns. */
2758 if (cfun
->eh
->lp_array
)
2760 HOST_WIDE_INT prev_args_size
= 0;
2762 for (i
= 0; i
< n
; ++i
)
2764 ti
= &trace_info
[i
];
2766 if (ti
->switch_sections
)
2768 if (ti
->eh_head
== NULL
)
2770 gcc_assert (!ti
->args_size_undefined
);
2772 if (ti
->beg_delay_args_size
!= prev_args_size
)
2774 /* ??? Search back to previous CFI note. */
2775 add_cfi_insn
= PREV_INSN (ti
->eh_head
);
2776 add_cfi_args_size (ti
->beg_delay_args_size
);
2779 prev_args_size
= ti
->end_delay_args_size
;
2784 /* Set up the pseudo-cfg of instruction traces, as described at the
2785 block comment at the top of the file. */
2788 create_pseudo_cfg (void)
2790 bool saw_barrier
, switch_sections
;
2795 /* The first trace begins at the start of the function,
2796 and begins with the CIE row state. */
2797 trace_info
.create (16);
2798 memset (&ti
, 0, sizeof (ti
));
2799 ti
.head
= get_insns ();
2800 ti
.beg_row
= cie_cfi_row
;
2801 ti
.cfa_store
= cie_cfi_row
->cfa
;
2802 ti
.cfa_temp
.reg
= INVALID_REGNUM
;
2803 trace_info
.quick_push (ti
);
2805 if (cie_return_save
)
2806 ti
.regs_saved_in_regs
.safe_push (*cie_return_save
);
2808 /* Walk all the insns, collecting start of trace locations. */
2809 saw_barrier
= false;
2810 switch_sections
= false;
2811 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2813 if (BARRIER_P (insn
))
2815 else if (NOTE_P (insn
)
2816 && NOTE_KIND (insn
) == NOTE_INSN_SWITCH_TEXT_SECTIONS
)
2818 /* We should have just seen a barrier. */
2819 gcc_assert (saw_barrier
);
2820 switch_sections
= true;
2822 /* Watch out for save_point notes between basic blocks.
2823 In particular, a note after a barrier. Do not record these,
2824 delaying trace creation until the label. */
2825 else if (save_point_p (insn
)
2826 && (LABEL_P (insn
) || !saw_barrier
))
2828 memset (&ti
, 0, sizeof (ti
));
2830 ti
.switch_sections
= switch_sections
;
2831 ti
.id
= trace_info
.length ();
2832 trace_info
.safe_push (ti
);
2834 saw_barrier
= false;
2835 switch_sections
= false;
2839 /* Create the trace index after we've finished building trace_info,
2840 avoiding stale pointer problems due to reallocation. */
2842 = new hash_table
<trace_info_hasher
> (trace_info
.length ());
2844 FOR_EACH_VEC_ELT (trace_info
, i
, tp
)
2846 dw_trace_info
**slot
;
2849 fprintf (dump_file
, "Creating trace %u : start at %s %d%s\n", tp
->id
,
2850 rtx_name
[(int) GET_CODE (tp
->head
)], INSN_UID (tp
->head
),
2851 tp
->switch_sections
? " (section switch)" : "");
2853 slot
= trace_index
->find_slot_with_hash (tp
, INSN_UID (tp
->head
), INSERT
);
2854 gcc_assert (*slot
== NULL
);
2859 /* Record the initial position of the return address. RTL is
2860 INCOMING_RETURN_ADDR_RTX. */
2863 initial_return_save (rtx rtl
)
2865 unsigned int reg
= INVALID_REGNUM
;
2866 HOST_WIDE_INT offset
= 0;
2868 switch (GET_CODE (rtl
))
2871 /* RA is in a register. */
2872 reg
= dwf_regno (rtl
);
2876 /* RA is on the stack. */
2877 rtl
= XEXP (rtl
, 0);
2878 switch (GET_CODE (rtl
))
2881 gcc_assert (REGNO (rtl
) == STACK_POINTER_REGNUM
);
2886 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2887 offset
= INTVAL (XEXP (rtl
, 1));
2891 gcc_assert (REGNO (XEXP (rtl
, 0)) == STACK_POINTER_REGNUM
);
2892 offset
= -INTVAL (XEXP (rtl
, 1));
2902 /* The return address is at some offset from any value we can
2903 actually load. For instance, on the SPARC it is in %i7+8. Just
2904 ignore the offset for now; it doesn't matter for unwinding frames. */
2905 gcc_assert (CONST_INT_P (XEXP (rtl
, 1)));
2906 initial_return_save (XEXP (rtl
, 0));
2913 if (reg
!= DWARF_FRAME_RETURN_COLUMN
)
2915 if (reg
!= INVALID_REGNUM
)
2916 record_reg_saved_in_reg (rtl
, pc_rtx
);
2917 reg_save (DWARF_FRAME_RETURN_COLUMN
, reg
, offset
- cur_row
->cfa
.offset
);
2922 create_cie_data (void)
2924 dw_cfa_location loc
;
2925 dw_trace_info cie_trace
;
2927 dw_stack_pointer_regnum
= DWARF_FRAME_REGNUM (STACK_POINTER_REGNUM
);
2929 memset (&cie_trace
, 0, sizeof (cie_trace
));
2930 cur_trace
= &cie_trace
;
2932 add_cfi_vec
= &cie_cfi_vec
;
2933 cie_cfi_row
= cur_row
= new_cfi_row ();
2935 /* On entry, the Canonical Frame Address is at SP. */
2936 memset (&loc
, 0, sizeof (loc
));
2937 loc
.reg
= dw_stack_pointer_regnum
;
2938 loc
.offset
= INCOMING_FRAME_SP_OFFSET
;
2941 if (targetm
.debug_unwind_info () == UI_DWARF2
2942 || targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
2944 initial_return_save (INCOMING_RETURN_ADDR_RTX
);
2946 /* For a few targets, we have the return address incoming into a
2947 register, but choose a different return column. This will result
2948 in a DW_CFA_register for the return, and an entry in
2949 regs_saved_in_regs to match. If the target later stores that
2950 return address register to the stack, we want to be able to emit
2951 the DW_CFA_offset against the return column, not the intermediate
2952 save register. Save the contents of regs_saved_in_regs so that
2953 we can re-initialize it at the start of each function. */
2954 switch (cie_trace
.regs_saved_in_regs
.length ())
2959 cie_return_save
= ggc_alloc
<reg_saved_in_data
> ();
2960 *cie_return_save
= cie_trace
.regs_saved_in_regs
[0];
2961 cie_trace
.regs_saved_in_regs
.release ();
2973 /* Annotate the function with NOTE_INSN_CFI notes to record the CFI
2974 state at each location within the function. These notes will be
2975 emitted during pass_final. */
2978 execute_dwarf2_frame (void)
2980 /* Different HARD_FRAME_POINTER_REGNUM might coexist in the same file. */
2981 dw_frame_pointer_regnum
= DWARF_FRAME_REGNUM (HARD_FRAME_POINTER_REGNUM
);
2983 /* The first time we're called, compute the incoming frame state. */
2984 if (cie_cfi_vec
== NULL
)
2987 dwarf2out_alloc_current_fde ();
2989 create_pseudo_cfg ();
2992 create_cfi_notes ();
2996 /* Free all the data we allocated. */
3001 FOR_EACH_VEC_ELT (trace_info
, i
, ti
)
3002 ti
->regs_saved_in_regs
.release ();
3004 trace_info
.release ();
3012 /* Convert a DWARF call frame info. operation to its string name */
3015 dwarf_cfi_name (unsigned int cfi_opc
)
3017 const char *name
= get_DW_CFA_name (cfi_opc
);
3022 return "DW_CFA_<unknown>";
3025 /* This routine will generate the correct assembly data for a location
3026 description based on a cfi entry with a complex address. */
3029 output_cfa_loc (dw_cfi_ref cfi
, int for_eh
)
3031 dw_loc_descr_ref loc
;
3034 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3037 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3038 dw2_asm_output_data (1, r
, NULL
);
3039 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3042 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3044 /* Output the size of the block. */
3045 size
= size_of_locs (loc
);
3046 dw2_asm_output_data_uleb128 (size
, NULL
);
3048 /* Now output the operations themselves. */
3049 output_loc_sequence (loc
, for_eh
);
3052 /* Similar, but used for .cfi_escape. */
3055 output_cfa_loc_raw (dw_cfi_ref cfi
)
3057 dw_loc_descr_ref loc
;
3060 if (cfi
->dw_cfi_opc
== DW_CFA_expression
)
3063 DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3064 fprintf (asm_out_file
, "%#x,", r
);
3065 loc
= cfi
->dw_cfi_oprnd2
.dw_cfi_loc
;
3068 loc
= cfi
->dw_cfi_oprnd1
.dw_cfi_loc
;
3070 /* Output the size of the block. */
3071 size
= size_of_locs (loc
);
3072 dw2_asm_output_data_uleb128_raw (size
);
3073 fputc (',', asm_out_file
);
3075 /* Now output the operations themselves. */
3076 output_loc_sequence_raw (loc
);
3079 /* Output a Call Frame Information opcode and its operand(s). */
3082 output_cfi (dw_cfi_ref cfi
, dw_fde_ref fde
, int for_eh
)
3087 if (cfi
->dw_cfi_opc
== DW_CFA_advance_loc
)
3088 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
3089 | (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
& 0x3f)),
3090 "DW_CFA_advance_loc " HOST_WIDE_INT_PRINT_HEX
,
3091 ((unsigned HOST_WIDE_INT
)
3092 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
));
3093 else if (cfi
->dw_cfi_opc
== DW_CFA_offset
)
3095 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3096 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3097 "DW_CFA_offset, column %#lx", r
);
3098 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3099 dw2_asm_output_data_uleb128 (off
, NULL
);
3101 else if (cfi
->dw_cfi_opc
== DW_CFA_restore
)
3103 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3104 dw2_asm_output_data (1, (cfi
->dw_cfi_opc
| (r
& 0x3f)),
3105 "DW_CFA_restore, column %#lx", r
);
3109 dw2_asm_output_data (1, cfi
->dw_cfi_opc
,
3110 "%s", dwarf_cfi_name (cfi
->dw_cfi_opc
));
3112 switch (cfi
->dw_cfi_opc
)
3114 case DW_CFA_set_loc
:
3116 dw2_asm_output_encoded_addr_rtx (
3117 ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/1, /*global=*/0),
3118 gen_rtx_SYMBOL_REF (Pmode
, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
),
3121 dw2_asm_output_addr (DWARF2_ADDR_SIZE
,
3122 cfi
->dw_cfi_oprnd1
.dw_cfi_addr
, NULL
);
3123 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3126 case DW_CFA_advance_loc1
:
3127 dw2_asm_output_delta (1, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3128 fde
->dw_fde_current_label
, NULL
);
3129 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3132 case DW_CFA_advance_loc2
:
3133 dw2_asm_output_delta (2, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3134 fde
->dw_fde_current_label
, NULL
);
3135 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3138 case DW_CFA_advance_loc4
:
3139 dw2_asm_output_delta (4, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3140 fde
->dw_fde_current_label
, NULL
);
3141 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3144 case DW_CFA_MIPS_advance_loc8
:
3145 dw2_asm_output_delta (8, cfi
->dw_cfi_oprnd1
.dw_cfi_addr
,
3146 fde
->dw_fde_current_label
, NULL
);
3147 fde
->dw_fde_current_label
= cfi
->dw_cfi_oprnd1
.dw_cfi_addr
;
3150 case DW_CFA_offset_extended
:
3151 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3152 dw2_asm_output_data_uleb128 (r
, NULL
);
3153 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3154 dw2_asm_output_data_uleb128 (off
, NULL
);
3157 case DW_CFA_def_cfa
:
3158 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3159 dw2_asm_output_data_uleb128 (r
, NULL
);
3160 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
, NULL
);
3163 case DW_CFA_offset_extended_sf
:
3164 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3165 dw2_asm_output_data_uleb128 (r
, NULL
);
3166 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3167 dw2_asm_output_data_sleb128 (off
, NULL
);
3170 case DW_CFA_def_cfa_sf
:
3171 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3172 dw2_asm_output_data_uleb128 (r
, NULL
);
3173 off
= div_data_align (cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3174 dw2_asm_output_data_sleb128 (off
, NULL
);
3177 case DW_CFA_restore_extended
:
3178 case DW_CFA_undefined
:
3179 case DW_CFA_same_value
:
3180 case DW_CFA_def_cfa_register
:
3181 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3182 dw2_asm_output_data_uleb128 (r
, NULL
);
3185 case DW_CFA_register
:
3186 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, for_eh
);
3187 dw2_asm_output_data_uleb128 (r
, NULL
);
3188 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, for_eh
);
3189 dw2_asm_output_data_uleb128 (r
, NULL
);
3192 case DW_CFA_def_cfa_offset
:
3193 case DW_CFA_GNU_args_size
:
3194 dw2_asm_output_data_uleb128 (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
, NULL
);
3197 case DW_CFA_def_cfa_offset_sf
:
3198 off
= div_data_align (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3199 dw2_asm_output_data_sleb128 (off
, NULL
);
3202 case DW_CFA_GNU_window_save
:
3205 case DW_CFA_def_cfa_expression
:
3206 case DW_CFA_expression
:
3207 output_cfa_loc (cfi
, for_eh
);
3210 case DW_CFA_GNU_negative_offset_extended
:
3211 /* Obsoleted by DW_CFA_offset_extended_sf. */
3220 /* Similar, but do it via assembler directives instead. */
3223 output_cfi_directive (FILE *f
, dw_cfi_ref cfi
)
3225 unsigned long r
, r2
;
3227 switch (cfi
->dw_cfi_opc
)
3229 case DW_CFA_advance_loc
:
3230 case DW_CFA_advance_loc1
:
3231 case DW_CFA_advance_loc2
:
3232 case DW_CFA_advance_loc4
:
3233 case DW_CFA_MIPS_advance_loc8
:
3234 case DW_CFA_set_loc
:
3235 /* Should only be created in a code path not followed when emitting
3236 via directives. The assembler is going to take care of this for
3237 us. But this routines is also used for debugging dumps, so
3239 gcc_assert (f
!= asm_out_file
);
3240 fprintf (f
, "\t.cfi_advance_loc\n");
3244 case DW_CFA_offset_extended
:
3245 case DW_CFA_offset_extended_sf
:
3246 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3247 fprintf (f
, "\t.cfi_offset %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3248 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3251 case DW_CFA_restore
:
3252 case DW_CFA_restore_extended
:
3253 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3254 fprintf (f
, "\t.cfi_restore %lu\n", r
);
3257 case DW_CFA_undefined
:
3258 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3259 fprintf (f
, "\t.cfi_undefined %lu\n", r
);
3262 case DW_CFA_same_value
:
3263 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3264 fprintf (f
, "\t.cfi_same_value %lu\n", r
);
3267 case DW_CFA_def_cfa
:
3268 case DW_CFA_def_cfa_sf
:
3269 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3270 fprintf (f
, "\t.cfi_def_cfa %lu, " HOST_WIDE_INT_PRINT_DEC
"\n",
3271 r
, cfi
->dw_cfi_oprnd2
.dw_cfi_offset
);
3274 case DW_CFA_def_cfa_register
:
3275 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3276 fprintf (f
, "\t.cfi_def_cfa_register %lu\n", r
);
3279 case DW_CFA_register
:
3280 r
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd1
.dw_cfi_reg_num
, 1);
3281 r2
= DWARF2_FRAME_REG_OUT (cfi
->dw_cfi_oprnd2
.dw_cfi_reg_num
, 1);
3282 fprintf (f
, "\t.cfi_register %lu, %lu\n", r
, r2
);
3285 case DW_CFA_def_cfa_offset
:
3286 case DW_CFA_def_cfa_offset_sf
:
3287 fprintf (f
, "\t.cfi_def_cfa_offset "
3288 HOST_WIDE_INT_PRINT_DEC
"\n",
3289 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3292 case DW_CFA_remember_state
:
3293 fprintf (f
, "\t.cfi_remember_state\n");
3295 case DW_CFA_restore_state
:
3296 fprintf (f
, "\t.cfi_restore_state\n");
3299 case DW_CFA_GNU_args_size
:
3300 if (f
== asm_out_file
)
3302 fprintf (f
, "\t.cfi_escape %#x,", DW_CFA_GNU_args_size
);
3303 dw2_asm_output_data_uleb128_raw (cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3305 fprintf (f
, "\t%s args_size " HOST_WIDE_INT_PRINT_DEC
,
3306 ASM_COMMENT_START
, cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3311 fprintf (f
, "\t.cfi_GNU_args_size " HOST_WIDE_INT_PRINT_DEC
"\n",
3312 cfi
->dw_cfi_oprnd1
.dw_cfi_offset
);
3316 case DW_CFA_GNU_window_save
:
3317 fprintf (f
, "\t.cfi_window_save\n");
3320 case DW_CFA_def_cfa_expression
:
3321 if (f
!= asm_out_file
)
3323 fprintf (f
, "\t.cfi_def_cfa_expression ...\n");
3327 case DW_CFA_expression
:
3328 if (f
!= asm_out_file
)
3330 fprintf (f
, "\t.cfi_cfa_expression ...\n");
3333 fprintf (f
, "\t.cfi_escape %#x,", cfi
->dw_cfi_opc
);
3334 output_cfa_loc_raw (cfi
);
3344 dwarf2out_emit_cfi (dw_cfi_ref cfi
)
3346 if (dwarf2out_do_cfi_asm ())
3347 output_cfi_directive (asm_out_file
, cfi
);
3351 dump_cfi_row (FILE *f
, dw_cfi_row
*row
)
3359 dw_cfa_location dummy
;
3360 memset (&dummy
, 0, sizeof (dummy
));
3361 dummy
.reg
= INVALID_REGNUM
;
3362 cfi
= def_cfa_0 (&dummy
, &row
->cfa
);
3364 output_cfi_directive (f
, cfi
);
3366 FOR_EACH_VEC_SAFE_ELT (row
->reg_save
, i
, cfi
)
3368 output_cfi_directive (f
, cfi
);
3371 void debug_cfi_row (dw_cfi_row
*row
);
3374 debug_cfi_row (dw_cfi_row
*row
)
3376 dump_cfi_row (stderr
, row
);
3380 /* Save the result of dwarf2out_do_frame across PCH.
3381 This variable is tri-state, with 0 unset, >0 true, <0 false. */
3382 static GTY(()) signed char saved_do_cfi_asm
= 0;
3384 /* Decide whether we want to emit frame unwind information for the current
3385 translation unit. */
3388 dwarf2out_do_frame (void)
3390 /* We want to emit correct CFA location expressions or lists, so we
3391 have to return true if we're going to output debug info, even if
3392 we're not going to output frame or unwind info. */
3393 if (write_symbols
== DWARF2_DEBUG
|| write_symbols
== VMS_AND_DWARF2_DEBUG
)
3396 if (saved_do_cfi_asm
> 0)
3399 if (targetm
.debug_unwind_info () == UI_DWARF2
)
3402 if ((flag_unwind_tables
|| flag_exceptions
)
3403 && targetm_common
.except_unwind_info (&global_options
) == UI_DWARF2
)
3409 /* Decide whether to emit frame unwind via assembler directives. */
3412 dwarf2out_do_cfi_asm (void)
3416 if (saved_do_cfi_asm
!= 0)
3417 return saved_do_cfi_asm
> 0;
3419 /* Assume failure for a moment. */
3420 saved_do_cfi_asm
= -1;
3422 if (!flag_dwarf2_cfi_asm
|| !dwarf2out_do_frame ())
3424 if (!HAVE_GAS_CFI_PERSONALITY_DIRECTIVE
)
3427 /* Make sure the personality encoding is one the assembler can support.
3428 In particular, aligned addresses can't be handled. */
3429 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/2,/*global=*/1);
3430 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3432 enc
= ASM_PREFERRED_EH_DATA_FORMAT (/*code=*/0,/*global=*/0);
3433 if ((enc
& 0x70) != 0 && (enc
& 0x70) != DW_EH_PE_pcrel
)
3436 /* If we can't get the assembler to emit only .debug_frame, and we don't need
3437 dwarf2 unwind info for exceptions, then emit .debug_frame by hand. */
3438 if (!HAVE_GAS_CFI_SECTIONS_DIRECTIVE
3439 && !flag_unwind_tables
&& !flag_exceptions
3440 && targetm_common
.except_unwind_info (&global_options
) != UI_DWARF2
)
3444 saved_do_cfi_asm
= 1;
3450 const pass_data pass_data_dwarf2_frame
=
3452 RTL_PASS
, /* type */
3453 "dwarf2", /* name */
3454 OPTGROUP_NONE
, /* optinfo_flags */
3455 TV_FINAL
, /* tv_id */
3456 0, /* properties_required */
3457 0, /* properties_provided */
3458 0, /* properties_destroyed */
3459 0, /* todo_flags_start */
3460 0, /* todo_flags_finish */
3463 class pass_dwarf2_frame
: public rtl_opt_pass
3466 pass_dwarf2_frame (gcc::context
*ctxt
)
3467 : rtl_opt_pass (pass_data_dwarf2_frame
, ctxt
)
3470 /* opt_pass methods: */
3471 virtual bool gate (function
*);
3472 virtual unsigned int execute (function
*) { return execute_dwarf2_frame (); }
3474 }; // class pass_dwarf2_frame
3477 pass_dwarf2_frame::gate (function
*)
3479 /* Targets which still implement the prologue in assembler text
3480 cannot use the generic dwarf2 unwinding. */
3481 if (!targetm
.have_prologue ())
3484 /* ??? What to do for UI_TARGET unwinding? They might be able to benefit
3485 from the optimized shrink-wrapping annotations that we will compute.
3486 For now, only produce the CFI notes for dwarf2. */
3487 return dwarf2out_do_frame ();
3493 make_pass_dwarf2_frame (gcc::context
*ctxt
)
3495 return new pass_dwarf2_frame (ctxt
);
3498 #include "gt-dwarf2cfi.h"