1 /* Prototypes for exported functions defined in arm.c and pe.c
2 Copyright (C) 1999-2015 Free Software Foundation, Inc.
3 Contributed by Richard Earnshaw (rearnsha@arm.com)
4 Minor hacks by Nick Clifton (nickc@cygnus.com)
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 3, or (at your option)
13 GCC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
22 #ifndef GCC_ARM_PROTOS_H
23 #define GCC_ARM_PROTOS_H
25 extern enum unwind_info_type
arm_except_unwind_info (struct gcc_options
*);
26 extern int use_return_insn (int, rtx
);
27 extern bool use_simple_return_p (void);
28 extern enum reg_class
arm_regno_class (int);
29 extern void arm_load_pic_register (unsigned long);
30 extern int arm_volatile_func (void);
31 extern void arm_expand_prologue (void);
32 extern void arm_expand_epilogue (bool);
33 extern void thumb2_expand_return (bool);
34 extern const char *arm_strip_name_encoding (const char *);
35 extern void arm_asm_output_labelref (FILE *, const char *);
36 extern void thumb2_asm_output_opcode (FILE *);
37 extern unsigned long arm_current_func_type (void);
38 extern HOST_WIDE_INT
arm_compute_initial_elimination_offset (unsigned int,
40 extern HOST_WIDE_INT
thumb_compute_initial_elimination_offset (unsigned int,
42 extern unsigned int arm_dbx_register_number (unsigned int);
43 extern void arm_output_fn_unwind (FILE *, bool);
45 extern rtx
arm_expand_builtin (tree exp
, rtx target
, rtx subtarget
46 ATTRIBUTE_UNUSED
, enum machine_mode mode
47 ATTRIBUTE_UNUSED
, int ignore ATTRIBUTE_UNUSED
);
48 extern tree
arm_builtin_decl (unsigned code
, bool initialize_p
50 extern void arm_init_builtins (void);
51 extern void arm_atomic_assign_expand_fenv (tree
*hold
, tree
*clear
, tree
*update
);
54 extern bool arm_vector_mode_supported_p (machine_mode
);
55 extern bool arm_small_register_classes_for_mode_p (machine_mode
);
56 extern int arm_hard_regno_mode_ok (unsigned int, machine_mode
);
57 extern bool arm_modes_tieable_p (machine_mode
, machine_mode
);
58 extern int const_ok_for_arm (HOST_WIDE_INT
);
59 extern int const_ok_for_op (HOST_WIDE_INT
, enum rtx_code
);
60 extern int const_ok_for_dimode_op (HOST_WIDE_INT
, enum rtx_code
);
61 extern int arm_split_constant (RTX_CODE
, machine_mode
, rtx
,
62 HOST_WIDE_INT
, rtx
, rtx
, int);
63 extern int legitimate_pic_operand_p (rtx
);
64 extern rtx
legitimize_pic_address (rtx
, machine_mode
, rtx
);
65 extern rtx
legitimize_tls_address (rtx
, rtx
);
66 extern bool arm_legitimate_address_p (machine_mode
, rtx
, bool);
67 extern int arm_legitimate_address_outer_p (machine_mode
, rtx
, RTX_CODE
, int);
68 extern int thumb_legitimate_offset_p (machine_mode
, HOST_WIDE_INT
);
69 extern int thumb1_legitimate_address_p (machine_mode
, rtx
, int);
70 extern bool ldm_stm_operation_p (rtx
, bool, machine_mode mode
,
72 extern int arm_const_double_rtx (rtx
);
73 extern int vfp3_const_double_rtx (rtx
);
74 extern int neon_immediate_valid_for_move (rtx
, machine_mode
, rtx
*, int *);
75 extern int neon_immediate_valid_for_logic (rtx
, machine_mode
, int, rtx
*,
77 extern int neon_immediate_valid_for_shift (rtx
, machine_mode
, rtx
*,
79 extern char *neon_output_logic_immediate (const char *, rtx
*,
80 machine_mode
, int, int);
81 extern char *neon_output_shift_immediate (const char *, char, rtx
*,
82 machine_mode
, int, bool);
83 extern void neon_pairwise_reduce (rtx
, rtx
, machine_mode
,
84 rtx (*) (rtx
, rtx
, rtx
));
85 extern rtx
neon_make_constant (rtx
);
86 extern tree
arm_builtin_vectorized_function (tree
, tree
, tree
);
87 extern void neon_expand_vector_init (rtx
, rtx
);
88 extern void neon_lane_bounds (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
);
89 extern void neon_const_bounds (rtx
, HOST_WIDE_INT
, HOST_WIDE_INT
);
90 extern HOST_WIDE_INT
neon_element_bits (machine_mode
);
91 extern void neon_reinterpret (rtx
, rtx
);
92 extern void neon_emit_pair_result_insn (machine_mode
,
93 rtx (*) (rtx
, rtx
, rtx
, rtx
),
95 extern void neon_disambiguate_copy (rtx
*, rtx
*, rtx
*, unsigned int);
96 extern void neon_split_vcombine (rtx op
[3]);
97 extern enum reg_class
coproc_secondary_reload_class (machine_mode
, rtx
,
99 extern bool arm_tls_referenced_p (rtx
);
101 extern int arm_coproc_mem_operand (rtx
, bool);
102 extern int neon_vector_mem_operand (rtx
, int, bool);
103 extern int neon_struct_mem_operand (rtx
);
105 extern int tls_mentioned_p (rtx
);
106 extern int symbol_mentioned_p (rtx
);
107 extern int label_mentioned_p (rtx
);
108 extern RTX_CODE
minmax_code (rtx
);
109 extern bool arm_sat_operator_match (rtx
, rtx
, int *, bool *);
110 extern int adjacent_mem_locations (rtx
, rtx
);
111 extern bool gen_ldm_seq (rtx
*, int, bool);
112 extern bool gen_stm_seq (rtx
*, int);
113 extern bool gen_const_stm_seq (rtx
*, int);
114 extern rtx
arm_gen_load_multiple (int *, int, rtx
, int, rtx
, HOST_WIDE_INT
*);
115 extern rtx
arm_gen_store_multiple (int *, int, rtx
, int, rtx
, HOST_WIDE_INT
*);
116 extern bool offset_ok_for_ldrd_strd (HOST_WIDE_INT
);
117 extern bool operands_ok_ldrd_strd (rtx
, rtx
, rtx
, HOST_WIDE_INT
, bool, bool);
118 extern bool gen_operands_ldrd_strd (rtx
*, bool, bool, bool);
119 extern int arm_gen_movmemqi (rtx
*);
120 extern bool gen_movmem_ldrd_strd (rtx
*);
121 extern machine_mode
arm_select_cc_mode (RTX_CODE
, rtx
, rtx
);
122 extern machine_mode
arm_select_dominance_cc_mode (rtx
, rtx
,
124 extern rtx
arm_gen_compare_reg (RTX_CODE
, rtx
, rtx
, rtx
);
125 extern rtx
arm_gen_return_addr_mask (void);
126 extern void arm_reload_in_hi (rtx
*);
127 extern void arm_reload_out_hi (rtx
*);
128 extern int arm_max_const_double_inline_cost (void);
129 extern int arm_const_double_inline_cost (rtx
);
130 extern bool arm_const_double_by_parts (rtx
);
131 extern bool arm_const_double_by_immediates (rtx
);
132 extern void arm_emit_call_insn (rtx
, rtx
, bool);
133 extern const char *output_call (rtx
*);
134 extern const char *output_call_mem (rtx
*);
135 void arm_emit_movpair (rtx
, rtx
);
136 extern const char *output_mov_long_double_arm_from_arm (rtx
*);
137 extern const char *output_move_double (rtx
*, bool, int *count
);
138 extern const char *output_move_quad (rtx
*);
139 extern int arm_count_output_move_double_insns (rtx
*);
140 extern const char *output_move_vfp (rtx
*operands
);
141 extern const char *output_move_neon (rtx
*operands
);
142 extern int arm_attr_length_move_neon (rtx_insn
*);
143 extern int arm_address_offset_is_imm (rtx_insn
*);
144 extern const char *output_add_immediate (rtx
*);
145 extern const char *arithmetic_instr (rtx
, int);
146 extern void output_ascii_pseudo_op (FILE *, const unsigned char *, int);
147 extern const char *output_return_instruction (rtx
, bool, bool, bool);
148 extern void arm_poke_function_name (FILE *, const char *);
149 extern void arm_final_prescan_insn (rtx_insn
*);
150 extern int arm_debugger_arg_offset (int, rtx
);
151 extern bool arm_is_long_call_p (tree
);
152 extern int arm_emit_vector_const (FILE *, rtx
);
153 extern void arm_emit_fp16_const (rtx c
);
154 extern const char * arm_output_load_gr (rtx
*);
155 extern const char *vfp_output_vstmd (rtx
*);
156 extern void arm_output_multireg_pop (rtx
*, bool, rtx
, bool, bool);
157 extern void arm_set_return_address (rtx
, rtx
);
158 extern int arm_eliminable_register (rtx
);
159 extern const char *arm_output_shift(rtx
*, int);
160 extern const char *arm_output_iwmmxt_shift_immediate (const char *, rtx
*, bool);
161 extern const char *arm_output_iwmmxt_tinsr (rtx
*);
162 extern unsigned int arm_sync_loop_insns (rtx
, rtx
*);
163 extern int arm_attr_length_push_multi(rtx
, rtx
);
164 extern void arm_expand_compare_and_swap (rtx op
[]);
165 extern void arm_split_compare_and_swap (rtx op
[]);
166 extern void arm_split_atomic_op (enum rtx_code
, rtx
, rtx
, rtx
, rtx
, rtx
, rtx
);
167 extern rtx
arm_load_tp (rtx
);
169 #if defined TREE_CODE
170 extern void arm_init_cumulative_args (CUMULATIVE_ARGS
*, tree
, rtx
, tree
);
171 extern bool arm_pad_arg_upward (machine_mode
, const_tree
);
172 extern bool arm_pad_reg_upward (machine_mode
, tree
, int);
174 extern int arm_apply_result_size (void);
176 #endif /* RTX_CODE */
178 /* Thumb functions. */
179 extern void arm_init_expanders (void);
180 extern const char *thumb1_unexpanded_epilogue (void);
181 extern void thumb1_expand_prologue (void);
182 extern void thumb1_expand_epilogue (void);
183 extern const char *thumb1_output_interwork (void);
185 extern int is_called_in_ARM_mode (tree
);
187 extern int thumb_shiftable_const (unsigned HOST_WIDE_INT
);
189 extern enum arm_cond_code
maybe_get_arm_condition_code (rtx
);
190 extern void thumb1_final_prescan_insn (rtx_insn
*);
191 extern void thumb2_final_prescan_insn (rtx_insn
*);
192 extern const char *thumb_load_double_from_address (rtx
*);
193 extern const char *thumb_output_move_mem_multiple (int, rtx
*);
194 extern const char *thumb_call_via_reg (rtx
);
195 extern void thumb_expand_movmemqi (rtx
*);
196 extern rtx
arm_return_addr (int, rtx
);
197 extern void thumb_reload_out_hi (rtx
*);
198 extern void thumb_reload_in_hi (rtx
*);
199 extern void thumb_set_return_address (rtx
, rtx
);
200 extern const char *thumb1_output_casesi (rtx
*);
201 extern const char *thumb2_output_casesi (rtx
*);
204 /* Defined in pe.c. */
205 extern int arm_dllexport_name_p (const char *);
206 extern int arm_dllimport_name_p (const char *);
209 extern void arm_pe_unique_section (tree
, int);
210 extern void arm_pe_encode_section_info (tree
, rtx
, int);
211 extern int arm_dllexport_p (tree
);
212 extern int arm_dllimport_p (tree
);
213 extern void arm_mark_dllexport (tree
);
214 extern void arm_mark_dllimport (tree
);
217 extern void arm_pr_long_calls (struct cpp_reader
*);
218 extern void arm_pr_no_long_calls (struct cpp_reader
*);
219 extern void arm_pr_long_calls_off (struct cpp_reader
*);
221 extern void arm_lang_object_attributes_init(void);
223 extern const char *arm_mangle_type (const_tree
);
224 extern const char *arm_mangle_builtin_type (const_tree
);
226 extern void arm_order_regs_for_local_alloc (void);
228 extern int arm_max_conditional_execute ();
230 /* Vectorizer cost model implementation. */
231 struct cpu_vec_costs
{
232 const int scalar_stmt_cost
; /* Cost of any scalar operation, excluding
234 const int scalar_load_cost
; /* Cost of scalar load. */
235 const int scalar_store_cost
; /* Cost of scalar store. */
236 const int vec_stmt_cost
; /* Cost of any vector operation, excluding
237 load, store, vector-to-scalar and
238 scalar-to-vector operation. */
239 const int vec_to_scalar_cost
; /* Cost of vect-to-scalar operation. */
240 const int scalar_to_vec_cost
; /* Cost of scalar-to-vector operation. */
241 const int vec_align_load_cost
; /* Cost of aligned vector load. */
242 const int vec_unalign_load_cost
; /* Cost of unaligned vector load. */
243 const int vec_unalign_store_cost
; /* Cost of unaligned vector load. */
244 const int vec_store_cost
; /* Cost of vector store. */
245 const int cond_taken_branch_cost
; /* Cost of taken branch for vectorizer
247 const int cond_not_taken_branch_cost
;/* Cost of not taken branch for
248 vectorizer cost model. */
252 /* This needs to be here because we need RTX_CODE and similar. */
254 struct cpu_cost_table
;
256 enum arm_sched_autopref
258 ARM_SCHED_AUTOPREF_OFF
,
259 ARM_SCHED_AUTOPREF_RANK
,
260 ARM_SCHED_AUTOPREF_FULL
263 /* Dump function ARM_PRINT_TUNE_INFO should be updated whenever this
264 structure is modified. */
268 bool (*rtx_costs
) (rtx
, RTX_CODE
, RTX_CODE
, int *, bool);
269 const struct cpu_cost_table
*insn_extra_cost
;
270 bool (*sched_adjust_cost
) (rtx_insn
*, rtx
, rtx_insn
*, int *);
272 /* Maximum number of instructions to conditionalise. */
273 int max_insns_skipped
;
274 int num_prefetch_slots
;
276 int l1_cache_line_size
;
277 bool prefer_constant_pool
;
278 int (*branch_cost
) (bool, bool);
279 /* Prefer STRD/LDRD instructions over PUSH/POP/LDM/STM. */
280 bool prefer_ldrd_strd
;
281 /* The preference for non short cirtcuit operation when optimizing for
282 performance. The first element covers Thumb state and the second one
284 bool logical_op_non_short_circuit
[2];
285 /* Vectorizer costs. */
286 const struct cpu_vec_costs
* vec_costs
;
287 /* Prefer Neon for 64-bit bitops. */
288 bool prefer_neon_for_64bits
;
289 /* Prefer 32-bit encoding instead of flag-setting 16-bit encoding. */
290 bool disparage_flag_setting_t16_encodings
;
291 /* Prefer 32-bit encoding instead of 16-bit encoding where subset of flags
293 bool disparage_partial_flag_setting_t16_encodings
;
294 /* Prefer to inline string operations like memset by using Neon. */
295 bool string_ops_prefer_neon
;
296 /* Maximum number of instructions to inline calls to memset. */
297 int max_insns_inline_memset
;
298 /* Bitfield encoding the fuseable pairs of instructions. */
299 unsigned int fuseable_ops
;
300 /* Depth of scheduling queue to check for L2 autoprefetcher. */
301 enum arm_sched_autopref sched_autopref
;
302 /* Issue rate of the processor. */
303 unsigned int issue_rate
;
306 extern const struct tune_params
*current_tune
;
307 extern int vfp3_const_double_for_fract_bits (rtx
);
308 /* return power of two from operand, otherwise 0. */
309 extern int vfp3_const_double_for_bits (rtx
);
311 extern void arm_emit_coreregs_64bit_shift (enum rtx_code
, rtx
, rtx
, rtx
, rtx
,
313 extern bool arm_validize_comparison (rtx
*, rtx
*, rtx
*);
314 #endif /* RTX_CODE */
316 extern bool arm_gen_setmem (rtx
*);
317 extern void arm_expand_vec_perm (rtx target
, rtx op0
, rtx op1
, rtx sel
);
318 extern bool arm_expand_vec_perm_const (rtx target
, rtx op0
, rtx op1
, rtx sel
);
320 extern bool arm_autoinc_modes_ok_p (machine_mode
, enum arm_auto_incmodes
);
322 extern void arm_emit_eabi_attribute (const char *, int, int);
324 /* Defined in gcc/common/config/arm-common.c. */
325 extern const char *arm_rewrite_selected_cpu (const char *name
);
327 extern bool arm_is_constant_pool_ref (rtx
);
329 /* Flags used to identify the presence of processor capabilities. */
331 /* Bit values used to identify processor capabilities. */
332 #define FL_CO_PROC (1 << 0) /* Has external co-processor bus */
333 #define FL_ARCH3M (1 << 1) /* Extended multiply */
334 #define FL_MODE26 (1 << 2) /* 26-bit mode support */
335 #define FL_MODE32 (1 << 3) /* 32-bit mode support */
336 #define FL_ARCH4 (1 << 4) /* Architecture rel 4 */
337 #define FL_ARCH5 (1 << 5) /* Architecture rel 5 */
338 #define FL_THUMB (1 << 6) /* Thumb aware */
339 #define FL_LDSCHED (1 << 7) /* Load scheduling necessary */
340 #define FL_STRONG (1 << 8) /* StrongARM */
341 #define FL_ARCH5E (1 << 9) /* DSP extensions to v5 */
342 #define FL_XSCALE (1 << 10) /* XScale */
343 /* spare (1 << 11) */
344 #define FL_ARCH6 (1 << 12) /* Architecture rel 6. Adds
345 media instructions. */
346 #define FL_VFPV2 (1 << 13) /* Vector Floating Point V2. */
347 #define FL_WBUF (1 << 14) /* Schedule for write buffer ops.
348 Note: ARM6 & 7 derivatives only. */
349 #define FL_ARCH6K (1 << 15) /* Architecture rel 6 K extensions. */
350 #define FL_THUMB2 (1 << 16) /* Thumb-2. */
351 #define FL_NOTM (1 << 17) /* Instructions not present in the 'M'
353 #define FL_THUMB_DIV (1 << 18) /* Hardware divide (Thumb mode). */
354 #define FL_VFPV3 (1 << 19) /* Vector Floating Point V3. */
355 #define FL_NEON (1 << 20) /* Neon instructions. */
356 #define FL_ARCH7EM (1 << 21) /* Instructions present in the ARMv7E-M
358 #define FL_ARCH7 (1 << 22) /* Architecture 7. */
359 #define FL_ARM_DIV (1 << 23) /* Hardware divide (ARM mode). */
360 #define FL_ARCH8 (1 << 24) /* Architecture 8. */
361 #define FL_CRC32 (1 << 25) /* ARMv8 CRC32 instructions. */
363 #define FL_SMALLMUL (1 << 26) /* Small multiply supported. */
364 #define FL_NO_VOLATILE_CE (1 << 27) /* No volatile memory in IT block. */
366 #define FL_IWMMXT (1 << 29) /* XScale v2 or "Intel Wireless MMX technology". */
367 #define FL_IWMMXT2 (1 << 30) /* "Intel Wireless MMX2 technology". */
369 /* Flags that only effect tuning, not available instructions. */
370 #define FL_TUNE (FL_WBUF | FL_VFPV2 | FL_STRONG | FL_LDSCHED \
373 #define FL_FOR_ARCH2 FL_NOTM
374 #define FL_FOR_ARCH3 (FL_FOR_ARCH2 | FL_MODE32)
375 #define FL_FOR_ARCH3M (FL_FOR_ARCH3 | FL_ARCH3M)
376 #define FL_FOR_ARCH4 (FL_FOR_ARCH3M | FL_ARCH4)
377 #define FL_FOR_ARCH4T (FL_FOR_ARCH4 | FL_THUMB)
378 #define FL_FOR_ARCH5 (FL_FOR_ARCH4 | FL_ARCH5)
379 #define FL_FOR_ARCH5T (FL_FOR_ARCH5 | FL_THUMB)
380 #define FL_FOR_ARCH5E (FL_FOR_ARCH5 | FL_ARCH5E)
381 #define FL_FOR_ARCH5TE (FL_FOR_ARCH5E | FL_THUMB)
382 #define FL_FOR_ARCH5TEJ FL_FOR_ARCH5TE
383 #define FL_FOR_ARCH6 (FL_FOR_ARCH5TE | FL_ARCH6)
384 #define FL_FOR_ARCH6J FL_FOR_ARCH6
385 #define FL_FOR_ARCH6K (FL_FOR_ARCH6 | FL_ARCH6K)
386 #define FL_FOR_ARCH6Z FL_FOR_ARCH6
387 #define FL_FOR_ARCH6ZK FL_FOR_ARCH6K
388 #define FL_FOR_ARCH6T2 (FL_FOR_ARCH6 | FL_THUMB2)
389 #define FL_FOR_ARCH6M (FL_FOR_ARCH6 & ~FL_NOTM)
390 #define FL_FOR_ARCH7 ((FL_FOR_ARCH6T2 & ~FL_NOTM) | FL_ARCH7)
391 #define FL_FOR_ARCH7A (FL_FOR_ARCH7 | FL_NOTM | FL_ARCH6K)
392 #define FL_FOR_ARCH7VE (FL_FOR_ARCH7A | FL_THUMB_DIV | FL_ARM_DIV)
393 #define FL_FOR_ARCH7R (FL_FOR_ARCH7A | FL_THUMB_DIV)
394 #define FL_FOR_ARCH7M (FL_FOR_ARCH7 | FL_THUMB_DIV)
395 #define FL_FOR_ARCH7EM (FL_FOR_ARCH7M | FL_ARCH7EM)
396 #define FL_FOR_ARCH8A (FL_FOR_ARCH7VE | FL_ARCH8)
398 /* The bits in this mask specify which
399 instructions we are allowed to generate. */
400 extern unsigned long insn_flags
;
402 /* The bits in this mask specify which instruction scheduling options should
404 extern unsigned long tune_flags
;
406 /* Nonzero if this chip supports the ARM Architecture 3M extensions. */
407 extern int arm_arch3m
;
409 /* Nonzero if this chip supports the ARM Architecture 4 extensions. */
410 extern int arm_arch4
;
412 /* Nonzero if this chip supports the ARM Architecture 4t extensions. */
413 extern int arm_arch4t
;
415 /* Nonzero if this chip supports the ARM Architecture 5 extensions. */
416 extern int arm_arch5
;
418 /* Nonzero if this chip supports the ARM Architecture 5E extensions. */
419 extern int arm_arch5e
;
421 /* Nonzero if this chip supports the ARM Architecture 6 extensions. */
422 extern int arm_arch6
;
424 /* Nonzero if this chip supports the ARM 6K extensions. */
425 extern int arm_arch6k
;
427 /* Nonzero if instructions present in ARMv6-M can be used. */
428 extern int arm_arch6m
;
430 /* Nonzero if this chip supports the ARM 7 extensions. */
431 extern int arm_arch7
;
433 /* Nonzero if instructions not present in the 'M' profile can be used. */
434 extern int arm_arch_notm
;
436 /* Nonzero if instructions present in ARMv7E-M can be used. */
437 extern int arm_arch7em
;
439 /* Nonzero if instructions present in ARMv8 can be used. */
440 extern int arm_arch8
;
442 /* Nonzero if this chip can benefit from load scheduling. */
443 extern int arm_ld_sched
;
445 /* Nonzero if this chip is a StrongARM. */
446 extern int arm_tune_strongarm
;
448 /* Nonzero if this chip supports Intel Wireless MMX technology. */
449 extern int arm_arch_iwmmxt
;
451 /* Nonzero if this chip supports Intel Wireless MMX2 technology. */
452 extern int arm_arch_iwmmxt2
;
454 /* Nonzero if this chip is an XScale. */
455 extern int arm_arch_xscale
;
457 /* Nonzero if tuning for XScale */
458 extern int arm_tune_xscale
;
460 /* Nonzero if we want to tune for stores that access the write-buffer.
461 This typically means an ARM6 or ARM7 with MMU or MPU. */
462 extern int arm_tune_wbuf
;
464 /* Nonzero if tuning for Cortex-A9. */
465 extern int arm_tune_cortex_a9
;
467 /* Nonzero if generating Thumb instructions. */
468 extern int thumb_code
;
470 /* Nonzero if generating Thumb-1 instructions. */
471 extern int thumb1_code
;
473 /* Nonzero if we should define __THUMB_INTERWORK__ in the
475 XXX This is a bit of a hack, it's intended to help work around
476 problems in GLD which doesn't understand that armv5t code is
477 interworking clean. */
478 extern int arm_cpp_interwork
;
480 /* Nonzero if chip supports Thumb 2. */
481 extern int arm_arch_thumb2
;
483 /* Nonzero if chip supports integer division instruction. */
484 extern int arm_arch_arm_hwdiv
;
485 extern int arm_arch_thumb_hwdiv
;
487 /* Nonzero if chip disallows volatile memory access in IT block. */
488 extern int arm_arch_no_volatile_ce
;
490 /* Nonzero if we should use Neon to handle 64-bits operations rather
491 than core registers. */
492 extern int prefer_neon_for_64bits
;
496 #endif /* ! GCC_ARM_PROTOS_H */