* optimize.c (initialize_inlined_parameters): Take FN to which the
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1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "flags.h"
32 #include "real.h"
33 #include "insn-config.h"
34 #include "recog.h"
35 #include "function.h"
36 #include "expr.h"
37 #include "toplev.h"
38 #include "output.h"
39 #include "hashtab.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and a vector of "quantity
59 numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_table'
85 entries should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. The `qty_table` members `first_reg' and `last_reg',
89 and `reg_eqv_table' members `next' and `prev' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with qty_table `mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate qty_table `const_rtx'. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate qty_table
116 `const_rtx'.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and qty_table `first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of qty_table vector. We know in advance we will not need
209 a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Per-qty information tracking.
220 `first_reg' and `last_reg' track the head and tail of the
221 chain of registers which currently contain this quantity.
223 `mode' contains the machine mode of this quantity.
225 `const_rtx' holds the rtx of the constant value of this
226 quantity, if known. A summations of the frame/arg pointer
227 and a constant can also be entered here. When this holds
228 a known value, `const_insn' is the insn which stored the
229 constant value.
231 `comparison_{code,const,qty}' are used to track when a
232 comparison between a quantity and some constant or register has
233 been passed. In such a case, we know the results of the comparison
234 in case we see it again. These members record a comparison that
235 is known to be true. `comparison_code' holds the rtx code of such
236 a comparison, else it is set to UNKNOWN and the other two
237 comparison members are undefined. `comparison_const' holds
238 the constant being compared against, or zero if the comparison
239 is not against a constant. `comparison_qty' holds the quantity
240 being compared against when the result is known. If the comparison
241 is not with a register, `comparison_qty' is -1. */
243 struct qty_table_elem
245 rtx const_rtx;
246 rtx const_insn;
247 rtx comparison_const;
248 int comparison_qty;
249 int first_reg, last_reg;
250 enum machine_mode mode;
251 enum rtx_code comparison_code;
254 /* The table of all qtys, indexed by qty number. */
255 static struct qty_table_elem *qty_table;
257 #ifdef HAVE_cc0
258 /* For machines that have a CC0, we do not record its value in the hash
259 table since its use is guaranteed to be the insn immediately following
260 its definition and any other insn is presumed to invalidate it.
262 Instead, we store below the value last assigned to CC0. If it should
263 happen to be a constant, it is stored in preference to the actual
264 assigned value. In case it is a constant, we store the mode in which
265 the constant should be interpreted. */
267 static rtx prev_insn_cc0;
268 static enum machine_mode prev_insn_cc0_mode;
269 #endif
271 /* Previous actual insn. 0 if at first insn of basic block. */
273 static rtx prev_insn;
275 /* Insn being scanned. */
277 static rtx this_insn;
279 /* Index by register number, gives the number of the next (or
280 previous) register in the chain of registers sharing the same
281 value.
283 Or -1 if this register is at the end of the chain.
285 If reg_qty[N] == N, reg_eqv_table[N].next is undefined. */
287 /* Per-register equivalence chain. */
288 struct reg_eqv_elem
290 int next, prev;
293 /* The table of all register equivalence chains. */
294 static struct reg_eqv_elem *reg_eqv_table;
296 struct cse_reg_info
298 /* Next in hash chain. */
299 struct cse_reg_info *hash_next;
301 /* The next cse_reg_info structure in the free or used list. */
302 struct cse_reg_info *next;
304 /* Search key */
305 int regno;
307 /* The quantity number of the register's current contents. */
308 int reg_qty;
310 /* The number of times the register has been altered in the current
311 basic block. */
312 int reg_tick;
314 /* The REG_TICK value at which rtx's containing this register are
315 valid in the hash table. If this does not equal the current
316 reg_tick value, such expressions existing in the hash table are
317 invalid. */
318 int reg_in_table;
321 /* A free list of cse_reg_info entries. */
322 static struct cse_reg_info *cse_reg_info_free_list;
324 /* A used list of cse_reg_info entries. */
325 static struct cse_reg_info *cse_reg_info_used_list;
326 static struct cse_reg_info *cse_reg_info_used_list_end;
328 /* A mapping from registers to cse_reg_info data structures. */
329 #define REGHASH_SHIFT 7
330 #define REGHASH_SIZE (1 << REGHASH_SHIFT)
331 #define REGHASH_MASK (REGHASH_SIZE - 1)
332 static struct cse_reg_info *reg_hash[REGHASH_SIZE];
334 #define REGHASH_FN(REGNO) \
335 (((REGNO) ^ ((REGNO) >> REGHASH_SHIFT)) & REGHASH_MASK)
337 /* The last lookup we did into the cse_reg_info_tree. This allows us
338 to cache repeated lookups. */
339 static int cached_regno;
340 static struct cse_reg_info *cached_cse_reg_info;
342 /* A HARD_REG_SET containing all the hard registers for which there is
343 currently a REG expression in the hash table. Note the difference
344 from the above variables, which indicate if the REG is mentioned in some
345 expression in the table. */
347 static HARD_REG_SET hard_regs_in_table;
349 /* A HARD_REG_SET containing all the hard registers that are invalidated
350 by a CALL_INSN. */
352 static HARD_REG_SET regs_invalidated_by_call;
354 /* CUID of insn that starts the basic block currently being cse-processed. */
356 static int cse_basic_block_start;
358 /* CUID of insn that ends the basic block currently being cse-processed. */
360 static int cse_basic_block_end;
362 /* Vector mapping INSN_UIDs to cuids.
363 The cuids are like uids but increase monotonically always.
364 We use them to see whether a reg is used outside a given basic block. */
366 static int *uid_cuid;
368 /* Highest UID in UID_CUID. */
369 static int max_uid;
371 /* Get the cuid of an insn. */
373 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
375 /* Nonzero if cse has altered conditional jump insns
376 in such a way that jump optimization should be redone. */
378 static int cse_jumps_altered;
380 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
381 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
382 to put in the note. */
383 static int recorded_label_ref;
385 /* canon_hash stores 1 in do_not_record
386 if it notices a reference to CC0, PC, or some other volatile
387 subexpression. */
389 static int do_not_record;
391 #ifdef LOAD_EXTEND_OP
393 /* Scratch rtl used when looking for load-extended copy of a MEM. */
394 static rtx memory_extend_rtx;
395 #endif
397 /* canon_hash stores 1 in hash_arg_in_memory
398 if it notices a reference to memory within the expression being hashed. */
400 static int hash_arg_in_memory;
402 /* The hash table contains buckets which are chains of `struct table_elt's,
403 each recording one expression's information.
404 That expression is in the `exp' field.
406 Those elements with the same hash code are chained in both directions
407 through the `next_same_hash' and `prev_same_hash' fields.
409 Each set of expressions with equivalent values
410 are on a two-way chain through the `next_same_value'
411 and `prev_same_value' fields, and all point with
412 the `first_same_value' field at the first element in
413 that chain. The chain is in order of increasing cost.
414 Each element's cost value is in its `cost' field.
416 The `in_memory' field is nonzero for elements that
417 involve any reference to memory. These elements are removed
418 whenever a write is done to an unidentified location in memory.
419 To be safe, we assume that a memory address is unidentified unless
420 the address is either a symbol constant or a constant plus
421 the frame pointer or argument pointer.
423 The `related_value' field is used to connect related expressions
424 (that differ by adding an integer).
425 The related expressions are chained in a circular fashion.
426 `related_value' is zero for expressions for which this
427 chain is not useful.
429 The `cost' field stores the cost of this element's expression.
431 The `is_const' flag is set if the element is a constant (including
432 a fixed address).
434 The `flag' field is used as a temporary during some search routines.
436 The `mode' field is usually the same as GET_MODE (`exp'), but
437 if `exp' is a CONST_INT and has no machine mode then the `mode'
438 field is the mode it was being used as. Each constant is
439 recorded separately for each mode it is used with. */
442 struct table_elt
444 rtx exp;
445 struct table_elt *next_same_hash;
446 struct table_elt *prev_same_hash;
447 struct table_elt *next_same_value;
448 struct table_elt *prev_same_value;
449 struct table_elt *first_same_value;
450 struct table_elt *related_value;
451 int cost;
452 enum machine_mode mode;
453 char in_memory;
454 char is_const;
455 char flag;
458 /* We don't want a lot of buckets, because we rarely have very many
459 things stored in the hash table, and a lot of buckets slows
460 down a lot of loops that happen frequently. */
461 #define HASH_SHIFT 5
462 #define HASH_SIZE (1 << HASH_SHIFT)
463 #define HASH_MASK (HASH_SIZE - 1)
465 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
466 register (hard registers may require `do_not_record' to be set). */
468 #define HASH(X, M) \
469 ((GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
470 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) \
471 : canon_hash (X, M)) & HASH_MASK)
473 /* Determine whether register number N is considered a fixed register for CSE.
474 It is desirable to replace other regs with fixed regs, to reduce need for
475 non-fixed hard regs.
476 A reg wins if it is either the frame pointer or designated as fixed. */
477 #define FIXED_REGNO_P(N) \
478 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
479 || fixed_regs[N] || global_regs[N])
481 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
482 hard registers and pointers into the frame are the cheapest with a cost
483 of 0. Next come pseudos with a cost of one and other hard registers with
484 a cost of 2. Aside from these special cases, call `rtx_cost'. */
486 #define CHEAP_REGNO(N) \
487 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
488 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
489 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
490 || ((N) < FIRST_PSEUDO_REGISTER \
491 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
493 /* A register is cheap if it is a user variable assigned to the register
494 or if its register number always corresponds to a cheap register. */
496 #define CHEAP_REG(N) \
497 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
498 || CHEAP_REGNO (REGNO (N)))
500 #define COST(X) \
501 (GET_CODE (X) == REG \
502 ? (CHEAP_REG (X) ? 0 \
503 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
504 : 2) \
505 : notreg_cost(X))
507 /* Get the info associated with register N. */
509 #define GET_CSE_REG_INFO(N) \
510 (((N) == cached_regno && cached_cse_reg_info) \
511 ? cached_cse_reg_info : get_cse_reg_info ((N)))
513 /* Get the number of times this register has been updated in this
514 basic block. */
516 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
518 /* Get the point at which REG was recorded in the table. */
520 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
522 /* Get the quantity number for REG. */
524 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
526 /* Determine if the quantity number for register X represents a valid index
527 into the qty_table. */
529 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
531 #ifdef ADDRESS_COST
532 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
533 during CSE, such nodes are present. Using an ADDRESSOF node which
534 refers to the address of a REG is a good thing because we can then
535 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
536 #define CSE_ADDRESS_COST(RTX) \
537 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
538 ? -1 : ADDRESS_COST(RTX))
539 #endif
541 static struct table_elt *table[HASH_SIZE];
543 /* Chain of `struct table_elt's made so far for this function
544 but currently removed from the table. */
546 static struct table_elt *free_element_chain;
548 /* Number of `struct table_elt' structures made so far for this function. */
550 static int n_elements_made;
552 /* Maximum value `n_elements_made' has had so far in this compilation
553 for functions previously processed. */
555 static int max_elements_made;
557 /* Surviving equivalence class when two equivalence classes are merged
558 by recording the effects of a jump in the last insn. Zero if the
559 last insn was not a conditional jump. */
561 static struct table_elt *last_jump_equiv_class;
563 /* Set to the cost of a constant pool reference if one was found for a
564 symbolic constant. If this was found, it means we should try to
565 convert constants into constant pool entries if they don't fit in
566 the insn. */
568 static int constant_pool_entries_cost;
570 /* Define maximum length of a branch path. */
572 #define PATHLENGTH 10
574 /* This data describes a block that will be processed by cse_basic_block. */
576 struct cse_basic_block_data
578 /* Lowest CUID value of insns in block. */
579 int low_cuid;
580 /* Highest CUID value of insns in block. */
581 int high_cuid;
582 /* Total number of SETs in block. */
583 int nsets;
584 /* Last insn in the block. */
585 rtx last;
586 /* Size of current branch path, if any. */
587 int path_size;
588 /* Current branch path, indicating which branches will be taken. */
589 struct branch_path
591 /* The branch insn. */
592 rtx branch;
593 /* Whether it should be taken or not. AROUND is the same as taken
594 except that it is used when the destination label is not preceded
595 by a BARRIER. */
596 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
597 } path[PATHLENGTH];
600 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
601 virtual regs here because the simplify_*_operation routines are called
602 by integrate.c, which is called before virtual register instantiation.
604 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
605 a header file so that their definitions can be shared with the
606 simplification routines in simplify-rtx.c. Until then, do not
607 change these macros without also changing the copy in simplify-rtx.c. */
609 #define FIXED_BASE_PLUS_P(X) \
610 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
611 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
612 || (X) == virtual_stack_vars_rtx \
613 || (X) == virtual_incoming_args_rtx \
614 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
615 && (XEXP (X, 0) == frame_pointer_rtx \
616 || XEXP (X, 0) == hard_frame_pointer_rtx \
617 || ((X) == arg_pointer_rtx \
618 && fixed_regs[ARG_POINTER_REGNUM]) \
619 || XEXP (X, 0) == virtual_stack_vars_rtx \
620 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
621 || GET_CODE (X) == ADDRESSOF)
623 /* Similar, but also allows reference to the stack pointer.
625 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
626 arg_pointer_rtx by itself is nonzero, because on at least one machine,
627 the i960, the arg pointer is zero when it is unused. */
629 #define NONZERO_BASE_PLUS_P(X) \
630 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
631 || (X) == virtual_stack_vars_rtx \
632 || (X) == virtual_incoming_args_rtx \
633 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
634 && (XEXP (X, 0) == frame_pointer_rtx \
635 || XEXP (X, 0) == hard_frame_pointer_rtx \
636 || ((X) == arg_pointer_rtx \
637 && fixed_regs[ARG_POINTER_REGNUM]) \
638 || XEXP (X, 0) == virtual_stack_vars_rtx \
639 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
640 || (X) == stack_pointer_rtx \
641 || (X) == virtual_stack_dynamic_rtx \
642 || (X) == virtual_outgoing_args_rtx \
643 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
644 && (XEXP (X, 0) == stack_pointer_rtx \
645 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
646 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
647 || GET_CODE (X) == ADDRESSOF)
649 static int notreg_cost PROTO((rtx));
650 static void new_basic_block PROTO((void));
651 static void make_new_qty PROTO((int, enum machine_mode));
652 static void make_regs_eqv PROTO((int, int));
653 static void delete_reg_equiv PROTO((int));
654 static int mention_regs PROTO((rtx));
655 static int insert_regs PROTO((rtx, struct table_elt *, int));
656 static void free_element PROTO((struct table_elt *));
657 static void remove_from_table PROTO((struct table_elt *, unsigned));
658 static struct table_elt *get_element PROTO((void));
659 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
660 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
661 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
662 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
663 enum machine_mode));
664 static void merge_equiv_classes PROTO((struct table_elt *,
665 struct table_elt *));
666 static void invalidate PROTO((rtx, enum machine_mode));
667 static int cse_rtx_varies_p PROTO((rtx));
668 static void remove_invalid_refs PROTO((int));
669 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
670 static void rehash_using_reg PROTO((rtx));
671 static void invalidate_memory PROTO((void));
672 static void invalidate_for_call PROTO((void));
673 static rtx use_related_value PROTO((rtx, struct table_elt *));
674 static unsigned canon_hash PROTO((rtx, enum machine_mode));
675 static unsigned safe_hash PROTO((rtx, enum machine_mode));
676 static int exp_equiv_p PROTO((rtx, rtx, int, int));
677 static rtx canon_reg PROTO((rtx, rtx));
678 static void find_best_addr PROTO((rtx, rtx *));
679 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
680 enum machine_mode *,
681 enum machine_mode *));
682 static rtx fold_rtx PROTO((rtx, rtx));
683 static rtx equiv_constant PROTO((rtx));
684 static void record_jump_equiv PROTO((rtx, int));
685 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
686 rtx, rtx, int));
687 static void cse_insn PROTO((rtx, rtx));
688 static int addr_affects_sp_p PROTO((rtx));
689 static void invalidate_from_clobbers PROTO((rtx));
690 static rtx cse_process_notes PROTO((rtx, rtx));
691 static void cse_around_loop PROTO((rtx));
692 static void invalidate_skipped_set PROTO((rtx, rtx, void *));
693 static void invalidate_skipped_block PROTO((rtx));
694 static void cse_check_loop_start PROTO((rtx, rtx, void *));
695 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
696 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
697 static void count_reg_usage PROTO((rtx, int *, rtx, int));
698 extern void dump_class PROTO((struct table_elt*));
699 static struct cse_reg_info* get_cse_reg_info PROTO((int));
700 static unsigned int hash_cse_reg_info PROTO((hash_table_entry_t));
701 static int cse_reg_info_equal_p PROTO((hash_table_entry_t,
702 hash_table_entry_t));
704 static void flush_hash_table PROTO((void));
706 /* Dump the expressions in the equivalence class indicated by CLASSP.
707 This function is used only for debugging. */
708 void
709 dump_class (classp)
710 struct table_elt *classp;
712 struct table_elt *elt;
714 fprintf (stderr, "Equivalence chain for ");
715 print_rtl (stderr, classp->exp);
716 fprintf (stderr, ": \n");
718 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
720 print_rtl (stderr, elt->exp);
721 fprintf (stderr, "\n");
725 /* Return an estimate of the cost of computing rtx X.
726 One use is in cse, to decide which expression to keep in the hash table.
727 Another is in rtl generation, to pick the cheapest way to multiply.
728 Other uses like the latter are expected in the future. */
730 /* Internal function, to compute cost when X is not a register; called
731 from COST macro to keep it simple. */
733 static int
734 notreg_cost (x)
735 rtx x;
737 return ((GET_CODE (x) == SUBREG
738 && GET_CODE (SUBREG_REG (x)) == REG
739 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
740 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
741 && (GET_MODE_SIZE (GET_MODE (x))
742 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
743 && subreg_lowpart_p (x)
744 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
745 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
746 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
747 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
748 : 2))
749 : rtx_cost (x, SET) * 2);
752 /* Return the right cost to give to an operation
753 to make the cost of the corresponding register-to-register instruction
754 N times that of a fast register-to-register instruction. */
756 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
759 rtx_cost (x, outer_code)
760 rtx x;
761 enum rtx_code outer_code ATTRIBUTE_UNUSED;
763 register int i, j;
764 register enum rtx_code code;
765 register const char *fmt;
766 register int total;
768 if (x == 0)
769 return 0;
771 /* Compute the default costs of certain things.
772 Note that RTX_COSTS can override the defaults. */
774 code = GET_CODE (x);
775 switch (code)
777 case MULT:
778 /* Count multiplication by 2**n as a shift,
779 because if we are considering it, we would output it as a shift. */
780 if (GET_CODE (XEXP (x, 1)) == CONST_INT
781 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
782 total = 2;
783 else
784 total = COSTS_N_INSNS (5);
785 break;
786 case DIV:
787 case UDIV:
788 case MOD:
789 case UMOD:
790 total = COSTS_N_INSNS (7);
791 break;
792 case USE:
793 /* Used in loop.c and combine.c as a marker. */
794 total = 0;
795 break;
796 case ASM_OPERANDS:
797 /* We don't want these to be used in substitutions because
798 we have no way of validating the resulting insn. So assign
799 anything containing an ASM_OPERANDS a very high cost. */
800 total = 1000;
801 break;
802 default:
803 total = 2;
806 switch (code)
808 case REG:
809 return ! CHEAP_REG (x);
811 case SUBREG:
812 /* If we can't tie these modes, make this expensive. The larger
813 the mode, the more expensive it is. */
814 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
815 return COSTS_N_INSNS (2
816 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
817 return 2;
818 #ifdef RTX_COSTS
819 RTX_COSTS (x, code, outer_code);
820 #endif
821 #ifdef CONST_COSTS
822 CONST_COSTS (x, code, outer_code);
823 #endif
825 default:
826 #ifdef DEFAULT_RTX_COSTS
827 DEFAULT_RTX_COSTS(x, code, outer_code);
828 #endif
829 break;
832 /* Sum the costs of the sub-rtx's, plus cost of this operation,
833 which is already in total. */
835 fmt = GET_RTX_FORMAT (code);
836 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
837 if (fmt[i] == 'e')
838 total += rtx_cost (XEXP (x, i), code);
839 else if (fmt[i] == 'E')
840 for (j = 0; j < XVECLEN (x, i); j++)
841 total += rtx_cost (XVECEXP (x, i, j), code);
843 return total;
846 static struct cse_reg_info *
847 get_cse_reg_info (regno)
848 int regno;
850 struct cse_reg_info **hash_head = &reg_hash[REGHASH_FN (regno)];
851 struct cse_reg_info *p;
853 for (p = *hash_head ; p != NULL; p = p->hash_next)
854 if (p->regno == regno)
855 break;
857 if (p == NULL)
859 /* Get a new cse_reg_info structure. */
860 if (cse_reg_info_free_list)
862 p = cse_reg_info_free_list;
863 cse_reg_info_free_list = p->next;
865 else
866 p = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
868 /* Insert into hash table. */
869 p->hash_next = *hash_head;
870 *hash_head = p;
872 /* Initialize it. */
873 p->reg_tick = 1;
874 p->reg_in_table = -1;
875 p->reg_qty = regno;
876 p->regno = regno;
877 p->next = cse_reg_info_used_list;
878 cse_reg_info_used_list = p;
879 if (!cse_reg_info_used_list_end)
880 cse_reg_info_used_list_end = p;
883 /* Cache this lookup; we tend to be looking up information about the
884 same register several times in a row. */
885 cached_regno = regno;
886 cached_cse_reg_info = p;
888 return p;
891 /* Clear the hash table and initialize each register with its own quantity,
892 for a new basic block. */
894 static void
895 new_basic_block ()
897 register int i;
899 next_qty = max_reg;
901 /* Clear out hash table state for this pass. */
903 bzero ((char *) reg_hash, sizeof reg_hash);
905 if (cse_reg_info_used_list)
907 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
908 cse_reg_info_free_list = cse_reg_info_used_list;
909 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
911 cached_cse_reg_info = 0;
913 CLEAR_HARD_REG_SET (hard_regs_in_table);
915 /* The per-quantity values used to be initialized here, but it is
916 much faster to initialize each as it is made in `make_new_qty'. */
918 for (i = 0; i < HASH_SIZE; i++)
920 struct table_elt *first;
922 first = table[i];
923 if (first != NULL)
925 struct table_elt *last = first;
927 table[i] = NULL;
929 while (last->next_same_hash != NULL)
930 last = last->next_same_hash;
932 /* Now relink this hash entire chain into
933 the free element list. */
935 last->next_same_hash = free_element_chain;
936 free_element_chain = first;
940 prev_insn = 0;
942 #ifdef HAVE_cc0
943 prev_insn_cc0 = 0;
944 #endif
947 /* Say that register REG contains a quantity in mode MODE not in any
948 register before and initialize that quantity. */
950 static void
951 make_new_qty (reg, mode)
952 register int reg;
953 register enum machine_mode mode;
955 register int q;
956 register struct qty_table_elem *ent;
957 register struct reg_eqv_elem *eqv;
959 if (next_qty >= max_qty)
960 abort ();
962 q = REG_QTY (reg) = next_qty++;
963 ent = &qty_table[q];
964 ent->first_reg = reg;
965 ent->last_reg = reg;
966 ent->mode = mode;
967 ent->const_rtx = ent->const_insn = NULL_RTX;
968 ent->comparison_code = UNKNOWN;
970 eqv = &reg_eqv_table[reg];
971 eqv->next = eqv->prev = -1;
974 /* Make reg NEW equivalent to reg OLD.
975 OLD is not changing; NEW is. */
977 static void
978 make_regs_eqv (new, old)
979 register int new, old;
981 register int lastr, firstr;
982 register int q = REG_QTY (old);
983 register struct qty_table_elem *ent;
985 ent = &qty_table[q];
987 /* Nothing should become eqv until it has a "non-invalid" qty number. */
988 if (! REGNO_QTY_VALID_P (old))
989 abort ();
991 REG_QTY (new) = q;
992 firstr = ent->first_reg;
993 lastr = ent->last_reg;
995 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
996 hard regs. Among pseudos, if NEW will live longer than any other reg
997 of the same qty, and that is beyond the current basic block,
998 make it the new canonical replacement for this qty. */
999 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
1000 /* Certain fixed registers might be of the class NO_REGS. This means
1001 that not only can they not be allocated by the compiler, but
1002 they cannot be used in substitutions or canonicalizations
1003 either. */
1004 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1005 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1006 || (new >= FIRST_PSEUDO_REGISTER
1007 && (firstr < FIRST_PSEUDO_REGISTER
1008 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1009 || (uid_cuid[REGNO_FIRST_UID (new)]
1010 < cse_basic_block_start))
1011 && (uid_cuid[REGNO_LAST_UID (new)]
1012 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1014 reg_eqv_table[firstr].prev = new;
1015 reg_eqv_table[new].next = firstr;
1016 reg_eqv_table[new].prev = -1;
1017 ent->first_reg = new;
1019 else
1021 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1022 Otherwise, insert before any non-fixed hard regs that are at the
1023 end. Registers of class NO_REGS cannot be used as an
1024 equivalent for anything. */
1025 while (lastr < FIRST_PSEUDO_REGISTER && reg_eqv_table[lastr].prev >= 0
1026 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1027 && new >= FIRST_PSEUDO_REGISTER)
1028 lastr = reg_eqv_table[lastr].prev;
1029 reg_eqv_table[new].next = reg_eqv_table[lastr].next;
1030 if (reg_eqv_table[lastr].next >= 0)
1031 reg_eqv_table[reg_eqv_table[lastr].next].prev = new;
1032 else
1033 qty_table[q].last_reg = new;
1034 reg_eqv_table[lastr].next = new;
1035 reg_eqv_table[new].prev = lastr;
1039 /* Remove REG from its equivalence class. */
1041 static void
1042 delete_reg_equiv (reg)
1043 register int reg;
1045 register struct qty_table_elem *ent;
1046 register int q = REG_QTY (reg);
1047 register int p, n;
1049 /* If invalid, do nothing. */
1050 if (q == reg)
1051 return;
1053 ent = &qty_table[q];
1055 p = reg_eqv_table[reg].prev;
1056 n = reg_eqv_table[reg].next;
1058 if (n != -1)
1059 reg_eqv_table[n].prev = p;
1060 else
1061 ent->last_reg = p;
1062 if (p != -1)
1063 reg_eqv_table[p].next = n;
1064 else
1065 ent->first_reg = n;
1067 REG_QTY (reg) = reg;
1070 /* Remove any invalid expressions from the hash table
1071 that refer to any of the registers contained in expression X.
1073 Make sure that newly inserted references to those registers
1074 as subexpressions will be considered valid.
1076 mention_regs is not called when a register itself
1077 is being stored in the table.
1079 Return 1 if we have done something that may have changed the hash code
1080 of X. */
1082 static int
1083 mention_regs (x)
1084 rtx x;
1086 register enum rtx_code code;
1087 register int i, j;
1088 register const char *fmt;
1089 register int changed = 0;
1091 if (x == 0)
1092 return 0;
1094 code = GET_CODE (x);
1095 if (code == REG)
1097 register int regno = REGNO (x);
1098 register int endregno
1099 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1100 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1101 int i;
1103 for (i = regno; i < endregno; i++)
1105 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1106 remove_invalid_refs (i);
1108 REG_IN_TABLE (i) = REG_TICK (i);
1111 return 0;
1114 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1115 pseudo if they don't use overlapping words. We handle only pseudos
1116 here for simplicity. */
1117 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1118 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1120 int i = REGNO (SUBREG_REG (x));
1122 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1124 /* If reg_tick has been incremented more than once since
1125 reg_in_table was last set, that means that the entire
1126 register has been set before, so discard anything memorized
1127 for the entrire register, including all SUBREG expressions. */
1128 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1129 remove_invalid_refs (i);
1130 else
1131 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1134 REG_IN_TABLE (i) = REG_TICK (i);
1135 return 0;
1138 /* If X is a comparison or a COMPARE and either operand is a register
1139 that does not have a quantity, give it one. This is so that a later
1140 call to record_jump_equiv won't cause X to be assigned a different
1141 hash code and not found in the table after that call.
1143 It is not necessary to do this here, since rehash_using_reg can
1144 fix up the table later, but doing this here eliminates the need to
1145 call that expensive function in the most common case where the only
1146 use of the register is in the comparison. */
1148 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1150 if (GET_CODE (XEXP (x, 0)) == REG
1151 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1152 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1154 rehash_using_reg (XEXP (x, 0));
1155 changed = 1;
1158 if (GET_CODE (XEXP (x, 1)) == REG
1159 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1160 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1162 rehash_using_reg (XEXP (x, 1));
1163 changed = 1;
1167 fmt = GET_RTX_FORMAT (code);
1168 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1169 if (fmt[i] == 'e')
1170 changed |= mention_regs (XEXP (x, i));
1171 else if (fmt[i] == 'E')
1172 for (j = 0; j < XVECLEN (x, i); j++)
1173 changed |= mention_regs (XVECEXP (x, i, j));
1175 return changed;
1178 /* Update the register quantities for inserting X into the hash table
1179 with a value equivalent to CLASSP.
1180 (If the class does not contain a REG, it is irrelevant.)
1181 If MODIFIED is nonzero, X is a destination; it is being modified.
1182 Note that delete_reg_equiv should be called on a register
1183 before insert_regs is done on that register with MODIFIED != 0.
1185 Nonzero value means that elements of reg_qty have changed
1186 so X's hash code may be different. */
1188 static int
1189 insert_regs (x, classp, modified)
1190 rtx x;
1191 struct table_elt *classp;
1192 int modified;
1194 if (GET_CODE (x) == REG)
1196 register int regno = REGNO (x);
1197 register int qty_valid;
1199 /* If REGNO is in the equivalence table already but is of the
1200 wrong mode for that equivalence, don't do anything here. */
1202 qty_valid = REGNO_QTY_VALID_P (regno);
1203 if (qty_valid)
1205 struct qty_table_elem *ent = &qty_table[REG_QTY (regno)];
1207 if (ent->mode != GET_MODE (x))
1208 return 0;
1211 if (modified || ! qty_valid)
1213 if (classp)
1214 for (classp = classp->first_same_value;
1215 classp != 0;
1216 classp = classp->next_same_value)
1217 if (GET_CODE (classp->exp) == REG
1218 && GET_MODE (classp->exp) == GET_MODE (x))
1220 make_regs_eqv (regno, REGNO (classp->exp));
1221 return 1;
1224 make_new_qty (regno, GET_MODE (x));
1225 return 1;
1228 return 0;
1231 /* If X is a SUBREG, we will likely be inserting the inner register in the
1232 table. If that register doesn't have an assigned quantity number at
1233 this point but does later, the insertion that we will be doing now will
1234 not be accessible because its hash code will have changed. So assign
1235 a quantity number now. */
1237 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1238 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1240 int regno = REGNO (SUBREG_REG (x));
1242 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1243 /* Mention_regs checks if REG_TICK is exactly one larger than
1244 REG_IN_TABLE to find out if there was only a single preceding
1245 invalidation - for the SUBREG - or another one, which would be
1246 for the full register. Since we don't invalidate the SUBREG
1247 here first, we might have to bump up REG_TICK so that mention_regs
1248 will do the right thing. */
1249 if (REG_IN_TABLE (regno) >= 0
1250 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1251 REG_TICK (regno)++;
1252 mention_regs (x);
1253 return 1;
1255 else
1256 return mention_regs (x);
1259 /* Look in or update the hash table. */
1261 /* Remove table element ELT from use in the table.
1262 HASH is its hash code, made using the HASH macro.
1263 It's an argument because often that is known in advance
1264 and we save much time not recomputing it. */
1266 static void
1267 remove_from_table (elt, hash)
1268 register struct table_elt *elt;
1269 unsigned hash;
1271 if (elt == 0)
1272 return;
1274 /* Mark this element as removed. See cse_insn. */
1275 elt->first_same_value = 0;
1277 /* Remove the table element from its equivalence class. */
1280 register struct table_elt *prev = elt->prev_same_value;
1281 register struct table_elt *next = elt->next_same_value;
1283 if (next) next->prev_same_value = prev;
1285 if (prev)
1286 prev->next_same_value = next;
1287 else
1289 register struct table_elt *newfirst = next;
1290 while (next)
1292 next->first_same_value = newfirst;
1293 next = next->next_same_value;
1298 /* Remove the table element from its hash bucket. */
1301 register struct table_elt *prev = elt->prev_same_hash;
1302 register struct table_elt *next = elt->next_same_hash;
1304 if (next) next->prev_same_hash = prev;
1306 if (prev)
1307 prev->next_same_hash = next;
1308 else if (table[hash] == elt)
1309 table[hash] = next;
1310 else
1312 /* This entry is not in the proper hash bucket. This can happen
1313 when two classes were merged by `merge_equiv_classes'. Search
1314 for the hash bucket that it heads. This happens only very
1315 rarely, so the cost is acceptable. */
1316 for (hash = 0; hash < HASH_SIZE; hash++)
1317 if (table[hash] == elt)
1318 table[hash] = next;
1322 /* Remove the table element from its related-value circular chain. */
1324 if (elt->related_value != 0 && elt->related_value != elt)
1326 register struct table_elt *p = elt->related_value;
1327 while (p->related_value != elt)
1328 p = p->related_value;
1329 p->related_value = elt->related_value;
1330 if (p->related_value == p)
1331 p->related_value = 0;
1334 /* Now add it to the free element chain. */
1335 elt->next_same_hash = free_element_chain;
1336 free_element_chain = elt;
1339 /* Look up X in the hash table and return its table element,
1340 or 0 if X is not in the table.
1342 MODE is the machine-mode of X, or if X is an integer constant
1343 with VOIDmode then MODE is the mode with which X will be used.
1345 Here we are satisfied to find an expression whose tree structure
1346 looks like X. */
1348 static struct table_elt *
1349 lookup (x, hash, mode)
1350 rtx x;
1351 unsigned hash;
1352 enum machine_mode mode;
1354 register struct table_elt *p;
1356 for (p = table[hash]; p; p = p->next_same_hash)
1357 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1358 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1359 return p;
1361 return 0;
1364 /* Like `lookup' but don't care whether the table element uses invalid regs.
1365 Also ignore discrepancies in the machine mode of a register. */
1367 static struct table_elt *
1368 lookup_for_remove (x, hash, mode)
1369 rtx x;
1370 unsigned hash;
1371 enum machine_mode mode;
1373 register struct table_elt *p;
1375 if (GET_CODE (x) == REG)
1377 int regno = REGNO (x);
1378 /* Don't check the machine mode when comparing registers;
1379 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1380 for (p = table[hash]; p; p = p->next_same_hash)
1381 if (GET_CODE (p->exp) == REG
1382 && REGNO (p->exp) == regno)
1383 return p;
1385 else
1387 for (p = table[hash]; p; p = p->next_same_hash)
1388 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1389 return p;
1392 return 0;
1395 /* Look for an expression equivalent to X and with code CODE.
1396 If one is found, return that expression. */
1398 static rtx
1399 lookup_as_function (x, code)
1400 rtx x;
1401 enum rtx_code code;
1403 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK,
1404 GET_MODE (x));
1405 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1406 long as we are narrowing. So if we looked in vain for a mode narrower
1407 than word_mode before, look for word_mode now. */
1408 if (p == 0 && code == CONST_INT
1409 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1411 x = copy_rtx (x);
1412 PUT_MODE (x, word_mode);
1413 p = lookup (x, safe_hash (x, VOIDmode) & HASH_MASK, word_mode);
1416 if (p == 0)
1417 return 0;
1419 for (p = p->first_same_value; p; p = p->next_same_value)
1421 if (GET_CODE (p->exp) == code
1422 /* Make sure this is a valid entry in the table. */
1423 && exp_equiv_p (p->exp, p->exp, 1, 0))
1424 return p->exp;
1427 return 0;
1430 /* Insert X in the hash table, assuming HASH is its hash code
1431 and CLASSP is an element of the class it should go in
1432 (or 0 if a new class should be made).
1433 It is inserted at the proper position to keep the class in
1434 the order cheapest first.
1436 MODE is the machine-mode of X, or if X is an integer constant
1437 with VOIDmode then MODE is the mode with which X will be used.
1439 For elements of equal cheapness, the most recent one
1440 goes in front, except that the first element in the list
1441 remains first unless a cheaper element is added. The order of
1442 pseudo-registers does not matter, as canon_reg will be called to
1443 find the cheapest when a register is retrieved from the table.
1445 The in_memory field in the hash table element is set to 0.
1446 The caller must set it nonzero if appropriate.
1448 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1449 and if insert_regs returns a nonzero value
1450 you must then recompute its hash code before calling here.
1452 If necessary, update table showing constant values of quantities. */
1454 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1456 static struct table_elt *
1457 insert (x, classp, hash, mode)
1458 register rtx x;
1459 register struct table_elt *classp;
1460 unsigned hash;
1461 enum machine_mode mode;
1463 register struct table_elt *elt;
1465 /* If X is a register and we haven't made a quantity for it,
1466 something is wrong. */
1467 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1468 abort ();
1470 /* If X is a hard register, show it is being put in the table. */
1471 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1473 int regno = REGNO (x);
1474 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1475 int i;
1477 for (i = regno; i < endregno; i++)
1478 SET_HARD_REG_BIT (hard_regs_in_table, i);
1481 /* If X is a label, show we recorded it. */
1482 if (GET_CODE (x) == LABEL_REF
1483 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1484 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1485 recorded_label_ref = 1;
1487 /* Put an element for X into the right hash bucket. */
1489 elt = free_element_chain;
1490 if (elt)
1492 free_element_chain = elt->next_same_hash;
1494 else
1496 n_elements_made++;
1497 elt = (struct table_elt *) oballoc (sizeof (struct table_elt));
1500 elt->exp = x;
1501 elt->cost = COST (x);
1502 elt->next_same_value = 0;
1503 elt->prev_same_value = 0;
1504 elt->next_same_hash = table[hash];
1505 elt->prev_same_hash = 0;
1506 elt->related_value = 0;
1507 elt->in_memory = 0;
1508 elt->mode = mode;
1509 elt->is_const = (CONSTANT_P (x)
1510 /* GNU C++ takes advantage of this for `this'
1511 (and other const values). */
1512 || (RTX_UNCHANGING_P (x)
1513 && GET_CODE (x) == REG
1514 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1515 || FIXED_BASE_PLUS_P (x));
1517 if (table[hash])
1518 table[hash]->prev_same_hash = elt;
1519 table[hash] = elt;
1521 /* Put it into the proper value-class. */
1522 if (classp)
1524 classp = classp->first_same_value;
1525 if (CHEAPER (elt, classp))
1526 /* Insert at the head of the class */
1528 register struct table_elt *p;
1529 elt->next_same_value = classp;
1530 classp->prev_same_value = elt;
1531 elt->first_same_value = elt;
1533 for (p = classp; p; p = p->next_same_value)
1534 p->first_same_value = elt;
1536 else
1538 /* Insert not at head of the class. */
1539 /* Put it after the last element cheaper than X. */
1540 register struct table_elt *p, *next;
1541 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1542 p = next);
1543 /* Put it after P and before NEXT. */
1544 elt->next_same_value = next;
1545 if (next)
1546 next->prev_same_value = elt;
1547 elt->prev_same_value = p;
1548 p->next_same_value = elt;
1549 elt->first_same_value = classp;
1552 else
1553 elt->first_same_value = elt;
1555 /* If this is a constant being set equivalent to a register or a register
1556 being set equivalent to a constant, note the constant equivalence.
1558 If this is a constant, it cannot be equivalent to a different constant,
1559 and a constant is the only thing that can be cheaper than a register. So
1560 we know the register is the head of the class (before the constant was
1561 inserted).
1563 If this is a register that is not already known equivalent to a
1564 constant, we must check the entire class.
1566 If this is a register that is already known equivalent to an insn,
1567 update the qtys `const_insn' to show that `this_insn' is the latest
1568 insn making that quantity equivalent to the constant. */
1570 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1571 && GET_CODE (x) != REG)
1573 int exp_q = REG_QTY (REGNO (classp->exp));
1574 struct qty_table_elem *exp_ent = &qty_table[exp_q];
1576 exp_ent->const_rtx = gen_lowpart_if_possible (exp_ent->mode, x);
1577 exp_ent->const_insn = this_insn;
1580 else if (GET_CODE (x) == REG
1581 && classp
1582 && ! qty_table[REG_QTY (REGNO (x))].const_rtx
1583 && ! elt->is_const)
1585 register struct table_elt *p;
1587 for (p = classp; p != 0; p = p->next_same_value)
1589 if (p->is_const && GET_CODE (p->exp) != REG)
1591 int x_q = REG_QTY (REGNO (x));
1592 struct qty_table_elem *x_ent = &qty_table[x_q];
1594 x_ent->const_rtx = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1595 x_ent->const_insn = this_insn;
1596 break;
1601 else if (GET_CODE (x) == REG
1602 && qty_table[REG_QTY (REGNO (x))].const_rtx
1603 && GET_MODE (x) == qty_table[REG_QTY (REGNO (x))].mode)
1604 qty_table[REG_QTY (REGNO (x))].const_insn = this_insn;
1606 /* If this is a constant with symbolic value,
1607 and it has a term with an explicit integer value,
1608 link it up with related expressions. */
1609 if (GET_CODE (x) == CONST)
1611 rtx subexp = get_related_value (x);
1612 unsigned subhash;
1613 struct table_elt *subelt, *subelt_prev;
1615 if (subexp != 0)
1617 /* Get the integer-free subexpression in the hash table. */
1618 subhash = safe_hash (subexp, mode) & HASH_MASK;
1619 subelt = lookup (subexp, subhash, mode);
1620 if (subelt == 0)
1621 subelt = insert (subexp, NULL_PTR, subhash, mode);
1622 /* Initialize SUBELT's circular chain if it has none. */
1623 if (subelt->related_value == 0)
1624 subelt->related_value = subelt;
1625 /* Find the element in the circular chain that precedes SUBELT. */
1626 subelt_prev = subelt;
1627 while (subelt_prev->related_value != subelt)
1628 subelt_prev = subelt_prev->related_value;
1629 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1630 This way the element that follows SUBELT is the oldest one. */
1631 elt->related_value = subelt_prev->related_value;
1632 subelt_prev->related_value = elt;
1636 return elt;
1639 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1640 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1641 the two classes equivalent.
1643 CLASS1 will be the surviving class; CLASS2 should not be used after this
1644 call.
1646 Any invalid entries in CLASS2 will not be copied. */
1648 static void
1649 merge_equiv_classes (class1, class2)
1650 struct table_elt *class1, *class2;
1652 struct table_elt *elt, *next, *new;
1654 /* Ensure we start with the head of the classes. */
1655 class1 = class1->first_same_value;
1656 class2 = class2->first_same_value;
1658 /* If they were already equal, forget it. */
1659 if (class1 == class2)
1660 return;
1662 for (elt = class2; elt; elt = next)
1664 unsigned hash;
1665 rtx exp = elt->exp;
1666 enum machine_mode mode = elt->mode;
1668 next = elt->next_same_value;
1670 /* Remove old entry, make a new one in CLASS1's class.
1671 Don't do this for invalid entries as we cannot find their
1672 hash code (it also isn't necessary). */
1673 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1675 hash_arg_in_memory = 0;
1676 hash = HASH (exp, mode);
1678 if (GET_CODE (exp) == REG)
1679 delete_reg_equiv (REGNO (exp));
1681 remove_from_table (elt, hash);
1683 if (insert_regs (exp, class1, 0))
1685 rehash_using_reg (exp);
1686 hash = HASH (exp, mode);
1688 new = insert (exp, class1, hash, mode);
1689 new->in_memory = hash_arg_in_memory;
1695 /* Flush the entire hash table. */
1697 static void
1698 flush_hash_table ()
1700 int i;
1701 struct table_elt *p;
1703 for (i = 0; i < HASH_SIZE; i++)
1704 for (p = table[i]; p; p = table[i])
1706 /* Note that invalidate can remove elements
1707 after P in the current hash chain. */
1708 if (GET_CODE (p->exp) == REG)
1709 invalidate (p->exp, p->mode);
1710 else
1711 remove_from_table (p, i);
1715 /* Remove from the hash table, or mark as invalid, all expressions whose
1716 values could be altered by storing in X. X is a register, a subreg, or
1717 a memory reference with nonvarying address (because, when a memory
1718 reference with a varying address is stored in, all memory references are
1719 removed by invalidate_memory so specific invalidation is superfluous).
1720 FULL_MODE, if not VOIDmode, indicates that this much should be
1721 invalidated instead of just the amount indicated by the mode of X. This
1722 is only used for bitfield stores into memory.
1724 A nonvarying address may be just a register or just a symbol reference,
1725 or it may be either of those plus a numeric offset. */
1727 static void
1728 invalidate (x, full_mode)
1729 rtx x;
1730 enum machine_mode full_mode;
1732 register int i;
1733 register struct table_elt *p;
1735 switch (GET_CODE (x))
1737 case REG:
1739 /* If X is a register, dependencies on its contents are recorded
1740 through the qty number mechanism. Just change the qty number of
1741 the register, mark it as invalid for expressions that refer to it,
1742 and remove it itself. */
1743 register int regno = REGNO (x);
1744 register unsigned hash = HASH (x, GET_MODE (x));
1746 /* Remove REGNO from any quantity list it might be on and indicate
1747 that its value might have changed. If it is a pseudo, remove its
1748 entry from the hash table.
1750 For a hard register, we do the first two actions above for any
1751 additional hard registers corresponding to X. Then, if any of these
1752 registers are in the table, we must remove any REG entries that
1753 overlap these registers. */
1755 delete_reg_equiv (regno);
1756 REG_TICK (regno)++;
1758 if (regno >= FIRST_PSEUDO_REGISTER)
1760 /* Because a register can be referenced in more than one mode,
1761 we might have to remove more than one table entry. */
1762 struct table_elt *elt;
1764 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1765 remove_from_table (elt, hash);
1767 else
1769 HOST_WIDE_INT in_table
1770 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1771 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1772 int tregno, tendregno;
1773 register struct table_elt *p, *next;
1775 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1777 for (i = regno + 1; i < endregno; i++)
1779 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1780 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1781 delete_reg_equiv (i);
1782 REG_TICK (i)++;
1785 if (in_table)
1786 for (hash = 0; hash < HASH_SIZE; hash++)
1787 for (p = table[hash]; p; p = next)
1789 next = p->next_same_hash;
1791 if (GET_CODE (p->exp) != REG
1792 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1793 continue;
1795 tregno = REGNO (p->exp);
1796 tendregno
1797 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1798 if (tendregno > regno && tregno < endregno)
1799 remove_from_table (p, hash);
1803 return;
1805 case SUBREG:
1806 invalidate (SUBREG_REG (x), VOIDmode);
1807 return;
1809 case PARALLEL:
1810 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1811 invalidate (XVECEXP (x, 0, i), VOIDmode);
1812 return;
1814 case EXPR_LIST:
1815 /* This is part of a disjoint return value; extract the location in
1816 question ignoring the offset. */
1817 invalidate (XEXP (x, 0), VOIDmode);
1818 return;
1820 case MEM:
1821 /* Remove all hash table elements that refer to overlapping pieces of
1822 memory. */
1823 if (full_mode == VOIDmode)
1824 full_mode = GET_MODE (x);
1826 for (i = 0; i < HASH_SIZE; i++)
1828 register struct table_elt *next;
1830 for (p = table[i]; p; p = next)
1832 next = p->next_same_hash;
1833 if (p->in_memory
1834 && (GET_CODE (p->exp) != MEM
1835 || true_dependence (x, full_mode, p->exp,
1836 cse_rtx_varies_p)))
1837 remove_from_table (p, i);
1840 return;
1842 default:
1843 abort ();
1847 /* Remove all expressions that refer to register REGNO,
1848 since they are already invalid, and we are about to
1849 mark that register valid again and don't want the old
1850 expressions to reappear as valid. */
1852 static void
1853 remove_invalid_refs (regno)
1854 int regno;
1856 register int i;
1857 register struct table_elt *p, *next;
1859 for (i = 0; i < HASH_SIZE; i++)
1860 for (p = table[i]; p; p = next)
1862 next = p->next_same_hash;
1863 if (GET_CODE (p->exp) != REG
1864 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1865 remove_from_table (p, i);
1869 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1870 static void
1871 remove_invalid_subreg_refs (regno, word, mode)
1872 int regno;
1873 int word;
1874 enum machine_mode mode;
1876 register int i;
1877 register struct table_elt *p, *next;
1878 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1880 for (i = 0; i < HASH_SIZE; i++)
1881 for (p = table[i]; p; p = next)
1883 rtx exp;
1884 next = p->next_same_hash;
1886 exp = p->exp;
1887 if (GET_CODE (p->exp) != REG
1888 && (GET_CODE (exp) != SUBREG
1889 || GET_CODE (SUBREG_REG (exp)) != REG
1890 || REGNO (SUBREG_REG (exp)) != regno
1891 || (((SUBREG_WORD (exp)
1892 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1893 >= word)
1894 && SUBREG_WORD (exp) <= end))
1895 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1896 remove_from_table (p, i);
1900 /* Recompute the hash codes of any valid entries in the hash table that
1901 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1903 This is called when we make a jump equivalence. */
1905 static void
1906 rehash_using_reg (x)
1907 rtx x;
1909 unsigned int i;
1910 struct table_elt *p, *next;
1911 unsigned hash;
1913 if (GET_CODE (x) == SUBREG)
1914 x = SUBREG_REG (x);
1916 /* If X is not a register or if the register is known not to be in any
1917 valid entries in the table, we have no work to do. */
1919 if (GET_CODE (x) != REG
1920 || REG_IN_TABLE (REGNO (x)) < 0
1921 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1922 return;
1924 /* Scan all hash chains looking for valid entries that mention X.
1925 If we find one and it is in the wrong hash chain, move it. We can skip
1926 objects that are registers, since they are handled specially. */
1928 for (i = 0; i < HASH_SIZE; i++)
1929 for (p = table[i]; p; p = next)
1931 next = p->next_same_hash;
1932 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1933 && exp_equiv_p (p->exp, p->exp, 1, 0)
1934 && i != (hash = safe_hash (p->exp, p->mode) & HASH_MASK))
1936 if (p->next_same_hash)
1937 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1939 if (p->prev_same_hash)
1940 p->prev_same_hash->next_same_hash = p->next_same_hash;
1941 else
1942 table[i] = p->next_same_hash;
1944 p->next_same_hash = table[hash];
1945 p->prev_same_hash = 0;
1946 if (table[hash])
1947 table[hash]->prev_same_hash = p;
1948 table[hash] = p;
1953 /* Remove from the hash table any expression that is a call-clobbered
1954 register. Also update their TICK values. */
1956 static void
1957 invalidate_for_call ()
1959 int regno, endregno;
1960 int i;
1961 unsigned hash;
1962 struct table_elt *p, *next;
1963 int in_table = 0;
1965 /* Go through all the hard registers. For each that is clobbered in
1966 a CALL_INSN, remove the register from quantity chains and update
1967 reg_tick if defined. Also see if any of these registers is currently
1968 in the table. */
1970 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1971 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1973 delete_reg_equiv (regno);
1974 if (REG_TICK (regno) >= 0)
1975 REG_TICK (regno)++;
1977 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1980 /* In the case where we have no call-clobbered hard registers in the
1981 table, we are done. Otherwise, scan the table and remove any
1982 entry that overlaps a call-clobbered register. */
1984 if (in_table)
1985 for (hash = 0; hash < HASH_SIZE; hash++)
1986 for (p = table[hash]; p; p = next)
1988 next = p->next_same_hash;
1990 if (GET_CODE (p->exp) != REG
1991 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1992 continue;
1994 regno = REGNO (p->exp);
1995 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1997 for (i = regno; i < endregno; i++)
1998 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
2000 remove_from_table (p, hash);
2001 break;
2006 /* Given an expression X of type CONST,
2007 and ELT which is its table entry (or 0 if it
2008 is not in the hash table),
2009 return an alternate expression for X as a register plus integer.
2010 If none can be found, return 0. */
2012 static rtx
2013 use_related_value (x, elt)
2014 rtx x;
2015 struct table_elt *elt;
2017 register struct table_elt *relt = 0;
2018 register struct table_elt *p, *q;
2019 HOST_WIDE_INT offset;
2021 /* First, is there anything related known?
2022 If we have a table element, we can tell from that.
2023 Otherwise, must look it up. */
2025 if (elt != 0 && elt->related_value != 0)
2026 relt = elt;
2027 else if (elt == 0 && GET_CODE (x) == CONST)
2029 rtx subexp = get_related_value (x);
2030 if (subexp != 0)
2031 relt = lookup (subexp,
2032 safe_hash (subexp, GET_MODE (subexp)) & HASH_MASK,
2033 GET_MODE (subexp));
2036 if (relt == 0)
2037 return 0;
2039 /* Search all related table entries for one that has an
2040 equivalent register. */
2042 p = relt;
2043 while (1)
2045 /* This loop is strange in that it is executed in two different cases.
2046 The first is when X is already in the table. Then it is searching
2047 the RELATED_VALUE list of X's class (RELT). The second case is when
2048 X is not in the table. Then RELT points to a class for the related
2049 value.
2051 Ensure that, whatever case we are in, that we ignore classes that have
2052 the same value as X. */
2054 if (rtx_equal_p (x, p->exp))
2055 q = 0;
2056 else
2057 for (q = p->first_same_value; q; q = q->next_same_value)
2058 if (GET_CODE (q->exp) == REG)
2059 break;
2061 if (q)
2062 break;
2064 p = p->related_value;
2066 /* We went all the way around, so there is nothing to be found.
2067 Alternatively, perhaps RELT was in the table for some other reason
2068 and it has no related values recorded. */
2069 if (p == relt || p == 0)
2070 break;
2073 if (q == 0)
2074 return 0;
2076 offset = (get_integer_term (x) - get_integer_term (p->exp));
2077 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2078 return plus_constant (q->exp, offset);
2081 /* Hash an rtx. We are careful to make sure the value is never negative.
2082 Equivalent registers hash identically.
2083 MODE is used in hashing for CONST_INTs only;
2084 otherwise the mode of X is used.
2086 Store 1 in do_not_record if any subexpression is volatile.
2088 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2089 which does not have the RTX_UNCHANGING_P bit set.
2091 Note that cse_insn knows that the hash code of a MEM expression
2092 is just (int) MEM plus the hash code of the address. */
2094 static unsigned
2095 canon_hash (x, mode)
2096 rtx x;
2097 enum machine_mode mode;
2099 register int i, j;
2100 register unsigned hash = 0;
2101 register enum rtx_code code;
2102 register const char *fmt;
2104 /* repeat is used to turn tail-recursion into iteration. */
2105 repeat:
2106 if (x == 0)
2107 return hash;
2109 code = GET_CODE (x);
2110 switch (code)
2112 case REG:
2114 register int regno = REGNO (x);
2116 /* On some machines, we can't record any non-fixed hard register,
2117 because extending its life will cause reload problems. We
2118 consider ap, fp, and sp to be fixed for this purpose.
2120 We also consider CCmode registers to be fixed for this purpose;
2121 failure to do so leads to failure to simplify 0<100 type of
2122 conditionals.
2124 On all machines, we can't record any global registers. */
2126 if (regno < FIRST_PSEUDO_REGISTER
2127 && (global_regs[regno]
2128 || (SMALL_REGISTER_CLASSES
2129 && ! fixed_regs[regno]
2130 && regno != FRAME_POINTER_REGNUM
2131 && regno != HARD_FRAME_POINTER_REGNUM
2132 && regno != ARG_POINTER_REGNUM
2133 && regno != STACK_POINTER_REGNUM
2134 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2136 do_not_record = 1;
2137 return 0;
2139 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2140 return hash;
2143 /* We handle SUBREG of a REG specially because the underlying
2144 reg changes its hash value with every value change; we don't
2145 want to have to forget unrelated subregs when one subreg changes. */
2146 case SUBREG:
2148 if (GET_CODE (SUBREG_REG (x)) == REG)
2150 hash += (((unsigned) SUBREG << 7)
2151 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2152 return hash;
2154 break;
2157 case CONST_INT:
2159 unsigned HOST_WIDE_INT tem = INTVAL (x);
2160 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2161 return hash;
2164 case CONST_DOUBLE:
2165 /* This is like the general case, except that it only counts
2166 the integers representing the constant. */
2167 hash += (unsigned) code + (unsigned) GET_MODE (x);
2168 if (GET_MODE (x) != VOIDmode)
2169 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2171 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2172 hash += tem;
2174 else
2175 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2176 + (unsigned) CONST_DOUBLE_HIGH (x));
2177 return hash;
2179 /* Assume there is only one rtx object for any given label. */
2180 case LABEL_REF:
2181 hash
2182 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2183 return hash;
2185 case SYMBOL_REF:
2186 hash
2187 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2188 return hash;
2190 case MEM:
2191 /* We don't record if marked volatile or if BLKmode since we don't
2192 know the size of the move. */
2193 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2195 do_not_record = 1;
2196 return 0;
2198 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2200 hash_arg_in_memory = 1;
2202 /* Now that we have already found this special case,
2203 might as well speed it up as much as possible. */
2204 hash += (unsigned) MEM;
2205 x = XEXP (x, 0);
2206 goto repeat;
2208 case PRE_DEC:
2209 case PRE_INC:
2210 case POST_DEC:
2211 case POST_INC:
2212 case PC:
2213 case CC0:
2214 case CALL:
2215 case UNSPEC_VOLATILE:
2216 do_not_record = 1;
2217 return 0;
2219 case ASM_OPERANDS:
2220 if (MEM_VOLATILE_P (x))
2222 do_not_record = 1;
2223 return 0;
2225 break;
2227 default:
2228 break;
2231 i = GET_RTX_LENGTH (code) - 1;
2232 hash += (unsigned) code + (unsigned) GET_MODE (x);
2233 fmt = GET_RTX_FORMAT (code);
2234 for (; i >= 0; i--)
2236 if (fmt[i] == 'e')
2238 rtx tem = XEXP (x, i);
2240 /* If we are about to do the last recursive call
2241 needed at this level, change it into iteration.
2242 This function is called enough to be worth it. */
2243 if (i == 0)
2245 x = tem;
2246 goto repeat;
2248 hash += canon_hash (tem, 0);
2250 else if (fmt[i] == 'E')
2251 for (j = 0; j < XVECLEN (x, i); j++)
2252 hash += canon_hash (XVECEXP (x, i, j), 0);
2253 else if (fmt[i] == 's')
2255 register unsigned char *p = (unsigned char *) XSTR (x, i);
2256 if (p)
2257 while (*p)
2258 hash += *p++;
2260 else if (fmt[i] == 'i')
2262 register unsigned tem = XINT (x, i);
2263 hash += tem;
2265 else if (fmt[i] == '0' || fmt[i] == 't')
2266 /* unused */;
2267 else
2268 abort ();
2270 return hash;
2273 /* Like canon_hash but with no side effects. */
2275 static unsigned
2276 safe_hash (x, mode)
2277 rtx x;
2278 enum machine_mode mode;
2280 int save_do_not_record = do_not_record;
2281 int save_hash_arg_in_memory = hash_arg_in_memory;
2282 unsigned hash = canon_hash (x, mode);
2283 hash_arg_in_memory = save_hash_arg_in_memory;
2284 do_not_record = save_do_not_record;
2285 return hash;
2288 /* Return 1 iff X and Y would canonicalize into the same thing,
2289 without actually constructing the canonicalization of either one.
2290 If VALIDATE is nonzero,
2291 we assume X is an expression being processed from the rtl
2292 and Y was found in the hash table. We check register refs
2293 in Y for being marked as valid.
2295 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2296 that is known to be in the register. Ordinarily, we don't allow them
2297 to match, because letting them match would cause unpredictable results
2298 in all the places that search a hash table chain for an equivalent
2299 for a given value. A possible equivalent that has different structure
2300 has its hash code computed from different data. Whether the hash code
2301 is the same as that of the given value is pure luck. */
2303 static int
2304 exp_equiv_p (x, y, validate, equal_values)
2305 rtx x, y;
2306 int validate;
2307 int equal_values;
2309 register int i, j;
2310 register enum rtx_code code;
2311 register const char *fmt;
2313 /* Note: it is incorrect to assume an expression is equivalent to itself
2314 if VALIDATE is nonzero. */
2315 if (x == y && !validate)
2316 return 1;
2317 if (x == 0 || y == 0)
2318 return x == y;
2320 code = GET_CODE (x);
2321 if (code != GET_CODE (y))
2323 if (!equal_values)
2324 return 0;
2326 /* If X is a constant and Y is a register or vice versa, they may be
2327 equivalent. We only have to validate if Y is a register. */
2328 if (CONSTANT_P (x) && GET_CODE (y) == REG
2329 && REGNO_QTY_VALID_P (REGNO (y)))
2331 int y_q = REG_QTY (REGNO (y));
2332 struct qty_table_elem *y_ent = &qty_table[y_q];
2334 if (GET_MODE (y) == y_ent->mode
2335 && rtx_equal_p (x, y_ent->const_rtx)
2336 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2337 return 1;
2340 if (CONSTANT_P (y) && code == REG
2341 && REGNO_QTY_VALID_P (REGNO (x)))
2343 int x_q = REG_QTY (REGNO (x));
2344 struct qty_table_elem *x_ent = &qty_table[x_q];
2346 if (GET_MODE (x) == x_ent->mode
2347 && rtx_equal_p (y, x_ent->const_rtx))
2348 return 1;
2351 return 0;
2354 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2355 if (GET_MODE (x) != GET_MODE (y))
2356 return 0;
2358 switch (code)
2360 case PC:
2361 case CC0:
2362 return x == y;
2364 case CONST_INT:
2365 return INTVAL (x) == INTVAL (y);
2367 case LABEL_REF:
2368 return XEXP (x, 0) == XEXP (y, 0);
2370 case SYMBOL_REF:
2371 return XSTR (x, 0) == XSTR (y, 0);
2373 case REG:
2375 int regno = REGNO (y);
2376 int endregno
2377 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2378 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2379 int i;
2381 /* If the quantities are not the same, the expressions are not
2382 equivalent. If there are and we are not to validate, they
2383 are equivalent. Otherwise, ensure all regs are up-to-date. */
2385 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2386 return 0;
2388 if (! validate)
2389 return 1;
2391 for (i = regno; i < endregno; i++)
2392 if (REG_IN_TABLE (i) != REG_TICK (i))
2393 return 0;
2395 return 1;
2398 /* For commutative operations, check both orders. */
2399 case PLUS:
2400 case MULT:
2401 case AND:
2402 case IOR:
2403 case XOR:
2404 case NE:
2405 case EQ:
2406 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2407 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2408 validate, equal_values))
2409 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2410 validate, equal_values)
2411 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2412 validate, equal_values)));
2414 default:
2415 break;
2418 /* Compare the elements. If any pair of corresponding elements
2419 fail to match, return 0 for the whole things. */
2421 fmt = GET_RTX_FORMAT (code);
2422 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2424 switch (fmt[i])
2426 case 'e':
2427 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2428 return 0;
2429 break;
2431 case 'E':
2432 if (XVECLEN (x, i) != XVECLEN (y, i))
2433 return 0;
2434 for (j = 0; j < XVECLEN (x, i); j++)
2435 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2436 validate, equal_values))
2437 return 0;
2438 break;
2440 case 's':
2441 if (strcmp (XSTR (x, i), XSTR (y, i)))
2442 return 0;
2443 break;
2445 case 'i':
2446 if (XINT (x, i) != XINT (y, i))
2447 return 0;
2448 break;
2450 case 'w':
2451 if (XWINT (x, i) != XWINT (y, i))
2452 return 0;
2453 break;
2455 case '0':
2456 case 't':
2457 break;
2459 default:
2460 abort ();
2464 return 1;
2467 /* Return 1 if X has a value that can vary even between two
2468 executions of the program. 0 means X can be compared reliably
2469 against certain constants or near-constants. */
2471 static int
2472 cse_rtx_varies_p (x)
2473 register rtx x;
2475 /* We need not check for X and the equivalence class being of the same
2476 mode because if X is equivalent to a constant in some mode, it
2477 doesn't vary in any mode. */
2479 if (GET_CODE (x) == REG
2480 && REGNO_QTY_VALID_P (REGNO (x)))
2482 int x_q = REG_QTY (REGNO (x));
2483 struct qty_table_elem *x_ent = &qty_table[x_q];
2485 if (GET_MODE (x) == x_ent->mode
2486 && x_ent->const_rtx != NULL_RTX)
2487 return 0;
2490 if (GET_CODE (x) == PLUS
2491 && GET_CODE (XEXP (x, 1)) == CONST_INT
2492 && GET_CODE (XEXP (x, 0)) == REG
2493 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
2495 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2496 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2498 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2499 && x0_ent->const_rtx != NULL_RTX)
2500 return 0;
2503 /* This can happen as the result of virtual register instantiation, if
2504 the initial constant is too large to be a valid address. This gives
2505 us a three instruction sequence, load large offset into a register,
2506 load fp minus a constant into a register, then a MEM which is the
2507 sum of the two `constant' registers. */
2508 if (GET_CODE (x) == PLUS
2509 && GET_CODE (XEXP (x, 0)) == REG
2510 && GET_CODE (XEXP (x, 1)) == REG
2511 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2512 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
2514 int x0_q = REG_QTY (REGNO (XEXP (x, 0)));
2515 int x1_q = REG_QTY (REGNO (XEXP (x, 1)));
2516 struct qty_table_elem *x0_ent = &qty_table[x0_q];
2517 struct qty_table_elem *x1_ent = &qty_table[x1_q];
2519 if ((GET_MODE (XEXP (x, 0)) == x0_ent->mode)
2520 && x0_ent->const_rtx != NULL_RTX
2521 && (GET_MODE (XEXP (x, 1)) == x1_ent->mode)
2522 && x1_ent->const_rtx != NULL_RTX)
2523 return 0;
2526 return rtx_varies_p (x);
2529 /* Canonicalize an expression:
2530 replace each register reference inside it
2531 with the "oldest" equivalent register.
2533 If INSN is non-zero and we are replacing a pseudo with a hard register
2534 or vice versa, validate_change is used to ensure that INSN remains valid
2535 after we make our substitution. The calls are made with IN_GROUP non-zero
2536 so apply_change_group must be called upon the outermost return from this
2537 function (unless INSN is zero). The result of apply_change_group can
2538 generally be discarded since the changes we are making are optional. */
2540 static rtx
2541 canon_reg (x, insn)
2542 rtx x;
2543 rtx insn;
2545 register int i;
2546 register enum rtx_code code;
2547 register const char *fmt;
2549 if (x == 0)
2550 return x;
2552 code = GET_CODE (x);
2553 switch (code)
2555 case PC:
2556 case CC0:
2557 case CONST:
2558 case CONST_INT:
2559 case CONST_DOUBLE:
2560 case SYMBOL_REF:
2561 case LABEL_REF:
2562 case ADDR_VEC:
2563 case ADDR_DIFF_VEC:
2564 return x;
2566 case REG:
2568 register int first;
2569 register int q;
2570 register struct qty_table_elem *ent;
2572 /* Never replace a hard reg, because hard regs can appear
2573 in more than one machine mode, and we must preserve the mode
2574 of each occurrence. Also, some hard regs appear in
2575 MEMs that are shared and mustn't be altered. Don't try to
2576 replace any reg that maps to a reg of class NO_REGS. */
2577 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2578 || ! REGNO_QTY_VALID_P (REGNO (x)))
2579 return x;
2581 q = REG_QTY (REGNO(x));
2582 ent = &qty_table[q];
2583 first = ent->first_reg;
2584 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2585 : REGNO_REG_CLASS (first) == NO_REGS ? x
2586 : gen_rtx_REG (ent->mode, first));
2589 default:
2590 break;
2593 fmt = GET_RTX_FORMAT (code);
2594 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2596 register int j;
2598 if (fmt[i] == 'e')
2600 rtx new = canon_reg (XEXP (x, i), insn);
2601 int insn_code;
2603 /* If replacing pseudo with hard reg or vice versa, ensure the
2604 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2605 if (insn != 0 && new != 0
2606 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2607 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2608 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2609 || (insn_code = recog_memoized (insn)) < 0
2610 || insn_data[insn_code].n_dups > 0))
2611 validate_change (insn, &XEXP (x, i), new, 1);
2612 else
2613 XEXP (x, i) = new;
2615 else if (fmt[i] == 'E')
2616 for (j = 0; j < XVECLEN (x, i); j++)
2617 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2620 return x;
2623 /* LOC is a location within INSN that is an operand address (the contents of
2624 a MEM). Find the best equivalent address to use that is valid for this
2625 insn.
2627 On most CISC machines, complicated address modes are costly, and rtx_cost
2628 is a good approximation for that cost. However, most RISC machines have
2629 only a few (usually only one) memory reference formats. If an address is
2630 valid at all, it is often just as cheap as any other address. Hence, for
2631 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2632 costs of various addresses. For two addresses of equal cost, choose the one
2633 with the highest `rtx_cost' value as that has the potential of eliminating
2634 the most insns. For equal costs, we choose the first in the equivalence
2635 class. Note that we ignore the fact that pseudo registers are cheaper
2636 than hard registers here because we would also prefer the pseudo registers.
2639 static void
2640 find_best_addr (insn, loc)
2641 rtx insn;
2642 rtx *loc;
2644 struct table_elt *elt;
2645 rtx addr = *loc;
2646 #ifdef ADDRESS_COST
2647 struct table_elt *p;
2648 int found_better = 1;
2649 #endif
2650 int save_do_not_record = do_not_record;
2651 int save_hash_arg_in_memory = hash_arg_in_memory;
2652 int addr_volatile;
2653 int regno;
2654 unsigned hash;
2656 /* Do not try to replace constant addresses or addresses of local and
2657 argument slots. These MEM expressions are made only once and inserted
2658 in many instructions, as well as being used to control symbol table
2659 output. It is not safe to clobber them.
2661 There are some uncommon cases where the address is already in a register
2662 for some reason, but we cannot take advantage of that because we have
2663 no easy way to unshare the MEM. In addition, looking up all stack
2664 addresses is costly. */
2665 if ((GET_CODE (addr) == PLUS
2666 && GET_CODE (XEXP (addr, 0)) == REG
2667 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2668 && (regno = REGNO (XEXP (addr, 0)),
2669 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2670 || regno == ARG_POINTER_REGNUM))
2671 || (GET_CODE (addr) == REG
2672 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2673 || regno == HARD_FRAME_POINTER_REGNUM
2674 || regno == ARG_POINTER_REGNUM))
2675 || GET_CODE (addr) == ADDRESSOF
2676 || CONSTANT_ADDRESS_P (addr))
2677 return;
2679 /* If this address is not simply a register, try to fold it. This will
2680 sometimes simplify the expression. Many simplifications
2681 will not be valid, but some, usually applying the associative rule, will
2682 be valid and produce better code. */
2683 if (GET_CODE (addr) != REG)
2685 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2687 if (1
2688 #ifdef ADDRESS_COST
2689 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2690 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2691 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2692 #else
2693 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2694 #endif
2695 && validate_change (insn, loc, folded, 0))
2696 addr = folded;
2699 /* If this address is not in the hash table, we can't look for equivalences
2700 of the whole address. Also, ignore if volatile. */
2702 do_not_record = 0;
2703 hash = HASH (addr, Pmode);
2704 addr_volatile = do_not_record;
2705 do_not_record = save_do_not_record;
2706 hash_arg_in_memory = save_hash_arg_in_memory;
2708 if (addr_volatile)
2709 return;
2711 elt = lookup (addr, hash, Pmode);
2713 #ifndef ADDRESS_COST
2714 if (elt)
2716 int our_cost = elt->cost;
2718 /* Find the lowest cost below ours that works. */
2719 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2720 if (elt->cost < our_cost
2721 && (GET_CODE (elt->exp) == REG
2722 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2723 && validate_change (insn, loc,
2724 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2725 return;
2727 #else
2729 if (elt)
2731 /* We need to find the best (under the criteria documented above) entry
2732 in the class that is valid. We use the `flag' field to indicate
2733 choices that were invalid and iterate until we can't find a better
2734 one that hasn't already been tried. */
2736 for (p = elt->first_same_value; p; p = p->next_same_value)
2737 p->flag = 0;
2739 while (found_better)
2741 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2742 int best_rtx_cost = (elt->cost + 1) >> 1;
2743 struct table_elt *best_elt = elt;
2745 found_better = 0;
2746 for (p = elt->first_same_value; p; p = p->next_same_value)
2747 if (! p->flag)
2749 if ((GET_CODE (p->exp) == REG
2750 || exp_equiv_p (p->exp, p->exp, 1, 0))
2751 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2752 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2753 && (p->cost + 1) >> 1 > best_rtx_cost)))
2755 found_better = 1;
2756 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2757 best_rtx_cost = (p->cost + 1) >> 1;
2758 best_elt = p;
2762 if (found_better)
2764 if (validate_change (insn, loc,
2765 canon_reg (copy_rtx (best_elt->exp),
2766 NULL_RTX), 0))
2767 return;
2768 else
2769 best_elt->flag = 1;
2774 /* If the address is a binary operation with the first operand a register
2775 and the second a constant, do the same as above, but looking for
2776 equivalences of the register. Then try to simplify before checking for
2777 the best address to use. This catches a few cases: First is when we
2778 have REG+const and the register is another REG+const. We can often merge
2779 the constants and eliminate one insn and one register. It may also be
2780 that a machine has a cheap REG+REG+const. Finally, this improves the
2781 code on the Alpha for unaligned byte stores. */
2783 if (flag_expensive_optimizations
2784 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2785 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2786 && GET_CODE (XEXP (*loc, 0)) == REG
2787 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2789 rtx c = XEXP (*loc, 1);
2791 do_not_record = 0;
2792 hash = HASH (XEXP (*loc, 0), Pmode);
2793 do_not_record = save_do_not_record;
2794 hash_arg_in_memory = save_hash_arg_in_memory;
2796 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2797 if (elt == 0)
2798 return;
2800 /* We need to find the best (under the criteria documented above) entry
2801 in the class that is valid. We use the `flag' field to indicate
2802 choices that were invalid and iterate until we can't find a better
2803 one that hasn't already been tried. */
2805 for (p = elt->first_same_value; p; p = p->next_same_value)
2806 p->flag = 0;
2808 while (found_better)
2810 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2811 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2812 struct table_elt *best_elt = elt;
2813 rtx best_rtx = *loc;
2814 int count;
2816 /* This is at worst case an O(n^2) algorithm, so limit our search
2817 to the first 32 elements on the list. This avoids trouble
2818 compiling code with very long basic blocks that can easily
2819 call simplify_gen_binary so many times that we run out of
2820 memory. */
2822 found_better = 0;
2823 for (p = elt->first_same_value, count = 0;
2824 p && count < 32;
2825 p = p->next_same_value, count++)
2826 if (! p->flag
2827 && (GET_CODE (p->exp) == REG
2828 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2830 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2831 p->exp, c);
2833 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2834 || (CSE_ADDRESS_COST (new) == best_addr_cost
2835 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2837 found_better = 1;
2838 best_addr_cost = CSE_ADDRESS_COST (new);
2839 best_rtx_cost = (COST (new) + 1) >> 1;
2840 best_elt = p;
2841 best_rtx = new;
2845 if (found_better)
2847 if (validate_change (insn, loc,
2848 canon_reg (copy_rtx (best_rtx),
2849 NULL_RTX), 0))
2850 return;
2851 else
2852 best_elt->flag = 1;
2856 #endif
2859 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2860 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2861 what values are being compared.
2863 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2864 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2865 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2866 compared to produce cc0.
2868 The return value is the comparison operator and is either the code of
2869 A or the code corresponding to the inverse of the comparison. */
2871 static enum rtx_code
2872 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2873 enum rtx_code code;
2874 rtx *parg1, *parg2;
2875 enum machine_mode *pmode1, *pmode2;
2877 rtx arg1, arg2;
2879 arg1 = *parg1, arg2 = *parg2;
2881 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2883 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2885 /* Set non-zero when we find something of interest. */
2886 rtx x = 0;
2887 int reverse_code = 0;
2888 struct table_elt *p = 0;
2890 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2891 On machines with CC0, this is the only case that can occur, since
2892 fold_rtx will return the COMPARE or item being compared with zero
2893 when given CC0. */
2895 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2896 x = arg1;
2898 /* If ARG1 is a comparison operator and CODE is testing for
2899 STORE_FLAG_VALUE, get the inner arguments. */
2901 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2903 if (code == NE
2904 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2905 && code == LT && STORE_FLAG_VALUE == -1)
2906 #ifdef FLOAT_STORE_FLAG_VALUE
2907 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2908 && FLOAT_STORE_FLAG_VALUE < 0)
2909 #endif
2911 x = arg1;
2912 else if (code == EQ
2913 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2914 && code == GE && STORE_FLAG_VALUE == -1)
2915 #ifdef FLOAT_STORE_FLAG_VALUE
2916 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2917 && FLOAT_STORE_FLAG_VALUE < 0)
2918 #endif
2920 x = arg1, reverse_code = 1;
2923 /* ??? We could also check for
2925 (ne (and (eq (...) (const_int 1))) (const_int 0))
2927 and related forms, but let's wait until we see them occurring. */
2929 if (x == 0)
2930 /* Look up ARG1 in the hash table and see if it has an equivalence
2931 that lets us see what is being compared. */
2932 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) & HASH_MASK,
2933 GET_MODE (arg1));
2934 if (p) p = p->first_same_value;
2936 for (; p; p = p->next_same_value)
2938 enum machine_mode inner_mode = GET_MODE (p->exp);
2940 /* If the entry isn't valid, skip it. */
2941 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2942 continue;
2944 if (GET_CODE (p->exp) == COMPARE
2945 /* Another possibility is that this machine has a compare insn
2946 that includes the comparison code. In that case, ARG1 would
2947 be equivalent to a comparison operation that would set ARG1 to
2948 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2949 ORIG_CODE is the actual comparison being done; if it is an EQ,
2950 we must reverse ORIG_CODE. On machine with a negative value
2951 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2952 || ((code == NE
2953 || (code == LT
2954 && GET_MODE_CLASS (inner_mode) == MODE_INT
2955 && (GET_MODE_BITSIZE (inner_mode)
2956 <= HOST_BITS_PER_WIDE_INT)
2957 && (STORE_FLAG_VALUE
2958 & ((HOST_WIDE_INT) 1
2959 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2960 #ifdef FLOAT_STORE_FLAG_VALUE
2961 || (code == LT
2962 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2963 && FLOAT_STORE_FLAG_VALUE < 0)
2964 #endif
2966 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2968 x = p->exp;
2969 break;
2971 else if ((code == EQ
2972 || (code == GE
2973 && GET_MODE_CLASS (inner_mode) == MODE_INT
2974 && (GET_MODE_BITSIZE (inner_mode)
2975 <= HOST_BITS_PER_WIDE_INT)
2976 && (STORE_FLAG_VALUE
2977 & ((HOST_WIDE_INT) 1
2978 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2979 #ifdef FLOAT_STORE_FLAG_VALUE
2980 || (code == GE
2981 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2982 && FLOAT_STORE_FLAG_VALUE < 0)
2983 #endif
2985 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2987 reverse_code = 1;
2988 x = p->exp;
2989 break;
2992 /* If this is fp + constant, the equivalent is a better operand since
2993 it may let us predict the value of the comparison. */
2994 else if (NONZERO_BASE_PLUS_P (p->exp))
2996 arg1 = p->exp;
2997 continue;
3001 /* If we didn't find a useful equivalence for ARG1, we are done.
3002 Otherwise, set up for the next iteration. */
3003 if (x == 0)
3004 break;
3006 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
3007 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
3008 code = GET_CODE (x);
3010 if (reverse_code)
3011 code = reverse_condition (code);
3014 /* Return our results. Return the modes from before fold_rtx
3015 because fold_rtx might produce const_int, and then it's too late. */
3016 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
3017 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
3019 return code;
3022 /* If X is a nontrivial arithmetic operation on an argument
3023 for which a constant value can be determined, return
3024 the result of operating on that value, as a constant.
3025 Otherwise, return X, possibly with one or more operands
3026 modified by recursive calls to this function.
3028 If X is a register whose contents are known, we do NOT
3029 return those contents here. equiv_constant is called to
3030 perform that task.
3032 INSN is the insn that we may be modifying. If it is 0, make a copy
3033 of X before modifying it. */
3035 static rtx
3036 fold_rtx (x, insn)
3037 rtx x;
3038 rtx insn;
3040 register enum rtx_code code;
3041 register enum machine_mode mode;
3042 register const char *fmt;
3043 register int i;
3044 rtx new = 0;
3045 int copied = 0;
3046 int must_swap = 0;
3048 /* Folded equivalents of first two operands of X. */
3049 rtx folded_arg0;
3050 rtx folded_arg1;
3052 /* Constant equivalents of first three operands of X;
3053 0 when no such equivalent is known. */
3054 rtx const_arg0;
3055 rtx const_arg1;
3056 rtx const_arg2;
3058 /* The mode of the first operand of X. We need this for sign and zero
3059 extends. */
3060 enum machine_mode mode_arg0;
3062 if (x == 0)
3063 return x;
3065 mode = GET_MODE (x);
3066 code = GET_CODE (x);
3067 switch (code)
3069 case CONST:
3070 case CONST_INT:
3071 case CONST_DOUBLE:
3072 case SYMBOL_REF:
3073 case LABEL_REF:
3074 case REG:
3075 /* No use simplifying an EXPR_LIST
3076 since they are used only for lists of args
3077 in a function call's REG_EQUAL note. */
3078 case EXPR_LIST:
3079 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3080 want to (e.g.,) make (addressof (const_int 0)) just because
3081 the location is known to be zero. */
3082 case ADDRESSOF:
3083 return x;
3085 #ifdef HAVE_cc0
3086 case CC0:
3087 return prev_insn_cc0;
3088 #endif
3090 case PC:
3091 /* If the next insn is a CODE_LABEL followed by a jump table,
3092 PC's value is a LABEL_REF pointing to that label. That
3093 lets us fold switch statements on the Vax. */
3094 if (insn && GET_CODE (insn) == JUMP_INSN)
3096 rtx next = next_nonnote_insn (insn);
3098 if (next && GET_CODE (next) == CODE_LABEL
3099 && NEXT_INSN (next) != 0
3100 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3101 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3102 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3103 return gen_rtx_LABEL_REF (Pmode, next);
3105 break;
3107 case SUBREG:
3108 /* See if we previously assigned a constant value to this SUBREG. */
3109 if ((new = lookup_as_function (x, CONST_INT)) != 0
3110 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3111 return new;
3113 /* If this is a paradoxical SUBREG, we have no idea what value the
3114 extra bits would have. However, if the operand is equivalent
3115 to a SUBREG whose operand is the same as our mode, and all the
3116 modes are within a word, we can just use the inner operand
3117 because these SUBREGs just say how to treat the register.
3119 Similarly if we find an integer constant. */
3121 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3123 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3124 struct table_elt *elt;
3126 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3127 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3128 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3129 imode)) != 0)
3130 for (elt = elt->first_same_value;
3131 elt; elt = elt->next_same_value)
3133 if (CONSTANT_P (elt->exp)
3134 && GET_MODE (elt->exp) == VOIDmode)
3135 return elt->exp;
3137 if (GET_CODE (elt->exp) == SUBREG
3138 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3139 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3140 return copy_rtx (SUBREG_REG (elt->exp));
3143 return x;
3146 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3147 We might be able to if the SUBREG is extracting a single word in an
3148 integral mode or extracting the low part. */
3150 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3151 const_arg0 = equiv_constant (folded_arg0);
3152 if (const_arg0)
3153 folded_arg0 = const_arg0;
3155 if (folded_arg0 != SUBREG_REG (x))
3157 new = 0;
3159 if (GET_MODE_CLASS (mode) == MODE_INT
3160 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3161 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3162 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3163 GET_MODE (SUBREG_REG (x)));
3164 if (new == 0 && subreg_lowpart_p (x))
3165 new = gen_lowpart_if_possible (mode, folded_arg0);
3166 if (new)
3167 return new;
3170 /* If this is a narrowing SUBREG and our operand is a REG, see if
3171 we can find an equivalence for REG that is an arithmetic operation
3172 in a wider mode where both operands are paradoxical SUBREGs
3173 from objects of our result mode. In that case, we couldn't report
3174 an equivalent value for that operation, since we don't know what the
3175 extra bits will be. But we can find an equivalence for this SUBREG
3176 by folding that operation is the narrow mode. This allows us to
3177 fold arithmetic in narrow modes when the machine only supports
3178 word-sized arithmetic.
3180 Also look for a case where we have a SUBREG whose operand is the
3181 same as our result. If both modes are smaller than a word, we
3182 are simply interpreting a register in different modes and we
3183 can use the inner value. */
3185 if (GET_CODE (folded_arg0) == REG
3186 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3187 && subreg_lowpart_p (x))
3189 struct table_elt *elt;
3191 /* We can use HASH here since we know that canon_hash won't be
3192 called. */
3193 elt = lookup (folded_arg0,
3194 HASH (folded_arg0, GET_MODE (folded_arg0)),
3195 GET_MODE (folded_arg0));
3197 if (elt)
3198 elt = elt->first_same_value;
3200 for (; elt; elt = elt->next_same_value)
3202 enum rtx_code eltcode = GET_CODE (elt->exp);
3204 /* Just check for unary and binary operations. */
3205 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3206 && GET_CODE (elt->exp) != SIGN_EXTEND
3207 && GET_CODE (elt->exp) != ZERO_EXTEND
3208 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3209 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3211 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3213 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3214 op0 = fold_rtx (op0, NULL_RTX);
3216 op0 = equiv_constant (op0);
3217 if (op0)
3218 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3219 op0, mode);
3221 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3222 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3223 && eltcode != DIV && eltcode != MOD
3224 && eltcode != UDIV && eltcode != UMOD
3225 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3226 && eltcode != ROTATE && eltcode != ROTATERT
3227 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3228 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3229 == mode))
3230 || CONSTANT_P (XEXP (elt->exp, 0)))
3231 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3232 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3233 == mode))
3234 || CONSTANT_P (XEXP (elt->exp, 1))))
3236 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3237 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3239 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3240 op0 = fold_rtx (op0, NULL_RTX);
3242 if (op0)
3243 op0 = equiv_constant (op0);
3245 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3246 op1 = fold_rtx (op1, NULL_RTX);
3248 if (op1)
3249 op1 = equiv_constant (op1);
3251 /* If we are looking for the low SImode part of
3252 (ashift:DI c (const_int 32)), it doesn't work
3253 to compute that in SImode, because a 32-bit shift
3254 in SImode is unpredictable. We know the value is 0. */
3255 if (op0 && op1
3256 && GET_CODE (elt->exp) == ASHIFT
3257 && GET_CODE (op1) == CONST_INT
3258 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3260 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3262 /* If the count fits in the inner mode's width,
3263 but exceeds the outer mode's width,
3264 the value will get truncated to 0
3265 by the subreg. */
3266 new = const0_rtx;
3267 else
3268 /* If the count exceeds even the inner mode's width,
3269 don't fold this expression. */
3270 new = 0;
3272 else if (op0 && op1)
3273 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3274 op0, op1);
3277 else if (GET_CODE (elt->exp) == SUBREG
3278 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3279 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3280 <= UNITS_PER_WORD)
3281 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3282 new = copy_rtx (SUBREG_REG (elt->exp));
3284 if (new)
3285 return new;
3289 return x;
3291 case NOT:
3292 case NEG:
3293 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3294 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3295 new = lookup_as_function (XEXP (x, 0), code);
3296 if (new)
3297 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3298 break;
3300 case MEM:
3301 /* If we are not actually processing an insn, don't try to find the
3302 best address. Not only don't we care, but we could modify the
3303 MEM in an invalid way since we have no insn to validate against. */
3304 if (insn != 0)
3305 find_best_addr (insn, &XEXP (x, 0));
3308 /* Even if we don't fold in the insn itself,
3309 we can safely do so here, in hopes of getting a constant. */
3310 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3311 rtx base = 0;
3312 HOST_WIDE_INT offset = 0;
3314 if (GET_CODE (addr) == REG
3315 && REGNO_QTY_VALID_P (REGNO (addr)))
3317 int addr_q = REG_QTY (REGNO (addr));
3318 struct qty_table_elem *addr_ent = &qty_table[addr_q];
3320 if (GET_MODE (addr) == addr_ent->mode
3321 && addr_ent->const_rtx != NULL_RTX)
3322 addr = addr_ent->const_rtx;
3325 /* If address is constant, split it into a base and integer offset. */
3326 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3327 base = addr;
3328 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3329 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3331 base = XEXP (XEXP (addr, 0), 0);
3332 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3334 else if (GET_CODE (addr) == LO_SUM
3335 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3336 base = XEXP (addr, 1);
3337 else if (GET_CODE (addr) == ADDRESSOF)
3338 return change_address (x, VOIDmode, addr);
3340 /* If this is a constant pool reference, we can fold it into its
3341 constant to allow better value tracking. */
3342 if (base && GET_CODE (base) == SYMBOL_REF
3343 && CONSTANT_POOL_ADDRESS_P (base))
3345 rtx constant = get_pool_constant (base);
3346 enum machine_mode const_mode = get_pool_mode (base);
3347 rtx new;
3349 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3350 constant_pool_entries_cost = COST (constant);
3352 /* If we are loading the full constant, we have an equivalence. */
3353 if (offset == 0 && mode == const_mode)
3354 return constant;
3356 /* If this actually isn't a constant (weird!), we can't do
3357 anything. Otherwise, handle the two most common cases:
3358 extracting a word from a multi-word constant, and extracting
3359 the low-order bits. Other cases don't seem common enough to
3360 worry about. */
3361 if (! CONSTANT_P (constant))
3362 return x;
3364 if (GET_MODE_CLASS (mode) == MODE_INT
3365 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3366 && offset % UNITS_PER_WORD == 0
3367 && (new = operand_subword (constant,
3368 offset / UNITS_PER_WORD,
3369 0, const_mode)) != 0)
3370 return new;
3372 if (((BYTES_BIG_ENDIAN
3373 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3374 || (! BYTES_BIG_ENDIAN && offset == 0))
3375 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3376 return new;
3379 /* If this is a reference to a label at a known position in a jump
3380 table, we also know its value. */
3381 if (base && GET_CODE (base) == LABEL_REF)
3383 rtx label = XEXP (base, 0);
3384 rtx table_insn = NEXT_INSN (label);
3386 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3387 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3389 rtx table = PATTERN (table_insn);
3391 if (offset >= 0
3392 && (offset / GET_MODE_SIZE (GET_MODE (table))
3393 < XVECLEN (table, 0)))
3394 return XVECEXP (table, 0,
3395 offset / GET_MODE_SIZE (GET_MODE (table)));
3397 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3398 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3400 rtx table = PATTERN (table_insn);
3402 if (offset >= 0
3403 && (offset / GET_MODE_SIZE (GET_MODE (table))
3404 < XVECLEN (table, 1)))
3406 offset /= GET_MODE_SIZE (GET_MODE (table));
3407 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3408 XEXP (table, 0));
3410 if (GET_MODE (table) != Pmode)
3411 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3413 /* Indicate this is a constant. This isn't a
3414 valid form of CONST, but it will only be used
3415 to fold the next insns and then discarded, so
3416 it should be safe.
3418 Note this expression must be explicitly discarded,
3419 by cse_insn, else it may end up in a REG_EQUAL note
3420 and "escape" to cause problems elsewhere. */
3421 return gen_rtx_CONST (GET_MODE (new), new);
3426 return x;
3429 case ASM_OPERANDS:
3430 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3431 validate_change (insn, &XVECEXP (x, 3, i),
3432 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3433 break;
3435 default:
3436 break;
3439 const_arg0 = 0;
3440 const_arg1 = 0;
3441 const_arg2 = 0;
3442 mode_arg0 = VOIDmode;
3444 /* Try folding our operands.
3445 Then see which ones have constant values known. */
3447 fmt = GET_RTX_FORMAT (code);
3448 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3449 if (fmt[i] == 'e')
3451 rtx arg = XEXP (x, i);
3452 rtx folded_arg = arg, const_arg = 0;
3453 enum machine_mode mode_arg = GET_MODE (arg);
3454 rtx cheap_arg, expensive_arg;
3455 rtx replacements[2];
3456 int j;
3458 /* Most arguments are cheap, so handle them specially. */
3459 switch (GET_CODE (arg))
3461 case REG:
3462 /* This is the same as calling equiv_constant; it is duplicated
3463 here for speed. */
3464 if (REGNO_QTY_VALID_P (REGNO (arg)))
3466 int arg_q = REG_QTY (REGNO (arg));
3467 struct qty_table_elem *arg_ent = &qty_table[arg_q];
3469 if (arg_ent->const_rtx != NULL_RTX
3470 && GET_CODE (arg_ent->const_rtx) != REG
3471 && GET_CODE (arg_ent->const_rtx) != PLUS)
3472 const_arg
3473 = gen_lowpart_if_possible (GET_MODE (arg),
3474 arg_ent->const_rtx);
3476 break;
3478 case CONST:
3479 case CONST_INT:
3480 case SYMBOL_REF:
3481 case LABEL_REF:
3482 case CONST_DOUBLE:
3483 const_arg = arg;
3484 break;
3486 #ifdef HAVE_cc0
3487 case CC0:
3488 folded_arg = prev_insn_cc0;
3489 mode_arg = prev_insn_cc0_mode;
3490 const_arg = equiv_constant (folded_arg);
3491 break;
3492 #endif
3494 default:
3495 folded_arg = fold_rtx (arg, insn);
3496 const_arg = equiv_constant (folded_arg);
3499 /* For the first three operands, see if the operand
3500 is constant or equivalent to a constant. */
3501 switch (i)
3503 case 0:
3504 folded_arg0 = folded_arg;
3505 const_arg0 = const_arg;
3506 mode_arg0 = mode_arg;
3507 break;
3508 case 1:
3509 folded_arg1 = folded_arg;
3510 const_arg1 = const_arg;
3511 break;
3512 case 2:
3513 const_arg2 = const_arg;
3514 break;
3517 /* Pick the least expensive of the folded argument and an
3518 equivalent constant argument. */
3519 if (const_arg == 0 || const_arg == folded_arg
3520 || COST (const_arg) > COST (folded_arg))
3521 cheap_arg = folded_arg, expensive_arg = const_arg;
3522 else
3523 cheap_arg = const_arg, expensive_arg = folded_arg;
3525 /* Try to replace the operand with the cheapest of the two
3526 possibilities. If it doesn't work and this is either of the first
3527 two operands of a commutative operation, try swapping them.
3528 If THAT fails, try the more expensive, provided it is cheaper
3529 than what is already there. */
3531 if (cheap_arg == XEXP (x, i))
3532 continue;
3534 if (insn == 0 && ! copied)
3536 x = copy_rtx (x);
3537 copied = 1;
3540 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3541 for (j = 0;
3542 j < 2 && replacements[j]
3543 && COST (replacements[j]) < COST (XEXP (x, i));
3544 j++)
3546 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3547 break;
3549 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3551 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3552 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3554 if (apply_change_group ())
3556 /* Swap them back to be invalid so that this loop can
3557 continue and flag them to be swapped back later. */
3558 rtx tem;
3560 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3561 XEXP (x, 1) = tem;
3562 must_swap = 1;
3563 break;
3569 else
3571 if (fmt[i] == 'E')
3572 /* Don't try to fold inside of a vector of expressions.
3573 Doing nothing is harmless. */
3574 {;}
3577 /* If a commutative operation, place a constant integer as the second
3578 operand unless the first operand is also a constant integer. Otherwise,
3579 place any constant second unless the first operand is also a constant. */
3581 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3583 if (must_swap || (const_arg0
3584 && (const_arg1 == 0
3585 || (GET_CODE (const_arg0) == CONST_INT
3586 && GET_CODE (const_arg1) != CONST_INT))))
3588 register rtx tem = XEXP (x, 0);
3590 if (insn == 0 && ! copied)
3592 x = copy_rtx (x);
3593 copied = 1;
3596 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3597 validate_change (insn, &XEXP (x, 1), tem, 1);
3598 if (apply_change_group ())
3600 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3601 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3606 /* If X is an arithmetic operation, see if we can simplify it. */
3608 switch (GET_RTX_CLASS (code))
3610 case '1':
3612 int is_const = 0;
3614 /* We can't simplify extension ops unless we know the
3615 original mode. */
3616 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3617 && mode_arg0 == VOIDmode)
3618 break;
3620 /* If we had a CONST, strip it off and put it back later if we
3621 fold. */
3622 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3623 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3625 new = simplify_unary_operation (code, mode,
3626 const_arg0 ? const_arg0 : folded_arg0,
3627 mode_arg0);
3628 if (new != 0 && is_const)
3629 new = gen_rtx_CONST (mode, new);
3631 break;
3633 case '<':
3634 /* See what items are actually being compared and set FOLDED_ARG[01]
3635 to those values and CODE to the actual comparison code. If any are
3636 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3637 do anything if both operands are already known to be constant. */
3639 if (const_arg0 == 0 || const_arg1 == 0)
3641 struct table_elt *p0, *p1;
3642 rtx true = const_true_rtx, false = const0_rtx;
3643 enum machine_mode mode_arg1;
3645 #ifdef FLOAT_STORE_FLAG_VALUE
3646 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3648 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3649 mode);
3650 false = CONST0_RTX (mode);
3652 #endif
3654 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3655 &mode_arg0, &mode_arg1);
3656 const_arg0 = equiv_constant (folded_arg0);
3657 const_arg1 = equiv_constant (folded_arg1);
3659 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3660 what kinds of things are being compared, so we can't do
3661 anything with this comparison. */
3663 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3664 break;
3666 /* If we do not now have two constants being compared, see
3667 if we can nevertheless deduce some things about the
3668 comparison. */
3669 if (const_arg0 == 0 || const_arg1 == 0)
3671 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3672 non-explicit constant? These aren't zero, but we
3673 don't know their sign. */
3674 if (const_arg1 == const0_rtx
3675 && (NONZERO_BASE_PLUS_P (folded_arg0)
3676 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3677 come out as 0. */
3678 || GET_CODE (folded_arg0) == SYMBOL_REF
3679 #endif
3680 || GET_CODE (folded_arg0) == LABEL_REF
3681 || GET_CODE (folded_arg0) == CONST))
3683 if (code == EQ)
3684 return false;
3685 else if (code == NE)
3686 return true;
3689 /* See if the two operands are the same. We don't do this
3690 for IEEE floating-point since we can't assume x == x
3691 since x might be a NaN. */
3693 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3694 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3695 && (folded_arg0 == folded_arg1
3696 || (GET_CODE (folded_arg0) == REG
3697 && GET_CODE (folded_arg1) == REG
3698 && (REG_QTY (REGNO (folded_arg0))
3699 == REG_QTY (REGNO (folded_arg1))))
3700 || ((p0 = lookup (folded_arg0,
3701 (safe_hash (folded_arg0, mode_arg0)
3702 & HASH_MASK), mode_arg0))
3703 && (p1 = lookup (folded_arg1,
3704 (safe_hash (folded_arg1, mode_arg0)
3705 & HASH_MASK), mode_arg0))
3706 && p0->first_same_value == p1->first_same_value)))
3707 return ((code == EQ || code == LE || code == GE
3708 || code == LEU || code == GEU)
3709 ? true : false);
3711 /* If FOLDED_ARG0 is a register, see if the comparison we are
3712 doing now is either the same as we did before or the reverse
3713 (we only check the reverse if not floating-point). */
3714 else if (GET_CODE (folded_arg0) == REG)
3716 int qty = REG_QTY (REGNO (folded_arg0));
3718 if (REGNO_QTY_VALID_P (REGNO (folded_arg0)))
3720 struct qty_table_elem *ent = &qty_table[qty];
3722 if ((comparison_dominates_p (ent->comparison_code, code)
3723 || (comparison_dominates_p (ent->comparison_code,
3724 reverse_condition (code))
3725 && ! FLOAT_MODE_P (mode_arg0)))
3726 && (rtx_equal_p (ent->comparison_const, folded_arg1)
3727 || (const_arg1
3728 && rtx_equal_p (ent->comparison_const,
3729 const_arg1))
3730 || (GET_CODE (folded_arg1) == REG
3731 && (REG_QTY (REGNO (folded_arg1)) == ent->comparison_qty))))
3732 return (comparison_dominates_p (ent->comparison_code, code)
3733 ? true : false);
3739 /* If we are comparing against zero, see if the first operand is
3740 equivalent to an IOR with a constant. If so, we may be able to
3741 determine the result of this comparison. */
3743 if (const_arg1 == const0_rtx)
3745 rtx y = lookup_as_function (folded_arg0, IOR);
3746 rtx inner_const;
3748 if (y != 0
3749 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3750 && GET_CODE (inner_const) == CONST_INT
3751 && INTVAL (inner_const) != 0)
3753 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3754 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3755 && (INTVAL (inner_const)
3756 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3757 rtx true = const_true_rtx, false = const0_rtx;
3759 #ifdef FLOAT_STORE_FLAG_VALUE
3760 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3762 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3763 mode);
3764 false = CONST0_RTX (mode);
3766 #endif
3768 switch (code)
3770 case EQ:
3771 return false;
3772 case NE:
3773 return true;
3774 case LT: case LE:
3775 if (has_sign)
3776 return true;
3777 break;
3778 case GT: case GE:
3779 if (has_sign)
3780 return false;
3781 break;
3782 default:
3783 break;
3788 new = simplify_relational_operation (code, mode_arg0,
3789 const_arg0 ? const_arg0 : folded_arg0,
3790 const_arg1 ? const_arg1 : folded_arg1);
3791 #ifdef FLOAT_STORE_FLAG_VALUE
3792 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3793 new = ((new == const0_rtx) ? CONST0_RTX (mode)
3794 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
3795 #endif
3796 break;
3798 case '2':
3799 case 'c':
3800 switch (code)
3802 case PLUS:
3803 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3804 with that LABEL_REF as its second operand. If so, the result is
3805 the first operand of that MINUS. This handles switches with an
3806 ADDR_DIFF_VEC table. */
3807 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3809 rtx y
3810 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3811 : lookup_as_function (folded_arg0, MINUS);
3813 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3814 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3815 return XEXP (y, 0);
3817 /* Now try for a CONST of a MINUS like the above. */
3818 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3819 : lookup_as_function (folded_arg0, CONST))) != 0
3820 && GET_CODE (XEXP (y, 0)) == MINUS
3821 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3822 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
3823 return XEXP (XEXP (y, 0), 0);
3826 /* Likewise if the operands are in the other order. */
3827 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3829 rtx y
3830 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3831 : lookup_as_function (folded_arg1, MINUS);
3833 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3834 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3835 return XEXP (y, 0);
3837 /* Now try for a CONST of a MINUS like the above. */
3838 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3839 : lookup_as_function (folded_arg1, CONST))) != 0
3840 && GET_CODE (XEXP (y, 0)) == MINUS
3841 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3842 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
3843 return XEXP (XEXP (y, 0), 0);
3846 /* If second operand is a register equivalent to a negative
3847 CONST_INT, see if we can find a register equivalent to the
3848 positive constant. Make a MINUS if so. Don't do this for
3849 a non-negative constant since we might then alternate between
3850 chosing positive and negative constants. Having the positive
3851 constant previously-used is the more common case. Be sure
3852 the resulting constant is non-negative; if const_arg1 were
3853 the smallest negative number this would overflow: depending
3854 on the mode, this would either just be the same value (and
3855 hence not save anything) or be incorrect. */
3856 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3857 && INTVAL (const_arg1) < 0
3858 /* This used to test
3860 - INTVAL (const_arg1) >= 0
3862 But The Sun V5.0 compilers mis-compiled that test. So
3863 instead we test for the problematic value in a more direct
3864 manner and hope the Sun compilers get it correct. */
3865 && INTVAL (const_arg1) !=
3866 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3867 && GET_CODE (folded_arg1) == REG)
3869 rtx new_const = GEN_INT (- INTVAL (const_arg1));
3870 struct table_elt *p
3871 = lookup (new_const, safe_hash (new_const, mode) & HASH_MASK,
3872 mode);
3874 if (p)
3875 for (p = p->first_same_value; p; p = p->next_same_value)
3876 if (GET_CODE (p->exp) == REG)
3877 return simplify_gen_binary (MINUS, mode, folded_arg0,
3878 canon_reg (p->exp, NULL_RTX));
3880 goto from_plus;
3882 case MINUS:
3883 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3884 If so, produce (PLUS Z C2-C). */
3885 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3887 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3888 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3889 return fold_rtx (plus_constant (copy_rtx (y),
3890 -INTVAL (const_arg1)),
3891 NULL_RTX);
3894 /* ... fall through ... */
3896 from_plus:
3897 case SMIN: case SMAX: case UMIN: case UMAX:
3898 case IOR: case AND: case XOR:
3899 case MULT: case DIV: case UDIV:
3900 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3901 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3902 is known to be of similar form, we may be able to replace the
3903 operation with a combined operation. This may eliminate the
3904 intermediate operation if every use is simplified in this way.
3905 Note that the similar optimization done by combine.c only works
3906 if the intermediate operation's result has only one reference. */
3908 if (GET_CODE (folded_arg0) == REG
3909 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3911 int is_shift
3912 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3913 rtx y = lookup_as_function (folded_arg0, code);
3914 rtx inner_const;
3915 enum rtx_code associate_code;
3916 rtx new_const;
3918 if (y == 0
3919 || 0 == (inner_const
3920 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
3921 || GET_CODE (inner_const) != CONST_INT
3922 /* If we have compiled a statement like
3923 "if (x == (x & mask1))", and now are looking at
3924 "x & mask2", we will have a case where the first operand
3925 of Y is the same as our first operand. Unless we detect
3926 this case, an infinite loop will result. */
3927 || XEXP (y, 0) == folded_arg0)
3928 break;
3930 /* Don't associate these operations if they are a PLUS with the
3931 same constant and it is a power of two. These might be doable
3932 with a pre- or post-increment. Similarly for two subtracts of
3933 identical powers of two with post decrement. */
3935 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
3936 && ((HAVE_PRE_INCREMENT
3937 && exact_log2 (INTVAL (const_arg1)) >= 0)
3938 || (HAVE_POST_INCREMENT
3939 && exact_log2 (INTVAL (const_arg1)) >= 0)
3940 || (HAVE_PRE_DECREMENT
3941 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3942 || (HAVE_POST_DECREMENT
3943 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3944 break;
3946 /* Compute the code used to compose the constants. For example,
3947 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
3949 associate_code
3950 = (code == MULT || code == DIV || code == UDIV ? MULT
3951 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
3953 new_const = simplify_binary_operation (associate_code, mode,
3954 const_arg1, inner_const);
3956 if (new_const == 0)
3957 break;
3959 /* If we are associating shift operations, don't let this
3960 produce a shift of the size of the object or larger.
3961 This could occur when we follow a sign-extend by a right
3962 shift on a machine that does a sign-extend as a pair
3963 of shifts. */
3965 if (is_shift && GET_CODE (new_const) == CONST_INT
3966 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3968 /* As an exception, we can turn an ASHIFTRT of this
3969 form into a shift of the number of bits - 1. */
3970 if (code == ASHIFTRT)
3971 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3972 else
3973 break;
3976 y = copy_rtx (XEXP (y, 0));
3978 /* If Y contains our first operand (the most common way this
3979 can happen is if Y is a MEM), we would do into an infinite
3980 loop if we tried to fold it. So don't in that case. */
3982 if (! reg_mentioned_p (folded_arg0, y))
3983 y = fold_rtx (y, insn);
3985 return simplify_gen_binary (code, mode, y, new_const);
3987 break;
3989 default:
3990 break;
3993 new = simplify_binary_operation (code, mode,
3994 const_arg0 ? const_arg0 : folded_arg0,
3995 const_arg1 ? const_arg1 : folded_arg1);
3996 break;
3998 case 'o':
3999 /* (lo_sum (high X) X) is simply X. */
4000 if (code == LO_SUM && const_arg0 != 0
4001 && GET_CODE (const_arg0) == HIGH
4002 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
4003 return const_arg1;
4004 break;
4006 case '3':
4007 case 'b':
4008 new = simplify_ternary_operation (code, mode, mode_arg0,
4009 const_arg0 ? const_arg0 : folded_arg0,
4010 const_arg1 ? const_arg1 : folded_arg1,
4011 const_arg2 ? const_arg2 : XEXP (x, 2));
4012 break;
4014 case 'x':
4015 /* Always eliminate CONSTANT_P_RTX at this stage. */
4016 if (code == CONSTANT_P_RTX)
4017 return (const_arg0 ? const1_rtx : const0_rtx);
4018 break;
4021 return new ? new : x;
4024 /* Return a constant value currently equivalent to X.
4025 Return 0 if we don't know one. */
4027 static rtx
4028 equiv_constant (x)
4029 rtx x;
4031 if (GET_CODE (x) == REG
4032 && REGNO_QTY_VALID_P (REGNO (x)))
4034 int x_q = REG_QTY (REGNO (x));
4035 struct qty_table_elem *x_ent = &qty_table[x_q];
4037 if (x_ent->const_rtx)
4038 x = gen_lowpart_if_possible (GET_MODE (x), x_ent->const_rtx);
4041 if (x == 0 || CONSTANT_P (x))
4042 return x;
4044 /* If X is a MEM, try to fold it outside the context of any insn to see if
4045 it might be equivalent to a constant. That handles the case where it
4046 is a constant-pool reference. Then try to look it up in the hash table
4047 in case it is something whose value we have seen before. */
4049 if (GET_CODE (x) == MEM)
4051 struct table_elt *elt;
4053 x = fold_rtx (x, NULL_RTX);
4054 if (CONSTANT_P (x))
4055 return x;
4057 elt = lookup (x, safe_hash (x, GET_MODE (x)) & HASH_MASK, GET_MODE (x));
4058 if (elt == 0)
4059 return 0;
4061 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4062 if (elt->is_const && CONSTANT_P (elt->exp))
4063 return elt->exp;
4066 return 0;
4069 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4070 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4071 least-significant part of X.
4072 MODE specifies how big a part of X to return.
4074 If the requested operation cannot be done, 0 is returned.
4076 This is similar to gen_lowpart in emit-rtl.c. */
4079 gen_lowpart_if_possible (mode, x)
4080 enum machine_mode mode;
4081 register rtx x;
4083 rtx result = gen_lowpart_common (mode, x);
4085 if (result)
4086 return result;
4087 else if (GET_CODE (x) == MEM)
4089 /* This is the only other case we handle. */
4090 register int offset = 0;
4091 rtx new;
4093 if (WORDS_BIG_ENDIAN)
4094 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4095 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4096 if (BYTES_BIG_ENDIAN)
4097 /* Adjust the address so that the address-after-the-data is
4098 unchanged. */
4099 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4100 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4101 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4102 if (! memory_address_p (mode, XEXP (new, 0)))
4103 return 0;
4104 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4105 MEM_COPY_ATTRIBUTES (new, x);
4106 return new;
4108 else
4109 return 0;
4112 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4113 branch. It will be zero if not.
4115 In certain cases, this can cause us to add an equivalence. For example,
4116 if we are following the taken case of
4117 if (i == 2)
4118 we can add the fact that `i' and '2' are now equivalent.
4120 In any case, we can record that this comparison was passed. If the same
4121 comparison is seen later, we will know its value. */
4123 static void
4124 record_jump_equiv (insn, taken)
4125 rtx insn;
4126 int taken;
4128 int cond_known_true;
4129 rtx op0, op1;
4130 enum machine_mode mode, mode0, mode1;
4131 int reversed_nonequality = 0;
4132 enum rtx_code code;
4134 /* Ensure this is the right kind of insn. */
4135 if (! condjump_p (insn) || simplejump_p (insn))
4136 return;
4138 /* See if this jump condition is known true or false. */
4139 if (taken)
4140 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4141 else
4142 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4144 /* Get the type of comparison being done and the operands being compared.
4145 If we had to reverse a non-equality condition, record that fact so we
4146 know that it isn't valid for floating-point. */
4147 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4148 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4149 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4151 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4152 if (! cond_known_true)
4154 reversed_nonequality = (code != EQ && code != NE);
4155 code = reverse_condition (code);
4158 /* The mode is the mode of the non-constant. */
4159 mode = mode0;
4160 if (mode1 != VOIDmode)
4161 mode = mode1;
4163 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4166 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4167 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4168 Make any useful entries we can with that information. Called from
4169 above function and called recursively. */
4171 static void
4172 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4173 enum rtx_code code;
4174 enum machine_mode mode;
4175 rtx op0, op1;
4176 int reversed_nonequality;
4178 unsigned op0_hash, op1_hash;
4179 int op0_in_memory, op1_in_memory;
4180 struct table_elt *op0_elt, *op1_elt;
4182 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4183 we know that they are also equal in the smaller mode (this is also
4184 true for all smaller modes whether or not there is a SUBREG, but
4185 is not worth testing for with no SUBREG). */
4187 /* Note that GET_MODE (op0) may not equal MODE. */
4188 if (code == EQ && GET_CODE (op0) == SUBREG
4189 && (GET_MODE_SIZE (GET_MODE (op0))
4190 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4192 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4193 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4195 record_jump_cond (code, mode, SUBREG_REG (op0),
4196 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4197 reversed_nonequality);
4200 if (code == EQ && GET_CODE (op1) == SUBREG
4201 && (GET_MODE_SIZE (GET_MODE (op1))
4202 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4204 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4205 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4207 record_jump_cond (code, mode, SUBREG_REG (op1),
4208 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4209 reversed_nonequality);
4212 /* Similarly, if this is an NE comparison, and either is a SUBREG
4213 making a smaller mode, we know the whole thing is also NE. */
4215 /* Note that GET_MODE (op0) may not equal MODE;
4216 if we test MODE instead, we can get an infinite recursion
4217 alternating between two modes each wider than MODE. */
4219 if (code == NE && GET_CODE (op0) == SUBREG
4220 && subreg_lowpart_p (op0)
4221 && (GET_MODE_SIZE (GET_MODE (op0))
4222 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4224 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4225 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4227 record_jump_cond (code, mode, SUBREG_REG (op0),
4228 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4229 reversed_nonequality);
4232 if (code == NE && GET_CODE (op1) == SUBREG
4233 && subreg_lowpart_p (op1)
4234 && (GET_MODE_SIZE (GET_MODE (op1))
4235 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4237 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4238 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4240 record_jump_cond (code, mode, SUBREG_REG (op1),
4241 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4242 reversed_nonequality);
4245 /* Hash both operands. */
4247 do_not_record = 0;
4248 hash_arg_in_memory = 0;
4249 op0_hash = HASH (op0, mode);
4250 op0_in_memory = hash_arg_in_memory;
4252 if (do_not_record)
4253 return;
4255 do_not_record = 0;
4256 hash_arg_in_memory = 0;
4257 op1_hash = HASH (op1, mode);
4258 op1_in_memory = hash_arg_in_memory;
4260 if (do_not_record)
4261 return;
4263 /* Look up both operands. */
4264 op0_elt = lookup (op0, op0_hash, mode);
4265 op1_elt = lookup (op1, op1_hash, mode);
4267 /* If both operands are already equivalent or if they are not in the
4268 table but are identical, do nothing. */
4269 if ((op0_elt != 0 && op1_elt != 0
4270 && op0_elt->first_same_value == op1_elt->first_same_value)
4271 || op0 == op1 || rtx_equal_p (op0, op1))
4272 return;
4274 /* If we aren't setting two things equal all we can do is save this
4275 comparison. Similarly if this is floating-point. In the latter
4276 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4277 If we record the equality, we might inadvertently delete code
4278 whose intent was to change -0 to +0. */
4280 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4282 struct qty_table_elem *ent;
4283 int qty;
4285 /* If we reversed a floating-point comparison, if OP0 is not a
4286 register, or if OP1 is neither a register or constant, we can't
4287 do anything. */
4289 if (GET_CODE (op1) != REG)
4290 op1 = equiv_constant (op1);
4292 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4293 || GET_CODE (op0) != REG || op1 == 0)
4294 return;
4296 /* Put OP0 in the hash table if it isn't already. This gives it a
4297 new quantity number. */
4298 if (op0_elt == 0)
4300 if (insert_regs (op0, NULL_PTR, 0))
4302 rehash_using_reg (op0);
4303 op0_hash = HASH (op0, mode);
4305 /* If OP0 is contained in OP1, this changes its hash code
4306 as well. Faster to rehash than to check, except
4307 for the simple case of a constant. */
4308 if (! CONSTANT_P (op1))
4309 op1_hash = HASH (op1,mode);
4312 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4313 op0_elt->in_memory = op0_in_memory;
4316 qty = REG_QTY (REGNO (op0));
4317 ent = &qty_table[qty];
4319 ent->comparison_code = code;
4320 if (GET_CODE (op1) == REG)
4322 /* Look it up again--in case op0 and op1 are the same. */
4323 op1_elt = lookup (op1, op1_hash, mode);
4325 /* Put OP1 in the hash table so it gets a new quantity number. */
4326 if (op1_elt == 0)
4328 if (insert_regs (op1, NULL_PTR, 0))
4330 rehash_using_reg (op1);
4331 op1_hash = HASH (op1, mode);
4334 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4335 op1_elt->in_memory = op1_in_memory;
4338 ent->comparison_const = NULL_RTX;
4339 ent->comparison_qty = REG_QTY (REGNO (op1));
4341 else
4343 ent->comparison_const = op1;
4344 ent->comparison_qty = -1;
4347 return;
4350 /* If either side is still missing an equivalence, make it now,
4351 then merge the equivalences. */
4353 if (op0_elt == 0)
4355 if (insert_regs (op0, NULL_PTR, 0))
4357 rehash_using_reg (op0);
4358 op0_hash = HASH (op0, mode);
4361 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4362 op0_elt->in_memory = op0_in_memory;
4365 if (op1_elt == 0)
4367 if (insert_regs (op1, NULL_PTR, 0))
4369 rehash_using_reg (op1);
4370 op1_hash = HASH (op1, mode);
4373 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4374 op1_elt->in_memory = op1_in_memory;
4377 merge_equiv_classes (op0_elt, op1_elt);
4378 last_jump_equiv_class = op0_elt;
4381 /* CSE processing for one instruction.
4382 First simplify sources and addresses of all assignments
4383 in the instruction, using previously-computed equivalents values.
4384 Then install the new sources and destinations in the table
4385 of available values.
4387 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4388 the insn. It means that INSN is inside libcall block. In this
4389 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4391 /* Data on one SET contained in the instruction. */
4393 struct set
4395 /* The SET rtx itself. */
4396 rtx rtl;
4397 /* The SET_SRC of the rtx (the original value, if it is changing). */
4398 rtx src;
4399 /* The hash-table element for the SET_SRC of the SET. */
4400 struct table_elt *src_elt;
4401 /* Hash value for the SET_SRC. */
4402 unsigned src_hash;
4403 /* Hash value for the SET_DEST. */
4404 unsigned dest_hash;
4405 /* The SET_DEST, with SUBREG, etc., stripped. */
4406 rtx inner_dest;
4407 /* Nonzero if the SET_SRC is in memory. */
4408 char src_in_memory;
4409 /* Nonzero if the SET_SRC contains something
4410 whose value cannot be predicted and understood. */
4411 char src_volatile;
4412 /* Original machine mode, in case it becomes a CONST_INT. */
4413 enum machine_mode mode;
4414 /* A constant equivalent for SET_SRC, if any. */
4415 rtx src_const;
4416 /* Original SET_SRC value used for libcall notes. */
4417 rtx orig_src;
4418 /* Hash value of constant equivalent for SET_SRC. */
4419 unsigned src_const_hash;
4420 /* Table entry for constant equivalent for SET_SRC, if any. */
4421 struct table_elt *src_const_elt;
4424 static void
4425 cse_insn (insn, libcall_insn)
4426 rtx insn;
4427 rtx libcall_insn;
4429 register rtx x = PATTERN (insn);
4430 register int i;
4431 rtx tem;
4432 register int n_sets = 0;
4434 #ifdef HAVE_cc0
4435 /* Records what this insn does to set CC0. */
4436 rtx this_insn_cc0 = 0;
4437 enum machine_mode this_insn_cc0_mode = VOIDmode;
4438 #endif
4440 rtx src_eqv = 0;
4441 struct table_elt *src_eqv_elt = 0;
4442 int src_eqv_volatile = 0;
4443 int src_eqv_in_memory = 0;
4444 unsigned src_eqv_hash = 0;
4446 struct set *sets = NULL_PTR;
4448 this_insn = insn;
4450 /* Find all the SETs and CLOBBERs in this instruction.
4451 Record all the SETs in the array `set' and count them.
4452 Also determine whether there is a CLOBBER that invalidates
4453 all memory references, or all references at varying addresses. */
4455 if (GET_CODE (insn) == CALL_INSN)
4457 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4458 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4459 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4462 if (GET_CODE (x) == SET)
4464 sets = (struct set *) alloca (sizeof (struct set));
4465 sets[0].rtl = x;
4467 /* Ignore SETs that are unconditional jumps.
4468 They never need cse processing, so this does not hurt.
4469 The reason is not efficiency but rather
4470 so that we can test at the end for instructions
4471 that have been simplified to unconditional jumps
4472 and not be misled by unchanged instructions
4473 that were unconditional jumps to begin with. */
4474 if (SET_DEST (x) == pc_rtx
4475 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4478 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4479 The hard function value register is used only once, to copy to
4480 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4481 Ensure we invalidate the destination register. On the 80386 no
4482 other code would invalidate it since it is a fixed_reg.
4483 We need not check the return of apply_change_group; see canon_reg. */
4485 else if (GET_CODE (SET_SRC (x)) == CALL)
4487 canon_reg (SET_SRC (x), insn);
4488 apply_change_group ();
4489 fold_rtx (SET_SRC (x), insn);
4490 invalidate (SET_DEST (x), VOIDmode);
4492 else
4493 n_sets = 1;
4495 else if (GET_CODE (x) == PARALLEL)
4497 register int lim = XVECLEN (x, 0);
4499 sets = (struct set *) alloca (lim * sizeof (struct set));
4501 /* Find all regs explicitly clobbered in this insn,
4502 and ensure they are not replaced with any other regs
4503 elsewhere in this insn.
4504 When a reg that is clobbered is also used for input,
4505 we should presume that that is for a reason,
4506 and we should not substitute some other register
4507 which is not supposed to be clobbered.
4508 Therefore, this loop cannot be merged into the one below
4509 because a CALL may precede a CLOBBER and refer to the
4510 value clobbered. We must not let a canonicalization do
4511 anything in that case. */
4512 for (i = 0; i < lim; i++)
4514 register rtx y = XVECEXP (x, 0, i);
4515 if (GET_CODE (y) == CLOBBER)
4517 rtx clobbered = XEXP (y, 0);
4519 if (GET_CODE (clobbered) == REG
4520 || GET_CODE (clobbered) == SUBREG)
4521 invalidate (clobbered, VOIDmode);
4522 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4523 || GET_CODE (clobbered) == ZERO_EXTRACT)
4524 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4528 for (i = 0; i < lim; i++)
4530 register rtx y = XVECEXP (x, 0, i);
4531 if (GET_CODE (y) == SET)
4533 /* As above, we ignore unconditional jumps and call-insns and
4534 ignore the result of apply_change_group. */
4535 if (GET_CODE (SET_SRC (y)) == CALL)
4537 canon_reg (SET_SRC (y), insn);
4538 apply_change_group ();
4539 fold_rtx (SET_SRC (y), insn);
4540 invalidate (SET_DEST (y), VOIDmode);
4542 else if (SET_DEST (y) == pc_rtx
4543 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4545 else
4546 sets[n_sets++].rtl = y;
4548 else if (GET_CODE (y) == CLOBBER)
4550 /* If we clobber memory, canon the address.
4551 This does nothing when a register is clobbered
4552 because we have already invalidated the reg. */
4553 if (GET_CODE (XEXP (y, 0)) == MEM)
4554 canon_reg (XEXP (y, 0), NULL_RTX);
4556 else if (GET_CODE (y) == USE
4557 && ! (GET_CODE (XEXP (y, 0)) == REG
4558 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4559 canon_reg (y, NULL_RTX);
4560 else if (GET_CODE (y) == CALL)
4562 /* The result of apply_change_group can be ignored; see
4563 canon_reg. */
4564 canon_reg (y, insn);
4565 apply_change_group ();
4566 fold_rtx (y, insn);
4570 else if (GET_CODE (x) == CLOBBER)
4572 if (GET_CODE (XEXP (x, 0)) == MEM)
4573 canon_reg (XEXP (x, 0), NULL_RTX);
4576 /* Canonicalize a USE of a pseudo register or memory location. */
4577 else if (GET_CODE (x) == USE
4578 && ! (GET_CODE (XEXP (x, 0)) == REG
4579 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4580 canon_reg (XEXP (x, 0), NULL_RTX);
4581 else if (GET_CODE (x) == CALL)
4583 /* The result of apply_change_group can be ignored; see canon_reg. */
4584 canon_reg (x, insn);
4585 apply_change_group ();
4586 fold_rtx (x, insn);
4589 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4590 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4591 is handled specially for this case, and if it isn't set, then there will
4592 be no equivalence for the destination. */
4593 if (n_sets == 1 && REG_NOTES (insn) != 0
4594 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4595 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4596 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4597 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4599 /* Canonicalize sources and addresses of destinations.
4600 We do this in a separate pass to avoid problems when a MATCH_DUP is
4601 present in the insn pattern. In that case, we want to ensure that
4602 we don't break the duplicate nature of the pattern. So we will replace
4603 both operands at the same time. Otherwise, we would fail to find an
4604 equivalent substitution in the loop calling validate_change below.
4606 We used to suppress canonicalization of DEST if it appears in SRC,
4607 but we don't do this any more. */
4609 for (i = 0; i < n_sets; i++)
4611 rtx dest = SET_DEST (sets[i].rtl);
4612 rtx src = SET_SRC (sets[i].rtl);
4613 rtx new = canon_reg (src, insn);
4614 int insn_code;
4616 sets[i].orig_src = src;
4617 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4618 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4619 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4620 || (insn_code = recog_memoized (insn)) < 0
4621 || insn_data[insn_code].n_dups > 0)
4622 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4623 else
4624 SET_SRC (sets[i].rtl) = new;
4626 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4628 validate_change (insn, &XEXP (dest, 1),
4629 canon_reg (XEXP (dest, 1), insn), 1);
4630 validate_change (insn, &XEXP (dest, 2),
4631 canon_reg (XEXP (dest, 2), insn), 1);
4634 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4635 || GET_CODE (dest) == ZERO_EXTRACT
4636 || GET_CODE (dest) == SIGN_EXTRACT)
4637 dest = XEXP (dest, 0);
4639 if (GET_CODE (dest) == MEM)
4640 canon_reg (dest, insn);
4643 /* Now that we have done all the replacements, we can apply the change
4644 group and see if they all work. Note that this will cause some
4645 canonicalizations that would have worked individually not to be applied
4646 because some other canonicalization didn't work, but this should not
4647 occur often.
4649 The result of apply_change_group can be ignored; see canon_reg. */
4651 apply_change_group ();
4653 /* Set sets[i].src_elt to the class each source belongs to.
4654 Detect assignments from or to volatile things
4655 and set set[i] to zero so they will be ignored
4656 in the rest of this function.
4658 Nothing in this loop changes the hash table or the register chains. */
4660 for (i = 0; i < n_sets; i++)
4662 register rtx src, dest;
4663 register rtx src_folded;
4664 register struct table_elt *elt = 0, *p;
4665 enum machine_mode mode;
4666 rtx src_eqv_here;
4667 rtx src_const = 0;
4668 rtx src_related = 0;
4669 struct table_elt *src_const_elt = 0;
4670 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4671 int src_related_cost = 10000, src_elt_cost = 10000;
4672 /* Set non-zero if we need to call force_const_mem on with the
4673 contents of src_folded before using it. */
4674 int src_folded_force_flag = 0;
4676 dest = SET_DEST (sets[i].rtl);
4677 src = SET_SRC (sets[i].rtl);
4679 /* If SRC is a constant that has no machine mode,
4680 hash it with the destination's machine mode.
4681 This way we can keep different modes separate. */
4683 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4684 sets[i].mode = mode;
4686 if (src_eqv)
4688 enum machine_mode eqvmode = mode;
4689 if (GET_CODE (dest) == STRICT_LOW_PART)
4690 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4691 do_not_record = 0;
4692 hash_arg_in_memory = 0;
4693 src_eqv = fold_rtx (src_eqv, insn);
4694 src_eqv_hash = HASH (src_eqv, eqvmode);
4696 /* Find the equivalence class for the equivalent expression. */
4698 if (!do_not_record)
4699 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4701 src_eqv_volatile = do_not_record;
4702 src_eqv_in_memory = hash_arg_in_memory;
4705 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4706 value of the INNER register, not the destination. So it is not
4707 a valid substitution for the source. But save it for later. */
4708 if (GET_CODE (dest) == STRICT_LOW_PART)
4709 src_eqv_here = 0;
4710 else
4711 src_eqv_here = src_eqv;
4713 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4714 simplified result, which may not necessarily be valid. */
4715 src_folded = fold_rtx (src, insn);
4717 #if 0
4718 /* ??? This caused bad code to be generated for the m68k port with -O2.
4719 Suppose src is (CONST_INT -1), and that after truncation src_folded
4720 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4721 At the end we will add src and src_const to the same equivalence
4722 class. We now have 3 and -1 on the same equivalence class. This
4723 causes later instructions to be mis-optimized. */
4724 /* If storing a constant in a bitfield, pre-truncate the constant
4725 so we will be able to record it later. */
4726 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4727 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4729 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4731 if (GET_CODE (src) == CONST_INT
4732 && GET_CODE (width) == CONST_INT
4733 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4734 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4735 src_folded
4736 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4737 << INTVAL (width)) - 1));
4739 #endif
4741 /* Compute SRC's hash code, and also notice if it
4742 should not be recorded at all. In that case,
4743 prevent any further processing of this assignment. */
4744 do_not_record = 0;
4745 hash_arg_in_memory = 0;
4747 sets[i].src = src;
4748 sets[i].src_hash = HASH (src, mode);
4749 sets[i].src_volatile = do_not_record;
4750 sets[i].src_in_memory = hash_arg_in_memory;
4752 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4753 a pseudo that is set more than once, do not record SRC. Using
4754 SRC as a replacement for anything else will be incorrect in that
4755 situation. Note that this usually occurs only for stack slots,
4756 in which case all the RTL would be referring to SRC, so we don't
4757 lose any optimization opportunities by not having SRC in the
4758 hash table. */
4760 if (GET_CODE (src) == MEM
4761 && find_reg_note (insn, REG_EQUIV, src) != 0
4762 && GET_CODE (dest) == REG
4763 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4764 && REG_N_SETS (REGNO (dest)) != 1)
4765 sets[i].src_volatile = 1;
4767 #if 0
4768 /* It is no longer clear why we used to do this, but it doesn't
4769 appear to still be needed. So let's try without it since this
4770 code hurts cse'ing widened ops. */
4771 /* If source is a perverse subreg (such as QI treated as an SI),
4772 treat it as volatile. It may do the work of an SI in one context
4773 where the extra bits are not being used, but cannot replace an SI
4774 in general. */
4775 if (GET_CODE (src) == SUBREG
4776 && (GET_MODE_SIZE (GET_MODE (src))
4777 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4778 sets[i].src_volatile = 1;
4779 #endif
4781 /* Locate all possible equivalent forms for SRC. Try to replace
4782 SRC in the insn with each cheaper equivalent.
4784 We have the following types of equivalents: SRC itself, a folded
4785 version, a value given in a REG_EQUAL note, or a value related
4786 to a constant.
4788 Each of these equivalents may be part of an additional class
4789 of equivalents (if more than one is in the table, they must be in
4790 the same class; we check for this).
4792 If the source is volatile, we don't do any table lookups.
4794 We note any constant equivalent for possible later use in a
4795 REG_NOTE. */
4797 if (!sets[i].src_volatile)
4798 elt = lookup (src, sets[i].src_hash, mode);
4800 sets[i].src_elt = elt;
4802 if (elt && src_eqv_here && src_eqv_elt)
4804 if (elt->first_same_value != src_eqv_elt->first_same_value)
4806 /* The REG_EQUAL is indicating that two formerly distinct
4807 classes are now equivalent. So merge them. */
4808 merge_equiv_classes (elt, src_eqv_elt);
4809 src_eqv_hash = HASH (src_eqv, elt->mode);
4810 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4813 src_eqv_here = 0;
4816 else if (src_eqv_elt)
4817 elt = src_eqv_elt;
4819 /* Try to find a constant somewhere and record it in `src_const'.
4820 Record its table element, if any, in `src_const_elt'. Look in
4821 any known equivalences first. (If the constant is not in the
4822 table, also set `sets[i].src_const_hash'). */
4823 if (elt)
4824 for (p = elt->first_same_value; p; p = p->next_same_value)
4825 if (p->is_const)
4827 src_const = p->exp;
4828 src_const_elt = elt;
4829 break;
4832 if (src_const == 0
4833 && (CONSTANT_P (src_folded)
4834 /* Consider (minus (label_ref L1) (label_ref L2)) as
4835 "constant" here so we will record it. This allows us
4836 to fold switch statements when an ADDR_DIFF_VEC is used. */
4837 || (GET_CODE (src_folded) == MINUS
4838 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4839 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4840 src_const = src_folded, src_const_elt = elt;
4841 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4842 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4844 /* If we don't know if the constant is in the table, get its
4845 hash code and look it up. */
4846 if (src_const && src_const_elt == 0)
4848 sets[i].src_const_hash = HASH (src_const, mode);
4849 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4852 sets[i].src_const = src_const;
4853 sets[i].src_const_elt = src_const_elt;
4855 /* If the constant and our source are both in the table, mark them as
4856 equivalent. Otherwise, if a constant is in the table but the source
4857 isn't, set ELT to it. */
4858 if (src_const_elt && elt
4859 && src_const_elt->first_same_value != elt->first_same_value)
4860 merge_equiv_classes (elt, src_const_elt);
4861 else if (src_const_elt && elt == 0)
4862 elt = src_const_elt;
4864 /* See if there is a register linearly related to a constant
4865 equivalent of SRC. */
4866 if (src_const
4867 && (GET_CODE (src_const) == CONST
4868 || (src_const_elt && src_const_elt->related_value != 0)))
4870 src_related = use_related_value (src_const, src_const_elt);
4871 if (src_related)
4873 struct table_elt *src_related_elt
4874 = lookup (src_related, HASH (src_related, mode), mode);
4875 if (src_related_elt && elt)
4877 if (elt->first_same_value
4878 != src_related_elt->first_same_value)
4879 /* This can occur when we previously saw a CONST
4880 involving a SYMBOL_REF and then see the SYMBOL_REF
4881 twice. Merge the involved classes. */
4882 merge_equiv_classes (elt, src_related_elt);
4884 src_related = 0;
4885 src_related_elt = 0;
4887 else if (src_related_elt && elt == 0)
4888 elt = src_related_elt;
4892 /* See if we have a CONST_INT that is already in a register in a
4893 wider mode. */
4895 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4896 && GET_MODE_CLASS (mode) == MODE_INT
4897 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4899 enum machine_mode wider_mode;
4901 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4902 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4903 && src_related == 0;
4904 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4906 struct table_elt *const_elt
4907 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4909 if (const_elt == 0)
4910 continue;
4912 for (const_elt = const_elt->first_same_value;
4913 const_elt; const_elt = const_elt->next_same_value)
4914 if (GET_CODE (const_elt->exp) == REG)
4916 src_related = gen_lowpart_if_possible (mode,
4917 const_elt->exp);
4918 break;
4923 /* Another possibility is that we have an AND with a constant in
4924 a mode narrower than a word. If so, it might have been generated
4925 as part of an "if" which would narrow the AND. If we already
4926 have done the AND in a wider mode, we can use a SUBREG of that
4927 value. */
4929 if (flag_expensive_optimizations && ! src_related
4930 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4931 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4933 enum machine_mode tmode;
4934 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4936 for (tmode = GET_MODE_WIDER_MODE (mode);
4937 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4938 tmode = GET_MODE_WIDER_MODE (tmode))
4940 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
4941 struct table_elt *larger_elt;
4943 if (inner)
4945 PUT_MODE (new_and, tmode);
4946 XEXP (new_and, 0) = inner;
4947 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4948 if (larger_elt == 0)
4949 continue;
4951 for (larger_elt = larger_elt->first_same_value;
4952 larger_elt; larger_elt = larger_elt->next_same_value)
4953 if (GET_CODE (larger_elt->exp) == REG)
4955 src_related
4956 = gen_lowpart_if_possible (mode, larger_elt->exp);
4957 break;
4960 if (src_related)
4961 break;
4966 #ifdef LOAD_EXTEND_OP
4967 /* See if a MEM has already been loaded with a widening operation;
4968 if it has, we can use a subreg of that. Many CISC machines
4969 also have such operations, but this is only likely to be
4970 beneficial these machines. */
4972 if (flag_expensive_optimizations && src_related == 0
4973 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4974 && GET_MODE_CLASS (mode) == MODE_INT
4975 && GET_CODE (src) == MEM && ! do_not_record
4976 && LOAD_EXTEND_OP (mode) != NIL)
4978 enum machine_mode tmode;
4980 /* Set what we are trying to extend and the operation it might
4981 have been extended with. */
4982 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4983 XEXP (memory_extend_rtx, 0) = src;
4985 for (tmode = GET_MODE_WIDER_MODE (mode);
4986 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4987 tmode = GET_MODE_WIDER_MODE (tmode))
4989 struct table_elt *larger_elt;
4991 PUT_MODE (memory_extend_rtx, tmode);
4992 larger_elt = lookup (memory_extend_rtx,
4993 HASH (memory_extend_rtx, tmode), tmode);
4994 if (larger_elt == 0)
4995 continue;
4997 for (larger_elt = larger_elt->first_same_value;
4998 larger_elt; larger_elt = larger_elt->next_same_value)
4999 if (GET_CODE (larger_elt->exp) == REG)
5001 src_related = gen_lowpart_if_possible (mode,
5002 larger_elt->exp);
5003 break;
5006 if (src_related)
5007 break;
5010 #endif /* LOAD_EXTEND_OP */
5012 if (src == src_folded)
5013 src_folded = 0;
5015 /* At this point, ELT, if non-zero, points to a class of expressions
5016 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
5017 and SRC_RELATED, if non-zero, each contain additional equivalent
5018 expressions. Prune these latter expressions by deleting expressions
5019 already in the equivalence class.
5021 Check for an equivalent identical to the destination. If found,
5022 this is the preferred equivalent since it will likely lead to
5023 elimination of the insn. Indicate this by placing it in
5024 `src_related'. */
5026 if (elt) elt = elt->first_same_value;
5027 for (p = elt; p; p = p->next_same_value)
5029 enum rtx_code code = GET_CODE (p->exp);
5031 /* If the expression is not valid, ignore it. Then we do not
5032 have to check for validity below. In most cases, we can use
5033 `rtx_equal_p', since canonicalization has already been done. */
5034 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
5035 continue;
5037 /* Also skip paradoxical subregs, unless that's what we're
5038 looking for. */
5039 if (code == SUBREG
5040 && (GET_MODE_SIZE (GET_MODE (p->exp))
5041 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
5042 && ! (src != 0
5043 && GET_CODE (src) == SUBREG
5044 && GET_MODE (src) == GET_MODE (p->exp)
5045 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5046 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
5047 continue;
5049 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
5050 src = 0;
5051 else if (src_folded && GET_CODE (src_folded) == code
5052 && rtx_equal_p (src_folded, p->exp))
5053 src_folded = 0;
5054 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
5055 && rtx_equal_p (src_eqv_here, p->exp))
5056 src_eqv_here = 0;
5057 else if (src_related && GET_CODE (src_related) == code
5058 && rtx_equal_p (src_related, p->exp))
5059 src_related = 0;
5061 /* This is the same as the destination of the insns, we want
5062 to prefer it. Copy it to src_related. The code below will
5063 then give it a negative cost. */
5064 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5065 src_related = dest;
5069 /* Find the cheapest valid equivalent, trying all the available
5070 possibilities. Prefer items not in the hash table to ones
5071 that are when they are equal cost. Note that we can never
5072 worsen an insn as the current contents will also succeed.
5073 If we find an equivalent identical to the destination, use it as best,
5074 since this insn will probably be eliminated in that case. */
5075 if (src)
5077 if (rtx_equal_p (src, dest))
5078 src_cost = -1;
5079 else
5080 src_cost = COST (src);
5083 if (src_eqv_here)
5085 if (rtx_equal_p (src_eqv_here, dest))
5086 src_eqv_cost = -1;
5087 else
5088 src_eqv_cost = COST (src_eqv_here);
5091 if (src_folded)
5093 if (rtx_equal_p (src_folded, dest))
5094 src_folded_cost = -1;
5095 else
5096 src_folded_cost = COST (src_folded);
5099 if (src_related)
5101 if (rtx_equal_p (src_related, dest))
5102 src_related_cost = -1;
5103 else
5104 src_related_cost = COST (src_related);
5107 /* If this was an indirect jump insn, a known label will really be
5108 cheaper even though it looks more expensive. */
5109 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5110 src_folded = src_const, src_folded_cost = -1;
5112 /* Terminate loop when replacement made. This must terminate since
5113 the current contents will be tested and will always be valid. */
5114 while (1)
5116 rtx trial;
5118 /* Skip invalid entries. */
5119 while (elt && GET_CODE (elt->exp) != REG
5120 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5121 elt = elt->next_same_value;
5123 /* A paradoxical subreg would be bad here: it'll be the right
5124 size, but later may be adjusted so that the upper bits aren't
5125 what we want. So reject it. */
5126 if (elt != 0
5127 && GET_CODE (elt->exp) == SUBREG
5128 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5129 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5130 /* It is okay, though, if the rtx we're trying to match
5131 will ignore any of the bits we can't predict. */
5132 && ! (src != 0
5133 && GET_CODE (src) == SUBREG
5134 && GET_MODE (src) == GET_MODE (elt->exp)
5135 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5136 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5138 elt = elt->next_same_value;
5139 continue;
5142 if (elt) src_elt_cost = elt->cost;
5144 /* Find cheapest and skip it for the next time. For items
5145 of equal cost, use this order:
5146 src_folded, src, src_eqv, src_related and hash table entry. */
5147 if (src_folded_cost <= src_cost
5148 && src_folded_cost <= src_eqv_cost
5149 && src_folded_cost <= src_related_cost
5150 && src_folded_cost <= src_elt_cost)
5152 trial = src_folded, src_folded_cost = 10000;
5153 if (src_folded_force_flag)
5154 trial = force_const_mem (mode, trial);
5156 else if (src_cost <= src_eqv_cost
5157 && src_cost <= src_related_cost
5158 && src_cost <= src_elt_cost)
5159 trial = src, src_cost = 10000;
5160 else if (src_eqv_cost <= src_related_cost
5161 && src_eqv_cost <= src_elt_cost)
5162 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5163 else if (src_related_cost <= src_elt_cost)
5164 trial = copy_rtx (src_related), src_related_cost = 10000;
5165 else
5167 trial = copy_rtx (elt->exp);
5168 elt = elt->next_same_value;
5169 src_elt_cost = 10000;
5172 /* We don't normally have an insn matching (set (pc) (pc)), so
5173 check for this separately here. We will delete such an
5174 insn below.
5176 Tablejump insns contain a USE of the table, so simply replacing
5177 the operand with the constant won't match. This is simply an
5178 unconditional branch, however, and is therefore valid. Just
5179 insert the substitution here and we will delete and re-emit
5180 the insn later. */
5182 if (n_sets == 1 && dest == pc_rtx
5183 && (trial == pc_rtx
5184 || (GET_CODE (trial) == LABEL_REF
5185 && ! condjump_p (insn))))
5187 /* If TRIAL is a label in front of a jump table, we are
5188 really falling through the switch (this is how casesi
5189 insns work), so we must branch around the table. */
5190 if (GET_CODE (trial) == CODE_LABEL
5191 && NEXT_INSN (trial) != 0
5192 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
5193 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
5194 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
5196 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
5198 SET_SRC (sets[i].rtl) = trial;
5199 cse_jumps_altered = 1;
5200 break;
5203 /* Look for a substitution that makes a valid insn. */
5204 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5206 /* If we just made a substitution inside a libcall, then we
5207 need to make the same substitution in any notes attached
5208 to the RETVAL insn. */
5209 if (libcall_insn
5210 && (GET_CODE (sets[i].orig_src) == REG
5211 || GET_CODE (sets[i].orig_src) == SUBREG
5212 || GET_CODE (sets[i].orig_src) == MEM))
5213 replace_rtx (REG_NOTES (libcall_insn), sets[i].orig_src,
5214 canon_reg (SET_SRC (sets[i].rtl), insn));
5216 /* The result of apply_change_group can be ignored; see
5217 canon_reg. */
5219 validate_change (insn, &SET_SRC (sets[i].rtl),
5220 canon_reg (SET_SRC (sets[i].rtl), insn),
5222 apply_change_group ();
5223 break;
5226 /* If we previously found constant pool entries for
5227 constants and this is a constant, try making a
5228 pool entry. Put it in src_folded unless we already have done
5229 this since that is where it likely came from. */
5231 else if (constant_pool_entries_cost
5232 && CONSTANT_P (trial)
5233 && ! (GET_CODE (trial) == CONST
5234 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5235 && (src_folded == 0
5236 || (GET_CODE (src_folded) != MEM
5237 && ! src_folded_force_flag))
5238 && GET_MODE_CLASS (mode) != MODE_CC
5239 && mode != VOIDmode)
5241 src_folded_force_flag = 1;
5242 src_folded = trial;
5243 src_folded_cost = constant_pool_entries_cost;
5247 src = SET_SRC (sets[i].rtl);
5249 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5250 However, there is an important exception: If both are registers
5251 that are not the head of their equivalence class, replace SET_SRC
5252 with the head of the class. If we do not do this, we will have
5253 both registers live over a portion of the basic block. This way,
5254 their lifetimes will likely abut instead of overlapping. */
5255 if (GET_CODE (dest) == REG
5256 && REGNO_QTY_VALID_P (REGNO (dest)))
5258 int dest_q = REG_QTY (REGNO (dest));
5259 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5261 if (dest_ent->mode == GET_MODE (dest)
5262 && dest_ent->first_reg != REGNO (dest)
5263 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5264 /* Don't do this if the original insn had a hard reg as
5265 SET_SRC or SET_DEST. */
5266 && (GET_CODE (sets[i].src) != REG
5267 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5268 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5269 /* We can't call canon_reg here because it won't do anything if
5270 SRC is a hard register. */
5272 int src_q = REG_QTY (REGNO (src));
5273 struct qty_table_elem *src_ent = &qty_table[src_q];
5274 int first = src_ent->first_reg;
5275 rtx new_src
5276 = (first >= FIRST_PSEUDO_REGISTER
5277 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5279 /* We must use validate-change even for this, because this
5280 might be a special no-op instruction, suitable only to
5281 tag notes onto. */
5282 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5284 src = new_src;
5285 /* If we had a constant that is cheaper than what we are now
5286 setting SRC to, use that constant. We ignored it when we
5287 thought we could make this into a no-op. */
5288 if (src_const && COST (src_const) < COST (src)
5289 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5291 src = src_const;
5296 /* If we made a change, recompute SRC values. */
5297 if (src != sets[i].src)
5299 do_not_record = 0;
5300 hash_arg_in_memory = 0;
5301 sets[i].src = src;
5302 sets[i].src_hash = HASH (src, mode);
5303 sets[i].src_volatile = do_not_record;
5304 sets[i].src_in_memory = hash_arg_in_memory;
5305 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5308 /* If this is a single SET, we are setting a register, and we have an
5309 equivalent constant, we want to add a REG_NOTE. We don't want
5310 to write a REG_EQUAL note for a constant pseudo since verifying that
5311 that pseudo hasn't been eliminated is a pain. Such a note also
5312 won't help anything.
5314 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5315 which can be created for a reference to a compile time computable
5316 entry in a jump table. */
5318 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5319 && GET_CODE (src_const) != REG
5320 && ! (GET_CODE (src_const) == CONST
5321 && GET_CODE (XEXP (src_const, 0)) == MINUS
5322 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5323 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5325 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5327 /* Make sure that the rtx is not shared with any other insn. */
5328 src_const = copy_rtx (src_const);
5330 /* Record the actual constant value in a REG_EQUAL note, making
5331 a new one if one does not already exist. */
5332 if (tem)
5333 XEXP (tem, 0) = src_const;
5334 else
5335 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5336 src_const, REG_NOTES (insn));
5338 /* If storing a constant value in a register that
5339 previously held the constant value 0,
5340 record this fact with a REG_WAS_0 note on this insn.
5342 Note that the *register* is required to have previously held 0,
5343 not just any register in the quantity and we must point to the
5344 insn that set that register to zero.
5346 Rather than track each register individually, we just see if
5347 the last set for this quantity was for this register. */
5349 if (REGNO_QTY_VALID_P (REGNO (dest)))
5351 int dest_q = REG_QTY (REGNO (dest));
5352 struct qty_table_elem *dest_ent = &qty_table[dest_q];
5354 if (dest_ent->const_rtx == const0_rtx)
5356 /* See if we previously had a REG_WAS_0 note. */
5357 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5358 rtx const_insn = dest_ent->const_insn;
5360 if ((tem = single_set (const_insn)) != 0
5361 && rtx_equal_p (SET_DEST (tem), dest))
5363 if (note)
5364 XEXP (note, 0) = const_insn;
5365 else
5366 REG_NOTES (insn)
5367 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5368 REG_NOTES (insn));
5374 /* Now deal with the destination. */
5375 do_not_record = 0;
5377 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5378 to the MEM or REG within it. */
5379 while (GET_CODE (dest) == SIGN_EXTRACT
5380 || GET_CODE (dest) == ZERO_EXTRACT
5381 || GET_CODE (dest) == SUBREG
5382 || GET_CODE (dest) == STRICT_LOW_PART)
5383 dest = XEXP (dest, 0);
5385 sets[i].inner_dest = dest;
5387 if (GET_CODE (dest) == MEM)
5389 #ifdef PUSH_ROUNDING
5390 /* Stack pushes invalidate the stack pointer. */
5391 rtx addr = XEXP (dest, 0);
5392 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5393 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5394 && XEXP (addr, 0) == stack_pointer_rtx)
5395 invalidate (stack_pointer_rtx, Pmode);
5396 #endif
5397 dest = fold_rtx (dest, insn);
5400 /* Compute the hash code of the destination now,
5401 before the effects of this instruction are recorded,
5402 since the register values used in the address computation
5403 are those before this instruction. */
5404 sets[i].dest_hash = HASH (dest, mode);
5406 /* Don't enter a bit-field in the hash table
5407 because the value in it after the store
5408 may not equal what was stored, due to truncation. */
5410 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5411 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5413 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5415 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5416 && GET_CODE (width) == CONST_INT
5417 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5418 && ! (INTVAL (src_const)
5419 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5420 /* Exception: if the value is constant,
5421 and it won't be truncated, record it. */
5423 else
5425 /* This is chosen so that the destination will be invalidated
5426 but no new value will be recorded.
5427 We must invalidate because sometimes constant
5428 values can be recorded for bitfields. */
5429 sets[i].src_elt = 0;
5430 sets[i].src_volatile = 1;
5431 src_eqv = 0;
5432 src_eqv_elt = 0;
5436 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5437 the insn. */
5438 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5440 /* One less use of the label this insn used to jump to. */
5441 if (JUMP_LABEL (insn) != 0)
5442 --LABEL_NUSES (JUMP_LABEL (insn));
5443 PUT_CODE (insn, NOTE);
5444 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5445 NOTE_SOURCE_FILE (insn) = 0;
5446 cse_jumps_altered = 1;
5447 /* No more processing for this set. */
5448 sets[i].rtl = 0;
5451 /* If this SET is now setting PC to a label, we know it used to
5452 be a conditional or computed branch. So we see if we can follow
5453 it. If it was a computed branch, delete it and re-emit. */
5454 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5456 /* If this is not in the format for a simple branch and
5457 we are the only SET in it, re-emit it. */
5458 if (! simplejump_p (insn) && n_sets == 1)
5460 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5461 JUMP_LABEL (new) = XEXP (src, 0);
5462 LABEL_NUSES (XEXP (src, 0))++;
5463 insn = new;
5465 else
5466 /* Otherwise, force rerecognition, since it probably had
5467 a different pattern before.
5468 This shouldn't really be necessary, since whatever
5469 changed the source value above should have done this.
5470 Until the right place is found, might as well do this here. */
5471 INSN_CODE (insn) = -1;
5473 never_reached_warning (insn);
5475 /* Now emit a BARRIER after the unconditional jump. Do not bother
5476 deleting any unreachable code, let jump/flow do that. */
5477 if (NEXT_INSN (insn) != 0
5478 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5479 emit_barrier_after (insn);
5481 cse_jumps_altered = 1;
5482 sets[i].rtl = 0;
5485 /* If destination is volatile, invalidate it and then do no further
5486 processing for this assignment. */
5488 else if (do_not_record)
5490 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5491 || GET_CODE (dest) == MEM)
5492 invalidate (dest, VOIDmode);
5493 else if (GET_CODE (dest) == STRICT_LOW_PART
5494 || GET_CODE (dest) == ZERO_EXTRACT)
5495 invalidate (XEXP (dest, 0), GET_MODE (dest));
5496 sets[i].rtl = 0;
5499 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5500 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5502 #ifdef HAVE_cc0
5503 /* If setting CC0, record what it was set to, or a constant, if it
5504 is equivalent to a constant. If it is being set to a floating-point
5505 value, make a COMPARE with the appropriate constant of 0. If we
5506 don't do this, later code can interpret this as a test against
5507 const0_rtx, which can cause problems if we try to put it into an
5508 insn as a floating-point operand. */
5509 if (dest == cc0_rtx)
5511 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5512 this_insn_cc0_mode = mode;
5513 if (FLOAT_MODE_P (mode))
5514 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5515 CONST0_RTX (mode));
5517 #endif
5520 /* Now enter all non-volatile source expressions in the hash table
5521 if they are not already present.
5522 Record their equivalence classes in src_elt.
5523 This way we can insert the corresponding destinations into
5524 the same classes even if the actual sources are no longer in them
5525 (having been invalidated). */
5527 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5528 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5530 register struct table_elt *elt;
5531 register struct table_elt *classp = sets[0].src_elt;
5532 rtx dest = SET_DEST (sets[0].rtl);
5533 enum machine_mode eqvmode = GET_MODE (dest);
5535 if (GET_CODE (dest) == STRICT_LOW_PART)
5537 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5538 classp = 0;
5540 if (insert_regs (src_eqv, classp, 0))
5542 rehash_using_reg (src_eqv);
5543 src_eqv_hash = HASH (src_eqv, eqvmode);
5545 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5546 elt->in_memory = src_eqv_in_memory;
5547 src_eqv_elt = elt;
5549 /* Check to see if src_eqv_elt is the same as a set source which
5550 does not yet have an elt, and if so set the elt of the set source
5551 to src_eqv_elt. */
5552 for (i = 0; i < n_sets; i++)
5553 if (sets[i].rtl && sets[i].src_elt == 0
5554 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5555 sets[i].src_elt = src_eqv_elt;
5558 for (i = 0; i < n_sets; i++)
5559 if (sets[i].rtl && ! sets[i].src_volatile
5560 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5562 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5564 /* REG_EQUAL in setting a STRICT_LOW_PART
5565 gives an equivalent for the entire destination register,
5566 not just for the subreg being stored in now.
5567 This is a more interesting equivalence, so we arrange later
5568 to treat the entire reg as the destination. */
5569 sets[i].src_elt = src_eqv_elt;
5570 sets[i].src_hash = src_eqv_hash;
5572 else
5574 /* Insert source and constant equivalent into hash table, if not
5575 already present. */
5576 register struct table_elt *classp = src_eqv_elt;
5577 register rtx src = sets[i].src;
5578 register rtx dest = SET_DEST (sets[i].rtl);
5579 enum machine_mode mode
5580 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5582 if (sets[i].src_elt == 0)
5584 /* Don't put a hard register source into the table if this is
5585 the last insn of a libcall. In this case, we only need
5586 to put src_eqv_elt in src_elt. */
5587 if (GET_CODE (src) != REG
5588 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5589 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5591 register struct table_elt *elt;
5593 /* Note that these insert_regs calls cannot remove
5594 any of the src_elt's, because they would have failed to
5595 match if not still valid. */
5596 if (insert_regs (src, classp, 0))
5598 rehash_using_reg (src);
5599 sets[i].src_hash = HASH (src, mode);
5601 elt = insert (src, classp, sets[i].src_hash, mode);
5602 elt->in_memory = sets[i].src_in_memory;
5603 sets[i].src_elt = classp = elt;
5605 else
5606 sets[i].src_elt = classp;
5608 if (sets[i].src_const && sets[i].src_const_elt == 0
5609 && src != sets[i].src_const
5610 && ! rtx_equal_p (sets[i].src_const, src))
5611 sets[i].src_elt = insert (sets[i].src_const, classp,
5612 sets[i].src_const_hash, mode);
5615 else if (sets[i].src_elt == 0)
5616 /* If we did not insert the source into the hash table (e.g., it was
5617 volatile), note the equivalence class for the REG_EQUAL value, if any,
5618 so that the destination goes into that class. */
5619 sets[i].src_elt = src_eqv_elt;
5621 invalidate_from_clobbers (x);
5623 /* Some registers are invalidated by subroutine calls. Memory is
5624 invalidated by non-constant calls. */
5626 if (GET_CODE (insn) == CALL_INSN)
5628 if (! CONST_CALL_P (insn))
5629 invalidate_memory ();
5630 invalidate_for_call ();
5633 /* Now invalidate everything set by this instruction.
5634 If a SUBREG or other funny destination is being set,
5635 sets[i].rtl is still nonzero, so here we invalidate the reg
5636 a part of which is being set. */
5638 for (i = 0; i < n_sets; i++)
5639 if (sets[i].rtl)
5641 /* We can't use the inner dest, because the mode associated with
5642 a ZERO_EXTRACT is significant. */
5643 register rtx dest = SET_DEST (sets[i].rtl);
5645 /* Needed for registers to remove the register from its
5646 previous quantity's chain.
5647 Needed for memory if this is a nonvarying address, unless
5648 we have just done an invalidate_memory that covers even those. */
5649 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5650 || GET_CODE (dest) == MEM)
5651 invalidate (dest, VOIDmode);
5652 else if (GET_CODE (dest) == STRICT_LOW_PART
5653 || GET_CODE (dest) == ZERO_EXTRACT)
5654 invalidate (XEXP (dest, 0), GET_MODE (dest));
5657 /* A volatile ASM invalidates everything. */
5658 if (GET_CODE (insn) == INSN
5659 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5660 && MEM_VOLATILE_P (PATTERN (insn)))
5661 flush_hash_table ();
5663 /* Make sure registers mentioned in destinations
5664 are safe for use in an expression to be inserted.
5665 This removes from the hash table
5666 any invalid entry that refers to one of these registers.
5668 We don't care about the return value from mention_regs because
5669 we are going to hash the SET_DEST values unconditionally. */
5671 for (i = 0; i < n_sets; i++)
5673 if (sets[i].rtl)
5675 rtx x = SET_DEST (sets[i].rtl);
5677 if (GET_CODE (x) != REG)
5678 mention_regs (x);
5679 else
5681 /* We used to rely on all references to a register becoming
5682 inaccessible when a register changes to a new quantity,
5683 since that changes the hash code. However, that is not
5684 safe, since after HASH_SIZE new quantities we get a
5685 hash 'collision' of a register with its own invalid
5686 entries. And since SUBREGs have been changed not to
5687 change their hash code with the hash code of the register,
5688 it wouldn't work any longer at all. So we have to check
5689 for any invalid references lying around now.
5690 This code is similar to the REG case in mention_regs,
5691 but it knows that reg_tick has been incremented, and
5692 it leaves reg_in_table as -1 . */
5693 register int regno = REGNO (x);
5694 register int endregno
5695 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5696 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5697 int i;
5699 for (i = regno; i < endregno; i++)
5701 if (REG_IN_TABLE (i) >= 0)
5703 remove_invalid_refs (i);
5704 REG_IN_TABLE (i) = -1;
5711 /* We may have just removed some of the src_elt's from the hash table.
5712 So replace each one with the current head of the same class. */
5714 for (i = 0; i < n_sets; i++)
5715 if (sets[i].rtl)
5717 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5718 /* If elt was removed, find current head of same class,
5719 or 0 if nothing remains of that class. */
5721 register struct table_elt *elt = sets[i].src_elt;
5723 while (elt && elt->prev_same_value)
5724 elt = elt->prev_same_value;
5726 while (elt && elt->first_same_value == 0)
5727 elt = elt->next_same_value;
5728 sets[i].src_elt = elt ? elt->first_same_value : 0;
5732 /* Now insert the destinations into their equivalence classes. */
5734 for (i = 0; i < n_sets; i++)
5735 if (sets[i].rtl)
5737 register rtx dest = SET_DEST (sets[i].rtl);
5738 rtx inner_dest = sets[i].inner_dest;
5739 register struct table_elt *elt;
5741 /* Don't record value if we are not supposed to risk allocating
5742 floating-point values in registers that might be wider than
5743 memory. */
5744 if ((flag_float_store
5745 && GET_CODE (dest) == MEM
5746 && FLOAT_MODE_P (GET_MODE (dest)))
5747 /* Don't record BLKmode values, because we don't know the
5748 size of it, and can't be sure that other BLKmode values
5749 have the same or smaller size. */
5750 || GET_MODE (dest) == BLKmode
5751 /* Don't record values of destinations set inside a libcall block
5752 since we might delete the libcall. Things should have been set
5753 up so we won't want to reuse such a value, but we play it safe
5754 here. */
5755 || libcall_insn
5756 /* If we didn't put a REG_EQUAL value or a source into the hash
5757 table, there is no point is recording DEST. */
5758 || sets[i].src_elt == 0
5759 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5760 or SIGN_EXTEND, don't record DEST since it can cause
5761 some tracking to be wrong.
5763 ??? Think about this more later. */
5764 || (GET_CODE (dest) == SUBREG
5765 && (GET_MODE_SIZE (GET_MODE (dest))
5766 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5767 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5768 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5769 continue;
5771 /* STRICT_LOW_PART isn't part of the value BEING set,
5772 and neither is the SUBREG inside it.
5773 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5774 if (GET_CODE (dest) == STRICT_LOW_PART)
5775 dest = SUBREG_REG (XEXP (dest, 0));
5777 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5778 /* Registers must also be inserted into chains for quantities. */
5779 if (insert_regs (dest, sets[i].src_elt, 1))
5781 /* If `insert_regs' changes something, the hash code must be
5782 recalculated. */
5783 rehash_using_reg (dest);
5784 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5787 if (GET_CODE (inner_dest) == MEM
5788 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5789 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5790 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5791 Consider the case in which the address of the MEM is
5792 passed to a function, which alters the MEM. Then, if we
5793 later use Y instead of the MEM we'll miss the update. */
5794 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5795 else
5796 elt = insert (dest, sets[i].src_elt,
5797 sets[i].dest_hash, GET_MODE (dest));
5799 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5800 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5801 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5802 0))));
5804 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5805 narrower than M2, and both M1 and M2 are the same number of words,
5806 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5807 make that equivalence as well.
5809 However, BAR may have equivalences for which gen_lowpart_if_possible
5810 will produce a simpler value than gen_lowpart_if_possible applied to
5811 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5812 BAR's equivalences. If we don't get a simplified form, make
5813 the SUBREG. It will not be used in an equivalence, but will
5814 cause two similar assignments to be detected.
5816 Note the loop below will find SUBREG_REG (DEST) since we have
5817 already entered SRC and DEST of the SET in the table. */
5819 if (GET_CODE (dest) == SUBREG
5820 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5821 / UNITS_PER_WORD)
5822 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
5823 && (GET_MODE_SIZE (GET_MODE (dest))
5824 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5825 && sets[i].src_elt != 0)
5827 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5828 struct table_elt *elt, *classp = 0;
5830 for (elt = sets[i].src_elt->first_same_value; elt;
5831 elt = elt->next_same_value)
5833 rtx new_src = 0;
5834 unsigned src_hash;
5835 struct table_elt *src_elt;
5837 /* Ignore invalid entries. */
5838 if (GET_CODE (elt->exp) != REG
5839 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5840 continue;
5842 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
5843 if (new_src == 0)
5844 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
5846 src_hash = HASH (new_src, new_mode);
5847 src_elt = lookup (new_src, src_hash, new_mode);
5849 /* Put the new source in the hash table is if isn't
5850 already. */
5851 if (src_elt == 0)
5853 if (insert_regs (new_src, classp, 0))
5855 rehash_using_reg (new_src);
5856 src_hash = HASH (new_src, new_mode);
5858 src_elt = insert (new_src, classp, src_hash, new_mode);
5859 src_elt->in_memory = elt->in_memory;
5861 else if (classp && classp != src_elt->first_same_value)
5862 /* Show that two things that we've seen before are
5863 actually the same. */
5864 merge_equiv_classes (src_elt, classp);
5866 classp = src_elt->first_same_value;
5867 /* Ignore invalid entries. */
5868 while (classp
5869 && GET_CODE (classp->exp) != REG
5870 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
5871 classp = classp->next_same_value;
5876 /* Special handling for (set REG0 REG1)
5877 where REG0 is the "cheapest", cheaper than REG1.
5878 After cse, REG1 will probably not be used in the sequel,
5879 so (if easily done) change this insn to (set REG1 REG0) and
5880 replace REG1 with REG0 in the previous insn that computed their value.
5881 Then REG1 will become a dead store and won't cloud the situation
5882 for later optimizations.
5884 Do not make this change if REG1 is a hard register, because it will
5885 then be used in the sequel and we may be changing a two-operand insn
5886 into a three-operand insn.
5888 Also do not do this if we are operating on a copy of INSN.
5890 Also don't do this if INSN ends a libcall; this would cause an unrelated
5891 register to be set in the middle of a libcall, and we then get bad code
5892 if the libcall is deleted. */
5894 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
5895 && NEXT_INSN (PREV_INSN (insn)) == insn
5896 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
5897 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5898 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl))))
5900 int src_q = REG_QTY (REGNO (SET_SRC (sets[0].rtl)));
5901 struct qty_table_elem *src_ent = &qty_table[src_q];
5903 if ((src_ent->first_reg == REGNO (SET_DEST (sets[0].rtl)))
5904 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5906 rtx prev = PREV_INSN (insn);
5907 while (prev && GET_CODE (prev) == NOTE)
5908 prev = PREV_INSN (prev);
5910 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
5911 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
5913 rtx dest = SET_DEST (sets[0].rtl);
5914 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
5916 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
5917 validate_change (insn, & SET_DEST (sets[0].rtl),
5918 SET_SRC (sets[0].rtl), 1);
5919 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
5920 apply_change_group ();
5922 /* If REG1 was equivalent to a constant, REG0 is not. */
5923 if (note)
5924 PUT_REG_NOTE_KIND (note, REG_EQUAL);
5926 /* If there was a REG_WAS_0 note on PREV, remove it. Move
5927 any REG_WAS_0 note on INSN to PREV. */
5928 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
5929 if (note)
5930 remove_note (prev, note);
5932 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5933 if (note)
5935 remove_note (insn, note);
5936 XEXP (note, 1) = REG_NOTES (prev);
5937 REG_NOTES (prev) = note;
5940 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
5941 then we must delete it, because the value in REG0 has changed. */
5942 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5943 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
5944 remove_note (insn, note);
5949 /* If this is a conditional jump insn, record any known equivalences due to
5950 the condition being tested. */
5952 last_jump_equiv_class = 0;
5953 if (GET_CODE (insn) == JUMP_INSN
5954 && n_sets == 1 && GET_CODE (x) == SET
5955 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
5956 record_jump_equiv (insn, 0);
5958 #ifdef HAVE_cc0
5959 /* If the previous insn set CC0 and this insn no longer references CC0,
5960 delete the previous insn. Here we use the fact that nothing expects CC0
5961 to be valid over an insn, which is true until the final pass. */
5962 if (prev_insn && GET_CODE (prev_insn) == INSN
5963 && (tem = single_set (prev_insn)) != 0
5964 && SET_DEST (tem) == cc0_rtx
5965 && ! reg_mentioned_p (cc0_rtx, x))
5967 PUT_CODE (prev_insn, NOTE);
5968 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
5969 NOTE_SOURCE_FILE (prev_insn) = 0;
5972 prev_insn_cc0 = this_insn_cc0;
5973 prev_insn_cc0_mode = this_insn_cc0_mode;
5974 #endif
5976 prev_insn = insn;
5979 /* Remove from the hash table all expressions that reference memory. */
5981 static void
5982 invalidate_memory ()
5984 register int i;
5985 register struct table_elt *p, *next;
5987 for (i = 0; i < HASH_SIZE; i++)
5988 for (p = table[i]; p; p = next)
5990 next = p->next_same_hash;
5991 if (p->in_memory)
5992 remove_from_table (p, i);
5996 /* If ADDR is an address that implicitly affects the stack pointer, return
5997 1 and update the register tables to show the effect. Else, return 0. */
5999 static int
6000 addr_affects_sp_p (addr)
6001 register rtx addr;
6003 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
6004 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
6005 && GET_CODE (XEXP (addr, 0)) == REG
6006 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
6008 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
6009 REG_TICK (STACK_POINTER_REGNUM)++;
6011 /* This should be *very* rare. */
6012 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
6013 invalidate (stack_pointer_rtx, VOIDmode);
6015 return 1;
6018 return 0;
6021 /* Perform invalidation on the basis of everything about an insn
6022 except for invalidating the actual places that are SET in it.
6023 This includes the places CLOBBERed, and anything that might
6024 alias with something that is SET or CLOBBERed.
6026 X is the pattern of the insn. */
6028 static void
6029 invalidate_from_clobbers (x)
6030 rtx x;
6032 if (GET_CODE (x) == CLOBBER)
6034 rtx ref = XEXP (x, 0);
6035 if (ref)
6037 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6038 || GET_CODE (ref) == MEM)
6039 invalidate (ref, VOIDmode);
6040 else if (GET_CODE (ref) == STRICT_LOW_PART
6041 || GET_CODE (ref) == ZERO_EXTRACT)
6042 invalidate (XEXP (ref, 0), GET_MODE (ref));
6045 else if (GET_CODE (x) == PARALLEL)
6047 register int i;
6048 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
6050 register rtx y = XVECEXP (x, 0, i);
6051 if (GET_CODE (y) == CLOBBER)
6053 rtx ref = XEXP (y, 0);
6054 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
6055 || GET_CODE (ref) == MEM)
6056 invalidate (ref, VOIDmode);
6057 else if (GET_CODE (ref) == STRICT_LOW_PART
6058 || GET_CODE (ref) == ZERO_EXTRACT)
6059 invalidate (XEXP (ref, 0), GET_MODE (ref));
6065 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6066 and replace any registers in them with either an equivalent constant
6067 or the canonical form of the register. If we are inside an address,
6068 only do this if the address remains valid.
6070 OBJECT is 0 except when within a MEM in which case it is the MEM.
6072 Return the replacement for X. */
6074 static rtx
6075 cse_process_notes (x, object)
6076 rtx x;
6077 rtx object;
6079 enum rtx_code code = GET_CODE (x);
6080 const char *fmt = GET_RTX_FORMAT (code);
6081 int i;
6083 switch (code)
6085 case CONST_INT:
6086 case CONST:
6087 case SYMBOL_REF:
6088 case LABEL_REF:
6089 case CONST_DOUBLE:
6090 case PC:
6091 case CC0:
6092 case LO_SUM:
6093 return x;
6095 case MEM:
6096 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6097 return x;
6099 case EXPR_LIST:
6100 case INSN_LIST:
6101 if (REG_NOTE_KIND (x) == REG_EQUAL)
6102 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6103 if (XEXP (x, 1))
6104 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6105 return x;
6107 case SIGN_EXTEND:
6108 case ZERO_EXTEND:
6109 case SUBREG:
6111 rtx new = cse_process_notes (XEXP (x, 0), object);
6112 /* We don't substitute VOIDmode constants into these rtx,
6113 since they would impede folding. */
6114 if (GET_MODE (new) != VOIDmode)
6115 validate_change (object, &XEXP (x, 0), new, 0);
6116 return x;
6119 case REG:
6120 i = REG_QTY (REGNO (x));
6122 /* Return a constant or a constant register. */
6123 if (REGNO_QTY_VALID_P (REGNO (x)))
6125 struct qty_table_elem *ent = &qty_table[i];
6127 if (ent->const_rtx != NULL_RTX
6128 && (CONSTANT_P (ent->const_rtx)
6129 || GET_CODE (ent->const_rtx) == REG))
6131 rtx new = gen_lowpart_if_possible (GET_MODE (x), ent->const_rtx);
6132 if (new)
6133 return new;
6137 /* Otherwise, canonicalize this register. */
6138 return canon_reg (x, NULL_RTX);
6140 default:
6141 break;
6144 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6145 if (fmt[i] == 'e')
6146 validate_change (object, &XEXP (x, i),
6147 cse_process_notes (XEXP (x, i), object), 0);
6149 return x;
6152 /* Find common subexpressions between the end test of a loop and the beginning
6153 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6155 Often we have a loop where an expression in the exit test is used
6156 in the body of the loop. For example "while (*p) *q++ = *p++;".
6157 Because of the way we duplicate the loop exit test in front of the loop,
6158 however, we don't detect that common subexpression. This will be caught
6159 when global cse is implemented, but this is a quite common case.
6161 This function handles the most common cases of these common expressions.
6162 It is called after we have processed the basic block ending with the
6163 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6164 jumps to a label used only once. */
6166 static void
6167 cse_around_loop (loop_start)
6168 rtx loop_start;
6170 rtx insn;
6171 int i;
6172 struct table_elt *p;
6174 /* If the jump at the end of the loop doesn't go to the start, we don't
6175 do anything. */
6176 for (insn = PREV_INSN (loop_start);
6177 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6178 insn = PREV_INSN (insn))
6181 if (insn == 0
6182 || GET_CODE (insn) != NOTE
6183 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6184 return;
6186 /* If the last insn of the loop (the end test) was an NE comparison,
6187 we will interpret it as an EQ comparison, since we fell through
6188 the loop. Any equivalences resulting from that comparison are
6189 therefore not valid and must be invalidated. */
6190 if (last_jump_equiv_class)
6191 for (p = last_jump_equiv_class->first_same_value; p;
6192 p = p->next_same_value)
6194 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6195 || (GET_CODE (p->exp) == SUBREG
6196 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6197 invalidate (p->exp, VOIDmode);
6198 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6199 || GET_CODE (p->exp) == ZERO_EXTRACT)
6200 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6203 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6204 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6206 The only thing we do with SET_DEST is invalidate entries, so we
6207 can safely process each SET in order. It is slightly less efficient
6208 to do so, but we only want to handle the most common cases.
6210 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6211 These pseudos won't have valid entries in any of the tables indexed
6212 by register number, such as reg_qty. We avoid out-of-range array
6213 accesses by not processing any instructions created after cse started. */
6215 for (insn = NEXT_INSN (loop_start);
6216 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6217 && INSN_UID (insn) < max_insn_uid
6218 && ! (GET_CODE (insn) == NOTE
6219 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6220 insn = NEXT_INSN (insn))
6222 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6223 && (GET_CODE (PATTERN (insn)) == SET
6224 || GET_CODE (PATTERN (insn)) == CLOBBER))
6225 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6226 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6227 && GET_CODE (PATTERN (insn)) == PARALLEL)
6228 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6229 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6230 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6231 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6232 loop_start);
6236 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6237 since they are done elsewhere. This function is called via note_stores. */
6239 static void
6240 invalidate_skipped_set (dest, set, data)
6241 rtx set;
6242 rtx dest;
6243 void *data ATTRIBUTE_UNUSED;
6245 enum rtx_code code = GET_CODE (dest);
6247 if (code == MEM
6248 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6249 /* There are times when an address can appear varying and be a PLUS
6250 during this scan when it would be a fixed address were we to know
6251 the proper equivalences. So invalidate all memory if there is
6252 a BLKmode or nonscalar memory reference or a reference to a
6253 variable address. */
6254 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6255 || cse_rtx_varies_p (XEXP (dest, 0))))
6257 invalidate_memory ();
6258 return;
6261 if (GET_CODE (set) == CLOBBER
6262 #ifdef HAVE_cc0
6263 || dest == cc0_rtx
6264 #endif
6265 || dest == pc_rtx)
6266 return;
6268 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6269 invalidate (XEXP (dest, 0), GET_MODE (dest));
6270 else if (code == REG || code == SUBREG || code == MEM)
6271 invalidate (dest, VOIDmode);
6274 /* Invalidate all insns from START up to the end of the function or the
6275 next label. This called when we wish to CSE around a block that is
6276 conditionally executed. */
6278 static void
6279 invalidate_skipped_block (start)
6280 rtx start;
6282 rtx insn;
6284 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6285 insn = NEXT_INSN (insn))
6287 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6288 continue;
6290 if (GET_CODE (insn) == CALL_INSN)
6292 if (! CONST_CALL_P (insn))
6293 invalidate_memory ();
6294 invalidate_for_call ();
6297 invalidate_from_clobbers (PATTERN (insn));
6298 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6302 /* If modifying X will modify the value in *DATA (which is really an
6303 `rtx *'), indicate that fact by setting the pointed to value to
6304 NULL_RTX. */
6306 static void
6307 cse_check_loop_start (x, set, data)
6308 rtx x;
6309 rtx set ATTRIBUTE_UNUSED;
6310 void *data;
6312 rtx *cse_check_loop_start_value = (rtx *) data;
6314 if (*cse_check_loop_start_value == NULL_RTX
6315 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6316 return;
6318 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6319 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6320 *cse_check_loop_start_value = NULL_RTX;
6323 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6324 a loop that starts with the label at LOOP_START.
6326 If X is a SET, we see if its SET_SRC is currently in our hash table.
6327 If so, we see if it has a value equal to some register used only in the
6328 loop exit code (as marked by jump.c).
6330 If those two conditions are true, we search backwards from the start of
6331 the loop to see if that same value was loaded into a register that still
6332 retains its value at the start of the loop.
6334 If so, we insert an insn after the load to copy the destination of that
6335 load into the equivalent register and (try to) replace our SET_SRC with that
6336 register.
6338 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6340 static void
6341 cse_set_around_loop (x, insn, loop_start)
6342 rtx x;
6343 rtx insn;
6344 rtx loop_start;
6346 struct table_elt *src_elt;
6348 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6349 are setting PC or CC0 or whose SET_SRC is already a register. */
6350 if (GET_CODE (x) == SET
6351 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6352 && GET_CODE (SET_SRC (x)) != REG)
6354 src_elt = lookup (SET_SRC (x),
6355 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6356 GET_MODE (SET_DEST (x)));
6358 if (src_elt)
6359 for (src_elt = src_elt->first_same_value; src_elt;
6360 src_elt = src_elt->next_same_value)
6361 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6362 && COST (src_elt->exp) < COST (SET_SRC (x)))
6364 rtx p, set;
6366 /* Look for an insn in front of LOOP_START that sets
6367 something in the desired mode to SET_SRC (x) before we hit
6368 a label or CALL_INSN. */
6370 for (p = prev_nonnote_insn (loop_start);
6371 p && GET_CODE (p) != CALL_INSN
6372 && GET_CODE (p) != CODE_LABEL;
6373 p = prev_nonnote_insn (p))
6374 if ((set = single_set (p)) != 0
6375 && GET_CODE (SET_DEST (set)) == REG
6376 && GET_MODE (SET_DEST (set)) == src_elt->mode
6377 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6379 /* We now have to ensure that nothing between P
6380 and LOOP_START modified anything referenced in
6381 SET_SRC (x). We know that nothing within the loop
6382 can modify it, or we would have invalidated it in
6383 the hash table. */
6384 rtx q;
6385 rtx cse_check_loop_start_value = SET_SRC (x);
6386 for (q = p; q != loop_start; q = NEXT_INSN (q))
6387 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6388 note_stores (PATTERN (q),
6389 cse_check_loop_start,
6390 &cse_check_loop_start_value);
6392 /* If nothing was changed and we can replace our
6393 SET_SRC, add an insn after P to copy its destination
6394 to what we will be replacing SET_SRC with. */
6395 if (cse_check_loop_start_value
6396 && validate_change (insn, &SET_SRC (x),
6397 src_elt->exp, 0))
6399 /* If this creates new pseudos, this is unsafe,
6400 because the regno of new pseudo is unsuitable
6401 to index into reg_qty when cse_insn processes
6402 the new insn. Therefore, if a new pseudo was
6403 created, discard this optimization. */
6404 int nregs = max_reg_num ();
6405 rtx move
6406 = gen_move_insn (src_elt->exp, SET_DEST (set));
6407 if (nregs != max_reg_num ())
6409 if (! validate_change (insn, &SET_SRC (x),
6410 SET_SRC (set), 0))
6411 abort ();
6413 else
6414 emit_insn_after (move, p);
6416 break;
6421 /* Deal with the destination of X affecting the stack pointer. */
6422 addr_affects_sp_p (SET_DEST (x));
6424 /* See comment on similar code in cse_insn for explanation of these
6425 tests. */
6426 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6427 || GET_CODE (SET_DEST (x)) == MEM)
6428 invalidate (SET_DEST (x), VOIDmode);
6429 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6430 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6431 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6434 /* Find the end of INSN's basic block and return its range,
6435 the total number of SETs in all the insns of the block, the last insn of the
6436 block, and the branch path.
6438 The branch path indicates which branches should be followed. If a non-zero
6439 path size is specified, the block should be rescanned and a different set
6440 of branches will be taken. The branch path is only used if
6441 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6443 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6444 used to describe the block. It is filled in with the information about
6445 the current block. The incoming structure's branch path, if any, is used
6446 to construct the output branch path. */
6448 void
6449 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6450 rtx insn;
6451 struct cse_basic_block_data *data;
6452 int follow_jumps;
6453 int after_loop;
6454 int skip_blocks;
6456 rtx p = insn, q;
6457 int nsets = 0;
6458 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6459 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6460 int path_size = data->path_size;
6461 int path_entry = 0;
6462 int i;
6464 /* Update the previous branch path, if any. If the last branch was
6465 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6466 shorten the path by one and look at the previous branch. We know that
6467 at least one branch must have been taken if PATH_SIZE is non-zero. */
6468 while (path_size > 0)
6470 if (data->path[path_size - 1].status != NOT_TAKEN)
6472 data->path[path_size - 1].status = NOT_TAKEN;
6473 break;
6475 else
6476 path_size--;
6479 /* If the first instruction is marked with QImode, that means we've
6480 already processed this block. Our caller will look at DATA->LAST
6481 to figure out where to go next. We want to return the next block
6482 in the instruction stream, not some branched-to block somewhere
6483 else. We accomplish this by pretending our called forbid us to
6484 follow jumps, or skip blocks. */
6485 if (GET_MODE (insn) == QImode)
6486 follow_jumps = skip_blocks = 0;
6488 /* Scan to end of this basic block. */
6489 while (p && GET_CODE (p) != CODE_LABEL)
6491 /* Don't cse out the end of a loop. This makes a difference
6492 only for the unusual loops that always execute at least once;
6493 all other loops have labels there so we will stop in any case.
6494 Cse'ing out the end of the loop is dangerous because it
6495 might cause an invariant expression inside the loop
6496 to be reused after the end of the loop. This would make it
6497 hard to move the expression out of the loop in loop.c,
6498 especially if it is one of several equivalent expressions
6499 and loop.c would like to eliminate it.
6501 If we are running after loop.c has finished, we can ignore
6502 the NOTE_INSN_LOOP_END. */
6504 if (! after_loop && GET_CODE (p) == NOTE
6505 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6506 break;
6508 /* Don't cse over a call to setjmp; on some machines (eg vax)
6509 the regs restored by the longjmp come from
6510 a later time than the setjmp. */
6511 if (GET_CODE (p) == NOTE
6512 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6513 break;
6515 /* A PARALLEL can have lots of SETs in it,
6516 especially if it is really an ASM_OPERANDS. */
6517 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6518 && GET_CODE (PATTERN (p)) == PARALLEL)
6519 nsets += XVECLEN (PATTERN (p), 0);
6520 else if (GET_CODE (p) != NOTE)
6521 nsets += 1;
6523 /* Ignore insns made by CSE; they cannot affect the boundaries of
6524 the basic block. */
6526 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6527 high_cuid = INSN_CUID (p);
6528 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6529 low_cuid = INSN_CUID (p);
6531 /* See if this insn is in our branch path. If it is and we are to
6532 take it, do so. */
6533 if (path_entry < path_size && data->path[path_entry].branch == p)
6535 if (data->path[path_entry].status != NOT_TAKEN)
6536 p = JUMP_LABEL (p);
6538 /* Point to next entry in path, if any. */
6539 path_entry++;
6542 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6543 was specified, we haven't reached our maximum path length, there are
6544 insns following the target of the jump, this is the only use of the
6545 jump label, and the target label is preceded by a BARRIER.
6547 Alternatively, we can follow the jump if it branches around a
6548 block of code and there are no other branches into the block.
6549 In this case invalidate_skipped_block will be called to invalidate any
6550 registers set in the block when following the jump. */
6552 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6553 && GET_CODE (p) == JUMP_INSN
6554 && GET_CODE (PATTERN (p)) == SET
6555 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6556 && JUMP_LABEL (p) != 0
6557 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6558 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6560 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6561 if ((GET_CODE (q) != NOTE
6562 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6563 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6564 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6565 break;
6567 /* If we ran into a BARRIER, this code is an extension of the
6568 basic block when the branch is taken. */
6569 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6571 /* Don't allow ourself to keep walking around an
6572 always-executed loop. */
6573 if (next_real_insn (q) == next)
6575 p = NEXT_INSN (p);
6576 continue;
6579 /* Similarly, don't put a branch in our path more than once. */
6580 for (i = 0; i < path_entry; i++)
6581 if (data->path[i].branch == p)
6582 break;
6584 if (i != path_entry)
6585 break;
6587 data->path[path_entry].branch = p;
6588 data->path[path_entry++].status = TAKEN;
6590 /* This branch now ends our path. It was possible that we
6591 didn't see this branch the last time around (when the
6592 insn in front of the target was a JUMP_INSN that was
6593 turned into a no-op). */
6594 path_size = path_entry;
6596 p = JUMP_LABEL (p);
6597 /* Mark block so we won't scan it again later. */
6598 PUT_MODE (NEXT_INSN (p), QImode);
6600 /* Detect a branch around a block of code. */
6601 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6603 register rtx tmp;
6605 if (next_real_insn (q) == next)
6607 p = NEXT_INSN (p);
6608 continue;
6611 for (i = 0; i < path_entry; i++)
6612 if (data->path[i].branch == p)
6613 break;
6615 if (i != path_entry)
6616 break;
6618 /* This is no_labels_between_p (p, q) with an added check for
6619 reaching the end of a function (in case Q precedes P). */
6620 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6621 if (GET_CODE (tmp) == CODE_LABEL)
6622 break;
6624 if (tmp == q)
6626 data->path[path_entry].branch = p;
6627 data->path[path_entry++].status = AROUND;
6629 path_size = path_entry;
6631 p = JUMP_LABEL (p);
6632 /* Mark block so we won't scan it again later. */
6633 PUT_MODE (NEXT_INSN (p), QImode);
6637 p = NEXT_INSN (p);
6640 data->low_cuid = low_cuid;
6641 data->high_cuid = high_cuid;
6642 data->nsets = nsets;
6643 data->last = p;
6645 /* If all jumps in the path are not taken, set our path length to zero
6646 so a rescan won't be done. */
6647 for (i = path_size - 1; i >= 0; i--)
6648 if (data->path[i].status != NOT_TAKEN)
6649 break;
6651 if (i == -1)
6652 data->path_size = 0;
6653 else
6654 data->path_size = path_size;
6656 /* End the current branch path. */
6657 data->path[path_size].branch = 0;
6660 /* Perform cse on the instructions of a function.
6661 F is the first instruction.
6662 NREGS is one plus the highest pseudo-reg number used in the instruction.
6664 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6665 (only if -frerun-cse-after-loop).
6667 Returns 1 if jump_optimize should be redone due to simplifications
6668 in conditional jump instructions. */
6671 cse_main (f, nregs, after_loop, file)
6672 rtx f;
6673 int nregs;
6674 int after_loop;
6675 FILE *file;
6677 struct cse_basic_block_data val;
6678 register rtx insn = f;
6679 register int i;
6681 cse_jumps_altered = 0;
6682 recorded_label_ref = 0;
6683 constant_pool_entries_cost = 0;
6684 val.path_size = 0;
6686 init_recog ();
6687 init_alias_analysis ();
6689 max_reg = nregs;
6691 max_insn_uid = get_max_uid ();
6693 reg_eqv_table = (struct reg_eqv_elem *)
6694 xmalloc (nregs * sizeof (struct reg_eqv_elem));
6696 #ifdef LOAD_EXTEND_OP
6698 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6699 and change the code and mode as appropriate. */
6700 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6701 #endif
6703 /* Discard all the free elements of the previous function
6704 since they are allocated in the temporarily obstack. */
6705 bzero ((char *) table, sizeof table);
6706 free_element_chain = 0;
6707 n_elements_made = 0;
6709 /* Find the largest uid. */
6711 max_uid = get_max_uid ();
6712 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6714 /* Compute the mapping from uids to cuids.
6715 CUIDs are numbers assigned to insns, like uids,
6716 except that cuids increase monotonically through the code.
6717 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6718 between two insns is not affected by -g. */
6720 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6722 if (GET_CODE (insn) != NOTE
6723 || NOTE_LINE_NUMBER (insn) < 0)
6724 INSN_CUID (insn) = ++i;
6725 else
6726 /* Give a line number note the same cuid as preceding insn. */
6727 INSN_CUID (insn) = i;
6730 /* Initialize which registers are clobbered by calls. */
6732 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6734 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6735 if ((call_used_regs[i]
6736 /* Used to check !fixed_regs[i] here, but that isn't safe;
6737 fixed regs are still call-clobbered, and sched can get
6738 confused if they can "live across calls".
6740 The frame pointer is always preserved across calls. The arg
6741 pointer is if it is fixed. The stack pointer usually is, unless
6742 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6743 will be present. If we are generating PIC code, the PIC offset
6744 table register is preserved across calls. */
6746 && i != STACK_POINTER_REGNUM
6747 && i != FRAME_POINTER_REGNUM
6748 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6749 && i != HARD_FRAME_POINTER_REGNUM
6750 #endif
6751 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6752 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6753 #endif
6754 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6755 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6756 #endif
6758 || global_regs[i])
6759 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6761 if (ggc_p)
6762 ggc_push_context ();
6764 /* Loop over basic blocks.
6765 Compute the maximum number of qty's needed for each basic block
6766 (which is 2 for each SET). */
6767 insn = f;
6768 while (insn)
6770 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6771 flag_cse_skip_blocks);
6773 /* If this basic block was already processed or has no sets, skip it. */
6774 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6776 PUT_MODE (insn, VOIDmode);
6777 insn = (val.last ? NEXT_INSN (val.last) : 0);
6778 val.path_size = 0;
6779 continue;
6782 cse_basic_block_start = val.low_cuid;
6783 cse_basic_block_end = val.high_cuid;
6784 max_qty = val.nsets * 2;
6786 if (file)
6787 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6788 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6789 val.nsets);
6791 /* Make MAX_QTY bigger to give us room to optimize
6792 past the end of this basic block, if that should prove useful. */
6793 if (max_qty < 500)
6794 max_qty = 500;
6796 max_qty += max_reg;
6798 /* If this basic block is being extended by following certain jumps,
6799 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6800 Otherwise, we start after this basic block. */
6801 if (val.path_size > 0)
6802 cse_basic_block (insn, val.last, val.path, 0);
6803 else
6805 int old_cse_jumps_altered = cse_jumps_altered;
6806 rtx temp;
6808 /* When cse changes a conditional jump to an unconditional
6809 jump, we want to reprocess the block, since it will give
6810 us a new branch path to investigate. */
6811 cse_jumps_altered = 0;
6812 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6813 if (cse_jumps_altered == 0
6814 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6815 insn = temp;
6817 cse_jumps_altered |= old_cse_jumps_altered;
6820 if (ggc_p)
6821 ggc_collect ();
6823 #ifdef USE_C_ALLOCA
6824 alloca (0);
6825 #endif
6828 if (ggc_p)
6829 ggc_pop_context ();
6831 if (max_elements_made < n_elements_made)
6832 max_elements_made = n_elements_made;
6834 /* Clean up. */
6835 end_alias_analysis ();
6836 free (uid_cuid);
6837 free (reg_eqv_table);
6839 return cse_jumps_altered || recorded_label_ref;
6842 /* Process a single basic block. FROM and TO and the limits of the basic
6843 block. NEXT_BRANCH points to the branch path when following jumps or
6844 a null path when not following jumps.
6846 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
6847 loop. This is true when we are being called for the last time on a
6848 block and this CSE pass is before loop.c. */
6850 static rtx
6851 cse_basic_block (from, to, next_branch, around_loop)
6852 register rtx from, to;
6853 struct branch_path *next_branch;
6854 int around_loop;
6856 register rtx insn;
6857 int to_usage = 0;
6858 rtx libcall_insn = NULL_RTX;
6859 int num_insns = 0;
6861 /* This array is undefined before max_reg, so only allocate
6862 the space actually needed and adjust the start. */
6864 qty_table
6865 = (struct qty_table_elem *) xmalloc ((max_qty - max_reg)
6866 * sizeof (struct qty_table_elem));
6867 qty_table -= max_reg;
6869 new_basic_block ();
6871 /* TO might be a label. If so, protect it from being deleted. */
6872 if (to != 0 && GET_CODE (to) == CODE_LABEL)
6873 ++LABEL_NUSES (to);
6875 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6877 register enum rtx_code code = GET_CODE (insn);
6879 /* If we have processed 1,000 insns, flush the hash table to
6880 avoid extreme quadratic behavior. We must not include NOTEs
6881 in the count since there may be more or them when generating
6882 debugging information. If we clear the table at different
6883 times, code generated with -g -O might be different than code
6884 generated with -O but not -g.
6886 ??? This is a real kludge and needs to be done some other way.
6887 Perhaps for 2.9. */
6888 if (code != NOTE && num_insns++ > 1000)
6890 flush_hash_table ();
6891 num_insns = 0;
6894 /* See if this is a branch that is part of the path. If so, and it is
6895 to be taken, do so. */
6896 if (next_branch->branch == insn)
6898 enum taken status = next_branch++->status;
6899 if (status != NOT_TAKEN)
6901 if (status == TAKEN)
6902 record_jump_equiv (insn, 1);
6903 else
6904 invalidate_skipped_block (NEXT_INSN (insn));
6906 /* Set the last insn as the jump insn; it doesn't affect cc0.
6907 Then follow this branch. */
6908 #ifdef HAVE_cc0
6909 prev_insn_cc0 = 0;
6910 #endif
6911 prev_insn = insn;
6912 insn = JUMP_LABEL (insn);
6913 continue;
6917 if (GET_MODE (insn) == QImode)
6918 PUT_MODE (insn, VOIDmode);
6920 if (GET_RTX_CLASS (code) == 'i')
6922 rtx p;
6924 /* Process notes first so we have all notes in canonical forms when
6925 looking for duplicate operations. */
6927 if (REG_NOTES (insn))
6928 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6930 /* Track when we are inside in LIBCALL block. Inside such a block,
6931 we do not want to record destinations. The last insn of a
6932 LIBCALL block is not considered to be part of the block, since
6933 its destination is the result of the block and hence should be
6934 recorded. */
6936 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6937 libcall_insn = XEXP (p, 0);
6938 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6939 libcall_insn = NULL_RTX;
6941 cse_insn (insn, libcall_insn);
6944 /* If INSN is now an unconditional jump, skip to the end of our
6945 basic block by pretending that we just did the last insn in the
6946 basic block. If we are jumping to the end of our block, show
6947 that we can have one usage of TO. */
6949 if (simplejump_p (insn))
6951 if (to == 0)
6953 free (qty_table + max_reg);
6954 return 0;
6957 if (JUMP_LABEL (insn) == to)
6958 to_usage = 1;
6960 /* Maybe TO was deleted because the jump is unconditional.
6961 If so, there is nothing left in this basic block. */
6962 /* ??? Perhaps it would be smarter to set TO
6963 to whatever follows this insn,
6964 and pretend the basic block had always ended here. */
6965 if (INSN_DELETED_P (to))
6966 break;
6968 insn = PREV_INSN (to);
6971 /* See if it is ok to keep on going past the label
6972 which used to end our basic block. Remember that we incremented
6973 the count of that label, so we decrement it here. If we made
6974 a jump unconditional, TO_USAGE will be one; in that case, we don't
6975 want to count the use in that jump. */
6977 if (to != 0 && NEXT_INSN (insn) == to
6978 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
6980 struct cse_basic_block_data val;
6981 rtx prev;
6983 insn = NEXT_INSN (to);
6985 /* If TO was the last insn in the function, we are done. */
6986 if (insn == 0)
6988 free (qty_table + max_reg);
6989 return 0;
6992 /* If TO was preceded by a BARRIER we are done with this block
6993 because it has no continuation. */
6994 prev = prev_nonnote_insn (to);
6995 if (prev && GET_CODE (prev) == BARRIER)
6997 free (qty_table + max_reg);
6998 return insn;
7001 /* Find the end of the following block. Note that we won't be
7002 following branches in this case. */
7003 to_usage = 0;
7004 val.path_size = 0;
7005 cse_end_of_basic_block (insn, &val, 0, 0, 0);
7007 /* If the tables we allocated have enough space left
7008 to handle all the SETs in the next basic block,
7009 continue through it. Otherwise, return,
7010 and that block will be scanned individually. */
7011 if (val.nsets * 2 + next_qty > max_qty)
7012 break;
7014 cse_basic_block_start = val.low_cuid;
7015 cse_basic_block_end = val.high_cuid;
7016 to = val.last;
7018 /* Prevent TO from being deleted if it is a label. */
7019 if (to != 0 && GET_CODE (to) == CODE_LABEL)
7020 ++LABEL_NUSES (to);
7022 /* Back up so we process the first insn in the extension. */
7023 insn = PREV_INSN (insn);
7027 if (next_qty > max_qty)
7028 abort ();
7030 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
7031 the previous insn is the only insn that branches to the head of a loop,
7032 we can cse into the loop. Don't do this if we changed the jump
7033 structure of a loop unless we aren't going to be following jumps. */
7035 if ((cse_jumps_altered == 0
7036 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
7037 && around_loop && to != 0
7038 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
7039 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
7040 && JUMP_LABEL (PREV_INSN (to)) != 0
7041 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
7042 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
7044 free (qty_table + max_reg);
7046 return to ? NEXT_INSN (to) : 0;
7049 /* Count the number of times registers are used (not set) in X.
7050 COUNTS is an array in which we accumulate the count, INCR is how much
7051 we count each register usage.
7053 Don't count a usage of DEST, which is the SET_DEST of a SET which
7054 contains X in its SET_SRC. This is because such a SET does not
7055 modify the liveness of DEST. */
7057 static void
7058 count_reg_usage (x, counts, dest, incr)
7059 rtx x;
7060 int *counts;
7061 rtx dest;
7062 int incr;
7064 enum rtx_code code;
7065 const char *fmt;
7066 int i, j;
7068 if (x == 0)
7069 return;
7071 switch (code = GET_CODE (x))
7073 case REG:
7074 if (x != dest)
7075 counts[REGNO (x)] += incr;
7076 return;
7078 case PC:
7079 case CC0:
7080 case CONST:
7081 case CONST_INT:
7082 case CONST_DOUBLE:
7083 case SYMBOL_REF:
7084 case LABEL_REF:
7085 return;
7087 case CLOBBER:
7088 /* If we are clobbering a MEM, mark any registers inside the address
7089 as being used. */
7090 if (GET_CODE (XEXP (x, 0)) == MEM)
7091 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7092 return;
7094 case SET:
7095 /* Unless we are setting a REG, count everything in SET_DEST. */
7096 if (GET_CODE (SET_DEST (x)) != REG)
7097 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7099 /* If SRC has side-effects, then we can't delete this insn, so the
7100 usage of SET_DEST inside SRC counts.
7102 ??? Strictly-speaking, we might be preserving this insn
7103 because some other SET has side-effects, but that's hard
7104 to do and can't happen now. */
7105 count_reg_usage (SET_SRC (x), counts,
7106 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7107 incr);
7108 return;
7110 case CALL_INSN:
7111 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7113 /* ... falls through ... */
7114 case INSN:
7115 case JUMP_INSN:
7116 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7118 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7119 use them. */
7121 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7122 return;
7124 case EXPR_LIST:
7125 case INSN_LIST:
7126 if (REG_NOTE_KIND (x) == REG_EQUAL
7127 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7128 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7129 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7130 return;
7132 default:
7133 break;
7136 fmt = GET_RTX_FORMAT (code);
7137 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7139 if (fmt[i] == 'e')
7140 count_reg_usage (XEXP (x, i), counts, dest, incr);
7141 else if (fmt[i] == 'E')
7142 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7143 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7147 /* Scan all the insns and delete any that are dead; i.e., they store a register
7148 that is never used or they copy a register to itself.
7150 This is used to remove insns made obviously dead by cse, loop or other
7151 optimizations. It improves the heuristics in loop since it won't try to
7152 move dead invariants out of loops or make givs for dead quantities. The
7153 remaining passes of the compilation are also sped up. */
7155 void
7156 delete_trivially_dead_insns (insns, nreg)
7157 rtx insns;
7158 int nreg;
7160 int *counts;
7161 rtx insn, prev;
7162 #ifdef HAVE_cc0
7163 rtx tem;
7164 #endif
7165 int i;
7166 int in_libcall = 0, dead_libcall = 0;
7168 /* First count the number of times each register is used. */
7169 counts = (int *) xcalloc (nreg, sizeof (int));
7170 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7171 count_reg_usage (insn, counts, NULL_RTX, 1);
7173 /* Go from the last insn to the first and delete insns that only set unused
7174 registers or copy a register to itself. As we delete an insn, remove
7175 usage counts for registers it uses.
7177 The first jump optimization pass may leave a real insn as the last
7178 insn in the function. We must not skip that insn or we may end
7179 up deleting code that is not really dead. */
7180 insn = get_last_insn ();
7181 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7182 insn = prev_real_insn (insn);
7184 for ( ; insn; insn = prev)
7186 int live_insn = 0;
7187 rtx note;
7189 prev = prev_real_insn (insn);
7191 /* Don't delete any insns that are part of a libcall block unless
7192 we can delete the whole libcall block.
7194 Flow or loop might get confused if we did that. Remember
7195 that we are scanning backwards. */
7196 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7198 in_libcall = 1;
7199 live_insn = 1;
7200 dead_libcall = 0;
7202 /* See if there's a REG_EQUAL note on this insn and try to
7203 replace the source with the REG_EQUAL expression.
7205 We assume that insns with REG_RETVALs can only be reg->reg
7206 copies at this point. */
7207 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7208 if (note)
7210 rtx set = single_set (insn);
7211 rtx new = simplify_rtx (XEXP (note, 0));
7213 if (!new)
7214 new = XEXP (note, 0);
7216 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7218 remove_note (insn,
7219 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7220 dead_libcall = 1;
7224 else if (in_libcall)
7225 live_insn = ! dead_libcall;
7226 else if (GET_CODE (PATTERN (insn)) == SET)
7228 if ((GET_CODE (SET_DEST (PATTERN (insn))) == REG
7229 || GET_CODE (SET_DEST (PATTERN (insn))) == SUBREG)
7230 && rtx_equal_p (SET_DEST (PATTERN (insn)),
7231 SET_SRC (PATTERN (insn))))
7234 #ifdef HAVE_cc0
7235 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7236 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7237 && ((tem = next_nonnote_insn (insn)) == 0
7238 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7239 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7241 #endif
7242 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7243 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7244 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7245 || side_effects_p (SET_SRC (PATTERN (insn)))
7246 /* An ADDRESSOF expression can turn into a use of the
7247 internal arg pointer, so always consider the
7248 internal arg pointer live. If it is truly dead,
7249 flow will delete the initializing insn. */
7250 || (SET_DEST (PATTERN (insn))
7251 == current_function_internal_arg_pointer))
7252 live_insn = 1;
7254 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7255 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7257 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7259 if (GET_CODE (elt) == SET)
7261 if ((GET_CODE (SET_DEST (elt)) == REG
7262 || GET_CODE (SET_DEST (elt)) == SUBREG)
7263 && rtx_equal_p (SET_DEST (elt), SET_SRC (elt)))
7266 #ifdef HAVE_cc0
7267 else if (GET_CODE (SET_DEST (elt)) == CC0
7268 && ! side_effects_p (SET_SRC (elt))
7269 && ((tem = next_nonnote_insn (insn)) == 0
7270 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7271 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7273 #endif
7274 else if (GET_CODE (SET_DEST (elt)) != REG
7275 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7276 || counts[REGNO (SET_DEST (elt))] != 0
7277 || side_effects_p (SET_SRC (elt))
7278 /* An ADDRESSOF expression can turn into a use of the
7279 internal arg pointer, so always consider the
7280 internal arg pointer live. If it is truly dead,
7281 flow will delete the initializing insn. */
7282 || (SET_DEST (elt)
7283 == current_function_internal_arg_pointer))
7284 live_insn = 1;
7286 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7287 live_insn = 1;
7289 else
7290 live_insn = 1;
7292 /* If this is a dead insn, delete it and show registers in it aren't
7293 being used. */
7295 if (! live_insn)
7297 count_reg_usage (insn, counts, NULL_RTX, -1);
7298 delete_insn (insn);
7301 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7303 in_libcall = 0;
7304 dead_libcall = 0;
7308 /* Clean up. */
7309 free (counts);