1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 92, 94, 95, 97, 98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
24 #include "insn-config.h"
27 #include "hard-reg-set.h"
29 #include "basic-block.h"
36 #define MAX_MOVE_MAX MOVE_MAX
39 #ifndef MIN_UNITS_PER_WORD
40 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
43 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
45 /* Modes for each hard register that we can save. The smallest mode is wide
46 enough to save the entire contents of the register. When saving the
47 register because it is live we first try to save in multi-register modes.
48 If that is not possible the save is done one register at a time. */
50 static enum machine_mode
51 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
53 /* For each hard register, a place on the stack where it can be saved,
57 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
59 /* We will only make a register eligible for caller-save if it can be
60 saved in its widest mode with a simple SET insn as long as the memory
61 address is valid. We record the INSN_CODE is those insns here since
62 when we emit them, the addresses might not be valid, so they might not
66 reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
68 reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
70 /* Set of hard regs currently residing in save area (during insn scan). */
72 static HARD_REG_SET hard_regs_saved
;
74 /* Number of registers currently in hard_regs_saved. */
76 static int n_regs_saved
;
78 /* Computed by mark_referenced_regs, all regs referenced in a given
80 static HARD_REG_SET referenced_regs
;
82 /* Computed in mark_set_regs, holds all registers set by the current
84 static HARD_REG_SET this_insn_sets
;
87 static void mark_set_regs
PROTO((rtx
, rtx
, void *));
88 static void mark_referenced_regs
PROTO((rtx
));
89 static int insert_save
PROTO((struct insn_chain
*, int, int,
91 static int insert_restore
PROTO((struct insn_chain
*, int, int,
93 static void insert_one_insn
PROTO((struct insn_chain
*, int,
94 enum insn_code
, rtx
));
96 /* Initialize for caller-save.
98 Look at all the hard registers that are used by a call and for which
99 regclass.c has not already excluded from being used across a call.
101 Ensure that we can find a mode to save the register and that there is a
102 simple insn to save and restore the register. This latter check avoids
103 problems that would occur if we tried to save the MQ register of some
104 machines directly into memory. */
109 char *first_obj
= (char *) oballoc (0);
115 /* First find all the registers that we need to deal with and all
116 the modes that they can have. If we can't find a mode to use,
117 we can't have the register live over calls. */
119 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
121 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
123 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
125 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
);
126 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
128 call_fixed_regs
[i
] = 1;
129 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
134 regno_save_mode
[i
][1] = VOIDmode
;
137 /* The following code tries to approximate the conditions under which
138 we can easily save and restore a register without scratch registers or
139 other complexities. It will usually work, except under conditions where
140 the validity of an insn operand is dependent on the address offset.
141 No such cases are currently known.
143 We first find a typical offset from some BASE_REG_CLASS register.
144 This address is chosen by finding the first register in the class
145 and by finding the smallest power of two that is a valid offset from
146 that register in every mode we will use to save registers. */
148 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
149 if (TEST_HARD_REG_BIT (reg_class_contents
[(int) BASE_REG_CLASS
], i
))
152 if (i
== FIRST_PSEUDO_REGISTER
)
155 addr_reg
= gen_rtx_REG (Pmode
, i
);
157 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
159 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
161 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
162 if (regno_save_mode
[i
][1] != VOIDmode
163 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
166 if (i
== FIRST_PSEUDO_REGISTER
)
170 /* If we didn't find a valid address, we must use register indirect. */
174 /* Next we try to form an insn to save and restore the register. We
175 see if such an insn is recognized and meets its constraints. */
179 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
180 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
181 if (regno_save_mode
[i
][j
] != VOIDmode
)
183 rtx mem
= gen_rtx_MEM (regno_save_mode
[i
][j
], address
);
184 rtx reg
= gen_rtx_REG (regno_save_mode
[i
][j
], i
);
185 rtx savepat
= gen_rtx_SET (VOIDmode
, mem
, reg
);
186 rtx restpat
= gen_rtx_SET (VOIDmode
, reg
, mem
);
187 rtx saveinsn
= emit_insn (savepat
);
188 rtx restinsn
= emit_insn (restpat
);
191 reg_save_code
[i
][j
] = recog_memoized (saveinsn
);
192 reg_restore_code
[i
][j
] = recog_memoized (restinsn
);
194 /* Now extract both insns and see if we can meet their
196 ok
= (reg_save_code
[i
][j
] != (enum insn_code
)-1
197 && reg_restore_code
[i
][j
] != (enum insn_code
)-1);
200 extract_insn (saveinsn
);
201 ok
= constrain_operands (1);
202 extract_insn (restinsn
);
203 ok
&= constrain_operands (1);
208 regno_save_mode
[i
][j
] = VOIDmode
;
211 call_fixed_regs
[i
] = 1;
212 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
222 /* Initialize save areas by showing that we haven't allocated any yet. */
229 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
230 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
231 regno_save_mem
[i
][j
] = 0;
234 /* Allocate save areas for any hard registers that might need saving.
235 We take a conservative approach here and look for call-clobbered hard
236 registers that are assigned to pseudos that cross calls. This may
237 overestimate slightly (especially if some of these registers are later
238 used as spill registers), but it should not be significant.
242 In the fallback case we should iterate backwards across all possible
243 modes for the save, choosing the largest available one instead of
244 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
246 We do not try to use "move multiple" instructions that exist
247 on some machines (such as the 68k moveml). It could be a win to try
248 and use them when possible. The hard part is doing it in a way that is
249 machine independent since they might be saving non-consecutive
250 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
256 HARD_REG_SET hard_regs_used
;
258 /* Allocate space in the save area for the largest multi-register
259 pseudos first, then work backwards to single register
262 /* Find and record all call-used hard-registers in this function. */
263 CLEAR_HARD_REG_SET (hard_regs_used
);
264 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
265 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
267 int regno
= reg_renumber
[i
];
269 = regno
+ HARD_REGNO_NREGS (regno
, GET_MODE (regno_reg_rtx
[i
]));
270 int nregs
= endregno
- regno
;
272 for (j
= 0; j
< nregs
; j
++)
274 if (call_used_regs
[regno
+j
])
275 SET_HARD_REG_BIT (hard_regs_used
, regno
+j
);
279 /* Now run through all the call-used hard-registers and allocate
280 space for them in the caller-save area. Try to allocate space
281 in a manner which allows multi-register saves/restores to be done. */
283 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
284 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
288 /* If no mode exists for this size, try another. Also break out
289 if we have already saved this hard register. */
290 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
293 /* See if any register in this group has been saved. */
294 for (k
= 0; k
< j
; k
++)
295 if (regno_save_mem
[i
+ k
][1])
303 for (k
= 0; k
< j
; k
++)
304 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
312 /* We have found an acceptable mode to store in. */
314 = assign_stack_local (regno_save_mode
[i
][j
],
315 GET_MODE_SIZE (regno_save_mode
[i
][j
]), 0);
317 /* Setup single word save area just in case... */
318 for (k
= 0; k
< j
; k
++)
320 /* This should not depend on WORDS_BIG_ENDIAN.
321 The order of words in regs is the same as in memory. */
322 rtx temp
= gen_rtx_MEM (regno_save_mode
[i
+k
][1],
323 XEXP (regno_save_mem
[i
][j
], 0));
325 regno_save_mem
[i
+k
][1]
326 = adj_offsettable_operand (temp
, k
* UNITS_PER_WORD
);
331 /* Find the places where hard regs are live across calls and save them. */
333 save_call_clobbered_regs ()
335 struct insn_chain
*chain
, *next
;
337 CLEAR_HARD_REG_SET (hard_regs_saved
);
340 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
342 rtx insn
= chain
->insn
;
343 enum rtx_code code
= GET_CODE (insn
);
347 if (chain
->is_caller_save_insn
)
350 if (GET_RTX_CLASS (code
) == 'i')
352 /* If some registers have been saved, see if INSN references
353 any of them. We must restore them before the insn if so. */
359 if (code
== JUMP_INSN
)
360 /* Restore all registers if this is a JUMP_INSN. */
361 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
364 CLEAR_HARD_REG_SET (referenced_regs
);
365 mark_referenced_regs (PATTERN (insn
));
366 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
369 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
370 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
371 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
);
374 if (code
== CALL_INSN
)
378 HARD_REG_SET hard_regs_to_save
;
380 /* Use the register life information in CHAIN to compute which
381 regs are live before the call. */
382 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
, chain
->live_before
);
383 compute_use_by_pseudos (&hard_regs_to_save
, chain
->live_before
);
385 /* Record all registers set in this call insn. These don't need
387 CLEAR_HARD_REG_SET (this_insn_sets
);
388 note_stores (PATTERN (insn
), mark_set_regs
, NULL
);
390 /* Compute which hard regs must be saved before this call. */
391 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
392 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
393 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
394 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
396 /* Registers used for function parameters need not be saved. */
397 for (x
= CALL_INSN_FUNCTION_USAGE (insn
); x
!= 0;
402 if (GET_CODE (XEXP (x
, 0)) != USE
)
404 y
= XEXP (XEXP (x
, 0), 0);
405 if (GET_CODE (y
) != REG
)
408 if (REGNO (y
) >= FIRST_PSEUDO_REGISTER
)
410 nregs
= HARD_REGNO_NREGS (regno
, GET_MODE (y
));
412 CLEAR_HARD_REG_BIT (hard_regs_to_save
, regno
+ nregs
);
415 /* Neither do registers for which we find a death note. */
416 for (x
= REG_NOTES (insn
); x
!= 0; x
= XEXP (x
, 1))
420 if (REG_NOTE_KIND (x
) != REG_DEAD
)
422 if (GET_CODE (y
) != REG
)
426 if (regno
>= FIRST_PSEUDO_REGISTER
)
427 regno
= reg_renumber
[regno
];
430 nregs
= HARD_REGNO_NREGS (regno
, GET_MODE (y
));
432 CLEAR_HARD_REG_BIT (hard_regs_to_save
, regno
+ nregs
);
435 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
436 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
437 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
);
439 /* Must recompute n_regs_saved. */
441 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
442 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
447 if (chain
->next
== 0 || chain
->next
->block
> chain
->block
)
450 /* At the end of the basic block, we must restore any registers that
451 remain saved. If the last insn in the block is a JUMP_INSN, put
452 the restore before the insn, otherwise, put it after the insn. */
455 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
456 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
457 regno
+= insert_restore (chain
, GET_CODE (insn
) == JUMP_INSN
,
458 regno
, MOVE_MAX_WORDS
);
463 /* Here from note_stores when an insn stores a value in a register.
464 Set the proper bit or bits in this_insn_sets. All pseudos that have
465 been assigned hard regs have had their register number changed already,
466 so we can ignore pseudos. */
468 mark_set_regs (reg
, setter
, data
)
470 rtx setter ATTRIBUTE_UNUSED
;
471 void *data ATTRIBUTE_UNUSED
;
473 register int regno
, endregno
, i
;
474 enum machine_mode mode
= GET_MODE (reg
);
477 if (GET_CODE (reg
) == SUBREG
)
479 word
= SUBREG_WORD (reg
);
480 reg
= SUBREG_REG (reg
);
483 if (GET_CODE (reg
) != REG
|| REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
486 regno
= REGNO (reg
) + word
;
487 endregno
= regno
+ HARD_REGNO_NREGS (regno
, mode
);
489 for (i
= regno
; i
< endregno
; i
++)
490 SET_HARD_REG_BIT (this_insn_sets
, i
);
493 /* Walk X and record all referenced registers in REFERENCED_REGS. */
495 mark_referenced_regs (x
)
498 enum rtx_code code
= GET_CODE (x
);
503 mark_referenced_regs (SET_SRC (x
));
504 if (code
== SET
|| code
== CLOBBER
)
508 if (code
== REG
|| code
== PC
|| code
== CC0
509 || (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
512 if (code
== MEM
|| code
== SUBREG
)
520 int regno
= REGNO (x
);
521 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
522 : reg_renumber
[regno
]);
526 int nregs
= HARD_REGNO_NREGS (hardregno
, GET_MODE (x
));
528 SET_HARD_REG_BIT (referenced_regs
, hardregno
+ nregs
);
530 /* If this is a pseudo that did not get a hard register, scan its
531 memory location, since it might involve the use of another
532 register, which might be saved. */
533 else if (reg_equiv_mem
[regno
] != 0)
534 mark_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0));
535 else if (reg_equiv_address
[regno
] != 0)
536 mark_referenced_regs (reg_equiv_address
[regno
]);
540 fmt
= GET_RTX_FORMAT (code
);
541 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
544 mark_referenced_regs (XEXP (x
, i
));
545 else if (fmt
[i
] == 'E')
546 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
547 mark_referenced_regs (XVECEXP (x
, i
, j
));
551 /* Insert a sequence of insns to restore. Place these insns in front of
552 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
553 the maximum number of registers which should be restored during this call.
554 It should never be less than 1 since we only work with entire registers.
556 Note that we have verified in init_caller_save that we can do this
557 with a simple SET, so use it. Set INSN_CODE to what we save there
558 since the address might not be valid so the insn might not be recognized.
559 These insns will be reloaded and have register elimination done by
560 find_reload, so we need not worry about that here.
562 Return the extra number of registers saved. */
565 insert_restore (chain
, before_p
, regno
, maxrestore
)
566 struct insn_chain
*chain
;
573 enum insn_code code
= CODE_FOR_nothing
;
576 /* A common failure mode if register status is not correct in the RTL
577 is for this routine to be called with a REGNO we didn't expect to
578 save. That will cause us to write an insn with a (nil) SET_DEST
579 or SET_SRC. Instead of doing so and causing a crash later, check
580 for this common case and abort here instead. This will remove one
581 step in debugging such problems. */
583 if (regno_save_mem
[regno
][1] == 0)
586 /* Get the pattern to emit and update our status.
588 See if we can restore `maxrestore' registers at once. Work
589 backwards to the single register case. */
590 for (i
= maxrestore
; i
> 0; i
--)
595 if (regno_save_mem
[regno
][i
] == 0)
598 for (j
= 0; j
< i
; j
++)
599 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
604 /* Must do this one restore at a time */
608 pat
= gen_rtx_SET (VOIDmode
,
609 gen_rtx_REG (GET_MODE (regno_save_mem
[regno
][i
]),
611 regno_save_mem
[regno
][i
]);
612 code
= reg_restore_code
[regno
][i
];
614 /* Clear status for all registers we restored. */
615 for (k
= 0; k
< i
; k
++)
617 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
625 insert_one_insn (chain
, before_p
, code
, pat
);
627 /* Tell our callers how many extra registers we saved/restored */
631 /* Like insert_restore above, but save registers instead. */
633 insert_save (chain
, before_p
, regno
, to_save
)
634 struct insn_chain
*chain
;
637 HARD_REG_SET
*to_save
;
641 enum insn_code code
= CODE_FOR_nothing
;
644 /* A common failure mode if register status is not correct in the RTL
645 is for this routine to be called with a REGNO we didn't expect to
646 save. That will cause us to write an insn with a (nil) SET_DEST
647 or SET_SRC. Instead of doing so and causing a crash later, check
648 for this common case and abort here instead. This will remove one
649 step in debugging such problems. */
651 if (regno_save_mem
[regno
][1] == 0)
654 /* Get the pattern to emit and update our status.
656 See if we can save several registers with a single instruction.
657 Work backwards to the single register case. */
658 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
662 if (regno_save_mem
[regno
][i
] == 0)
665 for (j
= 0; j
< i
; j
++)
666 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
671 /* Must do this one save at a time */
675 pat
= gen_rtx_SET (VOIDmode
, regno_save_mem
[regno
][i
],
676 gen_rtx_REG (GET_MODE (regno_save_mem
[regno
][i
]),
678 code
= reg_save_code
[regno
][i
];
680 /* Set hard_regs_saved for all the registers we saved. */
681 for (k
= 0; k
< i
; k
++)
683 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
691 insert_one_insn (chain
, before_p
, code
, pat
);
693 /* Tell our callers how many extra registers we saved/restored */
697 /* Emit a new caller-save insn and set the code. */
699 insert_one_insn (chain
, before_p
, code
, pat
)
700 struct insn_chain
*chain
;
705 rtx insn
= chain
->insn
;
706 struct insn_chain
*new;
709 /* If INSN references CC0, put our insns in front of the insn that sets
710 CC0. This is always safe, since the only way we could be passed an
711 insn that references CC0 is for a restore, and doing a restore earlier
712 isn't a problem. We do, however, assume here that CALL_INSNs don't
713 reference CC0. Guard against non-INSN's like CODE_LABEL. */
715 if ((GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == JUMP_INSN
)
717 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
718 chain
= chain
->prev
, insn
= chain
->insn
;
721 new = new_insn_chain ();
724 new->prev
= chain
->prev
;
726 new->prev
->next
= new;
728 reload_insn_chain
= new;
732 new->insn
= emit_insn_before (pat
, insn
);
733 /* ??? It would be nice if we could exclude the already / still saved
734 registers from the live sets. */
735 COPY_REG_SET (new->live_before
, chain
->live_before
);
736 COPY_REG_SET (new->live_after
, chain
->live_before
);
737 if (chain
->insn
== BLOCK_HEAD (chain
->block
))
738 BLOCK_HEAD (chain
->block
) = new->insn
;
742 new->next
= chain
->next
;
744 new->next
->prev
= new;
747 new->insn
= emit_insn_after (pat
, insn
);
748 /* ??? It would be nice if we could exclude the already / still saved
749 registers from the live sets, and observe REG_UNUSED notes. */
750 COPY_REG_SET (new->live_before
, chain
->live_after
);
751 COPY_REG_SET (new->live_after
, chain
->live_after
);
752 if (chain
->insn
== BLOCK_END (chain
->block
))
753 BLOCK_END (chain
->block
) = new->insn
;
755 new->block
= chain
->block
;
756 new->is_caller_save_insn
= 1;
758 INSN_CODE (new->insn
) = code
;