1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989, 1992, 1994, 1995, 1997, 1998, 1999, 2000,
3 2001, 2002, 2003, 2004, 2005, 2006, 2007 Free Software Foundation, Inc.
5 This file is part of GCC.
7 GCC is free software; you can redistribute it and/or modify it under
8 the terms of the GNU General Public License as published by the Free
9 Software Foundation; either version 3, or (at your option) any later
12 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 You should have received a copy of the GNU General Public License
18 along with GCC; see the file COPYING3. If not see
19 <http://www.gnu.org/licenses/>. */
23 #include "coretypes.h"
27 #include "insn-config.h"
29 #include "hard-reg-set.h"
31 #include "basic-block.h"
37 #include "addresses.h"
42 #define MAX_MOVE_MAX MOVE_MAX
45 #ifndef MIN_UNITS_PER_WORD
46 #define MIN_UNITS_PER_WORD UNITS_PER_WORD
49 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
51 /* Modes for each hard register that we can save. The smallest mode is wide
52 enough to save the entire contents of the register. When saving the
53 register because it is live we first try to save in multi-register modes.
54 If that is not possible the save is done one register at a time. */
56 static enum machine_mode
57 regno_save_mode
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
59 /* For each hard register, a place on the stack where it can be saved,
63 regno_save_mem
[FIRST_PSEUDO_REGISTER
][MAX_MOVE_MAX
/ MIN_UNITS_PER_WORD
+ 1];
65 /* We will only make a register eligible for caller-save if it can be
66 saved in its widest mode with a simple SET insn as long as the memory
67 address is valid. We record the INSN_CODE is those insns here since
68 when we emit them, the addresses might not be valid, so they might not
72 cached_reg_save_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
74 cached_reg_restore_code
[FIRST_PSEUDO_REGISTER
][MAX_MACHINE_MODE
];
76 /* Set of hard regs currently residing in save area (during insn scan). */
78 static HARD_REG_SET hard_regs_saved
;
80 /* Number of registers currently in hard_regs_saved. */
82 static int n_regs_saved
;
84 /* Computed by mark_referenced_regs, all regs referenced in a given
86 static HARD_REG_SET referenced_regs
;
89 static void mark_set_regs (rtx
, const_rtx
, void *);
90 static void mark_referenced_regs (rtx
);
91 static int insert_save (struct insn_chain
*, int, int, HARD_REG_SET
*,
93 static int insert_restore (struct insn_chain
*, int, int, int,
95 static struct insn_chain
*insert_one_insn (struct insn_chain
*, int, int,
97 static void add_stored_regs (rtx
, const_rtx
, void *);
99 static GTY(()) rtx savepat
;
100 static GTY(()) rtx restpat
;
101 static GTY(()) rtx test_reg
;
102 static GTY(()) rtx test_mem
;
103 static GTY(()) rtx saveinsn
;
104 static GTY(()) rtx restinsn
;
106 /* Return the INSN_CODE used to save register REG in mode MODE. */
108 reg_save_code (int reg
, enum machine_mode mode
)
111 if (cached_reg_save_code
[reg
][mode
])
112 return cached_reg_save_code
[reg
][mode
];
113 if (!HARD_REGNO_MODE_OK (reg
, mode
))
115 cached_reg_save_code
[reg
][mode
] = -1;
119 /* Update the register number and modes of the register
120 and memory operand. */
121 SET_REGNO (test_reg
, reg
);
122 PUT_MODE (test_reg
, mode
);
123 PUT_MODE (test_mem
, mode
);
125 /* Force re-recognition of the modified insns. */
126 INSN_CODE (saveinsn
) = -1;
128 cached_reg_save_code
[reg
][mode
] = recog_memoized (saveinsn
);
129 cached_reg_restore_code
[reg
][mode
] = recog_memoized (restinsn
);
131 /* Now extract both insns and see if we can meet their
133 ok
= (cached_reg_save_code
[reg
][mode
] != -1
134 && cached_reg_restore_code
[reg
][mode
] != -1);
137 extract_insn (saveinsn
);
138 ok
= constrain_operands (1);
139 extract_insn (restinsn
);
140 ok
&= constrain_operands (1);
145 cached_reg_save_code
[reg
][mode
] = -1;
146 cached_reg_restore_code
[reg
][mode
] = -1;
148 gcc_assert (cached_reg_save_code
[reg
][mode
]);
149 return cached_reg_save_code
[reg
][mode
];
152 /* Return the INSN_CODE used to restore register REG in mode MODE. */
154 reg_restore_code (int reg
, enum machine_mode mode
)
156 if (cached_reg_restore_code
[reg
][mode
])
157 return cached_reg_restore_code
[reg
][mode
];
158 /* Populate our cache. */
159 reg_save_code (reg
, mode
);
160 return cached_reg_restore_code
[reg
][mode
];
163 /* Initialize for caller-save.
165 Look at all the hard registers that are used by a call and for which
166 regclass.c has not already excluded from being used across a call.
168 Ensure that we can find a mode to save the register and that there is a
169 simple insn to save and restore the register. This latter check avoids
170 problems that would occur if we tried to save the MQ register of some
171 machines directly into memory. */
174 init_caller_save (void)
181 /* First find all the registers that we need to deal with and all
182 the modes that they can have. If we can't find a mode to use,
183 we can't have the register live over calls. */
185 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
187 if (call_used_regs
[i
] && ! call_fixed_regs
[i
])
189 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
191 regno_save_mode
[i
][j
] = HARD_REGNO_CALLER_SAVE_MODE (i
, j
,
193 if (regno_save_mode
[i
][j
] == VOIDmode
&& j
== 1)
195 call_fixed_regs
[i
] = 1;
196 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
201 regno_save_mode
[i
][1] = VOIDmode
;
204 /* The following code tries to approximate the conditions under which
205 we can easily save and restore a register without scratch registers or
206 other complexities. It will usually work, except under conditions where
207 the validity of an insn operand is dependent on the address offset.
208 No such cases are currently known.
210 We first find a typical offset from some BASE_REG_CLASS register.
211 This address is chosen by finding the first register in the class
212 and by finding the smallest power of two that is a valid offset from
213 that register in every mode we will use to save registers. */
215 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
216 if (TEST_HARD_REG_BIT
218 [(int) base_reg_class (regno_save_mode
[i
][1], PLUS
, CONST_INT
)], i
))
221 gcc_assert (i
< FIRST_PSEUDO_REGISTER
);
223 addr_reg
= gen_rtx_REG (Pmode
, i
);
225 for (offset
= 1 << (HOST_BITS_PER_INT
/ 2); offset
; offset
>>= 1)
227 address
= gen_rtx_PLUS (Pmode
, addr_reg
, GEN_INT (offset
));
229 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
230 if (regno_save_mode
[i
][1] != VOIDmode
231 && ! strict_memory_address_p (regno_save_mode
[i
][1], address
))
234 if (i
== FIRST_PSEUDO_REGISTER
)
238 /* If we didn't find a valid address, we must use register indirect. */
242 /* Next we try to form an insn to save and restore the register. We
243 see if such an insn is recognized and meets its constraints.
245 To avoid lots of unnecessary RTL allocation, we construct all the RTL
246 once, then modify the memory and register operands in-place. */
248 test_reg
= gen_rtx_REG (VOIDmode
, 0);
249 test_mem
= gen_rtx_MEM (VOIDmode
, address
);
250 savepat
= gen_rtx_SET (VOIDmode
, test_mem
, test_reg
);
251 restpat
= gen_rtx_SET (VOIDmode
, test_reg
, test_mem
);
253 saveinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, savepat
, -1, 0);
254 restinsn
= gen_rtx_INSN (VOIDmode
, 0, 0, 0, 0, 0, restpat
, -1, 0);
256 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
257 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
258 if (reg_save_code (i
,regno_save_mode
[i
][j
]) == -1)
260 regno_save_mode
[i
][j
] = VOIDmode
;
263 call_fixed_regs
[i
] = 1;
264 SET_HARD_REG_BIT (call_fixed_reg_set
, i
);
269 /* Initialize save areas by showing that we haven't allocated any yet. */
272 init_save_areas (void)
276 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
277 for (j
= 1; j
<= MOVE_MAX_WORDS
; j
++)
278 regno_save_mem
[i
][j
] = 0;
281 /* Allocate save areas for any hard registers that might need saving.
282 We take a conservative approach here and look for call-clobbered hard
283 registers that are assigned to pseudos that cross calls. This may
284 overestimate slightly (especially if some of these registers are later
285 used as spill registers), but it should not be significant.
289 In the fallback case we should iterate backwards across all possible
290 modes for the save, choosing the largest available one instead of
291 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
293 We do not try to use "move multiple" instructions that exist
294 on some machines (such as the 68k moveml). It could be a win to try
295 and use them when possible. The hard part is doing it in a way that is
296 machine independent since they might be saving non-consecutive
297 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
300 setup_save_areas (void)
304 HARD_REG_SET hard_regs_used
;
306 /* Allocate space in the save area for the largest multi-register
307 pseudos first, then work backwards to single register
310 /* Find and record all call-used hard-registers in this function. */
311 CLEAR_HARD_REG_SET (hard_regs_used
);
312 for (i
= FIRST_PSEUDO_REGISTER
; i
< max_regno
; i
++)
313 if (reg_renumber
[i
] >= 0 && REG_N_CALLS_CROSSED (i
) > 0)
315 unsigned int regno
= reg_renumber
[i
];
316 unsigned int endregno
317 = end_hard_regno (GET_MODE (regno_reg_rtx
[i
]), regno
);
319 for (r
= regno
; r
< endregno
; r
++)
320 if (call_used_regs
[r
])
321 SET_HARD_REG_BIT (hard_regs_used
, r
);
324 /* Now run through all the call-used hard-registers and allocate
325 space for them in the caller-save area. Try to allocate space
326 in a manner which allows multi-register saves/restores to be done. */
328 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
329 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
333 /* If no mode exists for this size, try another. Also break out
334 if we have already saved this hard register. */
335 if (regno_save_mode
[i
][j
] == VOIDmode
|| regno_save_mem
[i
][1] != 0)
338 /* See if any register in this group has been saved. */
339 for (k
= 0; k
< j
; k
++)
340 if (regno_save_mem
[i
+ k
][1])
348 for (k
= 0; k
< j
; k
++)
349 if (! TEST_HARD_REG_BIT (hard_regs_used
, i
+ k
))
357 /* We have found an acceptable mode to store in. */
359 = assign_stack_local (regno_save_mode
[i
][j
],
360 GET_MODE_SIZE (regno_save_mode
[i
][j
]), 0);
362 /* Setup single word save area just in case... */
363 for (k
= 0; k
< j
; k
++)
364 /* This should not depend on WORDS_BIG_ENDIAN.
365 The order of words in regs is the same as in memory. */
366 regno_save_mem
[i
+ k
][1]
367 = adjust_address_nv (regno_save_mem
[i
][j
],
368 regno_save_mode
[i
+ k
][1],
372 /* Now loop again and set the alias set of any save areas we made to
373 the alias set used to represent frame objects. */
374 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
375 for (j
= MOVE_MAX_WORDS
; j
> 0; j
--)
376 if (regno_save_mem
[i
][j
] != 0)
377 set_mem_alias_set (regno_save_mem
[i
][j
], get_frame_alias_set ());
380 /* Find the places where hard regs are live across calls and save them. */
383 save_call_clobbered_regs (void)
385 struct insn_chain
*chain
, *next
;
386 enum machine_mode save_mode
[FIRST_PSEUDO_REGISTER
];
388 /* Computed in mark_set_regs, holds all registers set by the current
390 HARD_REG_SET this_insn_sets
;
392 CLEAR_HARD_REG_SET (hard_regs_saved
);
395 for (chain
= reload_insn_chain
; chain
!= 0; chain
= next
)
397 rtx insn
= chain
->insn
;
398 enum rtx_code code
= GET_CODE (insn
);
402 gcc_assert (!chain
->is_caller_save_insn
);
406 /* If some registers have been saved, see if INSN references
407 any of them. We must restore them before the insn if so. */
413 if (code
== JUMP_INSN
)
414 /* Restore all registers if this is a JUMP_INSN. */
415 COPY_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
418 CLEAR_HARD_REG_SET (referenced_regs
);
419 mark_referenced_regs (PATTERN (insn
));
420 AND_HARD_REG_SET (referenced_regs
, hard_regs_saved
);
423 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
424 if (TEST_HARD_REG_BIT (referenced_regs
, regno
))
425 regno
+= insert_restore (chain
, 1, regno
, MOVE_MAX_WORDS
, save_mode
);
428 if (code
== CALL_INSN
429 && ! SIBLING_CALL_P (insn
)
430 && ! find_reg_note (insn
, REG_NORETURN
, NULL
))
433 HARD_REG_SET hard_regs_to_save
;
434 reg_set_iterator rsi
;
436 /* Use the register life information in CHAIN to compute which
437 regs are live during the call. */
438 REG_SET_TO_HARD_REG_SET (hard_regs_to_save
,
439 &chain
->live_throughout
);
440 /* Save hard registers always in the widest mode available. */
441 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
442 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
443 save_mode
[regno
] = regno_save_mode
[regno
][1];
445 save_mode
[regno
] = VOIDmode
;
447 /* Look through all live pseudos, mark their hard registers
448 and choose proper mode for saving. */
449 EXECUTE_IF_SET_IN_REG_SET
450 (&chain
->live_throughout
, FIRST_PSEUDO_REGISTER
, regno
, rsi
)
452 int r
= reg_renumber
[regno
];
454 enum machine_mode mode
;
457 nregs
= hard_regno_nregs
[r
][PSEUDO_REGNO_MODE (regno
)];
458 mode
= HARD_REGNO_CALLER_SAVE_MODE
459 (r
, nregs
, PSEUDO_REGNO_MODE (regno
));
460 if (GET_MODE_BITSIZE (mode
)
461 > GET_MODE_BITSIZE (save_mode
[r
]))
464 SET_HARD_REG_BIT (hard_regs_to_save
, r
+ nregs
);
467 /* Record all registers set in this call insn. These don't need
468 to be saved. N.B. the call insn might set a subreg of a
469 multi-hard-reg pseudo; then the pseudo is considered live
470 during the call, but the subreg that is set isn't. */
471 CLEAR_HARD_REG_SET (this_insn_sets
);
472 note_stores (PATTERN (insn
), mark_set_regs
, &this_insn_sets
);
474 /* Compute which hard regs must be saved before this call. */
475 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, call_fixed_reg_set
);
476 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, this_insn_sets
);
477 AND_COMPL_HARD_REG_SET (hard_regs_to_save
, hard_regs_saved
);
478 AND_HARD_REG_SET (hard_regs_to_save
, call_used_reg_set
);
480 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
481 if (TEST_HARD_REG_BIT (hard_regs_to_save
, regno
))
482 regno
+= insert_save (chain
, 1, regno
, &hard_regs_to_save
, save_mode
);
484 /* Must recompute n_regs_saved. */
486 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
487 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
492 if (chain
->next
== 0 || chain
->next
->block
> chain
->block
)
495 /* At the end of the basic block, we must restore any registers that
496 remain saved. If the last insn in the block is a JUMP_INSN, put
497 the restore before the insn, otherwise, put it after the insn. */
500 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
501 if (TEST_HARD_REG_BIT (hard_regs_saved
, regno
))
502 regno
+= insert_restore (chain
, JUMP_P (insn
),
503 regno
, MOVE_MAX_WORDS
, save_mode
);
508 /* Here from note_stores, or directly from save_call_clobbered_regs, when
509 an insn stores a value in a register.
510 Set the proper bit or bits in this_insn_sets. All pseudos that have
511 been assigned hard regs have had their register number changed already,
512 so we can ignore pseudos. */
514 mark_set_regs (rtx reg
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
516 int regno
, endregno
, i
;
517 HARD_REG_SET
*this_insn_sets
= data
;
519 if (GET_CODE (reg
) == SUBREG
)
521 rtx inner
= SUBREG_REG (reg
);
522 if (!REG_P (inner
) || REGNO (inner
) >= FIRST_PSEUDO_REGISTER
)
524 regno
= subreg_regno (reg
);
525 endregno
= regno
+ subreg_nregs (reg
);
528 && REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
531 endregno
= END_HARD_REGNO (reg
);
536 for (i
= regno
; i
< endregno
; i
++)
537 SET_HARD_REG_BIT (*this_insn_sets
, i
);
540 /* Here from note_stores when an insn stores a value in a register.
541 Set the proper bit or bits in the passed regset. All pseudos that have
542 been assigned hard regs have had their register number changed already,
543 so we can ignore pseudos. */
545 add_stored_regs (rtx reg
, const_rtx setter
, void *data
)
547 int regno
, endregno
, i
;
548 enum machine_mode mode
= GET_MODE (reg
);
551 if (GET_CODE (setter
) == CLOBBER
)
554 if (GET_CODE (reg
) == SUBREG
555 && REG_P (SUBREG_REG (reg
))
556 && REGNO (SUBREG_REG (reg
)) < FIRST_PSEUDO_REGISTER
)
558 offset
= subreg_regno_offset (REGNO (SUBREG_REG (reg
)),
559 GET_MODE (SUBREG_REG (reg
)),
562 regno
= REGNO (SUBREG_REG (reg
)) + offset
;
563 endregno
= regno
+ subreg_nregs (reg
);
567 if (!REG_P (reg
) || REGNO (reg
) >= FIRST_PSEUDO_REGISTER
)
570 regno
= REGNO (reg
) + offset
;
571 endregno
= end_hard_regno (mode
, regno
);
574 for (i
= regno
; i
< endregno
; i
++)
575 SET_REGNO_REG_SET ((regset
) data
, i
);
578 /* Walk X and record all referenced registers in REFERENCED_REGS. */
580 mark_referenced_regs (rtx x
)
582 enum rtx_code code
= GET_CODE (x
);
587 mark_referenced_regs (SET_SRC (x
));
588 if (code
== SET
|| code
== CLOBBER
)
592 if ((code
== REG
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
)
593 || code
== PC
|| code
== CC0
594 || (code
== SUBREG
&& REG_P (SUBREG_REG (x
))
595 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
596 /* If we're setting only part of a multi-word register,
597 we shall mark it as referenced, because the words
598 that are not being set should be restored. */
599 && ((GET_MODE_SIZE (GET_MODE (x
))
600 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
601 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
602 <= UNITS_PER_WORD
))))
605 if (code
== MEM
|| code
== SUBREG
)
613 int regno
= REGNO (x
);
614 int hardregno
= (regno
< FIRST_PSEUDO_REGISTER
? regno
615 : reg_renumber
[regno
]);
618 add_to_hard_reg_set (&referenced_regs
, GET_MODE (x
), hardregno
);
619 /* If this is a pseudo that did not get a hard register, scan its
620 memory location, since it might involve the use of another
621 register, which might be saved. */
622 else if (reg_equiv_mem
[regno
] != 0)
623 mark_referenced_regs (XEXP (reg_equiv_mem
[regno
], 0));
624 else if (reg_equiv_address
[regno
] != 0)
625 mark_referenced_regs (reg_equiv_address
[regno
]);
629 fmt
= GET_RTX_FORMAT (code
);
630 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
633 mark_referenced_regs (XEXP (x
, i
));
634 else if (fmt
[i
] == 'E')
635 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
636 mark_referenced_regs (XVECEXP (x
, i
, j
));
640 /* Insert a sequence of insns to restore. Place these insns in front of
641 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
642 the maximum number of registers which should be restored during this call.
643 It should never be less than 1 since we only work with entire registers.
645 Note that we have verified in init_caller_save that we can do this
646 with a simple SET, so use it. Set INSN_CODE to what we save there
647 since the address might not be valid so the insn might not be recognized.
648 These insns will be reloaded and have register elimination done by
649 find_reload, so we need not worry about that here.
651 Return the extra number of registers saved. */
654 insert_restore (struct insn_chain
*chain
, int before_p
, int regno
,
655 int maxrestore
, enum machine_mode
*save_mode
)
660 unsigned int numregs
= 0;
661 struct insn_chain
*new;
664 /* A common failure mode if register status is not correct in the
665 RTL is for this routine to be called with a REGNO we didn't
666 expect to save. That will cause us to write an insn with a (nil)
667 SET_DEST or SET_SRC. Instead of doing so and causing a crash
668 later, check for this common case here instead. This will remove
669 one step in debugging such problems. */
670 gcc_assert (regno_save_mem
[regno
][1]);
672 /* Get the pattern to emit and update our status.
674 See if we can restore `maxrestore' registers at once. Work
675 backwards to the single register case. */
676 for (i
= maxrestore
; i
> 0; i
--)
681 if (regno_save_mem
[regno
][i
] == 0)
684 for (j
= 0; j
< i
; j
++)
685 if (! TEST_HARD_REG_BIT (hard_regs_saved
, regno
+ j
))
690 /* Must do this one restore at a time. */
698 mem
= regno_save_mem
[regno
][numregs
];
699 if (save_mode
[regno
] != VOIDmode
700 && save_mode
[regno
] != GET_MODE (mem
)
701 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
702 mem
= adjust_address (mem
, save_mode
[regno
], 0);
704 mem
= copy_rtx (mem
);
705 pat
= gen_rtx_SET (VOIDmode
,
706 gen_rtx_REG (GET_MODE (mem
),
708 code
= reg_restore_code (regno
, GET_MODE (mem
));
709 new = insert_one_insn (chain
, before_p
, code
, pat
);
711 /* Clear status for all registers we restored. */
712 for (k
= 0; k
< i
; k
++)
714 CLEAR_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
715 SET_REGNO_REG_SET (&new->dead_or_set
, regno
+ k
);
719 /* Tell our callers how many extra registers we saved/restored. */
723 /* Like insert_restore above, but save registers instead. */
726 insert_save (struct insn_chain
*chain
, int before_p
, int regno
,
727 HARD_REG_SET (*to_save
), enum machine_mode
*save_mode
)
733 unsigned int numregs
= 0;
734 struct insn_chain
*new;
737 /* A common failure mode if register status is not correct in the
738 RTL is for this routine to be called with a REGNO we didn't
739 expect to save. That will cause us to write an insn with a (nil)
740 SET_DEST or SET_SRC. Instead of doing so and causing a crash
741 later, check for this common case here. This will remove one
742 step in debugging such problems. */
743 gcc_assert (regno_save_mem
[regno
][1]);
745 /* Get the pattern to emit and update our status.
747 See if we can save several registers with a single instruction.
748 Work backwards to the single register case. */
749 for (i
= MOVE_MAX_WORDS
; i
> 0; i
--)
753 if (regno_save_mem
[regno
][i
] == 0)
756 for (j
= 0; j
< i
; j
++)
757 if (! TEST_HARD_REG_BIT (*to_save
, regno
+ j
))
762 /* Must do this one save at a time. */
770 mem
= regno_save_mem
[regno
][numregs
];
771 if (save_mode
[regno
] != VOIDmode
772 && save_mode
[regno
] != GET_MODE (mem
)
773 && numregs
== (unsigned int) hard_regno_nregs
[regno
][save_mode
[regno
]])
774 mem
= adjust_address (mem
, save_mode
[regno
], 0);
776 mem
= copy_rtx (mem
);
777 pat
= gen_rtx_SET (VOIDmode
, mem
,
778 gen_rtx_REG (GET_MODE (mem
),
780 code
= reg_save_code (regno
, GET_MODE (mem
));
781 new = insert_one_insn (chain
, before_p
, code
, pat
);
783 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
784 for (k
= 0; k
< numregs
; k
++)
786 SET_HARD_REG_BIT (hard_regs_saved
, regno
+ k
);
787 SET_REGNO_REG_SET (&new->dead_or_set
, regno
+ k
);
791 /* Tell our callers how many extra registers we saved/restored. */
795 /* Emit a new caller-save insn and set the code. */
796 static struct insn_chain
*
797 insert_one_insn (struct insn_chain
*chain
, int before_p
, int code
, rtx pat
)
799 rtx insn
= chain
->insn
;
800 struct insn_chain
*new;
803 /* If INSN references CC0, put our insns in front of the insn that sets
804 CC0. This is always safe, since the only way we could be passed an
805 insn that references CC0 is for a restore, and doing a restore earlier
806 isn't a problem. We do, however, assume here that CALL_INSNs don't
807 reference CC0. Guard against non-INSN's like CODE_LABEL. */
809 if ((NONJUMP_INSN_P (insn
) || JUMP_P (insn
))
811 && reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
812 chain
= chain
->prev
, insn
= chain
->insn
;
815 new = new_insn_chain ();
820 new->prev
= chain
->prev
;
822 new->prev
->next
= new;
824 reload_insn_chain
= new;
828 new->insn
= emit_insn_before (pat
, insn
);
829 /* ??? It would be nice if we could exclude the already / still saved
830 registers from the live sets. */
831 COPY_REG_SET (&new->live_throughout
, &chain
->live_throughout
);
832 /* Registers that die in CHAIN->INSN still live in the new insn. */
833 for (link
= REG_NOTES (chain
->insn
); link
; link
= XEXP (link
, 1))
835 if (REG_NOTE_KIND (link
) == REG_DEAD
)
837 rtx reg
= XEXP (link
, 0);
840 gcc_assert (REG_P (reg
));
842 if (regno
>= FIRST_PSEUDO_REGISTER
)
843 regno
= reg_renumber
[regno
];
846 for (i
= hard_regno_nregs
[regno
][GET_MODE (reg
)] - 1;
848 SET_REGNO_REG_SET (&new->live_throughout
, regno
+ i
);
851 CLEAR_REG_SET (&new->dead_or_set
);
852 if (chain
->insn
== BB_HEAD (BASIC_BLOCK (chain
->block
)))
853 BB_HEAD (BASIC_BLOCK (chain
->block
)) = new->insn
;
857 new->next
= chain
->next
;
859 new->next
->prev
= new;
862 new->insn
= emit_insn_after (pat
, insn
);
863 /* ??? It would be nice if we could exclude the already / still saved
864 registers from the live sets, and observe REG_UNUSED notes. */
865 COPY_REG_SET (&new->live_throughout
, &chain
->live_throughout
);
866 /* Registers that are set in CHAIN->INSN live in the new insn.
867 (Unless there is a REG_UNUSED note for them, but we don't
868 look for them here.) */
869 note_stores (PATTERN (chain
->insn
), add_stored_regs
,
870 &new->live_throughout
);
871 CLEAR_REG_SET (&new->dead_or_set
);
872 if (chain
->insn
== BB_END (BASIC_BLOCK (chain
->block
)))
873 BB_END (BASIC_BLOCK (chain
->block
)) = new->insn
;
875 new->block
= chain
->block
;
876 new->is_caller_save_insn
= 1;
878 INSN_CODE (new->insn
) = code
;
881 #include "gt-caller-save.h"