1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
50 #include "coretypes.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
60 #include "conditions.h"
63 #include "hard-reg-set.h"
70 #include "basic-block.h"
74 #include "cfglayout.h"
76 #ifdef XCOFF_DEBUGGING_INFO
77 #include "xcoffout.h" /* Needed for external data
78 declarations for e.g. AIX 4.x. */
81 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
82 #include "dwarf2out.h"
85 #ifdef DBX_DEBUGGING_INFO
89 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
90 null default for it to save conditionalization later. */
91 #ifndef CC_STATUS_INIT
92 #define CC_STATUS_INIT
95 /* How to start an assembler comment. */
96 #ifndef ASM_COMMENT_START
97 #define ASM_COMMENT_START ";#"
100 /* Is the given character a logical line separator for the assembler? */
101 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
102 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
105 #ifndef JUMP_TABLES_IN_TEXT_SECTION
106 #define JUMP_TABLES_IN_TEXT_SECTION 0
109 #if defined(READONLY_DATA_SECTION) || defined(READONLY_DATA_SECTION_ASM_OP)
110 #define HAVE_READONLY_DATA_SECTION 1
112 #define HAVE_READONLY_DATA_SECTION 0
115 /* Bitflags used by final_scan_insn. */
118 #define SEEN_EMITTED 4
120 /* Last insn processed by final_scan_insn. */
121 static rtx debug_insn
;
122 rtx current_output_insn
;
124 /* Line number of last NOTE. */
125 static int last_linenum
;
127 /* Highest line number in current block. */
128 static int high_block_linenum
;
130 /* Likewise for function. */
131 static int high_function_linenum
;
133 /* Filename of last NOTE. */
134 static const char *last_filename
;
136 extern int length_unit_log
; /* This is defined in insn-attrtab.c. */
138 /* Nonzero while outputting an `asm' with operands.
139 This means that inconsistencies are the user's fault, so don't abort.
140 The precise value is the insn being output, to pass to error_for_asm. */
141 rtx this_is_asm_operands
;
143 /* Number of operands of this insn, for an `asm' with operands. */
144 static unsigned int insn_noperands
;
146 /* Compare optimization flag. */
148 static rtx last_ignored_compare
= 0;
150 /* Assign a unique number to each insn that is output.
151 This can be used to generate unique local labels. */
153 static int insn_counter
= 0;
156 /* This variable contains machine-dependent flags (defined in tm.h)
157 set and examined by output routines
158 that describe how to interpret the condition codes properly. */
162 /* During output of an insn, this contains a copy of cc_status
163 from before the insn. */
165 CC_STATUS cc_prev_status
;
168 /* Indexed by hardware reg number, is 1 if that register is ever
169 used in the current function.
171 In life_analysis, or in stupid_life_analysis, this is set
172 up to record the hard regs used explicitly. Reload adds
173 in the hard regs used for holding pseudo regs. Final uses
174 it to generate the code in the function prologue and epilogue
175 to save and restore registers as needed. */
177 char regs_ever_live
[FIRST_PSEUDO_REGISTER
];
179 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
180 Unlike regs_ever_live, elements of this array corresponding to
181 eliminable regs like the frame pointer are set if an asm sets them. */
183 char regs_asm_clobbered
[FIRST_PSEUDO_REGISTER
];
185 /* Nonzero means current function must be given a frame pointer.
186 Initialized in function.c to 0. Set only in reload1.c as per
187 the needs of the function. */
189 int frame_pointer_needed
;
191 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
193 static int block_depth
;
195 /* Nonzero if have enabled APP processing of our assembler output. */
199 /* If we are outputting an insn sequence, this contains the sequence rtx.
204 #ifdef ASSEMBLER_DIALECT
206 /* Number of the assembler dialect to use, starting at 0. */
207 static int dialect_number
;
210 #ifdef HAVE_conditional_execution
211 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
212 rtx current_insn_predicate
;
215 #ifdef HAVE_ATTR_length
216 static int asm_insn_count (rtx
);
218 static void profile_function (FILE *);
219 static void profile_after_prologue (FILE *);
220 static bool notice_source_line (rtx
);
221 static rtx
walk_alter_subreg (rtx
*);
222 static void output_asm_name (void);
223 static void output_alternate_entry_point (FILE *, rtx
);
224 static tree
get_mem_expr_from_op (rtx
, int *);
225 static void output_asm_operand_names (rtx
*, int *, int);
226 static void output_operand (rtx
, int);
227 #ifdef LEAF_REGISTERS
228 static void leaf_renumber_regs (rtx
);
231 static int alter_cond (rtx
);
233 #ifndef ADDR_VEC_ALIGN
234 static int final_addr_vec_align (rtx
);
236 #ifdef HAVE_ATTR_length
237 static int align_fuzz (rtx
, rtx
, int, unsigned);
240 /* Initialize data in final at the beginning of a compilation. */
243 init_final (const char *filename ATTRIBUTE_UNUSED
)
248 #ifdef ASSEMBLER_DIALECT
249 dialect_number
= ASSEMBLER_DIALECT
;
253 /* Default target function prologue and epilogue assembler output.
255 If not overridden for epilogue code, then the function body itself
256 contains return instructions wherever needed. */
258 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED
,
259 HOST_WIDE_INT size ATTRIBUTE_UNUSED
)
263 /* Default target hook that outputs nothing to a stream. */
265 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED
)
269 /* Enable APP processing of subsequent output.
270 Used before the output from an `asm' statement. */
277 fputs (ASM_APP_ON
, asm_out_file
);
282 /* Disable APP processing of subsequent output.
283 Called from varasm.c before most kinds of output. */
290 fputs (ASM_APP_OFF
, asm_out_file
);
295 /* Return the number of slots filled in the current
296 delayed branch sequence (we don't count the insn needing the
297 delay slot). Zero if not in a delayed branch sequence. */
301 dbr_sequence_length (void)
303 if (final_sequence
!= 0)
304 return XVECLEN (final_sequence
, 0) - 1;
310 /* The next two pages contain routines used to compute the length of an insn
311 and to shorten branches. */
313 /* Arrays for insn lengths, and addresses. The latter is referenced by
314 `insn_current_length'. */
316 static int *insn_lengths
;
318 varray_type insn_addresses_
;
320 /* Max uid for which the above arrays are valid. */
321 static int insn_lengths_max_uid
;
323 /* Address of insn being processed. Used by `insn_current_length'. */
324 int insn_current_address
;
326 /* Address of insn being processed in previous iteration. */
327 int insn_last_address
;
329 /* known invariant alignment of insn being processed. */
330 int insn_current_align
;
332 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
333 gives the next following alignment insn that increases the known
334 alignment, or NULL_RTX if there is no such insn.
335 For any alignment obtained this way, we can again index uid_align with
336 its uid to obtain the next following align that in turn increases the
337 alignment, till we reach NULL_RTX; the sequence obtained this way
338 for each insn we'll call the alignment chain of this insn in the following
341 struct label_alignment
347 static rtx
*uid_align
;
348 static int *uid_shuid
;
349 static struct label_alignment
*label_align
;
351 /* Indicate that branch shortening hasn't yet been done. */
354 init_insn_lengths (void)
365 insn_lengths_max_uid
= 0;
367 #ifdef HAVE_ATTR_length
368 INSN_ADDRESSES_FREE ();
377 /* Obtain the current length of an insn. If branch shortening has been done,
378 get its actual length. Otherwise, get its maximum length. */
381 get_attr_length (rtx insn ATTRIBUTE_UNUSED
)
383 #ifdef HAVE_ATTR_length
388 if (insn_lengths_max_uid
> INSN_UID (insn
))
389 return insn_lengths
[INSN_UID (insn
)];
391 switch (GET_CODE (insn
))
399 length
= insn_default_length (insn
);
403 body
= PATTERN (insn
);
404 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
406 /* Alignment is machine-dependent and should be handled by
410 length
= insn_default_length (insn
);
414 body
= PATTERN (insn
);
415 if (GET_CODE (body
) == USE
|| GET_CODE (body
) == CLOBBER
)
418 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
419 length
= asm_insn_count (body
) * insn_default_length (insn
);
420 else if (GET_CODE (body
) == SEQUENCE
)
421 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
422 length
+= get_attr_length (XVECEXP (body
, 0, i
));
424 length
= insn_default_length (insn
);
431 #ifdef ADJUST_INSN_LENGTH
432 ADJUST_INSN_LENGTH (insn
, length
);
435 #else /* not HAVE_ATTR_length */
437 #endif /* not HAVE_ATTR_length */
440 /* Code to handle alignment inside shorten_branches. */
442 /* Here is an explanation how the algorithm in align_fuzz can give
445 Call a sequence of instructions beginning with alignment point X
446 and continuing until the next alignment point `block X'. When `X'
447 is used in an expression, it means the alignment value of the
450 Call the distance between the start of the first insn of block X, and
451 the end of the last insn of block X `IX', for the `inner size of X'.
452 This is clearly the sum of the instruction lengths.
454 Likewise with the next alignment-delimited block following X, which we
457 Call the distance between the start of the first insn of block X, and
458 the start of the first insn of block Y `OX', for the `outer size of X'.
460 The estimated padding is then OX - IX.
462 OX can be safely estimated as
467 OX = round_up(IX, X) + Y - X
469 Clearly est(IX) >= real(IX), because that only depends on the
470 instruction lengths, and those being overestimated is a given.
472 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
473 we needn't worry about that when thinking about OX.
475 When X >= Y, the alignment provided by Y adds no uncertainty factor
476 for branch ranges starting before X, so we can just round what we have.
477 But when X < Y, we don't know anything about the, so to speak,
478 `middle bits', so we have to assume the worst when aligning up from an
479 address mod X to one mod Y, which is Y - X. */
482 #define LABEL_ALIGN(LABEL) align_labels_log
485 #ifndef LABEL_ALIGN_MAX_SKIP
486 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
490 #define LOOP_ALIGN(LABEL) align_loops_log
493 #ifndef LOOP_ALIGN_MAX_SKIP
494 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
497 #ifndef LABEL_ALIGN_AFTER_BARRIER
498 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
501 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
502 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
506 #define JUMP_ALIGN(LABEL) align_jumps_log
509 #ifndef JUMP_ALIGN_MAX_SKIP
510 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
513 #ifndef ADDR_VEC_ALIGN
515 final_addr_vec_align (rtx addr_vec
)
517 int align
= GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec
)));
519 if (align
> BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
)
520 align
= BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
;
521 return exact_log2 (align
);
525 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
528 #ifndef INSN_LENGTH_ALIGNMENT
529 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
532 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
534 static int min_labelno
, max_labelno
;
536 #define LABEL_TO_ALIGNMENT(LABEL) \
537 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
539 #define LABEL_TO_MAX_SKIP(LABEL) \
540 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
542 /* For the benefit of port specific code do this also as a function. */
545 label_to_alignment (rtx label
)
547 return LABEL_TO_ALIGNMENT (label
);
550 #ifdef HAVE_ATTR_length
551 /* The differences in addresses
552 between a branch and its target might grow or shrink depending on
553 the alignment the start insn of the range (the branch for a forward
554 branch or the label for a backward branch) starts out on; if these
555 differences are used naively, they can even oscillate infinitely.
556 We therefore want to compute a 'worst case' address difference that
557 is independent of the alignment the start insn of the range end
558 up on, and that is at least as large as the actual difference.
559 The function align_fuzz calculates the amount we have to add to the
560 naively computed difference, by traversing the part of the alignment
561 chain of the start insn of the range that is in front of the end insn
562 of the range, and considering for each alignment the maximum amount
563 that it might contribute to a size increase.
565 For casesi tables, we also want to know worst case minimum amounts of
566 address difference, in case a machine description wants to introduce
567 some common offset that is added to all offsets in a table.
568 For this purpose, align_fuzz with a growth argument of 0 computes the
569 appropriate adjustment. */
571 /* Compute the maximum delta by which the difference of the addresses of
572 START and END might grow / shrink due to a different address for start
573 which changes the size of alignment insns between START and END.
574 KNOWN_ALIGN_LOG is the alignment known for START.
575 GROWTH should be ~0 if the objective is to compute potential code size
576 increase, and 0 if the objective is to compute potential shrink.
577 The return value is undefined for any other value of GROWTH. */
580 align_fuzz (rtx start
, rtx end
, int known_align_log
, unsigned int growth
)
582 int uid
= INSN_UID (start
);
584 int known_align
= 1 << known_align_log
;
585 int end_shuid
= INSN_SHUID (end
);
588 for (align_label
= uid_align
[uid
]; align_label
; align_label
= uid_align
[uid
])
590 int align_addr
, new_align
;
592 uid
= INSN_UID (align_label
);
593 align_addr
= INSN_ADDRESSES (uid
) - insn_lengths
[uid
];
594 if (uid_shuid
[uid
] > end_shuid
)
596 known_align_log
= LABEL_TO_ALIGNMENT (align_label
);
597 new_align
= 1 << known_align_log
;
598 if (new_align
< known_align
)
600 fuzz
+= (-align_addr
^ growth
) & (new_align
- known_align
);
601 known_align
= new_align
;
606 /* Compute a worst-case reference address of a branch so that it
607 can be safely used in the presence of aligned labels. Since the
608 size of the branch itself is unknown, the size of the branch is
609 not included in the range. I.e. for a forward branch, the reference
610 address is the end address of the branch as known from the previous
611 branch shortening pass, minus a value to account for possible size
612 increase due to alignment. For a backward branch, it is the start
613 address of the branch as known from the current pass, plus a value
614 to account for possible size increase due to alignment.
615 NB.: Therefore, the maximum offset allowed for backward branches needs
616 to exclude the branch size. */
619 insn_current_reference_address (rtx branch
)
624 if (! INSN_ADDRESSES_SET_P ())
627 seq
= NEXT_INSN (PREV_INSN (branch
));
628 seq_uid
= INSN_UID (seq
);
629 if (!JUMP_P (branch
))
630 /* This can happen for example on the PA; the objective is to know the
631 offset to address something in front of the start of the function.
632 Thus, we can treat it like a backward branch.
633 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
634 any alignment we'd encounter, so we skip the call to align_fuzz. */
635 return insn_current_address
;
636 dest
= JUMP_LABEL (branch
);
638 /* BRANCH has no proper alignment chain set, so use SEQ.
639 BRANCH also has no INSN_SHUID. */
640 if (INSN_SHUID (seq
) < INSN_SHUID (dest
))
642 /* Forward branch. */
643 return (insn_last_address
+ insn_lengths
[seq_uid
]
644 - align_fuzz (seq
, dest
, length_unit_log
, ~0));
648 /* Backward branch. */
649 return (insn_current_address
650 + align_fuzz (dest
, seq
, length_unit_log
, ~0));
653 #endif /* HAVE_ATTR_length */
656 compute_alignments (void)
658 int log
, max_skip
, max_log
;
667 max_labelno
= max_label_num ();
668 min_labelno
= get_first_label_num ();
669 label_align
= xcalloc (max_labelno
- min_labelno
+ 1,
670 sizeof (struct label_alignment
));
672 /* If not optimizing or optimizing for size, don't assign any alignments. */
673 if (! optimize
|| optimize_size
)
678 rtx label
= BB_HEAD (bb
);
679 int fallthru_frequency
= 0, branch_frequency
= 0, has_fallthru
= 0;
684 || probably_never_executed_bb_p (bb
))
686 max_log
= LABEL_ALIGN (label
);
687 max_skip
= LABEL_ALIGN_MAX_SKIP
;
689 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
691 if (e
->flags
& EDGE_FALLTHRU
)
692 has_fallthru
= 1, fallthru_frequency
+= EDGE_FREQUENCY (e
);
694 branch_frequency
+= EDGE_FREQUENCY (e
);
697 /* There are two purposes to align block with no fallthru incoming edge:
698 1) to avoid fetch stalls when branch destination is near cache boundary
699 2) to improve cache efficiency in case the previous block is not executed
700 (so it does not need to be in the cache).
702 We to catch first case, we align frequently executed blocks.
703 To catch the second, we align blocks that are executed more frequently
704 than the predecessor and the predecessor is likely to not be executed
705 when function is called. */
708 && (branch_frequency
> BB_FREQ_MAX
/ 10
709 || (bb
->frequency
> bb
->prev_bb
->frequency
* 10
710 && (bb
->prev_bb
->frequency
711 <= ENTRY_BLOCK_PTR
->frequency
/ 2))))
713 log
= JUMP_ALIGN (label
);
717 max_skip
= JUMP_ALIGN_MAX_SKIP
;
720 /* In case block is frequent and reached mostly by non-fallthru edge,
721 align it. It is most likely a first block of loop. */
723 && maybe_hot_bb_p (bb
)
724 && branch_frequency
+ fallthru_frequency
> BB_FREQ_MAX
/ 10
725 && branch_frequency
> fallthru_frequency
* 2)
727 log
= LOOP_ALIGN (label
);
731 max_skip
= LOOP_ALIGN_MAX_SKIP
;
734 LABEL_TO_ALIGNMENT (label
) = max_log
;
735 LABEL_TO_MAX_SKIP (label
) = max_skip
;
739 /* Make a pass over all insns and compute their actual lengths by shortening
740 any branches of variable length if possible. */
742 /* shorten_branches might be called multiple times: for example, the SH
743 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
744 In order to do this, it needs proper length information, which it obtains
745 by calling shorten_branches. This cannot be collapsed with
746 shorten_branches itself into a single pass unless we also want to integrate
747 reorg.c, since the branch splitting exposes new instructions with delay
751 shorten_branches (rtx first ATTRIBUTE_UNUSED
)
758 #ifdef HAVE_ATTR_length
759 #define MAX_CODE_ALIGN 16
761 int something_changed
= 1;
762 char *varying_length
;
765 rtx align_tab
[MAX_CODE_ALIGN
];
769 /* Compute maximum UID and allocate label_align / uid_shuid. */
770 max_uid
= get_max_uid ();
772 /* Free uid_shuid before reallocating it. */
775 uid_shuid
= xmalloc (max_uid
* sizeof *uid_shuid
);
777 if (max_labelno
!= max_label_num ())
779 int old
= max_labelno
;
783 max_labelno
= max_label_num ();
785 n_labels
= max_labelno
- min_labelno
+ 1;
786 n_old_labels
= old
- min_labelno
+ 1;
788 label_align
= xrealloc (label_align
,
789 n_labels
* sizeof (struct label_alignment
));
791 /* Range of labels grows monotonically in the function. Abort here
792 means that the initialization of array got lost. */
793 gcc_assert (n_old_labels
<= n_labels
);
795 memset (label_align
+ n_old_labels
, 0,
796 (n_labels
- n_old_labels
) * sizeof (struct label_alignment
));
799 /* Initialize label_align and set up uid_shuid to be strictly
800 monotonically rising with insn order. */
801 /* We use max_log here to keep track of the maximum alignment we want to
802 impose on the next CODE_LABEL (or the current one if we are processing
803 the CODE_LABEL itself). */
808 for (insn
= get_insns (), i
= 1; insn
; insn
= NEXT_INSN (insn
))
812 INSN_SHUID (insn
) = i
++;
815 /* reorg might make the first insn of a loop being run once only,
816 and delete the label in front of it. Then we want to apply
817 the loop alignment to the new label created by reorg, which
818 is separated by the former loop start insn from the
819 NOTE_INSN_LOOP_BEG. */
821 else if (LABEL_P (insn
))
825 /* Merge in alignments computed by compute_alignments. */
826 log
= LABEL_TO_ALIGNMENT (insn
);
830 max_skip
= LABEL_TO_MAX_SKIP (insn
);
833 log
= LABEL_ALIGN (insn
);
837 max_skip
= LABEL_ALIGN_MAX_SKIP
;
839 next
= next_nonnote_insn (insn
);
840 /* ADDR_VECs only take room if read-only data goes into the text
842 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
843 if (next
&& JUMP_P (next
))
845 rtx nextbody
= PATTERN (next
);
846 if (GET_CODE (nextbody
) == ADDR_VEC
847 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
849 log
= ADDR_VEC_ALIGN (next
);
853 max_skip
= LABEL_ALIGN_MAX_SKIP
;
857 LABEL_TO_ALIGNMENT (insn
) = max_log
;
858 LABEL_TO_MAX_SKIP (insn
) = max_skip
;
862 else if (BARRIER_P (insn
))
866 for (label
= insn
; label
&& ! INSN_P (label
);
867 label
= NEXT_INSN (label
))
870 log
= LABEL_ALIGN_AFTER_BARRIER (insn
);
874 max_skip
= LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
;
880 #ifdef HAVE_ATTR_length
882 /* Allocate the rest of the arrays. */
883 insn_lengths
= xmalloc (max_uid
* sizeof (*insn_lengths
));
884 insn_lengths_max_uid
= max_uid
;
885 /* Syntax errors can lead to labels being outside of the main insn stream.
886 Initialize insn_addresses, so that we get reproducible results. */
887 INSN_ADDRESSES_ALLOC (max_uid
);
889 varying_length
= xcalloc (max_uid
, sizeof (char));
891 /* Initialize uid_align. We scan instructions
892 from end to start, and keep in align_tab[n] the last seen insn
893 that does an alignment of at least n+1, i.e. the successor
894 in the alignment chain for an insn that does / has a known
896 uid_align
= xcalloc (max_uid
, sizeof *uid_align
);
898 for (i
= MAX_CODE_ALIGN
; --i
>= 0;)
899 align_tab
[i
] = NULL_RTX
;
900 seq
= get_last_insn ();
901 for (; seq
; seq
= PREV_INSN (seq
))
903 int uid
= INSN_UID (seq
);
905 log
= (LABEL_P (seq
) ? LABEL_TO_ALIGNMENT (seq
) : 0);
906 uid_align
[uid
] = align_tab
[0];
909 /* Found an alignment label. */
910 uid_align
[uid
] = align_tab
[log
];
911 for (i
= log
- 1; i
>= 0; i
--)
915 #ifdef CASE_VECTOR_SHORTEN_MODE
918 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
921 int min_shuid
= INSN_SHUID (get_insns ()) - 1;
922 int max_shuid
= INSN_SHUID (get_last_insn ()) + 1;
925 for (insn
= first
; insn
!= 0; insn
= NEXT_INSN (insn
))
927 rtx min_lab
= NULL_RTX
, max_lab
= NULL_RTX
, pat
;
928 int len
, i
, min
, max
, insn_shuid
;
930 addr_diff_vec_flags flags
;
933 || GET_CODE (PATTERN (insn
)) != ADDR_DIFF_VEC
)
935 pat
= PATTERN (insn
);
936 len
= XVECLEN (pat
, 1);
937 gcc_assert (len
> 0);
938 min_align
= MAX_CODE_ALIGN
;
939 for (min
= max_shuid
, max
= min_shuid
, i
= len
- 1; i
>= 0; i
--)
941 rtx lab
= XEXP (XVECEXP (pat
, 1, i
), 0);
942 int shuid
= INSN_SHUID (lab
);
953 if (min_align
> LABEL_TO_ALIGNMENT (lab
))
954 min_align
= LABEL_TO_ALIGNMENT (lab
);
956 XEXP (pat
, 2) = gen_rtx_LABEL_REF (VOIDmode
, min_lab
);
957 XEXP (pat
, 3) = gen_rtx_LABEL_REF (VOIDmode
, max_lab
);
958 insn_shuid
= INSN_SHUID (insn
);
959 rel
= INSN_SHUID (XEXP (XEXP (pat
, 0), 0));
960 memset (&flags
, 0, sizeof (flags
));
961 flags
.min_align
= min_align
;
962 flags
.base_after_vec
= rel
> insn_shuid
;
963 flags
.min_after_vec
= min
> insn_shuid
;
964 flags
.max_after_vec
= max
> insn_shuid
;
965 flags
.min_after_base
= min
> rel
;
966 flags
.max_after_base
= max
> rel
;
967 ADDR_DIFF_VEC_FLAGS (pat
) = flags
;
970 #endif /* CASE_VECTOR_SHORTEN_MODE */
972 /* Compute initial lengths, addresses, and varying flags for each insn. */
973 for (insn_current_address
= 0, insn
= first
;
975 insn_current_address
+= insn_lengths
[uid
], insn
= NEXT_INSN (insn
))
977 uid
= INSN_UID (insn
);
979 insn_lengths
[uid
] = 0;
983 int log
= LABEL_TO_ALIGNMENT (insn
);
986 int align
= 1 << log
;
987 int new_address
= (insn_current_address
+ align
- 1) & -align
;
988 insn_lengths
[uid
] = new_address
- insn_current_address
;
992 INSN_ADDRESSES (uid
) = insn_current_address
+ insn_lengths
[uid
];
994 if (NOTE_P (insn
) || BARRIER_P (insn
)
997 if (INSN_DELETED_P (insn
))
1000 body
= PATTERN (insn
);
1001 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
1003 /* This only takes room if read-only data goes into the text
1005 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1006 insn_lengths
[uid
] = (XVECLEN (body
,
1007 GET_CODE (body
) == ADDR_DIFF_VEC
)
1008 * GET_MODE_SIZE (GET_MODE (body
)));
1009 /* Alignment is handled by ADDR_VEC_ALIGN. */
1011 else if (GET_CODE (body
) == ASM_INPUT
|| asm_noperands (body
) >= 0)
1012 insn_lengths
[uid
] = asm_insn_count (body
) * insn_default_length (insn
);
1013 else if (GET_CODE (body
) == SEQUENCE
)
1016 int const_delay_slots
;
1018 const_delay_slots
= const_num_delay_slots (XVECEXP (body
, 0, 0));
1020 const_delay_slots
= 0;
1022 /* Inside a delay slot sequence, we do not do any branch shortening
1023 if the shortening could change the number of delay slots
1025 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1027 rtx inner_insn
= XVECEXP (body
, 0, i
);
1028 int inner_uid
= INSN_UID (inner_insn
);
1031 if (GET_CODE (body
) == ASM_INPUT
1032 || asm_noperands (PATTERN (XVECEXP (body
, 0, i
))) >= 0)
1033 inner_length
= (asm_insn_count (PATTERN (inner_insn
))
1034 * insn_default_length (inner_insn
));
1036 inner_length
= insn_default_length (inner_insn
);
1038 insn_lengths
[inner_uid
] = inner_length
;
1039 if (const_delay_slots
)
1041 if ((varying_length
[inner_uid
]
1042 = insn_variable_length_p (inner_insn
)) != 0)
1043 varying_length
[uid
] = 1;
1044 INSN_ADDRESSES (inner_uid
) = (insn_current_address
1045 + insn_lengths
[uid
]);
1048 varying_length
[inner_uid
] = 0;
1049 insn_lengths
[uid
] += inner_length
;
1052 else if (GET_CODE (body
) != USE
&& GET_CODE (body
) != CLOBBER
)
1054 insn_lengths
[uid
] = insn_default_length (insn
);
1055 varying_length
[uid
] = insn_variable_length_p (insn
);
1058 /* If needed, do any adjustment. */
1059 #ifdef ADJUST_INSN_LENGTH
1060 ADJUST_INSN_LENGTH (insn
, insn_lengths
[uid
]);
1061 if (insn_lengths
[uid
] < 0)
1062 fatal_insn ("negative insn length", insn
);
1066 /* Now loop over all the insns finding varying length insns. For each,
1067 get the current insn length. If it has changed, reflect the change.
1068 When nothing changes for a full pass, we are done. */
1070 while (something_changed
)
1072 something_changed
= 0;
1073 insn_current_align
= MAX_CODE_ALIGN
- 1;
1074 for (insn_current_address
= 0, insn
= first
;
1076 insn
= NEXT_INSN (insn
))
1079 #ifdef ADJUST_INSN_LENGTH
1084 uid
= INSN_UID (insn
);
1088 int log
= LABEL_TO_ALIGNMENT (insn
);
1089 if (log
> insn_current_align
)
1091 int align
= 1 << log
;
1092 int new_address
= (insn_current_address
+ align
- 1) & -align
;
1093 insn_lengths
[uid
] = new_address
- insn_current_address
;
1094 insn_current_align
= log
;
1095 insn_current_address
= new_address
;
1098 insn_lengths
[uid
] = 0;
1099 INSN_ADDRESSES (uid
) = insn_current_address
;
1103 length_align
= INSN_LENGTH_ALIGNMENT (insn
);
1104 if (length_align
< insn_current_align
)
1105 insn_current_align
= length_align
;
1107 insn_last_address
= INSN_ADDRESSES (uid
);
1108 INSN_ADDRESSES (uid
) = insn_current_address
;
1110 #ifdef CASE_VECTOR_SHORTEN_MODE
1111 if (optimize
&& JUMP_P (insn
)
1112 && GET_CODE (PATTERN (insn
)) == ADDR_DIFF_VEC
)
1114 rtx body
= PATTERN (insn
);
1115 int old_length
= insn_lengths
[uid
];
1116 rtx rel_lab
= XEXP (XEXP (body
, 0), 0);
1117 rtx min_lab
= XEXP (XEXP (body
, 2), 0);
1118 rtx max_lab
= XEXP (XEXP (body
, 3), 0);
1119 int rel_addr
= INSN_ADDRESSES (INSN_UID (rel_lab
));
1120 int min_addr
= INSN_ADDRESSES (INSN_UID (min_lab
));
1121 int max_addr
= INSN_ADDRESSES (INSN_UID (max_lab
));
1124 addr_diff_vec_flags flags
;
1126 /* Avoid automatic aggregate initialization. */
1127 flags
= ADDR_DIFF_VEC_FLAGS (body
);
1129 /* Try to find a known alignment for rel_lab. */
1130 for (prev
= rel_lab
;
1132 && ! insn_lengths
[INSN_UID (prev
)]
1133 && ! (varying_length
[INSN_UID (prev
)] & 1);
1134 prev
= PREV_INSN (prev
))
1135 if (varying_length
[INSN_UID (prev
)] & 2)
1137 rel_align
= LABEL_TO_ALIGNMENT (prev
);
1141 /* See the comment on addr_diff_vec_flags in rtl.h for the
1142 meaning of the flags values. base: REL_LAB vec: INSN */
1143 /* Anything after INSN has still addresses from the last
1144 pass; adjust these so that they reflect our current
1145 estimate for this pass. */
1146 if (flags
.base_after_vec
)
1147 rel_addr
+= insn_current_address
- insn_last_address
;
1148 if (flags
.min_after_vec
)
1149 min_addr
+= insn_current_address
- insn_last_address
;
1150 if (flags
.max_after_vec
)
1151 max_addr
+= insn_current_address
- insn_last_address
;
1152 /* We want to know the worst case, i.e. lowest possible value
1153 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1154 its offset is positive, and we have to be wary of code shrink;
1155 otherwise, it is negative, and we have to be vary of code
1157 if (flags
.min_after_base
)
1159 /* If INSN is between REL_LAB and MIN_LAB, the size
1160 changes we are about to make can change the alignment
1161 within the observed offset, therefore we have to break
1162 it up into two parts that are independent. */
1163 if (! flags
.base_after_vec
&& flags
.min_after_vec
)
1165 min_addr
-= align_fuzz (rel_lab
, insn
, rel_align
, 0);
1166 min_addr
-= align_fuzz (insn
, min_lab
, 0, 0);
1169 min_addr
-= align_fuzz (rel_lab
, min_lab
, rel_align
, 0);
1173 if (flags
.base_after_vec
&& ! flags
.min_after_vec
)
1175 min_addr
-= align_fuzz (min_lab
, insn
, 0, ~0);
1176 min_addr
-= align_fuzz (insn
, rel_lab
, 0, ~0);
1179 min_addr
-= align_fuzz (min_lab
, rel_lab
, 0, ~0);
1181 /* Likewise, determine the highest lowest possible value
1182 for the offset of MAX_LAB. */
1183 if (flags
.max_after_base
)
1185 if (! flags
.base_after_vec
&& flags
.max_after_vec
)
1187 max_addr
+= align_fuzz (rel_lab
, insn
, rel_align
, ~0);
1188 max_addr
+= align_fuzz (insn
, max_lab
, 0, ~0);
1191 max_addr
+= align_fuzz (rel_lab
, max_lab
, rel_align
, ~0);
1195 if (flags
.base_after_vec
&& ! flags
.max_after_vec
)
1197 max_addr
+= align_fuzz (max_lab
, insn
, 0, 0);
1198 max_addr
+= align_fuzz (insn
, rel_lab
, 0, 0);
1201 max_addr
+= align_fuzz (max_lab
, rel_lab
, 0, 0);
1203 PUT_MODE (body
, CASE_VECTOR_SHORTEN_MODE (min_addr
- rel_addr
,
1204 max_addr
- rel_addr
,
1206 if (JUMP_TABLES_IN_TEXT_SECTION
|| !HAVE_READONLY_DATA_SECTION
)
1209 = (XVECLEN (body
, 1) * GET_MODE_SIZE (GET_MODE (body
)));
1210 insn_current_address
+= insn_lengths
[uid
];
1211 if (insn_lengths
[uid
] != old_length
)
1212 something_changed
= 1;
1217 #endif /* CASE_VECTOR_SHORTEN_MODE */
1219 if (! (varying_length
[uid
]))
1221 if (NONJUMP_INSN_P (insn
)
1222 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1226 body
= PATTERN (insn
);
1227 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1229 rtx inner_insn
= XVECEXP (body
, 0, i
);
1230 int inner_uid
= INSN_UID (inner_insn
);
1232 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1234 insn_current_address
+= insn_lengths
[inner_uid
];
1238 insn_current_address
+= insn_lengths
[uid
];
1243 if (NONJUMP_INSN_P (insn
) && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
1247 body
= PATTERN (insn
);
1249 for (i
= 0; i
< XVECLEN (body
, 0); i
++)
1251 rtx inner_insn
= XVECEXP (body
, 0, i
);
1252 int inner_uid
= INSN_UID (inner_insn
);
1255 INSN_ADDRESSES (inner_uid
) = insn_current_address
;
1257 /* insn_current_length returns 0 for insns with a
1258 non-varying length. */
1259 if (! varying_length
[inner_uid
])
1260 inner_length
= insn_lengths
[inner_uid
];
1262 inner_length
= insn_current_length (inner_insn
);
1264 if (inner_length
!= insn_lengths
[inner_uid
])
1266 insn_lengths
[inner_uid
] = inner_length
;
1267 something_changed
= 1;
1269 insn_current_address
+= insn_lengths
[inner_uid
];
1270 new_length
+= inner_length
;
1275 new_length
= insn_current_length (insn
);
1276 insn_current_address
+= new_length
;
1279 #ifdef ADJUST_INSN_LENGTH
1280 /* If needed, do any adjustment. */
1281 tmp_length
= new_length
;
1282 ADJUST_INSN_LENGTH (insn
, new_length
);
1283 insn_current_address
+= (new_length
- tmp_length
);
1286 if (new_length
!= insn_lengths
[uid
])
1288 insn_lengths
[uid
] = new_length
;
1289 something_changed
= 1;
1292 /* For a non-optimizing compile, do only a single pass. */
1297 free (varying_length
);
1299 #endif /* HAVE_ATTR_length */
1302 #ifdef HAVE_ATTR_length
1303 /* Given the body of an INSN known to be generated by an ASM statement, return
1304 the number of machine instructions likely to be generated for this insn.
1305 This is used to compute its length. */
1308 asm_insn_count (rtx body
)
1310 const char *template;
1313 if (GET_CODE (body
) == ASM_INPUT
)
1314 template = XSTR (body
, 0);
1316 template = decode_asm_operands (body
, NULL
, NULL
, NULL
, NULL
);
1318 for (; *template; template++)
1319 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1326 /* Output assembler code for the start of a function,
1327 and initialize some of the variables in this file
1328 for the new function. The label for the function and associated
1329 assembler pseudo-ops have already been output in `assemble_start_function'.
1331 FIRST is the first insn of the rtl for the function being compiled.
1332 FILE is the file to write assembler code to.
1333 OPTIMIZE is nonzero if we should eliminate redundant
1334 test and compare insns. */
1337 final_start_function (rtx first ATTRIBUTE_UNUSED
, FILE *file
,
1338 int optimize ATTRIBUTE_UNUSED
)
1342 this_is_asm_operands
= 0;
1344 last_filename
= locator_file (prologue_locator
);
1345 last_linenum
= locator_line (prologue_locator
);
1347 high_block_linenum
= high_function_linenum
= last_linenum
;
1349 (*debug_hooks
->begin_prologue
) (last_linenum
, last_filename
);
1351 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1352 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
)
1353 dwarf2out_begin_prologue (0, NULL
);
1356 #ifdef LEAF_REG_REMAP
1357 if (current_function_uses_only_leaf_regs
)
1358 leaf_renumber_regs (first
);
1361 /* The Sun386i and perhaps other machines don't work right
1362 if the profiling code comes after the prologue. */
1363 #ifdef PROFILE_BEFORE_PROLOGUE
1364 if (current_function_profile
)
1365 profile_function (file
);
1366 #endif /* PROFILE_BEFORE_PROLOGUE */
1368 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1369 if (dwarf2out_do_frame ())
1370 dwarf2out_frame_debug (NULL_RTX
, false);
1373 /* If debugging, assign block numbers to all of the blocks in this
1377 remove_unnecessary_notes ();
1378 reemit_insn_block_notes ();
1379 number_blocks (current_function_decl
);
1380 /* We never actually put out begin/end notes for the top-level
1381 block in the function. But, conceptually, that block is
1383 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl
)) = 1;
1386 /* First output the function prologue: code to set up the stack frame. */
1387 targetm
.asm_out
.function_prologue (file
, get_frame_size ());
1389 /* If the machine represents the prologue as RTL, the profiling code must
1390 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1391 #ifdef HAVE_prologue
1392 if (! HAVE_prologue
)
1394 profile_after_prologue (file
);
1398 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED
)
1400 #ifndef PROFILE_BEFORE_PROLOGUE
1401 if (current_function_profile
)
1402 profile_function (file
);
1403 #endif /* not PROFILE_BEFORE_PROLOGUE */
1407 profile_function (FILE *file ATTRIBUTE_UNUSED
)
1409 #ifndef NO_PROFILE_COUNTERS
1410 # define NO_PROFILE_COUNTERS 0
1412 #if defined(ASM_OUTPUT_REG_PUSH)
1413 int sval
= current_function_returns_struct
;
1414 rtx svrtx
= targetm
.calls
.struct_value_rtx (TREE_TYPE (current_function_decl
), 1);
1415 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1416 int cxt
= cfun
->static_chain_decl
!= NULL
;
1418 #endif /* ASM_OUTPUT_REG_PUSH */
1420 if (! NO_PROFILE_COUNTERS
)
1422 int align
= MIN (BIGGEST_ALIGNMENT
, LONG_TYPE_SIZE
);
1424 ASM_OUTPUT_ALIGN (file
, floor_log2 (align
/ BITS_PER_UNIT
));
1425 targetm
.asm_out
.internal_label (file
, "LP", current_function_funcdef_no
);
1426 assemble_integer (const0_rtx
, LONG_TYPE_SIZE
/ BITS_PER_UNIT
, align
, 1);
1429 function_section (current_function_decl
);
1431 #if defined(ASM_OUTPUT_REG_PUSH)
1432 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1433 ASM_OUTPUT_REG_PUSH (file
, REGNO (svrtx
));
1436 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1438 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1440 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1443 ASM_OUTPUT_REG_PUSH (file
, STATIC_CHAIN_REGNUM
);
1448 FUNCTION_PROFILER (file
, current_function_funcdef_no
);
1450 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1452 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_INCOMING_REGNUM
);
1454 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1457 ASM_OUTPUT_REG_POP (file
, STATIC_CHAIN_REGNUM
);
1462 #if defined(ASM_OUTPUT_REG_PUSH)
1463 if (sval
&& svrtx
!= NULL_RTX
&& REG_P (svrtx
))
1464 ASM_OUTPUT_REG_POP (file
, REGNO (svrtx
));
1468 /* Output assembler code for the end of a function.
1469 For clarity, args are same as those of `final_start_function'
1470 even though not all of them are needed. */
1473 final_end_function (void)
1477 (*debug_hooks
->end_function
) (high_function_linenum
);
1479 /* Finally, output the function epilogue:
1480 code to restore the stack frame and return to the caller. */
1481 targetm
.asm_out
.function_epilogue (asm_out_file
, get_frame_size ());
1483 /* And debug output. */
1484 (*debug_hooks
->end_epilogue
) (last_linenum
, last_filename
);
1486 #if defined (DWARF2_UNWIND_INFO)
1487 if (write_symbols
!= DWARF2_DEBUG
&& write_symbols
!= VMS_AND_DWARF2_DEBUG
1488 && dwarf2out_do_frame ())
1489 dwarf2out_end_epilogue (last_linenum
, last_filename
);
1493 /* Output assembler code for some insns: all or part of a function.
1494 For description of args, see `final_start_function', above.
1496 PRESCAN is 1 if we are not really outputting,
1497 just scanning as if we were outputting.
1498 Prescanning deletes and rearranges insns just like ordinary output.
1499 PRESCAN is -2 if we are outputting after having prescanned.
1500 In this case, don't try to delete or rearrange insns
1501 because that has already been done.
1502 Prescanning is done only on certain machines. */
1505 final (rtx first
, FILE *file
, int optimize
, int prescan
)
1511 last_ignored_compare
= 0;
1513 #ifdef SDB_DEBUGGING_INFO
1514 /* When producing SDB debugging info, delete troublesome line number
1515 notes from inlined functions in other files as well as duplicate
1516 line number notes. */
1517 if (write_symbols
== SDB_DEBUG
)
1520 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1521 if (NOTE_P (insn
) && NOTE_LINE_NUMBER (insn
) > 0)
1524 #ifdef USE_MAPPED_LOCATION
1525 && NOTE_SOURCE_LOCATION (insn
) == NOTE_SOURCE_LOCATION (last
)
1527 && NOTE_LINE_NUMBER (insn
) == NOTE_LINE_NUMBER (last
)
1528 && NOTE_SOURCE_FILE (insn
) == NOTE_SOURCE_FILE (last
)
1532 delete_insn (insn
); /* Use delete_note. */
1540 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1542 if (INSN_UID (insn
) > max_uid
) /* Find largest UID. */
1543 max_uid
= INSN_UID (insn
);
1545 /* If CC tracking across branches is enabled, record the insn which
1546 jumps to each branch only reached from one place. */
1547 if (optimize
&& JUMP_P (insn
))
1549 rtx lab
= JUMP_LABEL (insn
);
1550 if (lab
&& LABEL_NUSES (lab
) == 1)
1552 LABEL_REFS (lab
) = insn
;
1562 /* Output the insns. */
1563 for (insn
= NEXT_INSN (first
); insn
;)
1565 #ifdef HAVE_ATTR_length
1566 if ((unsigned) INSN_UID (insn
) >= INSN_ADDRESSES_SIZE ())
1568 /* This can be triggered by bugs elsewhere in the compiler if
1569 new insns are created after init_insn_lengths is called. */
1570 gcc_assert (NOTE_P (insn
));
1571 insn_current_address
= -1;
1574 insn_current_address
= INSN_ADDRESSES (INSN_UID (insn
));
1575 #endif /* HAVE_ATTR_length */
1577 insn
= final_scan_insn (insn
, file
, optimize
, prescan
, 0, &seen
);
1582 get_insn_template (int code
, rtx insn
)
1584 switch (insn_data
[code
].output_format
)
1586 case INSN_OUTPUT_FORMAT_SINGLE
:
1587 return insn_data
[code
].output
.single
;
1588 case INSN_OUTPUT_FORMAT_MULTI
:
1589 return insn_data
[code
].output
.multi
[which_alternative
];
1590 case INSN_OUTPUT_FORMAT_FUNCTION
:
1592 return (*insn_data
[code
].output
.function
) (recog_data
.operand
, insn
);
1599 /* Emit the appropriate declaration for an alternate-entry-point
1600 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1601 LABEL_KIND != LABEL_NORMAL.
1603 The case fall-through in this function is intentional. */
1605 output_alternate_entry_point (FILE *file
, rtx insn
)
1607 const char *name
= LABEL_NAME (insn
);
1609 switch (LABEL_KIND (insn
))
1611 case LABEL_WEAK_ENTRY
:
1612 #ifdef ASM_WEAKEN_LABEL
1613 ASM_WEAKEN_LABEL (file
, name
);
1615 case LABEL_GLOBAL_ENTRY
:
1616 targetm
.asm_out
.globalize_label (file
, name
);
1617 case LABEL_STATIC_ENTRY
:
1618 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1619 ASM_OUTPUT_TYPE_DIRECTIVE (file
, name
, "function");
1621 ASM_OUTPUT_LABEL (file
, name
);
1630 /* Return boolean indicating if there is a NOTE_INSN_UNLIKELY_EXECUTED_CODE
1631 note in the instruction chain (going forward) between the current
1632 instruction, and the next 'executable' instruction. */
1635 scan_ahead_for_unlikely_executed_note (rtx insn
)
1638 int bb_note_count
= 0;
1640 for (temp
= insn
; temp
; temp
= NEXT_INSN (temp
))
1643 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_UNLIKELY_EXECUTED_CODE
)
1646 && NOTE_LINE_NUMBER (temp
) == NOTE_INSN_BASIC_BLOCK
)
1649 if (bb_note_count
> 1)
1659 /* The final scan for one insn, INSN.
1660 Args are same as in `final', except that INSN
1661 is the insn being scanned.
1662 Value returned is the next insn to be scanned.
1664 NOPEEPHOLES is the flag to disallow peephole processing (currently
1665 used for within delayed branch sequence output).
1667 SEEN is used to track the end of the prologue, for emitting
1668 debug information. We force the emission of a line note after
1669 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1670 at the beginning of the second basic block, whichever comes
1674 final_scan_insn (rtx insn
, FILE *file
, int optimize ATTRIBUTE_UNUSED
,
1675 int prescan
, int nopeepholes ATTRIBUTE_UNUSED
,
1685 /* Ignore deleted insns. These can occur when we split insns (due to a
1686 template of "#") while not optimizing. */
1687 if (INSN_DELETED_P (insn
))
1688 return NEXT_INSN (insn
);
1690 switch (GET_CODE (insn
))
1696 switch (NOTE_LINE_NUMBER (insn
))
1698 case NOTE_INSN_DELETED
:
1699 case NOTE_INSN_LOOP_BEG
:
1700 case NOTE_INSN_LOOP_END
:
1701 case NOTE_INSN_FUNCTION_END
:
1702 case NOTE_INSN_REPEATED_LINE_NUMBER
:
1703 case NOTE_INSN_EXPECTED_VALUE
:
1706 case NOTE_INSN_UNLIKELY_EXECUTED_CODE
:
1708 /* The presence of this note indicates that this basic block
1709 belongs in the "cold" section of the .o file. If we are
1710 not already writing to the cold section we need to change
1713 unlikely_text_section ();
1716 case NOTE_INSN_BASIC_BLOCK
:
1718 /* If we are performing the optimization that partitions
1719 basic blocks into hot & cold sections of the .o file,
1720 then at the start of each new basic block, before
1721 beginning to write code for the basic block, we need to
1722 check to see whether the basic block belongs in the hot
1723 or cold section of the .o file, and change the section we
1724 are writing to appropriately. */
1726 if (flag_reorder_blocks_and_partition
1727 && !scan_ahead_for_unlikely_executed_note (insn
))
1728 function_section (current_function_decl
);
1730 #ifdef TARGET_UNWIND_INFO
1731 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
1735 fprintf (asm_out_file
, "\t%s basic block %d\n",
1736 ASM_COMMENT_START
, NOTE_BASIC_BLOCK (insn
)->index
);
1738 if ((*seen
& (SEEN_EMITTED
| SEEN_BB
)) == SEEN_BB
)
1740 *seen
|= SEEN_EMITTED
;
1741 last_filename
= NULL
;
1748 case NOTE_INSN_EH_REGION_BEG
:
1749 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHB",
1750 NOTE_EH_HANDLER (insn
));
1753 case NOTE_INSN_EH_REGION_END
:
1754 ASM_OUTPUT_DEBUG_LABEL (asm_out_file
, "LEHE",
1755 NOTE_EH_HANDLER (insn
));
1758 case NOTE_INSN_PROLOGUE_END
:
1759 targetm
.asm_out
.function_end_prologue (file
);
1760 profile_after_prologue (file
);
1762 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1764 *seen
|= SEEN_EMITTED
;
1765 last_filename
= NULL
;
1772 case NOTE_INSN_EPILOGUE_BEG
:
1773 targetm
.asm_out
.function_begin_epilogue (file
);
1776 case NOTE_INSN_FUNCTION_BEG
:
1778 (*debug_hooks
->end_prologue
) (last_linenum
, last_filename
);
1780 if ((*seen
& (SEEN_EMITTED
| SEEN_NOTE
)) == SEEN_NOTE
)
1782 *seen
|= SEEN_EMITTED
;
1783 last_filename
= NULL
;
1790 case NOTE_INSN_BLOCK_BEG
:
1791 if (debug_info_level
== DINFO_LEVEL_NORMAL
1792 || debug_info_level
== DINFO_LEVEL_VERBOSE
1793 || write_symbols
== DWARF2_DEBUG
1794 || write_symbols
== VMS_AND_DWARF2_DEBUG
1795 || write_symbols
== VMS_DEBUG
)
1797 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1801 high_block_linenum
= last_linenum
;
1803 /* Output debugging info about the symbol-block beginning. */
1804 (*debug_hooks
->begin_block
) (last_linenum
, n
);
1806 /* Mark this block as output. */
1807 TREE_ASM_WRITTEN (NOTE_BLOCK (insn
)) = 1;
1811 case NOTE_INSN_BLOCK_END
:
1812 if (debug_info_level
== DINFO_LEVEL_NORMAL
1813 || debug_info_level
== DINFO_LEVEL_VERBOSE
1814 || write_symbols
== DWARF2_DEBUG
1815 || write_symbols
== VMS_AND_DWARF2_DEBUG
1816 || write_symbols
== VMS_DEBUG
)
1818 int n
= BLOCK_NUMBER (NOTE_BLOCK (insn
));
1822 /* End of a symbol-block. */
1824 gcc_assert (block_depth
>= 0);
1826 (*debug_hooks
->end_block
) (high_block_linenum
, n
);
1830 case NOTE_INSN_DELETED_LABEL
:
1831 /* Emit the label. We may have deleted the CODE_LABEL because
1832 the label could be proved to be unreachable, though still
1833 referenced (in the form of having its address taken. */
1834 ASM_OUTPUT_DEBUG_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
));
1837 case NOTE_INSN_VAR_LOCATION
:
1838 (*debug_hooks
->var_location
) (insn
);
1845 gcc_assert (NOTE_LINE_NUMBER (insn
) > 0);
1851 #if defined (DWARF2_UNWIND_INFO)
1852 if (dwarf2out_do_frame ())
1853 dwarf2out_frame_debug (insn
, false);
1858 /* The target port might emit labels in the output function for
1859 some insn, e.g. sh.c output_branchy_insn. */
1860 if (CODE_LABEL_NUMBER (insn
) <= max_labelno
)
1862 int align
= LABEL_TO_ALIGNMENT (insn
);
1863 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1864 int max_skip
= LABEL_TO_MAX_SKIP (insn
);
1867 if (align
&& NEXT_INSN (insn
))
1869 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1870 ASM_OUTPUT_MAX_SKIP_ALIGN (file
, align
, max_skip
);
1872 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1873 ASM_OUTPUT_ALIGN_WITH_NOP (file
, align
);
1875 ASM_OUTPUT_ALIGN (file
, align
);
1882 /* If this label is reached from only one place, set the condition
1883 codes from the instruction just before the branch. */
1885 /* Disabled because some insns set cc_status in the C output code
1886 and NOTICE_UPDATE_CC alone can set incorrect status. */
1887 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1889 rtx jump
= LABEL_REFS (insn
);
1890 rtx barrier
= prev_nonnote_insn (insn
);
1892 /* If the LABEL_REFS field of this label has been set to point
1893 at a branch, the predecessor of the branch is a regular
1894 insn, and that branch is the only way to reach this label,
1895 set the condition codes based on the branch and its
1897 if (barrier
&& BARRIER_P (barrier
)
1898 && jump
&& JUMP_P (jump
)
1899 && (prev
= prev_nonnote_insn (jump
))
1900 && NONJUMP_INSN_P (prev
))
1902 NOTICE_UPDATE_CC (PATTERN (prev
), prev
);
1903 NOTICE_UPDATE_CC (PATTERN (jump
), jump
);
1910 if (LABEL_NAME (insn
))
1911 (*debug_hooks
->label
) (insn
);
1913 /* If we are doing the optimization that partitions hot & cold
1914 basic blocks into separate sections of the .o file, we need
1915 to ensure the jump table ends up in the correct section... */
1917 if (flag_reorder_blocks_and_partition
1918 && targetm
.have_named_sections
)
1920 rtx tmp_table
, tmp_label
;
1922 && tablejump_p (NEXT_INSN (insn
), &tmp_label
, &tmp_table
))
1924 /* Do nothing; Do NOT change the current section. */
1926 else if (scan_ahead_for_unlikely_executed_note (insn
))
1927 unlikely_text_section ();
1928 else if (in_unlikely_text_section ())
1929 function_section (current_function_decl
);
1934 fputs (ASM_APP_OFF
, file
);
1938 next
= next_nonnote_insn (insn
);
1939 if (next
!= 0 && JUMP_P (next
))
1941 rtx nextbody
= PATTERN (next
);
1943 /* If this label is followed by a jump-table,
1944 make sure we put the label in the read-only section. Also
1945 possibly write the label and jump table together. */
1947 if (GET_CODE (nextbody
) == ADDR_VEC
1948 || GET_CODE (nextbody
) == ADDR_DIFF_VEC
)
1950 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1951 /* In this case, the case vector is being moved by the
1952 target, so don't output the label at all. Leave that
1953 to the back end macros. */
1955 if (! JUMP_TABLES_IN_TEXT_SECTION
)
1959 targetm
.asm_out
.function_rodata_section (current_function_decl
);
1961 #ifdef ADDR_VEC_ALIGN
1962 log_align
= ADDR_VEC_ALIGN (next
);
1964 log_align
= exact_log2 (BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
);
1966 ASM_OUTPUT_ALIGN (file
, log_align
);
1969 function_section (current_function_decl
);
1971 #ifdef ASM_OUTPUT_CASE_LABEL
1972 ASM_OUTPUT_CASE_LABEL (file
, "L", CODE_LABEL_NUMBER (insn
),
1975 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1981 if (LABEL_ALT_ENTRY_P (insn
))
1982 output_alternate_entry_point (file
, insn
);
1984 targetm
.asm_out
.internal_label (file
, "L", CODE_LABEL_NUMBER (insn
));
1989 rtx body
= PATTERN (insn
);
1990 int insn_code_number
;
1991 const char *template;
1993 /* An INSN, JUMP_INSN or CALL_INSN.
1994 First check for special kinds that recog doesn't recognize. */
1996 if (GET_CODE (body
) == USE
/* These are just declarations. */
1997 || GET_CODE (body
) == CLOBBER
)
2002 /* If there is a REG_CC_SETTER note on this insn, it means that
2003 the setting of the condition code was done in the delay slot
2004 of the insn that branched here. So recover the cc status
2005 from the insn that set it. */
2007 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2010 NOTICE_UPDATE_CC (PATTERN (XEXP (note
, 0)), XEXP (note
, 0));
2011 cc_prev_status
= cc_status
;
2016 /* Detect insns that are really jump-tables
2017 and output them as such. */
2019 if (GET_CODE (body
) == ADDR_VEC
|| GET_CODE (body
) == ADDR_DIFF_VEC
)
2021 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
2028 if (! JUMP_TABLES_IN_TEXT_SECTION
)
2029 targetm
.asm_out
.function_rodata_section (current_function_decl
);
2031 function_section (current_function_decl
);
2035 fputs (ASM_APP_OFF
, file
);
2039 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2040 if (GET_CODE (body
) == ADDR_VEC
)
2042 #ifdef ASM_OUTPUT_ADDR_VEC
2043 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn
), body
);
2050 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2051 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn
), body
);
2057 vlen
= XVECLEN (body
, GET_CODE (body
) == ADDR_DIFF_VEC
);
2058 for (idx
= 0; idx
< vlen
; idx
++)
2060 if (GET_CODE (body
) == ADDR_VEC
)
2062 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2063 ASM_OUTPUT_ADDR_VEC_ELT
2064 (file
, CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 0, idx
), 0)));
2071 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2072 ASM_OUTPUT_ADDR_DIFF_ELT
2075 CODE_LABEL_NUMBER (XEXP (XVECEXP (body
, 1, idx
), 0)),
2076 CODE_LABEL_NUMBER (XEXP (XEXP (body
, 0), 0)));
2082 #ifdef ASM_OUTPUT_CASE_END
2083 ASM_OUTPUT_CASE_END (file
,
2084 CODE_LABEL_NUMBER (PREV_INSN (insn
)),
2089 function_section (current_function_decl
);
2093 /* Output this line note if it is the first or the last line
2095 if (notice_source_line (insn
))
2097 (*debug_hooks
->source_line
) (last_linenum
, last_filename
);
2100 if (GET_CODE (body
) == ASM_INPUT
)
2102 const char *string
= XSTR (body
, 0);
2104 /* There's no telling what that did to the condition codes. */
2113 fputs (ASM_APP_ON
, file
);
2116 fprintf (asm_out_file
, "\t%s\n", string
);
2121 /* Detect `asm' construct with operands. */
2122 if (asm_noperands (body
) >= 0)
2124 unsigned int noperands
= asm_noperands (body
);
2125 rtx
*ops
= alloca (noperands
* sizeof (rtx
));
2128 /* There's no telling what that did to the condition codes. */
2133 /* Get out the operand values. */
2134 string
= decode_asm_operands (body
, ops
, NULL
, NULL
, NULL
);
2135 /* Inhibit aborts on what would otherwise be compiler bugs. */
2136 insn_noperands
= noperands
;
2137 this_is_asm_operands
= insn
;
2139 #ifdef FINAL_PRESCAN_INSN
2140 FINAL_PRESCAN_INSN (insn
, ops
, insn_noperands
);
2143 /* Output the insn using them. */
2148 fputs (ASM_APP_ON
, file
);
2151 output_asm_insn (string
, ops
);
2154 this_is_asm_operands
= 0;
2158 if (prescan
<= 0 && app_on
)
2160 fputs (ASM_APP_OFF
, file
);
2164 if (GET_CODE (body
) == SEQUENCE
)
2166 /* A delayed-branch sequence */
2171 final_sequence
= body
;
2173 /* Record the delay slots' frame information before the branch.
2174 This is needed for delayed calls: see execute_cfa_program(). */
2175 #if defined (DWARF2_UNWIND_INFO)
2176 if (dwarf2out_do_frame ())
2177 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2178 dwarf2out_frame_debug (XVECEXP (body
, 0, i
), false);
2181 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2182 force the restoration of a comparison that was previously
2183 thought unnecessary. If that happens, cancel this sequence
2184 and cause that insn to be restored. */
2186 next
= final_scan_insn (XVECEXP (body
, 0, 0), file
, 0, prescan
, 1, seen
);
2187 if (next
!= XVECEXP (body
, 0, 1))
2193 for (i
= 1; i
< XVECLEN (body
, 0); i
++)
2195 rtx insn
= XVECEXP (body
, 0, i
);
2196 rtx next
= NEXT_INSN (insn
);
2197 /* We loop in case any instruction in a delay slot gets
2200 insn
= final_scan_insn (insn
, file
, 0, prescan
, 1, seen
);
2201 while (insn
!= next
);
2203 #ifdef DBR_OUTPUT_SEQEND
2204 DBR_OUTPUT_SEQEND (file
);
2208 /* If the insn requiring the delay slot was a CALL_INSN, the
2209 insns in the delay slot are actually executed before the
2210 called function. Hence we don't preserve any CC-setting
2211 actions in these insns and the CC must be marked as being
2212 clobbered by the function. */
2213 if (CALL_P (XVECEXP (body
, 0, 0)))
2220 /* We have a real machine instruction as rtl. */
2222 body
= PATTERN (insn
);
2225 set
= single_set (insn
);
2227 /* Check for redundant test and compare instructions
2228 (when the condition codes are already set up as desired).
2229 This is done only when optimizing; if not optimizing,
2230 it should be possible for the user to alter a variable
2231 with the debugger in between statements
2232 and the next statement should reexamine the variable
2233 to compute the condition codes. */
2238 && GET_CODE (SET_DEST (set
)) == CC0
2239 && insn
!= last_ignored_compare
)
2241 if (GET_CODE (SET_SRC (set
)) == SUBREG
)
2242 SET_SRC (set
) = alter_subreg (&SET_SRC (set
));
2243 else if (GET_CODE (SET_SRC (set
)) == COMPARE
)
2245 if (GET_CODE (XEXP (SET_SRC (set
), 0)) == SUBREG
)
2246 XEXP (SET_SRC (set
), 0)
2247 = alter_subreg (&XEXP (SET_SRC (set
), 0));
2248 if (GET_CODE (XEXP (SET_SRC (set
), 1)) == SUBREG
)
2249 XEXP (SET_SRC (set
), 1)
2250 = alter_subreg (&XEXP (SET_SRC (set
), 1));
2252 if ((cc_status
.value1
!= 0
2253 && rtx_equal_p (SET_SRC (set
), cc_status
.value1
))
2254 || (cc_status
.value2
!= 0
2255 && rtx_equal_p (SET_SRC (set
), cc_status
.value2
)))
2257 /* Don't delete insn if it has an addressing side-effect. */
2258 if (! FIND_REG_INC_NOTE (insn
, NULL_RTX
)
2259 /* or if anything in it is volatile. */
2260 && ! volatile_refs_p (PATTERN (insn
)))
2262 /* We don't really delete the insn; just ignore it. */
2263 last_ignored_compare
= insn
;
2272 /* Don't bother outputting obvious no-ops, even without -O.
2273 This optimization is fast and doesn't interfere with debugging.
2274 Don't do this if the insn is in a delay slot, since this
2275 will cause an improper number of delay insns to be written. */
2276 if (final_sequence
== 0
2278 && NONJUMP_INSN_P (insn
) && GET_CODE (body
) == SET
2279 && REG_P (SET_SRC (body
))
2280 && REG_P (SET_DEST (body
))
2281 && REGNO (SET_SRC (body
)) == REGNO (SET_DEST (body
)))
2286 /* If this is a conditional branch, maybe modify it
2287 if the cc's are in a nonstandard state
2288 so that it accomplishes the same thing that it would
2289 do straightforwardly if the cc's were set up normally. */
2291 if (cc_status
.flags
!= 0
2293 && GET_CODE (body
) == SET
2294 && SET_DEST (body
) == pc_rtx
2295 && GET_CODE (SET_SRC (body
)) == IF_THEN_ELSE
2296 && COMPARISON_P (XEXP (SET_SRC (body
), 0))
2297 && XEXP (XEXP (SET_SRC (body
), 0), 0) == cc0_rtx
2298 /* This is done during prescan; it is not done again
2299 in final scan when prescan has been done. */
2302 /* This function may alter the contents of its argument
2303 and clear some of the cc_status.flags bits.
2304 It may also return 1 meaning condition now always true
2305 or -1 meaning condition now always false
2306 or 2 meaning condition nontrivial but altered. */
2307 int result
= alter_cond (XEXP (SET_SRC (body
), 0));
2308 /* If condition now has fixed value, replace the IF_THEN_ELSE
2309 with its then-operand or its else-operand. */
2311 SET_SRC (body
) = XEXP (SET_SRC (body
), 1);
2313 SET_SRC (body
) = XEXP (SET_SRC (body
), 2);
2315 /* The jump is now either unconditional or a no-op.
2316 If it has become a no-op, don't try to output it.
2317 (It would not be recognized.) */
2318 if (SET_SRC (body
) == pc_rtx
)
2323 else if (GET_CODE (SET_SRC (body
)) == RETURN
)
2324 /* Replace (set (pc) (return)) with (return). */
2325 PATTERN (insn
) = body
= SET_SRC (body
);
2327 /* Rerecognize the instruction if it has changed. */
2329 INSN_CODE (insn
) = -1;
2332 /* Make same adjustments to instructions that examine the
2333 condition codes without jumping and instructions that
2334 handle conditional moves (if this machine has either one). */
2336 if (cc_status
.flags
!= 0
2339 rtx cond_rtx
, then_rtx
, else_rtx
;
2342 && GET_CODE (SET_SRC (set
)) == IF_THEN_ELSE
)
2344 cond_rtx
= XEXP (SET_SRC (set
), 0);
2345 then_rtx
= XEXP (SET_SRC (set
), 1);
2346 else_rtx
= XEXP (SET_SRC (set
), 2);
2350 cond_rtx
= SET_SRC (set
);
2351 then_rtx
= const_true_rtx
;
2352 else_rtx
= const0_rtx
;
2355 switch (GET_CODE (cond_rtx
))
2369 if (XEXP (cond_rtx
, 0) != cc0_rtx
)
2371 result
= alter_cond (cond_rtx
);
2373 validate_change (insn
, &SET_SRC (set
), then_rtx
, 0);
2374 else if (result
== -1)
2375 validate_change (insn
, &SET_SRC (set
), else_rtx
, 0);
2376 else if (result
== 2)
2377 INSN_CODE (insn
) = -1;
2378 if (SET_DEST (set
) == SET_SRC (set
))
2390 #ifdef HAVE_peephole
2391 /* Do machine-specific peephole optimizations if desired. */
2393 if (optimize
&& !flag_no_peephole
&& !nopeepholes
)
2395 rtx next
= peephole (insn
);
2396 /* When peepholing, if there were notes within the peephole,
2397 emit them before the peephole. */
2398 if (next
!= 0 && next
!= NEXT_INSN (insn
))
2400 rtx note
, prev
= PREV_INSN (insn
);
2402 for (note
= NEXT_INSN (insn
); note
!= next
;
2403 note
= NEXT_INSN (note
))
2404 final_scan_insn (note
, file
, optimize
, prescan
, nopeepholes
, seen
);
2406 /* In case this is prescan, put the notes
2407 in proper position for later rescan. */
2408 note
= NEXT_INSN (insn
);
2409 PREV_INSN (note
) = prev
;
2410 NEXT_INSN (prev
) = note
;
2411 NEXT_INSN (PREV_INSN (next
)) = insn
;
2412 PREV_INSN (insn
) = PREV_INSN (next
);
2413 NEXT_INSN (insn
) = next
;
2414 PREV_INSN (next
) = insn
;
2417 /* PEEPHOLE might have changed this. */
2418 body
= PATTERN (insn
);
2422 /* Try to recognize the instruction.
2423 If successful, verify that the operands satisfy the
2424 constraints for the instruction. Crash if they don't,
2425 since `reload' should have changed them so that they do. */
2427 insn_code_number
= recog_memoized (insn
);
2428 cleanup_subreg_operands (insn
);
2430 /* Dump the insn in the assembly for debugging. */
2431 if (flag_dump_rtl_in_asm
)
2433 print_rtx_head
= ASM_COMMENT_START
;
2434 print_rtl_single (asm_out_file
, insn
);
2435 print_rtx_head
= "";
2438 if (! constrain_operands_cached (1))
2439 fatal_insn_not_found (insn
);
2441 /* Some target machines need to prescan each insn before
2444 #ifdef FINAL_PRESCAN_INSN
2445 FINAL_PRESCAN_INSN (insn
, recog_data
.operand
, recog_data
.n_operands
);
2448 #ifdef HAVE_conditional_execution
2449 if (GET_CODE (PATTERN (insn
)) == COND_EXEC
)
2450 current_insn_predicate
= COND_EXEC_TEST (PATTERN (insn
));
2452 current_insn_predicate
= NULL_RTX
;
2456 cc_prev_status
= cc_status
;
2458 /* Update `cc_status' for this instruction.
2459 The instruction's output routine may change it further.
2460 If the output routine for a jump insn needs to depend
2461 on the cc status, it should look at cc_prev_status. */
2463 NOTICE_UPDATE_CC (body
, insn
);
2466 current_output_insn
= debug_insn
= insn
;
2468 #if defined (DWARF2_UNWIND_INFO)
2469 if (CALL_P (insn
) && dwarf2out_do_frame ())
2470 dwarf2out_frame_debug (insn
, false);
2473 /* Find the proper template for this insn. */
2474 template = get_insn_template (insn_code_number
, insn
);
2476 /* If the C code returns 0, it means that it is a jump insn
2477 which follows a deleted test insn, and that test insn
2478 needs to be reinserted. */
2483 gcc_assert (prev_nonnote_insn (insn
) == last_ignored_compare
);
2485 /* We have already processed the notes between the setter and
2486 the user. Make sure we don't process them again, this is
2487 particularly important if one of the notes is a block
2488 scope note or an EH note. */
2490 prev
!= last_ignored_compare
;
2491 prev
= PREV_INSN (prev
))
2494 delete_insn (prev
); /* Use delete_note. */
2500 /* If the template is the string "#", it means that this insn must
2502 if (template[0] == '#' && template[1] == '\0')
2504 rtx
new = try_split (body
, insn
, 0);
2506 /* If we didn't split the insn, go away. */
2507 if (new == insn
&& PATTERN (new) == body
)
2508 fatal_insn ("could not split insn", insn
);
2510 #ifdef HAVE_ATTR_length
2511 /* This instruction should have been split in shorten_branches,
2512 to ensure that we would have valid length info for the
2523 #ifdef TARGET_UNWIND_INFO
2524 /* ??? This will put the directives in the wrong place if
2525 get_insn_template outputs assembly directly. However calling it
2526 before get_insn_template breaks if the insns is split. */
2527 targetm
.asm_out
.unwind_emit (asm_out_file
, insn
);
2530 /* Output assembler code from the template. */
2531 output_asm_insn (template, recog_data
.operand
);
2533 /* If necessary, report the effect that the instruction has on
2534 the unwind info. We've already done this for delay slots
2535 and call instructions. */
2536 #if defined (DWARF2_UNWIND_INFO)
2537 if (final_sequence
== 0
2538 #if !defined (HAVE_prologue)
2539 && !ACCUMULATE_OUTGOING_ARGS
2541 && dwarf2out_do_frame ())
2542 dwarf2out_frame_debug (insn
, true);
2545 current_output_insn
= debug_insn
= 0;
2548 return NEXT_INSN (insn
);
2551 /* Output debugging info to the assembler file FILE
2552 based on the NOTE-insn INSN, assumed to be a line number. */
2555 notice_source_line (rtx insn
)
2557 const char *filename
= insn_file (insn
);
2558 int linenum
= insn_line (insn
);
2560 if (filename
&& (filename
!= last_filename
|| last_linenum
!= linenum
))
2562 last_filename
= filename
;
2563 last_linenum
= linenum
;
2564 high_block_linenum
= MAX (last_linenum
, high_block_linenum
);
2565 high_function_linenum
= MAX (last_linenum
, high_function_linenum
);
2571 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2572 directly to the desired hard register. */
2575 cleanup_subreg_operands (rtx insn
)
2578 extract_insn_cached (insn
);
2579 for (i
= 0; i
< recog_data
.n_operands
; i
++)
2581 /* The following test cannot use recog_data.operand when testing
2582 for a SUBREG: the underlying object might have been changed
2583 already if we are inside a match_operator expression that
2584 matches the else clause. Instead we test the underlying
2585 expression directly. */
2586 if (GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2587 recog_data
.operand
[i
] = alter_subreg (recog_data
.operand_loc
[i
]);
2588 else if (GET_CODE (recog_data
.operand
[i
]) == PLUS
2589 || GET_CODE (recog_data
.operand
[i
]) == MULT
2590 || MEM_P (recog_data
.operand
[i
]))
2591 recog_data
.operand
[i
] = walk_alter_subreg (recog_data
.operand_loc
[i
]);
2594 for (i
= 0; i
< recog_data
.n_dups
; i
++)
2596 if (GET_CODE (*recog_data
.dup_loc
[i
]) == SUBREG
)
2597 *recog_data
.dup_loc
[i
] = alter_subreg (recog_data
.dup_loc
[i
]);
2598 else if (GET_CODE (*recog_data
.dup_loc
[i
]) == PLUS
2599 || GET_CODE (*recog_data
.dup_loc
[i
]) == MULT
2600 || MEM_P (*recog_data
.dup_loc
[i
]))
2601 *recog_data
.dup_loc
[i
] = walk_alter_subreg (recog_data
.dup_loc
[i
]);
2605 /* If X is a SUBREG, replace it with a REG or a MEM,
2606 based on the thing it is a subreg of. */
2609 alter_subreg (rtx
*xp
)
2612 rtx y
= SUBREG_REG (x
);
2614 /* simplify_subreg does not remove subreg from volatile references.
2615 We are required to. */
2618 int offset
= SUBREG_BYTE (x
);
2620 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2621 contains 0 instead of the proper offset. See simplify_subreg. */
2623 && GET_MODE_SIZE (GET_MODE (y
)) < GET_MODE_SIZE (GET_MODE (x
)))
2625 int difference
= GET_MODE_SIZE (GET_MODE (y
))
2626 - GET_MODE_SIZE (GET_MODE (x
));
2627 if (WORDS_BIG_ENDIAN
)
2628 offset
+= (difference
/ UNITS_PER_WORD
) * UNITS_PER_WORD
;
2629 if (BYTES_BIG_ENDIAN
)
2630 offset
+= difference
% UNITS_PER_WORD
;
2633 *xp
= adjust_address (y
, GET_MODE (x
), offset
);
2637 rtx
new = simplify_subreg (GET_MODE (x
), y
, GET_MODE (y
),
2644 /* Simplify_subreg can't handle some REG cases, but we have to. */
2645 unsigned int regno
= subreg_regno (x
);
2646 *xp
= gen_rtx_REG_offset (y
, GET_MODE (x
), regno
, SUBREG_BYTE (x
));
2653 /* Do alter_subreg on all the SUBREGs contained in X. */
2656 walk_alter_subreg (rtx
*xp
)
2659 switch (GET_CODE (x
))
2664 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2665 XEXP (x
, 1) = walk_alter_subreg (&XEXP (x
, 1));
2670 XEXP (x
, 0) = walk_alter_subreg (&XEXP (x
, 0));
2674 return alter_subreg (xp
);
2685 /* Given BODY, the body of a jump instruction, alter the jump condition
2686 as required by the bits that are set in cc_status.flags.
2687 Not all of the bits there can be handled at this level in all cases.
2689 The value is normally 0.
2690 1 means that the condition has become always true.
2691 -1 means that the condition has become always false.
2692 2 means that COND has been altered. */
2695 alter_cond (rtx cond
)
2699 if (cc_status
.flags
& CC_REVERSED
)
2702 PUT_CODE (cond
, swap_condition (GET_CODE (cond
)));
2705 if (cc_status
.flags
& CC_INVERTED
)
2708 PUT_CODE (cond
, reverse_condition (GET_CODE (cond
)));
2711 if (cc_status
.flags
& CC_NOT_POSITIVE
)
2712 switch (GET_CODE (cond
))
2717 /* Jump becomes unconditional. */
2723 /* Jump becomes no-op. */
2727 PUT_CODE (cond
, EQ
);
2732 PUT_CODE (cond
, NE
);
2740 if (cc_status
.flags
& CC_NOT_NEGATIVE
)
2741 switch (GET_CODE (cond
))
2745 /* Jump becomes unconditional. */
2750 /* Jump becomes no-op. */
2755 PUT_CODE (cond
, EQ
);
2761 PUT_CODE (cond
, NE
);
2769 if (cc_status
.flags
& CC_NO_OVERFLOW
)
2770 switch (GET_CODE (cond
))
2773 /* Jump becomes unconditional. */
2777 PUT_CODE (cond
, EQ
);
2782 PUT_CODE (cond
, NE
);
2787 /* Jump becomes no-op. */
2794 if (cc_status
.flags
& (CC_Z_IN_NOT_N
| CC_Z_IN_N
))
2795 switch (GET_CODE (cond
))
2801 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? GE
: LT
);
2806 PUT_CODE (cond
, cc_status
.flags
& CC_Z_IN_N
? LT
: GE
);
2811 if (cc_status
.flags
& CC_NOT_SIGNED
)
2812 /* The flags are valid if signed condition operators are converted
2814 switch (GET_CODE (cond
))
2817 PUT_CODE (cond
, LEU
);
2822 PUT_CODE (cond
, LTU
);
2827 PUT_CODE (cond
, GTU
);
2832 PUT_CODE (cond
, GEU
);
2844 /* Report inconsistency between the assembler template and the operands.
2845 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2848 output_operand_lossage (const char *cmsgid
, ...)
2852 const char *pfx_str
;
2855 va_start (ap
, cmsgid
);
2857 pfx_str
= this_is_asm_operands
? _("invalid 'asm': ") : "output_operand: ";
2858 asprintf (&fmt_string
, "%s%s", pfx_str
, _(cmsgid
));
2859 vasprintf (&new_message
, fmt_string
, ap
);
2861 if (this_is_asm_operands
)
2862 error_for_asm (this_is_asm_operands
, "%s", new_message
);
2864 internal_error ("%s", new_message
);
2871 /* Output of assembler code from a template, and its subroutines. */
2873 /* Annotate the assembly with a comment describing the pattern and
2874 alternative used. */
2877 output_asm_name (void)
2881 int num
= INSN_CODE (debug_insn
);
2882 fprintf (asm_out_file
, "\t%s %d\t%s",
2883 ASM_COMMENT_START
, INSN_UID (debug_insn
),
2884 insn_data
[num
].name
);
2885 if (insn_data
[num
].n_alternatives
> 1)
2886 fprintf (asm_out_file
, "/%d", which_alternative
+ 1);
2887 #ifdef HAVE_ATTR_length
2888 fprintf (asm_out_file
, "\t[length = %d]",
2889 get_attr_length (debug_insn
));
2891 /* Clear this so only the first assembler insn
2892 of any rtl insn will get the special comment for -dp. */
2897 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2898 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2899 corresponds to the address of the object and 0 if to the object. */
2902 get_mem_expr_from_op (rtx op
, int *paddressp
)
2910 return REG_EXPR (op
);
2911 else if (!MEM_P (op
))
2914 if (MEM_EXPR (op
) != 0)
2915 return MEM_EXPR (op
);
2917 /* Otherwise we have an address, so indicate it and look at the address. */
2921 /* First check if we have a decl for the address, then look at the right side
2922 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2923 But don't allow the address to itself be indirect. */
2924 if ((expr
= get_mem_expr_from_op (op
, &inner_addressp
)) && ! inner_addressp
)
2926 else if (GET_CODE (op
) == PLUS
2927 && (expr
= get_mem_expr_from_op (XEXP (op
, 1), &inner_addressp
)))
2930 while (GET_RTX_CLASS (GET_CODE (op
)) == RTX_UNARY
2931 || GET_RTX_CLASS (GET_CODE (op
)) == RTX_BIN_ARITH
)
2934 expr
= get_mem_expr_from_op (op
, &inner_addressp
);
2935 return inner_addressp
? 0 : expr
;
2938 /* Output operand names for assembler instructions. OPERANDS is the
2939 operand vector, OPORDER is the order to write the operands, and NOPS
2940 is the number of operands to write. */
2943 output_asm_operand_names (rtx
*operands
, int *oporder
, int nops
)
2948 for (i
= 0; i
< nops
; i
++)
2951 rtx op
= operands
[oporder
[i
]];
2952 tree expr
= get_mem_expr_from_op (op
, &addressp
);
2954 fprintf (asm_out_file
, "%c%s",
2955 wrote
? ',' : '\t', wrote
? "" : ASM_COMMENT_START
);
2959 fprintf (asm_out_file
, "%s",
2960 addressp
? "*" : "");
2961 print_mem_expr (asm_out_file
, expr
);
2964 else if (REG_P (op
) && ORIGINAL_REGNO (op
)
2965 && ORIGINAL_REGNO (op
) != REGNO (op
))
2966 fprintf (asm_out_file
, " tmp%i", ORIGINAL_REGNO (op
));
2970 /* Output text from TEMPLATE to the assembler output file,
2971 obeying %-directions to substitute operands taken from
2972 the vector OPERANDS.
2974 %N (for N a digit) means print operand N in usual manner.
2975 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2976 and print the label name with no punctuation.
2977 %cN means require operand N to be a constant
2978 and print the constant expression with no punctuation.
2979 %aN means expect operand N to be a memory address
2980 (not a memory reference!) and print a reference
2982 %nN means expect operand N to be a constant
2983 and print a constant expression for minus the value
2984 of the operand, with no other punctuation. */
2987 output_asm_insn (const char *template, rtx
*operands
)
2991 #ifdef ASSEMBLER_DIALECT
2994 int oporder
[MAX_RECOG_OPERANDS
];
2995 char opoutput
[MAX_RECOG_OPERANDS
];
2998 /* An insn may return a null string template
2999 in a case where no assembler code is needed. */
3003 memset (opoutput
, 0, sizeof opoutput
);
3005 putc ('\t', asm_out_file
);
3007 #ifdef ASM_OUTPUT_OPCODE
3008 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3015 if (flag_verbose_asm
)
3016 output_asm_operand_names (operands
, oporder
, ops
);
3017 if (flag_print_asm_name
)
3021 memset (opoutput
, 0, sizeof opoutput
);
3023 putc (c
, asm_out_file
);
3024 #ifdef ASM_OUTPUT_OPCODE
3025 while ((c
= *p
) == '\t')
3027 putc (c
, asm_out_file
);
3030 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3034 #ifdef ASSEMBLER_DIALECT
3040 output_operand_lossage ("nested assembly dialect alternatives");
3044 /* If we want the first dialect, do nothing. Otherwise, skip
3045 DIALECT_NUMBER of strings ending with '|'. */
3046 for (i
= 0; i
< dialect_number
; i
++)
3048 while (*p
&& *p
!= '}' && *p
++ != '|')
3057 output_operand_lossage ("unterminated assembly dialect alternative");
3064 /* Skip to close brace. */
3069 output_operand_lossage ("unterminated assembly dialect alternative");
3073 while (*p
++ != '}');
3077 putc (c
, asm_out_file
);
3082 putc (c
, asm_out_file
);
3088 /* %% outputs a single %. */
3092 putc (c
, asm_out_file
);
3094 /* %= outputs a number which is unique to each insn in the entire
3095 compilation. This is useful for making local labels that are
3096 referred to more than once in a given insn. */
3100 fprintf (asm_out_file
, "%d", insn_counter
);
3102 /* % followed by a letter and some digits
3103 outputs an operand in a special way depending on the letter.
3104 Letters `acln' are implemented directly.
3105 Other letters are passed to `output_operand' so that
3106 the PRINT_OPERAND macro can define them. */
3107 else if (ISALPHA (*p
))
3110 unsigned long opnum
;
3113 opnum
= strtoul (p
, &endptr
, 10);
3116 output_operand_lossage ("operand number missing "
3118 else if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3119 output_operand_lossage ("operand number out of range");
3120 else if (letter
== 'l')
3121 output_asm_label (operands
[opnum
]);
3122 else if (letter
== 'a')
3123 output_address (operands
[opnum
]);
3124 else if (letter
== 'c')
3126 if (CONSTANT_ADDRESS_P (operands
[opnum
]))
3127 output_addr_const (asm_out_file
, operands
[opnum
]);
3129 output_operand (operands
[opnum
], 'c');
3131 else if (letter
== 'n')
3133 if (GET_CODE (operands
[opnum
]) == CONST_INT
)
3134 fprintf (asm_out_file
, HOST_WIDE_INT_PRINT_DEC
,
3135 - INTVAL (operands
[opnum
]));
3138 putc ('-', asm_out_file
);
3139 output_addr_const (asm_out_file
, operands
[opnum
]);
3143 output_operand (operands
[opnum
], letter
);
3145 if (!opoutput
[opnum
])
3146 oporder
[ops
++] = opnum
;
3147 opoutput
[opnum
] = 1;
3152 /* % followed by a digit outputs an operand the default way. */
3153 else if (ISDIGIT (*p
))
3155 unsigned long opnum
;
3158 opnum
= strtoul (p
, &endptr
, 10);
3159 if (this_is_asm_operands
&& opnum
>= insn_noperands
)
3160 output_operand_lossage ("operand number out of range");
3162 output_operand (operands
[opnum
], 0);
3164 if (!opoutput
[opnum
])
3165 oporder
[ops
++] = opnum
;
3166 opoutput
[opnum
] = 1;
3171 /* % followed by punctuation: output something for that
3172 punctuation character alone, with no operand.
3173 The PRINT_OPERAND macro decides what is actually done. */
3174 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3175 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p
))
3176 output_operand (NULL_RTX
, *p
++);
3179 output_operand_lossage ("invalid %%-code");
3183 putc (c
, asm_out_file
);
3186 /* Write out the variable names for operands, if we know them. */
3187 if (flag_verbose_asm
)
3188 output_asm_operand_names (operands
, oporder
, ops
);
3189 if (flag_print_asm_name
)
3192 putc ('\n', asm_out_file
);
3195 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3198 output_asm_label (rtx x
)
3202 if (GET_CODE (x
) == LABEL_REF
)
3206 && NOTE_LINE_NUMBER (x
) == NOTE_INSN_DELETED_LABEL
))
3207 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3209 output_operand_lossage ("'%%l' operand isn't a label");
3211 assemble_name (asm_out_file
, buf
);
3214 /* Print operand X using machine-dependent assembler syntax.
3215 The macro PRINT_OPERAND is defined just to control this function.
3216 CODE is a non-digit that preceded the operand-number in the % spec,
3217 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3218 between the % and the digits.
3219 When CODE is a non-letter, X is 0.
3221 The meanings of the letters are machine-dependent and controlled
3222 by PRINT_OPERAND. */
3225 output_operand (rtx x
, int code ATTRIBUTE_UNUSED
)
3227 if (x
&& GET_CODE (x
) == SUBREG
)
3228 x
= alter_subreg (&x
);
3230 /* If X is a pseudo-register, abort now rather than writing trash to the
3232 gcc_assert (!x
|| !REG_P (x
) || REGNO (x
) < FIRST_PSEUDO_REGISTER
);
3234 PRINT_OPERAND (asm_out_file
, x
, code
);
3237 /* Print a memory reference operand for address X
3238 using machine-dependent assembler syntax.
3239 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3242 output_address (rtx x
)
3244 walk_alter_subreg (&x
);
3245 PRINT_OPERAND_ADDRESS (asm_out_file
, x
);
3248 /* Print an integer constant expression in assembler syntax.
3249 Addition and subtraction are the only arithmetic
3250 that may appear in these expressions. */
3253 output_addr_const (FILE *file
, rtx x
)
3258 switch (GET_CODE (x
))
3265 if (SYMBOL_REF_DECL (x
))
3266 mark_decl_referenced (SYMBOL_REF_DECL (x
));
3267 #ifdef ASM_OUTPUT_SYMBOL_REF
3268 ASM_OUTPUT_SYMBOL_REF (file
, x
);
3270 assemble_name (file
, XSTR (x
, 0));
3278 ASM_GENERATE_INTERNAL_LABEL (buf
, "L", CODE_LABEL_NUMBER (x
));
3279 #ifdef ASM_OUTPUT_LABEL_REF
3280 ASM_OUTPUT_LABEL_REF (file
, buf
);
3282 assemble_name (file
, buf
);
3287 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, INTVAL (x
));
3291 /* This used to output parentheses around the expression,
3292 but that does not work on the 386 (either ATT or BSD assembler). */
3293 output_addr_const (file
, XEXP (x
, 0));
3297 if (GET_MODE (x
) == VOIDmode
)
3299 /* We can use %d if the number is one word and positive. */
3300 if (CONST_DOUBLE_HIGH (x
))
3301 fprintf (file
, HOST_WIDE_INT_PRINT_DOUBLE_HEX
,
3302 CONST_DOUBLE_HIGH (x
), CONST_DOUBLE_LOW (x
));
3303 else if (CONST_DOUBLE_LOW (x
) < 0)
3304 fprintf (file
, HOST_WIDE_INT_PRINT_HEX
, CONST_DOUBLE_LOW (x
));
3306 fprintf (file
, HOST_WIDE_INT_PRINT_DEC
, CONST_DOUBLE_LOW (x
));
3309 /* We can't handle floating point constants;
3310 PRINT_OPERAND must handle them. */
3311 output_operand_lossage ("floating constant misused");
3315 /* Some assemblers need integer constants to appear last (eg masm). */
3316 if (GET_CODE (XEXP (x
, 0)) == CONST_INT
)
3318 output_addr_const (file
, XEXP (x
, 1));
3319 if (INTVAL (XEXP (x
, 0)) >= 0)
3320 fprintf (file
, "+");
3321 output_addr_const (file
, XEXP (x
, 0));
3325 output_addr_const (file
, XEXP (x
, 0));
3326 if (GET_CODE (XEXP (x
, 1)) != CONST_INT
3327 || INTVAL (XEXP (x
, 1)) >= 0)
3328 fprintf (file
, "+");
3329 output_addr_const (file
, XEXP (x
, 1));
3334 /* Avoid outputting things like x-x or x+5-x,
3335 since some assemblers can't handle that. */
3336 x
= simplify_subtraction (x
);
3337 if (GET_CODE (x
) != MINUS
)
3340 output_addr_const (file
, XEXP (x
, 0));
3341 fprintf (file
, "-");
3342 if ((GET_CODE (XEXP (x
, 1)) == CONST_INT
&& INTVAL (XEXP (x
, 1)) >= 0)
3343 || GET_CODE (XEXP (x
, 1)) == PC
3344 || GET_CODE (XEXP (x
, 1)) == SYMBOL_REF
)
3345 output_addr_const (file
, XEXP (x
, 1));
3348 fputs (targetm
.asm_out
.open_paren
, file
);
3349 output_addr_const (file
, XEXP (x
, 1));
3350 fputs (targetm
.asm_out
.close_paren
, file
);
3357 output_addr_const (file
, XEXP (x
, 0));
3361 #ifdef OUTPUT_ADDR_CONST_EXTRA
3362 OUTPUT_ADDR_CONST_EXTRA (file
, x
, fail
);
3367 output_operand_lossage ("invalid expression as operand");
3371 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3372 %R prints the value of REGISTER_PREFIX.
3373 %L prints the value of LOCAL_LABEL_PREFIX.
3374 %U prints the value of USER_LABEL_PREFIX.
3375 %I prints the value of IMMEDIATE_PREFIX.
3376 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3377 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3379 We handle alternate assembler dialects here, just like output_asm_insn. */
3382 asm_fprintf (FILE *file
, const char *p
, ...)
3388 va_start (argptr
, p
);
3395 #ifdef ASSEMBLER_DIALECT
3400 /* If we want the first dialect, do nothing. Otherwise, skip
3401 DIALECT_NUMBER of strings ending with '|'. */
3402 for (i
= 0; i
< dialect_number
; i
++)
3404 while (*p
&& *p
++ != '|')
3414 /* Skip to close brace. */
3415 while (*p
&& *p
++ != '}')
3426 while (strchr ("-+ #0", c
))
3431 while (ISDIGIT (c
) || c
== '.')
3442 case 'd': case 'i': case 'u':
3443 case 'x': case 'X': case 'o':
3447 fprintf (file
, buf
, va_arg (argptr
, int));
3451 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3452 'o' cases, but we do not check for those cases. It
3453 means that the value is a HOST_WIDE_INT, which may be
3454 either `long' or `long long'. */
3455 memcpy (q
, HOST_WIDE_INT_PRINT
, strlen (HOST_WIDE_INT_PRINT
));
3456 q
+= strlen (HOST_WIDE_INT_PRINT
);
3459 fprintf (file
, buf
, va_arg (argptr
, HOST_WIDE_INT
));
3464 #ifdef HAVE_LONG_LONG
3470 fprintf (file
, buf
, va_arg (argptr
, long long));
3477 fprintf (file
, buf
, va_arg (argptr
, long));
3485 fprintf (file
, buf
, va_arg (argptr
, char *));
3489 #ifdef ASM_OUTPUT_OPCODE
3490 ASM_OUTPUT_OPCODE (asm_out_file
, p
);
3495 #ifdef REGISTER_PREFIX
3496 fprintf (file
, "%s", REGISTER_PREFIX
);
3501 #ifdef IMMEDIATE_PREFIX
3502 fprintf (file
, "%s", IMMEDIATE_PREFIX
);
3507 #ifdef LOCAL_LABEL_PREFIX
3508 fprintf (file
, "%s", LOCAL_LABEL_PREFIX
);
3513 fputs (user_label_prefix
, file
);
3516 #ifdef ASM_FPRINTF_EXTENSIONS
3517 /* Uppercase letters are reserved for general use by asm_fprintf
3518 and so are not available to target specific code. In order to
3519 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3520 they are defined here. As they get turned into real extensions
3521 to asm_fprintf they should be removed from this list. */
3522 case 'A': case 'B': case 'C': case 'D': case 'E':
3523 case 'F': case 'G': case 'H': case 'J': case 'K':
3524 case 'M': case 'N': case 'P': case 'Q': case 'S':
3525 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3528 ASM_FPRINTF_EXTENSIONS (file
, argptr
, p
)
3541 /* Split up a CONST_DOUBLE or integer constant rtx
3542 into two rtx's for single words,
3543 storing in *FIRST the word that comes first in memory in the target
3544 and in *SECOND the other. */
3547 split_double (rtx value
, rtx
*first
, rtx
*second
)
3549 if (GET_CODE (value
) == CONST_INT
)
3551 if (HOST_BITS_PER_WIDE_INT
>= (2 * BITS_PER_WORD
))
3553 /* In this case the CONST_INT holds both target words.
3554 Extract the bits from it into two word-sized pieces.
3555 Sign extend each half to HOST_WIDE_INT. */
3556 unsigned HOST_WIDE_INT low
, high
;
3557 unsigned HOST_WIDE_INT mask
, sign_bit
, sign_extend
;
3559 /* Set sign_bit to the most significant bit of a word. */
3561 sign_bit
<<= BITS_PER_WORD
- 1;
3563 /* Set mask so that all bits of the word are set. We could
3564 have used 1 << BITS_PER_WORD instead of basing the
3565 calculation on sign_bit. However, on machines where
3566 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3567 compiler warning, even though the code would never be
3569 mask
= sign_bit
<< 1;
3572 /* Set sign_extend as any remaining bits. */
3573 sign_extend
= ~mask
;
3575 /* Pick the lower word and sign-extend it. */
3576 low
= INTVAL (value
);
3581 /* Pick the higher word, shifted to the least significant
3582 bits, and sign-extend it. */
3583 high
= INTVAL (value
);
3584 high
>>= BITS_PER_WORD
- 1;
3587 if (high
& sign_bit
)
3588 high
|= sign_extend
;
3590 /* Store the words in the target machine order. */
3591 if (WORDS_BIG_ENDIAN
)
3593 *first
= GEN_INT (high
);
3594 *second
= GEN_INT (low
);
3598 *first
= GEN_INT (low
);
3599 *second
= GEN_INT (high
);
3604 /* The rule for using CONST_INT for a wider mode
3605 is that we regard the value as signed.
3606 So sign-extend it. */
3607 rtx high
= (INTVAL (value
) < 0 ? constm1_rtx
: const0_rtx
);
3608 if (WORDS_BIG_ENDIAN
)
3620 else if (GET_CODE (value
) != CONST_DOUBLE
)
3622 if (WORDS_BIG_ENDIAN
)
3624 *first
= const0_rtx
;
3630 *second
= const0_rtx
;
3633 else if (GET_MODE (value
) == VOIDmode
3634 /* This is the old way we did CONST_DOUBLE integers. */
3635 || GET_MODE_CLASS (GET_MODE (value
)) == MODE_INT
)
3637 /* In an integer, the words are defined as most and least significant.
3638 So order them by the target's convention. */
3639 if (WORDS_BIG_ENDIAN
)
3641 *first
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3642 *second
= GEN_INT (CONST_DOUBLE_LOW (value
));
3646 *first
= GEN_INT (CONST_DOUBLE_LOW (value
));
3647 *second
= GEN_INT (CONST_DOUBLE_HIGH (value
));
3654 REAL_VALUE_FROM_CONST_DOUBLE (r
, value
);
3656 /* Note, this converts the REAL_VALUE_TYPE to the target's
3657 format, splits up the floating point double and outputs
3658 exactly 32 bits of it into each of l[0] and l[1] --
3659 not necessarily BITS_PER_WORD bits. */
3660 REAL_VALUE_TO_TARGET_DOUBLE (r
, l
);
3662 /* If 32 bits is an entire word for the target, but not for the host,
3663 then sign-extend on the host so that the number will look the same
3664 way on the host that it would on the target. See for instance
3665 simplify_unary_operation. The #if is needed to avoid compiler
3668 #if HOST_BITS_PER_LONG > 32
3669 if (BITS_PER_WORD
< HOST_BITS_PER_LONG
&& BITS_PER_WORD
== 32)
3671 if (l
[0] & ((long) 1 << 31))
3672 l
[0] |= ((long) (-1) << 32);
3673 if (l
[1] & ((long) 1 << 31))
3674 l
[1] |= ((long) (-1) << 32);
3678 *first
= GEN_INT (l
[0]);
3679 *second
= GEN_INT (l
[1]);
3683 /* Return nonzero if this function has no function calls. */
3686 leaf_function_p (void)
3691 if (current_function_profile
|| profile_arc_flag
)
3694 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
3697 && ! SIBLING_CALL_P (insn
))
3699 if (NONJUMP_INSN_P (insn
)
3700 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3701 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3702 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3705 for (link
= current_function_epilogue_delay_list
;
3707 link
= XEXP (link
, 1))
3709 insn
= XEXP (link
, 0);
3712 && ! SIBLING_CALL_P (insn
))
3714 if (NONJUMP_INSN_P (insn
)
3715 && GET_CODE (PATTERN (insn
)) == SEQUENCE
3716 && CALL_P (XVECEXP (PATTERN (insn
), 0, 0))
3717 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn
), 0, 0)))
3724 /* Return 1 if branch is a forward branch.
3725 Uses insn_shuid array, so it works only in the final pass. May be used by
3726 output templates to customary add branch prediction hints.
3729 final_forward_branch_p (rtx insn
)
3731 int insn_id
, label_id
;
3733 gcc_assert (uid_shuid
);
3734 insn_id
= INSN_SHUID (insn
);
3735 label_id
= INSN_SHUID (JUMP_LABEL (insn
));
3736 /* We've hit some insns that does not have id information available. */
3737 gcc_assert (insn_id
&& label_id
);
3738 return insn_id
< label_id
;
3741 /* On some machines, a function with no call insns
3742 can run faster if it doesn't create its own register window.
3743 When output, the leaf function should use only the "output"
3744 registers. Ordinarily, the function would be compiled to use
3745 the "input" registers to find its arguments; it is a candidate
3746 for leaf treatment if it uses only the "input" registers.
3747 Leaf function treatment means renumbering so the function
3748 uses the "output" registers instead. */
3750 #ifdef LEAF_REGISTERS
3752 /* Return 1 if this function uses only the registers that can be
3753 safely renumbered. */
3756 only_leaf_regs_used (void)
3759 const char *const permitted_reg_in_leaf_functions
= LEAF_REGISTERS
;
3761 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
3762 if ((regs_ever_live
[i
] || global_regs
[i
])
3763 && ! permitted_reg_in_leaf_functions
[i
])
3766 if (current_function_uses_pic_offset_table
3767 && pic_offset_table_rtx
!= 0
3768 && REG_P (pic_offset_table_rtx
)
3769 && ! permitted_reg_in_leaf_functions
[REGNO (pic_offset_table_rtx
)])
3775 /* Scan all instructions and renumber all registers into those
3776 available in leaf functions. */
3779 leaf_renumber_regs (rtx first
)
3783 /* Renumber only the actual patterns.
3784 The reg-notes can contain frame pointer refs,
3785 and renumbering them could crash, and should not be needed. */
3786 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
3788 leaf_renumber_regs_insn (PATTERN (insn
));
3789 for (insn
= current_function_epilogue_delay_list
;
3791 insn
= XEXP (insn
, 1))
3792 if (INSN_P (XEXP (insn
, 0)))
3793 leaf_renumber_regs_insn (PATTERN (XEXP (insn
, 0)));
3796 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3797 available in leaf functions. */
3800 leaf_renumber_regs_insn (rtx in_rtx
)
3803 const char *format_ptr
;
3808 /* Renumber all input-registers into output-registers.
3809 renumbered_regs would be 1 for an output-register;
3816 /* Don't renumber the same reg twice. */
3820 newreg
= REGNO (in_rtx
);
3821 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3822 to reach here as part of a REG_NOTE. */
3823 if (newreg
>= FIRST_PSEUDO_REGISTER
)
3828 newreg
= LEAF_REG_REMAP (newreg
);
3829 gcc_assert (newreg
>= 0);
3830 regs_ever_live
[REGNO (in_rtx
)] = 0;
3831 regs_ever_live
[newreg
] = 1;
3832 REGNO (in_rtx
) = newreg
;
3836 if (INSN_P (in_rtx
))
3838 /* Inside a SEQUENCE, we find insns.
3839 Renumber just the patterns of these insns,
3840 just as we do for the top-level insns. */
3841 leaf_renumber_regs_insn (PATTERN (in_rtx
));
3845 format_ptr
= GET_RTX_FORMAT (GET_CODE (in_rtx
));
3847 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (in_rtx
)); i
++)
3848 switch (*format_ptr
++)
3851 leaf_renumber_regs_insn (XEXP (in_rtx
, i
));
3855 if (NULL
!= XVEC (in_rtx
, i
))
3857 for (j
= 0; j
< XVECLEN (in_rtx
, i
); j
++)
3858 leaf_renumber_regs_insn (XVECEXP (in_rtx
, i
, j
));
3878 /* When -gused is used, emit debug info for only used symbols. But in
3879 addition to the standard intercepted debug_hooks there are some direct
3880 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3881 Those routines may also be called from a higher level intercepted routine. So
3882 to prevent recording data for an inner call to one of these for an intercept,
3883 we maintain an intercept nesting counter (debug_nesting). We only save the
3884 intercepted arguments if the nesting is 1. */
3885 int debug_nesting
= 0;
3887 static tree
*symbol_queue
;
3888 int symbol_queue_index
= 0;
3889 static int symbol_queue_size
= 0;
3891 /* Generate the symbols for any queued up type symbols we encountered
3892 while generating the type info for some originally used symbol.
3893 This might generate additional entries in the queue. Only when
3894 the nesting depth goes to 0 is this routine called. */
3897 debug_flush_symbol_queue (void)
3901 /* Make sure that additionally queued items are not flushed
3906 for (i
= 0; i
< symbol_queue_index
; ++i
)
3908 /* If we pushed queued symbols then such symbols are must be
3909 output no matter what anyone else says. Specifically,
3910 we need to make sure dbxout_symbol() thinks the symbol was
3911 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3912 which may be set for outside reasons. */
3913 int saved_tree_used
= TREE_USED (symbol_queue
[i
]);
3914 int saved_suppress_debug
= TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]);
3915 TREE_USED (symbol_queue
[i
]) = 1;
3916 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = 0;
3918 #ifdef DBX_DEBUGGING_INFO
3919 dbxout_symbol (symbol_queue
[i
], 0);
3922 TREE_USED (symbol_queue
[i
]) = saved_tree_used
;
3923 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue
[i
]) = saved_suppress_debug
;
3926 symbol_queue_index
= 0;
3930 /* Queue a type symbol needed as part of the definition of a decl
3931 symbol. These symbols are generated when debug_flush_symbol_queue()
3935 debug_queue_symbol (tree decl
)
3937 if (symbol_queue_index
>= symbol_queue_size
)
3939 symbol_queue_size
+= 10;
3940 symbol_queue
= xrealloc (symbol_queue
,
3941 symbol_queue_size
* sizeof (tree
));
3944 symbol_queue
[symbol_queue_index
++] = decl
;
3947 /* Free symbol queue. */
3949 debug_free_queue (void)
3953 free (symbol_queue
);
3954 symbol_queue
= NULL
;
3955 symbol_queue_size
= 0;