1 ;; Predicate definitions for code generation on the EPIPHANY cpu.
2 ;; Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001, 2002, 2003,
3 ;; 2004, 2005, 2006, 2007, 2008, 2009, 2010, 2011
4 ;; Free Software Foundation, Inc.
5 ;; Contributed by Embecosm on behalf of Adapteva, Inc.
7 ;; This file is part of GCC.
9 ;; GCC is free software; you can redistribute it and/or modify
10 ;; it under the terms of the GNU General Public License as published by
11 ;; the Free Software Foundation; either version 3, or (at your option)
14 ;; GCC is distributed in the hope that it will be useful,
15 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
16 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
17 ;; GNU General Public License for more details.
19 ;; You should have received a copy of the GNU General Public License
20 ;; along with GCC; see the file COPYING3. If not see
21 ;; <http://www.gnu.org/licenses/>.
23 ;; Returns true iff OP is a symbol reference that is a valid operand
24 ;; in a jump or call instruction.
26 (define_predicate "symbolic_operand"
27 (match_code "symbol_ref,label_ref,const")
29 if (GET_CODE (op) == SYMBOL_REF)
30 return (!epiphany_is_long_call_p (op)
31 && (!flag_pic || SYMBOL_REF_LOCAL_P (op)));
32 if (GET_CODE (op) == LABEL_REF)
34 if (GET_CODE (op) == CONST)
37 if (GET_CODE (op) != PLUS || !symbolic_operand (XEXP (op, 0), mode))
39 /* The idea here is that a 'small' constant offset should be OK.
40 What exactly is considered 'small' is a bit arbitrary. */
41 return satisfies_constraint_L (XEXP (op, 1));
46 ;; Acceptable arguments to the call insn.
48 (define_predicate "call_address_operand"
49 (ior (match_code "reg")
50 (match_operand 0 "symbolic_operand")))
52 (define_predicate "call_operand"
56 return call_address_operand (op, mode);
59 ;; general purpose register.
60 (define_predicate "gpr_operand"
61 (match_code "reg,subreg")
65 if (!register_operand (op, mode))
67 if (GET_CODE (op) == SUBREG)
70 return regno >= FIRST_PSEUDO_REGISTER || regno <= 63;
73 (define_special_predicate "any_gpr_operand"
74 (match_code "subreg,reg")
76 return gpr_operand (op, mode);
79 ;; register suitable for integer add / sub operations; besides general purpose
80 ;; registers we allow fake hard registers that are eliminated to a real
81 ;; hard register via an offset.
82 (define_predicate "add_reg_operand"
83 (match_code "reg,subreg")
87 if (!register_operand (op, mode))
89 if (GET_CODE (op) == SUBREG)
92 return (regno >= FIRST_PSEUDO_REGISTER || regno <= 63
93 || regno == FRAME_POINTER_REGNUM
94 || regno == ARG_POINTER_REGNUM);
97 ;; Also allows suitable constants
98 (define_predicate "add_operand"
99 (match_code "reg,subreg,const_int,symbol_ref,label_ref,const")
101 if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
102 return add_reg_operand (op, mode);
103 return satisfies_constraint_L (op);
106 ;; Ordinary 3rd operand for arithmetic operations
107 (define_predicate "arith_operand"
108 (match_code "reg,subreg,const_int,symbol_ref,label_ref,const")
110 if (GET_CODE (op) == REG || GET_CODE (op) == SUBREG)
111 return register_operand (op, mode);
112 return satisfies_constraint_L (op);
115 ;; Constant integer 3rd operand for arithmetic operations
116 (define_predicate "arith_int_operand"
117 (match_code "const_int,symbol_ref,label_ref,const")
119 return satisfies_constraint_L (op);
122 ;; Return true if OP is an acceptable argument for a single word move source.
124 (define_predicate "move_src_operand"
126 "symbol_ref,label_ref,const,const_int,const_double,reg,subreg,mem,unspec")
128 switch (GET_CODE (op))
135 return immediate_operand (op, mode);
137 /* SImode constants should always fit into a CONST_INT. Large
138 unsigned 32-bit constants are represented as negative CONST_INTs. */
139 gcc_assert (GET_MODE (op) != SImode);
140 /* We can handle 32-bit floating point constants. */
142 return GET_MODE (op) == SFmode;
145 return op != frame_pointer_rtx && register_operand (op, mode);
147 /* (subreg (mem ...) ...) can occur here if the inner part was once a
148 pseudo-reg and is now a stack slot. */
149 if (GET_CODE (SUBREG_REG (op)) == MEM)
150 return address_operand (XEXP (SUBREG_REG (op), 0), mode);
152 return register_operand (op, mode);
154 return address_operand (XEXP (op, 0), mode);
156 return satisfies_constraint_Sra (op);
162 ;; Return true if OP is an acceptable argument for a double word move source.
164 (define_predicate "move_double_src_operand"
165 (match_code "reg,subreg,mem,const_int,const_double,const_vector")
167 return general_operand (op, mode);
170 ;; Return true if OP is an acceptable argument for a move destination.
172 (define_predicate "move_dest_operand"
173 (match_code "reg,subreg,mem")
175 switch (GET_CODE (op))
178 return register_operand (op, mode);
180 /* (subreg (mem ...) ...) can occur here if the inner part was once a
181 pseudo-reg and is now a stack slot. */
182 if (GET_CODE (SUBREG_REG (op)) == MEM)
184 return address_operand (XEXP (SUBREG_REG (op), 0), mode);
188 return register_operand (op, mode);
191 return address_operand (XEXP (op, 0), mode);
197 (define_special_predicate "stacktop_operand"
200 if (mode != VOIDmode && GET_MODE (op) != mode)
202 return rtx_equal_p (XEXP (op, 0), stack_pointer_rtx);
205 ;; Return 1 if OP is a comparison operator valid for the mode of CC.
206 ;; This allows the use of MATCH_OPERATOR to recognize all the branch insns.
208 ;; Some insns only set a few bits in the condition code. So only allow those
209 ;; comparisons that use the bits that are valid.
211 (define_predicate "proper_comparison_operator"
212 (match_code "eq, ne, le, lt, ge, gt, leu, ltu, geu, gtu, unordered, ordered, uneq, unge, ungt, unle, unlt, ltgt")
214 enum rtx_code code = GET_CODE (op);
215 rtx cc = XEXP (op, 0);
217 /* combine can try strange things. */
220 switch (GET_MODE (cc))
225 return REGNO (cc) == CC_REGNUM && (code == EQ || code == NE);
227 return REGNO (cc) == CC_REGNUM && (code == LTU || code == GEU);
229 return REGNO (cc) == CC_REGNUM && (code == GTU || code == LEU);
231 return (REGNO (cc) == CCFP_REGNUM
232 && (code == EQ || code == NE || code == LT || code == LE));
234 return (REGNO (cc) == CC_REGNUM
235 && (code == EQ || code == NE || code == GT || code == GE
236 || code == UNLE || code == UNLT));
238 return REGNO (cc) == CC_REGNUM && (code == ORDERED || code == UNORDERED);
240 return REGNO (cc) == CC_REGNUM && (code == UNEQ || code == LTGT);
242 return REGNO (cc) == CC_REGNUM;
244 case QImode: case SImode: case SFmode: case HImode:
245 /* From cse.c:dead_libcall_p. */
253 (define_predicate "cc_operand"
254 (and (match_code "reg")
255 (match_test "REGNO (op) == CC_REGNUM || REGNO (op) == CCFP_REGNUM")))
257 (define_predicate "const0_operand"
258 (match_code "const_int, const_double")
260 if (mode == VOIDmode)
261 mode = GET_MODE (op);
262 return op == CONST0_RTX (mode);
265 (define_predicate "const_float_1_operand"
266 (match_code "const_double")
268 return op == CONST1_RTX (mode);
271 (define_predicate "cc_move_operand"
272 (and (match_code "reg")
273 (ior (match_test "REGNO (op) == CC_REGNUM")
274 (match_test "gpr_operand (op, mode)"))))
276 (define_predicate "float_operation"
277 (match_code "parallel")
279 /* Most patterns start out with one SET and one CLOBBER, and gain a USE
280 or two of FP_NEAREST_REGNUM / FP_TRUNCATE_REGNUM / FP_ANYFP_REGNUM
281 after mode switching. The longer patterns are
282 all beyond length 4, and before mode switching, end with a
283 CLOBBER of CCFP_REGNUM. */
284 int count = XVECLEN (op, 0);
285 bool inserted = MACHINE_FUNCTION (cfun)->control_use_inserted;
291 /* combine / recog will pass any old garbage here before checking the
298 for (i = 4; i < count; i++)
300 rtx x = XVECEXP (op, 0, i);
302 if (GET_CODE (x) == CLOBBER)
304 if (!REG_P (XEXP (x, 0)))
306 if (REGNO (XEXP (x, 0)) == CCFP_REGNUM)
312 /* Just an ordinary clobber, keep looking. */
314 else if (GET_CODE (x) == USE
315 || (GET_CODE (x) == SET && i == 2))
320 if (count != i + 3 || !inserted)
322 for (i = i+1; i < count; i++)
324 rtx x = XVECEXP (op, 0, i);
326 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
330 || (REGNO (x) != FP_NEAREST_REGNUM
331 && REGNO (x) != FP_TRUNCATE_REGNUM
332 && REGNO (x) != FP_ANYFP_REGNUM))
338 (define_predicate "set_fp_mode_operand"
339 (ior (match_test "gpr_operand (op, mode)")
340 (and (match_code "const")
341 (match_test "satisfies_constraint_Cfm (op)"))))
343 (define_predicate "post_modify_address"
344 (match_code "post_modify,post_inc,post_dec"))
346 (define_predicate "post_modify_operand"
347 (and (match_code "mem")
348 (match_test "post_modify_address (XEXP (op, 0), Pmode)")))
350 (define_predicate "nonsymbolic_immediate_operand"
351 (ior (match_test "immediate_operand (op, mode)")
352 (match_code "const_vector"))) /* Is this specific enough? */