| blob | 0f18ff07a6ee590d571a9e90dd645df703f2907c |
1 /* Definitions of target machine for GNU compiler, for the HP Spectrum.
2 Copyright (C) 1992, 1993, 1994, 1995, 1996, 1997, 1998, 1999, 2000,
3 2001, 2002 Free Software Foundation, Inc.
4 Contributed by Michael Tiemann (tiemann@cygnus.com) of Cygnus Support
5 and Tim Moore (moore@defmacro.cs.utah.edu) of the Center for
6 Software Science at the University of Utah.
8 This file is part of GNU CC.
10 GNU CC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 2, or (at your option)
13 any later version.
15 GNU CC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
20 You should have received a copy of the GNU General Public License
21 along with GNU CC; see the file COPYING. If not, write to
22 the Free Software Foundation, 59 Temple Place - Suite 330,
23 Boston, MA 02111-1307, USA. */
26 {
30 CMP_MAX /* max comparison type */
31 };
33 /* For long call handling. */
36 /* Which processor to schedule for. */
38 enum processor_type
39 {
40 PROCESSOR_700,
41 PROCESSOR_7100,
42 PROCESSOR_7100LC,
43 PROCESSOR_7200,
44 PROCESSOR_7300,
45 PROCESSOR_8000
46 };
48 /* For -mschedule= option. */
52 #define pa_cpu_attr ((enum attr_cpu)pa_cpu)
54 /* Which architecture to generate code for. */
56 enum architecture_type
57 {
58 ARCHITECTURE_10,
59 ARCHITECTURE_11,
60 ARCHITECTURE_20
61 };
65 /* For -march= option. */
69 /* Print subsidiary information on the compiler version in use. */
73 /* Run-time compilation parameters selecting different hardware subsets. */
77 /* compile code for HP-PA 1.1 ("Snake"). */
79 #define MASK_PA_11 1
81 /* Disable all FP registers (they all become fixed). This may be necessary
82 for compiling kernels which perform lazy context switching of FP regs.
83 Note if you use this option and try to perform floating point operations
84 the compiler will abort! */
86 #define MASK_DISABLE_FPREGS 2
87 #define TARGET_DISABLE_FPREGS (target_flags & MASK_DISABLE_FPREGS)
89 /* Generate code which assumes that all space register are equivalent.
90 Triggers aggressive unscaled index addressing and faster
91 builtin_return_address. */
92 #define MASK_NO_SPACE_REGS 4
93 #define TARGET_NO_SPACE_REGS (target_flags & MASK_NO_SPACE_REGS)
95 /* Allow unconditional jumps in the delay slots of call instructions. */
96 #define MASK_JUMP_IN_DELAY 8
97 #define TARGET_JUMP_IN_DELAY (target_flags & MASK_JUMP_IN_DELAY)
99 /* Disable indexed addressing modes. */
100 #define MASK_DISABLE_INDEXING 32
101 #define TARGET_DISABLE_INDEXING (target_flags & MASK_DISABLE_INDEXING)
103 /* Emit code which follows the new portable runtime calling conventions
104 HP wants everyone to use for ELF objects. If at all possible you want
105 to avoid this since it's a performance loss for non-prototyped code.
107 Note TARGET_PORTABLE_RUNTIME also forces all calls to use inline
108 long-call stubs which is quite expensive. */
109 #define MASK_PORTABLE_RUNTIME 64
110 #define TARGET_PORTABLE_RUNTIME (target_flags & MASK_PORTABLE_RUNTIME)
112 /* Emit directives only understood by GAS. This allows parameter
113 relocations to work for static functions. There is no way
114 to make them work the HP assembler at this time. */
115 #define MASK_GAS 128
116 #define TARGET_GAS (target_flags & MASK_GAS)
118 /* Emit code for processors which do not have an FPU. */
119 #define MASK_SOFT_FLOAT 256
120 #define TARGET_SOFT_FLOAT (target_flags & MASK_SOFT_FLOAT)
122 /* Use 3-insn load/store sequences for access to large data segments
123 in shared libraries on hpux10. */
124 #define MASK_LONG_LOAD_STORE 512
125 #define TARGET_LONG_LOAD_STORE (target_flags & MASK_LONG_LOAD_STORE)
127 /* Use a faster sequence for indirect calls. This assumes that calls
128 through function pointers will never cross a space boundary, and
129 that the executable is not dynamically linked. Such assumptions
130 are generally safe for building kernels and statically linked
131 executables. Code compiled with this option will fail miserably if
132 the executable is dynamically linked or uses nested functions! */
133 #define MASK_FAST_INDIRECT_CALLS 1024
134 #define TARGET_FAST_INDIRECT_CALLS (target_flags & MASK_FAST_INDIRECT_CALLS)
136 /* Generate code with big switch statements to avoid out of range branches
137 occurring within the switch table. */
138 #define MASK_BIG_SWITCH 2048
139 #define TARGET_BIG_SWITCH (target_flags & MASK_BIG_SWITCH)
141 /* Generate code for the HPPA 2.0 architecture. TARGET_PA_11 should also be
142 true when this is true. */
143 #define MASK_PA_20 4096
145 /* Generate cpp defines for server I/O. */
146 #define MASK_SIO 8192
147 #define TARGET_SIO (target_flags & MASK_SIO)
149 #ifndef TARGET_PA_10
150 #define TARGET_PA_10 (target_flags & (MASK_PA_11 | MASK_PA_20) == 0)
151 #endif
153 #ifndef TARGET_PA_11
154 #define TARGET_PA_11 (target_flags & MASK_PA_11)
155 #endif
157 #ifndef TARGET_PA_20
158 #define TARGET_PA_20 (target_flags & MASK_PA_20)
159 #endif
161 /* Generate code for the HPPA 2.0 architecture in 64bit mode. */
162 #ifndef TARGET_64BIT
163 #define TARGET_64BIT 0
164 #endif
166 /* Generate code for ELF32 ABI. */
167 #ifndef TARGET_ELF32
168 #define TARGET_ELF32 0
169 #endif
171 /* Generate code for SOM 32bit ABI. */
172 #ifndef TARGET_SOM
173 #define TARGET_SOM 0
174 #endif
176 /* Macro to define tables used to set the flags. This is a
177 list in braces of target switches with each switch being
178 { "NAME", VALUE, "HELP_STRING" }. VALUE is the bits to set,
179 or minus the bits to clear. An empty string NAME is used to
180 identify the default VALUE. Do not mark empty strings for
181 translation. */
183 #define TARGET_SWITCHES \
236 SUBTARGET_SWITCHES \
238 NULL }}
240 #ifndef TARGET_DEFAULT
241 #define TARGET_DEFAULT (MASK_GAS | MASK_JUMP_IN_DELAY)
242 #endif
244 #ifndef TARGET_CPU_DEFAULT
245 #define TARGET_CPU_DEFAULT 0
246 #endif
248 #ifndef SUBTARGET_SWITCHES
249 #define SUBTARGET_SWITCHES
250 #endif
252 #ifndef TARGET_SCHED_DEFAULT
254 #endif
256 #define TARGET_OPTIONS \
257 { \
261 N_("Specify architecture for code generation. Values are 1.0, 1.1, and 2.0. 2.0 requires gas snapshot 19990413 or later.") }\
262 }
264 /* Specify the dialect of assembler to use. New mnemonics is dialect one
265 and the old mnemonics are dialect zero. */
266 #define ASSEMBLER_DIALECT (TARGET_PA_20 ? 1 : 0)
268 #define OVERRIDE_OPTIONS override_options ()
270 /* stabs-in-som is nearly identical to stabs-in-elf. To avoid useless
271 code duplication we simply include this file and override as needed. */
274 /* We do not have to be compatible with dbx, so we enable gdb extensions
275 by default. */
276 #define DEFAULT_GDB_EXTENSIONS 1
278 /* This used to be zero (no max length), but big enums and such can
279 cause huge strings which killed gas.
281 We also have to avoid lossage in dbxout.c -- it does not compute the
282 string size accurately, so we are real conservative here. */
283 #undef DBX_CONTIN_LENGTH
284 #define DBX_CONTIN_LENGTH 3000
286 /* Only labels should ever begin in column zero. */
290 /* GDB always assumes the current function's frame begins at the value
291 of the stack pointer upon entry to the current function. Accessing
292 local variables and parameters passed on the stack is done using the
293 base of the frame + an offset provided by GCC.
295 For functions which have frame pointers this method works fine;
296 the (frame pointer) == (stack pointer at function entry) and GCC provides
297 an offset relative to the frame pointer.
299 This loses for functions without a frame pointer; GCC provides an offset
300 which is relative to the stack pointer after adjusting for the function's
301 frame size. GDB would prefer the offset to be relative to the value of
302 the stack pointer at the function's entry. Yuk! */
303 #define DEBUGGER_AUTO_OFFSET(X) \
304 ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
305 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
307 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
308 ((GET_CODE (X) == PLUS ? OFFSET : 0) \
309 + (frame_pointer_needed ? 0 : compute_frame_size (get_frame_size (), 0)))
311 #define TARGET_CPU_CPP_BUILTINS() \
312 do { \
317 if (TARGET_64BIT) \
318 { \
321 } \
322 if (TARGET_PA_20) \
324 else if (TARGET_PA_11) \
326 else \
328 } while (0)
330 /* An old set of OS defines for various BSD-like systems. */
331 #define TARGET_OS_CPP_BUILTINS() \
332 do \
333 { \
338 if (c_language != clk_cplusplus \
339 && !flag_iso) \
345 } \
346 while (0)
352 /* We don't want -lg. */
353 #ifndef LIB_SPEC
355 #endif
357 /* This macro defines command-line switches that modify the default
358 target name.
360 The definition is be an initializer for an array of structures. Each
361 array element has have three elements: the switch name, one of the
362 enumeration codes ADD or DELETE to indicate whether the string should be
363 inserted or deleted, and the string to be inserted or deleted. */
366 /* Make gcc agree with <machine/ansi.h> */
371 #define WCHAR_TYPE_SIZE 32
373 /* Show we can debug even without a frame pointer. */
374 #define CAN_DEBUG_WITHOUT_FP
376 /* Machine dependent reorg pass. */
377 #define MACHINE_DEPENDENT_REORG(X) pa_reorg(X)
379 \f
380 /* target machine storage layout */
382 /* Define this macro if it is advisable to hold scalars in registers
383 in a wider mode than that declared by the program. In such cases,
384 the value is constrained to be within the bounds of the declared
385 type, but kept valid in the wider mode. The signedness of the
386 extension may differ from that of the type. */
388 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
389 if (GET_MODE_CLASS (MODE) == MODE_INT \
390 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
391 (MODE) = word_mode;
393 /* Define this if most significant bit is lowest numbered
394 in instructions that operate on numbered bit-fields. */
395 #define BITS_BIG_ENDIAN 1
397 /* Define this if most significant byte of a word is the lowest numbered. */
398 /* That is true on the HP-PA. */
399 #define BYTES_BIG_ENDIAN 1
401 /* Define this if most significant word of a multiword number is lowest
402 numbered. */
403 #define WORDS_BIG_ENDIAN 1
405 #define MAX_BITS_PER_WORD 64
406 #define MAX_LONG_TYPE_SIZE 32
408 /* Width of a word, in units (bytes). */
409 #define UNITS_PER_WORD (TARGET_64BIT ? 8 : 4)
410 #define MIN_UNITS_PER_WORD 4
412 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
413 #define PARM_BOUNDARY BITS_PER_WORD
415 /* Largest alignment required for any stack parameter, in bits.
416 Don't define this if it is equal to PARM_BOUNDARY */
417 #define MAX_PARM_BOUNDARY (2 * PARM_BOUNDARY)
419 /* Boundary (in *bits*) on which stack pointer is always aligned;
420 certain optimizations in combine depend on this.
422 GCC for the PA always rounds its stacks to a 512bit boundary,
423 but that happens late in the compilation process. */
424 #define STACK_BOUNDARY (TARGET_64BIT ? 128 : 64)
426 #define PREFERRED_STACK_BOUNDARY 512
428 /* Allocation boundary (in *bits*) for the code of a function. */
429 #define FUNCTION_BOUNDARY (TARGET_64BIT ? 64 : 32)
431 /* Alignment of field after `int : 0' in a structure. */
432 #define EMPTY_FIELD_BOUNDARY 32
434 /* Every structure's size must be a multiple of this. */
435 #define STRUCTURE_SIZE_BOUNDARY 8
437 /* A bit-field declared as `int' forces `int' alignment for the struct. */
438 #define PCC_BITFIELD_TYPE_MATTERS 1
440 /* No data type wants to be aligned rounder than this. This is set
441 to 128 bits to allow for lock semaphores in the stack frame.*/
442 #define BIGGEST_ALIGNMENT 128
444 /* Get around hp-ux assembler bug, and make strcpy of constants fast. */
445 #define CONSTANT_ALIGNMENT(CODE, TYPEALIGN) \
446 ((TYPEALIGN) < 32 ? 32 : (TYPEALIGN))
448 /* Make arrays of chars word-aligned for the same reasons. */
449 #define DATA_ALIGNMENT(TYPE, ALIGN) \
450 (TREE_CODE (TYPE) == ARRAY_TYPE \
451 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
452 && (ALIGN) < BITS_PER_WORD ? BITS_PER_WORD : (ALIGN))
455 /* Set this nonzero if move instructions will actually fail to work
456 when given unaligned data. */
457 #define STRICT_ALIGNMENT 1
459 /* Generate calls to memcpy, memcmp and memset. */
460 #define TARGET_MEM_FUNCTIONS
462 /* Value is 1 if it is a good idea to tie two pseudo registers
463 when one has mode MODE1 and one has mode MODE2.
464 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
465 for any hard reg, then this must be 0 for correct output. */
466 #define MODES_TIEABLE_P(MODE1, MODE2) \
467 (GET_MODE_CLASS (MODE1) == GET_MODE_CLASS (MODE2))
469 /* Specify the registers used for certain standard purposes.
470 The values of these macros are register numbers. */
472 /* The HP-PA pc isn't overloaded on a register that the compiler knows about. */
473 /* #define PC_REGNUM */
475 /* Register to use for pushing function arguments. */
476 #define STACK_POINTER_REGNUM 30
478 /* Base register for access to local variables of the function. */
479 #define FRAME_POINTER_REGNUM 3
481 /* Value should be nonzero if functions must have frame pointers. */
482 #define FRAME_POINTER_REQUIRED \
483 (current_function_calls_alloca)
485 /* C statement to store the difference between the frame pointer
486 and the stack pointer values immediately after the function prologue.
488 Note, we always pretend that this is a leaf function because if
489 it's not, there's no point in trying to eliminate the
490 frame pointer. If it is a leaf function, we guessed right! */
491 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
492 do {(VAR) = - compute_frame_size (get_frame_size (), 0);} while (0)
494 /* Base register for access to arguments of the function. */
495 #define ARG_POINTER_REGNUM 3
497 /* Register in which static-chain is passed to a function. */
498 #define STATIC_CHAIN_REGNUM 29
500 /* Register which holds offset table for position-independent
501 data references. */
503 #define PIC_OFFSET_TABLE_REGNUM (TARGET_64BIT ? 27 : 19)
504 #define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED 1
506 /* Function to return the rtx used to save the pic offset table register
507 across function calls. */
510 #define DEFAULT_PCC_STRUCT_RETURN 0
512 /* SOM ABI says that objects larger than 64 bits are returned in memory.
513 PA64 ABI says that objects larger than 128 bits are returned in memory.
514 Note, int_size_in_bytes can return -1 if the size of the object is
515 variable or larger than the maximum value that can be expressed as
516 a HOST_WIDE_INT. It can also return zero for an empty type. The
517 simplest way to handle variable and empty types is to pass them in
518 memory. This avoids problems in defining the boundaries of argument
519 slots, allocating registers, etc. */
520 #define RETURN_IN_MEMORY(TYPE) \
521 (int_size_in_bytes (TYPE) > (TARGET_64BIT ? 16 : 8) \
522 || int_size_in_bytes (TYPE) <= 0)
524 /* Register in which address to store a structure value
525 is passed to a function. */
526 #define STRUCT_VALUE_REGNUM 28
528 /* Describe how we implement __builtin_eh_return. */
529 #define EH_RETURN_DATA_REGNO(N) \
530 ((N) < 3 ? (N) + 20 : (N) == 3 ? 31 : INVALID_REGNUM)
531 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 29)
532 #define EH_RETURN_HANDLER_RTX \
533 gen_rtx_MEM (word_mode, \
534 gen_rtx_PLUS (word_mode, frame_pointer_rtx, \
535 TARGET_64BIT ? GEN_INT (-16) : GEN_INT (-20)))
538 /* Offset from the argument pointer register value to the top of
539 stack. This is different from FIRST_PARM_OFFSET because of the
540 frame marker. */
541 #define ARG_POINTER_CFA_OFFSET(FNDECL) 0
542 \f
543 /* The letters I, J, K, L and M in a register constraint string
544 can be used to stand for particular ranges of immediate operands.
545 This macro defines what the ranges are.
546 C is the letter, and VALUE is a constant value.
547 Return 1 if VALUE is in the range specified by C.
549 `I' is used for the 11 bit constants.
550 `J' is used for the 14 bit constants.
551 `K' is used for values that can be moved with a zdepi insn.
552 `L' is used for the 5 bit constants.
553 `M' is used for 0.
554 `N' is used for values with the least significant 11 bits equal to zero
555 and when sign extended from 32 to 64 bits the
556 value does not change.
557 `O' is used for numbers n such that n+1 is a power of 2.
558 */
560 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
567 || (((VALUE) & (((HOST_WIDE_INT) -1 << 31) | 0x7ff)) \
568 == (HOST_WIDE_INT) -1 << 31)) \
571 : 0)
573 /* Similar, but for floating or large integer constants, and defining letters
574 G and H. Here VALUE is the CONST_DOUBLE rtx itself.
576 For PA, `G' is the floating-point constant zero. `H' is undefined. */
578 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
580 && (VALUE) == CONST0_RTX (GET_MODE (VALUE))) \
581 : 0)
583 /* The class value for index registers, and the one for base regs. */
584 #define INDEX_REG_CLASS GENERAL_REGS
585 #define BASE_REG_CLASS GENERAL_REGS
587 #define FP_REG_CLASS_P(CLASS) \
588 ((CLASS) == FP_REGS || (CLASS) == FPUPPER_REGS)
590 /* True if register is floating-point. */
591 #define FP_REGNO_P(N) ((N) >= FP_REG_FIRST && (N) <= FP_REG_LAST)
593 /* Given an rtx X being reloaded into a reg required to be
594 in class CLASS, return the class of reg to actually use.
595 In general this is just CLASS; but on some machines
596 in some cases it is preferable to use a more restrictive class. */
597 #define PREFERRED_RELOAD_CLASS(X,CLASS) (CLASS)
599 /* Return the register class of a scratch register needed to copy IN into
600 or out of a register in CLASS in MODE. If it can be done directly
601 NO_REGS is returned.
603 Avoid doing any work for the common case calls. */
605 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
606 ((CLASS == BASE_REG_CLASS && GET_CODE (IN) == REG \
607 && REGNO (IN) < FIRST_PSEUDO_REGISTER) \
608 ? NO_REGS : secondary_reload_class (CLASS, MODE, IN))
610 /* On the PA it is not possible to directly move data between
611 GENERAL_REGS and FP_REGS. */
612 #define SECONDARY_MEMORY_NEEDED(CLASS1, CLASS2, MODE) \
613 (FP_REG_CLASS_P (CLASS1) != FP_REG_CLASS_P (CLASS2))
615 /* Return the stack location to use for secondary memory needed reloads. */
616 #define SECONDARY_MEMORY_NEEDED_RTX(MODE) \
617 gen_rtx_MEM (MODE, gen_rtx_PLUS (Pmode, stack_pointer_rtx, GEN_INT (-16)))
619 \f
620 /* Stack layout; function entry, exit and calling. */
622 /* Define this if pushing a word on the stack
623 makes the stack pointer a smaller address. */
624 /* #define STACK_GROWS_DOWNWARD */
626 /* Believe it or not. */
627 #define ARGS_GROW_DOWNWARD
629 /* Define this if the nominal address of the stack frame
630 is at the high-address end of the local variables;
631 that is, each additional local variable allocated
632 goes at a more negative offset in the frame. */
633 /* #define FRAME_GROWS_DOWNWARD */
635 /* Offset within stack frame to start allocating local variables at.
636 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
637 first local allocated. Otherwise, it is the offset to the BEGINNING
638 of the first local allocated. */
639 #define STARTING_FRAME_OFFSET 8
641 /* If we generate an insn to push BYTES bytes,
642 this says how many the stack pointer really advances by.
643 On the HP-PA, don't define this because there are no push insns. */
644 /* #define PUSH_ROUNDING(BYTES) */
646 /* Offset of first parameter from the argument pointer register value.
647 This value will be negated because the arguments grow down.
648 Also note that on STACK_GROWS_UPWARD machines (such as this one)
649 this is the distance from the frame pointer to the end of the first
650 argument, not it's beginning. To get the real offset of the first
651 argument, the size of the argument must be added. */
653 #define FIRST_PARM_OFFSET(FNDECL) (TARGET_64BIT ? -64 : -32)
655 /* When a parameter is passed in a register, stack space is still
656 allocated for it. */
657 #define REG_PARM_STACK_SPACE(DECL) (TARGET_64BIT ? 64 : 16)
659 /* Define this if the above stack space is to be considered part of the
660 space allocated by the caller. */
661 #define OUTGOING_REG_PARM_STACK_SPACE
663 /* Keep the stack pointer constant throughout the function.
664 This is both an optimization and a necessity: longjmp
665 doesn't behave itself when the stack pointer moves within
666 the function! */
667 #define ACCUMULATE_OUTGOING_ARGS 1
669 /* The weird HPPA calling conventions require a minimum of 48 bytes on
670 the stack: 16 bytes for register saves, and 32 bytes for magic.
671 This is the difference between the logical top of stack and the
672 actual sp. */
673 #define STACK_POINTER_OFFSET \
674 (TARGET_64BIT ? -(current_function_outgoing_args_size + 16): -32)
676 #define STACK_DYNAMIC_OFFSET(FNDECL) \
677 (TARGET_64BIT \
678 ? (STACK_POINTER_OFFSET) \
679 : ((STACK_POINTER_OFFSET) - current_function_outgoing_args_size))
681 /* Value is 1 if returning from a function call automatically
682 pops the arguments described by the number-of-args field in the call.
683 FUNDECL is the declaration node of the function (as a tree),
684 FUNTYPE is the data type of the function (as a tree),
685 or for a library call it is an identifier node for the subroutine name. */
687 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
689 /* Define how to find the value returned by a function.
690 VALTYPE is the data type of the value (as a tree).
691 If the precise function being called is known, FUNC is its FUNCTION_DECL;
692 otherwise, FUNC is 0. */
694 /* On the HP-PA the value is found in register(s) 28(-29), unless
695 the mode is SF or DF. Then the value is returned in fr4 (32). */
697 /* This must perform the same promotions as PROMOTE_MODE, else
698 PROMOTE_FUNCTION_RETURN will not work correctly. */
699 #define FUNCTION_VALUE(VALTYPE, FUNC) \
700 gen_rtx_REG (((INTEGRAL_TYPE_P (VALTYPE) \
701 && TYPE_PRECISION (VALTYPE) < BITS_PER_WORD) \
702 || POINTER_TYPE_P (VALTYPE)) \
703 ? word_mode : TYPE_MODE (VALTYPE), \
704 (TREE_CODE (VALTYPE) == REAL_TYPE \
705 && TYPE_MODE (VALTYPE) != TFmode \
706 && !TARGET_SOFT_FLOAT) ? 32 : 28)
708 /* Define how to find the value returned by a library function
709 assuming the value has mode MODE. */
711 #define LIBCALL_VALUE(MODE) \
712 gen_rtx_REG (MODE, \
713 (! TARGET_SOFT_FLOAT \
714 && ((MODE) == SFmode || (MODE) == DFmode) ? 32 : 28))
716 /* 1 if N is a possible register number for a function value
717 as seen by the caller. */
719 #define FUNCTION_VALUE_REGNO_P(N) \
720 ((N) == 28 || (! TARGET_SOFT_FLOAT && (N) == 32))
722 \f
723 /* Define a data type for recording info about an argument list
724 during the scan of that argument list. This data type should
725 hold all necessary information about the function itself
726 and about the args processed so far, enough to enable macros
727 such as FUNCTION_ARG to determine where the next arg should go.
729 On the HP-PA, this is a single integer, which is a number of words
730 of arguments scanned so far (including the invisible argument,
731 if any, which holds the structure-value-address).
732 Thus 4 or more means all following args should go on the stack. */
736 #define CUMULATIVE_ARGS struct hppa_args
738 /* Initialize a variable CUM of type CUMULATIVE_ARGS
739 for a call to a function whose data type is FNTYPE.
740 For a library call, FNTYPE is 0. */
742 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
743 (CUM).words = 0, \
744 (CUM).indirect = INDIRECT, \
745 (CUM).nargs_prototype = (FNTYPE && TYPE_ARG_TYPES (FNTYPE) \
746 ? (list_length (TYPE_ARG_TYPES (FNTYPE)) - 1 \
747 + (TYPE_MODE (TREE_TYPE (FNTYPE)) == BLKmode \
748 || RETURN_IN_MEMORY (TREE_TYPE (FNTYPE)))) \
749 : 0)
753 /* Similar, but when scanning the definition of a procedure. We always
754 set NARGS_PROTOTYPE large so we never return a PARALLEL. */
756 #define INIT_CUMULATIVE_INCOMING_ARGS(CUM,FNTYPE,IGNORE) \
757 (CUM).words = 0, \
758 (CUM).indirect = 0, \
759 (CUM).nargs_prototype = 1000
761 /* Figure out the size in words of the function argument. The size
762 returned by this macro should always be greater than zero because
763 we pass variable and zero sized objects by reference. */
765 #define FUNCTION_ARG_SIZE(MODE, TYPE) \
766 ((((MODE) != BLKmode \
767 ? (HOST_WIDE_INT) GET_MODE_SIZE (MODE) \
768 : int_size_in_bytes (TYPE)) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
770 /* Update the data in CUM to advance over an argument
771 of mode MODE and data type TYPE.
772 (TYPE is null for libcalls where that information may not be available.) */
774 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
775 { (CUM).nargs_prototype--; \
776 (CUM).words += FUNCTION_ARG_SIZE(MODE, TYPE) \
777 + (((CUM).words & 01) && (TYPE) != 0 \
778 && FUNCTION_ARG_SIZE(MODE, TYPE) > 1); \
779 }
781 /* Determine where to put an argument to a function.
782 Value is zero to push the argument on the stack,
783 or a hard register in which to store the argument.
785 MODE is the argument's machine mode.
786 TYPE is the data type of the argument (as a tree).
787 This is null for libcalls where that information may
788 not be available.
789 CUM is a variable of type CUMULATIVE_ARGS which gives info about
790 the preceding args and about the function being called.
791 NAMED is nonzero if this argument is a named parameter
792 (otherwise it is an extra parameter matching an ellipsis).
794 On the HP-PA the first four words of args are normally in registers
795 and the rest are pushed. But any arg that won't entirely fit in regs
796 is pushed.
798 Arguments passed in registers are either 1 or 2 words long.
800 The caller must make a distinction between calls to explicitly named
801 functions and calls through pointers to functions -- the conventions
802 are different! Calls through pointers to functions only use general
803 registers for the first four argument words.
805 Of course all this is different for the portable runtime model
806 HP wants everyone to use for ELF. Ugh. Here's a quick description
807 of how it's supposed to work.
809 1) callee side remains unchanged. It expects integer args to be
810 in the integer registers, float args in the float registers and
811 unnamed args in integer registers.
813 2) caller side now depends on if the function being called has
814 a prototype in scope (rather than if it's being called indirectly).
816 2a) If there is a prototype in scope, then arguments are passed
817 according to their type (ints in integer registers, floats in float
818 registers, unnamed args in integer registers.
820 2b) If there is no prototype in scope, then floating point arguments
821 are passed in both integer and float registers. egad.
823 FYI: The portable parameter passing conventions are almost exactly like
824 the standard parameter passing conventions on the RS6000. That's why
825 you'll see lots of similar code in rs6000.h. */
827 #define FUNCTION_ARG_PADDING(MODE, TYPE) function_arg_padding ((MODE), (TYPE))
829 /* Do not expect to understand this without reading it several times. I'm
830 tempted to try and simply it, but I worry about breaking something. */
832 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
833 function_arg (&CUM, MODE, TYPE, NAMED, 0)
835 /* Nonzero if we do not know how to pass TYPE solely in registers. */
836 #define MUST_PASS_IN_STACK(MODE,TYPE) \
837 ((TYPE) != 0 \
838 && (TREE_CODE (TYPE_SIZE (TYPE)) != INTEGER_CST \
839 || TREE_ADDRESSABLE (TYPE)))
841 #define FUNCTION_INCOMING_ARG(CUM, MODE, TYPE, NAMED) \
842 function_arg (&CUM, MODE, TYPE, NAMED, 1)
844 /* For an arg passed partly in registers and partly in memory,
845 this is the number of registers used.
846 For args passed entirely in registers or entirely in memory, zero. */
848 /* For PA32 there are never split arguments. PA64, on the other hand, can
849 pass arguments partially in registers and partially in memory. */
850 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) \
851 (TARGET_64BIT ? function_arg_partial_nregs (&CUM, MODE, TYPE, NAMED) : 0)
853 /* If defined, a C expression that gives the alignment boundary, in
854 bits, of an argument with the specified mode and type. If it is
855 not defined, `PARM_BOUNDARY' is used for all arguments. */
857 /* Arguments larger than one word are double word aligned. */
859 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
860 (((TYPE) \
861 ? (integer_zerop (TYPE_SIZE (TYPE)) \
862 || !TREE_CONSTANT (TYPE_SIZE (TYPE)) \
863 || int_size_in_bytes (TYPE) <= UNITS_PER_WORD) \
864 : GET_MODE_SIZE(MODE) <= UNITS_PER_WORD) \
865 ? PARM_BOUNDARY : MAX_PARM_BOUNDARY)
867 /* In the 32-bit runtime, arguments larger than eight bytes are passed
868 by invisible reference. As a GCC extension, we also pass anything
869 with a zero or variable size by reference.
871 The 64-bit runtime does not describe passing any types by invisible
872 reference. The internals of GCC can't currently handle passing
873 empty structures, and zero or variable length arrays when they are
874 not passed entirely on the stack or by reference. Thus, as a GCC
875 extension, we pass these types by reference. The HP compiler doesn't
876 support these types, so hopefully there shouldn't be any compatibility
877 issues. This may have to be revisited when HP releases a C99 compiler
878 or updates the ABI. */
879 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
880 (TARGET_64BIT \
881 ? ((TYPE) && int_size_in_bytes (TYPE) <= 0) \
882 : (((TYPE) && (int_size_in_bytes (TYPE) > 8 \
883 || int_size_in_bytes (TYPE) <= 0)) \
884 || ((MODE) && GET_MODE_SIZE (MODE) > 8)))
886 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
887 FUNCTION_ARG_PASS_BY_REFERENCE (CUM, MODE, TYPE, NAMED)
889 \f
894 #define ASM_OUTPUT_MI_THUNK(FILE, THUNK_FNDECL, DELTA, FUNCTION) \
895 pa_asm_output_mi_thunk (FILE, THUNK_FNDECL, DELTA, FUNCTION)
897 /* On HPPA, we emit profiling code as rtl via PROFILE_HOOK rather than
898 as assembly via FUNCTION_PROFILER. Just output a local label.
899 We can't use the function label because the GAS SOM target can't
900 handle the difference of a global symbol and a local symbol. */
902 #ifndef FUNC_BEGIN_PROLOG_LABEL
904 #endif
906 #define FUNCTION_PROFILER(FILE, LABEL) \
907 ASM_OUTPUT_INTERNAL_LABEL (FILE, FUNC_BEGIN_PROLOG_LABEL, LABEL)
909 #define PROFILE_HOOK(label_no) hppa_profile_hook (label_no)
912 /* The profile counter if emitted must come before the prologue. */
913 #define PROFILE_BEFORE_PROLOGUE 1
915 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
916 the stack pointer does not matter. The value is tested only in
917 functions that have frame pointers.
918 No definition is equivalent to always zero. */
922 #define EXIT_IGNORE_STACK \
923 (get_frame_size () != 0 \
924 || current_function_calls_alloca || current_function_outgoing_args_size)
926 /* Output assembler code for a block containing the constant parts
927 of a trampoline, leaving space for the variable parts.\
929 The trampoline sets the static chain pointer to STATIC_CHAIN_REGNUM
930 and then branches to the specified routine.
932 This code template is copied from text segment to stack location
933 and then patched with INITIALIZE_TRAMPOLINE to contain
934 valid values, and then entered as a subroutine.
936 It is best to keep this as small as possible to avoid having to
937 flush multiple lines in the cache. */
939 #define TRAMPOLINE_TEMPLATE(FILE) \
940 { \
941 if (! TARGET_64BIT) \
942 { \
945 if (ASSEMBLER_DIALECT == 0) \
947 else \
959 } \
960 else \
961 { \
974 } \
975 }
977 /* Length in units of the trampoline for entering a nested function.
979 Flush the cache entries corresponding to the first and last addresses
980 of the trampoline. This is necessary as the trampoline may cross two
981 cache lines.
983 If the code part of the trampoline ever grows to > 32 bytes, then it
984 will become necessary to hack on the cacheflush pattern in pa.md. */
986 #define TRAMPOLINE_SIZE (TARGET_64BIT ? 72 : 52)
988 /* Emit RTL insns to initialize the variable parts of a trampoline.
989 FNADDR is an RTX for the address of the function's pure code.
990 CXT is an RTX for the static chain value for the function.
992 Move the function address to the trampoline template at offset 36.
993 Move the static chain value to trampoline template at offset 40.
994 Move the trampoline address to trampoline template at offset 44.
995 Move r19 to trampoline template at offset 48. The latter two
996 words create a plabel for the indirect call to the trampoline. */
998 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
999 { \
1000 if (! TARGET_64BIT) \
1001 { \
1002 rtx start_addr, end_addr; \
1003 \
1004 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 36)); \
1005 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1006 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 40)); \
1007 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1008 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 44)); \
1009 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (TRAMP)); \
1010 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 48)); \
1011 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), \
1012 gen_rtx_REG (Pmode, 19)); \
1013 /* fdc and fic only use registers for the address to flush, \
1015 start_addr = force_reg (Pmode, (TRAMP)); \
1016 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1017 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1018 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1019 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1020 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1021 } \
1022 else \
1023 { \
1024 rtx start_addr, end_addr; \
1025 \
1026 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 56)); \
1027 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (FNADDR)); \
1028 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 64)); \
1029 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), (CXT)); \
1031 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1032 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 16)); \
1033 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1034 end_addr = gen_rtx_REG (Pmode, 27); \
1035 start_addr = memory_address (Pmode, plus_constant ((TRAMP), 24)); \
1036 emit_move_insn (gen_rtx_MEM (Pmode, start_addr), end_addr); \
1037 /* fdc and fic only use registers for the address to flush, \
1039 start_addr = force_reg (Pmode, (TRAMP)); \
1040 end_addr = force_reg (Pmode, plus_constant ((TRAMP), 32)); \
1041 emit_insn (gen_dcacheflush (start_addr, end_addr)); \
1042 end_addr = force_reg (Pmode, plus_constant (start_addr, 32)); \
1043 emit_insn (gen_icacheflush (start_addr, end_addr, start_addr, \
1044 gen_reg_rtx (Pmode), gen_reg_rtx (Pmode)));\
1045 } \
1046 }
1048 /* Perform any machine-specific adjustment in the address of the trampoline.
1049 ADDR contains the address that was passed to INITIALIZE_TRAMPOLINE.
1050 Adjust the trampoline address to point to the plabel at offset 44. */
1052 #define TRAMPOLINE_ADJUST_ADDRESS(ADDR) \
1053 if (!TARGET_64BIT) (ADDR) = memory_address (Pmode, plus_constant ((ADDR), 46))
1055 /* Emit code for a call to builtin_saveregs. We must emit USE insns which
1056 reference the 4 integer arg registers and 4 fp arg registers.
1057 Ordinarily they are not call used registers, but they are for
1058 _builtin_saveregs, so we must make this explicit. */
1060 #define EXPAND_BUILTIN_SAVEREGS() hppa_builtin_saveregs ()
1062 /* Implement `va_start' for varargs and stdarg. */
1064 #define EXPAND_BUILTIN_VA_START(valist, nextarg) \
1065 hppa_va_start (valist, nextarg)
1067 /* Implement `va_arg'. */
1069 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1070 hppa_va_arg (valist, type)
1071 \f
1072 /* Addressing modes, and classification of registers for them.
1074 Using autoincrement addressing modes on PA8000 class machines is
1075 not profitable. */
1077 #define HAVE_POST_INCREMENT (pa_cpu < PROCESSOR_8000)
1078 #define HAVE_POST_DECREMENT (pa_cpu < PROCESSOR_8000)
1080 #define HAVE_PRE_DECREMENT (pa_cpu < PROCESSOR_8000)
1081 #define HAVE_PRE_INCREMENT (pa_cpu < PROCESSOR_8000)
1083 /* Macros to check register numbers against specific register classes. */
1085 /* These assume that REGNO is a hard or pseudo reg number.
1086 They give nonzero only if REGNO is a hard reg of the suitable class
1087 or a pseudo reg currently allocated to a suitable hard reg.
1088 Since they use reg_renumber, they are safe only once reg_renumber
1089 has been allocated, which happens in local-alloc.c. */
1091 #define REGNO_OK_FOR_INDEX_P(REGNO) \
1092 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1093 #define REGNO_OK_FOR_BASE_P(REGNO) \
1094 ((REGNO) && ((REGNO) < 32 || (unsigned) reg_renumber[REGNO] < 32))
1095 #define REGNO_OK_FOR_FP_P(REGNO) \
1096 (FP_REGNO_P (REGNO) || FP_REGNO_P (reg_renumber[REGNO]))
1098 /* Now macros that check whether X is a register and also,
1099 strictly, whether it is in a specified class.
1101 These macros are specific to the HP-PA, and may be used only
1102 in code for printing assembler insns and in conditions for
1103 define_optimization. */
1105 /* 1 if X is an fp register. */
1107 #define FP_REG_P(X) (REG_P (X) && REGNO_OK_FOR_FP_P (REGNO (X)))
1108 \f
1109 /* Maximum number of registers that can appear in a valid memory address. */
1111 #define MAX_REGS_PER_ADDRESS 2
1113 /* Recognize any constant value that is a valid address except
1114 for symbolic addresses. We get better CSE by rejecting them
1115 here and allowing hppa_legitimize_address to break them up. We
1116 use most of the constants accepted by CONSTANT_P, except CONST_DOUBLE. */
1118 #define CONSTANT_ADDRESS_P(X) \
1119 ((GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
1120 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST \
1121 || GET_CODE (X) == HIGH) \
1122 && (reload_in_progress || reload_completed || ! symbolic_expression_p (X)))
1124 /* Include all constant integers and constant doubles, but not
1125 floating-point, except for floating-point zero.
1127 Reject LABEL_REFs if we're not using gas or the new HP assembler.
1129 ?!? For now also reject CONST_DOUBLES in 64bit mode. This will need
1130 further work. */
1131 #ifndef NEW_HP_ASSEMBLER
1132 #define NEW_HP_ASSEMBLER 0
1133 #endif
1134 #define LEGITIMATE_CONSTANT_P(X) \
1135 ((GET_MODE_CLASS (GET_MODE (X)) != MODE_FLOAT \
1136 || (X) == CONST0_RTX (GET_MODE (X))) \
1137 && (NEW_HP_ASSEMBLER || TARGET_GAS || GET_CODE (X) != LABEL_REF) \
1138 && !(TARGET_64BIT && GET_CODE (X) == CONST_DOUBLE) \
1139 && !(TARGET_64BIT && GET_CODE (X) == CONST_INT \
1140 && !(HOST_BITS_PER_WIDE_INT <= 32 \
1141 || (INTVAL (X) >= (HOST_WIDE_INT) -32 << 31 \
1142 && INTVAL (X) < (HOST_WIDE_INT) 32 << 31) \
1143 || cint_ok_for_move (INTVAL (X)))) \
1144 && !function_label_operand (X, VOIDmode))
1146 /* Subroutine for EXTRA_CONSTRAINT.
1148 Return 1 iff OP is a pseudo which did not get a hard register and
1149 we are running the reload pass. */
1151 #define IS_RELOADING_PSEUDO_P(OP) \
1152 ((reload_in_progress \
1153 && GET_CODE (OP) == REG \
1154 && REGNO (OP) >= FIRST_PSEUDO_REGISTER \
1155 && reg_renumber [REGNO (OP)] < 0))
1157 /* Optional extra constraints for this machine. Borrowed from sparc.h.
1159 For the HPPA, `Q' means that this is a memory operand but not a
1160 symbolic memory operand. Note that an unassigned pseudo register
1161 is such a memory operand. Needed because reload will generate
1162 these things in insns and then not re-recognize the insns, causing
1163 constrain_operands to fail.
1165 `R' is used for scaled indexed addresses.
1167 `S' is the constant 31.
1169 `T' is for fp loads and stores. */
1170 #define EXTRA_CONSTRAINT(OP, C) \
1172 (IS_RELOADING_PSEUDO_P (OP) \
1173 || (GET_CODE (OP) == MEM \
1174 && (memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1175 || reload_in_progress) \
1176 && ! symbolic_memory_operand (OP, VOIDmode) \
1177 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1178 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1179 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT))))\
1181 (GET_CODE (OP) == MEM \
1182 && GET_CODE (XEXP (OP, 0)) == PLUS \
1183 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT \
1184 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT) \
1185 && (move_operand (OP, GET_MODE (OP)) \
1186 || memory_address_p (GET_MODE (OP), XEXP (OP, 0))\
1187 || reload_in_progress)) \
1189 (GET_CODE (OP) == MEM \
1190 /* Using DFmode forces only short displacements \
1191 to be recognized as valid in reg+d addresses. \
1192 However, this is not necessary for PA2.0 since\
1194 && memory_address_p ((TARGET_PA_20 \
1195 ? GET_MODE (OP) \
1196 : DFmode), \
1197 XEXP (OP, 0)) \
1198 && !(GET_CODE (XEXP (OP, 0)) == LO_SUM \
1199 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1200 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0))\
1201 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC\
1202 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1203 && !(GET_CODE (XEXP (OP, 0)) == PLUS \
1204 && (GET_CODE (XEXP (XEXP (OP, 0), 0)) == MULT\
1205 || GET_CODE (XEXP (XEXP (OP, 0), 1)) == MULT)))\
1207 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 63) \
1209 (GET_CODE (OP) == MEM \
1210 && GET_CODE (XEXP (OP, 0)) == LO_SUM \
1211 && GET_CODE (XEXP (XEXP (OP, 0), 0)) == REG \
1212 && REG_OK_FOR_BASE_P (XEXP (XEXP (OP, 0), 0)) \
1213 && GET_CODE (XEXP (XEXP (OP, 0), 1)) == UNSPEC \
1214 && GET_MODE (XEXP (OP, 0)) == Pmode) \
1216 (GET_CODE (OP) == CONST_INT && INTVAL (OP) == 31) : 0))))))
1219 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1220 and check its validity for a certain class.
1221 We have two alternate definitions for each of them.
1222 The usual definition accepts all pseudo regs; the other rejects
1223 them unless they have been allocated suitable hard regs.
1224 The symbol REG_OK_STRICT causes the latter definition to be used.
1226 Most source files want to accept pseudo regs in the hope that
1227 they will get allocated to the class that the insn wants them to be in.
1228 Source files for reload pass need to be strict.
1229 After reload, it makes no difference, since pseudo regs have
1230 been eliminated by then. */
1232 #ifndef REG_OK_STRICT
1234 /* Nonzero if X is a hard reg that can be used as an index
1235 or if it is a pseudo reg. */
1236 #define REG_OK_FOR_INDEX_P(X) \
1237 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1238 /* Nonzero if X is a hard reg that can be used as a base reg
1239 or if it is a pseudo reg. */
1240 #define REG_OK_FOR_BASE_P(X) \
1241 (REGNO (X) && (REGNO (X) < 32 || REGNO (X) >= FIRST_PSEUDO_REGISTER))
1243 #else
1245 /* Nonzero if X is a hard reg that can be used as an index. */
1246 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1247 /* Nonzero if X is a hard reg that can be used as a base reg. */
1248 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1250 #endif
1251 \f
1252 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1253 that is a valid memory address for an instruction.
1254 The MODE argument is the machine mode for the MEM expression
1255 that wants to use this address.
1257 On the HP-PA, the actual legitimate addresses must be
1258 REG+REG, REG+(REG*SCALE) or REG+SMALLINT.
1259 But we can treat a SYMBOL_REF as legitimate if it is part of this
1260 function's constant-pool, because such addresses can actually
1261 be output as REG+SMALLINT.
1263 Note we only allow 5 bit immediates for access to a constant address;
1264 doing so avoids losing for loading/storing a FP register at an address
1265 which will not fit in 5 bits. */
1267 #define VAL_5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x10 < 0x20)
1268 #define INT_5_BITS(X) VAL_5_BITS_P (INTVAL (X))
1270 #define VAL_U5_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) < 0x20)
1271 #define INT_U5_BITS(X) VAL_U5_BITS_P (INTVAL (X))
1273 #define VAL_11_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x400 < 0x800)
1274 #define INT_11_BITS(X) VAL_11_BITS_P (INTVAL (X))
1276 #define VAL_14_BITS_P(X) ((unsigned HOST_WIDE_INT)(X) + 0x2000 < 0x4000)
1277 #define INT_14_BITS(X) VAL_14_BITS_P (INTVAL (X))
1279 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1280 { \
1281 if ((REG_P (X) && REG_OK_FOR_BASE_P (X)) \
1282 || ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == POST_DEC \
1283 || GET_CODE (X) == PRE_INC || GET_CODE (X) == POST_INC) \
1284 && REG_P (XEXP (X, 0)) \
1285 && REG_OK_FOR_BASE_P (XEXP (X, 0)))) \
1286 goto ADDR; \
1287 else if (GET_CODE (X) == PLUS) \
1288 { \
1289 rtx base = 0, index = 0; \
1290 if (REG_P (XEXP (X, 0)) \
1291 && REG_OK_FOR_BASE_P (XEXP (X, 0))) \
1292 base = XEXP (X, 0), index = XEXP (X, 1); \
1293 else if (REG_P (XEXP (X, 1)) \
1294 && REG_OK_FOR_BASE_P (XEXP (X, 1))) \
1295 base = XEXP (X, 1), index = XEXP (X, 0); \
1296 if (base != 0) \
1297 if (GET_CODE (index) == CONST_INT \
1298 && ((INT_14_BITS (index) \
1299 && (TARGET_SOFT_FLOAT \
1300 || (TARGET_PA_20 \
1301 && ((MODE == SFmode \
1302 && (INTVAL (index) % 4) == 0)\
1303 || (MODE == DFmode \
1304 && (INTVAL (index) % 8) == 0)))\
1305 || ((MODE) != SFmode && (MODE) != DFmode))) \
1306 || INT_5_BITS (index))) \
1307 goto ADDR; \
1308 if (! TARGET_SOFT_FLOAT \
1309 && ! TARGET_DISABLE_INDEXING \
1310 && base \
1311 && ((MODE) == SFmode || (MODE) == DFmode) \
1312 && GET_CODE (index) == MULT \
1313 && GET_CODE (XEXP (index, 0)) == REG \
1314 && REG_OK_FOR_BASE_P (XEXP (index, 0)) \
1315 && GET_CODE (XEXP (index, 1)) == CONST_INT \
1316 && INTVAL (XEXP (index, 1)) == ((MODE) == SFmode ? 4 : 8))\
1317 goto ADDR; \
1318 } \
1319 else if (GET_CODE (X) == LO_SUM \
1320 && GET_CODE (XEXP (X, 0)) == REG \
1321 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1322 && CONSTANT_P (XEXP (X, 1)) \
1323 && (TARGET_SOFT_FLOAT \
1324 /* We can allow symbolic LO_SUM addresses\
1326 || (TARGET_PA_20 \
1327 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1328 || ((MODE) != SFmode \
1329 && (MODE) != DFmode))) \
1330 goto ADDR; \
1331 else if (GET_CODE (X) == LO_SUM \
1332 && GET_CODE (XEXP (X, 0)) == SUBREG \
1333 && GET_CODE (SUBREG_REG (XEXP (X, 0))) == REG\
1334 && REG_OK_FOR_BASE_P (SUBREG_REG (XEXP (X, 0)))\
1335 && CONSTANT_P (XEXP (X, 1)) \
1336 && (TARGET_SOFT_FLOAT \
1337 /* We can allow symbolic LO_SUM addresses\
1339 || (TARGET_PA_20 \
1340 && GET_CODE (XEXP (X, 1)) != CONST_INT)\
1341 || ((MODE) != SFmode \
1342 && (MODE) != DFmode))) \
1343 goto ADDR; \
1344 else if (GET_CODE (X) == LABEL_REF \
1345 || (GET_CODE (X) == CONST_INT \
1346 && INT_5_BITS (X))) \
1347 goto ADDR; \
1349 else if (GET_CODE (X) == LO_SUM \
1350 && GET_CODE (XEXP (X, 0)) == REG \
1351 && REG_OK_FOR_BASE_P (XEXP (X, 0)) \
1352 && GET_CODE (XEXP (X, 1)) == UNSPEC \
1353 && (TARGET_SOFT_FLOAT \
1354 || TARGET_PA_20 \
1355 || ((MODE) != SFmode \
1356 && (MODE) != DFmode))) \
1357 goto ADDR; \
1358 }
1360 /* Look for machine dependent ways to make the invalid address AD a
1361 valid address.
1363 For the PA, transform:
1365 memory(X + <large int>)
1367 into:
1369 if (<large int> & mask) >= 16
1370 Y = (<large int> & ~mask) + mask + 1 Round up.
1371 else
1372 Y = (<large int> & ~mask) Round down.
1373 Z = X + Y
1374 memory (Z + (<large int> - Y));
1376 This makes reload inheritance and reload_cse work better since Z
1377 can be reused.
1379 There may be more opportunities to improve code with this hook. */
1380 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN) \
1381 do { \
1382 int offset, newoffset, mask; \
1383 rtx new, temp = NULL_RTX; \
1384 \
1385 mask = (GET_MODE_CLASS (MODE) == MODE_FLOAT \
1386 ? (TARGET_PA_20 ? 0x3fff : 0x1f) : 0x3fff); \
1387 \
1388 if (optimize \
1389 && GET_CODE (AD) == PLUS) \
1390 temp = simplify_binary_operation (PLUS, Pmode, \
1391 XEXP (AD, 0), XEXP (AD, 1)); \
1392 \
1393 new = temp ? temp : AD; \
1394 \
1395 if (optimize \
1396 && GET_CODE (new) == PLUS \
1397 && GET_CODE (XEXP (new, 0)) == REG \
1398 && GET_CODE (XEXP (new, 1)) == CONST_INT) \
1399 { \
1400 offset = INTVAL (XEXP ((new), 1)); \
1401 \
1403 if ((offset & mask) >= ((mask + 1) / 2)) \
1404 newoffset = (offset & ~mask) + mask + 1; \
1405 else \
1406 newoffset = offset & ~mask; \
1407 \
1408 if (newoffset != 0 \
1409 && VAL_14_BITS_P (newoffset)) \
1410 { \
1411 \
1412 temp = gen_rtx_PLUS (Pmode, XEXP (new, 0), \
1413 GEN_INT (newoffset)); \
1414 AD = gen_rtx_PLUS (Pmode, temp, GEN_INT (offset - newoffset));\
1415 push_reload (XEXP (AD, 0), 0, &XEXP (AD, 0), 0, \
1416 BASE_REG_CLASS, Pmode, VOIDmode, 0, 0, \
1417 (OPNUM), (TYPE)); \
1418 goto WIN; \
1419 } \
1420 } \
1421 } while (0)
1425 \f
1426 /* Try machine-dependent ways of modifying an illegitimate address
1427 to be legitimate. If we find one, return the new, valid address.
1428 This macro is used in only one place: `memory_address' in explow.c.
1430 OLDX is the address as it was before break_out_memory_refs was called.
1431 In some cases it is useful to look at this to decide what needs to be done.
1433 MODE and WIN are passed so that this macro can use
1434 GO_IF_LEGITIMATE_ADDRESS.
1436 It is always safe for this macro to do nothing. It exists to recognize
1437 opportunities to optimize the output. */
1439 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN) \
1440 { rtx orig_x = (X); \
1441 (X) = hppa_legitimize_address (X, OLDX, MODE); \
1442 if ((X) != orig_x && memory_address_p (MODE, X)) \
1443 goto WIN; }
1445 /* Go to LABEL if ADDR (a legitimate address expression)
1446 has an effect that depends on the machine mode it is used for. */
1448 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1449 if (GET_CODE (ADDR) == PRE_DEC \
1450 || GET_CODE (ADDR) == POST_DEC \
1451 || GET_CODE (ADDR) == PRE_INC \
1452 || GET_CODE (ADDR) == POST_INC) \
1453 goto LABEL
1454 \f
1455 #define TARGET_ASM_SELECT_SECTION pa_select_section
1457 /* Define this macro if references to a symbol must be treated
1458 differently depending on something about the variable or
1459 function named by the symbol (such as what section it is in).
1461 The macro definition, if any, is executed immediately after the
1462 rtl for DECL or other node is created.
1463 The value of the rtl will be a `mem' whose address is a
1464 `symbol_ref'.
1466 The usual thing for this macro to do is to a flag in the
1467 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1468 name string in the `symbol_ref' (if one bit is not enough
1469 information).
1471 On the HP-PA we use this to indicate if a symbol is in text or
1472 data space. Also, function labels need special treatment. */
1474 #define TEXT_SPACE_P(DECL)\
1475 (TREE_CODE (DECL) == FUNCTION_DECL \
1476 || (TREE_CODE (DECL) == VAR_DECL \
1477 && TREE_READONLY (DECL) && ! TREE_SIDE_EFFECTS (DECL) \
1478 && (! DECL_INITIAL (DECL) || ! reloc_needed (DECL_INITIAL (DECL))) \
1479 && !flag_pic) \
1481 && !(TREE_CODE (DECL) == STRING_CST && flag_writable_strings)))
1485 /* Specify the machine mode that this machine uses
1486 for the index in the tablejump instruction. */
1487 #define CASE_VECTOR_MODE (TARGET_BIG_SWITCH ? TImode : DImode)
1489 /* Jump tables must be 32 bit aligned, no matter the size of the element. */
1490 #define ADDR_VEC_ALIGN(ADDR_VEC) 2
1492 /* Define this as 1 if `char' should by default be signed; else as 0. */
1493 #define DEFAULT_SIGNED_CHAR 1
1495 /* Max number of bytes we can move from memory to memory
1496 in one reasonably fast instruction. */
1497 #define MOVE_MAX 8
1499 /* Higher than the default as we prefer to use simple move insns
1500 (better scheduling and delay slot filling) and because our
1501 built-in block move is really a 2X unrolled loop.
1503 Believe it or not, this has to be big enough to allow for copying all
1504 arguments passed in registers to avoid infinite recursion during argument
1505 setup for a function call. Why? Consider how we copy the stack slots
1506 reserved for parameters when they may be trashed by a call. */
1507 #define MOVE_RATIO (TARGET_64BIT ? 8 : 4)
1509 /* Define if operations between registers always perform the operation
1510 on the full register even if a narrower mode is specified. */
1511 #define WORD_REGISTER_OPERATIONS
1513 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1514 will either zero-extend or sign-extend. The value of this macro should
1515 be the code that says which one of the two operations is implicitly
1516 done, NIL if none. */
1517 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1519 /* Nonzero if access to memory by bytes is slow and undesirable. */
1520 #define SLOW_BYTE_ACCESS 1
1522 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1523 is done just by pretending it is already truncated. */
1524 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1526 /* We assume that the store-condition-codes instructions store 0 for false
1527 and some other value for true. This is the value stored for true. */
1529 #define STORE_FLAG_VALUE 1
1531 /* When a prototype says `char' or `short', really pass an `int'. */
1532 #define PROMOTE_PROTOTYPES 1
1533 #define PROMOTE_FUNCTION_RETURN 1
1535 /* Specify the machine mode that pointers have.
1536 After generation of rtl, the compiler makes no further distinction
1537 between pointers and any other objects of this machine mode. */
1538 #define Pmode word_mode
1540 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1541 return the mode to be used for the comparison. For floating-point, CCFPmode
1542 should be used. CC_NOOVmode should be used when the first operand is a
1543 PLUS, MINUS, or NEG. CCmode should be used when no special processing is
1544 needed. */
1545 #define SELECT_CC_MODE(OP,X,Y) \
1546 (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT ? CCFPmode : CCmode) \
1548 /* A function address in a call instruction
1549 is a byte address (for indexing purposes)
1550 so give the MEM rtx a byte's mode. */
1551 #define FUNCTION_MODE SImode
1553 /* Define this if addresses of constant functions
1554 shouldn't be put through pseudo regs where they can be cse'd.
1555 Desirable on machines where ordinary constants are expensive
1556 but a CALL with constant address is cheap. */
1557 #define NO_FUNCTION_CSE
1559 /* Define this to be nonzero if shift instructions ignore all but the low-order
1560 few bits. */
1561 #define SHIFT_COUNT_TRUNCATED 1
1563 /* Compute the cost of computing a constant rtl expression RTX
1564 whose rtx-code is CODE. The body of this macro is a portion
1565 of a switch statement. If the code is computed here,
1566 return it with a return statement. Otherwise, break from the switch. */
1568 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1569 case CONST_INT: \
1570 if (INTVAL (RTX) == 0) return 0; \
1571 if (INT_14_BITS (RTX)) return 1; \
1572 case HIGH: \
1573 return 2; \
1574 case CONST: \
1575 case LABEL_REF: \
1576 case SYMBOL_REF: \
1577 return 4; \
1578 case CONST_DOUBLE: \
1579 if ((RTX == CONST0_RTX (DFmode) || RTX == CONST0_RTX (SFmode)) \
1580 && OUTER_CODE != SET) \
1581 return 0; \
1582 else \
1583 return 8;
1585 #define ADDRESS_COST(RTX) \
1586 (GET_CODE (RTX) == REG ? 1 : hppa_address_cost (RTX))
1588 /* Compute extra cost of moving data between one register class
1589 and another.
1591 Make moves from SAR so expensive they should never happen. We used to
1592 have 0xffff here, but that generates overflow in rare cases.
1594 Copies involving a FP register and a non-FP register are relatively
1595 expensive because they must go through memory.
1597 Other copies are reasonably cheap. */
1598 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
1599 (CLASS1 == SHIFT_REGS ? 0x100 \
1600 : FP_REG_CLASS_P (CLASS1) && ! FP_REG_CLASS_P (CLASS2) ? 16 \
1601 : FP_REG_CLASS_P (CLASS2) && ! FP_REG_CLASS_P (CLASS1) ? 16 \
1602 : 2)
1605 /* Provide the costs of a rtl expression. This is in the body of a
1606 switch on CODE. The purpose for the cost of MULT is to encourage
1607 `synth_mult' to find a synthetic multiply when reasonable. */
1609 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1610 case MULT: \
1611 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1612 return COSTS_N_INSNS (3); \
1613 return (TARGET_PA_11 && ! TARGET_DISABLE_FPREGS && ! TARGET_SOFT_FLOAT) \
1614 ? COSTS_N_INSNS (8) : COSTS_N_INSNS (20); \
1615 case DIV: \
1616 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1617 return COSTS_N_INSNS (14); \
1618 case UDIV: \
1619 case MOD: \
1620 case UMOD: \
1621 return COSTS_N_INSNS (60); \
1623 case MINUS: \
1624 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_FLOAT) \
1625 return COSTS_N_INSNS (3); \
1626 return COSTS_N_INSNS (1); \
1627 case ASHIFT: \
1628 case ASHIFTRT: \
1629 case LSHIFTRT: \
1630 return COSTS_N_INSNS (1);
1632 /* Adjust the cost of branches. */
1633 #define BRANCH_COST (pa_cpu == PROCESSOR_8000 ? 2 : 1)
1635 /* Handling the special cases is going to get too complicated for a macro,
1636 just call `pa_adjust_insn_length' to do the real work. */
1637 #define ADJUST_INSN_LENGTH(INSN, LENGTH) \
1638 LENGTH += pa_adjust_insn_length (INSN, LENGTH);
1640 /* Millicode insns are actually function calls with some special
1641 constraints on arguments and register usage.
1643 Millicode calls always expect their arguments in the integer argument
1644 registers, and always return their result in %r29 (ret1). They
1645 are expected to clobber their arguments, %r1, %r29, and the return
1646 pointer which is %r31 on 32-bit and %r2 on 64-bit, and nothing else.
1648 This macro tells reorg that the references to arguments and
1649 millicode calls do not appear to happen until after the millicode call.
1650 This allows reorg to put insns which set the argument registers into the
1651 delay slot of the millicode call -- thus they act more like traditional
1652 CALL_INSNs.
1654 Note we can not consider side effects of the insn to be delayed because
1655 the branch and link insn will clobber the return pointer. If we happened
1656 to use the return pointer in the delay slot of the call, then we lose.
1658 get_attr_type will try to recognize the given insn, so make sure to
1659 filter out things it will not accept -- SEQUENCE, USE and CLOBBER insns
1660 in particular. */
1661 #define INSN_REFERENCES_ARE_DELAYED(X) (insn_refs_are_delayed (X))
1663 \f
1664 /* Control the assembler format that we output. */
1666 /* Output to assembler file text saying following lines
1667 may contain character constants, extra white space, comments, etc. */
1671 /* Output to assembler file text saying following lines
1672 no longer contain unusual constructs. */
1676 /* Output deferred plabels at the end of the file. */
1678 #define ASM_FILE_END(FILE) output_deferred_plabels (FILE)
1680 /* This is how to output the definition of a user-level label named NAME,
1681 such as the label on a static function or variable NAME. */
1683 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1684 do { assemble_name (FILE, NAME); \
1687 /* This is how to output a reference to a user-level label named NAME.
1688 `assemble_name' uses this. */
1690 #define ASM_OUTPUT_LABELREF(FILE,NAME) \
1693 /* This is how to output an internal numbered label where
1694 PREFIX is the class of label and NUM is the number within the class. */
1696 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1699 /* This is how to store into the string LABEL
1700 the symbol_ref name of an internal numbered label where
1701 PREFIX is the class of label and NUM is the number within the class.
1702 This is suitable for output with `assemble_name'. */
1704 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1707 #define TARGET_ASM_GLOBALIZE_LABEL pa_globalize_label
1709 #define ASM_OUTPUT_ASCII(FILE, P, SIZE) \
1710 output_ascii ((FILE), (P), (SIZE))
1712 /* This is how to output an element of a case-vector that is absolute.
1713 Note that this method makes filling these branch delay slots
1714 impossible. */
1716 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1717 if (TARGET_BIG_SWITCH) \
1718 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldil LR'L$%04d,%%r1\n\tbe RR'L$%04d(%%sr4,%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE, VALUE); \
1719 else \
1722 /* Jump tables are executable code and live in the TEXT section on the PA. */
1723 #define JUMP_TABLES_IN_TEXT_SECTION 1
1725 /* This is how to output an element of a case-vector that is relative.
1726 This must be defined correctly as it is used when generating PIC code.
1728 I believe it safe to use the same definition as ASM_OUTPUT_ADDR_VEC_ELT
1729 on the PA since ASM_OUTPUT_ADDR_VEC_ELT uses pc-relative jump instructions
1730 rather than a table of absolute addresses. */
1732 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1733 if (TARGET_BIG_SWITCH) \
1734 fprintf (FILE, "\tstw %%r1,-16(%%r30)\n\tldw T'L$%04d(%%r19),%%r1\n\tbv %%r0(%%r1)\n\tldw -16(%%r30),%%r1\n", VALUE); \
1735 else \
1738 /* This is how to output an assembler line
1739 that says to advance the location counter
1740 to a multiple of 2**LOG bytes. */
1742 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1745 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1748 /* This says how to output an assembler line to define a global common symbol
1749 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1751 #define ASM_OUTPUT_ALIGNED_COMMON(FILE, NAME, SIZE, ALIGNED) \
1752 { bss_section (); \
1753 assemble_name ((FILE), (NAME)); \
1757 /* This says how to output an assembler line to define a local common symbol
1758 with size SIZE (in bytes) and alignment ALIGN (in bits). */
1760 #define ASM_OUTPUT_ALIGNED_LOCAL(FILE, NAME, SIZE, ALIGNED) \
1761 { bss_section (); \
1763 assemble_name ((FILE), (NAME)); \
1766 /* Store in OUTPUT a string (made with alloca) containing
1767 an assembler-name for a local static variable named NAME.
1768 LABELNO is an integer which is different for each call. */
1770 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1771 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 12), \
1774 /* All HP assemblers use "!" to separate logical lines. */
1777 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1780 /* Print operand X (an rtx) in assembler syntax to file FILE.
1781 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1782 For `%' followed by punctuation, CODE is the punctuation and X is null.
1784 On the HP-PA, the CODE can be `r', meaning this is a register-only operand
1785 and an immediate zero should be represented as `r0'.
1787 Several % codes are defined:
1788 O an operation
1789 C compare conditions
1790 N extract conditions
1791 M modifier to handle preincrement addressing for memory refs.
1792 F modifier to handle preincrement addressing for fp memory refs */
1794 #define PRINT_OPERAND(FILE, X, CODE) print_operand (FILE, X, CODE)
1796 \f
1797 /* Print a memory address as an operand to reference that memory location. */
1799 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1800 { register rtx addr = ADDR; \
1801 register rtx base; \
1802 int offset; \
1803 switch (GET_CODE (addr)) \
1804 { \
1805 case REG: \
1807 break; \
1808 case PLUS: \
1809 if (GET_CODE (XEXP (addr, 0)) == CONST_INT) \
1810 offset = INTVAL (XEXP (addr, 0)), base = XEXP (addr, 1); \
1811 else if (GET_CODE (XEXP (addr, 1)) == CONST_INT) \
1812 offset = INTVAL (XEXP (addr, 1)), base = XEXP (addr, 0); \
1813 else \
1814 abort (); \
1816 break; \
1817 case LO_SUM: \
1818 if (!symbolic_operand (XEXP (addr, 1), VOIDmode)) \
1820 else if (flag_pic == 0) \
1822 else \
1824 output_global_address (FILE, XEXP (addr, 1), 0); \
1826 output_operand (XEXP (addr, 0), 0); \
1828 break; \
1829 case CONST_INT: \
1830 fprintf (FILE, HOST_WIDE_INT_PRINT_DEC, INTVAL (addr)); \
1832 break; \
1833 default: \
1834 output_addr_const (FILE, addr); \
1835 }}
1837 \f
1838 /* Find the return address associated with the frame given by
1839 FRAMEADDR. */
1840 #define RETURN_ADDR_RTX(COUNT, FRAMEADDR) \
1841 (return_addr_rtx (COUNT, FRAMEADDR))
1843 /* Used to mask out junk bits from the return address, such as
1844 processor state, interrupt status, condition codes and the like. */
1845 #define MASK_RETURN_ADDR \
1846 /* The privilege level is in the two low order bits, mask em out \
1848 (GEN_INT (-4))
1850 /* The number of Pmode words for the setjmp buffer. */
1851 #define JMP_BUF_SIZE 50
1853 /* Only direct calls to static functions are allowed to be sibling (tail)
1854 call optimized.
1856 This restriction is necessary because some linker generated stubs will
1857 store return pointers into rp' in some cases which might clobber a
1858 live value already in rp'.
1860 In a sibcall the current function and the target function share stack
1861 space. Thus if the path to the current function and the path to the
1862 target function save a value in rp', they save the value into the
1863 same stack slot, which has undesirable consequences.
1865 Because of the deferred binding nature of shared libraries any function
1866 with external scope could be in a different load module and thus require
1867 rp' to be saved when calling that function. So sibcall optimizations
1868 can only be safe for static function.
1870 Note that GCC never needs return value relocations, so we don't have to
1871 worry about static calls with return value relocations (which require
1872 saving rp').
1874 It is safe to perform a sibcall optimization when the target function
1875 will never return. */
1876 #define FUNCTION_OK_FOR_SIBCALL(DECL) \
1877 (DECL \
1878 && ! TARGET_PORTABLE_RUNTIME \
1879 && ! TARGET_64BIT \
1880 && ! TREE_PUBLIC (DECL))
1882 #define PREDICATE_CODES \
1885 CONST_DOUBLE, CONST, HIGH, CONSTANT_P_RTX}}, \
1891 CONST_DOUBLE}}, \
1906 HOST_BITS_PER_WIDE_INT > 32 ? 0 : CONST_DOUBLE}}, \
1920 GT, GTU, GE}}, \