Imported GNU Classpath 0.90
[official-gcc.git] / gcc / final.c
blob04596646b3eda6098919e6369ff7f5f445e4bf5a
1 /* Convert RTL to assembler code and output it, for GNU compiler.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997,
3 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005
4 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 2, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING. If not, write to the Free
20 Software Foundation, 51 Franklin Street, Fifth Floor, Boston, MA
21 02110-1301, USA. */
23 /* This is the final pass of the compiler.
24 It looks at the rtl code for a function and outputs assembler code.
26 Call `final_start_function' to output the assembler code for function entry,
27 `final' to output assembler code for some RTL code,
28 `final_end_function' to output assembler code for function exit.
29 If a function is compiled in several pieces, each piece is
30 output separately with `final'.
32 Some optimizations are also done at this level.
33 Move instructions that were made unnecessary by good register allocation
34 are detected and omitted from the output. (Though most of these
35 are removed by the last jump pass.)
37 Instructions to set the condition codes are omitted when it can be
38 seen that the condition codes already had the desired values.
40 In some cases it is sufficient if the inherited condition codes
41 have related values, but this may require the following insn
42 (the one that tests the condition codes) to be modified.
44 The code for the function prologue and epilogue are generated
45 directly in assembler by the target functions function_prologue and
46 function_epilogue. Those instructions never exist as rtl. */
48 #include "config.h"
49 #include "system.h"
50 #include "coretypes.h"
51 #include "tm.h"
53 #include "tree.h"
54 #include "rtl.h"
55 #include "tm_p.h"
56 #include "regs.h"
57 #include "insn-config.h"
58 #include "insn-attr.h"
59 #include "recog.h"
60 #include "conditions.h"
61 #include "flags.h"
62 #include "real.h"
63 #include "hard-reg-set.h"
64 #include "output.h"
65 #include "except.h"
66 #include "function.h"
67 #include "toplev.h"
68 #include "reload.h"
69 #include "intl.h"
70 #include "basic-block.h"
71 #include "target.h"
72 #include "debug.h"
73 #include "expr.h"
74 #include "cfglayout.h"
75 #include "tree-pass.h"
76 #include "timevar.h"
77 #include "cgraph.h"
78 #include "coverage.h"
80 #ifdef XCOFF_DEBUGGING_INFO
81 #include "xcoffout.h" /* Needed for external data
82 declarations for e.g. AIX 4.x. */
83 #endif
85 #if defined (DWARF2_UNWIND_INFO) || defined (DWARF2_DEBUGGING_INFO)
86 #include "dwarf2out.h"
87 #endif
89 #ifdef DBX_DEBUGGING_INFO
90 #include "dbxout.h"
91 #endif
93 #ifdef SDB_DEBUGGING_INFO
94 #include "sdbout.h"
95 #endif
97 /* If we aren't using cc0, CC_STATUS_INIT shouldn't exist. So define a
98 null default for it to save conditionalization later. */
99 #ifndef CC_STATUS_INIT
100 #define CC_STATUS_INIT
101 #endif
103 /* How to start an assembler comment. */
104 #ifndef ASM_COMMENT_START
105 #define ASM_COMMENT_START ";#"
106 #endif
108 /* Is the given character a logical line separator for the assembler? */
109 #ifndef IS_ASM_LOGICAL_LINE_SEPARATOR
110 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C) ((C) == ';')
111 #endif
113 #ifndef JUMP_TABLES_IN_TEXT_SECTION
114 #define JUMP_TABLES_IN_TEXT_SECTION 0
115 #endif
117 /* Bitflags used by final_scan_insn. */
118 #define SEEN_BB 1
119 #define SEEN_NOTE 2
120 #define SEEN_EMITTED 4
122 /* Last insn processed by final_scan_insn. */
123 static rtx debug_insn;
124 rtx current_output_insn;
126 /* Line number of last NOTE. */
127 static int last_linenum;
129 /* Highest line number in current block. */
130 static int high_block_linenum;
132 /* Likewise for function. */
133 static int high_function_linenum;
135 /* Filename of last NOTE. */
136 static const char *last_filename;
138 /* Whether to force emission of a line note before the next insn. */
139 static bool force_source_line = false;
141 extern const int length_unit_log; /* This is defined in insn-attrtab.c. */
143 /* Nonzero while outputting an `asm' with operands.
144 This means that inconsistencies are the user's fault, so don't die.
145 The precise value is the insn being output, to pass to error_for_asm. */
146 rtx this_is_asm_operands;
148 /* Number of operands of this insn, for an `asm' with operands. */
149 static unsigned int insn_noperands;
151 /* Compare optimization flag. */
153 static rtx last_ignored_compare = 0;
155 /* Assign a unique number to each insn that is output.
156 This can be used to generate unique local labels. */
158 static int insn_counter = 0;
160 #ifdef HAVE_cc0
161 /* This variable contains machine-dependent flags (defined in tm.h)
162 set and examined by output routines
163 that describe how to interpret the condition codes properly. */
165 CC_STATUS cc_status;
167 /* During output of an insn, this contains a copy of cc_status
168 from before the insn. */
170 CC_STATUS cc_prev_status;
171 #endif
173 /* Indexed by hardware reg number, is 1 if that register is ever
174 used in the current function.
176 In life_analysis, or in stupid_life_analysis, this is set
177 up to record the hard regs used explicitly. Reload adds
178 in the hard regs used for holding pseudo regs. Final uses
179 it to generate the code in the function prologue and epilogue
180 to save and restore registers as needed. */
182 char regs_ever_live[FIRST_PSEUDO_REGISTER];
184 /* Like regs_ever_live, but 1 if a reg is set or clobbered from an asm.
185 Unlike regs_ever_live, elements of this array corresponding to
186 eliminable regs like the frame pointer are set if an asm sets them. */
188 char regs_asm_clobbered[FIRST_PSEUDO_REGISTER];
190 /* Nonzero means current function must be given a frame pointer.
191 Initialized in function.c to 0. Set only in reload1.c as per
192 the needs of the function. */
194 int frame_pointer_needed;
196 /* Number of unmatched NOTE_INSN_BLOCK_BEG notes we have seen. */
198 static int block_depth;
200 /* Nonzero if have enabled APP processing of our assembler output. */
202 static int app_on;
204 /* If we are outputting an insn sequence, this contains the sequence rtx.
205 Zero otherwise. */
207 rtx final_sequence;
209 #ifdef ASSEMBLER_DIALECT
211 /* Number of the assembler dialect to use, starting at 0. */
212 static int dialect_number;
213 #endif
215 #ifdef HAVE_conditional_execution
216 /* Nonnull if the insn currently being emitted was a COND_EXEC pattern. */
217 rtx current_insn_predicate;
218 #endif
220 #ifdef HAVE_ATTR_length
221 static int asm_insn_count (rtx);
222 #endif
223 static void profile_function (FILE *);
224 static void profile_after_prologue (FILE *);
225 static bool notice_source_line (rtx);
226 static rtx walk_alter_subreg (rtx *);
227 static void output_asm_name (void);
228 static void output_alternate_entry_point (FILE *, rtx);
229 static tree get_mem_expr_from_op (rtx, int *);
230 static void output_asm_operand_names (rtx *, int *, int);
231 static void output_operand (rtx, int);
232 #ifdef LEAF_REGISTERS
233 static void leaf_renumber_regs (rtx);
234 #endif
235 #ifdef HAVE_cc0
236 static int alter_cond (rtx);
237 #endif
238 #ifndef ADDR_VEC_ALIGN
239 static int final_addr_vec_align (rtx);
240 #endif
241 #ifdef HAVE_ATTR_length
242 static int align_fuzz (rtx, rtx, int, unsigned);
243 #endif
245 /* Initialize data in final at the beginning of a compilation. */
247 void
248 init_final (const char *filename ATTRIBUTE_UNUSED)
250 app_on = 0;
251 final_sequence = 0;
253 #ifdef ASSEMBLER_DIALECT
254 dialect_number = ASSEMBLER_DIALECT;
255 #endif
258 /* Default target function prologue and epilogue assembler output.
260 If not overridden for epilogue code, then the function body itself
261 contains return instructions wherever needed. */
262 void
263 default_function_pro_epilogue (FILE *file ATTRIBUTE_UNUSED,
264 HOST_WIDE_INT size ATTRIBUTE_UNUSED)
268 /* Default target hook that outputs nothing to a stream. */
269 void
270 no_asm_to_stream (FILE *file ATTRIBUTE_UNUSED)
274 /* Enable APP processing of subsequent output.
275 Used before the output from an `asm' statement. */
277 void
278 app_enable (void)
280 if (! app_on)
282 fputs (ASM_APP_ON, asm_out_file);
283 app_on = 1;
287 /* Disable APP processing of subsequent output.
288 Called from varasm.c before most kinds of output. */
290 void
291 app_disable (void)
293 if (app_on)
295 fputs (ASM_APP_OFF, asm_out_file);
296 app_on = 0;
300 /* Return the number of slots filled in the current
301 delayed branch sequence (we don't count the insn needing the
302 delay slot). Zero if not in a delayed branch sequence. */
304 #ifdef DELAY_SLOTS
306 dbr_sequence_length (void)
308 if (final_sequence != 0)
309 return XVECLEN (final_sequence, 0) - 1;
310 else
311 return 0;
313 #endif
315 /* The next two pages contain routines used to compute the length of an insn
316 and to shorten branches. */
318 /* Arrays for insn lengths, and addresses. The latter is referenced by
319 `insn_current_length'. */
321 static int *insn_lengths;
323 varray_type insn_addresses_;
325 /* Max uid for which the above arrays are valid. */
326 static int insn_lengths_max_uid;
328 /* Address of insn being processed. Used by `insn_current_length'. */
329 int insn_current_address;
331 /* Address of insn being processed in previous iteration. */
332 int insn_last_address;
334 /* known invariant alignment of insn being processed. */
335 int insn_current_align;
337 /* After shorten_branches, for any insn, uid_align[INSN_UID (insn)]
338 gives the next following alignment insn that increases the known
339 alignment, or NULL_RTX if there is no such insn.
340 For any alignment obtained this way, we can again index uid_align with
341 its uid to obtain the next following align that in turn increases the
342 alignment, till we reach NULL_RTX; the sequence obtained this way
343 for each insn we'll call the alignment chain of this insn in the following
344 comments. */
346 struct label_alignment
348 short alignment;
349 short max_skip;
352 static rtx *uid_align;
353 static int *uid_shuid;
354 static struct label_alignment *label_align;
356 /* Indicate that branch shortening hasn't yet been done. */
358 void
359 init_insn_lengths (void)
361 if (uid_shuid)
363 free (uid_shuid);
364 uid_shuid = 0;
366 if (insn_lengths)
368 free (insn_lengths);
369 insn_lengths = 0;
370 insn_lengths_max_uid = 0;
372 #ifdef HAVE_ATTR_length
373 INSN_ADDRESSES_FREE ();
374 #endif
375 if (uid_align)
377 free (uid_align);
378 uid_align = 0;
382 /* Obtain the current length of an insn. If branch shortening has been done,
383 get its actual length. Otherwise, use FALLBACK_FN to calcualte the
384 length. */
385 static inline int
386 get_attr_length_1 (rtx insn ATTRIBUTE_UNUSED,
387 int (*fallback_fn) (rtx) ATTRIBUTE_UNUSED)
389 #ifdef HAVE_ATTR_length
390 rtx body;
391 int i;
392 int length = 0;
394 if (insn_lengths_max_uid > INSN_UID (insn))
395 return insn_lengths[INSN_UID (insn)];
396 else
397 switch (GET_CODE (insn))
399 case NOTE:
400 case BARRIER:
401 case CODE_LABEL:
402 return 0;
404 case CALL_INSN:
405 length = fallback_fn (insn);
406 break;
408 case JUMP_INSN:
409 body = PATTERN (insn);
410 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
412 /* Alignment is machine-dependent and should be handled by
413 ADDR_VEC_ALIGN. */
415 else
416 length = fallback_fn (insn);
417 break;
419 case INSN:
420 body = PATTERN (insn);
421 if (GET_CODE (body) == USE || GET_CODE (body) == CLOBBER)
422 return 0;
424 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
425 length = asm_insn_count (body) * fallback_fn (insn);
426 else if (GET_CODE (body) == SEQUENCE)
427 for (i = 0; i < XVECLEN (body, 0); i++)
428 length += get_attr_length (XVECEXP (body, 0, i));
429 else
430 length = fallback_fn (insn);
431 break;
433 default:
434 break;
437 #ifdef ADJUST_INSN_LENGTH
438 ADJUST_INSN_LENGTH (insn, length);
439 #endif
440 return length;
441 #else /* not HAVE_ATTR_length */
442 return 0;
443 #define insn_default_length 0
444 #define insn_min_length 0
445 #endif /* not HAVE_ATTR_length */
448 /* Obtain the current length of an insn. If branch shortening has been done,
449 get its actual length. Otherwise, get its maximum length. */
451 get_attr_length (rtx insn)
453 return get_attr_length_1 (insn, insn_default_length);
456 /* Obtain the current length of an insn. If branch shortening has been done,
457 get its actual length. Otherwise, get its minimum length. */
459 get_attr_min_length (rtx insn)
461 return get_attr_length_1 (insn, insn_min_length);
464 /* Code to handle alignment inside shorten_branches. */
466 /* Here is an explanation how the algorithm in align_fuzz can give
467 proper results:
469 Call a sequence of instructions beginning with alignment point X
470 and continuing until the next alignment point `block X'. When `X'
471 is used in an expression, it means the alignment value of the
472 alignment point.
474 Call the distance between the start of the first insn of block X, and
475 the end of the last insn of block X `IX', for the `inner size of X'.
476 This is clearly the sum of the instruction lengths.
478 Likewise with the next alignment-delimited block following X, which we
479 shall call block Y.
481 Call the distance between the start of the first insn of block X, and
482 the start of the first insn of block Y `OX', for the `outer size of X'.
484 The estimated padding is then OX - IX.
486 OX can be safely estimated as
488 if (X >= Y)
489 OX = round_up(IX, Y)
490 else
491 OX = round_up(IX, X) + Y - X
493 Clearly est(IX) >= real(IX), because that only depends on the
494 instruction lengths, and those being overestimated is a given.
496 Clearly round_up(foo, Z) >= round_up(bar, Z) if foo >= bar, so
497 we needn't worry about that when thinking about OX.
499 When X >= Y, the alignment provided by Y adds no uncertainty factor
500 for branch ranges starting before X, so we can just round what we have.
501 But when X < Y, we don't know anything about the, so to speak,
502 `middle bits', so we have to assume the worst when aligning up from an
503 address mod X to one mod Y, which is Y - X. */
505 #ifndef LABEL_ALIGN
506 #define LABEL_ALIGN(LABEL) align_labels_log
507 #endif
509 #ifndef LABEL_ALIGN_MAX_SKIP
510 #define LABEL_ALIGN_MAX_SKIP align_labels_max_skip
511 #endif
513 #ifndef LOOP_ALIGN
514 #define LOOP_ALIGN(LABEL) align_loops_log
515 #endif
517 #ifndef LOOP_ALIGN_MAX_SKIP
518 #define LOOP_ALIGN_MAX_SKIP align_loops_max_skip
519 #endif
521 #ifndef LABEL_ALIGN_AFTER_BARRIER
522 #define LABEL_ALIGN_AFTER_BARRIER(LABEL) 0
523 #endif
525 #ifndef LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP
526 #define LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP 0
527 #endif
529 #ifndef JUMP_ALIGN
530 #define JUMP_ALIGN(LABEL) align_jumps_log
531 #endif
533 #ifndef JUMP_ALIGN_MAX_SKIP
534 #define JUMP_ALIGN_MAX_SKIP align_jumps_max_skip
535 #endif
537 #ifndef ADDR_VEC_ALIGN
538 static int
539 final_addr_vec_align (rtx addr_vec)
541 int align = GET_MODE_SIZE (GET_MODE (PATTERN (addr_vec)));
543 if (align > BIGGEST_ALIGNMENT / BITS_PER_UNIT)
544 align = BIGGEST_ALIGNMENT / BITS_PER_UNIT;
545 return exact_log2 (align);
549 #define ADDR_VEC_ALIGN(ADDR_VEC) final_addr_vec_align (ADDR_VEC)
550 #endif
552 #ifndef INSN_LENGTH_ALIGNMENT
553 #define INSN_LENGTH_ALIGNMENT(INSN) length_unit_log
554 #endif
556 #define INSN_SHUID(INSN) (uid_shuid[INSN_UID (INSN)])
558 static int min_labelno, max_labelno;
560 #define LABEL_TO_ALIGNMENT(LABEL) \
561 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].alignment)
563 #define LABEL_TO_MAX_SKIP(LABEL) \
564 (label_align[CODE_LABEL_NUMBER (LABEL) - min_labelno].max_skip)
566 /* For the benefit of port specific code do this also as a function. */
569 label_to_alignment (rtx label)
571 return LABEL_TO_ALIGNMENT (label);
574 #ifdef HAVE_ATTR_length
575 /* The differences in addresses
576 between a branch and its target might grow or shrink depending on
577 the alignment the start insn of the range (the branch for a forward
578 branch or the label for a backward branch) starts out on; if these
579 differences are used naively, they can even oscillate infinitely.
580 We therefore want to compute a 'worst case' address difference that
581 is independent of the alignment the start insn of the range end
582 up on, and that is at least as large as the actual difference.
583 The function align_fuzz calculates the amount we have to add to the
584 naively computed difference, by traversing the part of the alignment
585 chain of the start insn of the range that is in front of the end insn
586 of the range, and considering for each alignment the maximum amount
587 that it might contribute to a size increase.
589 For casesi tables, we also want to know worst case minimum amounts of
590 address difference, in case a machine description wants to introduce
591 some common offset that is added to all offsets in a table.
592 For this purpose, align_fuzz with a growth argument of 0 computes the
593 appropriate adjustment. */
595 /* Compute the maximum delta by which the difference of the addresses of
596 START and END might grow / shrink due to a different address for start
597 which changes the size of alignment insns between START and END.
598 KNOWN_ALIGN_LOG is the alignment known for START.
599 GROWTH should be ~0 if the objective is to compute potential code size
600 increase, and 0 if the objective is to compute potential shrink.
601 The return value is undefined for any other value of GROWTH. */
603 static int
604 align_fuzz (rtx start, rtx end, int known_align_log, unsigned int growth)
606 int uid = INSN_UID (start);
607 rtx align_label;
608 int known_align = 1 << known_align_log;
609 int end_shuid = INSN_SHUID (end);
610 int fuzz = 0;
612 for (align_label = uid_align[uid]; align_label; align_label = uid_align[uid])
614 int align_addr, new_align;
616 uid = INSN_UID (align_label);
617 align_addr = INSN_ADDRESSES (uid) - insn_lengths[uid];
618 if (uid_shuid[uid] > end_shuid)
619 break;
620 known_align_log = LABEL_TO_ALIGNMENT (align_label);
621 new_align = 1 << known_align_log;
622 if (new_align < known_align)
623 continue;
624 fuzz += (-align_addr ^ growth) & (new_align - known_align);
625 known_align = new_align;
627 return fuzz;
630 /* Compute a worst-case reference address of a branch so that it
631 can be safely used in the presence of aligned labels. Since the
632 size of the branch itself is unknown, the size of the branch is
633 not included in the range. I.e. for a forward branch, the reference
634 address is the end address of the branch as known from the previous
635 branch shortening pass, minus a value to account for possible size
636 increase due to alignment. For a backward branch, it is the start
637 address of the branch as known from the current pass, plus a value
638 to account for possible size increase due to alignment.
639 NB.: Therefore, the maximum offset allowed for backward branches needs
640 to exclude the branch size. */
643 insn_current_reference_address (rtx branch)
645 rtx dest, seq;
646 int seq_uid;
648 if (! INSN_ADDRESSES_SET_P ())
649 return 0;
651 seq = NEXT_INSN (PREV_INSN (branch));
652 seq_uid = INSN_UID (seq);
653 if (!JUMP_P (branch))
654 /* This can happen for example on the PA; the objective is to know the
655 offset to address something in front of the start of the function.
656 Thus, we can treat it like a backward branch.
657 We assume here that FUNCTION_BOUNDARY / BITS_PER_UNIT is larger than
658 any alignment we'd encounter, so we skip the call to align_fuzz. */
659 return insn_current_address;
660 dest = JUMP_LABEL (branch);
662 /* BRANCH has no proper alignment chain set, so use SEQ.
663 BRANCH also has no INSN_SHUID. */
664 if (INSN_SHUID (seq) < INSN_SHUID (dest))
666 /* Forward branch. */
667 return (insn_last_address + insn_lengths[seq_uid]
668 - align_fuzz (seq, dest, length_unit_log, ~0));
670 else
672 /* Backward branch. */
673 return (insn_current_address
674 + align_fuzz (dest, seq, length_unit_log, ~0));
677 #endif /* HAVE_ATTR_length */
679 /* Compute branch alignments based on frequency information in the
680 CFG. */
682 static unsigned int
683 compute_alignments (void)
685 int log, max_skip, max_log;
686 basic_block bb;
688 if (label_align)
690 free (label_align);
691 label_align = 0;
694 max_labelno = max_label_num ();
695 min_labelno = get_first_label_num ();
696 label_align = XCNEWVEC (struct label_alignment, max_labelno - min_labelno + 1);
698 /* If not optimizing or optimizing for size, don't assign any alignments. */
699 if (! optimize || optimize_size)
700 return 0;
702 FOR_EACH_BB (bb)
704 rtx label = BB_HEAD (bb);
705 int fallthru_frequency = 0, branch_frequency = 0, has_fallthru = 0;
706 edge e;
707 edge_iterator ei;
709 if (!LABEL_P (label)
710 || probably_never_executed_bb_p (bb))
711 continue;
712 max_log = LABEL_ALIGN (label);
713 max_skip = LABEL_ALIGN_MAX_SKIP;
715 FOR_EACH_EDGE (e, ei, bb->preds)
717 if (e->flags & EDGE_FALLTHRU)
718 has_fallthru = 1, fallthru_frequency += EDGE_FREQUENCY (e);
719 else
720 branch_frequency += EDGE_FREQUENCY (e);
723 /* There are two purposes to align block with no fallthru incoming edge:
724 1) to avoid fetch stalls when branch destination is near cache boundary
725 2) to improve cache efficiency in case the previous block is not executed
726 (so it does not need to be in the cache).
728 We to catch first case, we align frequently executed blocks.
729 To catch the second, we align blocks that are executed more frequently
730 than the predecessor and the predecessor is likely to not be executed
731 when function is called. */
733 if (!has_fallthru
734 && (branch_frequency > BB_FREQ_MAX / 10
735 || (bb->frequency > bb->prev_bb->frequency * 10
736 && (bb->prev_bb->frequency
737 <= ENTRY_BLOCK_PTR->frequency / 2))))
739 log = JUMP_ALIGN (label);
740 if (max_log < log)
742 max_log = log;
743 max_skip = JUMP_ALIGN_MAX_SKIP;
746 /* In case block is frequent and reached mostly by non-fallthru edge,
747 align it. It is most likely a first block of loop. */
748 if (has_fallthru
749 && maybe_hot_bb_p (bb)
750 && branch_frequency + fallthru_frequency > BB_FREQ_MAX / 10
751 && branch_frequency > fallthru_frequency * 2)
753 log = LOOP_ALIGN (label);
754 if (max_log < log)
756 max_log = log;
757 max_skip = LOOP_ALIGN_MAX_SKIP;
760 LABEL_TO_ALIGNMENT (label) = max_log;
761 LABEL_TO_MAX_SKIP (label) = max_skip;
763 return 0;
766 struct tree_opt_pass pass_compute_alignments =
768 NULL, /* name */
769 NULL, /* gate */
770 compute_alignments, /* execute */
771 NULL, /* sub */
772 NULL, /* next */
773 0, /* static_pass_number */
774 0, /* tv_id */
775 0, /* properties_required */
776 0, /* properties_provided */
777 0, /* properties_destroyed */
778 0, /* todo_flags_start */
779 0, /* todo_flags_finish */
780 0 /* letter */
784 /* Make a pass over all insns and compute their actual lengths by shortening
785 any branches of variable length if possible. */
787 /* shorten_branches might be called multiple times: for example, the SH
788 port splits out-of-range conditional branches in MACHINE_DEPENDENT_REORG.
789 In order to do this, it needs proper length information, which it obtains
790 by calling shorten_branches. This cannot be collapsed with
791 shorten_branches itself into a single pass unless we also want to integrate
792 reorg.c, since the branch splitting exposes new instructions with delay
793 slots. */
795 void
796 shorten_branches (rtx first ATTRIBUTE_UNUSED)
798 rtx insn;
799 int max_uid;
800 int i;
801 int max_log;
802 int max_skip;
803 #ifdef HAVE_ATTR_length
804 #define MAX_CODE_ALIGN 16
805 rtx seq;
806 int something_changed = 1;
807 char *varying_length;
808 rtx body;
809 int uid;
810 rtx align_tab[MAX_CODE_ALIGN];
812 #endif
814 /* Compute maximum UID and allocate label_align / uid_shuid. */
815 max_uid = get_max_uid ();
817 /* Free uid_shuid before reallocating it. */
818 free (uid_shuid);
820 uid_shuid = XNEWVEC (int, max_uid);
822 if (max_labelno != max_label_num ())
824 int old = max_labelno;
825 int n_labels;
826 int n_old_labels;
828 max_labelno = max_label_num ();
830 n_labels = max_labelno - min_labelno + 1;
831 n_old_labels = old - min_labelno + 1;
833 label_align = xrealloc (label_align,
834 n_labels * sizeof (struct label_alignment));
836 /* Range of labels grows monotonically in the function. Failing here
837 means that the initialization of array got lost. */
838 gcc_assert (n_old_labels <= n_labels);
840 memset (label_align + n_old_labels, 0,
841 (n_labels - n_old_labels) * sizeof (struct label_alignment));
844 /* Initialize label_align and set up uid_shuid to be strictly
845 monotonically rising with insn order. */
846 /* We use max_log here to keep track of the maximum alignment we want to
847 impose on the next CODE_LABEL (or the current one if we are processing
848 the CODE_LABEL itself). */
850 max_log = 0;
851 max_skip = 0;
853 for (insn = get_insns (), i = 1; insn; insn = NEXT_INSN (insn))
855 int log;
857 INSN_SHUID (insn) = i++;
858 if (INSN_P (insn))
860 /* reorg might make the first insn of a loop being run once only,
861 and delete the label in front of it. Then we want to apply
862 the loop alignment to the new label created by reorg, which
863 is separated by the former loop start insn from the
864 NOTE_INSN_LOOP_BEG. */
866 else if (LABEL_P (insn))
868 rtx next;
870 /* Merge in alignments computed by compute_alignments. */
871 log = LABEL_TO_ALIGNMENT (insn);
872 if (max_log < log)
874 max_log = log;
875 max_skip = LABEL_TO_MAX_SKIP (insn);
878 log = LABEL_ALIGN (insn);
879 if (max_log < log)
881 max_log = log;
882 max_skip = LABEL_ALIGN_MAX_SKIP;
884 next = next_nonnote_insn (insn);
885 /* ADDR_VECs only take room if read-only data goes into the text
886 section. */
887 if (JUMP_TABLES_IN_TEXT_SECTION
888 || readonly_data_section == text_section)
889 if (next && JUMP_P (next))
891 rtx nextbody = PATTERN (next);
892 if (GET_CODE (nextbody) == ADDR_VEC
893 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
895 log = ADDR_VEC_ALIGN (next);
896 if (max_log < log)
898 max_log = log;
899 max_skip = LABEL_ALIGN_MAX_SKIP;
903 LABEL_TO_ALIGNMENT (insn) = max_log;
904 LABEL_TO_MAX_SKIP (insn) = max_skip;
905 max_log = 0;
906 max_skip = 0;
908 else if (BARRIER_P (insn))
910 rtx label;
912 for (label = insn; label && ! INSN_P (label);
913 label = NEXT_INSN (label))
914 if (LABEL_P (label))
916 log = LABEL_ALIGN_AFTER_BARRIER (insn);
917 if (max_log < log)
919 max_log = log;
920 max_skip = LABEL_ALIGN_AFTER_BARRIER_MAX_SKIP;
922 break;
926 #ifdef HAVE_ATTR_length
928 /* Allocate the rest of the arrays. */
929 insn_lengths = XNEWVEC (int, max_uid);
930 insn_lengths_max_uid = max_uid;
931 /* Syntax errors can lead to labels being outside of the main insn stream.
932 Initialize insn_addresses, so that we get reproducible results. */
933 INSN_ADDRESSES_ALLOC (max_uid);
935 varying_length = XCNEWVEC (char, max_uid);
937 /* Initialize uid_align. We scan instructions
938 from end to start, and keep in align_tab[n] the last seen insn
939 that does an alignment of at least n+1, i.e. the successor
940 in the alignment chain for an insn that does / has a known
941 alignment of n. */
942 uid_align = XCNEWVEC (rtx, max_uid);
944 for (i = MAX_CODE_ALIGN; --i >= 0;)
945 align_tab[i] = NULL_RTX;
946 seq = get_last_insn ();
947 for (; seq; seq = PREV_INSN (seq))
949 int uid = INSN_UID (seq);
950 int log;
951 log = (LABEL_P (seq) ? LABEL_TO_ALIGNMENT (seq) : 0);
952 uid_align[uid] = align_tab[0];
953 if (log)
955 /* Found an alignment label. */
956 uid_align[uid] = align_tab[log];
957 for (i = log - 1; i >= 0; i--)
958 align_tab[i] = seq;
961 #ifdef CASE_VECTOR_SHORTEN_MODE
962 if (optimize)
964 /* Look for ADDR_DIFF_VECs, and initialize their minimum and maximum
965 label fields. */
967 int min_shuid = INSN_SHUID (get_insns ()) - 1;
968 int max_shuid = INSN_SHUID (get_last_insn ()) + 1;
969 int rel;
971 for (insn = first; insn != 0; insn = NEXT_INSN (insn))
973 rtx min_lab = NULL_RTX, max_lab = NULL_RTX, pat;
974 int len, i, min, max, insn_shuid;
975 int min_align;
976 addr_diff_vec_flags flags;
978 if (!JUMP_P (insn)
979 || GET_CODE (PATTERN (insn)) != ADDR_DIFF_VEC)
980 continue;
981 pat = PATTERN (insn);
982 len = XVECLEN (pat, 1);
983 gcc_assert (len > 0);
984 min_align = MAX_CODE_ALIGN;
985 for (min = max_shuid, max = min_shuid, i = len - 1; i >= 0; i--)
987 rtx lab = XEXP (XVECEXP (pat, 1, i), 0);
988 int shuid = INSN_SHUID (lab);
989 if (shuid < min)
991 min = shuid;
992 min_lab = lab;
994 if (shuid > max)
996 max = shuid;
997 max_lab = lab;
999 if (min_align > LABEL_TO_ALIGNMENT (lab))
1000 min_align = LABEL_TO_ALIGNMENT (lab);
1002 XEXP (pat, 2) = gen_rtx_LABEL_REF (Pmode, min_lab);
1003 XEXP (pat, 3) = gen_rtx_LABEL_REF (Pmode, max_lab);
1004 insn_shuid = INSN_SHUID (insn);
1005 rel = INSN_SHUID (XEXP (XEXP (pat, 0), 0));
1006 memset (&flags, 0, sizeof (flags));
1007 flags.min_align = min_align;
1008 flags.base_after_vec = rel > insn_shuid;
1009 flags.min_after_vec = min > insn_shuid;
1010 flags.max_after_vec = max > insn_shuid;
1011 flags.min_after_base = min > rel;
1012 flags.max_after_base = max > rel;
1013 ADDR_DIFF_VEC_FLAGS (pat) = flags;
1016 #endif /* CASE_VECTOR_SHORTEN_MODE */
1018 /* Compute initial lengths, addresses, and varying flags for each insn. */
1019 for (insn_current_address = 0, insn = first;
1020 insn != 0;
1021 insn_current_address += insn_lengths[uid], insn = NEXT_INSN (insn))
1023 uid = INSN_UID (insn);
1025 insn_lengths[uid] = 0;
1027 if (LABEL_P (insn))
1029 int log = LABEL_TO_ALIGNMENT (insn);
1030 if (log)
1032 int align = 1 << log;
1033 int new_address = (insn_current_address + align - 1) & -align;
1034 insn_lengths[uid] = new_address - insn_current_address;
1038 INSN_ADDRESSES (uid) = insn_current_address + insn_lengths[uid];
1040 if (NOTE_P (insn) || BARRIER_P (insn)
1041 || LABEL_P (insn))
1042 continue;
1043 if (INSN_DELETED_P (insn))
1044 continue;
1046 body = PATTERN (insn);
1047 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1049 /* This only takes room if read-only data goes into the text
1050 section. */
1051 if (JUMP_TABLES_IN_TEXT_SECTION
1052 || readonly_data_section == text_section)
1053 insn_lengths[uid] = (XVECLEN (body,
1054 GET_CODE (body) == ADDR_DIFF_VEC)
1055 * GET_MODE_SIZE (GET_MODE (body)));
1056 /* Alignment is handled by ADDR_VEC_ALIGN. */
1058 else if (GET_CODE (body) == ASM_INPUT || asm_noperands (body) >= 0)
1059 insn_lengths[uid] = asm_insn_count (body) * insn_default_length (insn);
1060 else if (GET_CODE (body) == SEQUENCE)
1062 int i;
1063 int const_delay_slots;
1064 #ifdef DELAY_SLOTS
1065 const_delay_slots = const_num_delay_slots (XVECEXP (body, 0, 0));
1066 #else
1067 const_delay_slots = 0;
1068 #endif
1069 /* Inside a delay slot sequence, we do not do any branch shortening
1070 if the shortening could change the number of delay slots
1071 of the branch. */
1072 for (i = 0; i < XVECLEN (body, 0); i++)
1074 rtx inner_insn = XVECEXP (body, 0, i);
1075 int inner_uid = INSN_UID (inner_insn);
1076 int inner_length;
1078 if (GET_CODE (body) == ASM_INPUT
1079 || asm_noperands (PATTERN (XVECEXP (body, 0, i))) >= 0)
1080 inner_length = (asm_insn_count (PATTERN (inner_insn))
1081 * insn_default_length (inner_insn));
1082 else
1083 inner_length = insn_default_length (inner_insn);
1085 insn_lengths[inner_uid] = inner_length;
1086 if (const_delay_slots)
1088 if ((varying_length[inner_uid]
1089 = insn_variable_length_p (inner_insn)) != 0)
1090 varying_length[uid] = 1;
1091 INSN_ADDRESSES (inner_uid) = (insn_current_address
1092 + insn_lengths[uid]);
1094 else
1095 varying_length[inner_uid] = 0;
1096 insn_lengths[uid] += inner_length;
1099 else if (GET_CODE (body) != USE && GET_CODE (body) != CLOBBER)
1101 insn_lengths[uid] = insn_default_length (insn);
1102 varying_length[uid] = insn_variable_length_p (insn);
1105 /* If needed, do any adjustment. */
1106 #ifdef ADJUST_INSN_LENGTH
1107 ADJUST_INSN_LENGTH (insn, insn_lengths[uid]);
1108 if (insn_lengths[uid] < 0)
1109 fatal_insn ("negative insn length", insn);
1110 #endif
1113 /* Now loop over all the insns finding varying length insns. For each,
1114 get the current insn length. If it has changed, reflect the change.
1115 When nothing changes for a full pass, we are done. */
1117 while (something_changed)
1119 something_changed = 0;
1120 insn_current_align = MAX_CODE_ALIGN - 1;
1121 for (insn_current_address = 0, insn = first;
1122 insn != 0;
1123 insn = NEXT_INSN (insn))
1125 int new_length;
1126 #ifdef ADJUST_INSN_LENGTH
1127 int tmp_length;
1128 #endif
1129 int length_align;
1131 uid = INSN_UID (insn);
1133 if (LABEL_P (insn))
1135 int log = LABEL_TO_ALIGNMENT (insn);
1136 if (log > insn_current_align)
1138 int align = 1 << log;
1139 int new_address= (insn_current_address + align - 1) & -align;
1140 insn_lengths[uid] = new_address - insn_current_address;
1141 insn_current_align = log;
1142 insn_current_address = new_address;
1144 else
1145 insn_lengths[uid] = 0;
1146 INSN_ADDRESSES (uid) = insn_current_address;
1147 continue;
1150 length_align = INSN_LENGTH_ALIGNMENT (insn);
1151 if (length_align < insn_current_align)
1152 insn_current_align = length_align;
1154 insn_last_address = INSN_ADDRESSES (uid);
1155 INSN_ADDRESSES (uid) = insn_current_address;
1157 #ifdef CASE_VECTOR_SHORTEN_MODE
1158 if (optimize && JUMP_P (insn)
1159 && GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC)
1161 rtx body = PATTERN (insn);
1162 int old_length = insn_lengths[uid];
1163 rtx rel_lab = XEXP (XEXP (body, 0), 0);
1164 rtx min_lab = XEXP (XEXP (body, 2), 0);
1165 rtx max_lab = XEXP (XEXP (body, 3), 0);
1166 int rel_addr = INSN_ADDRESSES (INSN_UID (rel_lab));
1167 int min_addr = INSN_ADDRESSES (INSN_UID (min_lab));
1168 int max_addr = INSN_ADDRESSES (INSN_UID (max_lab));
1169 rtx prev;
1170 int rel_align = 0;
1171 addr_diff_vec_flags flags;
1173 /* Avoid automatic aggregate initialization. */
1174 flags = ADDR_DIFF_VEC_FLAGS (body);
1176 /* Try to find a known alignment for rel_lab. */
1177 for (prev = rel_lab;
1178 prev
1179 && ! insn_lengths[INSN_UID (prev)]
1180 && ! (varying_length[INSN_UID (prev)] & 1);
1181 prev = PREV_INSN (prev))
1182 if (varying_length[INSN_UID (prev)] & 2)
1184 rel_align = LABEL_TO_ALIGNMENT (prev);
1185 break;
1188 /* See the comment on addr_diff_vec_flags in rtl.h for the
1189 meaning of the flags values. base: REL_LAB vec: INSN */
1190 /* Anything after INSN has still addresses from the last
1191 pass; adjust these so that they reflect our current
1192 estimate for this pass. */
1193 if (flags.base_after_vec)
1194 rel_addr += insn_current_address - insn_last_address;
1195 if (flags.min_after_vec)
1196 min_addr += insn_current_address - insn_last_address;
1197 if (flags.max_after_vec)
1198 max_addr += insn_current_address - insn_last_address;
1199 /* We want to know the worst case, i.e. lowest possible value
1200 for the offset of MIN_LAB. If MIN_LAB is after REL_LAB,
1201 its offset is positive, and we have to be wary of code shrink;
1202 otherwise, it is negative, and we have to be vary of code
1203 size increase. */
1204 if (flags.min_after_base)
1206 /* If INSN is between REL_LAB and MIN_LAB, the size
1207 changes we are about to make can change the alignment
1208 within the observed offset, therefore we have to break
1209 it up into two parts that are independent. */
1210 if (! flags.base_after_vec && flags.min_after_vec)
1212 min_addr -= align_fuzz (rel_lab, insn, rel_align, 0);
1213 min_addr -= align_fuzz (insn, min_lab, 0, 0);
1215 else
1216 min_addr -= align_fuzz (rel_lab, min_lab, rel_align, 0);
1218 else
1220 if (flags.base_after_vec && ! flags.min_after_vec)
1222 min_addr -= align_fuzz (min_lab, insn, 0, ~0);
1223 min_addr -= align_fuzz (insn, rel_lab, 0, ~0);
1225 else
1226 min_addr -= align_fuzz (min_lab, rel_lab, 0, ~0);
1228 /* Likewise, determine the highest lowest possible value
1229 for the offset of MAX_LAB. */
1230 if (flags.max_after_base)
1232 if (! flags.base_after_vec && flags.max_after_vec)
1234 max_addr += align_fuzz (rel_lab, insn, rel_align, ~0);
1235 max_addr += align_fuzz (insn, max_lab, 0, ~0);
1237 else
1238 max_addr += align_fuzz (rel_lab, max_lab, rel_align, ~0);
1240 else
1242 if (flags.base_after_vec && ! flags.max_after_vec)
1244 max_addr += align_fuzz (max_lab, insn, 0, 0);
1245 max_addr += align_fuzz (insn, rel_lab, 0, 0);
1247 else
1248 max_addr += align_fuzz (max_lab, rel_lab, 0, 0);
1250 PUT_MODE (body, CASE_VECTOR_SHORTEN_MODE (min_addr - rel_addr,
1251 max_addr - rel_addr,
1252 body));
1253 if (JUMP_TABLES_IN_TEXT_SECTION
1254 || readonly_data_section == text_section)
1256 insn_lengths[uid]
1257 = (XVECLEN (body, 1) * GET_MODE_SIZE (GET_MODE (body)));
1258 insn_current_address += insn_lengths[uid];
1259 if (insn_lengths[uid] != old_length)
1260 something_changed = 1;
1263 continue;
1265 #endif /* CASE_VECTOR_SHORTEN_MODE */
1267 if (! (varying_length[uid]))
1269 if (NONJUMP_INSN_P (insn)
1270 && GET_CODE (PATTERN (insn)) == SEQUENCE)
1272 int i;
1274 body = PATTERN (insn);
1275 for (i = 0; i < XVECLEN (body, 0); i++)
1277 rtx inner_insn = XVECEXP (body, 0, i);
1278 int inner_uid = INSN_UID (inner_insn);
1280 INSN_ADDRESSES (inner_uid) = insn_current_address;
1282 insn_current_address += insn_lengths[inner_uid];
1285 else
1286 insn_current_address += insn_lengths[uid];
1288 continue;
1291 if (NONJUMP_INSN_P (insn) && GET_CODE (PATTERN (insn)) == SEQUENCE)
1293 int i;
1295 body = PATTERN (insn);
1296 new_length = 0;
1297 for (i = 0; i < XVECLEN (body, 0); i++)
1299 rtx inner_insn = XVECEXP (body, 0, i);
1300 int inner_uid = INSN_UID (inner_insn);
1301 int inner_length;
1303 INSN_ADDRESSES (inner_uid) = insn_current_address;
1305 /* insn_current_length returns 0 for insns with a
1306 non-varying length. */
1307 if (! varying_length[inner_uid])
1308 inner_length = insn_lengths[inner_uid];
1309 else
1310 inner_length = insn_current_length (inner_insn);
1312 if (inner_length != insn_lengths[inner_uid])
1314 insn_lengths[inner_uid] = inner_length;
1315 something_changed = 1;
1317 insn_current_address += insn_lengths[inner_uid];
1318 new_length += inner_length;
1321 else
1323 new_length = insn_current_length (insn);
1324 insn_current_address += new_length;
1327 #ifdef ADJUST_INSN_LENGTH
1328 /* If needed, do any adjustment. */
1329 tmp_length = new_length;
1330 ADJUST_INSN_LENGTH (insn, new_length);
1331 insn_current_address += (new_length - tmp_length);
1332 #endif
1334 if (new_length != insn_lengths[uid])
1336 insn_lengths[uid] = new_length;
1337 something_changed = 1;
1340 /* For a non-optimizing compile, do only a single pass. */
1341 if (!optimize)
1342 break;
1345 free (varying_length);
1347 #endif /* HAVE_ATTR_length */
1350 #ifdef HAVE_ATTR_length
1351 /* Given the body of an INSN known to be generated by an ASM statement, return
1352 the number of machine instructions likely to be generated for this insn.
1353 This is used to compute its length. */
1355 static int
1356 asm_insn_count (rtx body)
1358 const char *template;
1359 int count = 1;
1361 if (GET_CODE (body) == ASM_INPUT)
1362 template = XSTR (body, 0);
1363 else
1364 template = decode_asm_operands (body, NULL, NULL, NULL, NULL);
1366 for (; *template; template++)
1367 if (IS_ASM_LOGICAL_LINE_SEPARATOR (*template) || *template == '\n')
1368 count++;
1370 return count;
1372 #endif
1374 /* Output assembler code for the start of a function,
1375 and initialize some of the variables in this file
1376 for the new function. The label for the function and associated
1377 assembler pseudo-ops have already been output in `assemble_start_function'.
1379 FIRST is the first insn of the rtl for the function being compiled.
1380 FILE is the file to write assembler code to.
1381 OPTIMIZE is nonzero if we should eliminate redundant
1382 test and compare insns. */
1384 void
1385 final_start_function (rtx first ATTRIBUTE_UNUSED, FILE *file,
1386 int optimize ATTRIBUTE_UNUSED)
1388 block_depth = 0;
1390 this_is_asm_operands = 0;
1392 last_filename = locator_file (prologue_locator);
1393 last_linenum = locator_line (prologue_locator);
1395 high_block_linenum = high_function_linenum = last_linenum;
1397 (*debug_hooks->begin_prologue) (last_linenum, last_filename);
1399 #if defined (DWARF2_UNWIND_INFO) || defined (TARGET_UNWIND_INFO)
1400 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG)
1401 dwarf2out_begin_prologue (0, NULL);
1402 #endif
1404 #ifdef LEAF_REG_REMAP
1405 if (current_function_uses_only_leaf_regs)
1406 leaf_renumber_regs (first);
1407 #endif
1409 /* The Sun386i and perhaps other machines don't work right
1410 if the profiling code comes after the prologue. */
1411 #ifdef PROFILE_BEFORE_PROLOGUE
1412 if (current_function_profile)
1413 profile_function (file);
1414 #endif /* PROFILE_BEFORE_PROLOGUE */
1416 #if defined (DWARF2_UNWIND_INFO) && defined (HAVE_prologue)
1417 if (dwarf2out_do_frame ())
1418 dwarf2out_frame_debug (NULL_RTX, false);
1419 #endif
1421 /* If debugging, assign block numbers to all of the blocks in this
1422 function. */
1423 if (write_symbols)
1425 remove_unnecessary_notes ();
1426 reemit_insn_block_notes ();
1427 number_blocks (current_function_decl);
1428 /* We never actually put out begin/end notes for the top-level
1429 block in the function. But, conceptually, that block is
1430 always needed. */
1431 TREE_ASM_WRITTEN (DECL_INITIAL (current_function_decl)) = 1;
1434 /* First output the function prologue: code to set up the stack frame. */
1435 targetm.asm_out.function_prologue (file, get_frame_size ());
1437 /* If the machine represents the prologue as RTL, the profiling code must
1438 be emitted when NOTE_INSN_PROLOGUE_END is scanned. */
1439 #ifdef HAVE_prologue
1440 if (! HAVE_prologue)
1441 #endif
1442 profile_after_prologue (file);
1445 static void
1446 profile_after_prologue (FILE *file ATTRIBUTE_UNUSED)
1448 #ifndef PROFILE_BEFORE_PROLOGUE
1449 if (current_function_profile)
1450 profile_function (file);
1451 #endif /* not PROFILE_BEFORE_PROLOGUE */
1454 static void
1455 profile_function (FILE *file ATTRIBUTE_UNUSED)
1457 #ifndef NO_PROFILE_COUNTERS
1458 # define NO_PROFILE_COUNTERS 0
1459 #endif
1460 #if defined(ASM_OUTPUT_REG_PUSH)
1461 int sval = current_function_returns_struct;
1462 rtx svrtx = targetm.calls.struct_value_rtx (TREE_TYPE (current_function_decl), 1);
1463 #if defined(STATIC_CHAIN_INCOMING_REGNUM) || defined(STATIC_CHAIN_REGNUM)
1464 int cxt = cfun->static_chain_decl != NULL;
1465 #endif
1466 #endif /* ASM_OUTPUT_REG_PUSH */
1468 if (! NO_PROFILE_COUNTERS)
1470 int align = MIN (BIGGEST_ALIGNMENT, LONG_TYPE_SIZE);
1471 switch_to_section (data_section);
1472 ASM_OUTPUT_ALIGN (file, floor_log2 (align / BITS_PER_UNIT));
1473 targetm.asm_out.internal_label (file, "LP", current_function_funcdef_no);
1474 assemble_integer (const0_rtx, LONG_TYPE_SIZE / BITS_PER_UNIT, align, 1);
1477 switch_to_section (current_function_section ());
1479 #if defined(ASM_OUTPUT_REG_PUSH)
1480 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1481 ASM_OUTPUT_REG_PUSH (file, REGNO (svrtx));
1482 #endif
1484 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1485 if (cxt)
1486 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_INCOMING_REGNUM);
1487 #else
1488 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1489 if (cxt)
1491 ASM_OUTPUT_REG_PUSH (file, STATIC_CHAIN_REGNUM);
1493 #endif
1494 #endif
1496 FUNCTION_PROFILER (file, current_function_funcdef_no);
1498 #if defined(STATIC_CHAIN_INCOMING_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1499 if (cxt)
1500 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_INCOMING_REGNUM);
1501 #else
1502 #if defined(STATIC_CHAIN_REGNUM) && defined(ASM_OUTPUT_REG_PUSH)
1503 if (cxt)
1505 ASM_OUTPUT_REG_POP (file, STATIC_CHAIN_REGNUM);
1507 #endif
1508 #endif
1510 #if defined(ASM_OUTPUT_REG_PUSH)
1511 if (sval && svrtx != NULL_RTX && REG_P (svrtx))
1512 ASM_OUTPUT_REG_POP (file, REGNO (svrtx));
1513 #endif
1516 /* Output assembler code for the end of a function.
1517 For clarity, args are same as those of `final_start_function'
1518 even though not all of them are needed. */
1520 void
1521 final_end_function (void)
1523 app_disable ();
1525 (*debug_hooks->end_function) (high_function_linenum);
1527 /* Finally, output the function epilogue:
1528 code to restore the stack frame and return to the caller. */
1529 targetm.asm_out.function_epilogue (asm_out_file, get_frame_size ());
1531 /* And debug output. */
1532 (*debug_hooks->end_epilogue) (last_linenum, last_filename);
1534 #if defined (DWARF2_UNWIND_INFO)
1535 if (write_symbols != DWARF2_DEBUG && write_symbols != VMS_AND_DWARF2_DEBUG
1536 && dwarf2out_do_frame ())
1537 dwarf2out_end_epilogue (last_linenum, last_filename);
1538 #endif
1541 /* Output assembler code for some insns: all or part of a function.
1542 For description of args, see `final_start_function', above. */
1544 void
1545 final (rtx first, FILE *file, int optimize)
1547 rtx insn;
1548 int max_uid = 0;
1549 int seen = 0;
1551 last_ignored_compare = 0;
1553 #ifdef SDB_DEBUGGING_INFO
1554 /* When producing SDB debugging info, delete troublesome line number
1555 notes from inlined functions in other files as well as duplicate
1556 line number notes. */
1557 if (write_symbols == SDB_DEBUG)
1559 rtx last = 0;
1560 for (insn = first; insn; insn = NEXT_INSN (insn))
1561 if (NOTE_P (insn) && NOTE_LINE_NUMBER (insn) > 0)
1563 if (last != 0
1564 #ifdef USE_MAPPED_LOCATION
1565 && NOTE_SOURCE_LOCATION (insn) == NOTE_SOURCE_LOCATION (last)
1566 #else
1567 && NOTE_LINE_NUMBER (insn) == NOTE_LINE_NUMBER (last)
1568 && NOTE_SOURCE_FILE (insn) == NOTE_SOURCE_FILE (last)
1569 #endif
1572 delete_insn (insn); /* Use delete_note. */
1573 continue;
1575 last = insn;
1578 #endif
1580 for (insn = first; insn; insn = NEXT_INSN (insn))
1582 if (INSN_UID (insn) > max_uid) /* Find largest UID. */
1583 max_uid = INSN_UID (insn);
1584 #ifdef HAVE_cc0
1585 /* If CC tracking across branches is enabled, record the insn which
1586 jumps to each branch only reached from one place. */
1587 if (optimize && JUMP_P (insn))
1589 rtx lab = JUMP_LABEL (insn);
1590 if (lab && LABEL_NUSES (lab) == 1)
1592 LABEL_REFS (lab) = insn;
1595 #endif
1598 init_recog ();
1600 CC_STATUS_INIT;
1602 /* Output the insns. */
1603 for (insn = NEXT_INSN (first); insn;)
1605 #ifdef HAVE_ATTR_length
1606 if ((unsigned) INSN_UID (insn) >= INSN_ADDRESSES_SIZE ())
1608 /* This can be triggered by bugs elsewhere in the compiler if
1609 new insns are created after init_insn_lengths is called. */
1610 gcc_assert (NOTE_P (insn));
1611 insn_current_address = -1;
1613 else
1614 insn_current_address = INSN_ADDRESSES (INSN_UID (insn));
1615 #endif /* HAVE_ATTR_length */
1617 insn = final_scan_insn (insn, file, optimize, 0, &seen);
1621 const char *
1622 get_insn_template (int code, rtx insn)
1624 switch (insn_data[code].output_format)
1626 case INSN_OUTPUT_FORMAT_SINGLE:
1627 return insn_data[code].output.single;
1628 case INSN_OUTPUT_FORMAT_MULTI:
1629 return insn_data[code].output.multi[which_alternative];
1630 case INSN_OUTPUT_FORMAT_FUNCTION:
1631 gcc_assert (insn);
1632 return (*insn_data[code].output.function) (recog_data.operand, insn);
1634 default:
1635 gcc_unreachable ();
1639 /* Emit the appropriate declaration for an alternate-entry-point
1640 symbol represented by INSN, to FILE. INSN is a CODE_LABEL with
1641 LABEL_KIND != LABEL_NORMAL.
1643 The case fall-through in this function is intentional. */
1644 static void
1645 output_alternate_entry_point (FILE *file, rtx insn)
1647 const char *name = LABEL_NAME (insn);
1649 switch (LABEL_KIND (insn))
1651 case LABEL_WEAK_ENTRY:
1652 #ifdef ASM_WEAKEN_LABEL
1653 ASM_WEAKEN_LABEL (file, name);
1654 #endif
1655 case LABEL_GLOBAL_ENTRY:
1656 targetm.asm_out.globalize_label (file, name);
1657 case LABEL_STATIC_ENTRY:
1658 #ifdef ASM_OUTPUT_TYPE_DIRECTIVE
1659 ASM_OUTPUT_TYPE_DIRECTIVE (file, name, "function");
1660 #endif
1661 ASM_OUTPUT_LABEL (file, name);
1662 break;
1664 case LABEL_NORMAL:
1665 default:
1666 gcc_unreachable ();
1670 /* The final scan for one insn, INSN.
1671 Args are same as in `final', except that INSN
1672 is the insn being scanned.
1673 Value returned is the next insn to be scanned.
1675 NOPEEPHOLES is the flag to disallow peephole processing (currently
1676 used for within delayed branch sequence output).
1678 SEEN is used to track the end of the prologue, for emitting
1679 debug information. We force the emission of a line note after
1680 both NOTE_INSN_PROLOGUE_END and NOTE_INSN_FUNCTION_BEG, or
1681 at the beginning of the second basic block, whichever comes
1682 first. */
1685 final_scan_insn (rtx insn, FILE *file, int optimize ATTRIBUTE_UNUSED,
1686 int nopeepholes ATTRIBUTE_UNUSED, int *seen)
1688 #ifdef HAVE_cc0
1689 rtx set;
1690 #endif
1691 rtx next;
1693 insn_counter++;
1695 /* Ignore deleted insns. These can occur when we split insns (due to a
1696 template of "#") while not optimizing. */
1697 if (INSN_DELETED_P (insn))
1698 return NEXT_INSN (insn);
1700 switch (GET_CODE (insn))
1702 case NOTE:
1703 switch (NOTE_LINE_NUMBER (insn))
1705 case NOTE_INSN_DELETED:
1706 case NOTE_INSN_LOOP_BEG:
1707 case NOTE_INSN_LOOP_END:
1708 case NOTE_INSN_FUNCTION_END:
1709 case NOTE_INSN_REPEATED_LINE_NUMBER:
1710 case NOTE_INSN_EXPECTED_VALUE:
1711 break;
1713 case NOTE_INSN_SWITCH_TEXT_SECTIONS:
1714 in_cold_section_p = !in_cold_section_p;
1715 (*debug_hooks->switch_text_section) ();
1716 switch_to_section (current_function_section ());
1717 break;
1719 case NOTE_INSN_BASIC_BLOCK:
1721 #ifdef TARGET_UNWIND_INFO
1722 targetm.asm_out.unwind_emit (asm_out_file, insn);
1723 #endif
1725 if (flag_debug_asm)
1726 fprintf (asm_out_file, "\t%s basic block %d\n",
1727 ASM_COMMENT_START, NOTE_BASIC_BLOCK (insn)->index);
1729 if ((*seen & (SEEN_EMITTED | SEEN_BB)) == SEEN_BB)
1731 *seen |= SEEN_EMITTED;
1732 force_source_line = true;
1734 else
1735 *seen |= SEEN_BB;
1737 break;
1739 case NOTE_INSN_EH_REGION_BEG:
1740 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHB",
1741 NOTE_EH_HANDLER (insn));
1742 break;
1744 case NOTE_INSN_EH_REGION_END:
1745 ASM_OUTPUT_DEBUG_LABEL (asm_out_file, "LEHE",
1746 NOTE_EH_HANDLER (insn));
1747 break;
1749 case NOTE_INSN_PROLOGUE_END:
1750 targetm.asm_out.function_end_prologue (file);
1751 profile_after_prologue (file);
1753 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1755 *seen |= SEEN_EMITTED;
1756 force_source_line = true;
1758 else
1759 *seen |= SEEN_NOTE;
1761 break;
1763 case NOTE_INSN_EPILOGUE_BEG:
1764 targetm.asm_out.function_begin_epilogue (file);
1765 break;
1767 case NOTE_INSN_FUNCTION_BEG:
1768 app_disable ();
1769 (*debug_hooks->end_prologue) (last_linenum, last_filename);
1771 if ((*seen & (SEEN_EMITTED | SEEN_NOTE)) == SEEN_NOTE)
1773 *seen |= SEEN_EMITTED;
1774 force_source_line = true;
1776 else
1777 *seen |= SEEN_NOTE;
1779 break;
1781 case NOTE_INSN_BLOCK_BEG:
1782 if (debug_info_level == DINFO_LEVEL_NORMAL
1783 || debug_info_level == DINFO_LEVEL_VERBOSE
1784 || write_symbols == DWARF2_DEBUG
1785 || write_symbols == VMS_AND_DWARF2_DEBUG
1786 || write_symbols == VMS_DEBUG)
1788 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1790 app_disable ();
1791 ++block_depth;
1792 high_block_linenum = last_linenum;
1794 /* Output debugging info about the symbol-block beginning. */
1795 (*debug_hooks->begin_block) (last_linenum, n);
1797 /* Mark this block as output. */
1798 TREE_ASM_WRITTEN (NOTE_BLOCK (insn)) = 1;
1800 break;
1802 case NOTE_INSN_BLOCK_END:
1803 if (debug_info_level == DINFO_LEVEL_NORMAL
1804 || debug_info_level == DINFO_LEVEL_VERBOSE
1805 || write_symbols == DWARF2_DEBUG
1806 || write_symbols == VMS_AND_DWARF2_DEBUG
1807 || write_symbols == VMS_DEBUG)
1809 int n = BLOCK_NUMBER (NOTE_BLOCK (insn));
1811 app_disable ();
1813 /* End of a symbol-block. */
1814 --block_depth;
1815 gcc_assert (block_depth >= 0);
1817 (*debug_hooks->end_block) (high_block_linenum, n);
1819 break;
1821 case NOTE_INSN_DELETED_LABEL:
1822 /* Emit the label. We may have deleted the CODE_LABEL because
1823 the label could be proved to be unreachable, though still
1824 referenced (in the form of having its address taken. */
1825 ASM_OUTPUT_DEBUG_LABEL (file, "L", CODE_LABEL_NUMBER (insn));
1826 break;
1828 case NOTE_INSN_VAR_LOCATION:
1829 (*debug_hooks->var_location) (insn);
1830 break;
1832 case 0:
1833 break;
1835 default:
1836 gcc_assert (NOTE_LINE_NUMBER (insn) > 0);
1837 break;
1839 break;
1841 case BARRIER:
1842 #if defined (DWARF2_UNWIND_INFO)
1843 if (dwarf2out_do_frame ())
1844 dwarf2out_frame_debug (insn, false);
1845 #endif
1846 break;
1848 case CODE_LABEL:
1849 /* The target port might emit labels in the output function for
1850 some insn, e.g. sh.c output_branchy_insn. */
1851 if (CODE_LABEL_NUMBER (insn) <= max_labelno)
1853 int align = LABEL_TO_ALIGNMENT (insn);
1854 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1855 int max_skip = LABEL_TO_MAX_SKIP (insn);
1856 #endif
1858 if (align && NEXT_INSN (insn))
1860 #ifdef ASM_OUTPUT_MAX_SKIP_ALIGN
1861 ASM_OUTPUT_MAX_SKIP_ALIGN (file, align, max_skip);
1862 #else
1863 #ifdef ASM_OUTPUT_ALIGN_WITH_NOP
1864 ASM_OUTPUT_ALIGN_WITH_NOP (file, align);
1865 #else
1866 ASM_OUTPUT_ALIGN (file, align);
1867 #endif
1868 #endif
1871 #ifdef HAVE_cc0
1872 CC_STATUS_INIT;
1873 /* If this label is reached from only one place, set the condition
1874 codes from the instruction just before the branch. */
1876 /* Disabled because some insns set cc_status in the C output code
1877 and NOTICE_UPDATE_CC alone can set incorrect status. */
1878 if (0 /* optimize && LABEL_NUSES (insn) == 1*/)
1880 rtx jump = LABEL_REFS (insn);
1881 rtx barrier = prev_nonnote_insn (insn);
1882 rtx prev;
1883 /* If the LABEL_REFS field of this label has been set to point
1884 at a branch, the predecessor of the branch is a regular
1885 insn, and that branch is the only way to reach this label,
1886 set the condition codes based on the branch and its
1887 predecessor. */
1888 if (barrier && BARRIER_P (barrier)
1889 && jump && JUMP_P (jump)
1890 && (prev = prev_nonnote_insn (jump))
1891 && NONJUMP_INSN_P (prev))
1893 NOTICE_UPDATE_CC (PATTERN (prev), prev);
1894 NOTICE_UPDATE_CC (PATTERN (jump), jump);
1897 #endif
1899 if (LABEL_NAME (insn))
1900 (*debug_hooks->label) (insn);
1902 if (app_on)
1904 fputs (ASM_APP_OFF, file);
1905 app_on = 0;
1908 next = next_nonnote_insn (insn);
1909 if (next != 0 && JUMP_P (next))
1911 rtx nextbody = PATTERN (next);
1913 /* If this label is followed by a jump-table,
1914 make sure we put the label in the read-only section. Also
1915 possibly write the label and jump table together. */
1917 if (GET_CODE (nextbody) == ADDR_VEC
1918 || GET_CODE (nextbody) == ADDR_DIFF_VEC)
1920 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
1921 /* In this case, the case vector is being moved by the
1922 target, so don't output the label at all. Leave that
1923 to the back end macros. */
1924 #else
1925 if (! JUMP_TABLES_IN_TEXT_SECTION)
1927 int log_align;
1929 switch_to_section (targetm.asm_out.function_rodata_section
1930 (current_function_decl));
1932 #ifdef ADDR_VEC_ALIGN
1933 log_align = ADDR_VEC_ALIGN (next);
1934 #else
1935 log_align = exact_log2 (BIGGEST_ALIGNMENT / BITS_PER_UNIT);
1936 #endif
1937 ASM_OUTPUT_ALIGN (file, log_align);
1939 else
1940 switch_to_section (current_function_section ());
1942 #ifdef ASM_OUTPUT_CASE_LABEL
1943 ASM_OUTPUT_CASE_LABEL (file, "L", CODE_LABEL_NUMBER (insn),
1944 next);
1945 #else
1946 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1947 #endif
1948 #endif
1949 break;
1952 if (LABEL_ALT_ENTRY_P (insn))
1953 output_alternate_entry_point (file, insn);
1954 else
1955 targetm.asm_out.internal_label (file, "L", CODE_LABEL_NUMBER (insn));
1956 break;
1958 default:
1960 rtx body = PATTERN (insn);
1961 int insn_code_number;
1962 const char *template;
1964 /* An INSN, JUMP_INSN or CALL_INSN.
1965 First check for special kinds that recog doesn't recognize. */
1967 if (GET_CODE (body) == USE /* These are just declarations. */
1968 || GET_CODE (body) == CLOBBER)
1969 break;
1971 #ifdef HAVE_cc0
1973 /* If there is a REG_CC_SETTER note on this insn, it means that
1974 the setting of the condition code was done in the delay slot
1975 of the insn that branched here. So recover the cc status
1976 from the insn that set it. */
1978 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
1979 if (note)
1981 NOTICE_UPDATE_CC (PATTERN (XEXP (note, 0)), XEXP (note, 0));
1982 cc_prev_status = cc_status;
1985 #endif
1987 /* Detect insns that are really jump-tables
1988 and output them as such. */
1990 if (GET_CODE (body) == ADDR_VEC || GET_CODE (body) == ADDR_DIFF_VEC)
1992 #if !(defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC))
1993 int vlen, idx;
1994 #endif
1996 if (! JUMP_TABLES_IN_TEXT_SECTION)
1997 switch_to_section (targetm.asm_out.function_rodata_section
1998 (current_function_decl));
1999 else
2000 switch_to_section (current_function_section ());
2002 if (app_on)
2004 fputs (ASM_APP_OFF, file);
2005 app_on = 0;
2008 #if defined(ASM_OUTPUT_ADDR_VEC) || defined(ASM_OUTPUT_ADDR_DIFF_VEC)
2009 if (GET_CODE (body) == ADDR_VEC)
2011 #ifdef ASM_OUTPUT_ADDR_VEC
2012 ASM_OUTPUT_ADDR_VEC (PREV_INSN (insn), body);
2013 #else
2014 gcc_unreachable ();
2015 #endif
2017 else
2019 #ifdef ASM_OUTPUT_ADDR_DIFF_VEC
2020 ASM_OUTPUT_ADDR_DIFF_VEC (PREV_INSN (insn), body);
2021 #else
2022 gcc_unreachable ();
2023 #endif
2025 #else
2026 vlen = XVECLEN (body, GET_CODE (body) == ADDR_DIFF_VEC);
2027 for (idx = 0; idx < vlen; idx++)
2029 if (GET_CODE (body) == ADDR_VEC)
2031 #ifdef ASM_OUTPUT_ADDR_VEC_ELT
2032 ASM_OUTPUT_ADDR_VEC_ELT
2033 (file, CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 0, idx), 0)));
2034 #else
2035 gcc_unreachable ();
2036 #endif
2038 else
2040 #ifdef ASM_OUTPUT_ADDR_DIFF_ELT
2041 ASM_OUTPUT_ADDR_DIFF_ELT
2042 (file,
2043 body,
2044 CODE_LABEL_NUMBER (XEXP (XVECEXP (body, 1, idx), 0)),
2045 CODE_LABEL_NUMBER (XEXP (XEXP (body, 0), 0)));
2046 #else
2047 gcc_unreachable ();
2048 #endif
2051 #ifdef ASM_OUTPUT_CASE_END
2052 ASM_OUTPUT_CASE_END (file,
2053 CODE_LABEL_NUMBER (PREV_INSN (insn)),
2054 insn);
2055 #endif
2056 #endif
2058 switch_to_section (current_function_section ());
2060 break;
2062 /* Output this line note if it is the first or the last line
2063 note in a row. */
2064 if (notice_source_line (insn))
2066 (*debug_hooks->source_line) (last_linenum, last_filename);
2069 if (GET_CODE (body) == ASM_INPUT)
2071 const char *string = XSTR (body, 0);
2073 /* There's no telling what that did to the condition codes. */
2074 CC_STATUS_INIT;
2076 if (string[0])
2078 if (! app_on)
2080 fputs (ASM_APP_ON, file);
2081 app_on = 1;
2083 fprintf (asm_out_file, "\t%s\n", string);
2085 break;
2088 /* Detect `asm' construct with operands. */
2089 if (asm_noperands (body) >= 0)
2091 unsigned int noperands = asm_noperands (body);
2092 rtx *ops = alloca (noperands * sizeof (rtx));
2093 const char *string;
2095 /* There's no telling what that did to the condition codes. */
2096 CC_STATUS_INIT;
2098 /* Get out the operand values. */
2099 string = decode_asm_operands (body, ops, NULL, NULL, NULL);
2100 /* Inhibit dieing on what would otherwise be compiler bugs. */
2101 insn_noperands = noperands;
2102 this_is_asm_operands = insn;
2104 #ifdef FINAL_PRESCAN_INSN
2105 FINAL_PRESCAN_INSN (insn, ops, insn_noperands);
2106 #endif
2108 /* Output the insn using them. */
2109 if (string[0])
2111 if (! app_on)
2113 fputs (ASM_APP_ON, file);
2114 app_on = 1;
2116 output_asm_insn (string, ops);
2119 this_is_asm_operands = 0;
2120 break;
2123 if (app_on)
2125 fputs (ASM_APP_OFF, file);
2126 app_on = 0;
2129 if (GET_CODE (body) == SEQUENCE)
2131 /* A delayed-branch sequence */
2132 int i;
2134 final_sequence = body;
2136 /* Record the delay slots' frame information before the branch.
2137 This is needed for delayed calls: see execute_cfa_program(). */
2138 #if defined (DWARF2_UNWIND_INFO)
2139 if (dwarf2out_do_frame ())
2140 for (i = 1; i < XVECLEN (body, 0); i++)
2141 dwarf2out_frame_debug (XVECEXP (body, 0, i), false);
2142 #endif
2144 /* The first insn in this SEQUENCE might be a JUMP_INSN that will
2145 force the restoration of a comparison that was previously
2146 thought unnecessary. If that happens, cancel this sequence
2147 and cause that insn to be restored. */
2149 next = final_scan_insn (XVECEXP (body, 0, 0), file, 0, 1, seen);
2150 if (next != XVECEXP (body, 0, 1))
2152 final_sequence = 0;
2153 return next;
2156 for (i = 1; i < XVECLEN (body, 0); i++)
2158 rtx insn = XVECEXP (body, 0, i);
2159 rtx next = NEXT_INSN (insn);
2160 /* We loop in case any instruction in a delay slot gets
2161 split. */
2163 insn = final_scan_insn (insn, file, 0, 1, seen);
2164 while (insn != next);
2166 #ifdef DBR_OUTPUT_SEQEND
2167 DBR_OUTPUT_SEQEND (file);
2168 #endif
2169 final_sequence = 0;
2171 /* If the insn requiring the delay slot was a CALL_INSN, the
2172 insns in the delay slot are actually executed before the
2173 called function. Hence we don't preserve any CC-setting
2174 actions in these insns and the CC must be marked as being
2175 clobbered by the function. */
2176 if (CALL_P (XVECEXP (body, 0, 0)))
2178 CC_STATUS_INIT;
2180 break;
2183 /* We have a real machine instruction as rtl. */
2185 body = PATTERN (insn);
2187 #ifdef HAVE_cc0
2188 set = single_set (insn);
2190 /* Check for redundant test and compare instructions
2191 (when the condition codes are already set up as desired).
2192 This is done only when optimizing; if not optimizing,
2193 it should be possible for the user to alter a variable
2194 with the debugger in between statements
2195 and the next statement should reexamine the variable
2196 to compute the condition codes. */
2198 if (optimize)
2200 if (set
2201 && GET_CODE (SET_DEST (set)) == CC0
2202 && insn != last_ignored_compare)
2204 if (GET_CODE (SET_SRC (set)) == SUBREG)
2205 SET_SRC (set) = alter_subreg (&SET_SRC (set));
2206 else if (GET_CODE (SET_SRC (set)) == COMPARE)
2208 if (GET_CODE (XEXP (SET_SRC (set), 0)) == SUBREG)
2209 XEXP (SET_SRC (set), 0)
2210 = alter_subreg (&XEXP (SET_SRC (set), 0));
2211 if (GET_CODE (XEXP (SET_SRC (set), 1)) == SUBREG)
2212 XEXP (SET_SRC (set), 1)
2213 = alter_subreg (&XEXP (SET_SRC (set), 1));
2215 if ((cc_status.value1 != 0
2216 && rtx_equal_p (SET_SRC (set), cc_status.value1))
2217 || (cc_status.value2 != 0
2218 && rtx_equal_p (SET_SRC (set), cc_status.value2)))
2220 /* Don't delete insn if it has an addressing side-effect. */
2221 if (! FIND_REG_INC_NOTE (insn, NULL_RTX)
2222 /* or if anything in it is volatile. */
2223 && ! volatile_refs_p (PATTERN (insn)))
2225 /* We don't really delete the insn; just ignore it. */
2226 last_ignored_compare = insn;
2227 break;
2232 #endif
2234 #ifdef HAVE_cc0
2235 /* If this is a conditional branch, maybe modify it
2236 if the cc's are in a nonstandard state
2237 so that it accomplishes the same thing that it would
2238 do straightforwardly if the cc's were set up normally. */
2240 if (cc_status.flags != 0
2241 && JUMP_P (insn)
2242 && GET_CODE (body) == SET
2243 && SET_DEST (body) == pc_rtx
2244 && GET_CODE (SET_SRC (body)) == IF_THEN_ELSE
2245 && COMPARISON_P (XEXP (SET_SRC (body), 0))
2246 && XEXP (XEXP (SET_SRC (body), 0), 0) == cc0_rtx)
2248 /* This function may alter the contents of its argument
2249 and clear some of the cc_status.flags bits.
2250 It may also return 1 meaning condition now always true
2251 or -1 meaning condition now always false
2252 or 2 meaning condition nontrivial but altered. */
2253 int result = alter_cond (XEXP (SET_SRC (body), 0));
2254 /* If condition now has fixed value, replace the IF_THEN_ELSE
2255 with its then-operand or its else-operand. */
2256 if (result == 1)
2257 SET_SRC (body) = XEXP (SET_SRC (body), 1);
2258 if (result == -1)
2259 SET_SRC (body) = XEXP (SET_SRC (body), 2);
2261 /* The jump is now either unconditional or a no-op.
2262 If it has become a no-op, don't try to output it.
2263 (It would not be recognized.) */
2264 if (SET_SRC (body) == pc_rtx)
2266 delete_insn (insn);
2267 break;
2269 else if (GET_CODE (SET_SRC (body)) == RETURN)
2270 /* Replace (set (pc) (return)) with (return). */
2271 PATTERN (insn) = body = SET_SRC (body);
2273 /* Rerecognize the instruction if it has changed. */
2274 if (result != 0)
2275 INSN_CODE (insn) = -1;
2278 /* Make same adjustments to instructions that examine the
2279 condition codes without jumping and instructions that
2280 handle conditional moves (if this machine has either one). */
2282 if (cc_status.flags != 0
2283 && set != 0)
2285 rtx cond_rtx, then_rtx, else_rtx;
2287 if (!JUMP_P (insn)
2288 && GET_CODE (SET_SRC (set)) == IF_THEN_ELSE)
2290 cond_rtx = XEXP (SET_SRC (set), 0);
2291 then_rtx = XEXP (SET_SRC (set), 1);
2292 else_rtx = XEXP (SET_SRC (set), 2);
2294 else
2296 cond_rtx = SET_SRC (set);
2297 then_rtx = const_true_rtx;
2298 else_rtx = const0_rtx;
2301 switch (GET_CODE (cond_rtx))
2303 case GTU:
2304 case GT:
2305 case LTU:
2306 case LT:
2307 case GEU:
2308 case GE:
2309 case LEU:
2310 case LE:
2311 case EQ:
2312 case NE:
2314 int result;
2315 if (XEXP (cond_rtx, 0) != cc0_rtx)
2316 break;
2317 result = alter_cond (cond_rtx);
2318 if (result == 1)
2319 validate_change (insn, &SET_SRC (set), then_rtx, 0);
2320 else if (result == -1)
2321 validate_change (insn, &SET_SRC (set), else_rtx, 0);
2322 else if (result == 2)
2323 INSN_CODE (insn) = -1;
2324 if (SET_DEST (set) == SET_SRC (set))
2325 delete_insn (insn);
2327 break;
2329 default:
2330 break;
2334 #endif
2336 #ifdef HAVE_peephole
2337 /* Do machine-specific peephole optimizations if desired. */
2339 if (optimize && !flag_no_peephole && !nopeepholes)
2341 rtx next = peephole (insn);
2342 /* When peepholing, if there were notes within the peephole,
2343 emit them before the peephole. */
2344 if (next != 0 && next != NEXT_INSN (insn))
2346 rtx note, prev = PREV_INSN (insn);
2348 for (note = NEXT_INSN (insn); note != next;
2349 note = NEXT_INSN (note))
2350 final_scan_insn (note, file, optimize, nopeepholes, seen);
2352 /* Put the notes in the proper position for a later
2353 rescan. For example, the SH target can do this
2354 when generating a far jump in a delayed branch
2355 sequence. */
2356 note = NEXT_INSN (insn);
2357 PREV_INSN (note) = prev;
2358 NEXT_INSN (prev) = note;
2359 NEXT_INSN (PREV_INSN (next)) = insn;
2360 PREV_INSN (insn) = PREV_INSN (next);
2361 NEXT_INSN (insn) = next;
2362 PREV_INSN (next) = insn;
2365 /* PEEPHOLE might have changed this. */
2366 body = PATTERN (insn);
2368 #endif
2370 /* Try to recognize the instruction.
2371 If successful, verify that the operands satisfy the
2372 constraints for the instruction. Crash if they don't,
2373 since `reload' should have changed them so that they do. */
2375 insn_code_number = recog_memoized (insn);
2376 cleanup_subreg_operands (insn);
2378 /* Dump the insn in the assembly for debugging. */
2379 if (flag_dump_rtl_in_asm)
2381 print_rtx_head = ASM_COMMENT_START;
2382 print_rtl_single (asm_out_file, insn);
2383 print_rtx_head = "";
2386 if (! constrain_operands_cached (1))
2387 fatal_insn_not_found (insn);
2389 /* Some target machines need to prescan each insn before
2390 it is output. */
2392 #ifdef FINAL_PRESCAN_INSN
2393 FINAL_PRESCAN_INSN (insn, recog_data.operand, recog_data.n_operands);
2394 #endif
2396 #ifdef HAVE_conditional_execution
2397 if (GET_CODE (PATTERN (insn)) == COND_EXEC)
2398 current_insn_predicate = COND_EXEC_TEST (PATTERN (insn));
2399 else
2400 current_insn_predicate = NULL_RTX;
2401 #endif
2403 #ifdef HAVE_cc0
2404 cc_prev_status = cc_status;
2406 /* Update `cc_status' for this instruction.
2407 The instruction's output routine may change it further.
2408 If the output routine for a jump insn needs to depend
2409 on the cc status, it should look at cc_prev_status. */
2411 NOTICE_UPDATE_CC (body, insn);
2412 #endif
2414 current_output_insn = debug_insn = insn;
2416 #if defined (DWARF2_UNWIND_INFO)
2417 if (CALL_P (insn) && dwarf2out_do_frame ())
2418 dwarf2out_frame_debug (insn, false);
2419 #endif
2421 /* Find the proper template for this insn. */
2422 template = get_insn_template (insn_code_number, insn);
2424 /* If the C code returns 0, it means that it is a jump insn
2425 which follows a deleted test insn, and that test insn
2426 needs to be reinserted. */
2427 if (template == 0)
2429 rtx prev;
2431 gcc_assert (prev_nonnote_insn (insn) == last_ignored_compare);
2433 /* We have already processed the notes between the setter and
2434 the user. Make sure we don't process them again, this is
2435 particularly important if one of the notes is a block
2436 scope note or an EH note. */
2437 for (prev = insn;
2438 prev != last_ignored_compare;
2439 prev = PREV_INSN (prev))
2441 if (NOTE_P (prev))
2442 delete_insn (prev); /* Use delete_note. */
2445 return prev;
2448 /* If the template is the string "#", it means that this insn must
2449 be split. */
2450 if (template[0] == '#' && template[1] == '\0')
2452 rtx new = try_split (body, insn, 0);
2454 /* If we didn't split the insn, go away. */
2455 if (new == insn && PATTERN (new) == body)
2456 fatal_insn ("could not split insn", insn);
2458 #ifdef HAVE_ATTR_length
2459 /* This instruction should have been split in shorten_branches,
2460 to ensure that we would have valid length info for the
2461 splitees. */
2462 gcc_unreachable ();
2463 #endif
2465 return new;
2468 #ifdef TARGET_UNWIND_INFO
2469 /* ??? This will put the directives in the wrong place if
2470 get_insn_template outputs assembly directly. However calling it
2471 before get_insn_template breaks if the insns is split. */
2472 targetm.asm_out.unwind_emit (asm_out_file, insn);
2473 #endif
2475 /* Output assembler code from the template. */
2476 output_asm_insn (template, recog_data.operand);
2478 /* If necessary, report the effect that the instruction has on
2479 the unwind info. We've already done this for delay slots
2480 and call instructions. */
2481 #if defined (DWARF2_UNWIND_INFO)
2482 if (final_sequence == 0
2483 #if !defined (HAVE_prologue)
2484 && !ACCUMULATE_OUTGOING_ARGS
2485 #endif
2486 && dwarf2out_do_frame ())
2487 dwarf2out_frame_debug (insn, true);
2488 #endif
2490 current_output_insn = debug_insn = 0;
2493 return NEXT_INSN (insn);
2496 /* Return whether a source line note needs to be emitted before INSN. */
2498 static bool
2499 notice_source_line (rtx insn)
2501 const char *filename = insn_file (insn);
2502 int linenum = insn_line (insn);
2504 if (filename
2505 && (force_source_line
2506 || filename != last_filename
2507 || last_linenum != linenum))
2509 force_source_line = false;
2510 last_filename = filename;
2511 last_linenum = linenum;
2512 high_block_linenum = MAX (last_linenum, high_block_linenum);
2513 high_function_linenum = MAX (last_linenum, high_function_linenum);
2514 return true;
2516 return false;
2519 /* For each operand in INSN, simplify (subreg (reg)) so that it refers
2520 directly to the desired hard register. */
2522 void
2523 cleanup_subreg_operands (rtx insn)
2525 int i;
2526 extract_insn_cached (insn);
2527 for (i = 0; i < recog_data.n_operands; i++)
2529 /* The following test cannot use recog_data.operand when testing
2530 for a SUBREG: the underlying object might have been changed
2531 already if we are inside a match_operator expression that
2532 matches the else clause. Instead we test the underlying
2533 expression directly. */
2534 if (GET_CODE (*recog_data.operand_loc[i]) == SUBREG)
2535 recog_data.operand[i] = alter_subreg (recog_data.operand_loc[i]);
2536 else if (GET_CODE (recog_data.operand[i]) == PLUS
2537 || GET_CODE (recog_data.operand[i]) == MULT
2538 || MEM_P (recog_data.operand[i]))
2539 recog_data.operand[i] = walk_alter_subreg (recog_data.operand_loc[i]);
2542 for (i = 0; i < recog_data.n_dups; i++)
2544 if (GET_CODE (*recog_data.dup_loc[i]) == SUBREG)
2545 *recog_data.dup_loc[i] = alter_subreg (recog_data.dup_loc[i]);
2546 else if (GET_CODE (*recog_data.dup_loc[i]) == PLUS
2547 || GET_CODE (*recog_data.dup_loc[i]) == MULT
2548 || MEM_P (*recog_data.dup_loc[i]))
2549 *recog_data.dup_loc[i] = walk_alter_subreg (recog_data.dup_loc[i]);
2553 /* If X is a SUBREG, replace it with a REG or a MEM,
2554 based on the thing it is a subreg of. */
2557 alter_subreg (rtx *xp)
2559 rtx x = *xp;
2560 rtx y = SUBREG_REG (x);
2562 /* simplify_subreg does not remove subreg from volatile references.
2563 We are required to. */
2564 if (MEM_P (y))
2566 int offset = SUBREG_BYTE (x);
2568 /* For paradoxical subregs on big-endian machines, SUBREG_BYTE
2569 contains 0 instead of the proper offset. See simplify_subreg. */
2570 if (offset == 0
2571 && GET_MODE_SIZE (GET_MODE (y)) < GET_MODE_SIZE (GET_MODE (x)))
2573 int difference = GET_MODE_SIZE (GET_MODE (y))
2574 - GET_MODE_SIZE (GET_MODE (x));
2575 if (WORDS_BIG_ENDIAN)
2576 offset += (difference / UNITS_PER_WORD) * UNITS_PER_WORD;
2577 if (BYTES_BIG_ENDIAN)
2578 offset += difference % UNITS_PER_WORD;
2581 *xp = adjust_address (y, GET_MODE (x), offset);
2583 else
2585 rtx new = simplify_subreg (GET_MODE (x), y, GET_MODE (y),
2586 SUBREG_BYTE (x));
2588 if (new != 0)
2589 *xp = new;
2590 else if (REG_P (y))
2592 /* Simplify_subreg can't handle some REG cases, but we have to. */
2593 unsigned int regno = subreg_regno (x);
2594 *xp = gen_rtx_REG_offset (y, GET_MODE (x), regno, SUBREG_BYTE (x));
2598 return *xp;
2601 /* Do alter_subreg on all the SUBREGs contained in X. */
2603 static rtx
2604 walk_alter_subreg (rtx *xp)
2606 rtx x = *xp;
2607 switch (GET_CODE (x))
2609 case PLUS:
2610 case MULT:
2611 case AND:
2612 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2613 XEXP (x, 1) = walk_alter_subreg (&XEXP (x, 1));
2614 break;
2616 case MEM:
2617 case ZERO_EXTEND:
2618 XEXP (x, 0) = walk_alter_subreg (&XEXP (x, 0));
2619 break;
2621 case SUBREG:
2622 return alter_subreg (xp);
2624 default:
2625 break;
2628 return *xp;
2631 #ifdef HAVE_cc0
2633 /* Given BODY, the body of a jump instruction, alter the jump condition
2634 as required by the bits that are set in cc_status.flags.
2635 Not all of the bits there can be handled at this level in all cases.
2637 The value is normally 0.
2638 1 means that the condition has become always true.
2639 -1 means that the condition has become always false.
2640 2 means that COND has been altered. */
2642 static int
2643 alter_cond (rtx cond)
2645 int value = 0;
2647 if (cc_status.flags & CC_REVERSED)
2649 value = 2;
2650 PUT_CODE (cond, swap_condition (GET_CODE (cond)));
2653 if (cc_status.flags & CC_INVERTED)
2655 value = 2;
2656 PUT_CODE (cond, reverse_condition (GET_CODE (cond)));
2659 if (cc_status.flags & CC_NOT_POSITIVE)
2660 switch (GET_CODE (cond))
2662 case LE:
2663 case LEU:
2664 case GEU:
2665 /* Jump becomes unconditional. */
2666 return 1;
2668 case GT:
2669 case GTU:
2670 case LTU:
2671 /* Jump becomes no-op. */
2672 return -1;
2674 case GE:
2675 PUT_CODE (cond, EQ);
2676 value = 2;
2677 break;
2679 case LT:
2680 PUT_CODE (cond, NE);
2681 value = 2;
2682 break;
2684 default:
2685 break;
2688 if (cc_status.flags & CC_NOT_NEGATIVE)
2689 switch (GET_CODE (cond))
2691 case GE:
2692 case GEU:
2693 /* Jump becomes unconditional. */
2694 return 1;
2696 case LT:
2697 case LTU:
2698 /* Jump becomes no-op. */
2699 return -1;
2701 case LE:
2702 case LEU:
2703 PUT_CODE (cond, EQ);
2704 value = 2;
2705 break;
2707 case GT:
2708 case GTU:
2709 PUT_CODE (cond, NE);
2710 value = 2;
2711 break;
2713 default:
2714 break;
2717 if (cc_status.flags & CC_NO_OVERFLOW)
2718 switch (GET_CODE (cond))
2720 case GEU:
2721 /* Jump becomes unconditional. */
2722 return 1;
2724 case LEU:
2725 PUT_CODE (cond, EQ);
2726 value = 2;
2727 break;
2729 case GTU:
2730 PUT_CODE (cond, NE);
2731 value = 2;
2732 break;
2734 case LTU:
2735 /* Jump becomes no-op. */
2736 return -1;
2738 default:
2739 break;
2742 if (cc_status.flags & (CC_Z_IN_NOT_N | CC_Z_IN_N))
2743 switch (GET_CODE (cond))
2745 default:
2746 gcc_unreachable ();
2748 case NE:
2749 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? GE : LT);
2750 value = 2;
2751 break;
2753 case EQ:
2754 PUT_CODE (cond, cc_status.flags & CC_Z_IN_N ? LT : GE);
2755 value = 2;
2756 break;
2759 if (cc_status.flags & CC_NOT_SIGNED)
2760 /* The flags are valid if signed condition operators are converted
2761 to unsigned. */
2762 switch (GET_CODE (cond))
2764 case LE:
2765 PUT_CODE (cond, LEU);
2766 value = 2;
2767 break;
2769 case LT:
2770 PUT_CODE (cond, LTU);
2771 value = 2;
2772 break;
2774 case GT:
2775 PUT_CODE (cond, GTU);
2776 value = 2;
2777 break;
2779 case GE:
2780 PUT_CODE (cond, GEU);
2781 value = 2;
2782 break;
2784 default:
2785 break;
2788 return value;
2790 #endif
2792 /* Report inconsistency between the assembler template and the operands.
2793 In an `asm', it's the user's fault; otherwise, the compiler's fault. */
2795 void
2796 output_operand_lossage (const char *cmsgid, ...)
2798 char *fmt_string;
2799 char *new_message;
2800 const char *pfx_str;
2801 va_list ap;
2803 va_start (ap, cmsgid);
2805 pfx_str = this_is_asm_operands ? _("invalid 'asm': ") : "output_operand: ";
2806 asprintf (&fmt_string, "%s%s", pfx_str, _(cmsgid));
2807 vasprintf (&new_message, fmt_string, ap);
2809 if (this_is_asm_operands)
2810 error_for_asm (this_is_asm_operands, "%s", new_message);
2811 else
2812 internal_error ("%s", new_message);
2814 free (fmt_string);
2815 free (new_message);
2816 va_end (ap);
2819 /* Output of assembler code from a template, and its subroutines. */
2821 /* Annotate the assembly with a comment describing the pattern and
2822 alternative used. */
2824 static void
2825 output_asm_name (void)
2827 if (debug_insn)
2829 int num = INSN_CODE (debug_insn);
2830 fprintf (asm_out_file, "\t%s %d\t%s",
2831 ASM_COMMENT_START, INSN_UID (debug_insn),
2832 insn_data[num].name);
2833 if (insn_data[num].n_alternatives > 1)
2834 fprintf (asm_out_file, "/%d", which_alternative + 1);
2835 #ifdef HAVE_ATTR_length
2836 fprintf (asm_out_file, "\t[length = %d]",
2837 get_attr_length (debug_insn));
2838 #endif
2839 /* Clear this so only the first assembler insn
2840 of any rtl insn will get the special comment for -dp. */
2841 debug_insn = 0;
2845 /* If OP is a REG or MEM and we can find a MEM_EXPR corresponding to it
2846 or its address, return that expr . Set *PADDRESSP to 1 if the expr
2847 corresponds to the address of the object and 0 if to the object. */
2849 static tree
2850 get_mem_expr_from_op (rtx op, int *paddressp)
2852 tree expr;
2853 int inner_addressp;
2855 *paddressp = 0;
2857 if (REG_P (op))
2858 return REG_EXPR (op);
2859 else if (!MEM_P (op))
2860 return 0;
2862 if (MEM_EXPR (op) != 0)
2863 return MEM_EXPR (op);
2865 /* Otherwise we have an address, so indicate it and look at the address. */
2866 *paddressp = 1;
2867 op = XEXP (op, 0);
2869 /* First check if we have a decl for the address, then look at the right side
2870 if it is a PLUS. Otherwise, strip off arithmetic and keep looking.
2871 But don't allow the address to itself be indirect. */
2872 if ((expr = get_mem_expr_from_op (op, &inner_addressp)) && ! inner_addressp)
2873 return expr;
2874 else if (GET_CODE (op) == PLUS
2875 && (expr = get_mem_expr_from_op (XEXP (op, 1), &inner_addressp)))
2876 return expr;
2878 while (GET_RTX_CLASS (GET_CODE (op)) == RTX_UNARY
2879 || GET_RTX_CLASS (GET_CODE (op)) == RTX_BIN_ARITH)
2880 op = XEXP (op, 0);
2882 expr = get_mem_expr_from_op (op, &inner_addressp);
2883 return inner_addressp ? 0 : expr;
2886 /* Output operand names for assembler instructions. OPERANDS is the
2887 operand vector, OPORDER is the order to write the operands, and NOPS
2888 is the number of operands to write. */
2890 static void
2891 output_asm_operand_names (rtx *operands, int *oporder, int nops)
2893 int wrote = 0;
2894 int i;
2896 for (i = 0; i < nops; i++)
2898 int addressp;
2899 rtx op = operands[oporder[i]];
2900 tree expr = get_mem_expr_from_op (op, &addressp);
2902 fprintf (asm_out_file, "%c%s",
2903 wrote ? ',' : '\t', wrote ? "" : ASM_COMMENT_START);
2904 wrote = 1;
2905 if (expr)
2907 fprintf (asm_out_file, "%s",
2908 addressp ? "*" : "");
2909 print_mem_expr (asm_out_file, expr);
2910 wrote = 1;
2912 else if (REG_P (op) && ORIGINAL_REGNO (op)
2913 && ORIGINAL_REGNO (op) != REGNO (op))
2914 fprintf (asm_out_file, " tmp%i", ORIGINAL_REGNO (op));
2918 /* Output text from TEMPLATE to the assembler output file,
2919 obeying %-directions to substitute operands taken from
2920 the vector OPERANDS.
2922 %N (for N a digit) means print operand N in usual manner.
2923 %lN means require operand N to be a CODE_LABEL or LABEL_REF
2924 and print the label name with no punctuation.
2925 %cN means require operand N to be a constant
2926 and print the constant expression with no punctuation.
2927 %aN means expect operand N to be a memory address
2928 (not a memory reference!) and print a reference
2929 to that address.
2930 %nN means expect operand N to be a constant
2931 and print a constant expression for minus the value
2932 of the operand, with no other punctuation. */
2934 void
2935 output_asm_insn (const char *template, rtx *operands)
2937 const char *p;
2938 int c;
2939 #ifdef ASSEMBLER_DIALECT
2940 int dialect = 0;
2941 #endif
2942 int oporder[MAX_RECOG_OPERANDS];
2943 char opoutput[MAX_RECOG_OPERANDS];
2944 int ops = 0;
2946 /* An insn may return a null string template
2947 in a case where no assembler code is needed. */
2948 if (*template == 0)
2949 return;
2951 memset (opoutput, 0, sizeof opoutput);
2952 p = template;
2953 putc ('\t', asm_out_file);
2955 #ifdef ASM_OUTPUT_OPCODE
2956 ASM_OUTPUT_OPCODE (asm_out_file, p);
2957 #endif
2959 while ((c = *p++))
2960 switch (c)
2962 case '\n':
2963 if (flag_verbose_asm)
2964 output_asm_operand_names (operands, oporder, ops);
2965 if (flag_print_asm_name)
2966 output_asm_name ();
2968 ops = 0;
2969 memset (opoutput, 0, sizeof opoutput);
2971 putc (c, asm_out_file);
2972 #ifdef ASM_OUTPUT_OPCODE
2973 while ((c = *p) == '\t')
2975 putc (c, asm_out_file);
2976 p++;
2978 ASM_OUTPUT_OPCODE (asm_out_file, p);
2979 #endif
2980 break;
2982 #ifdef ASSEMBLER_DIALECT
2983 case '{':
2985 int i;
2987 if (dialect)
2988 output_operand_lossage ("nested assembly dialect alternatives");
2989 else
2990 dialect = 1;
2992 /* If we want the first dialect, do nothing. Otherwise, skip
2993 DIALECT_NUMBER of strings ending with '|'. */
2994 for (i = 0; i < dialect_number; i++)
2996 while (*p && *p != '}' && *p++ != '|')
2998 if (*p == '}')
2999 break;
3000 if (*p == '|')
3001 p++;
3004 if (*p == '\0')
3005 output_operand_lossage ("unterminated assembly dialect alternative");
3007 break;
3009 case '|':
3010 if (dialect)
3012 /* Skip to close brace. */
3015 if (*p == '\0')
3017 output_operand_lossage ("unterminated assembly dialect alternative");
3018 break;
3021 while (*p++ != '}');
3022 dialect = 0;
3024 else
3025 putc (c, asm_out_file);
3026 break;
3028 case '}':
3029 if (! dialect)
3030 putc (c, asm_out_file);
3031 dialect = 0;
3032 break;
3033 #endif
3035 case '%':
3036 /* %% outputs a single %. */
3037 if (*p == '%')
3039 p++;
3040 putc (c, asm_out_file);
3042 /* %= outputs a number which is unique to each insn in the entire
3043 compilation. This is useful for making local labels that are
3044 referred to more than once in a given insn. */
3045 else if (*p == '=')
3047 p++;
3048 fprintf (asm_out_file, "%d", insn_counter);
3050 /* % followed by a letter and some digits
3051 outputs an operand in a special way depending on the letter.
3052 Letters `acln' are implemented directly.
3053 Other letters are passed to `output_operand' so that
3054 the PRINT_OPERAND macro can define them. */
3055 else if (ISALPHA (*p))
3057 int letter = *p++;
3058 unsigned long opnum;
3059 char *endptr;
3061 opnum = strtoul (p, &endptr, 10);
3063 if (endptr == p)
3064 output_operand_lossage ("operand number missing "
3065 "after %%-letter");
3066 else if (this_is_asm_operands && opnum >= insn_noperands)
3067 output_operand_lossage ("operand number out of range");
3068 else if (letter == 'l')
3069 output_asm_label (operands[opnum]);
3070 else if (letter == 'a')
3071 output_address (operands[opnum]);
3072 else if (letter == 'c')
3074 if (CONSTANT_ADDRESS_P (operands[opnum]))
3075 output_addr_const (asm_out_file, operands[opnum]);
3076 else
3077 output_operand (operands[opnum], 'c');
3079 else if (letter == 'n')
3081 if (GET_CODE (operands[opnum]) == CONST_INT)
3082 fprintf (asm_out_file, HOST_WIDE_INT_PRINT_DEC,
3083 - INTVAL (operands[opnum]));
3084 else
3086 putc ('-', asm_out_file);
3087 output_addr_const (asm_out_file, operands[opnum]);
3090 else
3091 output_operand (operands[opnum], letter);
3093 if (!opoutput[opnum])
3094 oporder[ops++] = opnum;
3095 opoutput[opnum] = 1;
3097 p = endptr;
3098 c = *p;
3100 /* % followed by a digit outputs an operand the default way. */
3101 else if (ISDIGIT (*p))
3103 unsigned long opnum;
3104 char *endptr;
3106 opnum = strtoul (p, &endptr, 10);
3107 if (this_is_asm_operands && opnum >= insn_noperands)
3108 output_operand_lossage ("operand number out of range");
3109 else
3110 output_operand (operands[opnum], 0);
3112 if (!opoutput[opnum])
3113 oporder[ops++] = opnum;
3114 opoutput[opnum] = 1;
3116 p = endptr;
3117 c = *p;
3119 /* % followed by punctuation: output something for that
3120 punctuation character alone, with no operand.
3121 The PRINT_OPERAND macro decides what is actually done. */
3122 #ifdef PRINT_OPERAND_PUNCT_VALID_P
3123 else if (PRINT_OPERAND_PUNCT_VALID_P ((unsigned char) *p))
3124 output_operand (NULL_RTX, *p++);
3125 #endif
3126 else
3127 output_operand_lossage ("invalid %%-code");
3128 break;
3130 default:
3131 putc (c, asm_out_file);
3134 /* Write out the variable names for operands, if we know them. */
3135 if (flag_verbose_asm)
3136 output_asm_operand_names (operands, oporder, ops);
3137 if (flag_print_asm_name)
3138 output_asm_name ();
3140 putc ('\n', asm_out_file);
3143 /* Output a LABEL_REF, or a bare CODE_LABEL, as an assembler symbol. */
3145 void
3146 output_asm_label (rtx x)
3148 char buf[256];
3150 if (GET_CODE (x) == LABEL_REF)
3151 x = XEXP (x, 0);
3152 if (LABEL_P (x)
3153 || (NOTE_P (x)
3154 && NOTE_LINE_NUMBER (x) == NOTE_INSN_DELETED_LABEL))
3155 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3156 else
3157 output_operand_lossage ("'%%l' operand isn't a label");
3159 assemble_name (asm_out_file, buf);
3162 /* Print operand X using machine-dependent assembler syntax.
3163 The macro PRINT_OPERAND is defined just to control this function.
3164 CODE is a non-digit that preceded the operand-number in the % spec,
3165 such as 'z' if the spec was `%z3'. CODE is 0 if there was no char
3166 between the % and the digits.
3167 When CODE is a non-letter, X is 0.
3169 The meanings of the letters are machine-dependent and controlled
3170 by PRINT_OPERAND. */
3172 static void
3173 output_operand (rtx x, int code ATTRIBUTE_UNUSED)
3175 if (x && GET_CODE (x) == SUBREG)
3176 x = alter_subreg (&x);
3178 /* X must not be a pseudo reg. */
3179 gcc_assert (!x || !REG_P (x) || REGNO (x) < FIRST_PSEUDO_REGISTER);
3181 PRINT_OPERAND (asm_out_file, x, code);
3184 /* Print a memory reference operand for address X
3185 using machine-dependent assembler syntax.
3186 The macro PRINT_OPERAND_ADDRESS exists just to control this function. */
3188 void
3189 output_address (rtx x)
3191 walk_alter_subreg (&x);
3192 PRINT_OPERAND_ADDRESS (asm_out_file, x);
3195 /* Print an integer constant expression in assembler syntax.
3196 Addition and subtraction are the only arithmetic
3197 that may appear in these expressions. */
3199 void
3200 output_addr_const (FILE *file, rtx x)
3202 char buf[256];
3204 restart:
3205 switch (GET_CODE (x))
3207 case PC:
3208 putc ('.', file);
3209 break;
3211 case SYMBOL_REF:
3212 if (SYMBOL_REF_DECL (x))
3213 mark_decl_referenced (SYMBOL_REF_DECL (x));
3214 #ifdef ASM_OUTPUT_SYMBOL_REF
3215 ASM_OUTPUT_SYMBOL_REF (file, x);
3216 #else
3217 assemble_name (file, XSTR (x, 0));
3218 #endif
3219 break;
3221 case LABEL_REF:
3222 x = XEXP (x, 0);
3223 /* Fall through. */
3224 case CODE_LABEL:
3225 ASM_GENERATE_INTERNAL_LABEL (buf, "L", CODE_LABEL_NUMBER (x));
3226 #ifdef ASM_OUTPUT_LABEL_REF
3227 ASM_OUTPUT_LABEL_REF (file, buf);
3228 #else
3229 assemble_name (file, buf);
3230 #endif
3231 break;
3233 case CONST_INT:
3234 fprintf (file, HOST_WIDE_INT_PRINT_DEC, INTVAL (x));
3235 break;
3237 case CONST:
3238 /* This used to output parentheses around the expression,
3239 but that does not work on the 386 (either ATT or BSD assembler). */
3240 output_addr_const (file, XEXP (x, 0));
3241 break;
3243 case CONST_DOUBLE:
3244 if (GET_MODE (x) == VOIDmode)
3246 /* We can use %d if the number is one word and positive. */
3247 if (CONST_DOUBLE_HIGH (x))
3248 fprintf (file, HOST_WIDE_INT_PRINT_DOUBLE_HEX,
3249 CONST_DOUBLE_HIGH (x), CONST_DOUBLE_LOW (x));
3250 else if (CONST_DOUBLE_LOW (x) < 0)
3251 fprintf (file, HOST_WIDE_INT_PRINT_HEX, CONST_DOUBLE_LOW (x));
3252 else
3253 fprintf (file, HOST_WIDE_INT_PRINT_DEC, CONST_DOUBLE_LOW (x));
3255 else
3256 /* We can't handle floating point constants;
3257 PRINT_OPERAND must handle them. */
3258 output_operand_lossage ("floating constant misused");
3259 break;
3261 case PLUS:
3262 /* Some assemblers need integer constants to appear last (eg masm). */
3263 if (GET_CODE (XEXP (x, 0)) == CONST_INT)
3265 output_addr_const (file, XEXP (x, 1));
3266 if (INTVAL (XEXP (x, 0)) >= 0)
3267 fprintf (file, "+");
3268 output_addr_const (file, XEXP (x, 0));
3270 else
3272 output_addr_const (file, XEXP (x, 0));
3273 if (GET_CODE (XEXP (x, 1)) != CONST_INT
3274 || INTVAL (XEXP (x, 1)) >= 0)
3275 fprintf (file, "+");
3276 output_addr_const (file, XEXP (x, 1));
3278 break;
3280 case MINUS:
3281 /* Avoid outputting things like x-x or x+5-x,
3282 since some assemblers can't handle that. */
3283 x = simplify_subtraction (x);
3284 if (GET_CODE (x) != MINUS)
3285 goto restart;
3287 output_addr_const (file, XEXP (x, 0));
3288 fprintf (file, "-");
3289 if ((GET_CODE (XEXP (x, 1)) == CONST_INT && INTVAL (XEXP (x, 1)) >= 0)
3290 || GET_CODE (XEXP (x, 1)) == PC
3291 || GET_CODE (XEXP (x, 1)) == SYMBOL_REF)
3292 output_addr_const (file, XEXP (x, 1));
3293 else
3295 fputs (targetm.asm_out.open_paren, file);
3296 output_addr_const (file, XEXP (x, 1));
3297 fputs (targetm.asm_out.close_paren, file);
3299 break;
3301 case ZERO_EXTEND:
3302 case SIGN_EXTEND:
3303 case SUBREG:
3304 output_addr_const (file, XEXP (x, 0));
3305 break;
3307 default:
3308 #ifdef OUTPUT_ADDR_CONST_EXTRA
3309 OUTPUT_ADDR_CONST_EXTRA (file, x, fail);
3310 break;
3312 fail:
3313 #endif
3314 output_operand_lossage ("invalid expression as operand");
3318 /* A poor man's fprintf, with the added features of %I, %R, %L, and %U.
3319 %R prints the value of REGISTER_PREFIX.
3320 %L prints the value of LOCAL_LABEL_PREFIX.
3321 %U prints the value of USER_LABEL_PREFIX.
3322 %I prints the value of IMMEDIATE_PREFIX.
3323 %O runs ASM_OUTPUT_OPCODE to transform what follows in the string.
3324 Also supported are %d, %i, %u, %x, %X, %o, %c, %s and %%.
3326 We handle alternate assembler dialects here, just like output_asm_insn. */
3328 void
3329 asm_fprintf (FILE *file, const char *p, ...)
3331 char buf[10];
3332 char *q, c;
3333 va_list argptr;
3335 va_start (argptr, p);
3337 buf[0] = '%';
3339 while ((c = *p++))
3340 switch (c)
3342 #ifdef ASSEMBLER_DIALECT
3343 case '{':
3345 int i;
3347 /* If we want the first dialect, do nothing. Otherwise, skip
3348 DIALECT_NUMBER of strings ending with '|'. */
3349 for (i = 0; i < dialect_number; i++)
3351 while (*p && *p++ != '|')
3354 if (*p == '|')
3355 p++;
3358 break;
3360 case '|':
3361 /* Skip to close brace. */
3362 while (*p && *p++ != '}')
3364 break;
3366 case '}':
3367 break;
3368 #endif
3370 case '%':
3371 c = *p++;
3372 q = &buf[1];
3373 while (strchr ("-+ #0", c))
3375 *q++ = c;
3376 c = *p++;
3378 while (ISDIGIT (c) || c == '.')
3380 *q++ = c;
3381 c = *p++;
3383 switch (c)
3385 case '%':
3386 putc ('%', file);
3387 break;
3389 case 'd': case 'i': case 'u':
3390 case 'x': case 'X': case 'o':
3391 case 'c':
3392 *q++ = c;
3393 *q = 0;
3394 fprintf (file, buf, va_arg (argptr, int));
3395 break;
3397 case 'w':
3398 /* This is a prefix to the 'd', 'i', 'u', 'x', 'X', and
3399 'o' cases, but we do not check for those cases. It
3400 means that the value is a HOST_WIDE_INT, which may be
3401 either `long' or `long long'. */
3402 memcpy (q, HOST_WIDE_INT_PRINT, strlen (HOST_WIDE_INT_PRINT));
3403 q += strlen (HOST_WIDE_INT_PRINT);
3404 *q++ = *p++;
3405 *q = 0;
3406 fprintf (file, buf, va_arg (argptr, HOST_WIDE_INT));
3407 break;
3409 case 'l':
3410 *q++ = c;
3411 #ifdef HAVE_LONG_LONG
3412 if (*p == 'l')
3414 *q++ = *p++;
3415 *q++ = *p++;
3416 *q = 0;
3417 fprintf (file, buf, va_arg (argptr, long long));
3419 else
3420 #endif
3422 *q++ = *p++;
3423 *q = 0;
3424 fprintf (file, buf, va_arg (argptr, long));
3427 break;
3429 case 's':
3430 *q++ = c;
3431 *q = 0;
3432 fprintf (file, buf, va_arg (argptr, char *));
3433 break;
3435 case 'O':
3436 #ifdef ASM_OUTPUT_OPCODE
3437 ASM_OUTPUT_OPCODE (asm_out_file, p);
3438 #endif
3439 break;
3441 case 'R':
3442 #ifdef REGISTER_PREFIX
3443 fprintf (file, "%s", REGISTER_PREFIX);
3444 #endif
3445 break;
3447 case 'I':
3448 #ifdef IMMEDIATE_PREFIX
3449 fprintf (file, "%s", IMMEDIATE_PREFIX);
3450 #endif
3451 break;
3453 case 'L':
3454 #ifdef LOCAL_LABEL_PREFIX
3455 fprintf (file, "%s", LOCAL_LABEL_PREFIX);
3456 #endif
3457 break;
3459 case 'U':
3460 fputs (user_label_prefix, file);
3461 break;
3463 #ifdef ASM_FPRINTF_EXTENSIONS
3464 /* Uppercase letters are reserved for general use by asm_fprintf
3465 and so are not available to target specific code. In order to
3466 prevent the ASM_FPRINTF_EXTENSIONS macro from using them then,
3467 they are defined here. As they get turned into real extensions
3468 to asm_fprintf they should be removed from this list. */
3469 case 'A': case 'B': case 'C': case 'D': case 'E':
3470 case 'F': case 'G': case 'H': case 'J': case 'K':
3471 case 'M': case 'N': case 'P': case 'Q': case 'S':
3472 case 'T': case 'V': case 'W': case 'Y': case 'Z':
3473 break;
3475 ASM_FPRINTF_EXTENSIONS (file, argptr, p)
3476 #endif
3477 default:
3478 gcc_unreachable ();
3480 break;
3482 default:
3483 putc (c, file);
3485 va_end (argptr);
3488 /* Split up a CONST_DOUBLE or integer constant rtx
3489 into two rtx's for single words,
3490 storing in *FIRST the word that comes first in memory in the target
3491 and in *SECOND the other. */
3493 void
3494 split_double (rtx value, rtx *first, rtx *second)
3496 if (GET_CODE (value) == CONST_INT)
3498 if (HOST_BITS_PER_WIDE_INT >= (2 * BITS_PER_WORD))
3500 /* In this case the CONST_INT holds both target words.
3501 Extract the bits from it into two word-sized pieces.
3502 Sign extend each half to HOST_WIDE_INT. */
3503 unsigned HOST_WIDE_INT low, high;
3504 unsigned HOST_WIDE_INT mask, sign_bit, sign_extend;
3506 /* Set sign_bit to the most significant bit of a word. */
3507 sign_bit = 1;
3508 sign_bit <<= BITS_PER_WORD - 1;
3510 /* Set mask so that all bits of the word are set. We could
3511 have used 1 << BITS_PER_WORD instead of basing the
3512 calculation on sign_bit. However, on machines where
3513 HOST_BITS_PER_WIDE_INT == BITS_PER_WORD, it could cause a
3514 compiler warning, even though the code would never be
3515 executed. */
3516 mask = sign_bit << 1;
3517 mask--;
3519 /* Set sign_extend as any remaining bits. */
3520 sign_extend = ~mask;
3522 /* Pick the lower word and sign-extend it. */
3523 low = INTVAL (value);
3524 low &= mask;
3525 if (low & sign_bit)
3526 low |= sign_extend;
3528 /* Pick the higher word, shifted to the least significant
3529 bits, and sign-extend it. */
3530 high = INTVAL (value);
3531 high >>= BITS_PER_WORD - 1;
3532 high >>= 1;
3533 high &= mask;
3534 if (high & sign_bit)
3535 high |= sign_extend;
3537 /* Store the words in the target machine order. */
3538 if (WORDS_BIG_ENDIAN)
3540 *first = GEN_INT (high);
3541 *second = GEN_INT (low);
3543 else
3545 *first = GEN_INT (low);
3546 *second = GEN_INT (high);
3549 else
3551 /* The rule for using CONST_INT for a wider mode
3552 is that we regard the value as signed.
3553 So sign-extend it. */
3554 rtx high = (INTVAL (value) < 0 ? constm1_rtx : const0_rtx);
3555 if (WORDS_BIG_ENDIAN)
3557 *first = high;
3558 *second = value;
3560 else
3562 *first = value;
3563 *second = high;
3567 else if (GET_CODE (value) != CONST_DOUBLE)
3569 if (WORDS_BIG_ENDIAN)
3571 *first = const0_rtx;
3572 *second = value;
3574 else
3576 *first = value;
3577 *second = const0_rtx;
3580 else if (GET_MODE (value) == VOIDmode
3581 /* This is the old way we did CONST_DOUBLE integers. */
3582 || GET_MODE_CLASS (GET_MODE (value)) == MODE_INT)
3584 /* In an integer, the words are defined as most and least significant.
3585 So order them by the target's convention. */
3586 if (WORDS_BIG_ENDIAN)
3588 *first = GEN_INT (CONST_DOUBLE_HIGH (value));
3589 *second = GEN_INT (CONST_DOUBLE_LOW (value));
3591 else
3593 *first = GEN_INT (CONST_DOUBLE_LOW (value));
3594 *second = GEN_INT (CONST_DOUBLE_HIGH (value));
3597 else
3599 REAL_VALUE_TYPE r;
3600 long l[2];
3601 REAL_VALUE_FROM_CONST_DOUBLE (r, value);
3603 /* Note, this converts the REAL_VALUE_TYPE to the target's
3604 format, splits up the floating point double and outputs
3605 exactly 32 bits of it into each of l[0] and l[1] --
3606 not necessarily BITS_PER_WORD bits. */
3607 REAL_VALUE_TO_TARGET_DOUBLE (r, l);
3609 /* If 32 bits is an entire word for the target, but not for the host,
3610 then sign-extend on the host so that the number will look the same
3611 way on the host that it would on the target. See for instance
3612 simplify_unary_operation. The #if is needed to avoid compiler
3613 warnings. */
3615 #if HOST_BITS_PER_LONG > 32
3616 if (BITS_PER_WORD < HOST_BITS_PER_LONG && BITS_PER_WORD == 32)
3618 if (l[0] & ((long) 1 << 31))
3619 l[0] |= ((long) (-1) << 32);
3620 if (l[1] & ((long) 1 << 31))
3621 l[1] |= ((long) (-1) << 32);
3623 #endif
3625 *first = GEN_INT (l[0]);
3626 *second = GEN_INT (l[1]);
3630 /* Return nonzero if this function has no function calls. */
3633 leaf_function_p (void)
3635 rtx insn;
3636 rtx link;
3638 if (current_function_profile || profile_arc_flag)
3639 return 0;
3641 for (insn = get_insns (); insn; insn = NEXT_INSN (insn))
3643 if (CALL_P (insn)
3644 && ! SIBLING_CALL_P (insn))
3645 return 0;
3646 if (NONJUMP_INSN_P (insn)
3647 && GET_CODE (PATTERN (insn)) == SEQUENCE
3648 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3649 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3650 return 0;
3652 for (link = current_function_epilogue_delay_list;
3653 link;
3654 link = XEXP (link, 1))
3656 insn = XEXP (link, 0);
3658 if (CALL_P (insn)
3659 && ! SIBLING_CALL_P (insn))
3660 return 0;
3661 if (NONJUMP_INSN_P (insn)
3662 && GET_CODE (PATTERN (insn)) == SEQUENCE
3663 && CALL_P (XVECEXP (PATTERN (insn), 0, 0))
3664 && ! SIBLING_CALL_P (XVECEXP (PATTERN (insn), 0, 0)))
3665 return 0;
3668 return 1;
3671 /* Return 1 if branch is a forward branch.
3672 Uses insn_shuid array, so it works only in the final pass. May be used by
3673 output templates to customary add branch prediction hints.
3676 final_forward_branch_p (rtx insn)
3678 int insn_id, label_id;
3680 gcc_assert (uid_shuid);
3681 insn_id = INSN_SHUID (insn);
3682 label_id = INSN_SHUID (JUMP_LABEL (insn));
3683 /* We've hit some insns that does not have id information available. */
3684 gcc_assert (insn_id && label_id);
3685 return insn_id < label_id;
3688 /* On some machines, a function with no call insns
3689 can run faster if it doesn't create its own register window.
3690 When output, the leaf function should use only the "output"
3691 registers. Ordinarily, the function would be compiled to use
3692 the "input" registers to find its arguments; it is a candidate
3693 for leaf treatment if it uses only the "input" registers.
3694 Leaf function treatment means renumbering so the function
3695 uses the "output" registers instead. */
3697 #ifdef LEAF_REGISTERS
3699 /* Return 1 if this function uses only the registers that can be
3700 safely renumbered. */
3703 only_leaf_regs_used (void)
3705 int i;
3706 const char *const permitted_reg_in_leaf_functions = LEAF_REGISTERS;
3708 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
3709 if ((regs_ever_live[i] || global_regs[i])
3710 && ! permitted_reg_in_leaf_functions[i])
3711 return 0;
3713 if (current_function_uses_pic_offset_table
3714 && pic_offset_table_rtx != 0
3715 && REG_P (pic_offset_table_rtx)
3716 && ! permitted_reg_in_leaf_functions[REGNO (pic_offset_table_rtx)])
3717 return 0;
3719 return 1;
3722 /* Scan all instructions and renumber all registers into those
3723 available in leaf functions. */
3725 static void
3726 leaf_renumber_regs (rtx first)
3728 rtx insn;
3730 /* Renumber only the actual patterns.
3731 The reg-notes can contain frame pointer refs,
3732 and renumbering them could crash, and should not be needed. */
3733 for (insn = first; insn; insn = NEXT_INSN (insn))
3734 if (INSN_P (insn))
3735 leaf_renumber_regs_insn (PATTERN (insn));
3736 for (insn = current_function_epilogue_delay_list;
3737 insn;
3738 insn = XEXP (insn, 1))
3739 if (INSN_P (XEXP (insn, 0)))
3740 leaf_renumber_regs_insn (PATTERN (XEXP (insn, 0)));
3743 /* Scan IN_RTX and its subexpressions, and renumber all regs into those
3744 available in leaf functions. */
3746 void
3747 leaf_renumber_regs_insn (rtx in_rtx)
3749 int i, j;
3750 const char *format_ptr;
3752 if (in_rtx == 0)
3753 return;
3755 /* Renumber all input-registers into output-registers.
3756 renumbered_regs would be 1 for an output-register;
3757 they */
3759 if (REG_P (in_rtx))
3761 int newreg;
3763 /* Don't renumber the same reg twice. */
3764 if (in_rtx->used)
3765 return;
3767 newreg = REGNO (in_rtx);
3768 /* Don't try to renumber pseudo regs. It is possible for a pseudo reg
3769 to reach here as part of a REG_NOTE. */
3770 if (newreg >= FIRST_PSEUDO_REGISTER)
3772 in_rtx->used = 1;
3773 return;
3775 newreg = LEAF_REG_REMAP (newreg);
3776 gcc_assert (newreg >= 0);
3777 regs_ever_live[REGNO (in_rtx)] = 0;
3778 regs_ever_live[newreg] = 1;
3779 REGNO (in_rtx) = newreg;
3780 in_rtx->used = 1;
3783 if (INSN_P (in_rtx))
3785 /* Inside a SEQUENCE, we find insns.
3786 Renumber just the patterns of these insns,
3787 just as we do for the top-level insns. */
3788 leaf_renumber_regs_insn (PATTERN (in_rtx));
3789 return;
3792 format_ptr = GET_RTX_FORMAT (GET_CODE (in_rtx));
3794 for (i = 0; i < GET_RTX_LENGTH (GET_CODE (in_rtx)); i++)
3795 switch (*format_ptr++)
3797 case 'e':
3798 leaf_renumber_regs_insn (XEXP (in_rtx, i));
3799 break;
3801 case 'E':
3802 if (NULL != XVEC (in_rtx, i))
3804 for (j = 0; j < XVECLEN (in_rtx, i); j++)
3805 leaf_renumber_regs_insn (XVECEXP (in_rtx, i, j));
3807 break;
3809 case 'S':
3810 case 's':
3811 case '0':
3812 case 'i':
3813 case 'w':
3814 case 'n':
3815 case 'u':
3816 break;
3818 default:
3819 gcc_unreachable ();
3822 #endif
3825 /* When -gused is used, emit debug info for only used symbols. But in
3826 addition to the standard intercepted debug_hooks there are some direct
3827 calls into this file, i.e., dbxout_symbol, dbxout_parms, and dbxout_reg_params.
3828 Those routines may also be called from a higher level intercepted routine. So
3829 to prevent recording data for an inner call to one of these for an intercept,
3830 we maintain an intercept nesting counter (debug_nesting). We only save the
3831 intercepted arguments if the nesting is 1. */
3832 int debug_nesting = 0;
3834 static tree *symbol_queue;
3835 int symbol_queue_index = 0;
3836 static int symbol_queue_size = 0;
3838 /* Generate the symbols for any queued up type symbols we encountered
3839 while generating the type info for some originally used symbol.
3840 This might generate additional entries in the queue. Only when
3841 the nesting depth goes to 0 is this routine called. */
3843 void
3844 debug_flush_symbol_queue (void)
3846 int i;
3848 /* Make sure that additionally queued items are not flushed
3849 prematurely. */
3851 ++debug_nesting;
3853 for (i = 0; i < symbol_queue_index; ++i)
3855 /* If we pushed queued symbols then such symbols are must be
3856 output no matter what anyone else says. Specifically,
3857 we need to make sure dbxout_symbol() thinks the symbol was
3858 used and also we need to override TYPE_DECL_SUPPRESS_DEBUG
3859 which may be set for outside reasons. */
3860 int saved_tree_used = TREE_USED (symbol_queue[i]);
3861 int saved_suppress_debug = TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]);
3862 TREE_USED (symbol_queue[i]) = 1;
3863 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = 0;
3865 #ifdef DBX_DEBUGGING_INFO
3866 dbxout_symbol (symbol_queue[i], 0);
3867 #endif
3869 TREE_USED (symbol_queue[i]) = saved_tree_used;
3870 TYPE_DECL_SUPPRESS_DEBUG (symbol_queue[i]) = saved_suppress_debug;
3873 symbol_queue_index = 0;
3874 --debug_nesting;
3877 /* Queue a type symbol needed as part of the definition of a decl
3878 symbol. These symbols are generated when debug_flush_symbol_queue()
3879 is called. */
3881 void
3882 debug_queue_symbol (tree decl)
3884 if (symbol_queue_index >= symbol_queue_size)
3886 symbol_queue_size += 10;
3887 symbol_queue = xrealloc (symbol_queue,
3888 symbol_queue_size * sizeof (tree));
3891 symbol_queue[symbol_queue_index++] = decl;
3894 /* Free symbol queue. */
3895 void
3896 debug_free_queue (void)
3898 if (symbol_queue)
3900 free (symbol_queue);
3901 symbol_queue = NULL;
3902 symbol_queue_size = 0;
3906 /* Turn the RTL into assembly. */
3907 static unsigned int
3908 rest_of_handle_final (void)
3910 rtx x;
3911 const char *fnname;
3913 /* Get the function's name, as described by its RTL. This may be
3914 different from the DECL_NAME name used in the source file. */
3916 x = DECL_RTL (current_function_decl);
3917 gcc_assert (MEM_P (x));
3918 x = XEXP (x, 0);
3919 gcc_assert (GET_CODE (x) == SYMBOL_REF);
3920 fnname = XSTR (x, 0);
3922 assemble_start_function (current_function_decl, fnname);
3923 final_start_function (get_insns (), asm_out_file, optimize);
3924 final (get_insns (), asm_out_file, optimize);
3925 final_end_function ();
3927 #ifdef TARGET_UNWIND_INFO
3928 /* ??? The IA-64 ".handlerdata" directive must be issued before
3929 the ".endp" directive that closes the procedure descriptor. */
3930 output_function_exception_table ();
3931 #endif
3933 assemble_end_function (current_function_decl, fnname);
3935 #ifndef TARGET_UNWIND_INFO
3936 /* Otherwise, it feels unclean to switch sections in the middle. */
3937 output_function_exception_table ();
3938 #endif
3940 user_defined_section_attribute = false;
3942 if (! quiet_flag)
3943 fflush (asm_out_file);
3945 /* Release all memory allocated by flow. */
3946 free_basic_block_vars ();
3948 /* Write DBX symbols if requested. */
3950 /* Note that for those inline functions where we don't initially
3951 know for certain that we will be generating an out-of-line copy,
3952 the first invocation of this routine (rest_of_compilation) will
3953 skip over this code by doing a `goto exit_rest_of_compilation;'.
3954 Later on, wrapup_global_declarations will (indirectly) call
3955 rest_of_compilation again for those inline functions that need
3956 to have out-of-line copies generated. During that call, we
3957 *will* be routed past here. */
3959 timevar_push (TV_SYMOUT);
3960 (*debug_hooks->function_decl) (current_function_decl);
3961 timevar_pop (TV_SYMOUT);
3962 return 0;
3965 struct tree_opt_pass pass_final =
3967 NULL, /* name */
3968 NULL, /* gate */
3969 rest_of_handle_final, /* execute */
3970 NULL, /* sub */
3971 NULL, /* next */
3972 0, /* static_pass_number */
3973 TV_FINAL, /* tv_id */
3974 0, /* properties_required */
3975 0, /* properties_provided */
3976 0, /* properties_destroyed */
3977 0, /* todo_flags_start */
3978 TODO_ggc_collect, /* todo_flags_finish */
3979 0 /* letter */
3983 static unsigned int
3984 rest_of_handle_shorten_branches (void)
3986 /* Shorten branches. */
3987 shorten_branches (get_insns ());
3988 return 0;
3991 struct tree_opt_pass pass_shorten_branches =
3993 "shorten", /* name */
3994 NULL, /* gate */
3995 rest_of_handle_shorten_branches, /* execute */
3996 NULL, /* sub */
3997 NULL, /* next */
3998 0, /* static_pass_number */
3999 TV_FINAL, /* tv_id */
4000 0, /* properties_required */
4001 0, /* properties_provided */
4002 0, /* properties_destroyed */
4003 0, /* todo_flags_start */
4004 TODO_dump_func, /* todo_flags_finish */
4005 0 /* letter */
4009 static unsigned int
4010 rest_of_clean_state (void)
4012 rtx insn, next;
4014 /* It is very important to decompose the RTL instruction chain here:
4015 debug information keeps pointing into CODE_LABEL insns inside the function
4016 body. If these remain pointing to the other insns, we end up preserving
4017 whole RTL chain and attached detailed debug info in memory. */
4018 for (insn = get_insns (); insn; insn = next)
4020 next = NEXT_INSN (insn);
4021 NEXT_INSN (insn) = NULL;
4022 PREV_INSN (insn) = NULL;
4025 /* In case the function was not output,
4026 don't leave any temporary anonymous types
4027 queued up for sdb output. */
4028 #ifdef SDB_DEBUGGING_INFO
4029 if (write_symbols == SDB_DEBUG)
4030 sdbout_types (NULL_TREE);
4031 #endif
4033 reload_completed = 0;
4034 epilogue_completed = 0;
4035 flow2_completed = 0;
4036 no_new_pseudos = 0;
4038 /* Clear out the insn_length contents now that they are no
4039 longer valid. */
4040 init_insn_lengths ();
4042 /* Show no temporary slots allocated. */
4043 init_temp_slots ();
4045 free_basic_block_vars ();
4046 free_bb_for_insn ();
4049 if (targetm.binds_local_p (current_function_decl))
4051 int pref = cfun->preferred_stack_boundary;
4052 if (cfun->stack_alignment_needed > cfun->preferred_stack_boundary)
4053 pref = cfun->stack_alignment_needed;
4054 cgraph_rtl_info (current_function_decl)->preferred_incoming_stack_boundary
4055 = pref;
4058 /* Make sure volatile mem refs aren't considered valid operands for
4059 arithmetic insns. We must call this here if this is a nested inline
4060 function, since the above code leaves us in the init_recog state,
4061 and the function context push/pop code does not save/restore volatile_ok.
4063 ??? Maybe it isn't necessary for expand_start_function to call this
4064 anymore if we do it here? */
4066 init_recog_no_volatile ();
4068 /* We're done with this function. Free up memory if we can. */
4069 free_after_parsing (cfun);
4070 free_after_compilation (cfun);
4071 return 0;
4074 struct tree_opt_pass pass_clean_state =
4076 NULL, /* name */
4077 NULL, /* gate */
4078 rest_of_clean_state, /* execute */
4079 NULL, /* sub */
4080 NULL, /* next */
4081 0, /* static_pass_number */
4082 TV_FINAL, /* tv_id */
4083 0, /* properties_required */
4084 0, /* properties_provided */
4085 PROP_rtl, /* properties_destroyed */
4086 0, /* todo_flags_start */
4087 0, /* todo_flags_finish */
4088 0 /* letter */