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PR target/54854
[official-gcc.git] / gcc / config / avr / avr.h
blob4925e0e1df0558b4090a57fb08c344fcd5f99372
1 /* Definitions of target machine for GNU compiler,
2 for ATMEL AVR at90s8515, ATmega103/103L, ATmega603/603L microcontrollers.
3 Copyright (C) 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007,
4 2008, 2009, 2010, 2011
5 Free Software Foundation, Inc.
6 Contributed by Denis Chertykov (chertykov@gmail.com)
7
8 This file is part of GCC.
9
10 GCC is free software; you can redistribute it and/or modify
11 it under the terms of the GNU General Public License as published by
12 the Free Software Foundation; either version 3, or (at your option)
13 any later version.
14
15 GCC is distributed in the hope that it will be useful,
16 but WITHOUT ANY WARRANTY; without even the implied warranty of
17 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
18 GNU General Public License for more details.
19
20 You should have received a copy of the GNU General Public License
21 along with GCC; see the file COPYING3. If not see
22 <http://www.gnu.org/licenses/>. */
23
24 typedef struct
25 {
26 /* Id of the address space as used in c_register_addr_space */
27 unsigned char id;
28
29 /* Flavour of memory: 0 = RAM, 1 = Flash */
30 int memory_class;
31
32 /* Width of pointer (in bytes) */
33 int pointer_size;
34
35 /* Name of the address space as visible to the user */
36 const char *name;
37
38 /* Segment (i.e. 64k memory chunk) number. */
39 int segment;
40 } avr_addrspace_t;
41
42 extern const avr_addrspace_t avr_addrspace[];
43
44 /* Known address spaces */
45
46 enum
47 {
48 ADDR_SPACE_RAM,
49 ADDR_SPACE_FLASH,
50 ADDR_SPACE_FLASH1,
51 ADDR_SPACE_FLASH2,
52 ADDR_SPACE_FLASH3,
53 ADDR_SPACE_FLASH4,
54 ADDR_SPACE_FLASH5,
55 ADDR_SPACE_MEMX
56 };
57
58 #define TARGET_CPU_CPP_BUILTINS() avr_cpu_cpp_builtins (pfile)
59
60 #define AVR_HAVE_JMP_CALL (avr_current_arch->have_jmp_call)
61 #define AVR_HAVE_MUL (avr_current_arch->have_mul)
62 #define AVR_HAVE_MOVW (avr_current_arch->have_movw_lpmx)
63 #define AVR_HAVE_LPMX (avr_current_arch->have_movw_lpmx)
64 #define AVR_HAVE_ELPM (avr_current_arch->have_elpm)
65 #define AVR_HAVE_ELPMX (avr_current_arch->have_elpmx)
66 #define AVR_HAVE_RAMPD (avr_current_arch->have_rampd)
67 #define AVR_HAVE_RAMPX (avr_current_arch->have_rampd)
68 #define AVR_HAVE_RAMPY (avr_current_arch->have_rampd)
69 #define AVR_HAVE_RAMPZ (avr_current_arch->have_elpm \
70 || avr_current_arch->have_rampd)
71 #define AVR_HAVE_EIJMP_EICALL (avr_current_arch->have_eijmp_eicall)
72
73 /* Handling of 8-bit SP versus 16-bit SP is as follows:
74
75 -msp8 is used internally to select the right multilib for targets with
76 8-bit SP. -msp8 is set automatically by DRIVER_SELF_SPECS for devices
77 with 8-bit SP or by multilib generation machinery. If a frame pointer is
78 needed and SP is only 8 bits wide, SP is zero-extended to get FP.
79
80 TARGET_TINY_STACK is triggered by -mtiny-stack which is a user option.
81 This option has no effect on multilib selection. It serves to save some
82 bytes on 16-bit SP devices by only changing SP_L and leaving SP_H alone.
83
84 These two properties are reflected by built-in macros __AVR_SP8__ resp.
85 __AVR_HAVE_8BIT_SP__ and __AVR_HAVE_16BIT_SP__. During multilib generation
86 there is always __AVR_SP8__ == __AVR_HAVE_8BIT_SP__. */
87
88 #define AVR_HAVE_8BIT_SP \
89 (avr_current_device->short_sp || TARGET_TINY_STACK || avr_sp8)
90
91 #define AVR_HAVE_SPH (!avr_sp8)
92
93 #define AVR_2_BYTE_PC (!AVR_HAVE_EIJMP_EICALL)
94 #define AVR_3_BYTE_PC (AVR_HAVE_EIJMP_EICALL)
95
96 #define AVR_XMEGA (avr_current_arch->xmega_p)
97
98 #define BITS_BIG_ENDIAN 0
99 #define BYTES_BIG_ENDIAN 0
100 #define WORDS_BIG_ENDIAN 0
101
102 #ifdef IN_LIBGCC2
103 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits). */
104 #define UNITS_PER_WORD 4
105 #else
106 /* Width of a word, in units (bytes). */
107 #define UNITS_PER_WORD 1
108 #endif
109
110 #define POINTER_SIZE 16
111
112
113 /* Maximum sized of reasonable data type
114 DImode or Dfmode ... */
115 #define MAX_FIXED_MODE_SIZE 32
116
117 #define PARM_BOUNDARY 8
118
119 #define FUNCTION_BOUNDARY 8
120
121 #define EMPTY_FIELD_BOUNDARY 8
122
123 /* No data type wants to be aligned rounder than this. */
124 #define BIGGEST_ALIGNMENT 8
125
126 #define TARGET_VTABLE_ENTRY_ALIGN 8
127
128 #define STRICT_ALIGNMENT 0
129
130 #define INT_TYPE_SIZE (TARGET_INT8 ? 8 : 16)
131 #define SHORT_TYPE_SIZE (INT_TYPE_SIZE == 8 ? INT_TYPE_SIZE : 16)
132 #define LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 16 : 32)
133 #define LONG_LONG_TYPE_SIZE (INT_TYPE_SIZE == 8 ? 32 : 64)
134 #define FLOAT_TYPE_SIZE 32
135 #define DOUBLE_TYPE_SIZE 32
136 #define LONG_DOUBLE_TYPE_SIZE 32
137 #define LONG_LONG_ACCUM_TYPE_SIZE 64
138
139 #define DEFAULT_SIGNED_CHAR 1
140
141 #define SIZE_TYPE (INT_TYPE_SIZE == 8 ? "long unsigned int" : "unsigned int")
142 #define PTRDIFF_TYPE (INT_TYPE_SIZE == 8 ? "long int" :"int")
143
144 #define WCHAR_TYPE_SIZE 16
145
146 #define FIRST_PSEUDO_REGISTER 36
147
148 #define FIXED_REGISTERS {\
149 1,1,/* r0 r1 */\
150 0,0,/* r2 r3 */\
151 0,0,/* r4 r5 */\
152 0,0,/* r6 r7 */\
153 0,0,/* r8 r9 */\
154 0,0,/* r10 r11 */\
155 0,0,/* r12 r13 */\
156 0,0,/* r14 r15 */\
157 0,0,/* r16 r17 */\
158 0,0,/* r18 r19 */\
159 0,0,/* r20 r21 */\
160 0,0,/* r22 r23 */\
161 0,0,/* r24 r25 */\
162 0,0,/* r26 r27 */\
163 0,0,/* r28 r29 */\
164 0,0,/* r30 r31 */\
165 1,1,/* STACK */\
166 1,1 /* arg pointer */ }
167
168 #define CALL_USED_REGISTERS { \
169 1,1,/* r0 r1 */ \
170 0,0,/* r2 r3 */ \
171 0,0,/* r4 r5 */ \
172 0,0,/* r6 r7 */ \
173 0,0,/* r8 r9 */ \
174 0,0,/* r10 r11 */ \
175 0,0,/* r12 r13 */ \
176 0,0,/* r14 r15 */ \
177 0,0,/* r16 r17 */ \
178 1,1,/* r18 r19 */ \
179 1,1,/* r20 r21 */ \
180 1,1,/* r22 r23 */ \
181 1,1,/* r24 r25 */ \
182 1,1,/* r26 r27 */ \
183 0,0,/* r28 r29 */ \
184 1,1,/* r30 r31 */ \
185 1,1,/* STACK */ \
186 1,1 /* arg pointer */ }
187
188 #define REG_ALLOC_ORDER { \
189 24,25, \
190 18,19, \
191 20,21, \
192 22,23, \
193 30,31, \
194 26,27, \
195 28,29, \
196 17,16,15,14,13,12,11,10,9,8,7,6,5,4,3,2, \
197 0,1, \
198 32,33,34,35 \
199 }
200
201 #define ADJUST_REG_ALLOC_ORDER order_regs_for_local_alloc ()
202
203
204 #define HARD_REGNO_NREGS(REGNO, MODE) ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
205
206 #define HARD_REGNO_MODE_OK(REGNO, MODE) avr_hard_regno_mode_ok(REGNO, MODE)
207
208 #define MODES_TIEABLE_P(MODE1, MODE2) 1
209
210 enum reg_class {
211 NO_REGS,
212 R0_REG, /* r0 */
213 POINTER_X_REGS, /* r26 - r27 */
214 POINTER_Y_REGS, /* r28 - r29 */
215 POINTER_Z_REGS, /* r30 - r31 */
216 STACK_REG, /* STACK */
217 BASE_POINTER_REGS, /* r28 - r31 */
218 POINTER_REGS, /* r26 - r31 */
219 ADDW_REGS, /* r24 - r31 */
220 SIMPLE_LD_REGS, /* r16 - r23 */
221 LD_REGS, /* r16 - r31 */
222 NO_LD_REGS, /* r0 - r15 */
223 GENERAL_REGS, /* r0 - r31 */
224 ALL_REGS, LIM_REG_CLASSES
225 };
226
227
228 #define N_REG_CLASSES (int)LIM_REG_CLASSES
229
230 #define REG_CLASS_NAMES { \
231 "NO_REGS", \
232 "R0_REG", /* r0 */ \
233 "POINTER_X_REGS", /* r26 - r27 */ \
234 "POINTER_Y_REGS", /* r28 - r29 */ \
235 "POINTER_Z_REGS", /* r30 - r31 */ \
236 "STACK_REG", /* STACK */ \
237 "BASE_POINTER_REGS", /* r28 - r31 */ \
238 "POINTER_REGS", /* r26 - r31 */ \
239 "ADDW_REGS", /* r24 - r31 */ \
240 "SIMPLE_LD_REGS", /* r16 - r23 */ \
241 "LD_REGS", /* r16 - r31 */ \
242 "NO_LD_REGS", /* r0 - r15 */ \
243 "GENERAL_REGS", /* r0 - r31 */ \
244 "ALL_REGS" }
245
246 #define REG_CLASS_CONTENTS { \
247 {0x00000000,0x00000000}, /* NO_REGS */ \
248 {0x00000001,0x00000000}, /* R0_REG */ \
249 {3 << REG_X,0x00000000}, /* POINTER_X_REGS, r26 - r27 */ \
250 {3 << REG_Y,0x00000000}, /* POINTER_Y_REGS, r28 - r29 */ \
251 {3 << REG_Z,0x00000000}, /* POINTER_Z_REGS, r30 - r31 */ \
252 {0x00000000,0x00000003}, /* STACK_REG, STACK */ \
253 {(3 << REG_Y) | (3 << REG_Z), \
254 0x00000000}, /* BASE_POINTER_REGS, r28 - r31 */ \
255 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z), \
256 0x00000000}, /* POINTER_REGS, r26 - r31 */ \
257 {(3 << REG_X) | (3 << REG_Y) | (3 << REG_Z) | (3 << REG_W), \
258 0x00000000}, /* ADDW_REGS, r24 - r31 */ \
259 {0x00ff0000,0x00000000}, /* SIMPLE_LD_REGS r16 - r23 */ \
260 {(3 << REG_X)|(3 << REG_Y)|(3 << REG_Z)|(3 << REG_W)|(0xff << 16), \
261 0x00000000}, /* LD_REGS, r16 - r31 */ \
262 {0x0000ffff,0x00000000}, /* NO_LD_REGS r0 - r15 */ \
263 {0xffffffff,0x00000000}, /* GENERAL_REGS, r0 - r31 */ \
264 {0xffffffff,0x00000003} /* ALL_REGS */ \
265 }
266
267 #define REGNO_REG_CLASS(R) avr_regno_reg_class(R)
268
269 #define MODE_CODE_BASE_REG_CLASS(mode, as, outer_code, index_code) \
270 avr_mode_code_base_reg_class (mode, as, outer_code, index_code)
271
272 #define INDEX_REG_CLASS NO_REGS
273
274 #define REGNO_MODE_CODE_OK_FOR_BASE_P(num, mode, as, outer_code, index_code) \
275 avr_regno_mode_code_ok_for_base_p (num, mode, as, outer_code, index_code)
276
277 #define REGNO_OK_FOR_INDEX_P(NUM) 0
278
279 #define HARD_REGNO_CALL_PART_CLOBBERED(REGNO, MODE) \
280 avr_hard_regno_call_part_clobbered (REGNO, MODE)
281
282 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
283
284 #define STACK_PUSH_CODE POST_DEC
285
286 #define STACK_GROWS_DOWNWARD
287
288 #define STARTING_FRAME_OFFSET avr_starting_frame_offset()
289
290 #define STACK_POINTER_OFFSET 1
291
292 #define FIRST_PARM_OFFSET(FUNDECL) 0
293
294 #define STACK_BOUNDARY 8
295
296 #define STACK_POINTER_REGNUM 32
297
298 #define FRAME_POINTER_REGNUM REG_Y
299
300 #define ARG_POINTER_REGNUM 34
301
302 #define STATIC_CHAIN_REGNUM 2
303
304 #define ELIMINABLE_REGS { \
305 {ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM}, \
306 {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM} \
307 ,{FRAME_POINTER_REGNUM+1,STACK_POINTER_REGNUM+1}}
308
309 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
310 OFFSET = avr_initial_elimination_offset (FROM, TO)
311
312 #define RETURN_ADDR_RTX(count, tem) avr_return_addr_rtx (count, tem)
313
314 /* Don't use Push rounding. expr.c: emit_single_push_insn is broken
315 for POST_DEC targets (PR27386). */
316 /*#define PUSH_ROUNDING(NPUSHED) (NPUSHED)*/
317
318 typedef struct avr_args {
319 int nregs; /* # registers available for passing */
320 int regno; /* next available register number */
321 } CUMULATIVE_ARGS;
322
323 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, FNDECL, N_NAMED_ARGS) \
324 init_cumulative_args (&(CUM), FNTYPE, LIBNAME, FNDECL)
325
326 #define FUNCTION_ARG_REGNO_P(r) function_arg_regno_p(r)
327
328 #define DEFAULT_PCC_STRUCT_RETURN 0
329
330 #define EPILOGUE_USES(REGNO) avr_epilogue_uses(REGNO)
331
332 #define HAVE_POST_INCREMENT 1
333 #define HAVE_PRE_DECREMENT 1
334
335 #define MAX_REGS_PER_ADDRESS 1
336
337 #define LEGITIMIZE_RELOAD_ADDRESS(X,MODE,OPNUM,TYPE,IND_L,WIN) \
338 do { \
339 rtx new_x = avr_legitimize_reload_address (&(X), MODE, OPNUM, TYPE, \
340 ADDR_TYPE (TYPE), \
341 IND_L, make_memloc); \
342 if (new_x) \
343 { \
344 X = new_x; \
345 goto WIN; \
346 } \
347 } while (0)
348
349 #define BRANCH_COST(speed_p, predictable_p) avr_branch_cost
350
351 #define SLOW_BYTE_ACCESS 0
352
353 #define NO_FUNCTION_CSE
354
355 #define REGISTER_TARGET_PRAGMAS() \
356 do { \
357 avr_register_target_pragmas(); \
358 } while (0)
359
360 #define TEXT_SECTION_ASM_OP "\t.text"
361
362 #define DATA_SECTION_ASM_OP "\t.data"
363
364 #define BSS_SECTION_ASM_OP "\t.section .bss"
365
366 /* Define the pseudo-ops used to switch to the .ctors and .dtors sections.
367 There are no shared libraries on this target, and these sections are
368 placed in the read-only program memory, so they are not writable. */
369
370 #undef CTORS_SECTION_ASM_OP
371 #define CTORS_SECTION_ASM_OP "\t.section .ctors,\"a\",@progbits"
372
373 #undef DTORS_SECTION_ASM_OP
374 #define DTORS_SECTION_ASM_OP "\t.section .dtors,\"a\",@progbits"
375
376 #define TARGET_ASM_CONSTRUCTOR avr_asm_out_ctor
377
378 #define TARGET_ASM_DESTRUCTOR avr_asm_out_dtor
379
380 #define SUPPORTS_INIT_PRIORITY 0
381
382 #define JUMP_TABLES_IN_TEXT_SECTION 0
383
384 #define ASM_COMMENT_START " ; "
385
386 #define ASM_APP_ON "/* #APP */\n"
387
388 #define ASM_APP_OFF "/* #NOAPP */\n"
389
390 #define IS_ASM_LOGICAL_LINE_SEPARATOR(C, STR) ((C) == '\n' || ((C) == '$'))
391
392 #define ASM_OUTPUT_ALIGNED_DECL_COMMON(STREAM, DECL, NAME, SIZE, ALIGN) \
393 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, false)
394
395 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
396 asm_output_aligned_bss (FILE, DECL, NAME, SIZE, ALIGN)
397
398 #define ASM_OUTPUT_ALIGNED_DECL_LOCAL(STREAM, DECL, NAME, SIZE, ALIGN) \
399 avr_asm_output_aligned_decl_common (STREAM, DECL, NAME, SIZE, ALIGN, true)
400
401 /* Globalizing directive for a label. */
402 #define GLOBAL_ASM_OP ".global\t"
403
404 #define SUPPORTS_WEAK 1
405
406 #define HAS_INIT_SECTION 1
407
408 #define REGISTER_NAMES { \
409 "r0","r1","r2","r3","r4","r5","r6","r7", \
410 "r8","r9","r10","r11","r12","r13","r14","r15", \
411 "r16","r17","r18","r19","r20","r21","r22","r23", \
412 "r24","r25","r26","r27","r28","r29","r30","r31", \
413 "__SP_L__","__SP_H__","argL","argH"}
414
415 #define FINAL_PRESCAN_INSN(insn, operand, nop) final_prescan_insn (insn, operand,nop)
416
417 #define ASM_OUTPUT_REG_PUSH(STREAM, REGNO) \
418 { \
419 gcc_assert (REGNO < 32); \
420 fprintf (STREAM, "\tpush\tr%d", REGNO); \
421 }
422
423 #define ASM_OUTPUT_REG_POP(STREAM, REGNO) \
424 { \
425 gcc_assert (REGNO < 32); \
426 fprintf (STREAM, "\tpop\tr%d", REGNO); \
427 }
428
429 #define ASM_OUTPUT_ADDR_VEC_ELT(STREAM, VALUE) \
430 avr_output_addr_vec_elt(STREAM, VALUE)
431
432 #define ASM_OUTPUT_ALIGN(STREAM, POWER) \
433 do { \
434 if ((POWER) > 0) \
435 fprintf (STREAM, "\t.p2align\t%d\n", POWER); \
436 } while (0)
437
438 #define CASE_VECTOR_MODE HImode
439
440 #undef WORD_REGISTER_OPERATIONS
441
442 #define MOVE_MAX 4
443
444 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
445
446 #define Pmode HImode
447
448 #define FUNCTION_MODE HImode
449
450 #define DOLLARS_IN_IDENTIFIERS 0
451
452 #define TRAMPOLINE_SIZE 4
453
454 /* Store in cc_status the expressions
455 that the condition codes will describe
456 after execution of an instruction whose pattern is EXP.
457 Do not alter them if the instruction would not alter the cc's. */
458
459 #define NOTICE_UPDATE_CC(EXP, INSN) notice_update_cc(EXP, INSN)
460
461 /* The add insns don't set overflow in a usable way. */
462 #define CC_OVERFLOW_UNUSABLE 01000
463 /* The mov,and,or,xor insns don't set carry. That's ok though as the
464 Z bit is all we need when doing unsigned comparisons on the result of
465 these insns (since they're always with 0). However, conditions.h has
466 CC_NO_OVERFLOW defined for this purpose. Rename it to something more
467 understandable. */
468 #define CC_NO_CARRY CC_NO_OVERFLOW
469
470
471 /* Output assembler code to FILE to increment profiler label # LABELNO
472 for profiling a function entry. */
473
474 #define FUNCTION_PROFILER(FILE, LABELNO) \
475 fprintf (FILE, "/* profiler %d */", (LABELNO))
476
477 #define ADJUST_INSN_LENGTH(INSN, LENGTH) (LENGTH =\
478 adjust_insn_length (INSN, LENGTH))
479
480 extern const char *avr_device_to_arch (int argc, const char **argv);
481 extern const char *avr_device_to_data_start (int argc, const char **argv);
482 extern const char *avr_device_to_startfiles (int argc, const char **argv);
483 extern const char *avr_device_to_devicelib (int argc, const char **argv);
484 extern const char *avr_device_to_sp8 (int argc, const char **argv);
485
486 #define EXTRA_SPEC_FUNCTIONS \
487 { "device_to_arch", avr_device_to_arch }, \
488 { "device_to_data_start", avr_device_to_data_start }, \
489 { "device_to_startfile", avr_device_to_startfiles }, \
490 { "device_to_devicelib", avr_device_to_devicelib }, \
491 { "device_to_sp8", avr_device_to_sp8 },
492
493 #define DRIVER_SELF_SPECS " %:device_to_sp8(%{mmcu=*:%*}) "
494 #define CPP_SPEC ""
495
496 #define CC1_SPEC ""
497
498 #define CC1PLUS_SPEC "%{!frtti:-fno-rtti} \
499 %{!fenforce-eh-specs:-fno-enforce-eh-specs} \
500 %{!fexceptions:-fno-exceptions}"
501 /* A C string constant that tells the GCC driver program options to
502 pass to `cc1plus'. */
503
504 #define ASM_SPEC "%{mmcu=avr25:-mmcu=avr2;mmcu=avr35:-mmcu=avr3;mmcu=avr31:-mmcu=avr3;mmcu=avr51:-mmcu=avr5;\
505 mmcu=*:-mmcu=%*} \
506 %{mmcu=*:%{!mmcu=avr2:%{!mmcu=at90s8515:%{!mmcu=avr31:%{!mmcu=atmega103:\
507 -mno-skip-bug}}}}}"
508
509 #define LINK_SPEC "\
510 %{mrelax:--relax\
511 %{mpmem-wrap-around:%{mmcu=at90usb8*:--pmem-wrap-around=8k}\
512 %{mmcu=atmega16*:--pmem-wrap-around=16k}\
513 %{mmcu=atmega32*|\
514 mmcu=at90can32*:--pmem-wrap-around=32k}\
515 %{mmcu=atmega64*|\
516 mmcu=at90can64*|\
517 mmcu=at90usb64*:--pmem-wrap-around=64k}}}\
518 %:device_to_arch(%{mmcu=*:%*})\
519 %:device_to_data_start(%{mmcu=*:%*})"
520
521 #define LIB_SPEC \
522 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lc }}}}}"
523
524 #define LIBSTDCXX "gcc"
525 /* No libstdc++ for now. Empty string doesn't work. */
526
527 #define LIBGCC_SPEC \
528 "%{!mmcu=at90s1*:%{!mmcu=attiny11:%{!mmcu=attiny12:%{!mmcu=attiny15:%{!mmcu=attiny28: -lgcc }}}}}"
529
530 #define STARTFILE_SPEC "%:device_to_startfile(%{mmcu=*:%*})"
531
532 #define ENDFILE_SPEC ""
533
534 /* This is the default without any -mmcu=* option (AT90S*). */
535 #define MULTILIB_DEFAULTS { "mmcu=avr2" }
536
537 #define TEST_HARD_REG_CLASS(CLASS, REGNO) \
538 TEST_HARD_REG_BIT (reg_class_contents[ (int) (CLASS)], REGNO)
539
540 #define CR_TAB "\n\t"
541
542 #define DWARF2_ADDR_SIZE 4
543
544 #define INCOMING_RETURN_ADDR_RTX avr_incoming_return_addr_rtx ()
545 #define INCOMING_FRAME_SP_OFFSET (AVR_3_BYTE_PC ? 3 : 2)
546
547 /* The caller's stack pointer value immediately before the call
548 is one byte below the first argument. */
549 #define ARG_POINTER_CFA_OFFSET(FNDECL) -1
550
551 #define HARD_REGNO_RENAME_OK(OLD_REG, NEW_REG) \
552 avr_hard_regno_rename_ok (OLD_REG, NEW_REG)
553
554 /* A C structure for machine-specific, per-function data.
555 This is added to the cfun structure. */
556 struct GTY(()) machine_function
557 {
558 /* 'true' - if current function is a naked function. */
559 int is_naked;
560
561 /* 'true' - if current function is an interrupt function
562 as specified by the "interrupt" attribute. */
563 int is_interrupt;
564
565 /* 'true' - if current function is a signal function
566 as specified by the "signal" attribute. */
567 int is_signal;
568
569 /* 'true' - if current function is a 'task' function
570 as specified by the "OS_task" attribute. */
571 int is_OS_task;
572
573 /* 'true' - if current function is a 'main' function
574 as specified by the "OS_main" attribute. */
575 int is_OS_main;
576
577 /* Current function stack size. */
578 int stack_usage;
579
580 /* 'true' if a callee might be tail called */
581 int sibcall_fails;
582
583 /* 'true' if the above is_foo predicates are sanity-checked to avoid
584 multiple diagnose for the same function. */
585 int attributes_checked_p;
586 };
587
588 /* AVR does not round pushes, but the existence of this macro is
589 required in order for pushes to be generated. */
590 #define PUSH_ROUNDING(X) (X)
591
592 /* Define prototype here to avoid build warning. Some files using
593 ACCUMULATE_OUTGOING_ARGS (directly or indirectly) include
594 tm.h but not tm_p.h. */
595 extern int avr_accumulate_outgoing_args (void);
596 #define ACCUMULATE_OUTGOING_ARGS avr_accumulate_outgoing_args()
597
598 #define INIT_EXPANDERS avr_init_expanders()
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