* cp-tree.h (DECL_LOCAL_FUCNTION_P): New macro.
[official-gcc.git] / gcc / cse.c
blob0736cd967e834677eb47bc7b18c7386d03060fc2
1 /* Common subexpression elimination for GNU compiler.
2 Copyright (C) 1987, 88, 89, 92-7, 1998, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 #include "config.h"
23 /* stdio.h must precede rtl.h for FFS. */
24 #include "system.h"
25 #include <setjmp.h>
27 #include "rtl.h"
28 #include "tm_p.h"
29 #include "regs.h"
30 #include "hard-reg-set.h"
31 #include "flags.h"
32 #include "real.h"
33 #include "insn-config.h"
34 #include "recog.h"
35 #include "function.h"
36 #include "expr.h"
37 #include "toplev.h"
38 #include "output.h"
39 #include "hashtab.h"
40 #include "ggc.h"
42 /* The basic idea of common subexpression elimination is to go
43 through the code, keeping a record of expressions that would
44 have the same value at the current scan point, and replacing
45 expressions encountered with the cheapest equivalent expression.
47 It is too complicated to keep track of the different possibilities
48 when control paths merge in this code; so, at each label, we forget all
49 that is known and start fresh. This can be described as processing each
50 extended basic block separately. We have a separate pass to perform
51 global CSE.
53 Note CSE can turn a conditional or computed jump into a nop or
54 an unconditional jump. When this occurs we arrange to run the jump
55 optimizer after CSE to delete the unreachable code.
57 We use two data structures to record the equivalent expressions:
58 a hash table for most expressions, and several vectors together
59 with "quantity numbers" to record equivalent (pseudo) registers.
61 The use of the special data structure for registers is desirable
62 because it is faster. It is possible because registers references
63 contain a fairly small number, the register number, taken from
64 a contiguously allocated series, and two register references are
65 identical if they have the same number. General expressions
66 do not have any such thing, so the only way to retrieve the
67 information recorded on an expression other than a register
68 is to keep it in a hash table.
70 Registers and "quantity numbers":
72 At the start of each basic block, all of the (hardware and pseudo)
73 registers used in the function are given distinct quantity
74 numbers to indicate their contents. During scan, when the code
75 copies one register into another, we copy the quantity number.
76 When a register is loaded in any other way, we allocate a new
77 quantity number to describe the value generated by this operation.
78 `reg_qty' records what quantity a register is currently thought
79 of as containing.
81 All real quantity numbers are greater than or equal to `max_reg'.
82 If register N has not been assigned a quantity, reg_qty[N] will equal N.
84 Quantity numbers below `max_reg' do not exist and none of the `qty_...'
85 variables should be referenced with an index below `max_reg'.
87 We also maintain a bidirectional chain of registers for each
88 quantity number. `qty_first_reg', `qty_last_reg',
89 `reg_next_eqv' and `reg_prev_eqv' hold these chains.
91 The first register in a chain is the one whose lifespan is least local.
92 Among equals, it is the one that was seen first.
93 We replace any equivalent register with that one.
95 If two registers have the same quantity number, it must be true that
96 REG expressions with `qty_mode' must be in the hash table for both
97 registers and must be in the same class.
99 The converse is not true. Since hard registers may be referenced in
100 any mode, two REG expressions might be equivalent in the hash table
101 but not have the same quantity number if the quantity number of one
102 of the registers is not the same mode as those expressions.
104 Constants and quantity numbers
106 When a quantity has a known constant value, that value is stored
107 in the appropriate element of qty_const. This is in addition to
108 putting the constant in the hash table as is usual for non-regs.
110 Whether a reg or a constant is preferred is determined by the configuration
111 macro CONST_COSTS and will often depend on the constant value. In any
112 event, expressions containing constants can be simplified, by fold_rtx.
114 When a quantity has a known nearly constant value (such as an address
115 of a stack slot), that value is stored in the appropriate element
116 of qty_const.
118 Integer constants don't have a machine mode. However, cse
119 determines the intended machine mode from the destination
120 of the instruction that moves the constant. The machine mode
121 is recorded in the hash table along with the actual RTL
122 constant expression so that different modes are kept separate.
124 Other expressions:
126 To record known equivalences among expressions in general
127 we use a hash table called `table'. It has a fixed number of buckets
128 that contain chains of `struct table_elt' elements for expressions.
129 These chains connect the elements whose expressions have the same
130 hash codes.
132 Other chains through the same elements connect the elements which
133 currently have equivalent values.
135 Register references in an expression are canonicalized before hashing
136 the expression. This is done using `reg_qty' and `qty_first_reg'.
137 The hash code of a register reference is computed using the quantity
138 number, not the register number.
140 When the value of an expression changes, it is necessary to remove from the
141 hash table not just that expression but all expressions whose values
142 could be different as a result.
144 1. If the value changing is in memory, except in special cases
145 ANYTHING referring to memory could be changed. That is because
146 nobody knows where a pointer does not point.
147 The function `invalidate_memory' removes what is necessary.
149 The special cases are when the address is constant or is
150 a constant plus a fixed register such as the frame pointer
151 or a static chain pointer. When such addresses are stored in,
152 we can tell exactly which other such addresses must be invalidated
153 due to overlap. `invalidate' does this.
154 All expressions that refer to non-constant
155 memory addresses are also invalidated. `invalidate_memory' does this.
157 2. If the value changing is a register, all expressions
158 containing references to that register, and only those,
159 must be removed.
161 Because searching the entire hash table for expressions that contain
162 a register is very slow, we try to figure out when it isn't necessary.
163 Precisely, this is necessary only when expressions have been
164 entered in the hash table using this register, and then the value has
165 changed, and then another expression wants to be added to refer to
166 the register's new value. This sequence of circumstances is rare
167 within any one basic block.
169 The vectors `reg_tick' and `reg_in_table' are used to detect this case.
170 reg_tick[i] is incremented whenever a value is stored in register i.
171 reg_in_table[i] holds -1 if no references to register i have been
172 entered in the table; otherwise, it contains the value reg_tick[i] had
173 when the references were entered. If we want to enter a reference
174 and reg_in_table[i] != reg_tick[i], we must scan and remove old references.
175 Until we want to enter a new entry, the mere fact that the two vectors
176 don't match makes the entries be ignored if anyone tries to match them.
178 Registers themselves are entered in the hash table as well as in
179 the equivalent-register chains. However, the vectors `reg_tick'
180 and `reg_in_table' do not apply to expressions which are simple
181 register references. These expressions are removed from the table
182 immediately when they become invalid, and this can be done even if
183 we do not immediately search for all the expressions that refer to
184 the register.
186 A CLOBBER rtx in an instruction invalidates its operand for further
187 reuse. A CLOBBER or SET rtx whose operand is a MEM:BLK
188 invalidates everything that resides in memory.
190 Related expressions:
192 Constant expressions that differ only by an additive integer
193 are called related. When a constant expression is put in
194 the table, the related expression with no constant term
195 is also entered. These are made to point at each other
196 so that it is possible to find out if there exists any
197 register equivalent to an expression related to a given expression. */
199 /* One plus largest register number used in this function. */
201 static int max_reg;
203 /* One plus largest instruction UID used in this function at time of
204 cse_main call. */
206 static int max_insn_uid;
208 /* Length of vectors indexed by quantity number.
209 We know in advance we will not need a quantity number this big. */
211 static int max_qty;
213 /* Next quantity number to be allocated.
214 This is 1 + the largest number needed so far. */
216 static int next_qty;
218 /* Indexed by quantity number, gives the first (or last) register
219 in the chain of registers that currently contain this quantity. */
221 static int *qty_first_reg;
222 static int *qty_last_reg;
224 /* Index by quantity number, gives the mode of the quantity. */
226 static enum machine_mode *qty_mode;
228 /* Indexed by quantity number, gives the rtx of the constant value of the
229 quantity, or zero if it does not have a known value.
230 A sum of the frame pointer (or arg pointer) plus a constant
231 can also be entered here. */
233 static rtx *qty_const;
235 /* Indexed by qty number, gives the insn that stored the constant value
236 recorded in `qty_const'. */
238 static rtx *qty_const_insn;
240 /* The next three variables are used to track when a comparison between a
241 quantity and some constant or register has been passed. In that case, we
242 know the results of the comparison in case we see it again. These variables
243 record a comparison that is known to be true. */
245 /* Indexed by qty number, gives the rtx code of a comparison with a known
246 result involving this quantity. If none, it is UNKNOWN. */
247 static enum rtx_code *qty_comparison_code;
249 /* Indexed by qty number, gives the constant being compared against in a
250 comparison of known result. If no such comparison, it is undefined.
251 If the comparison is not with a constant, it is zero. */
253 static rtx *qty_comparison_const;
255 /* Indexed by qty number, gives the quantity being compared against in a
256 comparison of known result. If no such comparison, if it undefined.
257 If the comparison is not with a register, it is -1. */
259 static int *qty_comparison_qty;
261 #ifdef HAVE_cc0
262 /* For machines that have a CC0, we do not record its value in the hash
263 table since its use is guaranteed to be the insn immediately following
264 its definition and any other insn is presumed to invalidate it.
266 Instead, we store below the value last assigned to CC0. If it should
267 happen to be a constant, it is stored in preference to the actual
268 assigned value. In case it is a constant, we store the mode in which
269 the constant should be interpreted. */
271 static rtx prev_insn_cc0;
272 static enum machine_mode prev_insn_cc0_mode;
273 #endif
275 /* Previous actual insn. 0 if at first insn of basic block. */
277 static rtx prev_insn;
279 /* Insn being scanned. */
281 static rtx this_insn;
283 /* Index by register number, gives the number of the next (or
284 previous) register in the chain of registers sharing the same
285 value.
287 Or -1 if this register is at the end of the chain.
289 If reg_qty[N] == N, reg_next_eqv[N] is undefined. */
291 static int *reg_next_eqv;
292 static int *reg_prev_eqv;
294 struct cse_reg_info
296 /* The number of times the register has been altered in the current
297 basic block. */
298 int reg_tick;
300 /* The next cse_reg_info structure in the free or used list. */
301 struct cse_reg_info *next;
303 /* The REG_TICK value at which rtx's containing this register are
304 valid in the hash table. If this does not equal the current
305 reg_tick value, such expressions existing in the hash table are
306 invalid. */
307 int reg_in_table;
309 /* The quantity number of the register's current contents. */
310 int reg_qty;
312 /* Search key */
313 int regno;
316 /* A free list of cse_reg_info entries. */
317 static struct cse_reg_info *cse_reg_info_free_list;
319 /* A used list of cse_reg_info entries. */
320 static struct cse_reg_info *cse_reg_info_used_list;
321 static struct cse_reg_info *cse_reg_info_used_list_end;
323 /* A mapping from registers to cse_reg_info data structures. */
324 static hash_table_t cse_reg_info_tree;
326 /* The last lookup we did into the cse_reg_info_tree. This allows us
327 to cache repeated lookups. */
328 static int cached_regno;
329 static struct cse_reg_info *cached_cse_reg_info;
331 /* A HARD_REG_SET containing all the hard registers for which there is
332 currently a REG expression in the hash table. Note the difference
333 from the above variables, which indicate if the REG is mentioned in some
334 expression in the table. */
336 static HARD_REG_SET hard_regs_in_table;
338 /* A HARD_REG_SET containing all the hard registers that are invalidated
339 by a CALL_INSN. */
341 static HARD_REG_SET regs_invalidated_by_call;
343 /* CUID of insn that starts the basic block currently being cse-processed. */
345 static int cse_basic_block_start;
347 /* CUID of insn that ends the basic block currently being cse-processed. */
349 static int cse_basic_block_end;
351 /* Vector mapping INSN_UIDs to cuids.
352 The cuids are like uids but increase monotonically always.
353 We use them to see whether a reg is used outside a given basic block. */
355 static int *uid_cuid;
357 /* Highest UID in UID_CUID. */
358 static int max_uid;
360 /* Get the cuid of an insn. */
362 #define INSN_CUID(INSN) (uid_cuid[INSN_UID (INSN)])
364 /* Nonzero if cse has altered conditional jump insns
365 in such a way that jump optimization should be redone. */
367 static int cse_jumps_altered;
369 /* Nonzero if we put a LABEL_REF into the hash table. Since we may have put
370 it into an INSN without a REG_LABEL, we have to rerun jump after CSE
371 to put in the note. */
372 static int recorded_label_ref;
374 /* canon_hash stores 1 in do_not_record
375 if it notices a reference to CC0, PC, or some other volatile
376 subexpression. */
378 static int do_not_record;
380 #ifdef LOAD_EXTEND_OP
382 /* Scratch rtl used when looking for load-extended copy of a MEM. */
383 static rtx memory_extend_rtx;
384 #endif
386 /* canon_hash stores 1 in hash_arg_in_memory
387 if it notices a reference to memory within the expression being hashed. */
389 static int hash_arg_in_memory;
391 /* The hash table contains buckets which are chains of `struct table_elt's,
392 each recording one expression's information.
393 That expression is in the `exp' field.
395 Those elements with the same hash code are chained in both directions
396 through the `next_same_hash' and `prev_same_hash' fields.
398 Each set of expressions with equivalent values
399 are on a two-way chain through the `next_same_value'
400 and `prev_same_value' fields, and all point with
401 the `first_same_value' field at the first element in
402 that chain. The chain is in order of increasing cost.
403 Each element's cost value is in its `cost' field.
405 The `in_memory' field is nonzero for elements that
406 involve any reference to memory. These elements are removed
407 whenever a write is done to an unidentified location in memory.
408 To be safe, we assume that a memory address is unidentified unless
409 the address is either a symbol constant or a constant plus
410 the frame pointer or argument pointer.
412 The `related_value' field is used to connect related expressions
413 (that differ by adding an integer).
414 The related expressions are chained in a circular fashion.
415 `related_value' is zero for expressions for which this
416 chain is not useful.
418 The `cost' field stores the cost of this element's expression.
420 The `is_const' flag is set if the element is a constant (including
421 a fixed address).
423 The `flag' field is used as a temporary during some search routines.
425 The `mode' field is usually the same as GET_MODE (`exp'), but
426 if `exp' is a CONST_INT and has no machine mode then the `mode'
427 field is the mode it was being used as. Each constant is
428 recorded separately for each mode it is used with. */
431 struct table_elt
433 rtx exp;
434 struct table_elt *next_same_hash;
435 struct table_elt *prev_same_hash;
436 struct table_elt *next_same_value;
437 struct table_elt *prev_same_value;
438 struct table_elt *first_same_value;
439 struct table_elt *related_value;
440 int cost;
441 enum machine_mode mode;
442 char in_memory;
443 char is_const;
444 char flag;
447 /* We don't want a lot of buckets, because we rarely have very many
448 things stored in the hash table, and a lot of buckets slows
449 down a lot of loops that happen frequently. */
450 #define NBUCKETS 31
452 /* Compute hash code of X in mode M. Special-case case where X is a pseudo
453 register (hard registers may require `do_not_record' to be set). */
455 #define HASH(X, M) \
456 (GET_CODE (X) == REG && REGNO (X) >= FIRST_PSEUDO_REGISTER \
457 ? (((unsigned) REG << 7) + (unsigned) REG_QTY (REGNO (X))) % NBUCKETS \
458 : canon_hash (X, M) % NBUCKETS)
460 /* Determine whether register number N is considered a fixed register for CSE.
461 It is desirable to replace other regs with fixed regs, to reduce need for
462 non-fixed hard regs.
463 A reg wins if it is either the frame pointer or designated as fixed,
464 but not if it is an overlapping register. */
465 #ifdef OVERLAPPING_REGNO_P
466 #define FIXED_REGNO_P(N) \
467 (((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
468 || fixed_regs[N] || global_regs[N]) \
469 && ! OVERLAPPING_REGNO_P ((N)))
470 #else
471 #define FIXED_REGNO_P(N) \
472 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
473 || fixed_regs[N] || global_regs[N])
474 #endif
476 /* Compute cost of X, as stored in the `cost' field of a table_elt. Fixed
477 hard registers and pointers into the frame are the cheapest with a cost
478 of 0. Next come pseudos with a cost of one and other hard registers with
479 a cost of 2. Aside from these special cases, call `rtx_cost'. */
481 #define CHEAP_REGNO(N) \
482 ((N) == FRAME_POINTER_REGNUM || (N) == HARD_FRAME_POINTER_REGNUM \
483 || (N) == STACK_POINTER_REGNUM || (N) == ARG_POINTER_REGNUM \
484 || ((N) >= FIRST_VIRTUAL_REGISTER && (N) <= LAST_VIRTUAL_REGISTER) \
485 || ((N) < FIRST_PSEUDO_REGISTER \
486 && FIXED_REGNO_P (N) && REGNO_REG_CLASS (N) != NO_REGS))
488 /* A register is cheap if it is a user variable assigned to the register
489 or if its register number always corresponds to a cheap register. */
491 #define CHEAP_REG(N) \
492 ((REG_USERVAR_P (N) && REGNO (N) < FIRST_PSEUDO_REGISTER) \
493 || CHEAP_REGNO (REGNO (N)))
495 #define COST(X) \
496 (GET_CODE (X) == REG \
497 ? (CHEAP_REG (X) ? 0 \
498 : REGNO (X) >= FIRST_PSEUDO_REGISTER ? 1 \
499 : 2) \
500 : notreg_cost(X))
502 /* Get the info associated with register N. */
504 #define GET_CSE_REG_INFO(N) \
505 (((N) == cached_regno && cached_cse_reg_info) \
506 ? cached_cse_reg_info : get_cse_reg_info ((N)))
508 /* Get the number of times this register has been updated in this
509 basic block. */
511 #define REG_TICK(N) ((GET_CSE_REG_INFO (N))->reg_tick)
513 /* Get the point at which REG was recorded in the table. */
515 #define REG_IN_TABLE(N) ((GET_CSE_REG_INFO (N))->reg_in_table)
517 /* Get the quantity number for REG. */
519 #define REG_QTY(N) ((GET_CSE_REG_INFO (N))->reg_qty)
521 /* Determine if the quantity number for register X represents a valid index
522 into the `qty_...' variables. */
524 #define REGNO_QTY_VALID_P(N) (REG_QTY (N) != (N))
526 #ifdef ADDRESS_COST
527 /* The ADDRESS_COST macro does not deal with ADDRESSOF nodes. But,
528 during CSE, such nodes are present. Using an ADDRESSOF node which
529 refers to the address of a REG is a good thing because we can then
530 turn (MEM (ADDRESSSOF (REG))) into just plain REG. */
531 #define CSE_ADDRESS_COST(RTX) \
532 ((GET_CODE (RTX) == ADDRESSOF && REG_P (XEXP ((RTX), 0))) \
533 ? -1 : ADDRESS_COST(RTX))
534 #endif
536 static struct table_elt *table[NBUCKETS];
538 /* Chain of `struct table_elt's made so far for this function
539 but currently removed from the table. */
541 static struct table_elt *free_element_chain;
543 /* Number of `struct table_elt' structures made so far for this function. */
545 static int n_elements_made;
547 /* Maximum value `n_elements_made' has had so far in this compilation
548 for functions previously processed. */
550 static int max_elements_made;
552 /* Surviving equivalence class when two equivalence classes are merged
553 by recording the effects of a jump in the last insn. Zero if the
554 last insn was not a conditional jump. */
556 static struct table_elt *last_jump_equiv_class;
558 /* Set to the cost of a constant pool reference if one was found for a
559 symbolic constant. If this was found, it means we should try to
560 convert constants into constant pool entries if they don't fit in
561 the insn. */
563 static int constant_pool_entries_cost;
565 /* Define maximum length of a branch path. */
567 #define PATHLENGTH 10
569 /* This data describes a block that will be processed by cse_basic_block. */
571 struct cse_basic_block_data
573 /* Lowest CUID value of insns in block. */
574 int low_cuid;
575 /* Highest CUID value of insns in block. */
576 int high_cuid;
577 /* Total number of SETs in block. */
578 int nsets;
579 /* Last insn in the block. */
580 rtx last;
581 /* Size of current branch path, if any. */
582 int path_size;
583 /* Current branch path, indicating which branches will be taken. */
584 struct branch_path
586 /* The branch insn. */
587 rtx branch;
588 /* Whether it should be taken or not. AROUND is the same as taken
589 except that it is used when the destination label is not preceded
590 by a BARRIER. */
591 enum taken {TAKEN, NOT_TAKEN, AROUND} status;
592 } path[PATHLENGTH];
595 /* Nonzero if X has the form (PLUS frame-pointer integer). We check for
596 virtual regs here because the simplify_*_operation routines are called
597 by integrate.c, which is called before virtual register instantiation.
599 ?!? FIXED_BASE_PLUS_P and NONZERO_BASE_PLUS_P need to move into
600 a header file so that their definitions can be shared with the
601 simplification routines in simplify-rtx.c. Until then, do not
602 change these macros without also changing the copy in simplify-rtx.c. */
604 #define FIXED_BASE_PLUS_P(X) \
605 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
606 || ((X) == arg_pointer_rtx && fixed_regs[ARG_POINTER_REGNUM])\
607 || (X) == virtual_stack_vars_rtx \
608 || (X) == virtual_incoming_args_rtx \
609 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
610 && (XEXP (X, 0) == frame_pointer_rtx \
611 || XEXP (X, 0) == hard_frame_pointer_rtx \
612 || ((X) == arg_pointer_rtx \
613 && fixed_regs[ARG_POINTER_REGNUM]) \
614 || XEXP (X, 0) == virtual_stack_vars_rtx \
615 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
616 || GET_CODE (X) == ADDRESSOF)
618 /* Similar, but also allows reference to the stack pointer.
620 This used to include FIXED_BASE_PLUS_P, however, we can't assume that
621 arg_pointer_rtx by itself is nonzero, because on at least one machine,
622 the i960, the arg pointer is zero when it is unused. */
624 #define NONZERO_BASE_PLUS_P(X) \
625 ((X) == frame_pointer_rtx || (X) == hard_frame_pointer_rtx \
626 || (X) == virtual_stack_vars_rtx \
627 || (X) == virtual_incoming_args_rtx \
628 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
629 && (XEXP (X, 0) == frame_pointer_rtx \
630 || XEXP (X, 0) == hard_frame_pointer_rtx \
631 || ((X) == arg_pointer_rtx \
632 && fixed_regs[ARG_POINTER_REGNUM]) \
633 || XEXP (X, 0) == virtual_stack_vars_rtx \
634 || XEXP (X, 0) == virtual_incoming_args_rtx)) \
635 || (X) == stack_pointer_rtx \
636 || (X) == virtual_stack_dynamic_rtx \
637 || (X) == virtual_outgoing_args_rtx \
638 || (GET_CODE (X) == PLUS && GET_CODE (XEXP (X, 1)) == CONST_INT \
639 && (XEXP (X, 0) == stack_pointer_rtx \
640 || XEXP (X, 0) == virtual_stack_dynamic_rtx \
641 || XEXP (X, 0) == virtual_outgoing_args_rtx)) \
642 || GET_CODE (X) == ADDRESSOF)
644 static int notreg_cost PROTO((rtx));
645 static void new_basic_block PROTO((void));
646 static void make_new_qty PROTO((int));
647 static void make_regs_eqv PROTO((int, int));
648 static void delete_reg_equiv PROTO((int));
649 static int mention_regs PROTO((rtx));
650 static int insert_regs PROTO((rtx, struct table_elt *, int));
651 static void free_element PROTO((struct table_elt *));
652 static void remove_from_table PROTO((struct table_elt *, unsigned));
653 static struct table_elt *get_element PROTO((void));
654 static struct table_elt *lookup PROTO((rtx, unsigned, enum machine_mode)),
655 *lookup_for_remove PROTO((rtx, unsigned, enum machine_mode));
656 static rtx lookup_as_function PROTO((rtx, enum rtx_code));
657 static struct table_elt *insert PROTO((rtx, struct table_elt *, unsigned,
658 enum machine_mode));
659 static void merge_equiv_classes PROTO((struct table_elt *,
660 struct table_elt *));
661 static void invalidate PROTO((rtx, enum machine_mode));
662 static int cse_rtx_varies_p PROTO((rtx));
663 static void remove_invalid_refs PROTO((int));
664 static void remove_invalid_subreg_refs PROTO((int, int, enum machine_mode));
665 static void rehash_using_reg PROTO((rtx));
666 static void invalidate_memory PROTO((void));
667 static void invalidate_for_call PROTO((void));
668 static rtx use_related_value PROTO((rtx, struct table_elt *));
669 static unsigned canon_hash PROTO((rtx, enum machine_mode));
670 static unsigned safe_hash PROTO((rtx, enum machine_mode));
671 static int exp_equiv_p PROTO((rtx, rtx, int, int));
672 static rtx canon_reg PROTO((rtx, rtx));
673 static void find_best_addr PROTO((rtx, rtx *));
674 static enum rtx_code find_comparison_args PROTO((enum rtx_code, rtx *, rtx *,
675 enum machine_mode *,
676 enum machine_mode *));
677 static rtx fold_rtx PROTO((rtx, rtx));
678 static rtx equiv_constant PROTO((rtx));
679 static void record_jump_equiv PROTO((rtx, int));
680 static void record_jump_cond PROTO((enum rtx_code, enum machine_mode,
681 rtx, rtx, int));
682 static void cse_insn PROTO((rtx, rtx));
683 #ifdef AUTO_INC_DEC
684 static int addr_affects_sp_p PROTO((rtx));
685 #endif
686 static void invalidate_from_clobbers PROTO((rtx));
687 static rtx cse_process_notes PROTO((rtx, rtx));
688 static void cse_around_loop PROTO((rtx));
689 static void invalidate_skipped_set PROTO((rtx, rtx, void *));
690 static void invalidate_skipped_block PROTO((rtx));
691 static void cse_check_loop_start PROTO((rtx, rtx, void *));
692 static void cse_set_around_loop PROTO((rtx, rtx, rtx));
693 static rtx cse_basic_block PROTO((rtx, rtx, struct branch_path *, int));
694 static void count_reg_usage PROTO((rtx, int *, rtx, int));
695 extern void dump_class PROTO((struct table_elt*));
696 static struct cse_reg_info* get_cse_reg_info PROTO((int));
697 static unsigned int hash_cse_reg_info PROTO((hash_table_entry_t));
698 static int cse_reg_info_equal_p PROTO((hash_table_entry_t,
699 hash_table_entry_t));
701 static void flush_hash_table PROTO((void));
703 /* Dump the expressions in the equivalence class indicated by CLASSP.
704 This function is used only for debugging. */
705 void
706 dump_class (classp)
707 struct table_elt *classp;
709 struct table_elt *elt;
711 fprintf (stderr, "Equivalence chain for ");
712 print_rtl (stderr, classp->exp);
713 fprintf (stderr, ": \n");
715 for (elt = classp->first_same_value; elt; elt = elt->next_same_value)
717 print_rtl (stderr, elt->exp);
718 fprintf (stderr, "\n");
722 /* Return an estimate of the cost of computing rtx X.
723 One use is in cse, to decide which expression to keep in the hash table.
724 Another is in rtl generation, to pick the cheapest way to multiply.
725 Other uses like the latter are expected in the future. */
727 /* Internal function, to compute cost when X is not a register; called
728 from COST macro to keep it simple. */
730 static int
731 notreg_cost (x)
732 rtx x;
734 return ((GET_CODE (x) == SUBREG
735 && GET_CODE (SUBREG_REG (x)) == REG
736 && GET_MODE_CLASS (GET_MODE (x)) == MODE_INT
737 && GET_MODE_CLASS (GET_MODE (SUBREG_REG (x))) == MODE_INT
738 && (GET_MODE_SIZE (GET_MODE (x))
739 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
740 && subreg_lowpart_p (x)
741 && TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (x)),
742 GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x)))))
743 ? (CHEAP_REG (SUBREG_REG (x)) ? 0
744 : (REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER ? 1
745 : 2))
746 : rtx_cost (x, SET) * 2);
749 /* Return the right cost to give to an operation
750 to make the cost of the corresponding register-to-register instruction
751 N times that of a fast register-to-register instruction. */
753 #define COSTS_N_INSNS(N) ((N) * 4 - 2)
756 rtx_cost (x, outer_code)
757 rtx x;
758 enum rtx_code outer_code ATTRIBUTE_UNUSED;
760 register int i, j;
761 register enum rtx_code code;
762 register const char *fmt;
763 register int total;
765 if (x == 0)
766 return 0;
768 /* Compute the default costs of certain things.
769 Note that RTX_COSTS can override the defaults. */
771 code = GET_CODE (x);
772 switch (code)
774 case MULT:
775 /* Count multiplication by 2**n as a shift,
776 because if we are considering it, we would output it as a shift. */
777 if (GET_CODE (XEXP (x, 1)) == CONST_INT
778 && exact_log2 (INTVAL (XEXP (x, 1))) >= 0)
779 total = 2;
780 else
781 total = COSTS_N_INSNS (5);
782 break;
783 case DIV:
784 case UDIV:
785 case MOD:
786 case UMOD:
787 total = COSTS_N_INSNS (7);
788 break;
789 case USE:
790 /* Used in loop.c and combine.c as a marker. */
791 total = 0;
792 break;
793 case ASM_OPERANDS:
794 /* We don't want these to be used in substitutions because
795 we have no way of validating the resulting insn. So assign
796 anything containing an ASM_OPERANDS a very high cost. */
797 total = 1000;
798 break;
799 default:
800 total = 2;
803 switch (code)
805 case REG:
806 return ! CHEAP_REG (x);
808 case SUBREG:
809 /* If we can't tie these modes, make this expensive. The larger
810 the mode, the more expensive it is. */
811 if (! MODES_TIEABLE_P (GET_MODE (x), GET_MODE (SUBREG_REG (x))))
812 return COSTS_N_INSNS (2
813 + GET_MODE_SIZE (GET_MODE (x)) / UNITS_PER_WORD);
814 return 2;
815 #ifdef RTX_COSTS
816 RTX_COSTS (x, code, outer_code);
817 #endif
818 #ifdef CONST_COSTS
819 CONST_COSTS (x, code, outer_code);
820 #endif
822 default:
823 #ifdef DEFAULT_RTX_COSTS
824 DEFAULT_RTX_COSTS(x, code, outer_code);
825 #endif
826 break;
829 /* Sum the costs of the sub-rtx's, plus cost of this operation,
830 which is already in total. */
832 fmt = GET_RTX_FORMAT (code);
833 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
834 if (fmt[i] == 'e')
835 total += rtx_cost (XEXP (x, i), code);
836 else if (fmt[i] == 'E')
837 for (j = 0; j < XVECLEN (x, i); j++)
838 total += rtx_cost (XVECEXP (x, i, j), code);
840 return total;
843 static struct cse_reg_info *
844 get_cse_reg_info (regno)
845 int regno;
847 struct cse_reg_info *cri;
848 struct cse_reg_info **entry;
849 struct cse_reg_info temp;
851 /* See if we already have this entry. */
852 temp.regno = regno;
853 entry = (struct cse_reg_info **) find_hash_table_entry (cse_reg_info_tree,
854 &temp, TRUE);
856 if (*entry)
857 cri = *entry;
858 else
860 /* Get a new cse_reg_info structure. */
861 if (cse_reg_info_free_list)
863 cri = cse_reg_info_free_list;
864 cse_reg_info_free_list = cri->next;
866 else
867 cri = (struct cse_reg_info *) xmalloc (sizeof (struct cse_reg_info));
869 /* Initialize it. */
870 cri->reg_tick = 0;
871 cri->reg_in_table = -1;
872 cri->reg_qty = regno;
873 cri->regno = regno;
874 cri->next = cse_reg_info_used_list;
875 cse_reg_info_used_list = cri;
876 if (!cse_reg_info_used_list_end)
877 cse_reg_info_used_list_end = cri;
879 *entry = cri;
882 /* Cache this lookup; we tend to be looking up information about the
883 same register several times in a row. */
884 cached_regno = regno;
885 cached_cse_reg_info = cri;
887 return cri;
890 static unsigned int
891 hash_cse_reg_info (el_ptr)
892 hash_table_entry_t el_ptr;
894 return ((const struct cse_reg_info *) el_ptr)->regno;
897 static int
898 cse_reg_info_equal_p (el_ptr1, el_ptr2)
899 hash_table_entry_t el_ptr1;
900 hash_table_entry_t el_ptr2;
902 return (((const struct cse_reg_info *) el_ptr1)->regno
903 == ((const struct cse_reg_info *) el_ptr2)->regno);
906 /* Clear the hash table and initialize each register with its own quantity,
907 for a new basic block. */
909 static void
910 new_basic_block ()
912 register int i;
914 next_qty = max_reg;
916 if (cse_reg_info_tree)
918 delete_hash_table (cse_reg_info_tree);
919 if (cse_reg_info_used_list)
921 cse_reg_info_used_list_end->next = cse_reg_info_free_list;
922 cse_reg_info_free_list = cse_reg_info_used_list;
923 cse_reg_info_used_list = cse_reg_info_used_list_end = 0;
925 cached_cse_reg_info = 0;
928 cse_reg_info_tree = create_hash_table (0, hash_cse_reg_info,
929 cse_reg_info_equal_p);
931 CLEAR_HARD_REG_SET (hard_regs_in_table);
933 /* The per-quantity values used to be initialized here, but it is
934 much faster to initialize each as it is made in `make_new_qty'. */
936 for (i = 0; i < NBUCKETS; i++)
938 register struct table_elt *this, *next;
939 for (this = table[i]; this; this = next)
941 next = this->next_same_hash;
942 free_element (this);
946 bzero ((char *) table, sizeof table);
948 prev_insn = 0;
950 #ifdef HAVE_cc0
951 prev_insn_cc0 = 0;
952 #endif
955 /* Say that register REG contains a quantity not in any register before
956 and initialize that quantity. */
958 static void
959 make_new_qty (reg)
960 register int reg;
962 register int q;
964 if (next_qty >= max_qty)
965 abort ();
967 q = REG_QTY (reg) = next_qty++;
968 qty_first_reg[q] = reg;
969 qty_last_reg[q] = reg;
970 qty_const[q] = qty_const_insn[q] = 0;
971 qty_comparison_code[q] = UNKNOWN;
973 reg_next_eqv[reg] = reg_prev_eqv[reg] = -1;
976 /* Make reg NEW equivalent to reg OLD.
977 OLD is not changing; NEW is. */
979 static void
980 make_regs_eqv (new, old)
981 register int new, old;
983 register int lastr, firstr;
984 register int q = REG_QTY (old);
986 /* Nothing should become eqv until it has a "non-invalid" qty number. */
987 if (! REGNO_QTY_VALID_P (old))
988 abort ();
990 REG_QTY (new) = q;
991 firstr = qty_first_reg[q];
992 lastr = qty_last_reg[q];
994 /* Prefer fixed hard registers to anything. Prefer pseudo regs to other
995 hard regs. Among pseudos, if NEW will live longer than any other reg
996 of the same qty, and that is beyond the current basic block,
997 make it the new canonical replacement for this qty. */
998 if (! (firstr < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (firstr))
999 /* Certain fixed registers might be of the class NO_REGS. This means
1000 that not only can they not be allocated by the compiler, but
1001 they cannot be used in substitutions or canonicalizations
1002 either. */
1003 && (new >= FIRST_PSEUDO_REGISTER || REGNO_REG_CLASS (new) != NO_REGS)
1004 && ((new < FIRST_PSEUDO_REGISTER && FIXED_REGNO_P (new))
1005 || (new >= FIRST_PSEUDO_REGISTER
1006 && (firstr < FIRST_PSEUDO_REGISTER
1007 || ((uid_cuid[REGNO_LAST_UID (new)] > cse_basic_block_end
1008 || (uid_cuid[REGNO_FIRST_UID (new)]
1009 < cse_basic_block_start))
1010 && (uid_cuid[REGNO_LAST_UID (new)]
1011 > uid_cuid[REGNO_LAST_UID (firstr)]))))))
1013 reg_prev_eqv[firstr] = new;
1014 reg_next_eqv[new] = firstr;
1015 reg_prev_eqv[new] = -1;
1016 qty_first_reg[q] = new;
1018 else
1020 /* If NEW is a hard reg (known to be non-fixed), insert at end.
1021 Otherwise, insert before any non-fixed hard regs that are at the
1022 end. Registers of class NO_REGS cannot be used as an
1023 equivalent for anything. */
1024 while (lastr < FIRST_PSEUDO_REGISTER && reg_prev_eqv[lastr] >= 0
1025 && (REGNO_REG_CLASS (lastr) == NO_REGS || ! FIXED_REGNO_P (lastr))
1026 && new >= FIRST_PSEUDO_REGISTER)
1027 lastr = reg_prev_eqv[lastr];
1028 reg_next_eqv[new] = reg_next_eqv[lastr];
1029 if (reg_next_eqv[lastr] >= 0)
1030 reg_prev_eqv[reg_next_eqv[lastr]] = new;
1031 else
1032 qty_last_reg[q] = new;
1033 reg_next_eqv[lastr] = new;
1034 reg_prev_eqv[new] = lastr;
1038 /* Remove REG from its equivalence class. */
1040 static void
1041 delete_reg_equiv (reg)
1042 register int reg;
1044 register int q = REG_QTY (reg);
1045 register int p, n;
1047 /* If invalid, do nothing. */
1048 if (q == reg)
1049 return;
1051 p = reg_prev_eqv[reg];
1052 n = reg_next_eqv[reg];
1054 if (n != -1)
1055 reg_prev_eqv[n] = p;
1056 else
1057 qty_last_reg[q] = p;
1058 if (p != -1)
1059 reg_next_eqv[p] = n;
1060 else
1061 qty_first_reg[q] = n;
1063 REG_QTY (reg) = reg;
1066 /* Remove any invalid expressions from the hash table
1067 that refer to any of the registers contained in expression X.
1069 Make sure that newly inserted references to those registers
1070 as subexpressions will be considered valid.
1072 mention_regs is not called when a register itself
1073 is being stored in the table.
1075 Return 1 if we have done something that may have changed the hash code
1076 of X. */
1078 static int
1079 mention_regs (x)
1080 rtx x;
1082 register enum rtx_code code;
1083 register int i, j;
1084 register const char *fmt;
1085 register int changed = 0;
1087 if (x == 0)
1088 return 0;
1090 code = GET_CODE (x);
1091 if (code == REG)
1093 register int regno = REGNO (x);
1094 register int endregno
1095 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
1096 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
1097 int i;
1099 for (i = regno; i < endregno; i++)
1101 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1102 remove_invalid_refs (i);
1104 REG_IN_TABLE (i) = REG_TICK (i);
1107 return 0;
1110 /* If this is a SUBREG, we don't want to discard other SUBREGs of the same
1111 pseudo if they don't use overlapping words. We handle only pseudos
1112 here for simplicity. */
1113 if (code == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1114 && REGNO (SUBREG_REG (x)) >= FIRST_PSEUDO_REGISTER)
1116 int i = REGNO (SUBREG_REG (x));
1118 if (REG_IN_TABLE (i) >= 0 && REG_IN_TABLE (i) != REG_TICK (i))
1120 /* If reg_tick has been incremented more than once since
1121 reg_in_table was last set, that means that the entire
1122 register has been set before, so discard anything memorized
1123 for the entrire register, including all SUBREG expressions. */
1124 if (REG_IN_TABLE (i) != REG_TICK (i) - 1)
1125 remove_invalid_refs (i);
1126 else
1127 remove_invalid_subreg_refs (i, SUBREG_WORD (x), GET_MODE (x));
1130 REG_IN_TABLE (i) = REG_TICK (i);
1131 return 0;
1134 /* If X is a comparison or a COMPARE and either operand is a register
1135 that does not have a quantity, give it one. This is so that a later
1136 call to record_jump_equiv won't cause X to be assigned a different
1137 hash code and not found in the table after that call.
1139 It is not necessary to do this here, since rehash_using_reg can
1140 fix up the table later, but doing this here eliminates the need to
1141 call that expensive function in the most common case where the only
1142 use of the register is in the comparison. */
1144 if (code == COMPARE || GET_RTX_CLASS (code) == '<')
1146 if (GET_CODE (XEXP (x, 0)) == REG
1147 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 0))))
1148 if (insert_regs (XEXP (x, 0), NULL_PTR, 0))
1150 rehash_using_reg (XEXP (x, 0));
1151 changed = 1;
1154 if (GET_CODE (XEXP (x, 1)) == REG
1155 && ! REGNO_QTY_VALID_P (REGNO (XEXP (x, 1))))
1156 if (insert_regs (XEXP (x, 1), NULL_PTR, 0))
1158 rehash_using_reg (XEXP (x, 1));
1159 changed = 1;
1163 fmt = GET_RTX_FORMAT (code);
1164 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1165 if (fmt[i] == 'e')
1166 changed |= mention_regs (XEXP (x, i));
1167 else if (fmt[i] == 'E')
1168 for (j = 0; j < XVECLEN (x, i); j++)
1169 changed |= mention_regs (XVECEXP (x, i, j));
1171 return changed;
1174 /* Update the register quantities for inserting X into the hash table
1175 with a value equivalent to CLASSP.
1176 (If the class does not contain a REG, it is irrelevant.)
1177 If MODIFIED is nonzero, X is a destination; it is being modified.
1178 Note that delete_reg_equiv should be called on a register
1179 before insert_regs is done on that register with MODIFIED != 0.
1181 Nonzero value means that elements of reg_qty have changed
1182 so X's hash code may be different. */
1184 static int
1185 insert_regs (x, classp, modified)
1186 rtx x;
1187 struct table_elt *classp;
1188 int modified;
1190 if (GET_CODE (x) == REG)
1192 register int regno = REGNO (x);
1194 /* If REGNO is in the equivalence table already but is of the
1195 wrong mode for that equivalence, don't do anything here. */
1197 if (REGNO_QTY_VALID_P (regno)
1198 && qty_mode[REG_QTY (regno)] != GET_MODE (x))
1199 return 0;
1201 if (modified || ! REGNO_QTY_VALID_P (regno))
1203 if (classp)
1204 for (classp = classp->first_same_value;
1205 classp != 0;
1206 classp = classp->next_same_value)
1207 if (GET_CODE (classp->exp) == REG
1208 && GET_MODE (classp->exp) == GET_MODE (x))
1210 make_regs_eqv (regno, REGNO (classp->exp));
1211 return 1;
1214 make_new_qty (regno);
1215 qty_mode[REG_QTY (regno)] = GET_MODE (x);
1216 return 1;
1219 return 0;
1222 /* If X is a SUBREG, we will likely be inserting the inner register in the
1223 table. If that register doesn't have an assigned quantity number at
1224 this point but does later, the insertion that we will be doing now will
1225 not be accessible because its hash code will have changed. So assign
1226 a quantity number now. */
1228 else if (GET_CODE (x) == SUBREG && GET_CODE (SUBREG_REG (x)) == REG
1229 && ! REGNO_QTY_VALID_P (REGNO (SUBREG_REG (x))))
1231 int regno = REGNO (SUBREG_REG (x));
1233 insert_regs (SUBREG_REG (x), NULL_PTR, 0);
1234 /* Mention_regs checks if REG_TICK is exactly one larger than
1235 REG_IN_TABLE to find out if there was only a single preceding
1236 invalidation - for the SUBREG - or another one, which would be
1237 for the full register. Since we don't invalidate the SUBREG
1238 here first, we might have to bump up REG_TICK so that mention_regs
1239 will do the right thing. */
1240 if (REG_IN_TABLE (regno) >= 0
1241 && REG_TICK (regno) == REG_IN_TABLE (regno) + 1)
1242 REG_TICK (regno)++;
1243 mention_regs (x);
1244 return 1;
1246 else
1247 return mention_regs (x);
1250 /* Look in or update the hash table. */
1252 /* Put the element ELT on the list of free elements. */
1254 static void
1255 free_element (elt)
1256 struct table_elt *elt;
1258 elt->next_same_hash = free_element_chain;
1259 free_element_chain = elt;
1262 /* Return an element that is free for use. */
1264 static struct table_elt *
1265 get_element ()
1267 struct table_elt *elt = free_element_chain;
1268 if (elt)
1270 free_element_chain = elt->next_same_hash;
1271 return elt;
1273 n_elements_made++;
1274 return (struct table_elt *) oballoc (sizeof (struct table_elt));
1277 /* Remove table element ELT from use in the table.
1278 HASH is its hash code, made using the HASH macro.
1279 It's an argument because often that is known in advance
1280 and we save much time not recomputing it. */
1282 static void
1283 remove_from_table (elt, hash)
1284 register struct table_elt *elt;
1285 unsigned hash;
1287 if (elt == 0)
1288 return;
1290 /* Mark this element as removed. See cse_insn. */
1291 elt->first_same_value = 0;
1293 /* Remove the table element from its equivalence class. */
1296 register struct table_elt *prev = elt->prev_same_value;
1297 register struct table_elt *next = elt->next_same_value;
1299 if (next) next->prev_same_value = prev;
1301 if (prev)
1302 prev->next_same_value = next;
1303 else
1305 register struct table_elt *newfirst = next;
1306 while (next)
1308 next->first_same_value = newfirst;
1309 next = next->next_same_value;
1314 /* Remove the table element from its hash bucket. */
1317 register struct table_elt *prev = elt->prev_same_hash;
1318 register struct table_elt *next = elt->next_same_hash;
1320 if (next) next->prev_same_hash = prev;
1322 if (prev)
1323 prev->next_same_hash = next;
1324 else if (table[hash] == elt)
1325 table[hash] = next;
1326 else
1328 /* This entry is not in the proper hash bucket. This can happen
1329 when two classes were merged by `merge_equiv_classes'. Search
1330 for the hash bucket that it heads. This happens only very
1331 rarely, so the cost is acceptable. */
1332 for (hash = 0; hash < NBUCKETS; hash++)
1333 if (table[hash] == elt)
1334 table[hash] = next;
1338 /* Remove the table element from its related-value circular chain. */
1340 if (elt->related_value != 0 && elt->related_value != elt)
1342 register struct table_elt *p = elt->related_value;
1343 while (p->related_value != elt)
1344 p = p->related_value;
1345 p->related_value = elt->related_value;
1346 if (p->related_value == p)
1347 p->related_value = 0;
1350 free_element (elt);
1353 /* Look up X in the hash table and return its table element,
1354 or 0 if X is not in the table.
1356 MODE is the machine-mode of X, or if X is an integer constant
1357 with VOIDmode then MODE is the mode with which X will be used.
1359 Here we are satisfied to find an expression whose tree structure
1360 looks like X. */
1362 static struct table_elt *
1363 lookup (x, hash, mode)
1364 rtx x;
1365 unsigned hash;
1366 enum machine_mode mode;
1368 register struct table_elt *p;
1370 for (p = table[hash]; p; p = p->next_same_hash)
1371 if (mode == p->mode && ((x == p->exp && GET_CODE (x) == REG)
1372 || exp_equiv_p (x, p->exp, GET_CODE (x) != REG, 0)))
1373 return p;
1375 return 0;
1378 /* Like `lookup' but don't care whether the table element uses invalid regs.
1379 Also ignore discrepancies in the machine mode of a register. */
1381 static struct table_elt *
1382 lookup_for_remove (x, hash, mode)
1383 rtx x;
1384 unsigned hash;
1385 enum machine_mode mode;
1387 register struct table_elt *p;
1389 if (GET_CODE (x) == REG)
1391 int regno = REGNO (x);
1392 /* Don't check the machine mode when comparing registers;
1393 invalidating (REG:SI 0) also invalidates (REG:DF 0). */
1394 for (p = table[hash]; p; p = p->next_same_hash)
1395 if (GET_CODE (p->exp) == REG
1396 && REGNO (p->exp) == regno)
1397 return p;
1399 else
1401 for (p = table[hash]; p; p = p->next_same_hash)
1402 if (mode == p->mode && (x == p->exp || exp_equiv_p (x, p->exp, 0, 0)))
1403 return p;
1406 return 0;
1409 /* Look for an expression equivalent to X and with code CODE.
1410 If one is found, return that expression. */
1412 static rtx
1413 lookup_as_function (x, code)
1414 rtx x;
1415 enum rtx_code code;
1417 register struct table_elt *p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS,
1418 GET_MODE (x));
1419 /* If we are looking for a CONST_INT, the mode doesn't really matter, as
1420 long as we are narrowing. So if we looked in vain for a mode narrower
1421 than word_mode before, look for word_mode now. */
1422 if (p == 0 && code == CONST_INT
1423 && GET_MODE_SIZE (GET_MODE (x)) < GET_MODE_SIZE (word_mode))
1425 x = copy_rtx (x);
1426 PUT_MODE (x, word_mode);
1427 p = lookup (x, safe_hash (x, VOIDmode) % NBUCKETS, word_mode);
1430 if (p == 0)
1431 return 0;
1433 for (p = p->first_same_value; p; p = p->next_same_value)
1435 if (GET_CODE (p->exp) == code
1436 /* Make sure this is a valid entry in the table. */
1437 && exp_equiv_p (p->exp, p->exp, 1, 0))
1438 return p->exp;
1441 return 0;
1444 /* Insert X in the hash table, assuming HASH is its hash code
1445 and CLASSP is an element of the class it should go in
1446 (or 0 if a new class should be made).
1447 It is inserted at the proper position to keep the class in
1448 the order cheapest first.
1450 MODE is the machine-mode of X, or if X is an integer constant
1451 with VOIDmode then MODE is the mode with which X will be used.
1453 For elements of equal cheapness, the most recent one
1454 goes in front, except that the first element in the list
1455 remains first unless a cheaper element is added. The order of
1456 pseudo-registers does not matter, as canon_reg will be called to
1457 find the cheapest when a register is retrieved from the table.
1459 The in_memory field in the hash table element is set to 0.
1460 The caller must set it nonzero if appropriate.
1462 You should call insert_regs (X, CLASSP, MODIFY) before calling here,
1463 and if insert_regs returns a nonzero value
1464 you must then recompute its hash code before calling here.
1466 If necessary, update table showing constant values of quantities. */
1468 #define CHEAPER(X,Y) ((X)->cost < (Y)->cost)
1470 static struct table_elt *
1471 insert (x, classp, hash, mode)
1472 register rtx x;
1473 register struct table_elt *classp;
1474 unsigned hash;
1475 enum machine_mode mode;
1477 register struct table_elt *elt;
1479 /* If X is a register and we haven't made a quantity for it,
1480 something is wrong. */
1481 if (GET_CODE (x) == REG && ! REGNO_QTY_VALID_P (REGNO (x)))
1482 abort ();
1484 /* If X is a hard register, show it is being put in the table. */
1485 if (GET_CODE (x) == REG && REGNO (x) < FIRST_PSEUDO_REGISTER)
1487 int regno = REGNO (x);
1488 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1489 int i;
1491 for (i = regno; i < endregno; i++)
1492 SET_HARD_REG_BIT (hard_regs_in_table, i);
1495 /* If X is a label, show we recorded it. */
1496 if (GET_CODE (x) == LABEL_REF
1497 || (GET_CODE (x) == CONST && GET_CODE (XEXP (x, 0)) == PLUS
1498 && GET_CODE (XEXP (XEXP (x, 0), 0)) == LABEL_REF))
1499 recorded_label_ref = 1;
1501 /* Put an element for X into the right hash bucket. */
1503 elt = get_element ();
1504 elt->exp = x;
1505 elt->cost = COST (x);
1506 elt->next_same_value = 0;
1507 elt->prev_same_value = 0;
1508 elt->next_same_hash = table[hash];
1509 elt->prev_same_hash = 0;
1510 elt->related_value = 0;
1511 elt->in_memory = 0;
1512 elt->mode = mode;
1513 elt->is_const = (CONSTANT_P (x)
1514 /* GNU C++ takes advantage of this for `this'
1515 (and other const values). */
1516 || (RTX_UNCHANGING_P (x)
1517 && GET_CODE (x) == REG
1518 && REGNO (x) >= FIRST_PSEUDO_REGISTER)
1519 || FIXED_BASE_PLUS_P (x));
1521 if (table[hash])
1522 table[hash]->prev_same_hash = elt;
1523 table[hash] = elt;
1525 /* Put it into the proper value-class. */
1526 if (classp)
1528 classp = classp->first_same_value;
1529 if (CHEAPER (elt, classp))
1530 /* Insert at the head of the class */
1532 register struct table_elt *p;
1533 elt->next_same_value = classp;
1534 classp->prev_same_value = elt;
1535 elt->first_same_value = elt;
1537 for (p = classp; p; p = p->next_same_value)
1538 p->first_same_value = elt;
1540 else
1542 /* Insert not at head of the class. */
1543 /* Put it after the last element cheaper than X. */
1544 register struct table_elt *p, *next;
1545 for (p = classp; (next = p->next_same_value) && CHEAPER (next, elt);
1546 p = next);
1547 /* Put it after P and before NEXT. */
1548 elt->next_same_value = next;
1549 if (next)
1550 next->prev_same_value = elt;
1551 elt->prev_same_value = p;
1552 p->next_same_value = elt;
1553 elt->first_same_value = classp;
1556 else
1557 elt->first_same_value = elt;
1559 /* If this is a constant being set equivalent to a register or a register
1560 being set equivalent to a constant, note the constant equivalence.
1562 If this is a constant, it cannot be equivalent to a different constant,
1563 and a constant is the only thing that can be cheaper than a register. So
1564 we know the register is the head of the class (before the constant was
1565 inserted).
1567 If this is a register that is not already known equivalent to a
1568 constant, we must check the entire class.
1570 If this is a register that is already known equivalent to an insn,
1571 update `qty_const_insn' to show that `this_insn' is the latest
1572 insn making that quantity equivalent to the constant. */
1574 if (elt->is_const && classp && GET_CODE (classp->exp) == REG
1575 && GET_CODE (x) != REG)
1577 qty_const[REG_QTY (REGNO (classp->exp))]
1578 = gen_lowpart_if_possible (qty_mode[REG_QTY (REGNO (classp->exp))], x);
1579 qty_const_insn[REG_QTY (REGNO (classp->exp))] = this_insn;
1582 else if (GET_CODE (x) == REG && classp && ! qty_const[REG_QTY (REGNO (x))]
1583 && ! elt->is_const)
1585 register struct table_elt *p;
1587 for (p = classp; p != 0; p = p->next_same_value)
1589 if (p->is_const && GET_CODE (p->exp) != REG)
1591 qty_const[REG_QTY (REGNO (x))]
1592 = gen_lowpart_if_possible (GET_MODE (x), p->exp);
1593 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1594 break;
1599 else if (GET_CODE (x) == REG && qty_const[REG_QTY (REGNO (x))]
1600 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))])
1601 qty_const_insn[REG_QTY (REGNO (x))] = this_insn;
1603 /* If this is a constant with symbolic value,
1604 and it has a term with an explicit integer value,
1605 link it up with related expressions. */
1606 if (GET_CODE (x) == CONST)
1608 rtx subexp = get_related_value (x);
1609 unsigned subhash;
1610 struct table_elt *subelt, *subelt_prev;
1612 if (subexp != 0)
1614 /* Get the integer-free subexpression in the hash table. */
1615 subhash = safe_hash (subexp, mode) % NBUCKETS;
1616 subelt = lookup (subexp, subhash, mode);
1617 if (subelt == 0)
1618 subelt = insert (subexp, NULL_PTR, subhash, mode);
1619 /* Initialize SUBELT's circular chain if it has none. */
1620 if (subelt->related_value == 0)
1621 subelt->related_value = subelt;
1622 /* Find the element in the circular chain that precedes SUBELT. */
1623 subelt_prev = subelt;
1624 while (subelt_prev->related_value != subelt)
1625 subelt_prev = subelt_prev->related_value;
1626 /* Put new ELT into SUBELT's circular chain just before SUBELT.
1627 This way the element that follows SUBELT is the oldest one. */
1628 elt->related_value = subelt_prev->related_value;
1629 subelt_prev->related_value = elt;
1633 return elt;
1636 /* Given two equivalence classes, CLASS1 and CLASS2, put all the entries from
1637 CLASS2 into CLASS1. This is done when we have reached an insn which makes
1638 the two classes equivalent.
1640 CLASS1 will be the surviving class; CLASS2 should not be used after this
1641 call.
1643 Any invalid entries in CLASS2 will not be copied. */
1645 static void
1646 merge_equiv_classes (class1, class2)
1647 struct table_elt *class1, *class2;
1649 struct table_elt *elt, *next, *new;
1651 /* Ensure we start with the head of the classes. */
1652 class1 = class1->first_same_value;
1653 class2 = class2->first_same_value;
1655 /* If they were already equal, forget it. */
1656 if (class1 == class2)
1657 return;
1659 for (elt = class2; elt; elt = next)
1661 unsigned hash;
1662 rtx exp = elt->exp;
1663 enum machine_mode mode = elt->mode;
1665 next = elt->next_same_value;
1667 /* Remove old entry, make a new one in CLASS1's class.
1668 Don't do this for invalid entries as we cannot find their
1669 hash code (it also isn't necessary). */
1670 if (GET_CODE (exp) == REG || exp_equiv_p (exp, exp, 1, 0))
1672 hash_arg_in_memory = 0;
1673 hash = HASH (exp, mode);
1675 if (GET_CODE (exp) == REG)
1676 delete_reg_equiv (REGNO (exp));
1678 remove_from_table (elt, hash);
1680 if (insert_regs (exp, class1, 0))
1682 rehash_using_reg (exp);
1683 hash = HASH (exp, mode);
1685 new = insert (exp, class1, hash, mode);
1686 new->in_memory = hash_arg_in_memory;
1692 /* Flush the entire hash table. */
1694 static void
1695 flush_hash_table ()
1697 int i;
1698 struct table_elt *p;
1700 for (i = 0; i < NBUCKETS; i++)
1701 for (p = table[i]; p; p = table[i])
1703 /* Note that invalidate can remove elements
1704 after P in the current hash chain. */
1705 if (GET_CODE (p->exp) == REG)
1706 invalidate (p->exp, p->mode);
1707 else
1708 remove_from_table (p, i);
1712 /* Remove from the hash table, or mark as invalid, all expressions whose
1713 values could be altered by storing in X. X is a register, a subreg, or
1714 a memory reference with nonvarying address (because, when a memory
1715 reference with a varying address is stored in, all memory references are
1716 removed by invalidate_memory so specific invalidation is superfluous).
1717 FULL_MODE, if not VOIDmode, indicates that this much should be
1718 invalidated instead of just the amount indicated by the mode of X. This
1719 is only used for bitfield stores into memory.
1721 A nonvarying address may be just a register or just a symbol reference,
1722 or it may be either of those plus a numeric offset. */
1724 static void
1725 invalidate (x, full_mode)
1726 rtx x;
1727 enum machine_mode full_mode;
1729 register int i;
1730 register struct table_elt *p;
1732 switch (GET_CODE (x))
1734 case REG:
1736 /* If X is a register, dependencies on its contents are recorded
1737 through the qty number mechanism. Just change the qty number of
1738 the register, mark it as invalid for expressions that refer to it,
1739 and remove it itself. */
1740 register int regno = REGNO (x);
1741 register unsigned hash = HASH (x, GET_MODE (x));
1743 /* Remove REGNO from any quantity list it might be on and indicate
1744 that its value might have changed. If it is a pseudo, remove its
1745 entry from the hash table.
1747 For a hard register, we do the first two actions above for any
1748 additional hard registers corresponding to X. Then, if any of these
1749 registers are in the table, we must remove any REG entries that
1750 overlap these registers. */
1752 delete_reg_equiv (regno);
1753 REG_TICK (regno)++;
1755 if (regno >= FIRST_PSEUDO_REGISTER)
1757 /* Because a register can be referenced in more than one mode,
1758 we might have to remove more than one table entry. */
1759 struct table_elt *elt;
1761 while ((elt = lookup_for_remove (x, hash, GET_MODE (x))))
1762 remove_from_table (elt, hash);
1764 else
1766 HOST_WIDE_INT in_table
1767 = TEST_HARD_REG_BIT (hard_regs_in_table, regno);
1768 int endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
1769 int tregno, tendregno;
1770 register struct table_elt *p, *next;
1772 CLEAR_HARD_REG_BIT (hard_regs_in_table, regno);
1774 for (i = regno + 1; i < endregno; i++)
1776 in_table |= TEST_HARD_REG_BIT (hard_regs_in_table, i);
1777 CLEAR_HARD_REG_BIT (hard_regs_in_table, i);
1778 delete_reg_equiv (i);
1779 REG_TICK (i)++;
1782 if (in_table)
1783 for (hash = 0; hash < NBUCKETS; hash++)
1784 for (p = table[hash]; p; p = next)
1786 next = p->next_same_hash;
1788 if (GET_CODE (p->exp) != REG
1789 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1790 continue;
1792 tregno = REGNO (p->exp);
1793 tendregno
1794 = tregno + HARD_REGNO_NREGS (tregno, GET_MODE (p->exp));
1795 if (tendregno > regno && tregno < endregno)
1796 remove_from_table (p, hash);
1800 return;
1802 case SUBREG:
1803 invalidate (SUBREG_REG (x), VOIDmode);
1804 return;
1806 case PARALLEL:
1807 for (i = XVECLEN (x, 0) - 1; i >= 0 ; --i)
1808 invalidate (XVECEXP (x, 0, i), VOIDmode);
1809 return;
1811 case EXPR_LIST:
1812 /* This is part of a disjoint return value; extract the location in
1813 question ignoring the offset. */
1814 invalidate (XEXP (x, 0), VOIDmode);
1815 return;
1817 case MEM:
1818 /* Remove all hash table elements that refer to overlapping pieces of
1819 memory. */
1820 if (full_mode == VOIDmode)
1821 full_mode = GET_MODE (x);
1823 for (i = 0; i < NBUCKETS; i++)
1825 register struct table_elt *next;
1827 for (p = table[i]; p; p = next)
1829 next = p->next_same_hash;
1830 if (p->in_memory
1831 && (GET_CODE (p->exp) != MEM
1832 || true_dependence (x, full_mode, p->exp,
1833 cse_rtx_varies_p)))
1834 remove_from_table (p, i);
1837 return;
1839 default:
1840 abort ();
1844 /* Remove all expressions that refer to register REGNO,
1845 since they are already invalid, and we are about to
1846 mark that register valid again and don't want the old
1847 expressions to reappear as valid. */
1849 static void
1850 remove_invalid_refs (regno)
1851 int regno;
1853 register int i;
1854 register struct table_elt *p, *next;
1856 for (i = 0; i < NBUCKETS; i++)
1857 for (p = table[i]; p; p = next)
1859 next = p->next_same_hash;
1860 if (GET_CODE (p->exp) != REG
1861 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1862 remove_from_table (p, i);
1866 /* Likewise for a subreg with subreg_reg WORD and mode MODE. */
1867 static void
1868 remove_invalid_subreg_refs (regno, word, mode)
1869 int regno;
1870 int word;
1871 enum machine_mode mode;
1873 register int i;
1874 register struct table_elt *p, *next;
1875 int end = word + (GET_MODE_SIZE (mode) - 1) / UNITS_PER_WORD;
1877 for (i = 0; i < NBUCKETS; i++)
1878 for (p = table[i]; p; p = next)
1880 rtx exp;
1881 next = p->next_same_hash;
1883 exp = p->exp;
1884 if (GET_CODE (p->exp) != REG
1885 && (GET_CODE (exp) != SUBREG
1886 || GET_CODE (SUBREG_REG (exp)) != REG
1887 || REGNO (SUBREG_REG (exp)) != regno
1888 || (((SUBREG_WORD (exp)
1889 + (GET_MODE_SIZE (GET_MODE (exp)) - 1) / UNITS_PER_WORD)
1890 >= word)
1891 && SUBREG_WORD (exp) <= end))
1892 && refers_to_regno_p (regno, regno + 1, p->exp, NULL_PTR))
1893 remove_from_table (p, i);
1897 /* Recompute the hash codes of any valid entries in the hash table that
1898 reference X, if X is a register, or SUBREG_REG (X) if X is a SUBREG.
1900 This is called when we make a jump equivalence. */
1902 static void
1903 rehash_using_reg (x)
1904 rtx x;
1906 unsigned int i;
1907 struct table_elt *p, *next;
1908 unsigned hash;
1910 if (GET_CODE (x) == SUBREG)
1911 x = SUBREG_REG (x);
1913 /* If X is not a register or if the register is known not to be in any
1914 valid entries in the table, we have no work to do. */
1916 if (GET_CODE (x) != REG
1917 || REG_IN_TABLE (REGNO (x)) < 0
1918 || REG_IN_TABLE (REGNO (x)) != REG_TICK (REGNO (x)))
1919 return;
1921 /* Scan all hash chains looking for valid entries that mention X.
1922 If we find one and it is in the wrong hash chain, move it. We can skip
1923 objects that are registers, since they are handled specially. */
1925 for (i = 0; i < NBUCKETS; i++)
1926 for (p = table[i]; p; p = next)
1928 next = p->next_same_hash;
1929 if (GET_CODE (p->exp) != REG && reg_mentioned_p (x, p->exp)
1930 && exp_equiv_p (p->exp, p->exp, 1, 0)
1931 && i != (hash = safe_hash (p->exp, p->mode) % NBUCKETS))
1933 if (p->next_same_hash)
1934 p->next_same_hash->prev_same_hash = p->prev_same_hash;
1936 if (p->prev_same_hash)
1937 p->prev_same_hash->next_same_hash = p->next_same_hash;
1938 else
1939 table[i] = p->next_same_hash;
1941 p->next_same_hash = table[hash];
1942 p->prev_same_hash = 0;
1943 if (table[hash])
1944 table[hash]->prev_same_hash = p;
1945 table[hash] = p;
1950 /* Remove from the hash table any expression that is a call-clobbered
1951 register. Also update their TICK values. */
1953 static void
1954 invalidate_for_call ()
1956 int regno, endregno;
1957 int i;
1958 unsigned hash;
1959 struct table_elt *p, *next;
1960 int in_table = 0;
1962 /* Go through all the hard registers. For each that is clobbered in
1963 a CALL_INSN, remove the register from quantity chains and update
1964 reg_tick if defined. Also see if any of these registers is currently
1965 in the table. */
1967 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
1968 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, regno))
1970 delete_reg_equiv (regno);
1971 if (REG_TICK (regno) >= 0)
1972 REG_TICK (regno)++;
1974 in_table |= (TEST_HARD_REG_BIT (hard_regs_in_table, regno) != 0);
1977 /* In the case where we have no call-clobbered hard registers in the
1978 table, we are done. Otherwise, scan the table and remove any
1979 entry that overlaps a call-clobbered register. */
1981 if (in_table)
1982 for (hash = 0; hash < NBUCKETS; hash++)
1983 for (p = table[hash]; p; p = next)
1985 next = p->next_same_hash;
1987 if (GET_CODE (p->exp) != REG
1988 || REGNO (p->exp) >= FIRST_PSEUDO_REGISTER)
1989 continue;
1991 regno = REGNO (p->exp);
1992 endregno = regno + HARD_REGNO_NREGS (regno, GET_MODE (p->exp));
1994 for (i = regno; i < endregno; i++)
1995 if (TEST_HARD_REG_BIT (regs_invalidated_by_call, i))
1997 remove_from_table (p, hash);
1998 break;
2003 /* Given an expression X of type CONST,
2004 and ELT which is its table entry (or 0 if it
2005 is not in the hash table),
2006 return an alternate expression for X as a register plus integer.
2007 If none can be found, return 0. */
2009 static rtx
2010 use_related_value (x, elt)
2011 rtx x;
2012 struct table_elt *elt;
2014 register struct table_elt *relt = 0;
2015 register struct table_elt *p, *q;
2016 HOST_WIDE_INT offset;
2018 /* First, is there anything related known?
2019 If we have a table element, we can tell from that.
2020 Otherwise, must look it up. */
2022 if (elt != 0 && elt->related_value != 0)
2023 relt = elt;
2024 else if (elt == 0 && GET_CODE (x) == CONST)
2026 rtx subexp = get_related_value (x);
2027 if (subexp != 0)
2028 relt = lookup (subexp,
2029 safe_hash (subexp, GET_MODE (subexp)) % NBUCKETS,
2030 GET_MODE (subexp));
2033 if (relt == 0)
2034 return 0;
2036 /* Search all related table entries for one that has an
2037 equivalent register. */
2039 p = relt;
2040 while (1)
2042 /* This loop is strange in that it is executed in two different cases.
2043 The first is when X is already in the table. Then it is searching
2044 the RELATED_VALUE list of X's class (RELT). The second case is when
2045 X is not in the table. Then RELT points to a class for the related
2046 value.
2048 Ensure that, whatever case we are in, that we ignore classes that have
2049 the same value as X. */
2051 if (rtx_equal_p (x, p->exp))
2052 q = 0;
2053 else
2054 for (q = p->first_same_value; q; q = q->next_same_value)
2055 if (GET_CODE (q->exp) == REG)
2056 break;
2058 if (q)
2059 break;
2061 p = p->related_value;
2063 /* We went all the way around, so there is nothing to be found.
2064 Alternatively, perhaps RELT was in the table for some other reason
2065 and it has no related values recorded. */
2066 if (p == relt || p == 0)
2067 break;
2070 if (q == 0)
2071 return 0;
2073 offset = (get_integer_term (x) - get_integer_term (p->exp));
2074 /* Note: OFFSET may be 0 if P->xexp and X are related by commutativity. */
2075 return plus_constant (q->exp, offset);
2078 /* Hash an rtx. We are careful to make sure the value is never negative.
2079 Equivalent registers hash identically.
2080 MODE is used in hashing for CONST_INTs only;
2081 otherwise the mode of X is used.
2083 Store 1 in do_not_record if any subexpression is volatile.
2085 Store 1 in hash_arg_in_memory if X contains a MEM rtx
2086 which does not have the RTX_UNCHANGING_P bit set.
2088 Note that cse_insn knows that the hash code of a MEM expression
2089 is just (int) MEM plus the hash code of the address. */
2091 static unsigned
2092 canon_hash (x, mode)
2093 rtx x;
2094 enum machine_mode mode;
2096 register int i, j;
2097 register unsigned hash = 0;
2098 register enum rtx_code code;
2099 register const char *fmt;
2101 /* repeat is used to turn tail-recursion into iteration. */
2102 repeat:
2103 if (x == 0)
2104 return hash;
2106 code = GET_CODE (x);
2107 switch (code)
2109 case REG:
2111 register int regno = REGNO (x);
2113 /* On some machines, we can't record any non-fixed hard register,
2114 because extending its life will cause reload problems. We
2115 consider ap, fp, and sp to be fixed for this purpose.
2117 We also consider CCmode registers to be fixed for this purpose;
2118 failure to do so leads to failure to simplify 0<100 type of
2119 conditionals.
2121 On all machines, we can't record any global registers. */
2123 if (regno < FIRST_PSEUDO_REGISTER
2124 && (global_regs[regno]
2125 || (SMALL_REGISTER_CLASSES
2126 && ! fixed_regs[regno]
2127 && regno != FRAME_POINTER_REGNUM
2128 && regno != HARD_FRAME_POINTER_REGNUM
2129 && regno != ARG_POINTER_REGNUM
2130 && regno != STACK_POINTER_REGNUM
2131 && GET_MODE_CLASS (GET_MODE (x)) != MODE_CC)))
2133 do_not_record = 1;
2134 return 0;
2136 hash += ((unsigned) REG << 7) + (unsigned) REG_QTY (regno);
2137 return hash;
2140 /* We handle SUBREG of a REG specially because the underlying
2141 reg changes its hash value with every value change; we don't
2142 want to have to forget unrelated subregs when one subreg changes. */
2143 case SUBREG:
2145 if (GET_CODE (SUBREG_REG (x)) == REG)
2147 hash += (((unsigned) SUBREG << 7)
2148 + REGNO (SUBREG_REG (x)) + SUBREG_WORD (x));
2149 return hash;
2151 break;
2154 case CONST_INT:
2156 unsigned HOST_WIDE_INT tem = INTVAL (x);
2157 hash += ((unsigned) CONST_INT << 7) + (unsigned) mode + tem;
2158 return hash;
2161 case CONST_DOUBLE:
2162 /* This is like the general case, except that it only counts
2163 the integers representing the constant. */
2164 hash += (unsigned) code + (unsigned) GET_MODE (x);
2165 if (GET_MODE (x) != VOIDmode)
2166 for (i = 2; i < GET_RTX_LENGTH (CONST_DOUBLE); i++)
2168 unsigned HOST_WIDE_INT tem = XWINT (x, i);
2169 hash += tem;
2171 else
2172 hash += ((unsigned) CONST_DOUBLE_LOW (x)
2173 + (unsigned) CONST_DOUBLE_HIGH (x));
2174 return hash;
2176 /* Assume there is only one rtx object for any given label. */
2177 case LABEL_REF:
2178 hash
2179 += ((unsigned) LABEL_REF << 7) + (unsigned long) XEXP (x, 0);
2180 return hash;
2182 case SYMBOL_REF:
2183 hash
2184 += ((unsigned) SYMBOL_REF << 7) + (unsigned long) XSTR (x, 0);
2185 return hash;
2187 case MEM:
2188 /* We don't record if marked volatile or if BLKmode since we don't
2189 know the size of the move. */
2190 if (MEM_VOLATILE_P (x) || GET_MODE (x) == BLKmode)
2192 do_not_record = 1;
2193 return 0;
2195 if (! RTX_UNCHANGING_P (x) || FIXED_BASE_PLUS_P (XEXP (x, 0)))
2197 hash_arg_in_memory = 1;
2199 /* Now that we have already found this special case,
2200 might as well speed it up as much as possible. */
2201 hash += (unsigned) MEM;
2202 x = XEXP (x, 0);
2203 goto repeat;
2205 case PRE_DEC:
2206 case PRE_INC:
2207 case POST_DEC:
2208 case POST_INC:
2209 case PC:
2210 case CC0:
2211 case CALL:
2212 case UNSPEC_VOLATILE:
2213 do_not_record = 1;
2214 return 0;
2216 case ASM_OPERANDS:
2217 if (MEM_VOLATILE_P (x))
2219 do_not_record = 1;
2220 return 0;
2222 break;
2224 default:
2225 break;
2228 i = GET_RTX_LENGTH (code) - 1;
2229 hash += (unsigned) code + (unsigned) GET_MODE (x);
2230 fmt = GET_RTX_FORMAT (code);
2231 for (; i >= 0; i--)
2233 if (fmt[i] == 'e')
2235 rtx tem = XEXP (x, i);
2237 /* If we are about to do the last recursive call
2238 needed at this level, change it into iteration.
2239 This function is called enough to be worth it. */
2240 if (i == 0)
2242 x = tem;
2243 goto repeat;
2245 hash += canon_hash (tem, 0);
2247 else if (fmt[i] == 'E')
2248 for (j = 0; j < XVECLEN (x, i); j++)
2249 hash += canon_hash (XVECEXP (x, i, j), 0);
2250 else if (fmt[i] == 's')
2252 register unsigned char *p = (unsigned char *) XSTR (x, i);
2253 if (p)
2254 while (*p)
2255 hash += *p++;
2257 else if (fmt[i] == 'i')
2259 register unsigned tem = XINT (x, i);
2260 hash += tem;
2262 else if (fmt[i] == '0' || fmt[i] == 't')
2263 /* unused */;
2264 else
2265 abort ();
2267 return hash;
2270 /* Like canon_hash but with no side effects. */
2272 static unsigned
2273 safe_hash (x, mode)
2274 rtx x;
2275 enum machine_mode mode;
2277 int save_do_not_record = do_not_record;
2278 int save_hash_arg_in_memory = hash_arg_in_memory;
2279 unsigned hash = canon_hash (x, mode);
2280 hash_arg_in_memory = save_hash_arg_in_memory;
2281 do_not_record = save_do_not_record;
2282 return hash;
2285 /* Return 1 iff X and Y would canonicalize into the same thing,
2286 without actually constructing the canonicalization of either one.
2287 If VALIDATE is nonzero,
2288 we assume X is an expression being processed from the rtl
2289 and Y was found in the hash table. We check register refs
2290 in Y for being marked as valid.
2292 If EQUAL_VALUES is nonzero, we allow a register to match a constant value
2293 that is known to be in the register. Ordinarily, we don't allow them
2294 to match, because letting them match would cause unpredictable results
2295 in all the places that search a hash table chain for an equivalent
2296 for a given value. A possible equivalent that has different structure
2297 has its hash code computed from different data. Whether the hash code
2298 is the same as that of the given value is pure luck. */
2300 static int
2301 exp_equiv_p (x, y, validate, equal_values)
2302 rtx x, y;
2303 int validate;
2304 int equal_values;
2306 register int i, j;
2307 register enum rtx_code code;
2308 register const char *fmt;
2310 /* Note: it is incorrect to assume an expression is equivalent to itself
2311 if VALIDATE is nonzero. */
2312 if (x == y && !validate)
2313 return 1;
2314 if (x == 0 || y == 0)
2315 return x == y;
2317 code = GET_CODE (x);
2318 if (code != GET_CODE (y))
2320 if (!equal_values)
2321 return 0;
2323 /* If X is a constant and Y is a register or vice versa, they may be
2324 equivalent. We only have to validate if Y is a register. */
2325 if (CONSTANT_P (x) && GET_CODE (y) == REG
2326 && REGNO_QTY_VALID_P (REGNO (y))
2327 && GET_MODE (y) == qty_mode[REG_QTY (REGNO (y))]
2328 && rtx_equal_p (x, qty_const[REG_QTY (REGNO (y))])
2329 && (! validate || REG_IN_TABLE (REGNO (y)) == REG_TICK (REGNO (y))))
2330 return 1;
2332 if (CONSTANT_P (y) && code == REG
2333 && REGNO_QTY_VALID_P (REGNO (x))
2334 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2335 && rtx_equal_p (y, qty_const[REG_QTY (REGNO (x))]))
2336 return 1;
2338 return 0;
2341 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2342 if (GET_MODE (x) != GET_MODE (y))
2343 return 0;
2345 switch (code)
2347 case PC:
2348 case CC0:
2349 return x == y;
2351 case CONST_INT:
2352 return INTVAL (x) == INTVAL (y);
2354 case LABEL_REF:
2355 return XEXP (x, 0) == XEXP (y, 0);
2357 case SYMBOL_REF:
2358 return XSTR (x, 0) == XSTR (y, 0);
2360 case REG:
2362 int regno = REGNO (y);
2363 int endregno
2364 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
2365 : HARD_REGNO_NREGS (regno, GET_MODE (y)));
2366 int i;
2368 /* If the quantities are not the same, the expressions are not
2369 equivalent. If there are and we are not to validate, they
2370 are equivalent. Otherwise, ensure all regs are up-to-date. */
2372 if (REG_QTY (REGNO (x)) != REG_QTY (regno))
2373 return 0;
2375 if (! validate)
2376 return 1;
2378 for (i = regno; i < endregno; i++)
2379 if (REG_IN_TABLE (i) != REG_TICK (i))
2380 return 0;
2382 return 1;
2385 /* For commutative operations, check both orders. */
2386 case PLUS:
2387 case MULT:
2388 case AND:
2389 case IOR:
2390 case XOR:
2391 case NE:
2392 case EQ:
2393 return ((exp_equiv_p (XEXP (x, 0), XEXP (y, 0), validate, equal_values)
2394 && exp_equiv_p (XEXP (x, 1), XEXP (y, 1),
2395 validate, equal_values))
2396 || (exp_equiv_p (XEXP (x, 0), XEXP (y, 1),
2397 validate, equal_values)
2398 && exp_equiv_p (XEXP (x, 1), XEXP (y, 0),
2399 validate, equal_values)));
2401 default:
2402 break;
2405 /* Compare the elements. If any pair of corresponding elements
2406 fail to match, return 0 for the whole things. */
2408 fmt = GET_RTX_FORMAT (code);
2409 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2411 switch (fmt[i])
2413 case 'e':
2414 if (! exp_equiv_p (XEXP (x, i), XEXP (y, i), validate, equal_values))
2415 return 0;
2416 break;
2418 case 'E':
2419 if (XVECLEN (x, i) != XVECLEN (y, i))
2420 return 0;
2421 for (j = 0; j < XVECLEN (x, i); j++)
2422 if (! exp_equiv_p (XVECEXP (x, i, j), XVECEXP (y, i, j),
2423 validate, equal_values))
2424 return 0;
2425 break;
2427 case 's':
2428 if (strcmp (XSTR (x, i), XSTR (y, i)))
2429 return 0;
2430 break;
2432 case 'i':
2433 if (XINT (x, i) != XINT (y, i))
2434 return 0;
2435 break;
2437 case 'w':
2438 if (XWINT (x, i) != XWINT (y, i))
2439 return 0;
2440 break;
2442 case '0':
2443 case 't':
2444 break;
2446 default:
2447 abort ();
2451 return 1;
2454 /* Return 1 if X has a value that can vary even between two
2455 executions of the program. 0 means X can be compared reliably
2456 against certain constants or near-constants. */
2458 static int
2459 cse_rtx_varies_p (x)
2460 register rtx x;
2462 /* We need not check for X and the equivalence class being of the same
2463 mode because if X is equivalent to a constant in some mode, it
2464 doesn't vary in any mode. */
2466 if (GET_CODE (x) == REG
2467 && REGNO_QTY_VALID_P (REGNO (x))
2468 && GET_MODE (x) == qty_mode[REG_QTY (REGNO (x))]
2469 && qty_const[REG_QTY (REGNO (x))] != 0)
2470 return 0;
2472 if (GET_CODE (x) == PLUS
2473 && GET_CODE (XEXP (x, 1)) == CONST_INT
2474 && GET_CODE (XEXP (x, 0)) == REG
2475 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2476 && (GET_MODE (XEXP (x, 0))
2477 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2478 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))])
2479 return 0;
2481 /* This can happen as the result of virtual register instantiation, if
2482 the initial constant is too large to be a valid address. This gives
2483 us a three instruction sequence, load large offset into a register,
2484 load fp minus a constant into a register, then a MEM which is the
2485 sum of the two `constant' registers. */
2486 if (GET_CODE (x) == PLUS
2487 && GET_CODE (XEXP (x, 0)) == REG
2488 && GET_CODE (XEXP (x, 1)) == REG
2489 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 0)))
2490 && (GET_MODE (XEXP (x, 0))
2491 == qty_mode[REG_QTY (REGNO (XEXP (x, 0)))])
2492 && qty_const[REG_QTY (REGNO (XEXP (x, 0)))]
2493 && REGNO_QTY_VALID_P (REGNO (XEXP (x, 1)))
2494 && (GET_MODE (XEXP (x, 1))
2495 == qty_mode[REG_QTY (REGNO (XEXP (x, 1)))])
2496 && qty_const[REG_QTY (REGNO (XEXP (x, 1)))])
2497 return 0;
2499 return rtx_varies_p (x);
2502 /* Canonicalize an expression:
2503 replace each register reference inside it
2504 with the "oldest" equivalent register.
2506 If INSN is non-zero and we are replacing a pseudo with a hard register
2507 or vice versa, validate_change is used to ensure that INSN remains valid
2508 after we make our substitution. The calls are made with IN_GROUP non-zero
2509 so apply_change_group must be called upon the outermost return from this
2510 function (unless INSN is zero). The result of apply_change_group can
2511 generally be discarded since the changes we are making are optional. */
2513 static rtx
2514 canon_reg (x, insn)
2515 rtx x;
2516 rtx insn;
2518 register int i;
2519 register enum rtx_code code;
2520 register const char *fmt;
2522 if (x == 0)
2523 return x;
2525 code = GET_CODE (x);
2526 switch (code)
2528 case PC:
2529 case CC0:
2530 case CONST:
2531 case CONST_INT:
2532 case CONST_DOUBLE:
2533 case SYMBOL_REF:
2534 case LABEL_REF:
2535 case ADDR_VEC:
2536 case ADDR_DIFF_VEC:
2537 return x;
2539 case REG:
2541 register int first;
2543 /* Never replace a hard reg, because hard regs can appear
2544 in more than one machine mode, and we must preserve the mode
2545 of each occurrence. Also, some hard regs appear in
2546 MEMs that are shared and mustn't be altered. Don't try to
2547 replace any reg that maps to a reg of class NO_REGS. */
2548 if (REGNO (x) < FIRST_PSEUDO_REGISTER
2549 || ! REGNO_QTY_VALID_P (REGNO (x)))
2550 return x;
2552 first = qty_first_reg[REG_QTY (REGNO (x))];
2553 return (first >= FIRST_PSEUDO_REGISTER ? regno_reg_rtx[first]
2554 : REGNO_REG_CLASS (first) == NO_REGS ? x
2555 : gen_rtx_REG (qty_mode[REG_QTY (REGNO (x))], first));
2558 default:
2559 break;
2562 fmt = GET_RTX_FORMAT (code);
2563 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
2565 register int j;
2567 if (fmt[i] == 'e')
2569 rtx new = canon_reg (XEXP (x, i), insn);
2570 int insn_code;
2572 /* If replacing pseudo with hard reg or vice versa, ensure the
2573 insn remains valid. Likewise if the insn has MATCH_DUPs. */
2574 if (insn != 0 && new != 0
2575 && GET_CODE (new) == REG && GET_CODE (XEXP (x, i)) == REG
2576 && (((REGNO (new) < FIRST_PSEUDO_REGISTER)
2577 != (REGNO (XEXP (x, i)) < FIRST_PSEUDO_REGISTER))
2578 || (insn_code = recog_memoized (insn)) < 0
2579 || insn_data[insn_code].n_dups > 0))
2580 validate_change (insn, &XEXP (x, i), new, 1);
2581 else
2582 XEXP (x, i) = new;
2584 else if (fmt[i] == 'E')
2585 for (j = 0; j < XVECLEN (x, i); j++)
2586 XVECEXP (x, i, j) = canon_reg (XVECEXP (x, i, j), insn);
2589 return x;
2592 /* LOC is a location within INSN that is an operand address (the contents of
2593 a MEM). Find the best equivalent address to use that is valid for this
2594 insn.
2596 On most CISC machines, complicated address modes are costly, and rtx_cost
2597 is a good approximation for that cost. However, most RISC machines have
2598 only a few (usually only one) memory reference formats. If an address is
2599 valid at all, it is often just as cheap as any other address. Hence, for
2600 RISC machines, we use the configuration macro `ADDRESS_COST' to compare the
2601 costs of various addresses. For two addresses of equal cost, choose the one
2602 with the highest `rtx_cost' value as that has the potential of eliminating
2603 the most insns. For equal costs, we choose the first in the equivalence
2604 class. Note that we ignore the fact that pseudo registers are cheaper
2605 than hard registers here because we would also prefer the pseudo registers.
2608 static void
2609 find_best_addr (insn, loc)
2610 rtx insn;
2611 rtx *loc;
2613 struct table_elt *elt;
2614 rtx addr = *loc;
2615 #ifdef ADDRESS_COST
2616 struct table_elt *p;
2617 int found_better = 1;
2618 #endif
2619 int save_do_not_record = do_not_record;
2620 int save_hash_arg_in_memory = hash_arg_in_memory;
2621 int addr_volatile;
2622 int regno;
2623 unsigned hash;
2625 /* Do not try to replace constant addresses or addresses of local and
2626 argument slots. These MEM expressions are made only once and inserted
2627 in many instructions, as well as being used to control symbol table
2628 output. It is not safe to clobber them.
2630 There are some uncommon cases where the address is already in a register
2631 for some reason, but we cannot take advantage of that because we have
2632 no easy way to unshare the MEM. In addition, looking up all stack
2633 addresses is costly. */
2634 if ((GET_CODE (addr) == PLUS
2635 && GET_CODE (XEXP (addr, 0)) == REG
2636 && GET_CODE (XEXP (addr, 1)) == CONST_INT
2637 && (regno = REGNO (XEXP (addr, 0)),
2638 regno == FRAME_POINTER_REGNUM || regno == HARD_FRAME_POINTER_REGNUM
2639 || regno == ARG_POINTER_REGNUM))
2640 || (GET_CODE (addr) == REG
2641 && (regno = REGNO (addr), regno == FRAME_POINTER_REGNUM
2642 || regno == HARD_FRAME_POINTER_REGNUM
2643 || regno == ARG_POINTER_REGNUM))
2644 || GET_CODE (addr) == ADDRESSOF
2645 || CONSTANT_ADDRESS_P (addr))
2646 return;
2648 /* If this address is not simply a register, try to fold it. This will
2649 sometimes simplify the expression. Many simplifications
2650 will not be valid, but some, usually applying the associative rule, will
2651 be valid and produce better code. */
2652 if (GET_CODE (addr) != REG)
2654 rtx folded = fold_rtx (copy_rtx (addr), NULL_RTX);
2656 if (1
2657 #ifdef ADDRESS_COST
2658 && (CSE_ADDRESS_COST (folded) < CSE_ADDRESS_COST (addr)
2659 || (CSE_ADDRESS_COST (folded) == CSE_ADDRESS_COST (addr)
2660 && rtx_cost (folded, MEM) > rtx_cost (addr, MEM)))
2661 #else
2662 && rtx_cost (folded, MEM) < rtx_cost (addr, MEM)
2663 #endif
2664 && validate_change (insn, loc, folded, 0))
2665 addr = folded;
2668 /* If this address is not in the hash table, we can't look for equivalences
2669 of the whole address. Also, ignore if volatile. */
2671 do_not_record = 0;
2672 hash = HASH (addr, Pmode);
2673 addr_volatile = do_not_record;
2674 do_not_record = save_do_not_record;
2675 hash_arg_in_memory = save_hash_arg_in_memory;
2677 if (addr_volatile)
2678 return;
2680 elt = lookup (addr, hash, Pmode);
2682 #ifndef ADDRESS_COST
2683 if (elt)
2685 int our_cost = elt->cost;
2687 /* Find the lowest cost below ours that works. */
2688 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
2689 if (elt->cost < our_cost
2690 && (GET_CODE (elt->exp) == REG
2691 || exp_equiv_p (elt->exp, elt->exp, 1, 0))
2692 && validate_change (insn, loc,
2693 canon_reg (copy_rtx (elt->exp), NULL_RTX), 0))
2694 return;
2696 #else
2698 if (elt)
2700 /* We need to find the best (under the criteria documented above) entry
2701 in the class that is valid. We use the `flag' field to indicate
2702 choices that were invalid and iterate until we can't find a better
2703 one that hasn't already been tried. */
2705 for (p = elt->first_same_value; p; p = p->next_same_value)
2706 p->flag = 0;
2708 while (found_better)
2710 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2711 int best_rtx_cost = (elt->cost + 1) >> 1;
2712 struct table_elt *best_elt = elt;
2714 found_better = 0;
2715 for (p = elt->first_same_value; p; p = p->next_same_value)
2716 if (! p->flag)
2718 if ((GET_CODE (p->exp) == REG
2719 || exp_equiv_p (p->exp, p->exp, 1, 0))
2720 && (CSE_ADDRESS_COST (p->exp) < best_addr_cost
2721 || (CSE_ADDRESS_COST (p->exp) == best_addr_cost
2722 && (p->cost + 1) >> 1 > best_rtx_cost)))
2724 found_better = 1;
2725 best_addr_cost = CSE_ADDRESS_COST (p->exp);
2726 best_rtx_cost = (p->cost + 1) >> 1;
2727 best_elt = p;
2731 if (found_better)
2733 if (validate_change (insn, loc,
2734 canon_reg (copy_rtx (best_elt->exp),
2735 NULL_RTX), 0))
2736 return;
2737 else
2738 best_elt->flag = 1;
2743 /* If the address is a binary operation with the first operand a register
2744 and the second a constant, do the same as above, but looking for
2745 equivalences of the register. Then try to simplify before checking for
2746 the best address to use. This catches a few cases: First is when we
2747 have REG+const and the register is another REG+const. We can often merge
2748 the constants and eliminate one insn and one register. It may also be
2749 that a machine has a cheap REG+REG+const. Finally, this improves the
2750 code on the Alpha for unaligned byte stores. */
2752 if (flag_expensive_optimizations
2753 && (GET_RTX_CLASS (GET_CODE (*loc)) == '2'
2754 || GET_RTX_CLASS (GET_CODE (*loc)) == 'c')
2755 && GET_CODE (XEXP (*loc, 0)) == REG
2756 && GET_CODE (XEXP (*loc, 1)) == CONST_INT)
2758 rtx c = XEXP (*loc, 1);
2760 do_not_record = 0;
2761 hash = HASH (XEXP (*loc, 0), Pmode);
2762 do_not_record = save_do_not_record;
2763 hash_arg_in_memory = save_hash_arg_in_memory;
2765 elt = lookup (XEXP (*loc, 0), hash, Pmode);
2766 if (elt == 0)
2767 return;
2769 /* We need to find the best (under the criteria documented above) entry
2770 in the class that is valid. We use the `flag' field to indicate
2771 choices that were invalid and iterate until we can't find a better
2772 one that hasn't already been tried. */
2774 for (p = elt->first_same_value; p; p = p->next_same_value)
2775 p->flag = 0;
2777 while (found_better)
2779 int best_addr_cost = CSE_ADDRESS_COST (*loc);
2780 int best_rtx_cost = (COST (*loc) + 1) >> 1;
2781 struct table_elt *best_elt = elt;
2782 rtx best_rtx = *loc;
2783 int count;
2785 /* This is at worst case an O(n^2) algorithm, so limit our search
2786 to the first 32 elements on the list. This avoids trouble
2787 compiling code with very long basic blocks that can easily
2788 call simplify_gen_binary so many times that we run out of
2789 memory. */
2791 found_better = 0;
2792 for (p = elt->first_same_value, count = 0;
2793 p && count < 32;
2794 p = p->next_same_value, count++)
2795 if (! p->flag
2796 && (GET_CODE (p->exp) == REG
2797 || exp_equiv_p (p->exp, p->exp, 1, 0)))
2799 rtx new = simplify_gen_binary (GET_CODE (*loc), Pmode,
2800 p->exp, c);
2802 if ((CSE_ADDRESS_COST (new) < best_addr_cost
2803 || (CSE_ADDRESS_COST (new) == best_addr_cost
2804 && (COST (new) + 1) >> 1 > best_rtx_cost)))
2806 found_better = 1;
2807 best_addr_cost = CSE_ADDRESS_COST (new);
2808 best_rtx_cost = (COST (new) + 1) >> 1;
2809 best_elt = p;
2810 best_rtx = new;
2814 if (found_better)
2816 if (validate_change (insn, loc,
2817 canon_reg (copy_rtx (best_rtx),
2818 NULL_RTX), 0))
2819 return;
2820 else
2821 best_elt->flag = 1;
2825 #endif
2828 /* Given an operation (CODE, *PARG1, *PARG2), where code is a comparison
2829 operation (EQ, NE, GT, etc.), follow it back through the hash table and
2830 what values are being compared.
2832 *PARG1 and *PARG2 are updated to contain the rtx representing the values
2833 actually being compared. For example, if *PARG1 was (cc0) and *PARG2
2834 was (const_int 0), *PARG1 and *PARG2 will be set to the objects that were
2835 compared to produce cc0.
2837 The return value is the comparison operator and is either the code of
2838 A or the code corresponding to the inverse of the comparison. */
2840 static enum rtx_code
2841 find_comparison_args (code, parg1, parg2, pmode1, pmode2)
2842 enum rtx_code code;
2843 rtx *parg1, *parg2;
2844 enum machine_mode *pmode1, *pmode2;
2846 rtx arg1, arg2;
2848 arg1 = *parg1, arg2 = *parg2;
2850 /* If ARG2 is const0_rtx, see what ARG1 is equivalent to. */
2852 while (arg2 == CONST0_RTX (GET_MODE (arg1)))
2854 /* Set non-zero when we find something of interest. */
2855 rtx x = 0;
2856 int reverse_code = 0;
2857 struct table_elt *p = 0;
2859 /* If arg1 is a COMPARE, extract the comparison arguments from it.
2860 On machines with CC0, this is the only case that can occur, since
2861 fold_rtx will return the COMPARE or item being compared with zero
2862 when given CC0. */
2864 if (GET_CODE (arg1) == COMPARE && arg2 == const0_rtx)
2865 x = arg1;
2867 /* If ARG1 is a comparison operator and CODE is testing for
2868 STORE_FLAG_VALUE, get the inner arguments. */
2870 else if (GET_RTX_CLASS (GET_CODE (arg1)) == '<')
2872 if (code == NE
2873 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2874 && code == LT && STORE_FLAG_VALUE == -1)
2875 #ifdef FLOAT_STORE_FLAG_VALUE
2876 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2877 && FLOAT_STORE_FLAG_VALUE < 0)
2878 #endif
2880 x = arg1;
2881 else if (code == EQ
2882 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_INT
2883 && code == GE && STORE_FLAG_VALUE == -1)
2884 #ifdef FLOAT_STORE_FLAG_VALUE
2885 || (GET_MODE_CLASS (GET_MODE (arg1)) == MODE_FLOAT
2886 && FLOAT_STORE_FLAG_VALUE < 0)
2887 #endif
2889 x = arg1, reverse_code = 1;
2892 /* ??? We could also check for
2894 (ne (and (eq (...) (const_int 1))) (const_int 0))
2896 and related forms, but let's wait until we see them occurring. */
2898 if (x == 0)
2899 /* Look up ARG1 in the hash table and see if it has an equivalence
2900 that lets us see what is being compared. */
2901 p = lookup (arg1, safe_hash (arg1, GET_MODE (arg1)) % NBUCKETS,
2902 GET_MODE (arg1));
2903 if (p) p = p->first_same_value;
2905 for (; p; p = p->next_same_value)
2907 enum machine_mode inner_mode = GET_MODE (p->exp);
2909 /* If the entry isn't valid, skip it. */
2910 if (! exp_equiv_p (p->exp, p->exp, 1, 0))
2911 continue;
2913 if (GET_CODE (p->exp) == COMPARE
2914 /* Another possibility is that this machine has a compare insn
2915 that includes the comparison code. In that case, ARG1 would
2916 be equivalent to a comparison operation that would set ARG1 to
2917 either STORE_FLAG_VALUE or zero. If this is an NE operation,
2918 ORIG_CODE is the actual comparison being done; if it is an EQ,
2919 we must reverse ORIG_CODE. On machine with a negative value
2920 for STORE_FLAG_VALUE, also look at LT and GE operations. */
2921 || ((code == NE
2922 || (code == LT
2923 && GET_MODE_CLASS (inner_mode) == MODE_INT
2924 && (GET_MODE_BITSIZE (inner_mode)
2925 <= HOST_BITS_PER_WIDE_INT)
2926 && (STORE_FLAG_VALUE
2927 & ((HOST_WIDE_INT) 1
2928 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2929 #ifdef FLOAT_STORE_FLAG_VALUE
2930 || (code == LT
2931 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2932 && FLOAT_STORE_FLAG_VALUE < 0)
2933 #endif
2935 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<'))
2937 x = p->exp;
2938 break;
2940 else if ((code == EQ
2941 || (code == GE
2942 && GET_MODE_CLASS (inner_mode) == MODE_INT
2943 && (GET_MODE_BITSIZE (inner_mode)
2944 <= HOST_BITS_PER_WIDE_INT)
2945 && (STORE_FLAG_VALUE
2946 & ((HOST_WIDE_INT) 1
2947 << (GET_MODE_BITSIZE (inner_mode) - 1))))
2948 #ifdef FLOAT_STORE_FLAG_VALUE
2949 || (code == GE
2950 && GET_MODE_CLASS (inner_mode) == MODE_FLOAT
2951 && FLOAT_STORE_FLAG_VALUE < 0)
2952 #endif
2954 && GET_RTX_CLASS (GET_CODE (p->exp)) == '<')
2956 reverse_code = 1;
2957 x = p->exp;
2958 break;
2961 /* If this is fp + constant, the equivalent is a better operand since
2962 it may let us predict the value of the comparison. */
2963 else if (NONZERO_BASE_PLUS_P (p->exp))
2965 arg1 = p->exp;
2966 continue;
2970 /* If we didn't find a useful equivalence for ARG1, we are done.
2971 Otherwise, set up for the next iteration. */
2972 if (x == 0)
2973 break;
2975 arg1 = XEXP (x, 0), arg2 = XEXP (x, 1);
2976 if (GET_RTX_CLASS (GET_CODE (x)) == '<')
2977 code = GET_CODE (x);
2979 if (reverse_code)
2980 code = reverse_condition (code);
2983 /* Return our results. Return the modes from before fold_rtx
2984 because fold_rtx might produce const_int, and then it's too late. */
2985 *pmode1 = GET_MODE (arg1), *pmode2 = GET_MODE (arg2);
2986 *parg1 = fold_rtx (arg1, 0), *parg2 = fold_rtx (arg2, 0);
2988 return code;
2991 /* If X is a nontrivial arithmetic operation on an argument
2992 for which a constant value can be determined, return
2993 the result of operating on that value, as a constant.
2994 Otherwise, return X, possibly with one or more operands
2995 modified by recursive calls to this function.
2997 If X is a register whose contents are known, we do NOT
2998 return those contents here. equiv_constant is called to
2999 perform that task.
3001 INSN is the insn that we may be modifying. If it is 0, make a copy
3002 of X before modifying it. */
3004 static rtx
3005 fold_rtx (x, insn)
3006 rtx x;
3007 rtx insn;
3009 register enum rtx_code code;
3010 register enum machine_mode mode;
3011 register const char *fmt;
3012 register int i;
3013 rtx new = 0;
3014 int copied = 0;
3015 int must_swap = 0;
3017 /* Folded equivalents of first two operands of X. */
3018 rtx folded_arg0;
3019 rtx folded_arg1;
3021 /* Constant equivalents of first three operands of X;
3022 0 when no such equivalent is known. */
3023 rtx const_arg0;
3024 rtx const_arg1;
3025 rtx const_arg2;
3027 /* The mode of the first operand of X. We need this for sign and zero
3028 extends. */
3029 enum machine_mode mode_arg0;
3031 if (x == 0)
3032 return x;
3034 mode = GET_MODE (x);
3035 code = GET_CODE (x);
3036 switch (code)
3038 case CONST:
3039 case CONST_INT:
3040 case CONST_DOUBLE:
3041 case SYMBOL_REF:
3042 case LABEL_REF:
3043 case REG:
3044 /* No use simplifying an EXPR_LIST
3045 since they are used only for lists of args
3046 in a function call's REG_EQUAL note. */
3047 case EXPR_LIST:
3048 /* Changing anything inside an ADDRESSOF is incorrect; we don't
3049 want to (e.g.,) make (addressof (const_int 0)) just because
3050 the location is known to be zero. */
3051 case ADDRESSOF:
3052 return x;
3054 #ifdef HAVE_cc0
3055 case CC0:
3056 return prev_insn_cc0;
3057 #endif
3059 case PC:
3060 /* If the next insn is a CODE_LABEL followed by a jump table,
3061 PC's value is a LABEL_REF pointing to that label. That
3062 lets us fold switch statements on the Vax. */
3063 if (insn && GET_CODE (insn) == JUMP_INSN)
3065 rtx next = next_nonnote_insn (insn);
3067 if (next && GET_CODE (next) == CODE_LABEL
3068 && NEXT_INSN (next) != 0
3069 && GET_CODE (NEXT_INSN (next)) == JUMP_INSN
3070 && (GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_VEC
3071 || GET_CODE (PATTERN (NEXT_INSN (next))) == ADDR_DIFF_VEC))
3072 return gen_rtx_LABEL_REF (Pmode, next);
3074 break;
3076 case SUBREG:
3077 /* See if we previously assigned a constant value to this SUBREG. */
3078 if ((new = lookup_as_function (x, CONST_INT)) != 0
3079 || (new = lookup_as_function (x, CONST_DOUBLE)) != 0)
3080 return new;
3082 /* If this is a paradoxical SUBREG, we have no idea what value the
3083 extra bits would have. However, if the operand is equivalent
3084 to a SUBREG whose operand is the same as our mode, and all the
3085 modes are within a word, we can just use the inner operand
3086 because these SUBREGs just say how to treat the register.
3088 Similarly if we find an integer constant. */
3090 if (GET_MODE_SIZE (mode) > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x))))
3092 enum machine_mode imode = GET_MODE (SUBREG_REG (x));
3093 struct table_elt *elt;
3095 if (GET_MODE_SIZE (mode) <= UNITS_PER_WORD
3096 && GET_MODE_SIZE (imode) <= UNITS_PER_WORD
3097 && (elt = lookup (SUBREG_REG (x), HASH (SUBREG_REG (x), imode),
3098 imode)) != 0)
3099 for (elt = elt->first_same_value;
3100 elt; elt = elt->next_same_value)
3102 if (CONSTANT_P (elt->exp)
3103 && GET_MODE (elt->exp) == VOIDmode)
3104 return elt->exp;
3106 if (GET_CODE (elt->exp) == SUBREG
3107 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3108 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3109 return copy_rtx (SUBREG_REG (elt->exp));
3112 return x;
3115 /* Fold SUBREG_REG. If it changed, see if we can simplify the SUBREG.
3116 We might be able to if the SUBREG is extracting a single word in an
3117 integral mode or extracting the low part. */
3119 folded_arg0 = fold_rtx (SUBREG_REG (x), insn);
3120 const_arg0 = equiv_constant (folded_arg0);
3121 if (const_arg0)
3122 folded_arg0 = const_arg0;
3124 if (folded_arg0 != SUBREG_REG (x))
3126 new = 0;
3128 if (GET_MODE_CLASS (mode) == MODE_INT
3129 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3130 && GET_MODE (SUBREG_REG (x)) != VOIDmode)
3131 new = operand_subword (folded_arg0, SUBREG_WORD (x), 0,
3132 GET_MODE (SUBREG_REG (x)));
3133 if (new == 0 && subreg_lowpart_p (x))
3134 new = gen_lowpart_if_possible (mode, folded_arg0);
3135 if (new)
3136 return new;
3139 /* If this is a narrowing SUBREG and our operand is a REG, see if
3140 we can find an equivalence for REG that is an arithmetic operation
3141 in a wider mode where both operands are paradoxical SUBREGs
3142 from objects of our result mode. In that case, we couldn't report
3143 an equivalent value for that operation, since we don't know what the
3144 extra bits will be. But we can find an equivalence for this SUBREG
3145 by folding that operation is the narrow mode. This allows us to
3146 fold arithmetic in narrow modes when the machine only supports
3147 word-sized arithmetic.
3149 Also look for a case where we have a SUBREG whose operand is the
3150 same as our result. If both modes are smaller than a word, we
3151 are simply interpreting a register in different modes and we
3152 can use the inner value. */
3154 if (GET_CODE (folded_arg0) == REG
3155 && GET_MODE_SIZE (mode) < GET_MODE_SIZE (GET_MODE (folded_arg0))
3156 && subreg_lowpart_p (x))
3158 struct table_elt *elt;
3160 /* We can use HASH here since we know that canon_hash won't be
3161 called. */
3162 elt = lookup (folded_arg0,
3163 HASH (folded_arg0, GET_MODE (folded_arg0)),
3164 GET_MODE (folded_arg0));
3166 if (elt)
3167 elt = elt->first_same_value;
3169 for (; elt; elt = elt->next_same_value)
3171 enum rtx_code eltcode = GET_CODE (elt->exp);
3173 /* Just check for unary and binary operations. */
3174 if (GET_RTX_CLASS (GET_CODE (elt->exp)) == '1'
3175 && GET_CODE (elt->exp) != SIGN_EXTEND
3176 && GET_CODE (elt->exp) != ZERO_EXTEND
3177 && GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3178 && GET_MODE (SUBREG_REG (XEXP (elt->exp, 0))) == mode)
3180 rtx op0 = SUBREG_REG (XEXP (elt->exp, 0));
3182 if (GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3183 op0 = fold_rtx (op0, NULL_RTX);
3185 op0 = equiv_constant (op0);
3186 if (op0)
3187 new = simplify_unary_operation (GET_CODE (elt->exp), mode,
3188 op0, mode);
3190 else if ((GET_RTX_CLASS (GET_CODE (elt->exp)) == '2'
3191 || GET_RTX_CLASS (GET_CODE (elt->exp)) == 'c')
3192 && eltcode != DIV && eltcode != MOD
3193 && eltcode != UDIV && eltcode != UMOD
3194 && eltcode != ASHIFTRT && eltcode != LSHIFTRT
3195 && eltcode != ROTATE && eltcode != ROTATERT
3196 && ((GET_CODE (XEXP (elt->exp, 0)) == SUBREG
3197 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 0)))
3198 == mode))
3199 || CONSTANT_P (XEXP (elt->exp, 0)))
3200 && ((GET_CODE (XEXP (elt->exp, 1)) == SUBREG
3201 && (GET_MODE (SUBREG_REG (XEXP (elt->exp, 1)))
3202 == mode))
3203 || CONSTANT_P (XEXP (elt->exp, 1))))
3205 rtx op0 = gen_lowpart_common (mode, XEXP (elt->exp, 0));
3206 rtx op1 = gen_lowpart_common (mode, XEXP (elt->exp, 1));
3208 if (op0 && GET_CODE (op0) != REG && ! CONSTANT_P (op0))
3209 op0 = fold_rtx (op0, NULL_RTX);
3211 if (op0)
3212 op0 = equiv_constant (op0);
3214 if (op1 && GET_CODE (op1) != REG && ! CONSTANT_P (op1))
3215 op1 = fold_rtx (op1, NULL_RTX);
3217 if (op1)
3218 op1 = equiv_constant (op1);
3220 /* If we are looking for the low SImode part of
3221 (ashift:DI c (const_int 32)), it doesn't work
3222 to compute that in SImode, because a 32-bit shift
3223 in SImode is unpredictable. We know the value is 0. */
3224 if (op0 && op1
3225 && GET_CODE (elt->exp) == ASHIFT
3226 && GET_CODE (op1) == CONST_INT
3227 && INTVAL (op1) >= GET_MODE_BITSIZE (mode))
3229 if (INTVAL (op1) < GET_MODE_BITSIZE (GET_MODE (elt->exp)))
3231 /* If the count fits in the inner mode's width,
3232 but exceeds the outer mode's width,
3233 the value will get truncated to 0
3234 by the subreg. */
3235 new = const0_rtx;
3236 else
3237 /* If the count exceeds even the inner mode's width,
3238 don't fold this expression. */
3239 new = 0;
3241 else if (op0 && op1)
3242 new = simplify_binary_operation (GET_CODE (elt->exp), mode,
3243 op0, op1);
3246 else if (GET_CODE (elt->exp) == SUBREG
3247 && GET_MODE (SUBREG_REG (elt->exp)) == mode
3248 && (GET_MODE_SIZE (GET_MODE (folded_arg0))
3249 <= UNITS_PER_WORD)
3250 && exp_equiv_p (elt->exp, elt->exp, 1, 0))
3251 new = copy_rtx (SUBREG_REG (elt->exp));
3253 if (new)
3254 return new;
3258 return x;
3260 case NOT:
3261 case NEG:
3262 /* If we have (NOT Y), see if Y is known to be (NOT Z).
3263 If so, (NOT Y) simplifies to Z. Similarly for NEG. */
3264 new = lookup_as_function (XEXP (x, 0), code);
3265 if (new)
3266 return fold_rtx (copy_rtx (XEXP (new, 0)), insn);
3267 break;
3269 case MEM:
3270 /* If we are not actually processing an insn, don't try to find the
3271 best address. Not only don't we care, but we could modify the
3272 MEM in an invalid way since we have no insn to validate against. */
3273 if (insn != 0)
3274 find_best_addr (insn, &XEXP (x, 0));
3277 /* Even if we don't fold in the insn itself,
3278 we can safely do so here, in hopes of getting a constant. */
3279 rtx addr = fold_rtx (XEXP (x, 0), NULL_RTX);
3280 rtx base = 0;
3281 HOST_WIDE_INT offset = 0;
3283 if (GET_CODE (addr) == REG
3284 && REGNO_QTY_VALID_P (REGNO (addr))
3285 && GET_MODE (addr) == qty_mode[REG_QTY (REGNO (addr))]
3286 && qty_const[REG_QTY (REGNO (addr))] != 0)
3287 addr = qty_const[REG_QTY (REGNO (addr))];
3289 /* If address is constant, split it into a base and integer offset. */
3290 if (GET_CODE (addr) == SYMBOL_REF || GET_CODE (addr) == LABEL_REF)
3291 base = addr;
3292 else if (GET_CODE (addr) == CONST && GET_CODE (XEXP (addr, 0)) == PLUS
3293 && GET_CODE (XEXP (XEXP (addr, 0), 1)) == CONST_INT)
3295 base = XEXP (XEXP (addr, 0), 0);
3296 offset = INTVAL (XEXP (XEXP (addr, 0), 1));
3298 else if (GET_CODE (addr) == LO_SUM
3299 && GET_CODE (XEXP (addr, 1)) == SYMBOL_REF)
3300 base = XEXP (addr, 1);
3301 else if (GET_CODE (addr) == ADDRESSOF)
3302 return change_address (x, VOIDmode, addr);
3304 /* If this is a constant pool reference, we can fold it into its
3305 constant to allow better value tracking. */
3306 if (base && GET_CODE (base) == SYMBOL_REF
3307 && CONSTANT_POOL_ADDRESS_P (base))
3309 rtx constant = get_pool_constant (base);
3310 enum machine_mode const_mode = get_pool_mode (base);
3311 rtx new;
3313 if (CONSTANT_P (constant) && GET_CODE (constant) != CONST_INT)
3314 constant_pool_entries_cost = COST (constant);
3316 /* If we are loading the full constant, we have an equivalence. */
3317 if (offset == 0 && mode == const_mode)
3318 return constant;
3320 /* If this actually isn't a constant (weird!), we can't do
3321 anything. Otherwise, handle the two most common cases:
3322 extracting a word from a multi-word constant, and extracting
3323 the low-order bits. Other cases don't seem common enough to
3324 worry about. */
3325 if (! CONSTANT_P (constant))
3326 return x;
3328 if (GET_MODE_CLASS (mode) == MODE_INT
3329 && GET_MODE_SIZE (mode) == UNITS_PER_WORD
3330 && offset % UNITS_PER_WORD == 0
3331 && (new = operand_subword (constant,
3332 offset / UNITS_PER_WORD,
3333 0, const_mode)) != 0)
3334 return new;
3336 if (((BYTES_BIG_ENDIAN
3337 && offset == GET_MODE_SIZE (GET_MODE (constant)) - 1)
3338 || (! BYTES_BIG_ENDIAN && offset == 0))
3339 && (new = gen_lowpart_if_possible (mode, constant)) != 0)
3340 return new;
3343 /* If this is a reference to a label at a known position in a jump
3344 table, we also know its value. */
3345 if (base && GET_CODE (base) == LABEL_REF)
3347 rtx label = XEXP (base, 0);
3348 rtx table_insn = NEXT_INSN (label);
3350 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3351 && GET_CODE (PATTERN (table_insn)) == ADDR_VEC)
3353 rtx table = PATTERN (table_insn);
3355 if (offset >= 0
3356 && (offset / GET_MODE_SIZE (GET_MODE (table))
3357 < XVECLEN (table, 0)))
3358 return XVECEXP (table, 0,
3359 offset / GET_MODE_SIZE (GET_MODE (table)));
3361 if (table_insn && GET_CODE (table_insn) == JUMP_INSN
3362 && GET_CODE (PATTERN (table_insn)) == ADDR_DIFF_VEC)
3364 rtx table = PATTERN (table_insn);
3366 if (offset >= 0
3367 && (offset / GET_MODE_SIZE (GET_MODE (table))
3368 < XVECLEN (table, 1)))
3370 offset /= GET_MODE_SIZE (GET_MODE (table));
3371 new = gen_rtx_MINUS (Pmode, XVECEXP (table, 1, offset),
3372 XEXP (table, 0));
3374 if (GET_MODE (table) != Pmode)
3375 new = gen_rtx_TRUNCATE (GET_MODE (table), new);
3377 /* Indicate this is a constant. This isn't a
3378 valid form of CONST, but it will only be used
3379 to fold the next insns and then discarded, so
3380 it should be safe.
3382 Note this expression must be explicitly discarded,
3383 by cse_insn, else it may end up in a REG_EQUAL note
3384 and "escape" to cause problems elsewhere. */
3385 return gen_rtx_CONST (GET_MODE (new), new);
3390 return x;
3393 case ASM_OPERANDS:
3394 for (i = XVECLEN (x, 3) - 1; i >= 0; i--)
3395 validate_change (insn, &XVECEXP (x, 3, i),
3396 fold_rtx (XVECEXP (x, 3, i), insn), 0);
3397 break;
3399 default:
3400 break;
3403 const_arg0 = 0;
3404 const_arg1 = 0;
3405 const_arg2 = 0;
3406 mode_arg0 = VOIDmode;
3408 /* Try folding our operands.
3409 Then see which ones have constant values known. */
3411 fmt = GET_RTX_FORMAT (code);
3412 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
3413 if (fmt[i] == 'e')
3415 rtx arg = XEXP (x, i);
3416 rtx folded_arg = arg, const_arg = 0;
3417 enum machine_mode mode_arg = GET_MODE (arg);
3418 rtx cheap_arg, expensive_arg;
3419 rtx replacements[2];
3420 int j;
3422 /* Most arguments are cheap, so handle them specially. */
3423 switch (GET_CODE (arg))
3425 case REG:
3426 /* This is the same as calling equiv_constant; it is duplicated
3427 here for speed. */
3428 if (REGNO_QTY_VALID_P (REGNO (arg))
3429 && qty_const[REG_QTY (REGNO (arg))] != 0
3430 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != REG
3431 && GET_CODE (qty_const[REG_QTY (REGNO (arg))]) != PLUS)
3432 const_arg
3433 = gen_lowpart_if_possible (GET_MODE (arg),
3434 qty_const[REG_QTY (REGNO (arg))]);
3435 break;
3437 case CONST:
3438 case CONST_INT:
3439 case SYMBOL_REF:
3440 case LABEL_REF:
3441 case CONST_DOUBLE:
3442 const_arg = arg;
3443 break;
3445 #ifdef HAVE_cc0
3446 case CC0:
3447 folded_arg = prev_insn_cc0;
3448 mode_arg = prev_insn_cc0_mode;
3449 const_arg = equiv_constant (folded_arg);
3450 break;
3451 #endif
3453 default:
3454 folded_arg = fold_rtx (arg, insn);
3455 const_arg = equiv_constant (folded_arg);
3458 /* For the first three operands, see if the operand
3459 is constant or equivalent to a constant. */
3460 switch (i)
3462 case 0:
3463 folded_arg0 = folded_arg;
3464 const_arg0 = const_arg;
3465 mode_arg0 = mode_arg;
3466 break;
3467 case 1:
3468 folded_arg1 = folded_arg;
3469 const_arg1 = const_arg;
3470 break;
3471 case 2:
3472 const_arg2 = const_arg;
3473 break;
3476 /* Pick the least expensive of the folded argument and an
3477 equivalent constant argument. */
3478 if (const_arg == 0 || const_arg == folded_arg
3479 || COST (const_arg) > COST (folded_arg))
3480 cheap_arg = folded_arg, expensive_arg = const_arg;
3481 else
3482 cheap_arg = const_arg, expensive_arg = folded_arg;
3484 /* Try to replace the operand with the cheapest of the two
3485 possibilities. If it doesn't work and this is either of the first
3486 two operands of a commutative operation, try swapping them.
3487 If THAT fails, try the more expensive, provided it is cheaper
3488 than what is already there. */
3490 if (cheap_arg == XEXP (x, i))
3491 continue;
3493 if (insn == 0 && ! copied)
3495 x = copy_rtx (x);
3496 copied = 1;
3499 replacements[0] = cheap_arg, replacements[1] = expensive_arg;
3500 for (j = 0;
3501 j < 2 && replacements[j]
3502 && COST (replacements[j]) < COST (XEXP (x, i));
3503 j++)
3505 if (validate_change (insn, &XEXP (x, i), replacements[j], 0))
3506 break;
3508 if (code == NE || code == EQ || GET_RTX_CLASS (code) == 'c')
3510 validate_change (insn, &XEXP (x, i), XEXP (x, 1 - i), 1);
3511 validate_change (insn, &XEXP (x, 1 - i), replacements[j], 1);
3513 if (apply_change_group ())
3515 /* Swap them back to be invalid so that this loop can
3516 continue and flag them to be swapped back later. */
3517 rtx tem;
3519 tem = XEXP (x, 0); XEXP (x, 0) = XEXP (x, 1);
3520 XEXP (x, 1) = tem;
3521 must_swap = 1;
3522 break;
3528 else
3530 if (fmt[i] == 'E')
3531 /* Don't try to fold inside of a vector of expressions.
3532 Doing nothing is harmless. */
3533 {;}
3536 /* If a commutative operation, place a constant integer as the second
3537 operand unless the first operand is also a constant integer. Otherwise,
3538 place any constant second unless the first operand is also a constant. */
3540 if (code == EQ || code == NE || GET_RTX_CLASS (code) == 'c')
3542 if (must_swap || (const_arg0
3543 && (const_arg1 == 0
3544 || (GET_CODE (const_arg0) == CONST_INT
3545 && GET_CODE (const_arg1) != CONST_INT))))
3547 register rtx tem = XEXP (x, 0);
3549 if (insn == 0 && ! copied)
3551 x = copy_rtx (x);
3552 copied = 1;
3555 validate_change (insn, &XEXP (x, 0), XEXP (x, 1), 1);
3556 validate_change (insn, &XEXP (x, 1), tem, 1);
3557 if (apply_change_group ())
3559 tem = const_arg0, const_arg0 = const_arg1, const_arg1 = tem;
3560 tem = folded_arg0, folded_arg0 = folded_arg1, folded_arg1 = tem;
3565 /* If X is an arithmetic operation, see if we can simplify it. */
3567 switch (GET_RTX_CLASS (code))
3569 case '1':
3571 int is_const = 0;
3573 /* We can't simplify extension ops unless we know the
3574 original mode. */
3575 if ((code == ZERO_EXTEND || code == SIGN_EXTEND)
3576 && mode_arg0 == VOIDmode)
3577 break;
3579 /* If we had a CONST, strip it off and put it back later if we
3580 fold. */
3581 if (const_arg0 != 0 && GET_CODE (const_arg0) == CONST)
3582 is_const = 1, const_arg0 = XEXP (const_arg0, 0);
3584 new = simplify_unary_operation (code, mode,
3585 const_arg0 ? const_arg0 : folded_arg0,
3586 mode_arg0);
3587 if (new != 0 && is_const)
3588 new = gen_rtx_CONST (mode, new);
3590 break;
3592 case '<':
3593 /* See what items are actually being compared and set FOLDED_ARG[01]
3594 to those values and CODE to the actual comparison code. If any are
3595 constant, set CONST_ARG0 and CONST_ARG1 appropriately. We needn't
3596 do anything if both operands are already known to be constant. */
3598 if (const_arg0 == 0 || const_arg1 == 0)
3600 struct table_elt *p0, *p1;
3601 rtx true = const_true_rtx, false = const0_rtx;
3602 enum machine_mode mode_arg1;
3604 #ifdef FLOAT_STORE_FLAG_VALUE
3605 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3607 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3608 mode);
3609 false = CONST0_RTX (mode);
3611 #endif
3613 code = find_comparison_args (code, &folded_arg0, &folded_arg1,
3614 &mode_arg0, &mode_arg1);
3615 const_arg0 = equiv_constant (folded_arg0);
3616 const_arg1 = equiv_constant (folded_arg1);
3618 /* If the mode is VOIDmode or a MODE_CC mode, we don't know
3619 what kinds of things are being compared, so we can't do
3620 anything with this comparison. */
3622 if (mode_arg0 == VOIDmode || GET_MODE_CLASS (mode_arg0) == MODE_CC)
3623 break;
3625 /* If we do not now have two constants being compared, see
3626 if we can nevertheless deduce some things about the
3627 comparison. */
3628 if (const_arg0 == 0 || const_arg1 == 0)
3630 /* Is FOLDED_ARG0 frame-pointer plus a constant? Or
3631 non-explicit constant? These aren't zero, but we
3632 don't know their sign. */
3633 if (const_arg1 == const0_rtx
3634 && (NONZERO_BASE_PLUS_P (folded_arg0)
3635 #if 0 /* Sad to say, on sysvr4, #pragma weak can make a symbol address
3636 come out as 0. */
3637 || GET_CODE (folded_arg0) == SYMBOL_REF
3638 #endif
3639 || GET_CODE (folded_arg0) == LABEL_REF
3640 || GET_CODE (folded_arg0) == CONST))
3642 if (code == EQ)
3643 return false;
3644 else if (code == NE)
3645 return true;
3648 /* See if the two operands are the same. We don't do this
3649 for IEEE floating-point since we can't assume x == x
3650 since x might be a NaN. */
3652 if ((TARGET_FLOAT_FORMAT != IEEE_FLOAT_FORMAT
3653 || ! FLOAT_MODE_P (mode_arg0) || flag_fast_math)
3654 && (folded_arg0 == folded_arg1
3655 || (GET_CODE (folded_arg0) == REG
3656 && GET_CODE (folded_arg1) == REG
3657 && (REG_QTY (REGNO (folded_arg0))
3658 == REG_QTY (REGNO (folded_arg1))))
3659 || ((p0 = lookup (folded_arg0,
3660 (safe_hash (folded_arg0, mode_arg0)
3661 % NBUCKETS), mode_arg0))
3662 && (p1 = lookup (folded_arg1,
3663 (safe_hash (folded_arg1, mode_arg0)
3664 % NBUCKETS), mode_arg0))
3665 && p0->first_same_value == p1->first_same_value)))
3666 return ((code == EQ || code == LE || code == GE
3667 || code == LEU || code == GEU)
3668 ? true : false);
3670 /* If FOLDED_ARG0 is a register, see if the comparison we are
3671 doing now is either the same as we did before or the reverse
3672 (we only check the reverse if not floating-point). */
3673 else if (GET_CODE (folded_arg0) == REG)
3675 int qty = REG_QTY (REGNO (folded_arg0));
3677 if (REGNO_QTY_VALID_P (REGNO (folded_arg0))
3678 && (comparison_dominates_p (qty_comparison_code[qty], code)
3679 || (comparison_dominates_p (qty_comparison_code[qty],
3680 reverse_condition (code))
3681 && ! FLOAT_MODE_P (mode_arg0)))
3682 && (rtx_equal_p (qty_comparison_const[qty], folded_arg1)
3683 || (const_arg1
3684 && rtx_equal_p (qty_comparison_const[qty],
3685 const_arg1))
3686 || (GET_CODE (folded_arg1) == REG
3687 && (REG_QTY (REGNO (folded_arg1))
3688 == qty_comparison_qty[qty]))))
3689 return (comparison_dominates_p (qty_comparison_code[qty],
3690 code)
3691 ? true : false);
3696 /* If we are comparing against zero, see if the first operand is
3697 equivalent to an IOR with a constant. If so, we may be able to
3698 determine the result of this comparison. */
3700 if (const_arg1 == const0_rtx)
3702 rtx y = lookup_as_function (folded_arg0, IOR);
3703 rtx inner_const;
3705 if (y != 0
3706 && (inner_const = equiv_constant (XEXP (y, 1))) != 0
3707 && GET_CODE (inner_const) == CONST_INT
3708 && INTVAL (inner_const) != 0)
3710 int sign_bitnum = GET_MODE_BITSIZE (mode_arg0) - 1;
3711 int has_sign = (HOST_BITS_PER_WIDE_INT >= sign_bitnum
3712 && (INTVAL (inner_const)
3713 & ((HOST_WIDE_INT) 1 << sign_bitnum)));
3714 rtx true = const_true_rtx, false = const0_rtx;
3716 #ifdef FLOAT_STORE_FLAG_VALUE
3717 if (GET_MODE_CLASS (mode) == MODE_FLOAT)
3719 true = CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE,
3720 mode);
3721 false = CONST0_RTX (mode);
3723 #endif
3725 switch (code)
3727 case EQ:
3728 return false;
3729 case NE:
3730 return true;
3731 case LT: case LE:
3732 if (has_sign)
3733 return true;
3734 break;
3735 case GT: case GE:
3736 if (has_sign)
3737 return false;
3738 break;
3739 default:
3740 break;
3745 new = simplify_relational_operation (code, mode_arg0,
3746 const_arg0 ? const_arg0 : folded_arg0,
3747 const_arg1 ? const_arg1 : folded_arg1);
3748 #ifdef FLOAT_STORE_FLAG_VALUE
3749 if (new != 0 && GET_MODE_CLASS (mode) == MODE_FLOAT)
3750 new = ((new == const0_rtx) ? CONST0_RTX (mode)
3751 : CONST_DOUBLE_FROM_REAL_VALUE (FLOAT_STORE_FLAG_VALUE, mode));
3752 #endif
3753 break;
3755 case '2':
3756 case 'c':
3757 switch (code)
3759 case PLUS:
3760 /* If the second operand is a LABEL_REF, see if the first is a MINUS
3761 with that LABEL_REF as its second operand. If so, the result is
3762 the first operand of that MINUS. This handles switches with an
3763 ADDR_DIFF_VEC table. */
3764 if (const_arg1 && GET_CODE (const_arg1) == LABEL_REF)
3766 rtx y
3767 = GET_CODE (folded_arg0) == MINUS ? folded_arg0
3768 : lookup_as_function (folded_arg0, MINUS);
3770 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3771 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg1, 0))
3772 return XEXP (y, 0);
3774 /* Now try for a CONST of a MINUS like the above. */
3775 if ((y = (GET_CODE (folded_arg0) == CONST ? folded_arg0
3776 : lookup_as_function (folded_arg0, CONST))) != 0
3777 && GET_CODE (XEXP (y, 0)) == MINUS
3778 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3779 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg1, 0))
3780 return XEXP (XEXP (y, 0), 0);
3783 /* Likewise if the operands are in the other order. */
3784 if (const_arg0 && GET_CODE (const_arg0) == LABEL_REF)
3786 rtx y
3787 = GET_CODE (folded_arg1) == MINUS ? folded_arg1
3788 : lookup_as_function (folded_arg1, MINUS);
3790 if (y != 0 && GET_CODE (XEXP (y, 1)) == LABEL_REF
3791 && XEXP (XEXP (y, 1), 0) == XEXP (const_arg0, 0))
3792 return XEXP (y, 0);
3794 /* Now try for a CONST of a MINUS like the above. */
3795 if ((y = (GET_CODE (folded_arg1) == CONST ? folded_arg1
3796 : lookup_as_function (folded_arg1, CONST))) != 0
3797 && GET_CODE (XEXP (y, 0)) == MINUS
3798 && GET_CODE (XEXP (XEXP (y, 0), 1)) == LABEL_REF
3799 && XEXP (XEXP (XEXP (y, 0),1), 0) == XEXP (const_arg0, 0))
3800 return XEXP (XEXP (y, 0), 0);
3803 /* If second operand is a register equivalent to a negative
3804 CONST_INT, see if we can find a register equivalent to the
3805 positive constant. Make a MINUS if so. Don't do this for
3806 a non-negative constant since we might then alternate between
3807 chosing positive and negative constants. Having the positive
3808 constant previously-used is the more common case. Be sure
3809 the resulting constant is non-negative; if const_arg1 were
3810 the smallest negative number this would overflow: depending
3811 on the mode, this would either just be the same value (and
3812 hence not save anything) or be incorrect. */
3813 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT
3814 && INTVAL (const_arg1) < 0
3815 /* This used to test
3817 - INTVAL (const_arg1) >= 0
3819 But The Sun V5.0 compilers mis-compiled that test. So
3820 instead we test for the problematic value in a more direct
3821 manner and hope the Sun compilers get it correct. */
3822 && INTVAL (const_arg1) !=
3823 ((HOST_WIDE_INT) 1 << (HOST_BITS_PER_WIDE_INT - 1))
3824 && GET_CODE (folded_arg1) == REG)
3826 rtx new_const = GEN_INT (- INTVAL (const_arg1));
3827 struct table_elt *p
3828 = lookup (new_const, safe_hash (new_const, mode) % NBUCKETS,
3829 mode);
3831 if (p)
3832 for (p = p->first_same_value; p; p = p->next_same_value)
3833 if (GET_CODE (p->exp) == REG)
3834 return simplify_gen_binary (MINUS, mode, folded_arg0,
3835 canon_reg (p->exp, NULL_RTX));
3837 goto from_plus;
3839 case MINUS:
3840 /* If we have (MINUS Y C), see if Y is known to be (PLUS Z C2).
3841 If so, produce (PLUS Z C2-C). */
3842 if (const_arg1 != 0 && GET_CODE (const_arg1) == CONST_INT)
3844 rtx y = lookup_as_function (XEXP (x, 0), PLUS);
3845 if (y && GET_CODE (XEXP (y, 1)) == CONST_INT)
3846 return fold_rtx (plus_constant (copy_rtx (y),
3847 -INTVAL (const_arg1)),
3848 NULL_RTX);
3851 /* ... fall through ... */
3853 from_plus:
3854 case SMIN: case SMAX: case UMIN: case UMAX:
3855 case IOR: case AND: case XOR:
3856 case MULT: case DIV: case UDIV:
3857 case ASHIFT: case LSHIFTRT: case ASHIFTRT:
3858 /* If we have (<op> <reg> <const_int>) for an associative OP and REG
3859 is known to be of similar form, we may be able to replace the
3860 operation with a combined operation. This may eliminate the
3861 intermediate operation if every use is simplified in this way.
3862 Note that the similar optimization done by combine.c only works
3863 if the intermediate operation's result has only one reference. */
3865 if (GET_CODE (folded_arg0) == REG
3866 && const_arg1 && GET_CODE (const_arg1) == CONST_INT)
3868 int is_shift
3869 = (code == ASHIFT || code == ASHIFTRT || code == LSHIFTRT);
3870 rtx y = lookup_as_function (folded_arg0, code);
3871 rtx inner_const;
3872 enum rtx_code associate_code;
3873 rtx new_const;
3875 if (y == 0
3876 || 0 == (inner_const
3877 = equiv_constant (fold_rtx (XEXP (y, 1), 0)))
3878 || GET_CODE (inner_const) != CONST_INT
3879 /* If we have compiled a statement like
3880 "if (x == (x & mask1))", and now are looking at
3881 "x & mask2", we will have a case where the first operand
3882 of Y is the same as our first operand. Unless we detect
3883 this case, an infinite loop will result. */
3884 || XEXP (y, 0) == folded_arg0)
3885 break;
3887 /* Don't associate these operations if they are a PLUS with the
3888 same constant and it is a power of two. These might be doable
3889 with a pre- or post-increment. Similarly for two subtracts of
3890 identical powers of two with post decrement. */
3892 if (code == PLUS && INTVAL (const_arg1) == INTVAL (inner_const)
3893 && ((HAVE_PRE_INCREMENT
3894 && exact_log2 (INTVAL (const_arg1)) >= 0)
3895 || (HAVE_POST_INCREMENT
3896 && exact_log2 (INTVAL (const_arg1)) >= 0)
3897 || (HAVE_PRE_DECREMENT
3898 && exact_log2 (- INTVAL (const_arg1)) >= 0)
3899 || (HAVE_POST_DECREMENT
3900 && exact_log2 (- INTVAL (const_arg1)) >= 0)))
3901 break;
3903 /* Compute the code used to compose the constants. For example,
3904 A/C1/C2 is A/(C1 * C2), so if CODE == DIV, we want MULT. */
3906 associate_code
3907 = (code == MULT || code == DIV || code == UDIV ? MULT
3908 : is_shift || code == PLUS || code == MINUS ? PLUS : code);
3910 new_const = simplify_binary_operation (associate_code, mode,
3911 const_arg1, inner_const);
3913 if (new_const == 0)
3914 break;
3916 /* If we are associating shift operations, don't let this
3917 produce a shift of the size of the object or larger.
3918 This could occur when we follow a sign-extend by a right
3919 shift on a machine that does a sign-extend as a pair
3920 of shifts. */
3922 if (is_shift && GET_CODE (new_const) == CONST_INT
3923 && INTVAL (new_const) >= GET_MODE_BITSIZE (mode))
3925 /* As an exception, we can turn an ASHIFTRT of this
3926 form into a shift of the number of bits - 1. */
3927 if (code == ASHIFTRT)
3928 new_const = GEN_INT (GET_MODE_BITSIZE (mode) - 1);
3929 else
3930 break;
3933 y = copy_rtx (XEXP (y, 0));
3935 /* If Y contains our first operand (the most common way this
3936 can happen is if Y is a MEM), we would do into an infinite
3937 loop if we tried to fold it. So don't in that case. */
3939 if (! reg_mentioned_p (folded_arg0, y))
3940 y = fold_rtx (y, insn);
3942 return simplify_gen_binary (code, mode, y, new_const);
3944 break;
3946 default:
3947 break;
3950 new = simplify_binary_operation (code, mode,
3951 const_arg0 ? const_arg0 : folded_arg0,
3952 const_arg1 ? const_arg1 : folded_arg1);
3953 break;
3955 case 'o':
3956 /* (lo_sum (high X) X) is simply X. */
3957 if (code == LO_SUM && const_arg0 != 0
3958 && GET_CODE (const_arg0) == HIGH
3959 && rtx_equal_p (XEXP (const_arg0, 0), const_arg1))
3960 return const_arg1;
3961 break;
3963 case '3':
3964 case 'b':
3965 new = simplify_ternary_operation (code, mode, mode_arg0,
3966 const_arg0 ? const_arg0 : folded_arg0,
3967 const_arg1 ? const_arg1 : folded_arg1,
3968 const_arg2 ? const_arg2 : XEXP (x, 2));
3969 break;
3971 case 'x':
3972 /* Always eliminate CONSTANT_P_RTX at this stage. */
3973 if (code == CONSTANT_P_RTX)
3974 return (const_arg0 ? const1_rtx : const0_rtx);
3975 break;
3978 return new ? new : x;
3981 /* Return a constant value currently equivalent to X.
3982 Return 0 if we don't know one. */
3984 static rtx
3985 equiv_constant (x)
3986 rtx x;
3988 if (GET_CODE (x) == REG
3989 && REGNO_QTY_VALID_P (REGNO (x))
3990 && qty_const[REG_QTY (REGNO (x))])
3991 x = gen_lowpart_if_possible (GET_MODE (x), qty_const[REG_QTY (REGNO (x))]);
3993 if (x == 0 || CONSTANT_P (x))
3994 return x;
3996 /* If X is a MEM, try to fold it outside the context of any insn to see if
3997 it might be equivalent to a constant. That handles the case where it
3998 is a constant-pool reference. Then try to look it up in the hash table
3999 in case it is something whose value we have seen before. */
4001 if (GET_CODE (x) == MEM)
4003 struct table_elt *elt;
4005 x = fold_rtx (x, NULL_RTX);
4006 if (CONSTANT_P (x))
4007 return x;
4009 elt = lookup (x, safe_hash (x, GET_MODE (x)) % NBUCKETS, GET_MODE (x));
4010 if (elt == 0)
4011 return 0;
4013 for (elt = elt->first_same_value; elt; elt = elt->next_same_value)
4014 if (elt->is_const && CONSTANT_P (elt->exp))
4015 return elt->exp;
4018 return 0;
4021 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a fixed-point
4022 number, return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
4023 least-significant part of X.
4024 MODE specifies how big a part of X to return.
4026 If the requested operation cannot be done, 0 is returned.
4028 This is similar to gen_lowpart in emit-rtl.c. */
4031 gen_lowpart_if_possible (mode, x)
4032 enum machine_mode mode;
4033 register rtx x;
4035 rtx result = gen_lowpart_common (mode, x);
4037 if (result)
4038 return result;
4039 else if (GET_CODE (x) == MEM)
4041 /* This is the only other case we handle. */
4042 register int offset = 0;
4043 rtx new;
4045 if (WORDS_BIG_ENDIAN)
4046 offset = (MAX (GET_MODE_SIZE (GET_MODE (x)), UNITS_PER_WORD)
4047 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
4048 if (BYTES_BIG_ENDIAN)
4049 /* Adjust the address so that the address-after-the-data is
4050 unchanged. */
4051 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
4052 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (x))));
4053 new = gen_rtx_MEM (mode, plus_constant (XEXP (x, 0), offset));
4054 if (! memory_address_p (mode, XEXP (new, 0)))
4055 return 0;
4056 RTX_UNCHANGING_P (new) = RTX_UNCHANGING_P (x);
4057 MEM_COPY_ATTRIBUTES (new, x);
4058 return new;
4060 else
4061 return 0;
4064 /* Given INSN, a jump insn, TAKEN indicates if we are following the "taken"
4065 branch. It will be zero if not.
4067 In certain cases, this can cause us to add an equivalence. For example,
4068 if we are following the taken case of
4069 if (i == 2)
4070 we can add the fact that `i' and '2' are now equivalent.
4072 In any case, we can record that this comparison was passed. If the same
4073 comparison is seen later, we will know its value. */
4075 static void
4076 record_jump_equiv (insn, taken)
4077 rtx insn;
4078 int taken;
4080 int cond_known_true;
4081 rtx op0, op1;
4082 enum machine_mode mode, mode0, mode1;
4083 int reversed_nonequality = 0;
4084 enum rtx_code code;
4086 /* Ensure this is the right kind of insn. */
4087 if (! condjump_p (insn) || simplejump_p (insn))
4088 return;
4090 /* See if this jump condition is known true or false. */
4091 if (taken)
4092 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 2) == pc_rtx);
4093 else
4094 cond_known_true = (XEXP (SET_SRC (PATTERN (insn)), 1) == pc_rtx);
4096 /* Get the type of comparison being done and the operands being compared.
4097 If we had to reverse a non-equality condition, record that fact so we
4098 know that it isn't valid for floating-point. */
4099 code = GET_CODE (XEXP (SET_SRC (PATTERN (insn)), 0));
4100 op0 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 0), insn);
4101 op1 = fold_rtx (XEXP (XEXP (SET_SRC (PATTERN (insn)), 0), 1), insn);
4103 code = find_comparison_args (code, &op0, &op1, &mode0, &mode1);
4104 if (! cond_known_true)
4106 reversed_nonequality = (code != EQ && code != NE);
4107 code = reverse_condition (code);
4110 /* The mode is the mode of the non-constant. */
4111 mode = mode0;
4112 if (mode1 != VOIDmode)
4113 mode = mode1;
4115 record_jump_cond (code, mode, op0, op1, reversed_nonequality);
4118 /* We know that comparison CODE applied to OP0 and OP1 in MODE is true.
4119 REVERSED_NONEQUALITY is nonzero if CODE had to be swapped.
4120 Make any useful entries we can with that information. Called from
4121 above function and called recursively. */
4123 static void
4124 record_jump_cond (code, mode, op0, op1, reversed_nonequality)
4125 enum rtx_code code;
4126 enum machine_mode mode;
4127 rtx op0, op1;
4128 int reversed_nonequality;
4130 unsigned op0_hash, op1_hash;
4131 int op0_in_memory, op1_in_memory;
4132 struct table_elt *op0_elt, *op1_elt;
4134 /* If OP0 and OP1 are known equal, and either is a paradoxical SUBREG,
4135 we know that they are also equal in the smaller mode (this is also
4136 true for all smaller modes whether or not there is a SUBREG, but
4137 is not worth testing for with no SUBREG). */
4139 /* Note that GET_MODE (op0) may not equal MODE. */
4140 if (code == EQ && GET_CODE (op0) == SUBREG
4141 && (GET_MODE_SIZE (GET_MODE (op0))
4142 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4144 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4145 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4147 record_jump_cond (code, mode, SUBREG_REG (op0),
4148 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4149 reversed_nonequality);
4152 if (code == EQ && GET_CODE (op1) == SUBREG
4153 && (GET_MODE_SIZE (GET_MODE (op1))
4154 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4156 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4157 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4159 record_jump_cond (code, mode, SUBREG_REG (op1),
4160 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4161 reversed_nonequality);
4164 /* Similarly, if this is an NE comparison, and either is a SUBREG
4165 making a smaller mode, we know the whole thing is also NE. */
4167 /* Note that GET_MODE (op0) may not equal MODE;
4168 if we test MODE instead, we can get an infinite recursion
4169 alternating between two modes each wider than MODE. */
4171 if (code == NE && GET_CODE (op0) == SUBREG
4172 && subreg_lowpart_p (op0)
4173 && (GET_MODE_SIZE (GET_MODE (op0))
4174 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op0)))))
4176 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op0));
4177 rtx tem = gen_lowpart_if_possible (inner_mode, op1);
4179 record_jump_cond (code, mode, SUBREG_REG (op0),
4180 tem ? tem : gen_rtx_SUBREG (inner_mode, op1, 0),
4181 reversed_nonequality);
4184 if (code == NE && GET_CODE (op1) == SUBREG
4185 && subreg_lowpart_p (op1)
4186 && (GET_MODE_SIZE (GET_MODE (op1))
4187 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (op1)))))
4189 enum machine_mode inner_mode = GET_MODE (SUBREG_REG (op1));
4190 rtx tem = gen_lowpart_if_possible (inner_mode, op0);
4192 record_jump_cond (code, mode, SUBREG_REG (op1),
4193 tem ? tem : gen_rtx_SUBREG (inner_mode, op0, 0),
4194 reversed_nonequality);
4197 /* Hash both operands. */
4199 do_not_record = 0;
4200 hash_arg_in_memory = 0;
4201 op0_hash = HASH (op0, mode);
4202 op0_in_memory = hash_arg_in_memory;
4204 if (do_not_record)
4205 return;
4207 do_not_record = 0;
4208 hash_arg_in_memory = 0;
4209 op1_hash = HASH (op1, mode);
4210 op1_in_memory = hash_arg_in_memory;
4212 if (do_not_record)
4213 return;
4215 /* Look up both operands. */
4216 op0_elt = lookup (op0, op0_hash, mode);
4217 op1_elt = lookup (op1, op1_hash, mode);
4219 /* If both operands are already equivalent or if they are not in the
4220 table but are identical, do nothing. */
4221 if ((op0_elt != 0 && op1_elt != 0
4222 && op0_elt->first_same_value == op1_elt->first_same_value)
4223 || op0 == op1 || rtx_equal_p (op0, op1))
4224 return;
4226 /* If we aren't setting two things equal all we can do is save this
4227 comparison. Similarly if this is floating-point. In the latter
4228 case, OP1 might be zero and both -0.0 and 0.0 are equal to it.
4229 If we record the equality, we might inadvertently delete code
4230 whose intent was to change -0 to +0. */
4232 if (code != EQ || FLOAT_MODE_P (GET_MODE (op0)))
4234 /* If we reversed a floating-point comparison, if OP0 is not a
4235 register, or if OP1 is neither a register or constant, we can't
4236 do anything. */
4238 if (GET_CODE (op1) != REG)
4239 op1 = equiv_constant (op1);
4241 if ((reversed_nonequality && FLOAT_MODE_P (mode))
4242 || GET_CODE (op0) != REG || op1 == 0)
4243 return;
4245 /* Put OP0 in the hash table if it isn't already. This gives it a
4246 new quantity number. */
4247 if (op0_elt == 0)
4249 if (insert_regs (op0, NULL_PTR, 0))
4251 rehash_using_reg (op0);
4252 op0_hash = HASH (op0, mode);
4254 /* If OP0 is contained in OP1, this changes its hash code
4255 as well. Faster to rehash than to check, except
4256 for the simple case of a constant. */
4257 if (! CONSTANT_P (op1))
4258 op1_hash = HASH (op1,mode);
4261 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4262 op0_elt->in_memory = op0_in_memory;
4265 qty_comparison_code[REG_QTY (REGNO (op0))] = code;
4266 if (GET_CODE (op1) == REG)
4268 /* Look it up again--in case op0 and op1 are the same. */
4269 op1_elt = lookup (op1, op1_hash, mode);
4271 /* Put OP1 in the hash table so it gets a new quantity number. */
4272 if (op1_elt == 0)
4274 if (insert_regs (op1, NULL_PTR, 0))
4276 rehash_using_reg (op1);
4277 op1_hash = HASH (op1, mode);
4280 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4281 op1_elt->in_memory = op1_in_memory;
4284 qty_comparison_qty[REG_QTY (REGNO (op0))] = REG_QTY (REGNO (op1));
4285 qty_comparison_const[REG_QTY (REGNO (op0))] = 0;
4287 else
4289 qty_comparison_qty[REG_QTY (REGNO (op0))] = -1;
4290 qty_comparison_const[REG_QTY (REGNO (op0))] = op1;
4293 return;
4296 /* If either side is still missing an equivalence, make it now,
4297 then merge the equivalences. */
4299 if (op0_elt == 0)
4301 if (insert_regs (op0, NULL_PTR, 0))
4303 rehash_using_reg (op0);
4304 op0_hash = HASH (op0, mode);
4307 op0_elt = insert (op0, NULL_PTR, op0_hash, mode);
4308 op0_elt->in_memory = op0_in_memory;
4311 if (op1_elt == 0)
4313 if (insert_regs (op1, NULL_PTR, 0))
4315 rehash_using_reg (op1);
4316 op1_hash = HASH (op1, mode);
4319 op1_elt = insert (op1, NULL_PTR, op1_hash, mode);
4320 op1_elt->in_memory = op1_in_memory;
4323 merge_equiv_classes (op0_elt, op1_elt);
4324 last_jump_equiv_class = op0_elt;
4327 /* CSE processing for one instruction.
4328 First simplify sources and addresses of all assignments
4329 in the instruction, using previously-computed equivalents values.
4330 Then install the new sources and destinations in the table
4331 of available values.
4333 If LIBCALL_INSN is nonzero, don't record any equivalence made in
4334 the insn. It means that INSN is inside libcall block. In this
4335 case LIBCALL_INSN is the corresponding insn with REG_LIBCALL. */
4337 /* Data on one SET contained in the instruction. */
4339 struct set
4341 /* The SET rtx itself. */
4342 rtx rtl;
4343 /* The SET_SRC of the rtx (the original value, if it is changing). */
4344 rtx src;
4345 /* The hash-table element for the SET_SRC of the SET. */
4346 struct table_elt *src_elt;
4347 /* Hash value for the SET_SRC. */
4348 unsigned src_hash;
4349 /* Hash value for the SET_DEST. */
4350 unsigned dest_hash;
4351 /* The SET_DEST, with SUBREG, etc., stripped. */
4352 rtx inner_dest;
4353 /* Nonzero if the SET_SRC is in memory. */
4354 char src_in_memory;
4355 /* Nonzero if the SET_SRC contains something
4356 whose value cannot be predicted and understood. */
4357 char src_volatile;
4358 /* Original machine mode, in case it becomes a CONST_INT. */
4359 enum machine_mode mode;
4360 /* A constant equivalent for SET_SRC, if any. */
4361 rtx src_const;
4362 /* Hash value of constant equivalent for SET_SRC. */
4363 unsigned src_const_hash;
4364 /* Table entry for constant equivalent for SET_SRC, if any. */
4365 struct table_elt *src_const_elt;
4368 static void
4369 cse_insn (insn, libcall_insn)
4370 rtx insn;
4371 rtx libcall_insn;
4373 register rtx x = PATTERN (insn);
4374 register int i;
4375 rtx tem;
4376 register int n_sets = 0;
4378 #ifdef HAVE_cc0
4379 /* Records what this insn does to set CC0. */
4380 rtx this_insn_cc0 = 0;
4381 enum machine_mode this_insn_cc0_mode = VOIDmode;
4382 #endif
4384 rtx src_eqv = 0;
4385 struct table_elt *src_eqv_elt = 0;
4386 int src_eqv_volatile = 0;
4387 int src_eqv_in_memory = 0;
4388 unsigned src_eqv_hash = 0;
4390 struct set *sets = NULL_PTR;
4392 this_insn = insn;
4394 /* Find all the SETs and CLOBBERs in this instruction.
4395 Record all the SETs in the array `set' and count them.
4396 Also determine whether there is a CLOBBER that invalidates
4397 all memory references, or all references at varying addresses. */
4399 if (GET_CODE (insn) == CALL_INSN)
4401 for (tem = CALL_INSN_FUNCTION_USAGE (insn); tem; tem = XEXP (tem, 1))
4402 if (GET_CODE (XEXP (tem, 0)) == CLOBBER)
4403 invalidate (SET_DEST (XEXP (tem, 0)), VOIDmode);
4406 if (GET_CODE (x) == SET)
4408 sets = (struct set *) alloca (sizeof (struct set));
4409 sets[0].rtl = x;
4411 /* Ignore SETs that are unconditional jumps.
4412 They never need cse processing, so this does not hurt.
4413 The reason is not efficiency but rather
4414 so that we can test at the end for instructions
4415 that have been simplified to unconditional jumps
4416 and not be misled by unchanged instructions
4417 that were unconditional jumps to begin with. */
4418 if (SET_DEST (x) == pc_rtx
4419 && GET_CODE (SET_SRC (x)) == LABEL_REF)
4422 /* Don't count call-insns, (set (reg 0) (call ...)), as a set.
4423 The hard function value register is used only once, to copy to
4424 someplace else, so it isn't worth cse'ing (and on 80386 is unsafe)!
4425 Ensure we invalidate the destination register. On the 80386 no
4426 other code would invalidate it since it is a fixed_reg.
4427 We need not check the return of apply_change_group; see canon_reg. */
4429 else if (GET_CODE (SET_SRC (x)) == CALL)
4431 canon_reg (SET_SRC (x), insn);
4432 apply_change_group ();
4433 fold_rtx (SET_SRC (x), insn);
4434 invalidate (SET_DEST (x), VOIDmode);
4436 else
4437 n_sets = 1;
4439 else if (GET_CODE (x) == PARALLEL)
4441 register int lim = XVECLEN (x, 0);
4443 sets = (struct set *) alloca (lim * sizeof (struct set));
4445 /* Find all regs explicitly clobbered in this insn,
4446 and ensure they are not replaced with any other regs
4447 elsewhere in this insn.
4448 When a reg that is clobbered is also used for input,
4449 we should presume that that is for a reason,
4450 and we should not substitute some other register
4451 which is not supposed to be clobbered.
4452 Therefore, this loop cannot be merged into the one below
4453 because a CALL may precede a CLOBBER and refer to the
4454 value clobbered. We must not let a canonicalization do
4455 anything in that case. */
4456 for (i = 0; i < lim; i++)
4458 register rtx y = XVECEXP (x, 0, i);
4459 if (GET_CODE (y) == CLOBBER)
4461 rtx clobbered = XEXP (y, 0);
4463 if (GET_CODE (clobbered) == REG
4464 || GET_CODE (clobbered) == SUBREG)
4465 invalidate (clobbered, VOIDmode);
4466 else if (GET_CODE (clobbered) == STRICT_LOW_PART
4467 || GET_CODE (clobbered) == ZERO_EXTRACT)
4468 invalidate (XEXP (clobbered, 0), GET_MODE (clobbered));
4472 for (i = 0; i < lim; i++)
4474 register rtx y = XVECEXP (x, 0, i);
4475 if (GET_CODE (y) == SET)
4477 /* As above, we ignore unconditional jumps and call-insns and
4478 ignore the result of apply_change_group. */
4479 if (GET_CODE (SET_SRC (y)) == CALL)
4481 canon_reg (SET_SRC (y), insn);
4482 apply_change_group ();
4483 fold_rtx (SET_SRC (y), insn);
4484 invalidate (SET_DEST (y), VOIDmode);
4486 else if (SET_DEST (y) == pc_rtx
4487 && GET_CODE (SET_SRC (y)) == LABEL_REF)
4489 else
4490 sets[n_sets++].rtl = y;
4492 else if (GET_CODE (y) == CLOBBER)
4494 /* If we clobber memory, canon the address.
4495 This does nothing when a register is clobbered
4496 because we have already invalidated the reg. */
4497 if (GET_CODE (XEXP (y, 0)) == MEM)
4498 canon_reg (XEXP (y, 0), NULL_RTX);
4500 else if (GET_CODE (y) == USE
4501 && ! (GET_CODE (XEXP (y, 0)) == REG
4502 && REGNO (XEXP (y, 0)) < FIRST_PSEUDO_REGISTER))
4503 canon_reg (y, NULL_RTX);
4504 else if (GET_CODE (y) == CALL)
4506 /* The result of apply_change_group can be ignored; see
4507 canon_reg. */
4508 canon_reg (y, insn);
4509 apply_change_group ();
4510 fold_rtx (y, insn);
4514 else if (GET_CODE (x) == CLOBBER)
4516 if (GET_CODE (XEXP (x, 0)) == MEM)
4517 canon_reg (XEXP (x, 0), NULL_RTX);
4520 /* Canonicalize a USE of a pseudo register or memory location. */
4521 else if (GET_CODE (x) == USE
4522 && ! (GET_CODE (XEXP (x, 0)) == REG
4523 && REGNO (XEXP (x, 0)) < FIRST_PSEUDO_REGISTER))
4524 canon_reg (XEXP (x, 0), NULL_RTX);
4525 else if (GET_CODE (x) == CALL)
4527 /* The result of apply_change_group can be ignored; see canon_reg. */
4528 canon_reg (x, insn);
4529 apply_change_group ();
4530 fold_rtx (x, insn);
4533 /* Store the equivalent value in SRC_EQV, if different, or if the DEST
4534 is a STRICT_LOW_PART. The latter condition is necessary because SRC_EQV
4535 is handled specially for this case, and if it isn't set, then there will
4536 be no equivalence for the destination. */
4537 if (n_sets == 1 && REG_NOTES (insn) != 0
4538 && (tem = find_reg_note (insn, REG_EQUAL, NULL_RTX)) != 0
4539 && (! rtx_equal_p (XEXP (tem, 0), SET_SRC (sets[0].rtl))
4540 || GET_CODE (SET_DEST (sets[0].rtl)) == STRICT_LOW_PART))
4541 src_eqv = canon_reg (XEXP (tem, 0), NULL_RTX);
4543 /* Canonicalize sources and addresses of destinations.
4544 We do this in a separate pass to avoid problems when a MATCH_DUP is
4545 present in the insn pattern. In that case, we want to ensure that
4546 we don't break the duplicate nature of the pattern. So we will replace
4547 both operands at the same time. Otherwise, we would fail to find an
4548 equivalent substitution in the loop calling validate_change below.
4550 We used to suppress canonicalization of DEST if it appears in SRC,
4551 but we don't do this any more. */
4553 for (i = 0; i < n_sets; i++)
4555 rtx dest = SET_DEST (sets[i].rtl);
4556 rtx src = SET_SRC (sets[i].rtl);
4557 rtx new = canon_reg (src, insn);
4558 int insn_code;
4560 if ((GET_CODE (new) == REG && GET_CODE (src) == REG
4561 && ((REGNO (new) < FIRST_PSEUDO_REGISTER)
4562 != (REGNO (src) < FIRST_PSEUDO_REGISTER)))
4563 || (insn_code = recog_memoized (insn)) < 0
4564 || insn_data[insn_code].n_dups > 0)
4565 validate_change (insn, &SET_SRC (sets[i].rtl), new, 1);
4566 else
4567 SET_SRC (sets[i].rtl) = new;
4569 if (GET_CODE (dest) == ZERO_EXTRACT || GET_CODE (dest) == SIGN_EXTRACT)
4571 validate_change (insn, &XEXP (dest, 1),
4572 canon_reg (XEXP (dest, 1), insn), 1);
4573 validate_change (insn, &XEXP (dest, 2),
4574 canon_reg (XEXP (dest, 2), insn), 1);
4577 while (GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
4578 || GET_CODE (dest) == ZERO_EXTRACT
4579 || GET_CODE (dest) == SIGN_EXTRACT)
4580 dest = XEXP (dest, 0);
4582 if (GET_CODE (dest) == MEM)
4583 canon_reg (dest, insn);
4586 /* Now that we have done all the replacements, we can apply the change
4587 group and see if they all work. Note that this will cause some
4588 canonicalizations that would have worked individually not to be applied
4589 because some other canonicalization didn't work, but this should not
4590 occur often.
4592 The result of apply_change_group can be ignored; see canon_reg. */
4594 apply_change_group ();
4596 /* Set sets[i].src_elt to the class each source belongs to.
4597 Detect assignments from or to volatile things
4598 and set set[i] to zero so they will be ignored
4599 in the rest of this function.
4601 Nothing in this loop changes the hash table or the register chains. */
4603 for (i = 0; i < n_sets; i++)
4605 register rtx src, dest;
4606 register rtx src_folded;
4607 register struct table_elt *elt = 0, *p;
4608 enum machine_mode mode;
4609 rtx src_eqv_here;
4610 rtx src_const = 0;
4611 rtx src_related = 0;
4612 struct table_elt *src_const_elt = 0;
4613 int src_cost = 10000, src_eqv_cost = 10000, src_folded_cost = 10000;
4614 int src_related_cost = 10000, src_elt_cost = 10000;
4615 /* Set non-zero if we need to call force_const_mem on with the
4616 contents of src_folded before using it. */
4617 int src_folded_force_flag = 0;
4619 dest = SET_DEST (sets[i].rtl);
4620 src = SET_SRC (sets[i].rtl);
4622 /* If SRC is a constant that has no machine mode,
4623 hash it with the destination's machine mode.
4624 This way we can keep different modes separate. */
4626 mode = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
4627 sets[i].mode = mode;
4629 if (src_eqv)
4631 enum machine_mode eqvmode = mode;
4632 if (GET_CODE (dest) == STRICT_LOW_PART)
4633 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
4634 do_not_record = 0;
4635 hash_arg_in_memory = 0;
4636 src_eqv = fold_rtx (src_eqv, insn);
4637 src_eqv_hash = HASH (src_eqv, eqvmode);
4639 /* Find the equivalence class for the equivalent expression. */
4641 if (!do_not_record)
4642 src_eqv_elt = lookup (src_eqv, src_eqv_hash, eqvmode);
4644 src_eqv_volatile = do_not_record;
4645 src_eqv_in_memory = hash_arg_in_memory;
4648 /* If this is a STRICT_LOW_PART assignment, src_eqv corresponds to the
4649 value of the INNER register, not the destination. So it is not
4650 a valid substitution for the source. But save it for later. */
4651 if (GET_CODE (dest) == STRICT_LOW_PART)
4652 src_eqv_here = 0;
4653 else
4654 src_eqv_here = src_eqv;
4656 /* Simplify and foldable subexpressions in SRC. Then get the fully-
4657 simplified result, which may not necessarily be valid. */
4658 src_folded = fold_rtx (src, insn);
4660 #if 0
4661 /* ??? This caused bad code to be generated for the m68k port with -O2.
4662 Suppose src is (CONST_INT -1), and that after truncation src_folded
4663 is (CONST_INT 3). Suppose src_folded is then used for src_const.
4664 At the end we will add src and src_const to the same equivalence
4665 class. We now have 3 and -1 on the same equivalence class. This
4666 causes later instructions to be mis-optimized. */
4667 /* If storing a constant in a bitfield, pre-truncate the constant
4668 so we will be able to record it later. */
4669 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
4670 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
4672 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
4674 if (GET_CODE (src) == CONST_INT
4675 && GET_CODE (width) == CONST_INT
4676 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
4677 && (INTVAL (src) & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
4678 src_folded
4679 = GEN_INT (INTVAL (src) & (((HOST_WIDE_INT) 1
4680 << INTVAL (width)) - 1));
4682 #endif
4684 /* Compute SRC's hash code, and also notice if it
4685 should not be recorded at all. In that case,
4686 prevent any further processing of this assignment. */
4687 do_not_record = 0;
4688 hash_arg_in_memory = 0;
4690 sets[i].src = src;
4691 sets[i].src_hash = HASH (src, mode);
4692 sets[i].src_volatile = do_not_record;
4693 sets[i].src_in_memory = hash_arg_in_memory;
4695 /* If SRC is a MEM, there is a REG_EQUIV note for SRC, and DEST is
4696 a pseudo that is set more than once, do not record SRC. Using
4697 SRC as a replacement for anything else will be incorrect in that
4698 situation. Note that this usually occurs only for stack slots,
4699 in which case all the RTL would be referring to SRC, so we don't
4700 lose any optimization opportunities by not having SRC in the
4701 hash table. */
4703 if (GET_CODE (src) == MEM
4704 && find_reg_note (insn, REG_EQUIV, src) != 0
4705 && GET_CODE (dest) == REG
4706 && REGNO (dest) >= FIRST_PSEUDO_REGISTER
4707 && REG_N_SETS (REGNO (dest)) != 1)
4708 sets[i].src_volatile = 1;
4710 #if 0
4711 /* It is no longer clear why we used to do this, but it doesn't
4712 appear to still be needed. So let's try without it since this
4713 code hurts cse'ing widened ops. */
4714 /* If source is a perverse subreg (such as QI treated as an SI),
4715 treat it as volatile. It may do the work of an SI in one context
4716 where the extra bits are not being used, but cannot replace an SI
4717 in general. */
4718 if (GET_CODE (src) == SUBREG
4719 && (GET_MODE_SIZE (GET_MODE (src))
4720 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))))
4721 sets[i].src_volatile = 1;
4722 #endif
4724 /* Locate all possible equivalent forms for SRC. Try to replace
4725 SRC in the insn with each cheaper equivalent.
4727 We have the following types of equivalents: SRC itself, a folded
4728 version, a value given in a REG_EQUAL note, or a value related
4729 to a constant.
4731 Each of these equivalents may be part of an additional class
4732 of equivalents (if more than one is in the table, they must be in
4733 the same class; we check for this).
4735 If the source is volatile, we don't do any table lookups.
4737 We note any constant equivalent for possible later use in a
4738 REG_NOTE. */
4740 if (!sets[i].src_volatile)
4741 elt = lookup (src, sets[i].src_hash, mode);
4743 sets[i].src_elt = elt;
4745 if (elt && src_eqv_here && src_eqv_elt)
4747 if (elt->first_same_value != src_eqv_elt->first_same_value)
4749 /* The REG_EQUAL is indicating that two formerly distinct
4750 classes are now equivalent. So merge them. */
4751 merge_equiv_classes (elt, src_eqv_elt);
4752 src_eqv_hash = HASH (src_eqv, elt->mode);
4753 src_eqv_elt = lookup (src_eqv, src_eqv_hash, elt->mode);
4756 src_eqv_here = 0;
4759 else if (src_eqv_elt)
4760 elt = src_eqv_elt;
4762 /* Try to find a constant somewhere and record it in `src_const'.
4763 Record its table element, if any, in `src_const_elt'. Look in
4764 any known equivalences first. (If the constant is not in the
4765 table, also set `sets[i].src_const_hash'). */
4766 if (elt)
4767 for (p = elt->first_same_value; p; p = p->next_same_value)
4768 if (p->is_const)
4770 src_const = p->exp;
4771 src_const_elt = elt;
4772 break;
4775 if (src_const == 0
4776 && (CONSTANT_P (src_folded)
4777 /* Consider (minus (label_ref L1) (label_ref L2)) as
4778 "constant" here so we will record it. This allows us
4779 to fold switch statements when an ADDR_DIFF_VEC is used. */
4780 || (GET_CODE (src_folded) == MINUS
4781 && GET_CODE (XEXP (src_folded, 0)) == LABEL_REF
4782 && GET_CODE (XEXP (src_folded, 1)) == LABEL_REF)))
4783 src_const = src_folded, src_const_elt = elt;
4784 else if (src_const == 0 && src_eqv_here && CONSTANT_P (src_eqv_here))
4785 src_const = src_eqv_here, src_const_elt = src_eqv_elt;
4787 /* If we don't know if the constant is in the table, get its
4788 hash code and look it up. */
4789 if (src_const && src_const_elt == 0)
4791 sets[i].src_const_hash = HASH (src_const, mode);
4792 src_const_elt = lookup (src_const, sets[i].src_const_hash, mode);
4795 sets[i].src_const = src_const;
4796 sets[i].src_const_elt = src_const_elt;
4798 /* If the constant and our source are both in the table, mark them as
4799 equivalent. Otherwise, if a constant is in the table but the source
4800 isn't, set ELT to it. */
4801 if (src_const_elt && elt
4802 && src_const_elt->first_same_value != elt->first_same_value)
4803 merge_equiv_classes (elt, src_const_elt);
4804 else if (src_const_elt && elt == 0)
4805 elt = src_const_elt;
4807 /* See if there is a register linearly related to a constant
4808 equivalent of SRC. */
4809 if (src_const
4810 && (GET_CODE (src_const) == CONST
4811 || (src_const_elt && src_const_elt->related_value != 0)))
4813 src_related = use_related_value (src_const, src_const_elt);
4814 if (src_related)
4816 struct table_elt *src_related_elt
4817 = lookup (src_related, HASH (src_related, mode), mode);
4818 if (src_related_elt && elt)
4820 if (elt->first_same_value
4821 != src_related_elt->first_same_value)
4822 /* This can occur when we previously saw a CONST
4823 involving a SYMBOL_REF and then see the SYMBOL_REF
4824 twice. Merge the involved classes. */
4825 merge_equiv_classes (elt, src_related_elt);
4827 src_related = 0;
4828 src_related_elt = 0;
4830 else if (src_related_elt && elt == 0)
4831 elt = src_related_elt;
4835 /* See if we have a CONST_INT that is already in a register in a
4836 wider mode. */
4838 if (src_const && src_related == 0 && GET_CODE (src_const) == CONST_INT
4839 && GET_MODE_CLASS (mode) == MODE_INT
4840 && GET_MODE_BITSIZE (mode) < BITS_PER_WORD)
4842 enum machine_mode wider_mode;
4844 for (wider_mode = GET_MODE_WIDER_MODE (mode);
4845 GET_MODE_BITSIZE (wider_mode) <= BITS_PER_WORD
4846 && src_related == 0;
4847 wider_mode = GET_MODE_WIDER_MODE (wider_mode))
4849 struct table_elt *const_elt
4850 = lookup (src_const, HASH (src_const, wider_mode), wider_mode);
4852 if (const_elt == 0)
4853 continue;
4855 for (const_elt = const_elt->first_same_value;
4856 const_elt; const_elt = const_elt->next_same_value)
4857 if (GET_CODE (const_elt->exp) == REG)
4859 src_related = gen_lowpart_if_possible (mode,
4860 const_elt->exp);
4861 break;
4866 /* Another possibility is that we have an AND with a constant in
4867 a mode narrower than a word. If so, it might have been generated
4868 as part of an "if" which would narrow the AND. If we already
4869 have done the AND in a wider mode, we can use a SUBREG of that
4870 value. */
4872 if (flag_expensive_optimizations && ! src_related
4873 && GET_CODE (src) == AND && GET_CODE (XEXP (src, 1)) == CONST_INT
4874 && GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4876 enum machine_mode tmode;
4877 rtx new_and = gen_rtx_AND (VOIDmode, NULL_RTX, XEXP (src, 1));
4879 for (tmode = GET_MODE_WIDER_MODE (mode);
4880 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4881 tmode = GET_MODE_WIDER_MODE (tmode))
4883 rtx inner = gen_lowpart_if_possible (tmode, XEXP (src, 0));
4884 struct table_elt *larger_elt;
4886 if (inner)
4888 PUT_MODE (new_and, tmode);
4889 XEXP (new_and, 0) = inner;
4890 larger_elt = lookup (new_and, HASH (new_and, tmode), tmode);
4891 if (larger_elt == 0)
4892 continue;
4894 for (larger_elt = larger_elt->first_same_value;
4895 larger_elt; larger_elt = larger_elt->next_same_value)
4896 if (GET_CODE (larger_elt->exp) == REG)
4898 src_related
4899 = gen_lowpart_if_possible (mode, larger_elt->exp);
4900 break;
4903 if (src_related)
4904 break;
4909 #ifdef LOAD_EXTEND_OP
4910 /* See if a MEM has already been loaded with a widening operation;
4911 if it has, we can use a subreg of that. Many CISC machines
4912 also have such operations, but this is only likely to be
4913 beneficial these machines. */
4915 if (flag_expensive_optimizations && src_related == 0
4916 && (GET_MODE_SIZE (mode) < UNITS_PER_WORD)
4917 && GET_MODE_CLASS (mode) == MODE_INT
4918 && GET_CODE (src) == MEM && ! do_not_record
4919 && LOAD_EXTEND_OP (mode) != NIL)
4921 enum machine_mode tmode;
4923 /* Set what we are trying to extend and the operation it might
4924 have been extended with. */
4925 PUT_CODE (memory_extend_rtx, LOAD_EXTEND_OP (mode));
4926 XEXP (memory_extend_rtx, 0) = src;
4928 for (tmode = GET_MODE_WIDER_MODE (mode);
4929 GET_MODE_SIZE (tmode) <= UNITS_PER_WORD;
4930 tmode = GET_MODE_WIDER_MODE (tmode))
4932 struct table_elt *larger_elt;
4934 PUT_MODE (memory_extend_rtx, tmode);
4935 larger_elt = lookup (memory_extend_rtx,
4936 HASH (memory_extend_rtx, tmode), tmode);
4937 if (larger_elt == 0)
4938 continue;
4940 for (larger_elt = larger_elt->first_same_value;
4941 larger_elt; larger_elt = larger_elt->next_same_value)
4942 if (GET_CODE (larger_elt->exp) == REG)
4944 src_related = gen_lowpart_if_possible (mode,
4945 larger_elt->exp);
4946 break;
4949 if (src_related)
4950 break;
4953 #endif /* LOAD_EXTEND_OP */
4955 if (src == src_folded)
4956 src_folded = 0;
4958 /* At this point, ELT, if non-zero, points to a class of expressions
4959 equivalent to the source of this SET and SRC, SRC_EQV, SRC_FOLDED,
4960 and SRC_RELATED, if non-zero, each contain additional equivalent
4961 expressions. Prune these latter expressions by deleting expressions
4962 already in the equivalence class.
4964 Check for an equivalent identical to the destination. If found,
4965 this is the preferred equivalent since it will likely lead to
4966 elimination of the insn. Indicate this by placing it in
4967 `src_related'. */
4969 if (elt) elt = elt->first_same_value;
4970 for (p = elt; p; p = p->next_same_value)
4972 enum rtx_code code = GET_CODE (p->exp);
4974 /* If the expression is not valid, ignore it. Then we do not
4975 have to check for validity below. In most cases, we can use
4976 `rtx_equal_p', since canonicalization has already been done. */
4977 if (code != REG && ! exp_equiv_p (p->exp, p->exp, 1, 0))
4978 continue;
4980 /* Also skip paradoxical subregs, unless that's what we're
4981 looking for. */
4982 if (code == SUBREG
4983 && (GET_MODE_SIZE (GET_MODE (p->exp))
4984 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))
4985 && ! (src != 0
4986 && GET_CODE (src) == SUBREG
4987 && GET_MODE (src) == GET_MODE (p->exp)
4988 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
4989 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (p->exp))))))
4990 continue;
4992 if (src && GET_CODE (src) == code && rtx_equal_p (src, p->exp))
4993 src = 0;
4994 else if (src_folded && GET_CODE (src_folded) == code
4995 && rtx_equal_p (src_folded, p->exp))
4996 src_folded = 0;
4997 else if (src_eqv_here && GET_CODE (src_eqv_here) == code
4998 && rtx_equal_p (src_eqv_here, p->exp))
4999 src_eqv_here = 0;
5000 else if (src_related && GET_CODE (src_related) == code
5001 && rtx_equal_p (src_related, p->exp))
5002 src_related = 0;
5004 /* This is the same as the destination of the insns, we want
5005 to prefer it. Copy it to src_related. The code below will
5006 then give it a negative cost. */
5007 if (GET_CODE (dest) == code && rtx_equal_p (p->exp, dest))
5008 src_related = dest;
5012 /* Find the cheapest valid equivalent, trying all the available
5013 possibilities. Prefer items not in the hash table to ones
5014 that are when they are equal cost. Note that we can never
5015 worsen an insn as the current contents will also succeed.
5016 If we find an equivalent identical to the destination, use it as best,
5017 since this insn will probably be eliminated in that case. */
5018 if (src)
5020 if (rtx_equal_p (src, dest))
5021 src_cost = -1;
5022 else
5023 src_cost = COST (src);
5026 if (src_eqv_here)
5028 if (rtx_equal_p (src_eqv_here, dest))
5029 src_eqv_cost = -1;
5030 else
5031 src_eqv_cost = COST (src_eqv_here);
5034 if (src_folded)
5036 if (rtx_equal_p (src_folded, dest))
5037 src_folded_cost = -1;
5038 else
5039 src_folded_cost = COST (src_folded);
5042 if (src_related)
5044 if (rtx_equal_p (src_related, dest))
5045 src_related_cost = -1;
5046 else
5047 src_related_cost = COST (src_related);
5050 /* If this was an indirect jump insn, a known label will really be
5051 cheaper even though it looks more expensive. */
5052 if (dest == pc_rtx && src_const && GET_CODE (src_const) == LABEL_REF)
5053 src_folded = src_const, src_folded_cost = -1;
5055 /* Terminate loop when replacement made. This must terminate since
5056 the current contents will be tested and will always be valid. */
5057 while (1)
5059 rtx trial, old_src;
5061 /* Skip invalid entries. */
5062 while (elt && GET_CODE (elt->exp) != REG
5063 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5064 elt = elt->next_same_value;
5066 /* A paradoxical subreg would be bad here: it'll be the right
5067 size, but later may be adjusted so that the upper bits aren't
5068 what we want. So reject it. */
5069 if (elt != 0
5070 && GET_CODE (elt->exp) == SUBREG
5071 && (GET_MODE_SIZE (GET_MODE (elt->exp))
5072 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))
5073 /* It is okay, though, if the rtx we're trying to match
5074 will ignore any of the bits we can't predict. */
5075 && ! (src != 0
5076 && GET_CODE (src) == SUBREG
5077 && GET_MODE (src) == GET_MODE (elt->exp)
5078 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (src)))
5079 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (elt->exp))))))
5081 elt = elt->next_same_value;
5082 continue;
5085 if (elt) src_elt_cost = elt->cost;
5087 /* Find cheapest and skip it for the next time. For items
5088 of equal cost, use this order:
5089 src_folded, src, src_eqv, src_related and hash table entry. */
5090 if (src_folded_cost <= src_cost
5091 && src_folded_cost <= src_eqv_cost
5092 && src_folded_cost <= src_related_cost
5093 && src_folded_cost <= src_elt_cost)
5095 trial = src_folded, src_folded_cost = 10000;
5096 if (src_folded_force_flag)
5097 trial = force_const_mem (mode, trial);
5099 else if (src_cost <= src_eqv_cost
5100 && src_cost <= src_related_cost
5101 && src_cost <= src_elt_cost)
5102 trial = src, src_cost = 10000;
5103 else if (src_eqv_cost <= src_related_cost
5104 && src_eqv_cost <= src_elt_cost)
5105 trial = copy_rtx (src_eqv_here), src_eqv_cost = 10000;
5106 else if (src_related_cost <= src_elt_cost)
5107 trial = copy_rtx (src_related), src_related_cost = 10000;
5108 else
5110 trial = copy_rtx (elt->exp);
5111 elt = elt->next_same_value;
5112 src_elt_cost = 10000;
5115 /* We don't normally have an insn matching (set (pc) (pc)), so
5116 check for this separately here. We will delete such an
5117 insn below.
5119 Tablejump insns contain a USE of the table, so simply replacing
5120 the operand with the constant won't match. This is simply an
5121 unconditional branch, however, and is therefore valid. Just
5122 insert the substitution here and we will delete and re-emit
5123 the insn later. */
5125 /* Keep track of the original SET_SRC so that we can fix notes
5126 on libcall instructions. */
5127 old_src = SET_SRC (sets[i].rtl);
5129 if (n_sets == 1 && dest == pc_rtx
5130 && (trial == pc_rtx
5131 || (GET_CODE (trial) == LABEL_REF
5132 && ! condjump_p (insn))))
5134 /* If TRIAL is a label in front of a jump table, we are
5135 really falling through the switch (this is how casesi
5136 insns work), so we must branch around the table. */
5137 if (GET_CODE (trial) == CODE_LABEL
5138 && NEXT_INSN (trial) != 0
5139 && GET_CODE (NEXT_INSN (trial)) == JUMP_INSN
5140 && (GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_DIFF_VEC
5141 || GET_CODE (PATTERN (NEXT_INSN (trial))) == ADDR_VEC))
5143 trial = gen_rtx_LABEL_REF (Pmode, get_label_after (trial));
5145 SET_SRC (sets[i].rtl) = trial;
5146 cse_jumps_altered = 1;
5147 break;
5150 /* Look for a substitution that makes a valid insn. */
5151 else if (validate_change (insn, &SET_SRC (sets[i].rtl), trial, 0))
5153 /* If we just made a substitution inside a libcall, then we
5154 need to make the same substitution in any notes attached
5155 to the RETVAL insn. */
5156 if (libcall_insn
5157 && (GET_CODE (old_src) == REG
5158 || GET_CODE (old_src) == SUBREG
5159 || GET_CODE (old_src) == MEM))
5160 replace_rtx (REG_NOTES (libcall_insn), old_src,
5161 canon_reg (SET_SRC (sets[i].rtl), insn));
5163 /* The result of apply_change_group can be ignored; see
5164 canon_reg. */
5166 validate_change (insn, &SET_SRC (sets[i].rtl),
5167 canon_reg (SET_SRC (sets[i].rtl), insn),
5169 apply_change_group ();
5170 break;
5173 /* If we previously found constant pool entries for
5174 constants and this is a constant, try making a
5175 pool entry. Put it in src_folded unless we already have done
5176 this since that is where it likely came from. */
5178 else if (constant_pool_entries_cost
5179 && CONSTANT_P (trial)
5180 && ! (GET_CODE (trial) == CONST
5181 && GET_CODE (XEXP (trial, 0)) == TRUNCATE)
5182 && (src_folded == 0
5183 || (GET_CODE (src_folded) != MEM
5184 && ! src_folded_force_flag))
5185 && GET_MODE_CLASS (mode) != MODE_CC
5186 && mode != VOIDmode)
5188 src_folded_force_flag = 1;
5189 src_folded = trial;
5190 src_folded_cost = constant_pool_entries_cost;
5194 src = SET_SRC (sets[i].rtl);
5196 /* In general, it is good to have a SET with SET_SRC == SET_DEST.
5197 However, there is an important exception: If both are registers
5198 that are not the head of their equivalence class, replace SET_SRC
5199 with the head of the class. If we do not do this, we will have
5200 both registers live over a portion of the basic block. This way,
5201 their lifetimes will likely abut instead of overlapping. */
5202 if (GET_CODE (dest) == REG
5203 && REGNO_QTY_VALID_P (REGNO (dest))
5204 && qty_mode[REG_QTY (REGNO (dest))] == GET_MODE (dest)
5205 && qty_first_reg[REG_QTY (REGNO (dest))] != REGNO (dest)
5206 && GET_CODE (src) == REG && REGNO (src) == REGNO (dest)
5207 /* Don't do this if the original insn had a hard reg as
5208 SET_SRC or SET_DEST. */
5209 && (GET_CODE (sets[i].src) != REG
5210 || REGNO (sets[i].src) >= FIRST_PSEUDO_REGISTER)
5211 && (GET_CODE (dest) != REG || REGNO (dest) >= FIRST_PSEUDO_REGISTER))
5212 /* We can't call canon_reg here because it won't do anything if
5213 SRC is a hard register. */
5215 int first = qty_first_reg[REG_QTY (REGNO (src))];
5216 rtx new_src
5217 = (first >= FIRST_PSEUDO_REGISTER
5218 ? regno_reg_rtx[first] : gen_rtx_REG (GET_MODE (src), first));
5220 /* We must use validate-change even for this, because this
5221 might be a special no-op instruction, suitable only to
5222 tag notes onto. */
5223 if (validate_change (insn, &SET_SRC (sets[i].rtl), new_src, 0))
5225 src = new_src;
5226 /* If we had a constant that is cheaper than what we are now
5227 setting SRC to, use that constant. We ignored it when we
5228 thought we could make this into a no-op. */
5229 if (src_const && COST (src_const) < COST (src)
5230 && validate_change (insn, &SET_SRC (sets[i].rtl), src_const,
5232 src = src_const;
5236 /* If we made a change, recompute SRC values. */
5237 if (src != sets[i].src)
5239 do_not_record = 0;
5240 hash_arg_in_memory = 0;
5241 sets[i].src = src;
5242 sets[i].src_hash = HASH (src, mode);
5243 sets[i].src_volatile = do_not_record;
5244 sets[i].src_in_memory = hash_arg_in_memory;
5245 sets[i].src_elt = lookup (src, sets[i].src_hash, mode);
5248 /* If this is a single SET, we are setting a register, and we have an
5249 equivalent constant, we want to add a REG_NOTE. We don't want
5250 to write a REG_EQUAL note for a constant pseudo since verifying that
5251 that pseudo hasn't been eliminated is a pain. Such a note also
5252 won't help anything.
5254 Avoid a REG_EQUAL note for (CONST (MINUS (LABEL_REF) (LABEL_REF)))
5255 which can be created for a reference to a compile time computable
5256 entry in a jump table. */
5258 if (n_sets == 1 && src_const && GET_CODE (dest) == REG
5259 && GET_CODE (src_const) != REG
5260 && ! (GET_CODE (src_const) == CONST
5261 && GET_CODE (XEXP (src_const, 0)) == MINUS
5262 && GET_CODE (XEXP (XEXP (src_const, 0), 0)) == LABEL_REF
5263 && GET_CODE (XEXP (XEXP (src_const, 0), 1)) == LABEL_REF))
5265 tem = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5267 /* Make sure that the rtx is not shared with any other insn. */
5268 src_const = copy_rtx (src_const);
5270 /* Record the actual constant value in a REG_EQUAL note, making
5271 a new one if one does not already exist. */
5272 if (tem)
5273 XEXP (tem, 0) = src_const;
5274 else
5275 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_EQUAL,
5276 src_const, REG_NOTES (insn));
5278 /* If storing a constant value in a register that
5279 previously held the constant value 0,
5280 record this fact with a REG_WAS_0 note on this insn.
5282 Note that the *register* is required to have previously held 0,
5283 not just any register in the quantity and we must point to the
5284 insn that set that register to zero.
5286 Rather than track each register individually, we just see if
5287 the last set for this quantity was for this register. */
5289 if (REGNO_QTY_VALID_P (REGNO (dest))
5290 && qty_const[REG_QTY (REGNO (dest))] == const0_rtx)
5292 /* See if we previously had a REG_WAS_0 note. */
5293 rtx note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5294 rtx const_insn = qty_const_insn[REG_QTY (REGNO (dest))];
5296 if ((tem = single_set (const_insn)) != 0
5297 && rtx_equal_p (SET_DEST (tem), dest))
5299 if (note)
5300 XEXP (note, 0) = const_insn;
5301 else
5302 REG_NOTES (insn)
5303 = gen_rtx_INSN_LIST (REG_WAS_0, const_insn,
5304 REG_NOTES (insn));
5309 /* Now deal with the destination. */
5310 do_not_record = 0;
5312 /* Look within any SIGN_EXTRACT or ZERO_EXTRACT
5313 to the MEM or REG within it. */
5314 while (GET_CODE (dest) == SIGN_EXTRACT
5315 || GET_CODE (dest) == ZERO_EXTRACT
5316 || GET_CODE (dest) == SUBREG
5317 || GET_CODE (dest) == STRICT_LOW_PART)
5318 dest = XEXP (dest, 0);
5320 sets[i].inner_dest = dest;
5322 if (GET_CODE (dest) == MEM)
5324 #ifdef PUSH_ROUNDING
5325 /* Stack pushes invalidate the stack pointer. */
5326 rtx addr = XEXP (dest, 0);
5327 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5328 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5329 && XEXP (addr, 0) == stack_pointer_rtx)
5330 invalidate (stack_pointer_rtx, Pmode);
5331 #endif
5332 dest = fold_rtx (dest, insn);
5335 /* Compute the hash code of the destination now,
5336 before the effects of this instruction are recorded,
5337 since the register values used in the address computation
5338 are those before this instruction. */
5339 sets[i].dest_hash = HASH (dest, mode);
5341 /* Don't enter a bit-field in the hash table
5342 because the value in it after the store
5343 may not equal what was stored, due to truncation. */
5345 if (GET_CODE (SET_DEST (sets[i].rtl)) == ZERO_EXTRACT
5346 || GET_CODE (SET_DEST (sets[i].rtl)) == SIGN_EXTRACT)
5348 rtx width = XEXP (SET_DEST (sets[i].rtl), 1);
5350 if (src_const != 0 && GET_CODE (src_const) == CONST_INT
5351 && GET_CODE (width) == CONST_INT
5352 && INTVAL (width) < HOST_BITS_PER_WIDE_INT
5353 && ! (INTVAL (src_const)
5354 & ((HOST_WIDE_INT) (-1) << INTVAL (width))))
5355 /* Exception: if the value is constant,
5356 and it won't be truncated, record it. */
5358 else
5360 /* This is chosen so that the destination will be invalidated
5361 but no new value will be recorded.
5362 We must invalidate because sometimes constant
5363 values can be recorded for bitfields. */
5364 sets[i].src_elt = 0;
5365 sets[i].src_volatile = 1;
5366 src_eqv = 0;
5367 src_eqv_elt = 0;
5371 /* If only one set in a JUMP_INSN and it is now a no-op, we can delete
5372 the insn. */
5373 else if (n_sets == 1 && dest == pc_rtx && src == pc_rtx)
5375 /* One less use of the label this insn used to jump to. */
5376 if (JUMP_LABEL (insn) != 0)
5377 --LABEL_NUSES (JUMP_LABEL (insn));
5378 PUT_CODE (insn, NOTE);
5379 NOTE_LINE_NUMBER (insn) = NOTE_INSN_DELETED;
5380 NOTE_SOURCE_FILE (insn) = 0;
5381 cse_jumps_altered = 1;
5382 /* No more processing for this set. */
5383 sets[i].rtl = 0;
5386 /* If this SET is now setting PC to a label, we know it used to
5387 be a conditional or computed branch. So we see if we can follow
5388 it. If it was a computed branch, delete it and re-emit. */
5389 else if (dest == pc_rtx && GET_CODE (src) == LABEL_REF)
5391 /* If this is not in the format for a simple branch and
5392 we are the only SET in it, re-emit it. */
5393 if (! simplejump_p (insn) && n_sets == 1)
5395 rtx new = emit_jump_insn_before (gen_jump (XEXP (src, 0)), insn);
5396 JUMP_LABEL (new) = XEXP (src, 0);
5397 LABEL_NUSES (XEXP (src, 0))++;
5398 insn = new;
5400 else
5401 /* Otherwise, force rerecognition, since it probably had
5402 a different pattern before.
5403 This shouldn't really be necessary, since whatever
5404 changed the source value above should have done this.
5405 Until the right place is found, might as well do this here. */
5406 INSN_CODE (insn) = -1;
5408 never_reached_warning (insn);
5410 /* Now emit a BARRIER after the unconditional jump. Do not bother
5411 deleting any unreachable code, let jump/flow do that. */
5412 if (NEXT_INSN (insn) != 0
5413 && GET_CODE (NEXT_INSN (insn)) != BARRIER)
5414 emit_barrier_after (insn);
5416 cse_jumps_altered = 1;
5417 sets[i].rtl = 0;
5420 /* If destination is volatile, invalidate it and then do no further
5421 processing for this assignment. */
5423 else if (do_not_record)
5425 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5426 || GET_CODE (dest) == MEM)
5427 invalidate (dest, VOIDmode);
5428 else if (GET_CODE (dest) == STRICT_LOW_PART
5429 || GET_CODE (dest) == ZERO_EXTRACT)
5430 invalidate (XEXP (dest, 0), GET_MODE (dest));
5431 sets[i].rtl = 0;
5434 if (sets[i].rtl != 0 && dest != SET_DEST (sets[i].rtl))
5435 sets[i].dest_hash = HASH (SET_DEST (sets[i].rtl), mode);
5437 #ifdef HAVE_cc0
5438 /* If setting CC0, record what it was set to, or a constant, if it
5439 is equivalent to a constant. If it is being set to a floating-point
5440 value, make a COMPARE with the appropriate constant of 0. If we
5441 don't do this, later code can interpret this as a test against
5442 const0_rtx, which can cause problems if we try to put it into an
5443 insn as a floating-point operand. */
5444 if (dest == cc0_rtx)
5446 this_insn_cc0 = src_const && mode != VOIDmode ? src_const : src;
5447 this_insn_cc0_mode = mode;
5448 if (FLOAT_MODE_P (mode))
5449 this_insn_cc0 = gen_rtx_COMPARE (VOIDmode, this_insn_cc0,
5450 CONST0_RTX (mode));
5452 #endif
5455 /* Now enter all non-volatile source expressions in the hash table
5456 if they are not already present.
5457 Record their equivalence classes in src_elt.
5458 This way we can insert the corresponding destinations into
5459 the same classes even if the actual sources are no longer in them
5460 (having been invalidated). */
5462 if (src_eqv && src_eqv_elt == 0 && sets[0].rtl != 0 && ! src_eqv_volatile
5463 && ! rtx_equal_p (src_eqv, SET_DEST (sets[0].rtl)))
5465 register struct table_elt *elt;
5466 register struct table_elt *classp = sets[0].src_elt;
5467 rtx dest = SET_DEST (sets[0].rtl);
5468 enum machine_mode eqvmode = GET_MODE (dest);
5470 if (GET_CODE (dest) == STRICT_LOW_PART)
5472 eqvmode = GET_MODE (SUBREG_REG (XEXP (dest, 0)));
5473 classp = 0;
5475 if (insert_regs (src_eqv, classp, 0))
5477 rehash_using_reg (src_eqv);
5478 src_eqv_hash = HASH (src_eqv, eqvmode);
5480 elt = insert (src_eqv, classp, src_eqv_hash, eqvmode);
5481 elt->in_memory = src_eqv_in_memory;
5482 src_eqv_elt = elt;
5484 /* Check to see if src_eqv_elt is the same as a set source which
5485 does not yet have an elt, and if so set the elt of the set source
5486 to src_eqv_elt. */
5487 for (i = 0; i < n_sets; i++)
5488 if (sets[i].rtl && sets[i].src_elt == 0
5489 && rtx_equal_p (SET_SRC (sets[i].rtl), src_eqv))
5490 sets[i].src_elt = src_eqv_elt;
5493 for (i = 0; i < n_sets; i++)
5494 if (sets[i].rtl && ! sets[i].src_volatile
5495 && ! rtx_equal_p (SET_SRC (sets[i].rtl), SET_DEST (sets[i].rtl)))
5497 if (GET_CODE (SET_DEST (sets[i].rtl)) == STRICT_LOW_PART)
5499 /* REG_EQUAL in setting a STRICT_LOW_PART
5500 gives an equivalent for the entire destination register,
5501 not just for the subreg being stored in now.
5502 This is a more interesting equivalence, so we arrange later
5503 to treat the entire reg as the destination. */
5504 sets[i].src_elt = src_eqv_elt;
5505 sets[i].src_hash = src_eqv_hash;
5507 else
5509 /* Insert source and constant equivalent into hash table, if not
5510 already present. */
5511 register struct table_elt *classp = src_eqv_elt;
5512 register rtx src = sets[i].src;
5513 register rtx dest = SET_DEST (sets[i].rtl);
5514 enum machine_mode mode
5515 = GET_MODE (src) == VOIDmode ? GET_MODE (dest) : GET_MODE (src);
5517 if (sets[i].src_elt == 0)
5519 /* Don't put a hard register source into the table if this is
5520 the last insn of a libcall. In this case, we only need
5521 to put src_eqv_elt in src_elt. */
5522 if (GET_CODE (src) != REG
5523 || REGNO (src) >= FIRST_PSEUDO_REGISTER
5524 || ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5526 register struct table_elt *elt;
5528 /* Note that these insert_regs calls cannot remove
5529 any of the src_elt's, because they would have failed to
5530 match if not still valid. */
5531 if (insert_regs (src, classp, 0))
5533 rehash_using_reg (src);
5534 sets[i].src_hash = HASH (src, mode);
5536 elt = insert (src, classp, sets[i].src_hash, mode);
5537 elt->in_memory = sets[i].src_in_memory;
5538 sets[i].src_elt = classp = elt;
5540 else
5541 sets[i].src_elt = classp;
5543 if (sets[i].src_const && sets[i].src_const_elt == 0
5544 && src != sets[i].src_const
5545 && ! rtx_equal_p (sets[i].src_const, src))
5546 sets[i].src_elt = insert (sets[i].src_const, classp,
5547 sets[i].src_const_hash, mode);
5550 else if (sets[i].src_elt == 0)
5551 /* If we did not insert the source into the hash table (e.g., it was
5552 volatile), note the equivalence class for the REG_EQUAL value, if any,
5553 so that the destination goes into that class. */
5554 sets[i].src_elt = src_eqv_elt;
5556 invalidate_from_clobbers (x);
5558 /* Some registers are invalidated by subroutine calls. Memory is
5559 invalidated by non-constant calls. */
5561 if (GET_CODE (insn) == CALL_INSN)
5563 if (! CONST_CALL_P (insn))
5564 invalidate_memory ();
5565 invalidate_for_call ();
5568 /* Now invalidate everything set by this instruction.
5569 If a SUBREG or other funny destination is being set,
5570 sets[i].rtl is still nonzero, so here we invalidate the reg
5571 a part of which is being set. */
5573 for (i = 0; i < n_sets; i++)
5574 if (sets[i].rtl)
5576 /* We can't use the inner dest, because the mode associated with
5577 a ZERO_EXTRACT is significant. */
5578 register rtx dest = SET_DEST (sets[i].rtl);
5580 /* Needed for registers to remove the register from its
5581 previous quantity's chain.
5582 Needed for memory if this is a nonvarying address, unless
5583 we have just done an invalidate_memory that covers even those. */
5584 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG
5585 || GET_CODE (dest) == MEM)
5586 invalidate (dest, VOIDmode);
5587 else if (GET_CODE (dest) == STRICT_LOW_PART
5588 || GET_CODE (dest) == ZERO_EXTRACT)
5589 invalidate (XEXP (dest, 0), GET_MODE (dest));
5592 /* A volatile ASM invalidates everything. */
5593 if (GET_CODE (insn) == INSN
5594 && GET_CODE (PATTERN (insn)) == ASM_OPERANDS
5595 && MEM_VOLATILE_P (PATTERN (insn)))
5596 flush_hash_table ();
5598 /* Make sure registers mentioned in destinations
5599 are safe for use in an expression to be inserted.
5600 This removes from the hash table
5601 any invalid entry that refers to one of these registers.
5603 We don't care about the return value from mention_regs because
5604 we are going to hash the SET_DEST values unconditionally. */
5606 for (i = 0; i < n_sets; i++)
5608 if (sets[i].rtl)
5610 rtx x = SET_DEST (sets[i].rtl);
5612 if (GET_CODE (x) != REG)
5613 mention_regs (x);
5614 else
5616 /* We used to rely on all references to a register becoming
5617 inaccessible when a register changes to a new quantity,
5618 since that changes the hash code. However, that is not
5619 safe, since after NBUCKETS new quantities we get a
5620 hash 'collision' of a register with its own invalid
5621 entries. And since SUBREGs have been changed not to
5622 change their hash code with the hash code of the register,
5623 it wouldn't work any longer at all. So we have to check
5624 for any invalid references lying around now.
5625 This code is similar to the REG case in mention_regs,
5626 but it knows that reg_tick has been incremented, and
5627 it leaves reg_in_table as -1 . */
5628 register int regno = REGNO (x);
5629 register int endregno
5630 = regno + (regno >= FIRST_PSEUDO_REGISTER ? 1
5631 : HARD_REGNO_NREGS (regno, GET_MODE (x)));
5632 int i;
5634 for (i = regno; i < endregno; i++)
5636 if (REG_IN_TABLE (i) >= 0)
5638 remove_invalid_refs (i);
5639 REG_IN_TABLE (i) = -1;
5646 /* We may have just removed some of the src_elt's from the hash table.
5647 So replace each one with the current head of the same class. */
5649 for (i = 0; i < n_sets; i++)
5650 if (sets[i].rtl)
5652 if (sets[i].src_elt && sets[i].src_elt->first_same_value == 0)
5653 /* If elt was removed, find current head of same class,
5654 or 0 if nothing remains of that class. */
5656 register struct table_elt *elt = sets[i].src_elt;
5658 while (elt && elt->prev_same_value)
5659 elt = elt->prev_same_value;
5661 while (elt && elt->first_same_value == 0)
5662 elt = elt->next_same_value;
5663 sets[i].src_elt = elt ? elt->first_same_value : 0;
5667 /* Now insert the destinations into their equivalence classes. */
5669 for (i = 0; i < n_sets; i++)
5670 if (sets[i].rtl)
5672 register rtx dest = SET_DEST (sets[i].rtl);
5673 rtx inner_dest = sets[i].inner_dest;
5674 register struct table_elt *elt;
5676 /* Don't record value if we are not supposed to risk allocating
5677 floating-point values in registers that might be wider than
5678 memory. */
5679 if ((flag_float_store
5680 && GET_CODE (dest) == MEM
5681 && FLOAT_MODE_P (GET_MODE (dest)))
5682 /* Don't record BLKmode values, because we don't know the
5683 size of it, and can't be sure that other BLKmode values
5684 have the same or smaller size. */
5685 || GET_MODE (dest) == BLKmode
5686 /* Don't record values of destinations set inside a libcall block
5687 since we might delete the libcall. Things should have been set
5688 up so we won't want to reuse such a value, but we play it safe
5689 here. */
5690 || libcall_insn
5691 /* If we didn't put a REG_EQUAL value or a source into the hash
5692 table, there is no point is recording DEST. */
5693 || sets[i].src_elt == 0
5694 /* If DEST is a paradoxical SUBREG and SRC is a ZERO_EXTEND
5695 or SIGN_EXTEND, don't record DEST since it can cause
5696 some tracking to be wrong.
5698 ??? Think about this more later. */
5699 || (GET_CODE (dest) == SUBREG
5700 && (GET_MODE_SIZE (GET_MODE (dest))
5701 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5702 && (GET_CODE (sets[i].src) == SIGN_EXTEND
5703 || GET_CODE (sets[i].src) == ZERO_EXTEND)))
5704 continue;
5706 /* STRICT_LOW_PART isn't part of the value BEING set,
5707 and neither is the SUBREG inside it.
5708 Note that in this case SETS[I].SRC_ELT is really SRC_EQV_ELT. */
5709 if (GET_CODE (dest) == STRICT_LOW_PART)
5710 dest = SUBREG_REG (XEXP (dest, 0));
5712 if (GET_CODE (dest) == REG || GET_CODE (dest) == SUBREG)
5713 /* Registers must also be inserted into chains for quantities. */
5714 if (insert_regs (dest, sets[i].src_elt, 1))
5716 /* If `insert_regs' changes something, the hash code must be
5717 recalculated. */
5718 rehash_using_reg (dest);
5719 sets[i].dest_hash = HASH (dest, GET_MODE (dest));
5722 if (GET_CODE (inner_dest) == MEM
5723 && GET_CODE (XEXP (inner_dest, 0)) == ADDRESSOF)
5724 /* Given (SET (MEM (ADDRESSOF (X))) Y) we don't want to say
5725 that (MEM (ADDRESSOF (X))) is equivalent to Y.
5726 Consider the case in which the address of the MEM is
5727 passed to a function, which alters the MEM. Then, if we
5728 later use Y instead of the MEM we'll miss the update. */
5729 elt = insert (dest, 0, sets[i].dest_hash, GET_MODE (dest));
5730 else
5731 elt = insert (dest, sets[i].src_elt,
5732 sets[i].dest_hash, GET_MODE (dest));
5734 elt->in_memory = (GET_CODE (sets[i].inner_dest) == MEM
5735 && (! RTX_UNCHANGING_P (sets[i].inner_dest)
5736 || FIXED_BASE_PLUS_P (XEXP (sets[i].inner_dest,
5737 0))));
5739 /* If we have (set (subreg:m1 (reg:m2 foo) 0) (bar:m1)), M1 is no
5740 narrower than M2, and both M1 and M2 are the same number of words,
5741 we are also doing (set (reg:m2 foo) (subreg:m2 (bar:m1) 0)) so
5742 make that equivalence as well.
5744 However, BAR may have equivalences for which gen_lowpart_if_possible
5745 will produce a simpler value than gen_lowpart_if_possible applied to
5746 BAR (e.g., if BAR was ZERO_EXTENDed from M2), so we will scan all
5747 BAR's equivalences. If we don't get a simplified form, make
5748 the SUBREG. It will not be used in an equivalence, but will
5749 cause two similar assignments to be detected.
5751 Note the loop below will find SUBREG_REG (DEST) since we have
5752 already entered SRC and DEST of the SET in the table. */
5754 if (GET_CODE (dest) == SUBREG
5755 && (((GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))) - 1)
5756 / UNITS_PER_WORD)
5757 == (GET_MODE_SIZE (GET_MODE (dest)) - 1)/ UNITS_PER_WORD)
5758 && (GET_MODE_SIZE (GET_MODE (dest))
5759 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dest))))
5760 && sets[i].src_elt != 0)
5762 enum machine_mode new_mode = GET_MODE (SUBREG_REG (dest));
5763 struct table_elt *elt, *classp = 0;
5765 for (elt = sets[i].src_elt->first_same_value; elt;
5766 elt = elt->next_same_value)
5768 rtx new_src = 0;
5769 unsigned src_hash;
5770 struct table_elt *src_elt;
5772 /* Ignore invalid entries. */
5773 if (GET_CODE (elt->exp) != REG
5774 && ! exp_equiv_p (elt->exp, elt->exp, 1, 0))
5775 continue;
5777 new_src = gen_lowpart_if_possible (new_mode, elt->exp);
5778 if (new_src == 0)
5779 new_src = gen_rtx_SUBREG (new_mode, elt->exp, 0);
5781 src_hash = HASH (new_src, new_mode);
5782 src_elt = lookup (new_src, src_hash, new_mode);
5784 /* Put the new source in the hash table is if isn't
5785 already. */
5786 if (src_elt == 0)
5788 if (insert_regs (new_src, classp, 0))
5790 rehash_using_reg (new_src);
5791 src_hash = HASH (new_src, new_mode);
5793 src_elt = insert (new_src, classp, src_hash, new_mode);
5794 src_elt->in_memory = elt->in_memory;
5796 else if (classp && classp != src_elt->first_same_value)
5797 /* Show that two things that we've seen before are
5798 actually the same. */
5799 merge_equiv_classes (src_elt, classp);
5801 classp = src_elt->first_same_value;
5802 /* Ignore invalid entries. */
5803 while (classp
5804 && GET_CODE (classp->exp) != REG
5805 && ! exp_equiv_p (classp->exp, classp->exp, 1, 0))
5806 classp = classp->next_same_value;
5811 /* Special handling for (set REG0 REG1)
5812 where REG0 is the "cheapest", cheaper than REG1.
5813 After cse, REG1 will probably not be used in the sequel,
5814 so (if easily done) change this insn to (set REG1 REG0) and
5815 replace REG1 with REG0 in the previous insn that computed their value.
5816 Then REG1 will become a dead store and won't cloud the situation
5817 for later optimizations.
5819 Do not make this change if REG1 is a hard register, because it will
5820 then be used in the sequel and we may be changing a two-operand insn
5821 into a three-operand insn.
5823 Also do not do this if we are operating on a copy of INSN.
5825 Also don't do this if INSN ends a libcall; this would cause an unrelated
5826 register to be set in the middle of a libcall, and we then get bad code
5827 if the libcall is deleted. */
5829 if (n_sets == 1 && sets[0].rtl && GET_CODE (SET_DEST (sets[0].rtl)) == REG
5830 && NEXT_INSN (PREV_INSN (insn)) == insn
5831 && GET_CODE (SET_SRC (sets[0].rtl)) == REG
5832 && REGNO (SET_SRC (sets[0].rtl)) >= FIRST_PSEUDO_REGISTER
5833 && REGNO_QTY_VALID_P (REGNO (SET_SRC (sets[0].rtl)))
5834 && (qty_first_reg[REG_QTY (REGNO (SET_SRC (sets[0].rtl)))]
5835 == REGNO (SET_DEST (sets[0].rtl)))
5836 && ! find_reg_note (insn, REG_RETVAL, NULL_RTX))
5838 rtx prev = PREV_INSN (insn);
5839 while (prev && GET_CODE (prev) == NOTE)
5840 prev = PREV_INSN (prev);
5842 if (prev && GET_CODE (prev) == INSN && GET_CODE (PATTERN (prev)) == SET
5843 && SET_DEST (PATTERN (prev)) == SET_SRC (sets[0].rtl))
5845 rtx dest = SET_DEST (sets[0].rtl);
5846 rtx note = find_reg_note (prev, REG_EQUIV, NULL_RTX);
5848 validate_change (prev, & SET_DEST (PATTERN (prev)), dest, 1);
5849 validate_change (insn, & SET_DEST (sets[0].rtl),
5850 SET_SRC (sets[0].rtl), 1);
5851 validate_change (insn, & SET_SRC (sets[0].rtl), dest, 1);
5852 apply_change_group ();
5854 /* If REG1 was equivalent to a constant, REG0 is not. */
5855 if (note)
5856 PUT_REG_NOTE_KIND (note, REG_EQUAL);
5858 /* If there was a REG_WAS_0 note on PREV, remove it. Move
5859 any REG_WAS_0 note on INSN to PREV. */
5860 note = find_reg_note (prev, REG_WAS_0, NULL_RTX);
5861 if (note)
5862 remove_note (prev, note);
5864 note = find_reg_note (insn, REG_WAS_0, NULL_RTX);
5865 if (note)
5867 remove_note (insn, note);
5868 XEXP (note, 1) = REG_NOTES (prev);
5869 REG_NOTES (prev) = note;
5872 /* If INSN has a REG_EQUAL note, and this note mentions REG0,
5873 then we must delete it, because the value in REG0 has changed. */
5874 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
5875 if (note && reg_mentioned_p (dest, XEXP (note, 0)))
5876 remove_note (insn, note);
5880 /* If this is a conditional jump insn, record any known equivalences due to
5881 the condition being tested. */
5883 last_jump_equiv_class = 0;
5884 if (GET_CODE (insn) == JUMP_INSN
5885 && n_sets == 1 && GET_CODE (x) == SET
5886 && GET_CODE (SET_SRC (x)) == IF_THEN_ELSE)
5887 record_jump_equiv (insn, 0);
5889 #ifdef HAVE_cc0
5890 /* If the previous insn set CC0 and this insn no longer references CC0,
5891 delete the previous insn. Here we use the fact that nothing expects CC0
5892 to be valid over an insn, which is true until the final pass. */
5893 if (prev_insn && GET_CODE (prev_insn) == INSN
5894 && (tem = single_set (prev_insn)) != 0
5895 && SET_DEST (tem) == cc0_rtx
5896 && ! reg_mentioned_p (cc0_rtx, x))
5898 PUT_CODE (prev_insn, NOTE);
5899 NOTE_LINE_NUMBER (prev_insn) = NOTE_INSN_DELETED;
5900 NOTE_SOURCE_FILE (prev_insn) = 0;
5903 prev_insn_cc0 = this_insn_cc0;
5904 prev_insn_cc0_mode = this_insn_cc0_mode;
5905 #endif
5907 prev_insn = insn;
5910 /* Remove from the hash table all expressions that reference memory. */
5912 static void
5913 invalidate_memory ()
5915 register int i;
5916 register struct table_elt *p, *next;
5918 for (i = 0; i < NBUCKETS; i++)
5919 for (p = table[i]; p; p = next)
5921 next = p->next_same_hash;
5922 if (p->in_memory)
5923 remove_from_table (p, i);
5927 #ifdef AUTO_INC_DEC
5929 /* If ADDR is an address that implicitly affects the stack pointer, return
5930 1 and update the register tables to show the effect. Else, return 0. */
5932 static int
5933 addr_affects_sp_p (addr)
5934 register rtx addr;
5936 if ((GET_CODE (addr) == PRE_DEC || GET_CODE (addr) == PRE_INC
5937 || GET_CODE (addr) == POST_DEC || GET_CODE (addr) == POST_INC)
5938 && GET_CODE (XEXP (addr, 0)) == REG
5939 && REGNO (XEXP (addr, 0)) == STACK_POINTER_REGNUM)
5941 if (REG_TICK (STACK_POINTER_REGNUM) >= 0)
5942 REG_TICK (STACK_POINTER_REGNUM)++;
5944 /* This should be *very* rare. */
5945 if (TEST_HARD_REG_BIT (hard_regs_in_table, STACK_POINTER_REGNUM))
5946 invalidate (stack_pointer_rtx, VOIDmode);
5948 return 1;
5951 return 0;
5953 #endif
5955 /* Perform invalidation on the basis of everything about an insn
5956 except for invalidating the actual places that are SET in it.
5957 This includes the places CLOBBERed, and anything that might
5958 alias with something that is SET or CLOBBERed.
5960 X is the pattern of the insn. */
5962 static void
5963 invalidate_from_clobbers (x)
5964 rtx x;
5966 if (GET_CODE (x) == CLOBBER)
5968 rtx ref = XEXP (x, 0);
5969 if (ref)
5971 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
5972 || GET_CODE (ref) == MEM)
5973 invalidate (ref, VOIDmode);
5974 else if (GET_CODE (ref) == STRICT_LOW_PART
5975 || GET_CODE (ref) == ZERO_EXTRACT)
5976 invalidate (XEXP (ref, 0), GET_MODE (ref));
5979 else if (GET_CODE (x) == PARALLEL)
5981 register int i;
5982 for (i = XVECLEN (x, 0) - 1; i >= 0; i--)
5984 register rtx y = XVECEXP (x, 0, i);
5985 if (GET_CODE (y) == CLOBBER)
5987 rtx ref = XEXP (y, 0);
5988 if (GET_CODE (ref) == REG || GET_CODE (ref) == SUBREG
5989 || GET_CODE (ref) == MEM)
5990 invalidate (ref, VOIDmode);
5991 else if (GET_CODE (ref) == STRICT_LOW_PART
5992 || GET_CODE (ref) == ZERO_EXTRACT)
5993 invalidate (XEXP (ref, 0), GET_MODE (ref));
5999 /* Process X, part of the REG_NOTES of an insn. Look at any REG_EQUAL notes
6000 and replace any registers in them with either an equivalent constant
6001 or the canonical form of the register. If we are inside an address,
6002 only do this if the address remains valid.
6004 OBJECT is 0 except when within a MEM in which case it is the MEM.
6006 Return the replacement for X. */
6008 static rtx
6009 cse_process_notes (x, object)
6010 rtx x;
6011 rtx object;
6013 enum rtx_code code = GET_CODE (x);
6014 const char *fmt = GET_RTX_FORMAT (code);
6015 int i;
6017 switch (code)
6019 case CONST_INT:
6020 case CONST:
6021 case SYMBOL_REF:
6022 case LABEL_REF:
6023 case CONST_DOUBLE:
6024 case PC:
6025 case CC0:
6026 case LO_SUM:
6027 return x;
6029 case MEM:
6030 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), x);
6031 return x;
6033 case EXPR_LIST:
6034 case INSN_LIST:
6035 if (REG_NOTE_KIND (x) == REG_EQUAL)
6036 XEXP (x, 0) = cse_process_notes (XEXP (x, 0), NULL_RTX);
6037 if (XEXP (x, 1))
6038 XEXP (x, 1) = cse_process_notes (XEXP (x, 1), NULL_RTX);
6039 return x;
6041 case SIGN_EXTEND:
6042 case ZERO_EXTEND:
6043 case SUBREG:
6045 rtx new = cse_process_notes (XEXP (x, 0), object);
6046 /* We don't substitute VOIDmode constants into these rtx,
6047 since they would impede folding. */
6048 if (GET_MODE (new) != VOIDmode)
6049 validate_change (object, &XEXP (x, 0), new, 0);
6050 return x;
6053 case REG:
6054 i = REG_QTY (REGNO (x));
6056 /* Return a constant or a constant register. */
6057 if (REGNO_QTY_VALID_P (REGNO (x))
6058 && qty_const[i] != 0
6059 && (CONSTANT_P (qty_const[i])
6060 || GET_CODE (qty_const[i]) == REG))
6062 rtx new = gen_lowpart_if_possible (GET_MODE (x), qty_const[i]);
6063 if (new)
6064 return new;
6067 /* Otherwise, canonicalize this register. */
6068 return canon_reg (x, NULL_RTX);
6070 default:
6071 break;
6074 for (i = 0; i < GET_RTX_LENGTH (code); i++)
6075 if (fmt[i] == 'e')
6076 validate_change (object, &XEXP (x, i),
6077 cse_process_notes (XEXP (x, i), object), 0);
6079 return x;
6082 /* Find common subexpressions between the end test of a loop and the beginning
6083 of the loop. LOOP_START is the CODE_LABEL at the start of a loop.
6085 Often we have a loop where an expression in the exit test is used
6086 in the body of the loop. For example "while (*p) *q++ = *p++;".
6087 Because of the way we duplicate the loop exit test in front of the loop,
6088 however, we don't detect that common subexpression. This will be caught
6089 when global cse is implemented, but this is a quite common case.
6091 This function handles the most common cases of these common expressions.
6092 It is called after we have processed the basic block ending with the
6093 NOTE_INSN_LOOP_END note that ends a loop and the previous JUMP_INSN
6094 jumps to a label used only once. */
6096 static void
6097 cse_around_loop (loop_start)
6098 rtx loop_start;
6100 rtx insn;
6101 int i;
6102 struct table_elt *p;
6104 /* If the jump at the end of the loop doesn't go to the start, we don't
6105 do anything. */
6106 for (insn = PREV_INSN (loop_start);
6107 insn && (GET_CODE (insn) == NOTE && NOTE_LINE_NUMBER (insn) >= 0);
6108 insn = PREV_INSN (insn))
6111 if (insn == 0
6112 || GET_CODE (insn) != NOTE
6113 || NOTE_LINE_NUMBER (insn) != NOTE_INSN_LOOP_BEG)
6114 return;
6116 /* If the last insn of the loop (the end test) was an NE comparison,
6117 we will interpret it as an EQ comparison, since we fell through
6118 the loop. Any equivalences resulting from that comparison are
6119 therefore not valid and must be invalidated. */
6120 if (last_jump_equiv_class)
6121 for (p = last_jump_equiv_class->first_same_value; p;
6122 p = p->next_same_value)
6124 if (GET_CODE (p->exp) == MEM || GET_CODE (p->exp) == REG
6125 || (GET_CODE (p->exp) == SUBREG
6126 && GET_CODE (SUBREG_REG (p->exp)) == REG))
6127 invalidate (p->exp, VOIDmode);
6128 else if (GET_CODE (p->exp) == STRICT_LOW_PART
6129 || GET_CODE (p->exp) == ZERO_EXTRACT)
6130 invalidate (XEXP (p->exp, 0), GET_MODE (p->exp));
6133 /* Process insns starting after LOOP_START until we hit a CALL_INSN or
6134 a CODE_LABEL (we could handle a CALL_INSN, but it isn't worth it).
6136 The only thing we do with SET_DEST is invalidate entries, so we
6137 can safely process each SET in order. It is slightly less efficient
6138 to do so, but we only want to handle the most common cases.
6140 The gen_move_insn call in cse_set_around_loop may create new pseudos.
6141 These pseudos won't have valid entries in any of the tables indexed
6142 by register number, such as reg_qty. We avoid out-of-range array
6143 accesses by not processing any instructions created after cse started. */
6145 for (insn = NEXT_INSN (loop_start);
6146 GET_CODE (insn) != CALL_INSN && GET_CODE (insn) != CODE_LABEL
6147 && INSN_UID (insn) < max_insn_uid
6148 && ! (GET_CODE (insn) == NOTE
6149 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_END);
6150 insn = NEXT_INSN (insn))
6152 if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6153 && (GET_CODE (PATTERN (insn)) == SET
6154 || GET_CODE (PATTERN (insn)) == CLOBBER))
6155 cse_set_around_loop (PATTERN (insn), insn, loop_start);
6156 else if (GET_RTX_CLASS (GET_CODE (insn)) == 'i'
6157 && GET_CODE (PATTERN (insn)) == PARALLEL)
6158 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
6159 if (GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == SET
6160 || GET_CODE (XVECEXP (PATTERN (insn), 0, i)) == CLOBBER)
6161 cse_set_around_loop (XVECEXP (PATTERN (insn), 0, i), insn,
6162 loop_start);
6166 /* Process one SET of an insn that was skipped. We ignore CLOBBERs
6167 since they are done elsewhere. This function is called via note_stores. */
6169 static void
6170 invalidate_skipped_set (dest, set, data)
6171 rtx set;
6172 rtx dest;
6173 void *data ATTRIBUTE_UNUSED;
6175 enum rtx_code code = GET_CODE (dest);
6177 if (code == MEM
6178 #ifdef AUTO_INC_DEC
6179 && ! addr_affects_sp_p (dest) /* If this is not a stack push ... */
6180 #endif
6181 /* There are times when an address can appear varying and be a PLUS
6182 during this scan when it would be a fixed address were we to know
6183 the proper equivalences. So invalidate all memory if there is
6184 a BLKmode or nonscalar memory reference or a reference to a
6185 variable address. */
6186 && (MEM_IN_STRUCT_P (dest) || GET_MODE (dest) == BLKmode
6187 || cse_rtx_varies_p (XEXP (dest, 0))))
6189 invalidate_memory ();
6190 return;
6193 if (GET_CODE (set) == CLOBBER
6194 #ifdef HAVE_cc0
6195 || dest == cc0_rtx
6196 #endif
6197 || dest == pc_rtx)
6198 return;
6200 if (code == STRICT_LOW_PART || code == ZERO_EXTRACT)
6201 invalidate (XEXP (dest, 0), GET_MODE (dest));
6202 else if (code == REG || code == SUBREG || code == MEM)
6203 invalidate (dest, VOIDmode);
6206 /* Invalidate all insns from START up to the end of the function or the
6207 next label. This called when we wish to CSE around a block that is
6208 conditionally executed. */
6210 static void
6211 invalidate_skipped_block (start)
6212 rtx start;
6214 rtx insn;
6216 for (insn = start; insn && GET_CODE (insn) != CODE_LABEL;
6217 insn = NEXT_INSN (insn))
6219 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
6220 continue;
6222 if (GET_CODE (insn) == CALL_INSN)
6224 if (! CONST_CALL_P (insn))
6225 invalidate_memory ();
6226 invalidate_for_call ();
6229 invalidate_from_clobbers (PATTERN (insn));
6230 note_stores (PATTERN (insn), invalidate_skipped_set, NULL);
6234 /* If modifying X will modify the value in *DATA (which is really an
6235 `rtx *'), indicate that fact by setting the pointed to value to
6236 NULL_RTX. */
6238 static void
6239 cse_check_loop_start (x, set, data)
6240 rtx x;
6241 rtx set ATTRIBUTE_UNUSED;
6242 void *data;
6244 rtx *cse_check_loop_start_value = (rtx *) data;
6246 if (*cse_check_loop_start_value == NULL_RTX
6247 || GET_CODE (x) == CC0 || GET_CODE (x) == PC)
6248 return;
6250 if ((GET_CODE (x) == MEM && GET_CODE (*cse_check_loop_start_value) == MEM)
6251 || reg_overlap_mentioned_p (x, *cse_check_loop_start_value))
6252 *cse_check_loop_start_value = NULL_RTX;
6255 /* X is a SET or CLOBBER contained in INSN that was found near the start of
6256 a loop that starts with the label at LOOP_START.
6258 If X is a SET, we see if its SET_SRC is currently in our hash table.
6259 If so, we see if it has a value equal to some register used only in the
6260 loop exit code (as marked by jump.c).
6262 If those two conditions are true, we search backwards from the start of
6263 the loop to see if that same value was loaded into a register that still
6264 retains its value at the start of the loop.
6266 If so, we insert an insn after the load to copy the destination of that
6267 load into the equivalent register and (try to) replace our SET_SRC with that
6268 register.
6270 In any event, we invalidate whatever this SET or CLOBBER modifies. */
6272 static void
6273 cse_set_around_loop (x, insn, loop_start)
6274 rtx x;
6275 rtx insn;
6276 rtx loop_start;
6278 struct table_elt *src_elt;
6280 /* If this is a SET, see if we can replace SET_SRC, but ignore SETs that
6281 are setting PC or CC0 or whose SET_SRC is already a register. */
6282 if (GET_CODE (x) == SET
6283 && GET_CODE (SET_DEST (x)) != PC && GET_CODE (SET_DEST (x)) != CC0
6284 && GET_CODE (SET_SRC (x)) != REG)
6286 src_elt = lookup (SET_SRC (x),
6287 HASH (SET_SRC (x), GET_MODE (SET_DEST (x))),
6288 GET_MODE (SET_DEST (x)));
6290 if (src_elt)
6291 for (src_elt = src_elt->first_same_value; src_elt;
6292 src_elt = src_elt->next_same_value)
6293 if (GET_CODE (src_elt->exp) == REG && REG_LOOP_TEST_P (src_elt->exp)
6294 && COST (src_elt->exp) < COST (SET_SRC (x)))
6296 rtx p, set;
6298 /* Look for an insn in front of LOOP_START that sets
6299 something in the desired mode to SET_SRC (x) before we hit
6300 a label or CALL_INSN. */
6302 for (p = prev_nonnote_insn (loop_start);
6303 p && GET_CODE (p) != CALL_INSN
6304 && GET_CODE (p) != CODE_LABEL;
6305 p = prev_nonnote_insn (p))
6306 if ((set = single_set (p)) != 0
6307 && GET_CODE (SET_DEST (set)) == REG
6308 && GET_MODE (SET_DEST (set)) == src_elt->mode
6309 && rtx_equal_p (SET_SRC (set), SET_SRC (x)))
6311 /* We now have to ensure that nothing between P
6312 and LOOP_START modified anything referenced in
6313 SET_SRC (x). We know that nothing within the loop
6314 can modify it, or we would have invalidated it in
6315 the hash table. */
6316 rtx q;
6317 rtx cse_check_loop_start_value = SET_SRC (x);
6318 for (q = p; q != loop_start; q = NEXT_INSN (q))
6319 if (GET_RTX_CLASS (GET_CODE (q)) == 'i')
6320 note_stores (PATTERN (q),
6321 cse_check_loop_start,
6322 &cse_check_loop_start_value);
6324 /* If nothing was changed and we can replace our
6325 SET_SRC, add an insn after P to copy its destination
6326 to what we will be replacing SET_SRC with. */
6327 if (cse_check_loop_start_value
6328 && validate_change (insn, &SET_SRC (x),
6329 src_elt->exp, 0))
6331 /* If this creates new pseudos, this is unsafe,
6332 because the regno of new pseudo is unsuitable
6333 to index into reg_qty when cse_insn processes
6334 the new insn. Therefore, if a new pseudo was
6335 created, discard this optimization. */
6336 int nregs = max_reg_num ();
6337 rtx move
6338 = gen_move_insn (src_elt->exp, SET_DEST (set));
6339 if (nregs != max_reg_num ())
6341 if (! validate_change (insn, &SET_SRC (x),
6342 SET_SRC (set), 0))
6343 abort ();
6345 else
6346 emit_insn_after (move, p);
6348 break;
6353 #ifdef AUTO_INC_DEC
6354 /* Deal with the destination of X affecting the stack pointer. */
6355 addr_affects_sp_p (SET_DEST (x));
6356 #endif
6358 /* See comment on similar code in cse_insn for explanation of these
6359 tests. */
6360 if (GET_CODE (SET_DEST (x)) == REG || GET_CODE (SET_DEST (x)) == SUBREG
6361 || GET_CODE (SET_DEST (x)) == MEM)
6362 invalidate (SET_DEST (x), VOIDmode);
6363 else if (GET_CODE (SET_DEST (x)) == STRICT_LOW_PART
6364 || GET_CODE (SET_DEST (x)) == ZERO_EXTRACT)
6365 invalidate (XEXP (SET_DEST (x), 0), GET_MODE (SET_DEST (x)));
6368 /* Find the end of INSN's basic block and return its range,
6369 the total number of SETs in all the insns of the block, the last insn of the
6370 block, and the branch path.
6372 The branch path indicates which branches should be followed. If a non-zero
6373 path size is specified, the block should be rescanned and a different set
6374 of branches will be taken. The branch path is only used if
6375 FLAG_CSE_FOLLOW_JUMPS or FLAG_CSE_SKIP_BLOCKS is non-zero.
6377 DATA is a pointer to a struct cse_basic_block_data, defined below, that is
6378 used to describe the block. It is filled in with the information about
6379 the current block. The incoming structure's branch path, if any, is used
6380 to construct the output branch path. */
6382 void
6383 cse_end_of_basic_block (insn, data, follow_jumps, after_loop, skip_blocks)
6384 rtx insn;
6385 struct cse_basic_block_data *data;
6386 int follow_jumps;
6387 int after_loop;
6388 int skip_blocks;
6390 rtx p = insn, q;
6391 int nsets = 0;
6392 int low_cuid = INSN_CUID (insn), high_cuid = INSN_CUID (insn);
6393 rtx next = GET_RTX_CLASS (GET_CODE (insn)) == 'i' ? insn : next_real_insn (insn);
6394 int path_size = data->path_size;
6395 int path_entry = 0;
6396 int i;
6398 /* Update the previous branch path, if any. If the last branch was
6399 previously TAKEN, mark it NOT_TAKEN. If it was previously NOT_TAKEN,
6400 shorten the path by one and look at the previous branch. We know that
6401 at least one branch must have been taken if PATH_SIZE is non-zero. */
6402 while (path_size > 0)
6404 if (data->path[path_size - 1].status != NOT_TAKEN)
6406 data->path[path_size - 1].status = NOT_TAKEN;
6407 break;
6409 else
6410 path_size--;
6413 /* If the first instruction is marked with QImode, that means we've
6414 already processed this block. Our caller will look at DATA->LAST
6415 to figure out where to go next. We want to return the next block
6416 in the instruction stream, not some branched-to block somewhere
6417 else. We accomplish this by pretending our called forbid us to
6418 follow jumps, or skip blocks. */
6419 if (GET_MODE (insn) == QImode)
6420 follow_jumps = skip_blocks = 0;
6422 /* Scan to end of this basic block. */
6423 while (p && GET_CODE (p) != CODE_LABEL)
6425 /* Don't cse out the end of a loop. This makes a difference
6426 only for the unusual loops that always execute at least once;
6427 all other loops have labels there so we will stop in any case.
6428 Cse'ing out the end of the loop is dangerous because it
6429 might cause an invariant expression inside the loop
6430 to be reused after the end of the loop. This would make it
6431 hard to move the expression out of the loop in loop.c,
6432 especially if it is one of several equivalent expressions
6433 and loop.c would like to eliminate it.
6435 If we are running after loop.c has finished, we can ignore
6436 the NOTE_INSN_LOOP_END. */
6438 if (! after_loop && GET_CODE (p) == NOTE
6439 && NOTE_LINE_NUMBER (p) == NOTE_INSN_LOOP_END)
6440 break;
6442 /* Don't cse over a call to setjmp; on some machines (eg vax)
6443 the regs restored by the longjmp come from
6444 a later time than the setjmp. */
6445 if (GET_CODE (p) == NOTE
6446 && NOTE_LINE_NUMBER (p) == NOTE_INSN_SETJMP)
6447 break;
6449 /* A PARALLEL can have lots of SETs in it,
6450 especially if it is really an ASM_OPERANDS. */
6451 if (GET_RTX_CLASS (GET_CODE (p)) == 'i'
6452 && GET_CODE (PATTERN (p)) == PARALLEL)
6453 nsets += XVECLEN (PATTERN (p), 0);
6454 else if (GET_CODE (p) != NOTE)
6455 nsets += 1;
6457 /* Ignore insns made by CSE; they cannot affect the boundaries of
6458 the basic block. */
6460 if (INSN_UID (p) <= max_uid && INSN_CUID (p) > high_cuid)
6461 high_cuid = INSN_CUID (p);
6462 if (INSN_UID (p) <= max_uid && INSN_CUID (p) < low_cuid)
6463 low_cuid = INSN_CUID (p);
6465 /* See if this insn is in our branch path. If it is and we are to
6466 take it, do so. */
6467 if (path_entry < path_size && data->path[path_entry].branch == p)
6469 if (data->path[path_entry].status != NOT_TAKEN)
6470 p = JUMP_LABEL (p);
6472 /* Point to next entry in path, if any. */
6473 path_entry++;
6476 /* If this is a conditional jump, we can follow it if -fcse-follow-jumps
6477 was specified, we haven't reached our maximum path length, there are
6478 insns following the target of the jump, this is the only use of the
6479 jump label, and the target label is preceded by a BARRIER.
6481 Alternatively, we can follow the jump if it branches around a
6482 block of code and there are no other branches into the block.
6483 In this case invalidate_skipped_block will be called to invalidate any
6484 registers set in the block when following the jump. */
6486 else if ((follow_jumps || skip_blocks) && path_size < PATHLENGTH - 1
6487 && GET_CODE (p) == JUMP_INSN
6488 && GET_CODE (PATTERN (p)) == SET
6489 && GET_CODE (SET_SRC (PATTERN (p))) == IF_THEN_ELSE
6490 && JUMP_LABEL (p) != 0
6491 && LABEL_NUSES (JUMP_LABEL (p)) == 1
6492 && NEXT_INSN (JUMP_LABEL (p)) != 0)
6494 for (q = PREV_INSN (JUMP_LABEL (p)); q; q = PREV_INSN (q))
6495 if ((GET_CODE (q) != NOTE
6496 || NOTE_LINE_NUMBER (q) == NOTE_INSN_LOOP_END
6497 || NOTE_LINE_NUMBER (q) == NOTE_INSN_SETJMP)
6498 && (GET_CODE (q) != CODE_LABEL || LABEL_NUSES (q) != 0))
6499 break;
6501 /* If we ran into a BARRIER, this code is an extension of the
6502 basic block when the branch is taken. */
6503 if (follow_jumps && q != 0 && GET_CODE (q) == BARRIER)
6505 /* Don't allow ourself to keep walking around an
6506 always-executed loop. */
6507 if (next_real_insn (q) == next)
6509 p = NEXT_INSN (p);
6510 continue;
6513 /* Similarly, don't put a branch in our path more than once. */
6514 for (i = 0; i < path_entry; i++)
6515 if (data->path[i].branch == p)
6516 break;
6518 if (i != path_entry)
6519 break;
6521 data->path[path_entry].branch = p;
6522 data->path[path_entry++].status = TAKEN;
6524 /* This branch now ends our path. It was possible that we
6525 didn't see this branch the last time around (when the
6526 insn in front of the target was a JUMP_INSN that was
6527 turned into a no-op). */
6528 path_size = path_entry;
6530 p = JUMP_LABEL (p);
6531 /* Mark block so we won't scan it again later. */
6532 PUT_MODE (NEXT_INSN (p), QImode);
6534 /* Detect a branch around a block of code. */
6535 else if (skip_blocks && q != 0 && GET_CODE (q) != CODE_LABEL)
6537 register rtx tmp;
6539 if (next_real_insn (q) == next)
6541 p = NEXT_INSN (p);
6542 continue;
6545 for (i = 0; i < path_entry; i++)
6546 if (data->path[i].branch == p)
6547 break;
6549 if (i != path_entry)
6550 break;
6552 /* This is no_labels_between_p (p, q) with an added check for
6553 reaching the end of a function (in case Q precedes P). */
6554 for (tmp = NEXT_INSN (p); tmp && tmp != q; tmp = NEXT_INSN (tmp))
6555 if (GET_CODE (tmp) == CODE_LABEL)
6556 break;
6558 if (tmp == q)
6560 data->path[path_entry].branch = p;
6561 data->path[path_entry++].status = AROUND;
6563 path_size = path_entry;
6565 p = JUMP_LABEL (p);
6566 /* Mark block so we won't scan it again later. */
6567 PUT_MODE (NEXT_INSN (p), QImode);
6571 p = NEXT_INSN (p);
6574 data->low_cuid = low_cuid;
6575 data->high_cuid = high_cuid;
6576 data->nsets = nsets;
6577 data->last = p;
6579 /* If all jumps in the path are not taken, set our path length to zero
6580 so a rescan won't be done. */
6581 for (i = path_size - 1; i >= 0; i--)
6582 if (data->path[i].status != NOT_TAKEN)
6583 break;
6585 if (i == -1)
6586 data->path_size = 0;
6587 else
6588 data->path_size = path_size;
6590 /* End the current branch path. */
6591 data->path[path_size].branch = 0;
6594 /* Perform cse on the instructions of a function.
6595 F is the first instruction.
6596 NREGS is one plus the highest pseudo-reg number used in the instruction.
6598 AFTER_LOOP is 1 if this is the cse call done after loop optimization
6599 (only if -frerun-cse-after-loop).
6601 Returns 1 if jump_optimize should be redone due to simplifications
6602 in conditional jump instructions. */
6605 cse_main (f, nregs, after_loop, file)
6606 rtx f;
6607 int nregs;
6608 int after_loop;
6609 FILE *file;
6611 struct cse_basic_block_data val;
6612 register rtx insn = f;
6613 register int i;
6615 cse_jumps_altered = 0;
6616 recorded_label_ref = 0;
6617 constant_pool_entries_cost = 0;
6618 val.path_size = 0;
6620 init_recog ();
6621 init_alias_analysis ();
6623 max_reg = nregs;
6625 max_insn_uid = get_max_uid ();
6627 reg_next_eqv = (int *) xmalloc (nregs * sizeof (int));
6628 reg_prev_eqv = (int *) xmalloc (nregs * sizeof (int));
6630 #ifdef LOAD_EXTEND_OP
6632 /* Allocate scratch rtl here. cse_insn will fill in the memory reference
6633 and change the code and mode as appropriate. */
6634 memory_extend_rtx = gen_rtx_ZERO_EXTEND (VOIDmode, NULL_RTX);
6635 #endif
6637 /* Discard all the free elements of the previous function
6638 since they are allocated in the temporarily obstack. */
6639 bzero ((char *) table, sizeof table);
6640 free_element_chain = 0;
6641 n_elements_made = 0;
6643 /* Find the largest uid. */
6645 max_uid = get_max_uid ();
6646 uid_cuid = (int *) xcalloc (max_uid + 1, sizeof (int));
6648 /* Compute the mapping from uids to cuids.
6649 CUIDs are numbers assigned to insns, like uids,
6650 except that cuids increase monotonically through the code.
6651 Don't assign cuids to line-number NOTEs, so that the distance in cuids
6652 between two insns is not affected by -g. */
6654 for (insn = f, i = 0; insn; insn = NEXT_INSN (insn))
6656 if (GET_CODE (insn) != NOTE
6657 || NOTE_LINE_NUMBER (insn) < 0)
6658 INSN_CUID (insn) = ++i;
6659 else
6660 /* Give a line number note the same cuid as preceding insn. */
6661 INSN_CUID (insn) = i;
6664 /* Initialize which registers are clobbered by calls. */
6666 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
6668 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
6669 if ((call_used_regs[i]
6670 /* Used to check !fixed_regs[i] here, but that isn't safe;
6671 fixed regs are still call-clobbered, and sched can get
6672 confused if they can "live across calls".
6674 The frame pointer is always preserved across calls. The arg
6675 pointer is if it is fixed. The stack pointer usually is, unless
6676 RETURN_POPS_ARGS, in which case an explicit CLOBBER
6677 will be present. If we are generating PIC code, the PIC offset
6678 table register is preserved across calls. */
6680 && i != STACK_POINTER_REGNUM
6681 && i != FRAME_POINTER_REGNUM
6682 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
6683 && i != HARD_FRAME_POINTER_REGNUM
6684 #endif
6685 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
6686 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
6687 #endif
6688 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
6689 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
6690 #endif
6692 || global_regs[i])
6693 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
6695 if (ggc_p)
6696 ggc_push_context ();
6698 /* Loop over basic blocks.
6699 Compute the maximum number of qty's needed for each basic block
6700 (which is 2 for each SET). */
6701 insn = f;
6702 while (insn)
6704 cse_end_of_basic_block (insn, &val, flag_cse_follow_jumps, after_loop,
6705 flag_cse_skip_blocks);
6707 /* If this basic block was already processed or has no sets, skip it. */
6708 if (val.nsets == 0 || GET_MODE (insn) == QImode)
6710 PUT_MODE (insn, VOIDmode);
6711 insn = (val.last ? NEXT_INSN (val.last) : 0);
6712 val.path_size = 0;
6713 continue;
6716 cse_basic_block_start = val.low_cuid;
6717 cse_basic_block_end = val.high_cuid;
6718 max_qty = val.nsets * 2;
6720 if (file)
6721 fnotice (file, ";; Processing block from %d to %d, %d sets.\n",
6722 INSN_UID (insn), val.last ? INSN_UID (val.last) : 0,
6723 val.nsets);
6725 /* Make MAX_QTY bigger to give us room to optimize
6726 past the end of this basic block, if that should prove useful. */
6727 if (max_qty < 500)
6728 max_qty = 500;
6730 max_qty += max_reg;
6732 /* If this basic block is being extended by following certain jumps,
6733 (see `cse_end_of_basic_block'), we reprocess the code from the start.
6734 Otherwise, we start after this basic block. */
6735 if (val.path_size > 0)
6736 cse_basic_block (insn, val.last, val.path, 0);
6737 else
6739 int old_cse_jumps_altered = cse_jumps_altered;
6740 rtx temp;
6742 /* When cse changes a conditional jump to an unconditional
6743 jump, we want to reprocess the block, since it will give
6744 us a new branch path to investigate. */
6745 cse_jumps_altered = 0;
6746 temp = cse_basic_block (insn, val.last, val.path, ! after_loop);
6747 if (cse_jumps_altered == 0
6748 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6749 insn = temp;
6751 cse_jumps_altered |= old_cse_jumps_altered;
6754 if (ggc_p)
6755 ggc_collect ();
6757 #ifdef USE_C_ALLOCA
6758 alloca (0);
6759 #endif
6762 if (ggc_p)
6763 ggc_pop_context ();
6765 /* Tell refers_to_mem_p that qty_const info is not available. */
6766 qty_const = 0;
6768 if (max_elements_made < n_elements_made)
6769 max_elements_made = n_elements_made;
6771 /* Clean up. */
6772 end_alias_analysis ();
6773 free (uid_cuid);
6774 free (reg_next_eqv);
6775 free (reg_prev_eqv);
6777 return cse_jumps_altered || recorded_label_ref;
6780 /* Process a single basic block. FROM and TO and the limits of the basic
6781 block. NEXT_BRANCH points to the branch path when following jumps or
6782 a null path when not following jumps.
6784 AROUND_LOOP is non-zero if we are to try to cse around to the start of a
6785 loop. This is true when we are being called for the last time on a
6786 block and this CSE pass is before loop.c. */
6788 static rtx
6789 cse_basic_block (from, to, next_branch, around_loop)
6790 register rtx from, to;
6791 struct branch_path *next_branch;
6792 int around_loop;
6794 register rtx insn;
6795 int to_usage = 0;
6796 rtx libcall_insn = NULL_RTX;
6797 int num_insns = 0;
6799 /* Each of these arrays is undefined before max_reg, so only allocate
6800 the space actually needed and adjust the start below. */
6802 qty_first_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
6803 qty_last_reg = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
6804 qty_mode = (enum machine_mode *) xmalloc ((max_qty - max_reg)
6805 * sizeof (enum machine_mode));
6806 qty_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
6807 qty_const_insn = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
6808 qty_comparison_code
6809 = (enum rtx_code *) xmalloc ((max_qty - max_reg) * sizeof (enum rtx_code));
6810 qty_comparison_qty = (int *) xmalloc ((max_qty - max_reg) * sizeof (int));
6811 qty_comparison_const = (rtx *) xmalloc ((max_qty - max_reg) * sizeof (rtx));
6813 qty_first_reg -= max_reg;
6814 qty_last_reg -= max_reg;
6815 qty_mode -= max_reg;
6816 qty_const -= max_reg;
6817 qty_const_insn -= max_reg;
6818 qty_comparison_code -= max_reg;
6819 qty_comparison_qty -= max_reg;
6820 qty_comparison_const -= max_reg;
6822 new_basic_block ();
6824 /* TO might be a label. If so, protect it from being deleted. */
6825 if (to != 0 && GET_CODE (to) == CODE_LABEL)
6826 ++LABEL_NUSES (to);
6828 for (insn = from; insn != to; insn = NEXT_INSN (insn))
6830 register enum rtx_code code = GET_CODE (insn);
6832 /* If we have processed 1,000 insns, flush the hash table to
6833 avoid extreme quadratic behavior. We must not include NOTEs
6834 in the count since there may be more or them when generating
6835 debugging information. If we clear the table at different
6836 times, code generated with -g -O might be different than code
6837 generated with -O but not -g.
6839 ??? This is a real kludge and needs to be done some other way.
6840 Perhaps for 2.9. */
6841 if (code != NOTE && num_insns++ > 1000)
6843 flush_hash_table ();
6844 num_insns = 0;
6847 /* See if this is a branch that is part of the path. If so, and it is
6848 to be taken, do so. */
6849 if (next_branch->branch == insn)
6851 enum taken status = next_branch++->status;
6852 if (status != NOT_TAKEN)
6854 if (status == TAKEN)
6855 record_jump_equiv (insn, 1);
6856 else
6857 invalidate_skipped_block (NEXT_INSN (insn));
6859 /* Set the last insn as the jump insn; it doesn't affect cc0.
6860 Then follow this branch. */
6861 #ifdef HAVE_cc0
6862 prev_insn_cc0 = 0;
6863 #endif
6864 prev_insn = insn;
6865 insn = JUMP_LABEL (insn);
6866 continue;
6870 if (GET_MODE (insn) == QImode)
6871 PUT_MODE (insn, VOIDmode);
6873 if (GET_RTX_CLASS (code) == 'i')
6875 rtx p;
6877 /* Process notes first so we have all notes in canonical forms when
6878 looking for duplicate operations. */
6880 if (REG_NOTES (insn))
6881 REG_NOTES (insn) = cse_process_notes (REG_NOTES (insn), NULL_RTX);
6883 /* Track when we are inside in LIBCALL block. Inside such a block,
6884 we do not want to record destinations. The last insn of a
6885 LIBCALL block is not considered to be part of the block, since
6886 its destination is the result of the block and hence should be
6887 recorded. */
6889 if ((p = find_reg_note (insn, REG_LIBCALL, NULL_RTX)))
6890 libcall_insn = XEXP (p, 0);
6891 else if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
6892 libcall_insn = NULL_RTX;
6894 cse_insn (insn, libcall_insn);
6897 /* If INSN is now an unconditional jump, skip to the end of our
6898 basic block by pretending that we just did the last insn in the
6899 basic block. If we are jumping to the end of our block, show
6900 that we can have one usage of TO. */
6902 if (simplejump_p (insn))
6904 if (to == 0)
6905 return 0;
6907 if (JUMP_LABEL (insn) == to)
6908 to_usage = 1;
6910 /* Maybe TO was deleted because the jump is unconditional.
6911 If so, there is nothing left in this basic block. */
6912 /* ??? Perhaps it would be smarter to set TO
6913 to whatever follows this insn,
6914 and pretend the basic block had always ended here. */
6915 if (INSN_DELETED_P (to))
6916 break;
6918 insn = PREV_INSN (to);
6921 /* See if it is ok to keep on going past the label
6922 which used to end our basic block. Remember that we incremented
6923 the count of that label, so we decrement it here. If we made
6924 a jump unconditional, TO_USAGE will be one; in that case, we don't
6925 want to count the use in that jump. */
6927 if (to != 0 && NEXT_INSN (insn) == to
6928 && GET_CODE (to) == CODE_LABEL && --LABEL_NUSES (to) == to_usage)
6930 struct cse_basic_block_data val;
6931 rtx prev;
6933 insn = NEXT_INSN (to);
6935 /* If TO was the last insn in the function, we are done. */
6936 if (insn == 0)
6937 return 0;
6939 /* If TO was preceded by a BARRIER we are done with this block
6940 because it has no continuation. */
6941 prev = prev_nonnote_insn (to);
6942 if (prev && GET_CODE (prev) == BARRIER)
6943 return insn;
6945 /* Find the end of the following block. Note that we won't be
6946 following branches in this case. */
6947 to_usage = 0;
6948 val.path_size = 0;
6949 cse_end_of_basic_block (insn, &val, 0, 0, 0);
6951 /* If the tables we allocated have enough space left
6952 to handle all the SETs in the next basic block,
6953 continue through it. Otherwise, return,
6954 and that block will be scanned individually. */
6955 if (val.nsets * 2 + next_qty > max_qty)
6956 break;
6958 cse_basic_block_start = val.low_cuid;
6959 cse_basic_block_end = val.high_cuid;
6960 to = val.last;
6962 /* Prevent TO from being deleted if it is a label. */
6963 if (to != 0 && GET_CODE (to) == CODE_LABEL)
6964 ++LABEL_NUSES (to);
6966 /* Back up so we process the first insn in the extension. */
6967 insn = PREV_INSN (insn);
6971 if (next_qty > max_qty)
6972 abort ();
6974 /* If we are running before loop.c, we stopped on a NOTE_INSN_LOOP_END, and
6975 the previous insn is the only insn that branches to the head of a loop,
6976 we can cse into the loop. Don't do this if we changed the jump
6977 structure of a loop unless we aren't going to be following jumps. */
6979 if ((cse_jumps_altered == 0
6980 || (flag_cse_follow_jumps == 0 && flag_cse_skip_blocks == 0))
6981 && around_loop && to != 0
6982 && GET_CODE (to) == NOTE && NOTE_LINE_NUMBER (to) == NOTE_INSN_LOOP_END
6983 && GET_CODE (PREV_INSN (to)) == JUMP_INSN
6984 && JUMP_LABEL (PREV_INSN (to)) != 0
6985 && LABEL_NUSES (JUMP_LABEL (PREV_INSN (to))) == 1)
6986 cse_around_loop (JUMP_LABEL (PREV_INSN (to)));
6988 free (qty_first_reg + max_reg);
6989 free (qty_last_reg + max_reg);
6990 free (qty_mode + max_reg);
6991 free (qty_const + max_reg);
6992 free (qty_const_insn + max_reg);
6993 free (qty_comparison_code + max_reg);
6994 free (qty_comparison_qty + max_reg);
6995 free (qty_comparison_const + max_reg);
6997 return to ? NEXT_INSN (to) : 0;
7000 /* Count the number of times registers are used (not set) in X.
7001 COUNTS is an array in which we accumulate the count, INCR is how much
7002 we count each register usage.
7004 Don't count a usage of DEST, which is the SET_DEST of a SET which
7005 contains X in its SET_SRC. This is because such a SET does not
7006 modify the liveness of DEST. */
7008 static void
7009 count_reg_usage (x, counts, dest, incr)
7010 rtx x;
7011 int *counts;
7012 rtx dest;
7013 int incr;
7015 enum rtx_code code;
7016 const char *fmt;
7017 int i, j;
7019 if (x == 0)
7020 return;
7022 switch (code = GET_CODE (x))
7024 case REG:
7025 if (x != dest)
7026 counts[REGNO (x)] += incr;
7027 return;
7029 case PC:
7030 case CC0:
7031 case CONST:
7032 case CONST_INT:
7033 case CONST_DOUBLE:
7034 case SYMBOL_REF:
7035 case LABEL_REF:
7036 return;
7038 case CLOBBER:
7039 /* If we are clobbering a MEM, mark any registers inside the address
7040 as being used. */
7041 if (GET_CODE (XEXP (x, 0)) == MEM)
7042 count_reg_usage (XEXP (XEXP (x, 0), 0), counts, NULL_RTX, incr);
7043 return;
7045 case SET:
7046 /* Unless we are setting a REG, count everything in SET_DEST. */
7047 if (GET_CODE (SET_DEST (x)) != REG)
7048 count_reg_usage (SET_DEST (x), counts, NULL_RTX, incr);
7050 /* If SRC has side-effects, then we can't delete this insn, so the
7051 usage of SET_DEST inside SRC counts.
7053 ??? Strictly-speaking, we might be preserving this insn
7054 because some other SET has side-effects, but that's hard
7055 to do and can't happen now. */
7056 count_reg_usage (SET_SRC (x), counts,
7057 side_effects_p (SET_SRC (x)) ? NULL_RTX : SET_DEST (x),
7058 incr);
7059 return;
7061 case CALL_INSN:
7062 count_reg_usage (CALL_INSN_FUNCTION_USAGE (x), counts, NULL_RTX, incr);
7064 /* ... falls through ... */
7065 case INSN:
7066 case JUMP_INSN:
7067 count_reg_usage (PATTERN (x), counts, NULL_RTX, incr);
7069 /* Things used in a REG_EQUAL note aren't dead since loop may try to
7070 use them. */
7072 count_reg_usage (REG_NOTES (x), counts, NULL_RTX, incr);
7073 return;
7075 case EXPR_LIST:
7076 case INSN_LIST:
7077 if (REG_NOTE_KIND (x) == REG_EQUAL
7078 || (REG_NOTE_KIND (x) != REG_NONNEG && GET_CODE (XEXP (x,0)) == USE))
7079 count_reg_usage (XEXP (x, 0), counts, NULL_RTX, incr);
7080 count_reg_usage (XEXP (x, 1), counts, NULL_RTX, incr);
7081 return;
7083 default:
7084 break;
7087 fmt = GET_RTX_FORMAT (code);
7088 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
7090 if (fmt[i] == 'e')
7091 count_reg_usage (XEXP (x, i), counts, dest, incr);
7092 else if (fmt[i] == 'E')
7093 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
7094 count_reg_usage (XVECEXP (x, i, j), counts, dest, incr);
7098 /* Scan all the insns and delete any that are dead; i.e., they store a register
7099 that is never used or they copy a register to itself.
7101 This is used to remove insns made obviously dead by cse, loop or other
7102 optimizations. It improves the heuristics in loop since it won't try to
7103 move dead invariants out of loops or make givs for dead quantities. The
7104 remaining passes of the compilation are also sped up. */
7106 void
7107 delete_trivially_dead_insns (insns, nreg)
7108 rtx insns;
7109 int nreg;
7111 int *counts;
7112 rtx insn, prev;
7113 #ifdef HAVE_cc0
7114 rtx tem;
7115 #endif
7116 int i;
7117 int in_libcall = 0, dead_libcall = 0;
7119 /* First count the number of times each register is used. */
7120 counts = (int *) xcalloc (nreg, sizeof (int));
7121 for (insn = next_real_insn (insns); insn; insn = next_real_insn (insn))
7122 count_reg_usage (insn, counts, NULL_RTX, 1);
7124 /* Go from the last insn to the first and delete insns that only set unused
7125 registers or copy a register to itself. As we delete an insn, remove
7126 usage counts for registers it uses.
7128 The first jump optimization pass may leave a real insn as the last
7129 insn in the function. We must not skip that insn or we may end
7130 up deleting code that is not really dead. */
7131 insn = get_last_insn ();
7132 if (GET_RTX_CLASS (GET_CODE (insn)) != 'i')
7133 insn = prev_real_insn (insn);
7135 for ( ; insn; insn = prev)
7137 int live_insn = 0;
7138 rtx note;
7140 prev = prev_real_insn (insn);
7142 /* Don't delete any insns that are part of a libcall block unless
7143 we can delete the whole libcall block.
7145 Flow or loop might get confused if we did that. Remember
7146 that we are scanning backwards. */
7147 if (find_reg_note (insn, REG_RETVAL, NULL_RTX))
7149 in_libcall = 1;
7150 live_insn = 1;
7151 dead_libcall = 0;
7153 /* See if there's a REG_EQUAL note on this insn and try to
7154 replace the source with the REG_EQUAL expression.
7156 We assume that insns with REG_RETVALs can only be reg->reg
7157 copies at this point. */
7158 note = find_reg_note (insn, REG_EQUAL, NULL_RTX);
7159 if (note)
7161 rtx set = single_set (insn);
7162 rtx new = simplify_rtx (XEXP (note, 0));
7164 if (!new)
7165 new = XEXP (note, 0);
7167 if (set && validate_change (insn, &SET_SRC (set), new, 0))
7169 remove_note (insn,
7170 find_reg_note (insn, REG_RETVAL, NULL_RTX));
7171 dead_libcall = 1;
7175 else if (in_libcall)
7176 live_insn = ! dead_libcall;
7177 else if (GET_CODE (PATTERN (insn)) == SET)
7179 if (GET_CODE (SET_DEST (PATTERN (insn))) == REG
7180 && SET_DEST (PATTERN (insn)) == SET_SRC (PATTERN (insn)))
7183 #ifdef HAVE_cc0
7184 else if (GET_CODE (SET_DEST (PATTERN (insn))) == CC0
7185 && ! side_effects_p (SET_SRC (PATTERN (insn)))
7186 && ((tem = next_nonnote_insn (insn)) == 0
7187 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7188 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7190 #endif
7191 else if (GET_CODE (SET_DEST (PATTERN (insn))) != REG
7192 || REGNO (SET_DEST (PATTERN (insn))) < FIRST_PSEUDO_REGISTER
7193 || counts[REGNO (SET_DEST (PATTERN (insn)))] != 0
7194 || side_effects_p (SET_SRC (PATTERN (insn)))
7195 /* An ADDRESSOF expression can turn into a use of the
7196 internal arg pointer, so always consider the
7197 internal arg pointer live. If it is truly dead,
7198 flow will delete the initializing insn. */
7199 || (SET_DEST (PATTERN (insn))
7200 == current_function_internal_arg_pointer))
7201 live_insn = 1;
7203 else if (GET_CODE (PATTERN (insn)) == PARALLEL)
7204 for (i = XVECLEN (PATTERN (insn), 0) - 1; i >= 0; i--)
7206 rtx elt = XVECEXP (PATTERN (insn), 0, i);
7208 if (GET_CODE (elt) == SET)
7210 if (GET_CODE (SET_DEST (elt)) == REG
7211 && SET_DEST (elt) == SET_SRC (elt))
7214 #ifdef HAVE_cc0
7215 else if (GET_CODE (SET_DEST (elt)) == CC0
7216 && ! side_effects_p (SET_SRC (elt))
7217 && ((tem = next_nonnote_insn (insn)) == 0
7218 || GET_RTX_CLASS (GET_CODE (tem)) != 'i'
7219 || ! reg_referenced_p (cc0_rtx, PATTERN (tem))))
7221 #endif
7222 else if (GET_CODE (SET_DEST (elt)) != REG
7223 || REGNO (SET_DEST (elt)) < FIRST_PSEUDO_REGISTER
7224 || counts[REGNO (SET_DEST (elt))] != 0
7225 || side_effects_p (SET_SRC (elt))
7226 /* An ADDRESSOF expression can turn into a use of the
7227 internal arg pointer, so always consider the
7228 internal arg pointer live. If it is truly dead,
7229 flow will delete the initializing insn. */
7230 || (SET_DEST (elt)
7231 == current_function_internal_arg_pointer))
7232 live_insn = 1;
7234 else if (GET_CODE (elt) != CLOBBER && GET_CODE (elt) != USE)
7235 live_insn = 1;
7237 else
7238 live_insn = 1;
7240 /* If this is a dead insn, delete it and show registers in it aren't
7241 being used. */
7243 if (! live_insn)
7245 count_reg_usage (insn, counts, NULL_RTX, -1);
7246 delete_insn (insn);
7249 if (find_reg_note (insn, REG_LIBCALL, NULL_RTX))
7251 in_libcall = 0;
7252 dead_libcall = 0;
7256 /* Clean up. */
7257 free (counts);