1 /* Functions and structures shared between arm and aarch64.
3 Copyright (C) 1991-2014 Free Software Foundation, Inc.
4 Contributed by ARM Ltd.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it
9 under the terms of the GNU General Public License as published
10 by the Free Software Foundation; either version 3, or (at your
11 option) any later version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT
14 ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
15 or FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public
16 License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 #ifndef GCC_AARCH_COMMON_PROTOS_H
24 #define GCC_AARCH_COMMON_PROTOS_H
26 extern int arm_early_load_addr_dep (rtx
, rtx
);
27 extern int arm_early_store_addr_dep (rtx
, rtx
);
28 extern int arm_mac_accumulator_is_mul_result (rtx
, rtx
);
29 extern int arm_mac_accumulator_is_result (rtx
, rtx
);
30 extern int arm_no_early_alu_shift_dep (rtx
, rtx
);
31 extern int arm_no_early_alu_shift_value_dep (rtx
, rtx
);
32 extern int arm_no_early_mul_dep (rtx
, rtx
);
33 extern int arm_no_early_store_addr_dep (rtx
, rtx
);
34 extern bool arm_rtx_shift_left_p (rtx
);
36 /* RTX cost table definitions. These are used when tuning for speed rather
37 than for size and should reflect the _additional_ cost over the cost
38 of the fastest instruction in the machine, which is COSTS_N_INSNS (1).
39 Therefore it's okay for some costs to be 0.
40 Costs may not have a negative value. */
43 const int arith
; /* ADD/SUB. */
44 const int logical
; /* AND/ORR/EOR/BIC, etc. */
45 const int shift
; /* Simple shift. */
46 const int shift_reg
; /* Simple shift by reg. */
47 const int arith_shift
; /* Additional when arith also shifts... */
48 const int arith_shift_reg
; /* ... and when the shift is by a reg. */
49 const int log_shift
; /* Additional when logic also shifts... */
50 const int log_shift_reg
; /* ... and when the shift is by a reg. */
51 const int extend
; /* Zero/sign extension. */
52 const int extend_arith
; /* Extend and arith. */
53 const int bfi
; /* Bit-field insert. */
54 const int bfx
; /* Bit-field extraction. */
55 const int clz
; /* Count Leading Zeros. */
56 const int non_exec
; /* Extra cost when not executing insn. */
57 const bool non_exec_costs_exec
; /* True if non-execution must add the exec
61 struct mult_cost_table
64 const int flag_setting
; /* Additional cost if multiply sets flags. */
71 /* Calculations of LDM costs are complex. We assume an initial cost
72 (ldm_1st) which will load the number of registers mentioned in
73 ldm_regs_per_insn_1st registers; then each additional
74 ldm_regs_per_insn_subsequent registers cost one more insn.
75 Similarly for STM operations.
76 Therefore the ldm_regs_per_insn_1st/stm_regs_per_insn_1st and
77 ldm_regs_per_insn_subsequent/stm_regs_per_insn_subsequent fields indicate
78 the number of registers loaded/stored and are expressed by a simple integer
79 and not by a COSTS_N_INSNS (N) expression.
84 const int load_sign_extend
; /* Additional to load cost. */
85 const int ldrd
; /* Cost of LDRD. */
87 const int ldm_regs_per_insn_1st
;
88 const int ldm_regs_per_insn_subsequent
;
89 const int loadf
; /* SFmode. */
90 const int loadd
; /* DFmode. */
91 const int load_unaligned
; /* Extra for unaligned loads. */
95 const int stm_regs_per_insn_1st
;
96 const int stm_regs_per_insn_subsequent
;
97 const int storef
; /* SFmode. */
98 const int stored
; /* DFmode. */
99 const int store_unaligned
; /* Extra for unaligned stores. */
106 const int mult_addsub
; /* Non-fused. */
107 const int fma
; /* Fused. */
109 const int fpconst
; /* Immediate. */
110 const int neg
; /* NEG and ABS. */
112 const int widen
; /* Widen to this size. */
113 const int narrow
; /* Narrow from this size. */
116 const int roundint
; /* V8 round to integral, remains FP format. */
119 struct vector_cost_table
124 struct cpu_cost_table
126 const struct alu_cost_table alu
;
127 const struct mult_cost_table mult
[2]; /* SImode and DImode. */
128 const struct mem_cost_table ldst
;
129 const struct fp_cost_table fp
[2]; /* SFmode and DFmode. */
130 const struct vector_cost_table vect
;
134 #endif /* GCC_AARCH_COMMON_PROTOS_H */