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[official-gcc.git] / gcc / caller-save.c
blob0bc0681f3a1953d700fe22beeee9d2a984005458
1 /* Save and restore call-clobbered registers which are live across a call.
2 Copyright (C) 1989-2015 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 #include "config.h"
21 #include "system.h"
22 #include "coretypes.h"
23 #include "backend.h"
24 #include "predict.h"
25 #include "tree.h"
26 #include "rtl.h"
27 #include "df.h"
28 #include "regs.h"
29 #include "insn-config.h"
30 #include "flags.h"
31 #include "recog.h"
32 #include "reload.h"
33 #include "alias.h"
34 #include "expmed.h"
35 #include "dojump.h"
36 #include "explow.h"
37 #include "calls.h"
38 #include "emit-rtl.h"
39 #include "varasm.h"
40 #include "stmt.h"
41 #include "expr.h"
42 #include "diagnostic-core.h"
43 #include "tm_p.h"
44 #include "addresses.h"
45 #include "dumpfile.h"
46 #include "rtl-iter.h"
48 #define MOVE_MAX_WORDS (MOVE_MAX / UNITS_PER_WORD)
50 #define regno_save_mode \
51 (this_target_reload->x_regno_save_mode)
52 #define cached_reg_save_code \
53 (this_target_reload->x_cached_reg_save_code)
54 #define cached_reg_restore_code \
55 (this_target_reload->x_cached_reg_restore_code)
57 /* For each hard register, a place on the stack where it can be saved,
58 if needed. */
60 static rtx
61 regno_save_mem[FIRST_PSEUDO_REGISTER][MAX_MOVE_MAX / MIN_UNITS_PER_WORD + 1];
63 /* The number of elements in the subsequent array. */
64 static int save_slots_num;
66 /* Allocated slots so far. */
67 static rtx save_slots[FIRST_PSEUDO_REGISTER];
69 /* Set of hard regs currently residing in save area (during insn scan). */
71 static HARD_REG_SET hard_regs_saved;
73 /* Number of registers currently in hard_regs_saved. */
75 static int n_regs_saved;
77 /* Computed by mark_referenced_regs, all regs referenced in a given
78 insn. */
79 static HARD_REG_SET referenced_regs;
82 typedef void refmarker_fn (rtx *loc, machine_mode mode, int hardregno,
83 void *mark_arg);
85 static int reg_save_code (int, machine_mode);
86 static int reg_restore_code (int, machine_mode);
88 struct saved_hard_reg;
89 static void initiate_saved_hard_regs (void);
90 static void new_saved_hard_reg (int, int);
91 static void finish_saved_hard_regs (void);
92 static int saved_hard_reg_compare_func (const void *, const void *);
94 static void mark_set_regs (rtx, const_rtx, void *);
95 static void mark_referenced_regs (rtx *, refmarker_fn *mark, void *mark_arg);
96 static refmarker_fn mark_reg_as_referenced;
97 static refmarker_fn replace_reg_with_saved_mem;
98 static int insert_save (struct insn_chain *, int, int, HARD_REG_SET *,
99 machine_mode *);
100 static int insert_restore (struct insn_chain *, int, int, int,
101 machine_mode *);
102 static struct insn_chain *insert_one_insn (struct insn_chain *, int, int,
103 rtx);
104 static void add_stored_regs (rtx, const_rtx, void *);
108 static GTY(()) rtx savepat;
109 static GTY(()) rtx restpat;
110 static GTY(()) rtx test_reg;
111 static GTY(()) rtx test_mem;
112 static GTY(()) rtx_insn *saveinsn;
113 static GTY(()) rtx_insn *restinsn;
115 /* Return the INSN_CODE used to save register REG in mode MODE. */
116 static int
117 reg_save_code (int reg, machine_mode mode)
119 bool ok;
120 if (cached_reg_save_code[reg][mode])
121 return cached_reg_save_code[reg][mode];
122 if (!HARD_REGNO_MODE_OK (reg, mode))
124 /* Depending on how HARD_REGNO_MODE_OK is defined, range propagation
125 might deduce here that reg >= FIRST_PSEUDO_REGISTER. So the assert
126 below silences a warning. */
127 gcc_assert (reg < FIRST_PSEUDO_REGISTER);
128 cached_reg_save_code[reg][mode] = -1;
129 cached_reg_restore_code[reg][mode] = -1;
130 return -1;
133 /* Update the register number and modes of the register
134 and memory operand. */
135 set_mode_and_regno (test_reg, mode, reg);
136 PUT_MODE (test_mem, mode);
138 /* Force re-recognition of the modified insns. */
139 INSN_CODE (saveinsn) = -1;
140 INSN_CODE (restinsn) = -1;
142 cached_reg_save_code[reg][mode] = recog_memoized (saveinsn);
143 cached_reg_restore_code[reg][mode] = recog_memoized (restinsn);
145 /* Now extract both insns and see if we can meet their
146 constraints. We don't know here whether the save and restore will
147 be in size- or speed-tuned code, so just use the set of enabled
148 alternatives. */
149 ok = (cached_reg_save_code[reg][mode] != -1
150 && cached_reg_restore_code[reg][mode] != -1);
151 if (ok)
153 extract_insn (saveinsn);
154 ok = constrain_operands (1, get_enabled_alternatives (saveinsn));
155 extract_insn (restinsn);
156 ok &= constrain_operands (1, get_enabled_alternatives (restinsn));
159 if (! ok)
161 cached_reg_save_code[reg][mode] = -1;
162 cached_reg_restore_code[reg][mode] = -1;
164 gcc_assert (cached_reg_save_code[reg][mode]);
165 return cached_reg_save_code[reg][mode];
168 /* Return the INSN_CODE used to restore register REG in mode MODE. */
169 static int
170 reg_restore_code (int reg, machine_mode mode)
172 if (cached_reg_restore_code[reg][mode])
173 return cached_reg_restore_code[reg][mode];
174 /* Populate our cache. */
175 reg_save_code (reg, mode);
176 return cached_reg_restore_code[reg][mode];
179 /* Initialize for caller-save.
181 Look at all the hard registers that are used by a call and for which
182 reginfo.c has not already excluded from being used across a call.
184 Ensure that we can find a mode to save the register and that there is a
185 simple insn to save and restore the register. This latter check avoids
186 problems that would occur if we tried to save the MQ register of some
187 machines directly into memory. */
189 void
190 init_caller_save (void)
192 rtx addr_reg;
193 int offset;
194 rtx address;
195 int i, j;
197 if (caller_save_initialized_p)
198 return;
200 caller_save_initialized_p = true;
202 CLEAR_HARD_REG_SET (no_caller_save_reg_set);
203 /* First find all the registers that we need to deal with and all
204 the modes that they can have. If we can't find a mode to use,
205 we can't have the register live over calls. */
207 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
209 if (call_used_regs[i]
210 && !TEST_HARD_REG_BIT (call_fixed_reg_set, i))
212 for (j = 1; j <= MOVE_MAX_WORDS; j++)
214 regno_save_mode[i][j] = HARD_REGNO_CALLER_SAVE_MODE (i, j,
215 VOIDmode);
216 if (regno_save_mode[i][j] == VOIDmode && j == 1)
218 SET_HARD_REG_BIT (call_fixed_reg_set, i);
222 else
223 regno_save_mode[i][1] = VOIDmode;
226 /* The following code tries to approximate the conditions under which
227 we can easily save and restore a register without scratch registers or
228 other complexities. It will usually work, except under conditions where
229 the validity of an insn operand is dependent on the address offset.
230 No such cases are currently known.
232 We first find a typical offset from some BASE_REG_CLASS register.
233 This address is chosen by finding the first register in the class
234 and by finding the smallest power of two that is a valid offset from
235 that register in every mode we will use to save registers. */
237 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
238 if (TEST_HARD_REG_BIT
239 (reg_class_contents
240 [(int) base_reg_class (regno_save_mode[i][1], ADDR_SPACE_GENERIC,
241 PLUS, CONST_INT)], i))
242 break;
244 gcc_assert (i < FIRST_PSEUDO_REGISTER);
246 addr_reg = gen_rtx_REG (Pmode, i);
248 for (offset = 1 << (HOST_BITS_PER_INT / 2); offset; offset >>= 1)
250 address = gen_rtx_PLUS (Pmode, addr_reg, gen_int_mode (offset, Pmode));
252 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
253 if (regno_save_mode[i][1] != VOIDmode
254 && ! strict_memory_address_p (regno_save_mode[i][1], address))
255 break;
257 if (i == FIRST_PSEUDO_REGISTER)
258 break;
261 /* If we didn't find a valid address, we must use register indirect. */
262 if (offset == 0)
263 address = addr_reg;
265 /* Next we try to form an insn to save and restore the register. We
266 see if such an insn is recognized and meets its constraints.
268 To avoid lots of unnecessary RTL allocation, we construct all the RTL
269 once, then modify the memory and register operands in-place. */
271 test_reg = gen_rtx_REG (word_mode, LAST_VIRTUAL_REGISTER + 1);
272 test_mem = gen_rtx_MEM (word_mode, address);
273 savepat = gen_rtx_SET (test_mem, test_reg);
274 restpat = gen_rtx_SET (test_reg, test_mem);
276 saveinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, savepat, 0, -1, 0);
277 restinsn = gen_rtx_INSN (VOIDmode, 0, 0, 0, restpat, 0, -1, 0);
279 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
280 for (j = 1; j <= MOVE_MAX_WORDS; j++)
281 if (reg_save_code (i,regno_save_mode[i][j]) == -1)
283 regno_save_mode[i][j] = VOIDmode;
284 if (j == 1)
286 SET_HARD_REG_BIT (call_fixed_reg_set, i);
287 if (call_used_regs[i])
288 SET_HARD_REG_BIT (no_caller_save_reg_set, i);
295 /* Initialize save areas by showing that we haven't allocated any yet. */
297 void
298 init_save_areas (void)
300 int i, j;
302 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
303 for (j = 1; j <= MOVE_MAX_WORDS; j++)
304 regno_save_mem[i][j] = 0;
305 save_slots_num = 0;
309 /* The structure represents a hard register which should be saved
310 through the call. It is used when the integrated register
311 allocator (IRA) is used and sharing save slots is on. */
312 struct saved_hard_reg
314 /* Order number starting with 0. */
315 int num;
316 /* The hard regno. */
317 int hard_regno;
318 /* Execution frequency of all calls through which given hard
319 register should be saved. */
320 int call_freq;
321 /* Stack slot reserved to save the hard register through calls. */
322 rtx slot;
323 /* True if it is first hard register in the chain of hard registers
324 sharing the same stack slot. */
325 int first_p;
326 /* Order number of the next hard register structure with the same
327 slot in the chain. -1 represents end of the chain. */
328 int next;
331 /* Map: hard register number to the corresponding structure. */
332 static struct saved_hard_reg *hard_reg_map[FIRST_PSEUDO_REGISTER];
334 /* The number of all structures representing hard registers should be
335 saved, in order words, the number of used elements in the following
336 array. */
337 static int saved_regs_num;
339 /* Pointers to all the structures. Index is the order number of the
340 corresponding structure. */
341 static struct saved_hard_reg *all_saved_regs[FIRST_PSEUDO_REGISTER];
343 /* First called function for work with saved hard registers. */
344 static void
345 initiate_saved_hard_regs (void)
347 int i;
349 saved_regs_num = 0;
350 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
351 hard_reg_map[i] = NULL;
354 /* Allocate and return new saved hard register with given REGNO and
355 CALL_FREQ. */
356 static void
357 new_saved_hard_reg (int regno, int call_freq)
359 struct saved_hard_reg *saved_reg;
361 saved_reg
362 = (struct saved_hard_reg *) xmalloc (sizeof (struct saved_hard_reg));
363 hard_reg_map[regno] = all_saved_regs[saved_regs_num] = saved_reg;
364 saved_reg->num = saved_regs_num++;
365 saved_reg->hard_regno = regno;
366 saved_reg->call_freq = call_freq;
367 saved_reg->first_p = FALSE;
368 saved_reg->next = -1;
371 /* Free memory allocated for the saved hard registers. */
372 static void
373 finish_saved_hard_regs (void)
375 int i;
377 for (i = 0; i < saved_regs_num; i++)
378 free (all_saved_regs[i]);
381 /* The function is used to sort the saved hard register structures
382 according their frequency. */
383 static int
384 saved_hard_reg_compare_func (const void *v1p, const void *v2p)
386 const struct saved_hard_reg *p1 = *(struct saved_hard_reg * const *) v1p;
387 const struct saved_hard_reg *p2 = *(struct saved_hard_reg * const *) v2p;
389 if (flag_omit_frame_pointer)
391 if (p1->call_freq - p2->call_freq != 0)
392 return p1->call_freq - p2->call_freq;
394 else if (p2->call_freq - p1->call_freq != 0)
395 return p2->call_freq - p1->call_freq;
397 return p1->num - p2->num;
400 /* Allocate save areas for any hard registers that might need saving.
401 We take a conservative approach here and look for call-clobbered hard
402 registers that are assigned to pseudos that cross calls. This may
403 overestimate slightly (especially if some of these registers are later
404 used as spill registers), but it should not be significant.
406 For IRA we use priority coloring to decrease stack slots needed for
407 saving hard registers through calls. We build conflicts for them
408 to do coloring.
410 Future work:
412 In the fallback case we should iterate backwards across all possible
413 modes for the save, choosing the largest available one instead of
414 falling back to the smallest mode immediately. (eg TF -> DF -> SF).
416 We do not try to use "move multiple" instructions that exist
417 on some machines (such as the 68k moveml). It could be a win to try
418 and use them when possible. The hard part is doing it in a way that is
419 machine independent since they might be saving non-consecutive
420 registers. (imagine caller-saving d0,d1,a0,a1 on the 68k) */
422 void
423 setup_save_areas (void)
425 int i, j, k, freq;
426 HARD_REG_SET hard_regs_used;
427 struct saved_hard_reg *saved_reg;
428 rtx_insn *insn;
429 struct insn_chain *chain, *next;
430 unsigned int regno;
431 HARD_REG_SET hard_regs_to_save, used_regs, this_insn_sets;
432 reg_set_iterator rsi;
434 CLEAR_HARD_REG_SET (hard_regs_used);
436 /* Find every CALL_INSN and record which hard regs are live across the
437 call into HARD_REG_MAP and HARD_REGS_USED. */
438 initiate_saved_hard_regs ();
439 /* Create hard reg saved regs. */
440 for (chain = reload_insn_chain; chain != 0; chain = next)
442 rtx cheap;
444 insn = chain->insn;
445 next = chain->next;
446 if (!CALL_P (insn)
447 || find_reg_note (insn, REG_NORETURN, NULL))
448 continue;
449 freq = REG_FREQ_FROM_BB (BLOCK_FOR_INSN (insn));
450 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
451 &chain->live_throughout);
452 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
454 /* Record all registers set in this call insn. These don't
455 need to be saved. N.B. the call insn might set a subreg
456 of a multi-hard-reg pseudo; then the pseudo is considered
457 live during the call, but the subreg that is set
458 isn't. */
459 CLEAR_HARD_REG_SET (this_insn_sets);
460 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
461 /* Sibcalls are considered to set the return value. */
462 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
463 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
465 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
466 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
467 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
468 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
469 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
471 if (hard_reg_map[regno] != NULL)
472 hard_reg_map[regno]->call_freq += freq;
473 else
474 new_saved_hard_reg (regno, freq);
475 SET_HARD_REG_BIT (hard_regs_used, regno);
477 cheap = find_reg_note (insn, REG_RETURNED, NULL);
478 if (cheap)
479 cheap = XEXP (cheap, 0);
480 /* Look through all live pseudos, mark their hard registers. */
481 EXECUTE_IF_SET_IN_REG_SET
482 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
484 int r = reg_renumber[regno];
485 int bound;
487 if (r < 0 || regno_reg_rtx[regno] == cheap)
488 continue;
490 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
491 for (; r < bound; r++)
492 if (TEST_HARD_REG_BIT (used_regs, r))
494 if (hard_reg_map[r] != NULL)
495 hard_reg_map[r]->call_freq += freq;
496 else
497 new_saved_hard_reg (r, freq);
498 SET_HARD_REG_BIT (hard_regs_to_save, r);
499 SET_HARD_REG_BIT (hard_regs_used, r);
504 /* If requested, figure out which hard regs can share save slots. */
505 if (optimize && flag_ira_share_save_slots)
507 rtx slot;
508 char *saved_reg_conflicts;
509 int next_k;
510 struct saved_hard_reg *saved_reg2, *saved_reg3;
511 int call_saved_regs_num;
512 struct saved_hard_reg *call_saved_regs[FIRST_PSEUDO_REGISTER];
513 int best_slot_num;
514 int prev_save_slots_num;
515 rtx prev_save_slots[FIRST_PSEUDO_REGISTER];
517 /* Find saved hard register conflicts. */
518 saved_reg_conflicts = (char *) xmalloc (saved_regs_num * saved_regs_num);
519 memset (saved_reg_conflicts, 0, saved_regs_num * saved_regs_num);
520 for (chain = reload_insn_chain; chain != 0; chain = next)
522 rtx cheap;
523 call_saved_regs_num = 0;
524 insn = chain->insn;
525 next = chain->next;
526 if (!CALL_P (insn)
527 || find_reg_note (insn, REG_NORETURN, NULL))
528 continue;
530 cheap = find_reg_note (insn, REG_RETURNED, NULL);
531 if (cheap)
532 cheap = XEXP (cheap, 0);
534 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
535 &chain->live_throughout);
536 get_call_reg_set_usage (insn, &used_regs, call_used_reg_set);
538 /* Record all registers set in this call insn. These don't
539 need to be saved. N.B. the call insn might set a subreg
540 of a multi-hard-reg pseudo; then the pseudo is considered
541 live during the call, but the subreg that is set
542 isn't. */
543 CLEAR_HARD_REG_SET (this_insn_sets);
544 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
545 /* Sibcalls are considered to set the return value,
546 compare df-scan.c:df_get_call_refs. */
547 if (SIBLING_CALL_P (insn) && crtl->return_rtx)
548 mark_set_regs (crtl->return_rtx, NULL_RTX, &this_insn_sets);
550 AND_COMPL_HARD_REG_SET (used_regs, call_fixed_reg_set);
551 AND_COMPL_HARD_REG_SET (used_regs, this_insn_sets);
552 AND_HARD_REG_SET (hard_regs_to_save, used_regs);
553 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
554 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
556 gcc_assert (hard_reg_map[regno] != NULL);
557 call_saved_regs[call_saved_regs_num++] = hard_reg_map[regno];
559 /* Look through all live pseudos, mark their hard registers. */
560 EXECUTE_IF_SET_IN_REG_SET
561 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
563 int r = reg_renumber[regno];
564 int bound;
566 if (r < 0 || regno_reg_rtx[regno] == cheap)
567 continue;
569 bound = r + hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
570 for (; r < bound; r++)
571 if (TEST_HARD_REG_BIT (used_regs, r))
572 call_saved_regs[call_saved_regs_num++] = hard_reg_map[r];
574 for (i = 0; i < call_saved_regs_num; i++)
576 saved_reg = call_saved_regs[i];
577 for (j = 0; j < call_saved_regs_num; j++)
578 if (i != j)
580 saved_reg2 = call_saved_regs[j];
581 saved_reg_conflicts[saved_reg->num * saved_regs_num
582 + saved_reg2->num]
583 = saved_reg_conflicts[saved_reg2->num * saved_regs_num
584 + saved_reg->num]
585 = TRUE;
589 /* Sort saved hard regs. */
590 qsort (all_saved_regs, saved_regs_num, sizeof (struct saved_hard_reg *),
591 saved_hard_reg_compare_func);
592 /* Initiate slots available from the previous reload
593 iteration. */
594 prev_save_slots_num = save_slots_num;
595 memcpy (prev_save_slots, save_slots, save_slots_num * sizeof (rtx));
596 save_slots_num = 0;
597 /* Allocate stack slots for the saved hard registers. */
598 for (i = 0; i < saved_regs_num; i++)
600 saved_reg = all_saved_regs[i];
601 regno = saved_reg->hard_regno;
602 for (j = 0; j < i; j++)
604 saved_reg2 = all_saved_regs[j];
605 if (! saved_reg2->first_p)
606 continue;
607 slot = saved_reg2->slot;
608 for (k = j; k >= 0; k = next_k)
610 saved_reg3 = all_saved_regs[k];
611 next_k = saved_reg3->next;
612 if (saved_reg_conflicts[saved_reg->num * saved_regs_num
613 + saved_reg3->num])
614 break;
616 if (k < 0
617 && (GET_MODE_SIZE (regno_save_mode[regno][1])
618 <= GET_MODE_SIZE (regno_save_mode
619 [saved_reg2->hard_regno][1])))
621 saved_reg->slot
622 = adjust_address_nv
623 (slot, regno_save_mode[saved_reg->hard_regno][1], 0);
624 regno_save_mem[regno][1] = saved_reg->slot;
625 saved_reg->next = saved_reg2->next;
626 saved_reg2->next = i;
627 if (dump_file != NULL)
628 fprintf (dump_file, "%d uses slot of %d\n",
629 regno, saved_reg2->hard_regno);
630 break;
633 if (j == i)
635 saved_reg->first_p = TRUE;
636 for (best_slot_num = -1, j = 0; j < prev_save_slots_num; j++)
638 slot = prev_save_slots[j];
639 if (slot == NULL_RTX)
640 continue;
641 if (GET_MODE_SIZE (regno_save_mode[regno][1])
642 <= GET_MODE_SIZE (GET_MODE (slot))
643 && best_slot_num < 0)
644 best_slot_num = j;
645 if (GET_MODE (slot) == regno_save_mode[regno][1])
646 break;
648 if (best_slot_num >= 0)
650 saved_reg->slot = prev_save_slots[best_slot_num];
651 saved_reg->slot
652 = adjust_address_nv
653 (saved_reg->slot,
654 regno_save_mode[saved_reg->hard_regno][1], 0);
655 if (dump_file != NULL)
656 fprintf (dump_file,
657 "%d uses a slot from prev iteration\n", regno);
658 prev_save_slots[best_slot_num] = NULL_RTX;
659 if (best_slot_num + 1 == prev_save_slots_num)
660 prev_save_slots_num--;
662 else
664 saved_reg->slot
665 = assign_stack_local_1
666 (regno_save_mode[regno][1],
667 GET_MODE_SIZE (regno_save_mode[regno][1]), 0,
668 ASLK_REDUCE_ALIGN);
669 if (dump_file != NULL)
670 fprintf (dump_file, "%d uses a new slot\n", regno);
672 regno_save_mem[regno][1] = saved_reg->slot;
673 save_slots[save_slots_num++] = saved_reg->slot;
676 free (saved_reg_conflicts);
677 finish_saved_hard_regs ();
679 else
681 /* We are not sharing slots.
683 Run through all the call-used hard-registers and allocate
684 space for each in the caller-save area. Try to allocate space
685 in a manner which allows multi-register saves/restores to be done. */
687 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
688 for (j = MOVE_MAX_WORDS; j > 0; j--)
690 int do_save = 1;
692 /* If no mode exists for this size, try another. Also break out
693 if we have already saved this hard register. */
694 if (regno_save_mode[i][j] == VOIDmode || regno_save_mem[i][1] != 0)
695 continue;
697 /* See if any register in this group has been saved. */
698 for (k = 0; k < j; k++)
699 if (regno_save_mem[i + k][1])
701 do_save = 0;
702 break;
704 if (! do_save)
705 continue;
707 for (k = 0; k < j; k++)
708 if (! TEST_HARD_REG_BIT (hard_regs_used, i + k))
710 do_save = 0;
711 break;
713 if (! do_save)
714 continue;
716 /* We have found an acceptable mode to store in. Since
717 hard register is always saved in the widest mode
718 available, the mode may be wider than necessary, it is
719 OK to reduce the alignment of spill space. We will
720 verify that it is equal to or greater than required
721 when we restore and save the hard register in
722 insert_restore and insert_save. */
723 regno_save_mem[i][j]
724 = assign_stack_local_1 (regno_save_mode[i][j],
725 GET_MODE_SIZE (regno_save_mode[i][j]),
726 0, ASLK_REDUCE_ALIGN);
728 /* Setup single word save area just in case... */
729 for (k = 0; k < j; k++)
730 /* This should not depend on WORDS_BIG_ENDIAN.
731 The order of words in regs is the same as in memory. */
732 regno_save_mem[i + k][1]
733 = adjust_address_nv (regno_save_mem[i][j],
734 regno_save_mode[i + k][1],
735 k * UNITS_PER_WORD);
739 /* Now loop again and set the alias set of any save areas we made to
740 the alias set used to represent frame objects. */
741 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
742 for (j = MOVE_MAX_WORDS; j > 0; j--)
743 if (regno_save_mem[i][j] != 0)
744 set_mem_alias_set (regno_save_mem[i][j], get_frame_alias_set ());
749 /* Find the places where hard regs are live across calls and save them. */
751 void
752 save_call_clobbered_regs (void)
754 struct insn_chain *chain, *next, *last = NULL;
755 machine_mode save_mode [FIRST_PSEUDO_REGISTER];
757 /* Computed in mark_set_regs, holds all registers set by the current
758 instruction. */
759 HARD_REG_SET this_insn_sets;
761 CLEAR_HARD_REG_SET (hard_regs_saved);
762 n_regs_saved = 0;
764 for (chain = reload_insn_chain; chain != 0; chain = next)
766 rtx_insn *insn = chain->insn;
767 enum rtx_code code = GET_CODE (insn);
769 next = chain->next;
771 gcc_assert (!chain->is_caller_save_insn);
773 if (NONDEBUG_INSN_P (insn))
775 /* If some registers have been saved, see if INSN references
776 any of them. We must restore them before the insn if so. */
778 if (n_regs_saved)
780 int regno;
781 HARD_REG_SET this_insn_sets;
783 if (code == JUMP_INSN)
784 /* Restore all registers if this is a JUMP_INSN. */
785 COPY_HARD_REG_SET (referenced_regs, hard_regs_saved);
786 else
788 CLEAR_HARD_REG_SET (referenced_regs);
789 mark_referenced_regs (&PATTERN (insn),
790 mark_reg_as_referenced, NULL);
791 AND_HARD_REG_SET (referenced_regs, hard_regs_saved);
794 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
795 if (TEST_HARD_REG_BIT (referenced_regs, regno))
796 regno += insert_restore (chain, 1, regno, MOVE_MAX_WORDS,
797 save_mode);
798 /* If a saved register is set after the call, this means we no
799 longer should restore it. This can happen when parts of a
800 multi-word pseudo do not conflict with other pseudos, so
801 IRA may allocate the same hard register for both. One may
802 be live across the call, while the other is set
803 afterwards. */
804 CLEAR_HARD_REG_SET (this_insn_sets);
805 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
806 AND_COMPL_HARD_REG_SET (hard_regs_saved, this_insn_sets);
809 if (code == CALL_INSN
810 && ! SIBLING_CALL_P (insn)
811 && ! find_reg_note (insn, REG_NORETURN, NULL))
813 unsigned regno;
814 HARD_REG_SET hard_regs_to_save;
815 HARD_REG_SET call_def_reg_set;
816 reg_set_iterator rsi;
817 rtx cheap;
819 cheap = find_reg_note (insn, REG_RETURNED, NULL);
820 if (cheap)
821 cheap = XEXP (cheap, 0);
823 /* Use the register life information in CHAIN to compute which
824 regs are live during the call. */
825 REG_SET_TO_HARD_REG_SET (hard_regs_to_save,
826 &chain->live_throughout);
827 /* Save hard registers always in the widest mode available. */
828 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
829 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
830 save_mode [regno] = regno_save_mode [regno][1];
831 else
832 save_mode [regno] = VOIDmode;
834 /* Look through all live pseudos, mark their hard registers
835 and choose proper mode for saving. */
836 EXECUTE_IF_SET_IN_REG_SET
837 (&chain->live_throughout, FIRST_PSEUDO_REGISTER, regno, rsi)
839 int r = reg_renumber[regno];
840 int nregs;
841 machine_mode mode;
843 if (r < 0 || regno_reg_rtx[regno] == cheap)
844 continue;
845 nregs = hard_regno_nregs[r][PSEUDO_REGNO_MODE (regno)];
846 mode = HARD_REGNO_CALLER_SAVE_MODE
847 (r, nregs, PSEUDO_REGNO_MODE (regno));
848 if (GET_MODE_BITSIZE (mode)
849 > GET_MODE_BITSIZE (save_mode[r]))
850 save_mode[r] = mode;
851 while (nregs-- > 0)
852 SET_HARD_REG_BIT (hard_regs_to_save, r + nregs);
855 /* Record all registers set in this call insn. These don't need
856 to be saved. N.B. the call insn might set a subreg of a
857 multi-hard-reg pseudo; then the pseudo is considered live
858 during the call, but the subreg that is set isn't. */
859 CLEAR_HARD_REG_SET (this_insn_sets);
860 note_stores (PATTERN (insn), mark_set_regs, &this_insn_sets);
862 /* Compute which hard regs must be saved before this call. */
863 AND_COMPL_HARD_REG_SET (hard_regs_to_save, call_fixed_reg_set);
864 AND_COMPL_HARD_REG_SET (hard_regs_to_save, this_insn_sets);
865 AND_COMPL_HARD_REG_SET (hard_regs_to_save, hard_regs_saved);
866 get_call_reg_set_usage (insn, &call_def_reg_set,
867 call_used_reg_set);
868 AND_HARD_REG_SET (hard_regs_to_save, call_def_reg_set);
870 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
871 if (TEST_HARD_REG_BIT (hard_regs_to_save, regno))
872 regno += insert_save (chain, 1, regno, &hard_regs_to_save, save_mode);
874 /* Must recompute n_regs_saved. */
875 n_regs_saved = 0;
876 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
877 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
878 n_regs_saved++;
880 if (cheap
881 && HARD_REGISTER_P (cheap)
882 && TEST_HARD_REG_BIT (call_used_reg_set, REGNO (cheap)))
884 rtx dest, newpat;
885 rtx pat = PATTERN (insn);
886 if (GET_CODE (pat) == PARALLEL)
887 pat = XVECEXP (pat, 0, 0);
888 dest = SET_DEST (pat);
889 /* For multiple return values dest is PARALLEL.
890 Currently we handle only single return value case. */
891 if (REG_P (dest))
893 newpat = gen_rtx_SET (cheap, copy_rtx (dest));
894 chain = insert_one_insn (chain, 0, -1, newpat);
898 last = chain;
900 else if (DEBUG_INSN_P (insn) && n_regs_saved)
901 mark_referenced_regs (&PATTERN (insn),
902 replace_reg_with_saved_mem,
903 save_mode);
905 if (chain->next == 0 || chain->next->block != chain->block)
907 int regno;
908 /* At the end of the basic block, we must restore any registers that
909 remain saved. If the last insn in the block is a JUMP_INSN, put
910 the restore before the insn, otherwise, put it after the insn. */
912 if (n_regs_saved
913 && DEBUG_INSN_P (insn)
914 && last
915 && last->block == chain->block)
917 rtx_insn *ins, *prev;
918 basic_block bb = BLOCK_FOR_INSN (insn);
920 /* When adding hard reg restores after a DEBUG_INSN, move
921 all notes between last real insn and this DEBUG_INSN after
922 the DEBUG_INSN, otherwise we could get code
923 -g/-g0 differences. */
924 for (ins = PREV_INSN (insn); ins != last->insn; ins = prev)
926 prev = PREV_INSN (ins);
927 if (NOTE_P (ins))
929 SET_NEXT_INSN (prev) = NEXT_INSN (ins);
930 SET_PREV_INSN (NEXT_INSN (ins)) = prev;
931 SET_PREV_INSN (ins) = insn;
932 SET_NEXT_INSN (ins) = NEXT_INSN (insn);
933 SET_NEXT_INSN (insn) = ins;
934 if (NEXT_INSN (ins))
935 SET_PREV_INSN (NEXT_INSN (ins)) = ins;
936 if (BB_END (bb) == insn)
937 BB_END (bb) = ins;
939 else
940 gcc_assert (DEBUG_INSN_P (ins));
943 last = NULL;
945 if (n_regs_saved)
946 for (regno = 0; regno < FIRST_PSEUDO_REGISTER; regno++)
947 if (TEST_HARD_REG_BIT (hard_regs_saved, regno))
948 regno += insert_restore (chain, JUMP_P (insn),
949 regno, MOVE_MAX_WORDS, save_mode);
954 /* Here from note_stores, or directly from save_call_clobbered_regs, when
955 an insn stores a value in a register.
956 Set the proper bit or bits in this_insn_sets. All pseudos that have
957 been assigned hard regs have had their register number changed already,
958 so we can ignore pseudos. */
959 static void
960 mark_set_regs (rtx reg, const_rtx setter ATTRIBUTE_UNUSED, void *data)
962 int regno, endregno, i;
963 HARD_REG_SET *this_insn_sets = (HARD_REG_SET *) data;
965 if (GET_CODE (reg) == SUBREG)
967 rtx inner = SUBREG_REG (reg);
968 if (!REG_P (inner) || REGNO (inner) >= FIRST_PSEUDO_REGISTER)
969 return;
970 regno = subreg_regno (reg);
971 endregno = regno + subreg_nregs (reg);
973 else if (REG_P (reg)
974 && REGNO (reg) < FIRST_PSEUDO_REGISTER)
976 regno = REGNO (reg);
977 endregno = END_REGNO (reg);
979 else
980 return;
982 for (i = regno; i < endregno; i++)
983 SET_HARD_REG_BIT (*this_insn_sets, i);
986 /* Here from note_stores when an insn stores a value in a register.
987 Set the proper bit or bits in the passed regset. All pseudos that have
988 been assigned hard regs have had their register number changed already,
989 so we can ignore pseudos. */
990 static void
991 add_stored_regs (rtx reg, const_rtx setter, void *data)
993 int regno, endregno, i;
994 machine_mode mode = GET_MODE (reg);
995 int offset = 0;
997 if (GET_CODE (setter) == CLOBBER)
998 return;
1000 if (GET_CODE (reg) == SUBREG
1001 && REG_P (SUBREG_REG (reg))
1002 && REGNO (SUBREG_REG (reg)) < FIRST_PSEUDO_REGISTER)
1004 offset = subreg_regno_offset (REGNO (SUBREG_REG (reg)),
1005 GET_MODE (SUBREG_REG (reg)),
1006 SUBREG_BYTE (reg),
1007 GET_MODE (reg));
1008 regno = REGNO (SUBREG_REG (reg)) + offset;
1009 endregno = regno + subreg_nregs (reg);
1011 else
1013 if (!REG_P (reg) || REGNO (reg) >= FIRST_PSEUDO_REGISTER)
1014 return;
1016 regno = REGNO (reg) + offset;
1017 endregno = end_hard_regno (mode, regno);
1020 for (i = regno; i < endregno; i++)
1021 SET_REGNO_REG_SET ((regset) data, i);
1024 /* Walk X and record all referenced registers in REFERENCED_REGS. */
1025 static void
1026 mark_referenced_regs (rtx *loc, refmarker_fn *mark, void *arg)
1028 enum rtx_code code = GET_CODE (*loc);
1029 const char *fmt;
1030 int i, j;
1032 if (code == SET)
1033 mark_referenced_regs (&SET_SRC (*loc), mark, arg);
1034 if (code == SET || code == CLOBBER)
1036 loc = &SET_DEST (*loc);
1037 code = GET_CODE (*loc);
1038 if ((code == REG && REGNO (*loc) < FIRST_PSEUDO_REGISTER)
1039 || code == PC || code == CC0
1040 || (code == SUBREG && REG_P (SUBREG_REG (*loc))
1041 && REGNO (SUBREG_REG (*loc)) < FIRST_PSEUDO_REGISTER
1042 /* If we're setting only part of a multi-word register,
1043 we shall mark it as referenced, because the words
1044 that are not being set should be restored. */
1045 && ((GET_MODE_SIZE (GET_MODE (*loc))
1046 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc))))
1047 || (GET_MODE_SIZE (GET_MODE (SUBREG_REG (*loc)))
1048 <= UNITS_PER_WORD))))
1049 return;
1051 if (code == MEM || code == SUBREG)
1053 loc = &XEXP (*loc, 0);
1054 code = GET_CODE (*loc);
1057 if (code == REG)
1059 int regno = REGNO (*loc);
1060 int hardregno = (regno < FIRST_PSEUDO_REGISTER ? regno
1061 : reg_renumber[regno]);
1063 if (hardregno >= 0)
1064 mark (loc, GET_MODE (*loc), hardregno, arg);
1065 else if (arg)
1066 /* ??? Will we ever end up with an equiv expression in a debug
1067 insn, that would have required restoring a reg, or will
1068 reload take care of it for us? */
1069 return;
1070 /* If this is a pseudo that did not get a hard register, scan its
1071 memory location, since it might involve the use of another
1072 register, which might be saved. */
1073 else if (reg_equiv_mem (regno) != 0)
1074 mark_referenced_regs (&XEXP (reg_equiv_mem (regno), 0), mark, arg);
1075 else if (reg_equiv_address (regno) != 0)
1076 mark_referenced_regs (&reg_equiv_address (regno), mark, arg);
1077 return;
1080 fmt = GET_RTX_FORMAT (code);
1081 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1083 if (fmt[i] == 'e')
1084 mark_referenced_regs (&XEXP (*loc, i), mark, arg);
1085 else if (fmt[i] == 'E')
1086 for (j = XVECLEN (*loc, i) - 1; j >= 0; j--)
1087 mark_referenced_regs (&XVECEXP (*loc, i, j), mark, arg);
1091 /* Parameter function for mark_referenced_regs() that adds registers
1092 present in the insn and in equivalent mems and addresses to
1093 referenced_regs. */
1095 static void
1096 mark_reg_as_referenced (rtx *loc ATTRIBUTE_UNUSED,
1097 machine_mode mode,
1098 int hardregno,
1099 void *arg ATTRIBUTE_UNUSED)
1101 add_to_hard_reg_set (&referenced_regs, mode, hardregno);
1104 /* Parameter function for mark_referenced_regs() that replaces
1105 registers referenced in a debug_insn that would have been restored,
1106 should it be a non-debug_insn, with their save locations. */
1108 static void
1109 replace_reg_with_saved_mem (rtx *loc,
1110 machine_mode mode,
1111 int regno,
1112 void *arg)
1114 unsigned int i, nregs = hard_regno_nregs [regno][mode];
1115 rtx mem;
1116 machine_mode *save_mode = (machine_mode *)arg;
1118 for (i = 0; i < nregs; i++)
1119 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1120 break;
1122 /* If none of the registers in the range would need restoring, we're
1123 all set. */
1124 if (i == nregs)
1125 return;
1127 while (++i < nregs)
1128 if (!TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1129 break;
1131 if (i == nregs
1132 && regno_save_mem[regno][nregs])
1134 mem = copy_rtx (regno_save_mem[regno][nregs]);
1136 if (nregs == (unsigned int) hard_regno_nregs[regno][save_mode[regno]])
1137 mem = adjust_address_nv (mem, save_mode[regno], 0);
1139 if (GET_MODE (mem) != mode)
1141 /* This is gen_lowpart_if_possible(), but without validating
1142 the newly-formed address. */
1143 int offset = 0;
1145 if (WORDS_BIG_ENDIAN)
1146 offset = (MAX (GET_MODE_SIZE (GET_MODE (mem)), UNITS_PER_WORD)
1147 - MAX (GET_MODE_SIZE (mode), UNITS_PER_WORD));
1148 if (BYTES_BIG_ENDIAN)
1149 /* Adjust the address so that the address-after-the-data is
1150 unchanged. */
1151 offset -= (MIN (UNITS_PER_WORD, GET_MODE_SIZE (mode))
1152 - MIN (UNITS_PER_WORD, GET_MODE_SIZE (GET_MODE (mem))));
1154 mem = adjust_address_nv (mem, mode, offset);
1157 else
1159 mem = gen_rtx_CONCATN (mode, rtvec_alloc (nregs));
1160 for (i = 0; i < nregs; i++)
1161 if (TEST_HARD_REG_BIT (hard_regs_saved, regno + i))
1163 gcc_assert (regno_save_mem[regno + i][1]);
1164 XVECEXP (mem, 0, i) = copy_rtx (regno_save_mem[regno + i][1]);
1166 else
1168 machine_mode smode = save_mode[regno];
1169 gcc_assert (smode != VOIDmode);
1170 if (hard_regno_nregs [regno][smode] > 1)
1171 smode = mode_for_size (GET_MODE_SIZE (mode) / nregs,
1172 GET_MODE_CLASS (mode), 0);
1173 XVECEXP (mem, 0, i) = gen_rtx_REG (smode, regno + i);
1177 gcc_assert (GET_MODE (mem) == mode);
1178 *loc = mem;
1182 /* Insert a sequence of insns to restore. Place these insns in front of
1183 CHAIN if BEFORE_P is nonzero, behind the insn otherwise. MAXRESTORE is
1184 the maximum number of registers which should be restored during this call.
1185 It should never be less than 1 since we only work with entire registers.
1187 Note that we have verified in init_caller_save that we can do this
1188 with a simple SET, so use it. Set INSN_CODE to what we save there
1189 since the address might not be valid so the insn might not be recognized.
1190 These insns will be reloaded and have register elimination done by
1191 find_reload, so we need not worry about that here.
1193 Return the extra number of registers saved. */
1195 static int
1196 insert_restore (struct insn_chain *chain, int before_p, int regno,
1197 int maxrestore, machine_mode *save_mode)
1199 int i, k;
1200 rtx pat = NULL_RTX;
1201 int code;
1202 unsigned int numregs = 0;
1203 struct insn_chain *new_chain;
1204 rtx mem;
1206 /* A common failure mode if register status is not correct in the
1207 RTL is for this routine to be called with a REGNO we didn't
1208 expect to save. That will cause us to write an insn with a (nil)
1209 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1210 later, check for this common case here instead. This will remove
1211 one step in debugging such problems. */
1212 gcc_assert (regno_save_mem[regno][1]);
1214 /* Get the pattern to emit and update our status.
1216 See if we can restore `maxrestore' registers at once. Work
1217 backwards to the single register case. */
1218 for (i = maxrestore; i > 0; i--)
1220 int j;
1221 int ok = 1;
1223 if (regno_save_mem[regno][i] == 0)
1224 continue;
1226 for (j = 0; j < i; j++)
1227 if (! TEST_HARD_REG_BIT (hard_regs_saved, regno + j))
1229 ok = 0;
1230 break;
1232 /* Must do this one restore at a time. */
1233 if (! ok)
1234 continue;
1236 numregs = i;
1237 break;
1240 mem = regno_save_mem [regno][numregs];
1241 if (save_mode [regno] != VOIDmode
1242 && save_mode [regno] != GET_MODE (mem)
1243 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1244 /* Check that insn to restore REGNO in save_mode[regno] is
1245 correct. */
1246 && reg_save_code (regno, save_mode[regno]) >= 0)
1247 mem = adjust_address_nv (mem, save_mode[regno], 0);
1248 else
1249 mem = copy_rtx (mem);
1251 /* Verify that the alignment of spill space is equal to or greater
1252 than required. */
1253 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1254 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1256 pat = gen_rtx_SET (gen_rtx_REG (GET_MODE (mem), regno), mem);
1257 code = reg_restore_code (regno, GET_MODE (mem));
1258 new_chain = insert_one_insn (chain, before_p, code, pat);
1260 /* Clear status for all registers we restored. */
1261 for (k = 0; k < i; k++)
1263 CLEAR_HARD_REG_BIT (hard_regs_saved, regno + k);
1264 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1265 n_regs_saved--;
1268 /* Tell our callers how many extra registers we saved/restored. */
1269 return numregs - 1;
1272 /* Like insert_restore above, but save registers instead. */
1274 static int
1275 insert_save (struct insn_chain *chain, int before_p, int regno,
1276 HARD_REG_SET (*to_save), machine_mode *save_mode)
1278 int i;
1279 unsigned int k;
1280 rtx pat = NULL_RTX;
1281 int code;
1282 unsigned int numregs = 0;
1283 struct insn_chain *new_chain;
1284 rtx mem;
1286 /* A common failure mode if register status is not correct in the
1287 RTL is for this routine to be called with a REGNO we didn't
1288 expect to save. That will cause us to write an insn with a (nil)
1289 SET_DEST or SET_SRC. Instead of doing so and causing a crash
1290 later, check for this common case here. This will remove one
1291 step in debugging such problems. */
1292 gcc_assert (regno_save_mem[regno][1]);
1294 /* Get the pattern to emit and update our status.
1296 See if we can save several registers with a single instruction.
1297 Work backwards to the single register case. */
1298 for (i = MOVE_MAX_WORDS; i > 0; i--)
1300 int j;
1301 int ok = 1;
1302 if (regno_save_mem[regno][i] == 0)
1303 continue;
1305 for (j = 0; j < i; j++)
1306 if (! TEST_HARD_REG_BIT (*to_save, regno + j))
1308 ok = 0;
1309 break;
1311 /* Must do this one save at a time. */
1312 if (! ok)
1313 continue;
1315 numregs = i;
1316 break;
1319 mem = regno_save_mem [regno][numregs];
1320 if (save_mode [regno] != VOIDmode
1321 && save_mode [regno] != GET_MODE (mem)
1322 && numregs == (unsigned int) hard_regno_nregs[regno][save_mode [regno]]
1323 /* Check that insn to save REGNO in save_mode[regno] is
1324 correct. */
1325 && reg_save_code (regno, save_mode[regno]) >= 0)
1326 mem = adjust_address_nv (mem, save_mode[regno], 0);
1327 else
1328 mem = copy_rtx (mem);
1330 /* Verify that the alignment of spill space is equal to or greater
1331 than required. */
1332 gcc_assert (MIN (MAX_SUPPORTED_STACK_ALIGNMENT,
1333 GET_MODE_ALIGNMENT (GET_MODE (mem))) <= MEM_ALIGN (mem));
1335 pat = gen_rtx_SET (mem, gen_rtx_REG (GET_MODE (mem), regno));
1336 code = reg_save_code (regno, GET_MODE (mem));
1337 new_chain = insert_one_insn (chain, before_p, code, pat);
1339 /* Set hard_regs_saved and dead_or_set for all the registers we saved. */
1340 for (k = 0; k < numregs; k++)
1342 SET_HARD_REG_BIT (hard_regs_saved, regno + k);
1343 SET_REGNO_REG_SET (&new_chain->dead_or_set, regno + k);
1344 n_regs_saved++;
1347 /* Tell our callers how many extra registers we saved/restored. */
1348 return numregs - 1;
1351 /* A note_uses callback used by insert_one_insn. Add the hard-register
1352 equivalent of each REG to regset DATA. */
1354 static void
1355 add_used_regs (rtx *loc, void *data)
1357 subrtx_iterator::array_type array;
1358 FOR_EACH_SUBRTX (iter, array, *loc, NONCONST)
1360 const_rtx x = *iter;
1361 if (REG_P (x))
1363 unsigned int regno = REGNO (x);
1364 if (HARD_REGISTER_NUM_P (regno))
1365 bitmap_set_range ((regset) data, regno,
1366 hard_regno_nregs[regno][GET_MODE (x)]);
1367 else
1368 gcc_checking_assert (reg_renumber[regno] < 0);
1373 /* Emit a new caller-save insn and set the code. */
1374 static struct insn_chain *
1375 insert_one_insn (struct insn_chain *chain, int before_p, int code, rtx pat)
1377 rtx_insn *insn = chain->insn;
1378 struct insn_chain *new_chain;
1380 /* If INSN references CC0, put our insns in front of the insn that sets
1381 CC0. This is always safe, since the only way we could be passed an
1382 insn that references CC0 is for a restore, and doing a restore earlier
1383 isn't a problem. We do, however, assume here that CALL_INSNs don't
1384 reference CC0. Guard against non-INSN's like CODE_LABEL. */
1386 if (HAVE_cc0 && (NONJUMP_INSN_P (insn) || JUMP_P (insn))
1387 && before_p
1388 && reg_referenced_p (cc0_rtx, PATTERN (insn)))
1389 chain = chain->prev, insn = chain->insn;
1391 new_chain = new_insn_chain ();
1392 if (before_p)
1394 rtx link;
1396 new_chain->prev = chain->prev;
1397 if (new_chain->prev != 0)
1398 new_chain->prev->next = new_chain;
1399 else
1400 reload_insn_chain = new_chain;
1402 chain->prev = new_chain;
1403 new_chain->next = chain;
1404 new_chain->insn = emit_insn_before (pat, insn);
1405 /* ??? It would be nice if we could exclude the already / still saved
1406 registers from the live sets. */
1407 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1408 note_uses (&PATTERN (chain->insn), add_used_regs,
1409 &new_chain->live_throughout);
1410 /* If CHAIN->INSN is a call, then the registers which contain
1411 the arguments to the function are live in the new insn. */
1412 if (CALL_P (chain->insn))
1413 for (link = CALL_INSN_FUNCTION_USAGE (chain->insn);
1414 link != NULL_RTX;
1415 link = XEXP (link, 1))
1416 note_uses (&XEXP (link, 0), add_used_regs,
1417 &new_chain->live_throughout);
1419 CLEAR_REG_SET (&new_chain->dead_or_set);
1420 if (chain->insn == BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1421 BB_HEAD (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1423 else
1425 new_chain->next = chain->next;
1426 if (new_chain->next != 0)
1427 new_chain->next->prev = new_chain;
1428 chain->next = new_chain;
1429 new_chain->prev = chain;
1430 new_chain->insn = emit_insn_after (pat, insn);
1431 /* ??? It would be nice if we could exclude the already / still saved
1432 registers from the live sets, and observe REG_UNUSED notes. */
1433 COPY_REG_SET (&new_chain->live_throughout, &chain->live_throughout);
1434 /* Registers that are set in CHAIN->INSN live in the new insn.
1435 (Unless there is a REG_UNUSED note for them, but we don't
1436 look for them here.) */
1437 note_stores (PATTERN (chain->insn), add_stored_regs,
1438 &new_chain->live_throughout);
1439 CLEAR_REG_SET (&new_chain->dead_or_set);
1440 if (chain->insn == BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)))
1441 BB_END (BASIC_BLOCK_FOR_FN (cfun, chain->block)) = new_chain->insn;
1443 new_chain->block = chain->block;
1444 new_chain->is_caller_save_insn = 1;
1446 INSN_CODE (new_chain->insn) = code;
1447 return new_chain;
1449 #include "gt-caller-save.h"