1 # CPU, FPU and architecture specifications for ARM.
3 # Copyright (C) 2011-2021 Free Software Foundation, Inc.
5 # This file is part of GCC.
7 # GCC is free software; you can redistribute it and/or modify it under
8 # the terms of the GNU General Public License as published by the Free
9 # Software Foundation; either version 3, or (at your option) any later
12 # GCC is distributed in the hope that it will be useful, but WITHOUT ANY
13 # WARRANTY; without even the implied warranty of MERCHANTABILITY or
14 # FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
17 # You should have received a copy of the GNU General Public License
18 # along with GCC; see the file COPYING3. If not see
19 # <http://www.gnu.org/licenses/>.
21 # This file describes all the various CPUs, FPUs and architectures supported
22 # by the compiler. It is pre-processed by parsecpu.awk for a number of
25 # The general form is a sequence of begin..end blocks with the following
27 # begin <object-type> <name>
28 # attribute-statement*
29 # end <object-type> <name>
31 # where object type is one of "cpu" "arch" "fpu". Each object type has
32 # a specific set of permitted attributes, some of which are optional; further
33 # details can be found below.
35 # Some objects cross-reference other objects by name. Objects are permitted
36 # in any order and it is not necessary to place a cross-referenced object
37 # earlier in the file.
39 # The object names for cpu, arch and fpu objects are used for the public option
40 # names in the final compiler. The order within each group is preserved and
41 # forms the order for the list within the compiler.
43 # Most objects in this file support forward references. The major
44 # exception is feature groups, which may only refer to previously
45 # defined features or feature groups. This is done to avoid the risk
46 # of feature groups recursively referencing each other and causing
49 # Features - general convention: all lower case.
57 # Architecture rel 5t.
60 # Architecture rel 5te.
61 define feature armv5te
69 # Architecture rel 6k.
75 # Instructions not present in 'M' profile.
78 # Architecture uses be8 mode in big-endian.
81 # Thumb division instructions.
84 # Architecture rel 7e-m.
85 define feature armv7em
90 # MP extension to ArmV7-A
93 # SEC extension to ArmV7-A
96 # ARM division instructions.
102 # ARMv8 CRC32 instructions.
105 # XScale v2 (Wireless MMX).
106 define feature iwmmxt
108 # XScale Wireless MMX2.
109 define feature iwmmxt2
111 # Architecture rel 8.1.
112 define feature armv8_1
114 # Architecture rel 8.2.
115 define feature armv8_2
117 # Architecture rel 8.3.
118 define feature armv8_3
120 # Architecture rel 8.4.
121 define feature armv8_4
123 # Architecture rel 8.5.
124 define feature armv8_5
126 # Architecture rel 8.6.
127 define feature armv8_6
129 # M-Profile security extensions.
132 # Architecture rel 8.1-M.
133 define feature armv8_1m_main
135 # Floating point and Neon extensions.
136 # VFPv1 is not supported in GCC.
138 # Vector floating point v2.
141 # Vector floating point v3.
144 # Vector floating point v4.
153 # Advanced SIMD instructions.
156 # Conversions to/from fp16 (VFPv3 extension).
157 define feature fp16conv
159 # Double precision operations supported.
160 define feature fp_dbl
162 # 32 Double precision registers.
163 define feature fp_d32
165 # Crypto extension to ARMv8.
166 define feature crypto
168 # FP16 data processing (half-precision float).
171 # Dot Product instructions extension to ARMv8.2-a.
172 define feature dotprod
174 # Half-precision floating-point instructions in ARMv8.4-A.
175 define feature fp16fml
177 # ISA Quirks (errata?). Don't forget to add this to the fgroup
180 # No volatile memory in IT blocks.
181 define feature quirk_no_volatile_ce
183 # Previously mis-identified by GCC.
184 define feature quirk_armv6kz
186 # Cortex-M3 LDRD quirk.
187 define feature quirk_cm3_ldrd
189 # v8-m/v8.1-m VLLDM errata.
190 define feature quirk_vlldm
192 # Don't use .cpu assembly directive
193 define feature quirk_no_asmcpu
195 # (Very) slow multiply operations. Should probably be a tuning bit.
196 define feature smallmul
198 # Speculation Barrier Instruction for v8-A architectures, added by
202 # Execution and Data Prediction Restriction Instruction for
203 # v8-A architectures, added by default from v8.5-A
204 define feature predres
206 # M-profile Vector Extension feature bits
208 define feature mve_float
210 # 8-bit Integer Matrix Multiply extension. Optional from v8.2-A.
213 # Brain half-precision floating-point extension. Optional from v8.2-A.
216 # Arm Custom Datapath Extension (CDE).
217 define feature cdecp0
218 define feature cdecp1
219 define feature cdecp2
220 define feature cdecp3
221 define feature cdecp4
222 define feature cdecp5
223 define feature cdecp6
224 define feature cdecp7
226 # Feature groups. Conventionally all (or mostly) upper case.
227 # ALL_FPU lists all the feature bits associated with the floating-point
228 # unit; these will all be removed if the floating-point unit is disabled
229 # (eg -mfloat-abi=soft). ALL_FPU_INTERNAL must ONLY contain features that
230 # form part of a named -mfpu option; it is used to map the capabilities
231 # back to a named FPU for the benefit of the assembler.
233 # ALL_SIMD_INTERNAL and ALL_SIMD are similarly defined to help with the
234 # construction of ALL_FPU and ALL_FPU_INTERNAL; they describe the SIMD
235 # extensions that are either part of a named FPU or optional extensions
239 # List of all cryptographic extensions to stripout if crypto is
240 # disabled. Currently, that's trivial, but we define it anyway for
241 # consistency with the SIMD and FP disable lists.
242 define fgroup ALL_CRYPTO crypto
244 # List of all SIMD bits to strip out if SIMD is disabled. This does
245 # strip off 32 D-registers, but does not remove support for
246 # double-precision FP.
247 define fgroup ALL_SIMD_INTERNAL fp_d32 neon ALL_CRYPTO
248 define fgroup ALL_SIMD_EXTERNAL dotprod fp16fml i8mm
249 define fgroup ALL_SIMD ALL_SIMD_INTERNAL ALL_SIMD_EXTERNAL
251 # List of all FPU bits to strip out if -mfpu is used to override the
252 # default. fp16 is deliberately missing from this list.
253 define fgroup ALL_FPU_INTERNAL vfpv2 vfpv3 vfpv4 fpv5 fp16conv fp_dbl ALL_SIMD_INTERNAL
254 # Similarly, but including fp16 and other extensions that aren't part of
256 define fgroup ALL_FPU_EXTERNAL fp16 bf16
258 # Everything related to the FPU extensions (FP or SIMD).
259 define fgroup ALL_FP ALL_FPU_EXTERNAL ALL_FPU_INTERNAL ALL_SIMD
261 define fgroup ARMv4 armv4 notm
262 define fgroup ARMv4t ARMv4 thumb
263 define fgroup ARMv5t ARMv4t armv5t
264 define fgroup ARMv5te ARMv5t armv5te
265 define fgroup ARMv5tej ARMv5te
266 define fgroup ARMv6 ARMv5te armv6 be8
267 define fgroup ARMv6j ARMv6
268 define fgroup ARMv6k ARMv6 armv6k
269 define fgroup ARMv6z ARMv6
270 define fgroup ARMv6kz ARMv6k quirk_armv6kz
271 define fgroup ARMv6zk ARMv6k
272 define fgroup ARMv6t2 ARMv6 thumb2
273 # This is suspect. ARMv6-m doesn't really pull in any useful features
274 # from ARMv5* or ARMv6.
275 define fgroup ARMv6m armv4 thumb armv5t armv5te armv6 be8
276 # This is suspect, the 'common' ARMv7 subset excludes the thumb2 'DSP' and
277 # integer SIMD instructions that are in ARMv6T2. */
278 define fgroup ARMv7 ARMv6m thumb2 armv7
280 define fgroup ARMv7a ARMv7 notm armv6k
281 define fgroup ARMv7ve ARMv7a adiv tdiv lpae mp sec
282 define fgroup ARMv7r ARMv7a tdiv
283 define fgroup ARMv7m ARMv7 tdiv
284 define fgroup ARMv7em ARMv7m armv7em
285 define fgroup ARMv8a ARMv7ve armv8
286 define fgroup ARMv8_1a ARMv8a crc32 armv8_1
287 define fgroup ARMv8_2a ARMv8_1a armv8_2
288 define fgroup ARMv8_3a ARMv8_2a armv8_3
289 define fgroup ARMv8_4a ARMv8_3a armv8_4
290 define fgroup ARMv8_5a ARMv8_4a armv8_5 sb predres
291 define fgroup ARMv8_6a ARMv8_5a armv8_6
292 define fgroup ARMv8m_base ARMv6m armv8 cmse tdiv
293 define fgroup ARMv8m_main ARMv7m armv8 cmse
294 define fgroup ARMv8r ARMv8a
295 define fgroup ARMv8_1m_main ARMv8m_main armv8_1m_main
297 # Useful combinations.
298 define fgroup VFPv2 vfpv2
299 define fgroup VFPv3 VFPv2 vfpv3
300 define fgroup VFPv4 VFPv3 vfpv4 fp16conv
301 define fgroup FPv5 VFPv4 fpv5
302 define fgroup MVE mve armv7em
303 define fgroup MVE_FP MVE FPv5 fp16 mve_float
305 define fgroup FP_DBL fp_dbl
306 define fgroup FP_D32 FP_DBL fp_d32
307 define fgroup FP_ARMv8 FPv5 FP_D32
308 define fgroup NEON FP_D32 neon
309 define fgroup CRYPTO NEON crypto
310 define fgroup DOTPROD NEON dotprod
312 # Implied feature bits. These are for non-named features shared between fgroups.
313 # Shared feature f belonging to fgroups A and B will be erroneously removed if:
314 # A and B are enabled by default AND A is disabled by a removal flag.
315 # To ensure that f is retained, we must add such bits to the ISA after
316 # processing the removal flags. This is implemented by 'implied bits':
317 # define implied <name> [<feature-or-fgroup>]+
318 # This indicates that, if any of the listed features are enabled, or if any
319 # member of a listed fgroup is enabled, then <name> will be implicitly enabled.
321 # Enabled for all VFP, MVE and MVE with floating point extensions.
322 define implied vfp_base MVE MVE_FP ALL_FP
324 # List of all quirk bits to strip out when comparing CPU features with
326 # xscale isn't really a 'quirk', but it isn't an architecture either and we
327 # need to ignore it for matching purposes.
328 define fgroup ALL_QUIRKS quirk_no_volatile_ce quirk_armv6kz quirk_cm3_ldrd quirk_vlldm xscale quirk_no_asmcpu
330 define fgroup IGNORE_FOR_MULTILIB cdecp0 cdecp1 cdecp2 cdecp3 cdecp4 cdecp5 cdecp6 cdecp7
332 # Architecture entries
336 # [tune flags <list>]
339 # isa <isa-flags-list>
369 option fp add VFPv2 FP_DBL
371 option nofp remove ALL_FP
379 option fp add VFPv2 FP_DBL
381 option nofp remove ALL_FP
389 option fp add VFPv2 FP_DBL
391 option nofp remove ALL_FP
399 option fp add VFPv2 FP_DBL
401 option nofp remove ALL_FP
409 option fp add VFPv2 FP_DBL
411 option nofp remove ALL_FP
419 option fp add VFPv2 FP_DBL
421 option nofp remove ALL_FP
429 option fp add VFPv2 FP_DBL
431 option nofp remove ALL_FP
439 option fp add VFPv2 FP_DBL
441 option nofp remove ALL_FP
449 option fp add VFPv2 FP_DBL
451 option nofp remove ALL_FP
461 # This is now equivalent to armv6-m, but we keep it because some
462 # versions of GAS still distinguish between the two.
475 # fp => VFPv3-d16 (only useful for the A+R profile subset).
476 option fp add VFPv3 FP_DBL
477 optalias vfpv3-d16 fp
478 option nofp remove ALL_FP
489 # fp => VFPv3-d16, simd => neon-vfpv3
490 option fp add VFPv3 FP_DBL
491 optalias vfpv3-d16 fp
492 option vfpv3 add VFPv3 FP_D32
493 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv
494 option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv
495 option vfpv4-d16 add VFPv4 FP_DBL
496 option vfpv4 add VFPv4 FP_D32
497 option simd add VFPv3 NEON
499 optalias neon-vfpv3 simd
500 option neon-fp16 add VFPv3 NEON fp16conv
501 option neon-vfpv4 add VFPv4 NEON
502 option nosimd remove ALL_SIMD
503 option nofp remove ALL_FP
512 # fp => VFPv4-d16, simd => neon-vfpv4
513 option vfpv3-d16 add VFPv3 FP_DBL
514 option vfpv3 add VFPv3 FP_D32
515 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv
516 option vfpv3-fp16 add VFPv3 FP_DBL FP_D32 fp16conv
517 option fp add VFPv4 FP_DBL
518 optalias vfpv4-d16 fp
519 option vfpv4 add VFPv4 FP_D32
520 option neon add VFPv3 NEON
521 optalias neon-vfpv3 neon
522 option neon-fp16 add VFPv3 NEON fp16conv
523 option simd add VFPv4 NEON
524 optalias neon-vfpv4 simd
525 option nosimd remove ALL_SIMD
526 option nofp remove ALL_FP
535 # ARMv7-r uses VFPv3-d16
536 option fp.sp add VFPv3
537 optalias vfpv3xd fp.sp
538 option fp add VFPv3 FP_DBL
539 optalias vfpv3-d16 fp
540 option vfpv3xd-fp16 add VFPv3 fp16conv
541 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv
543 option nofp remove ALL_FP
544 option noidiv remove adiv
553 # In theory FP is permitted in v7-m, but in practice no implementations exist.
554 # leave it out for now.
563 # fp => VFPv4-sp-d16; fpv5 => FPv5-sp-d16; fp.dp => FPv5-d16
565 optalias vfpv4-sp-d16 fp
567 option fp.dp add FPv5 FP_DBL
568 optalias fpv5-d16 fp.dp
569 option nofp remove ALL_FP
579 option simd add FP_ARMv8 NEON
580 option crypto add FP_ARMv8 CRYPTO
581 option nocrypto remove ALL_CRYPTO
582 option nofp remove ALL_FP
584 option predres add predres
593 option simd add FP_ARMv8 NEON
594 option crypto add FP_ARMv8 CRYPTO
595 option nocrypto remove ALL_CRYPTO
596 option nofp remove ALL_FP
598 option predres add predres
607 option simd add FP_ARMv8 NEON
608 option fp16 add fp16 FP_ARMv8 NEON
609 option fp16fml add fp16fml fp16 FP_ARMv8 NEON
610 option crypto add FP_ARMv8 CRYPTO
611 option nocrypto remove ALL_CRYPTO
612 option nofp remove ALL_FP
613 option dotprod add FP_ARMv8 DOTPROD
615 option predres add predres
616 option i8mm add i8mm FP_ARMv8 NEON
617 option bf16 add bf16 FP_ARMv8 NEON
626 option simd add FP_ARMv8 NEON
627 option fp16 add fp16 FP_ARMv8 NEON
628 option fp16fml add fp16fml fp16 FP_ARMv8 NEON
629 option crypto add FP_ARMv8 CRYPTO
630 option nocrypto remove ALL_CRYPTO
631 option nofp remove ALL_FP
632 option dotprod add FP_ARMv8 DOTPROD
634 option predres add predres
635 option i8mm add i8mm FP_ARMv8 NEON
636 option bf16 add bf16 FP_ARMv8 NEON
645 option simd add FP_ARMv8 DOTPROD
646 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
647 option crypto add FP_ARMv8 CRYPTO DOTPROD
648 option nocrypto remove ALL_CRYPTO
649 option nofp remove ALL_FP
651 option predres add predres
652 option i8mm add i8mm FP_ARMv8 DOTPROD
653 option bf16 add bf16 FP_ARMv8 DOTPROD
662 option simd add FP_ARMv8 DOTPROD
663 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
664 option crypto add FP_ARMv8 CRYPTO DOTPROD
665 option nocrypto remove ALL_CRYPTO
666 option nofp remove ALL_FP
667 option i8mm add i8mm FP_ARMv8 DOTPROD
668 option bf16 add bf16 FP_ARMv8 DOTPROD
677 option simd add FP_ARMv8 DOTPROD
678 option fp16 add fp16 fp16fml FP_ARMv8 DOTPROD
679 option crypto add FP_ARMv8 CRYPTO DOTPROD
680 option nocrypto remove ALL_CRYPTO
681 option nofp remove ALL_FP
682 option i8mm add i8mm FP_ARMv8 DOTPROD
683 option bf16 add bf16 FP_ARMv8 DOTPROD
686 begin arch armv8-m.base
691 end arch armv8-m.base
693 begin arch armv8-m.main
699 option dsp add armv7em
700 # fp => FPv5-sp-d16; fp.dp => FPv5-d16
702 option fp.dp add FPv5 FP_DBL
703 option nofp remove ALL_FP
704 option nodsp remove armv7em
705 option cdecp0 add cdecp0
706 option cdecp1 add cdecp1
707 option cdecp2 add cdecp2
708 option cdecp3 add cdecp3
709 option cdecp4 add cdecp4
710 option cdecp5 add cdecp5
711 option cdecp6 add cdecp6
712 option cdecp7 add cdecp7
713 end arch armv8-m.main
722 # fp.sp => fp-armv8 (d16); simd => simd + fp-armv8 + d32 + double precision
723 # note: no fp option for fp-armv8 (d16) + double precision at the moment
724 option fp.sp add FPv5
725 option simd add FP_ARMv8 NEON
726 option crypto add FP_ARMv8 CRYPTO
727 option nocrypto remove ALL_CRYPTO
728 option nofp remove ALL_FP
731 begin arch armv8.1-m.main
737 # fp => FPv5-sp-d16; fp.dp => FPv5-d16
738 option dsp add armv7em
739 option fp add FPv5 fp16
740 option fp.dp add FPv5 FP_DBL fp16
741 option nofp remove ALL_FP
743 option mve.fp add MVE_FP
744 option cdecp0 add cdecp0
745 option cdecp1 add cdecp1
746 option cdecp2 add cdecp2
747 option cdecp3 add cdecp3
748 option cdecp4 add cdecp4
749 option cdecp5 add cdecp5
750 option cdecp6 add cdecp6
751 option cdecp7 add cdecp7
752 end arch armv8.1-m.main
756 tune flags LDSCHED STRONG XSCALE
758 isa ARMv5te xscale iwmmxt
763 tune flags LDSCHED STRONG XSCALE
765 isa ARMv5te xscale iwmmxt iwmmxt2
771 # [cname <c-compatible-name>]
773 # [tune for <cpu-name>]
774 # [tune flags <list>]
775 # architecture <name>
776 # [isa <additional-isa-flags-list>]
777 # [option <name> add|remove <isa-list>]*
778 # [optalias <name> <optname>]*
780 # [vendor <vendor-id>
781 # [part <part-id> [minrev [maxrev]]]
784 # If omitted, cname is formed from transforming the cpuname to convert
785 # non-valid punctuation characters to '_'.
786 # Any number of alias names may be specified for a CPU. If the name starts
787 # with a '!' then it will be recognized as a valid name, but will not
788 # be printed in any help text listing permitted CPUs.
789 # If specified, tune for specifies a CPU target to use for tuning this core.
790 # isa flags are appended to those defined by the architecture.
791 # Each add option must have a distinct feature set and each remove
792 # option must similarly have a distinct feature set. Option aliases can be
793 # added with the optalias statement.
794 # Vendor, part and revision information is used for native CPU and architecture
795 # detection. All values must be in hex (lower case) with the leading '0x'
796 # omitted. For example the cortex-a9 will have vendor 41 and part c09.
797 # Revision information is used to match a subrange of part
798 # revisions: minrev <= detected <= maxrev.
799 # If a minrev or maxrev are omitted then minrev defaults to zero and maxrev
801 # Revision information is not implemented yet; no part uses it.
803 # V4 Architecture Processors
817 alias strongarm110 !strongarm1100 !strongarm1110
818 tune flags LDSCHED STRONG
836 # V4T Architecture Processors
845 alias arm720t arm740t
864 alias arm920 arm922t arm940t ep9312
871 # V5T Architecture Processors
872 # These used VFPv1 which isn't supported by GCC
881 # V5TE Architecture Processors
883 alias arm946e-s arm966e-s arm968e-s
885 architecture armv5te+fp
886 option nofp remove ALL_FP
891 alias arm1020e arm1022e
893 architecture armv5te+fp
894 option nofp remove ALL_FP
899 tune flags LDSCHED XSCALE
906 tune flags LDSCHED XSCALE
912 tune flags LDSCHED XSCALE
942 # V5TEJ Architecture Processors
946 architecture armv5tej+fp
947 option nofp remove ALL_FP
953 begin cpu arm1026ej-s
956 architecture armv5tej+fp
957 option nofp remove ALL_FP
964 # V6 Architecture Processors
972 begin cpu arm1136jf-s
975 architecture armv6j+fp
981 begin cpu arm1176jz-s
988 begin cpu arm1176jzf-s
991 architecture armv6kz+fp
997 begin cpu mpcorenovfp
1005 architecture armv6k+fp
1011 begin cpu arm1156t2-s
1014 architecture armv6t2
1018 begin cpu arm1156t2f-s
1021 architecture armv6t2+fp
1025 end cpu arm1156t2f-s
1028 # V6M Architecture Processors
1032 architecture armv6s-m
1041 architecture armv6s-m
1047 begin cpu cortex-m0plus
1050 architecture armv6s-m
1052 end cpu cortex-m0plus
1055 # V6M Architecture Processors for small-multiply implementations.
1056 begin cpu cortex-m1.small-multiply
1057 cname cortexm1smallmultiply
1059 tune flags LDSCHED SMALLMUL
1060 architecture armv6s-m
1062 end cpu cortex-m1.small-multiply
1064 begin cpu cortex-m0.small-multiply
1065 cname cortexm0smallmultiply
1067 tune flags LDSCHED SMALLMUL
1068 architecture armv6s-m
1070 end cpu cortex-m0.small-multiply
1072 begin cpu cortex-m0plus.small-multiply
1073 cname cortexm0plussmallmultiply
1074 tune for cortex-m0plus
1075 tune flags LDSCHED SMALLMUL
1076 architecture armv6s-m
1078 end cpu cortex-m0plus.small-multiply
1081 # V7 Architecture Processors
1082 begin cpu generic-armv7-a
1085 architecture armv7-a+fp
1089 option vfpv3-d16 add VFPv3 FP_DBL
1090 option vfpv3 add VFPv3 FP_D32
1091 option vfpv3-d16-fp16 add VFPv3 FP_DBL fp16conv
1092 option vfpv3-fp16 add VFPv3 FP_D32 fp16conv
1093 option vfpv4-d16 add VFPv4 FP_DBL
1094 option vfpv4 add VFPv4 FP_D32
1095 option simd add VFPv3 NEON
1097 optalias neon-vfpv3 simd
1098 option neon-fp16 add VFPv3 NEON fp16conv
1099 option neon-vfpv4 add VFPv4 NEON
1100 option nosimd remove ALL_SIMD
1101 option nofp remove ALL_FP
1103 end cpu generic-armv7-a
1108 architecture armv7-a+mp+sec+neon-fp16
1109 option nosimd remove ALL_SIMD
1110 option nofp remove ALL_FP
1119 architecture armv7ve+simd
1120 option nosimd remove ALL_SIMD
1121 option nofp remove ALL_FP
1130 architecture armv7-a+sec+simd
1131 option nofp remove ALL_FP
1140 architecture armv7-a+mp+sec+neon-fp16
1141 option nosimd remove ALL_SIMD
1142 option nofp remove ALL_FP
1148 begin cpu cortex-a12
1152 architecture armv7ve+simd
1153 option nofp remove ALL_FP
1159 begin cpu cortex-a15
1162 architecture armv7ve+simd
1163 option nofp remove ALL_FP
1169 begin cpu cortex-a17
1172 architecture armv7ve+simd
1173 option nofp remove ALL_FP
1182 architecture armv7-r
1186 begin cpu cortex-r4f
1189 architecture armv7-r+fp
1198 architecture armv7-r+idiv+fp
1199 option nofp.dp remove FP_DBL
1200 option nofp remove ALL_FP
1209 architecture armv7-r+idiv+vfpv3-d16-fp16
1210 option nofp.dp remove FP_DBL
1211 option nofp remove ALL_FP
1221 architecture armv7-r+idiv+vfpv3-d16-fp16
1222 option nofp.dp remove FP_DBL
1223 option nofp remove ALL_FP
1232 architecture armv7e-m+fp.dp
1233 isa quirk_no_volatile_ce
1234 option nofp.dp remove FP_DBL
1235 option nofp remove ALL_FP
1242 architecture armv7e-m+fp
1243 option nofp remove ALL_FP
1252 architecture armv7-m
1259 begin cpu marvell-pj4
1261 architecture armv7-a+mp+sec+fp
1266 # V7 big.LITTLE implementations
1267 begin cpu cortex-a15.cortex-a7
1268 cname cortexa15cortexa7
1271 architecture armv7ve+simd
1272 option nofp remove ALL_FP
1274 end cpu cortex-a15.cortex-a7
1276 begin cpu cortex-a17.cortex-a7
1277 cname cortexa17cortexa7
1280 architecture armv7ve+simd
1281 option nofp remove ALL_FP
1283 end cpu cortex-a17.cortex-a7
1286 # V8 A-profile Architecture Processors
1287 begin cpu cortex-a32
1291 architecture armv8-a+crc+simd
1292 option crypto add FP_ARMv8 CRYPTO
1293 option nofp remove ALL_FP
1299 begin cpu cortex-a35
1303 architecture armv8-a+crc+simd
1304 option crypto add FP_ARMv8 CRYPTO
1305 option nofp remove ALL_FP
1311 begin cpu cortex-a53
1314 architecture armv8-a+crc+simd
1315 option crypto add FP_ARMv8 CRYPTO
1316 option nofp remove ALL_FP
1322 begin cpu cortex-a57
1325 architecture armv8-a+crc+simd
1326 option crypto add FP_ARMv8 CRYPTO
1332 begin cpu cortex-a72
1336 architecture armv8-a+crc+simd
1337 option crypto add FP_ARMv8 CRYPTO
1343 begin cpu cortex-a73
1347 architecture armv8-a+crc+simd
1348 option crypto add FP_ARMv8 CRYPTO
1357 architecture armv8-a+crc+simd
1358 option crypto add FP_ARMv8 CRYPTO
1364 architecture armv8-a+simd
1365 option crypto add FP_ARMv8 CRYPTO
1369 # V8 A-profile big.LITTLE implementations
1370 begin cpu cortex-a57.cortex-a53
1371 cname cortexa57cortexa53
1374 architecture armv8-a+crc+simd
1375 option crypto add FP_ARMv8 CRYPTO
1377 end cpu cortex-a57.cortex-a53
1379 begin cpu cortex-a72.cortex-a53
1380 cname cortexa72cortexa53
1383 architecture armv8-a+crc+simd
1384 option crypto add FP_ARMv8 CRYPTO
1386 end cpu cortex-a72.cortex-a53
1388 begin cpu cortex-a73.cortex-a35
1389 cname cortexa73cortexa35
1392 architecture armv8-a+crc+simd
1393 option crypto add FP_ARMv8 CRYPTO
1395 end cpu cortex-a73.cortex-a35
1397 begin cpu cortex-a73.cortex-a53
1398 cname cortexa73cortexa53
1401 architecture armv8-a+crc+simd
1402 option crypto add FP_ARMv8 CRYPTO
1404 end cpu cortex-a73.cortex-a53
1407 # ARMv8.2 A-profile Architecture Processors
1408 begin cpu cortex-a55
1412 architecture armv8.2-a+fp16+dotprod
1413 option crypto add FP_ARMv8 CRYPTO
1414 option nofp remove ALL_FP
1420 begin cpu cortex-a75
1424 architecture armv8.2-a+fp16+dotprod
1425 option crypto add FP_ARMv8 CRYPTO
1431 begin cpu cortex-a76
1435 architecture armv8.2-a+fp16+dotprod
1436 option crypto add FP_ARMv8 CRYPTO
1442 begin cpu cortex-a76ae
1446 architecture armv8.2-a+fp16+dotprod
1447 option crypto add FP_ARMv8 CRYPTO
1451 end cpu cortex-a76ae
1453 begin cpu cortex-a77
1457 architecture armv8.2-a+fp16+dotprod
1458 option crypto add FP_ARMv8 CRYPTO
1464 begin cpu cortex-a78
1468 architecture armv8.2-a+fp16+dotprod
1469 option crypto add FP_ARMv8 CRYPTO
1475 begin cpu cortex-a78ae
1479 architecture armv8.2-a+fp16+dotprod
1480 option crypto add FP_ARMv8 CRYPTO
1484 end cpu cortex-a78ae
1486 begin cpu cortex-a78c
1490 architecture armv8.2-a+fp16+dotprod
1491 option crypto add FP_ARMv8 CRYPTO
1501 architecture armv8.2-a+fp16+dotprod
1502 option crypto add FP_ARMv8 CRYPTO
1508 begin cpu neoverse-n1
1513 architecture armv8.2-a+fp16+dotprod
1514 option crypto add FP_ARMv8 CRYPTO
1520 # ARMv8.2 A-profile ARM DynamIQ big.LITTLE implementations
1521 begin cpu cortex-a75.cortex-a55
1522 cname cortexa75cortexa55
1525 architecture armv8.2-a+fp16+dotprod
1526 option crypto add FP_ARMv8 CRYPTO
1528 end cpu cortex-a75.cortex-a55
1530 begin cpu cortex-a76.cortex-a55
1531 cname cortexa76cortexa55
1534 architecture armv8.2-a+fp16+dotprod
1535 option crypto add FP_ARMv8 CRYPTO
1537 end cpu cortex-a76.cortex-a55
1539 # Armv8.4 A-profile Architecture Processors
1540 begin cpu neoverse-v1
1544 architecture armv8.4-a+fp16+bf16+i8mm
1545 option crypto add FP_ARMv8 CRYPTO
1551 # Armv8.5 A-profile Architecture Processors
1552 begin cpu neoverse-n2
1556 architecture armv8.5-a+fp16+bf16+i8mm
1557 option crypto add FP_ARMv8 CRYPTO
1563 # V8 M-profile implementations.
1564 begin cpu cortex-m23
1567 architecture armv8-m.base
1571 begin cpu cortex-m33
1574 architecture armv8-m.main+dsp+fp
1575 option nofp remove ALL_FP
1576 option nodsp remove armv7em
1581 begin cpu cortex-m35p
1584 architecture armv8-m.main+dsp+fp
1585 option nofp remove ALL_FP
1586 option nodsp remove armv7em
1591 begin cpu cortex-m55
1594 architecture armv8.1-m.main+mve.fp+fp.dp
1595 option nomve.fp remove mve_float
1596 option nomve remove mve mve_float
1597 option nofp remove ALL_FP mve_float
1598 option nodsp remove MVE mve_float
1599 isa quirk_no_asmcpu quirk_vlldm
1604 # V8 R-profile implementations.
1605 begin cpu cortex-r52
1608 architecture armv8-r+crc+simd
1609 option nofp.dp remove FP_DBL ALL_SIMD
1615 begin cpu cortex-r52plus
1618 architecture armv8-r+crc+simd
1619 option nofp.dp remove FP_DBL ALL_SIMD
1623 end cpu cortex-r52plus
1628 # isa <isa-flags-list>
1643 begin fpu vfpv3-fp16
1644 isa VFPv3 FP_D32 fp16conv
1651 begin fpu vfpv3-d16-fp16
1652 isa VFPv3 FP_DBL fp16conv
1653 end fpu vfpv3-d16-fp16
1659 begin fpu vfpv3xd-fp16
1661 end fpu vfpv3xd-fp16
1667 begin fpu neon-vfpv3
1672 isa VFPv3 NEON fp16conv
1679 begin fpu neon-vfpv4
1687 begin fpu fpv4-sp-d16
1691 begin fpu fpv5-sp-d16
1703 begin fpu neon-fp-armv8
1705 end fpu neon-fp-armv8
1707 begin fpu crypto-neon-fp-armv8
1709 end fpu crypto-neon-fp-armv8
1711 # Compatibility aliases.