gcc/config/spu/spu.h

   1 /* Copyright (C) 2006-2016 Free Software Foundation, Inc.
   2
   3    This file is free software; you can redistribute it and/or modify it under
   4    the terms of the GNU General Public License as published by the Free
   5    Software Foundation; either version 3 of the License, or (at your option)
   6    any later version.
   7
   8    This file is distributed in the hope that it will be useful, but WITHOUT
   9    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY or
  10    FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public License
  11    for more details.
  12
  13    You should have received a copy of the GNU General Public License
  14    along with GCC; see the file COPYING3.  If not see
  15    <http://www.gnu.org/licenses/>.  */
  16
  17 \f
  18 /* Run-time Target */
  19 #define TARGET_CPU_CPP_BUILTINS()       spu_cpu_cpp_builtins(pfile)
  20
  21 #define C_COMMON_OVERRIDE_OPTIONS spu_c_common_override_options()
  22
  23 #define INIT_EXPANDERS spu_init_expanders()
  24
  25 /* Which processor to generate code or schedule for.  */
  26 enum processor_type
  27 {
  28   PROCESSOR_CELL,
  29   PROCESSOR_CELLEDP
  30 };
  31
  32 extern GTY(()) int spu_arch;
  33 extern GTY(()) int spu_tune;
  34
  35 /* Support for a compile-time default architecture and tuning.  The rules are:
  36    --with-arch is ignored if -march is specified.
  37    --with-tune is ignored if -mtune is specified.  */
  38 #define OPTION_DEFAULT_SPECS \
  39   {"arch", "%{!march=*:-march=%(VALUE)}" }, \
  40   {"tune", "%{!mtune=*:-mtune=%(VALUE)}" }
  41
  42 /* Default target_flags if no switches specified.  */
  43 #ifndef TARGET_DEFAULT
  44 #define TARGET_DEFAULT (MASK_ERROR_RELOC | MASK_SAFE_DMA | MASK_BRANCH_HINTS \
  45                         | MASK_SAFE_HINTS | MASK_ADDRESS_SPACE_CONVERSION)
  46 #endif
  47
  48 \f
  49 /* Storage Layout */
  50
  51 #define BITS_BIG_ENDIAN 1
  52
  53 #define BYTES_BIG_ENDIAN 1
  54
  55 #define WORDS_BIG_ENDIAN 1
  56
  57 /* GCC uses word_mode in many places, assuming that it is the fastest
  58    integer mode.  That is not the case for SPU though.  We can't use
  59    32 here because (of some reason I can't remember.) */
  60 #define BITS_PER_WORD 128
  61
  62 #define UNITS_PER_WORD (BITS_PER_WORD/BITS_PER_UNIT)
  63
  64 /* When building libgcc, we need to assume 4 words per units even
  65    though UNITS_PER_WORD is 16, because the SPU has basically a 32-bit
  66    instruction set although register size is 128 bits.  In particular,
  67    this causes libgcc to contain __divdi3 instead of __divti3 etc.
  68    However, we allow this default to be re-defined on the command
  69    line, so that we can use the LIB2_SIDITI_CONV_FUNCS mechanism
  70    to get (in addition) TImode versions of some routines.  */
  71 #ifndef LIBGCC2_UNITS_PER_WORD
  72 #define LIBGCC2_UNITS_PER_WORD 4
  73 #endif
  74
  75 #define POINTER_SIZE 32
  76
  77 #define PARM_BOUNDARY 128
  78
  79 #define STACK_BOUNDARY 128
  80
  81 /* We want it 8-byte aligned so we can properly use dual-issue
  82    instructions, which can only happen on an 8-byte aligned address. */
  83 #define FUNCTION_BOUNDARY 64
  84
  85 /* We would like to allow a larger alignment for data objects (for DMA)
  86    but the aligned attribute is limited by BIGGEST_ALIGNMENT.  We don't
  87    define BIGGEST_ALIGNMENT as larger because it is used in other places
  88    and would end up wasting space.  (Is this still true?)  */
  89 #define BIGGEST_ALIGNMENT 128
  90
  91 #define MINIMUM_ATOMIC_ALIGNMENT 128
  92
  93 /* Make all static objects 16-byte aligned.  This allows us to assume
  94    they are also padded to 16-bytes, which means we can use a single
  95    load or store instruction to access them.  Do the same for objects
  96    on the stack.  (Except a bug (?) allows some stack objects to be
  97    unaligned.)  */
  98 #define DATA_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
  99 #define CONSTANT_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 100 #define LOCAL_ALIGNMENT(TYPE,ALIGN) ((ALIGN) > 128 ? (ALIGN) : 128)
 101
 102 #define EMPTY_FIELD_BOUNDARY 32
 103
 104 #define STRICT_ALIGNMENT 1
 105
 106 /* symbol_ref's of functions are not aligned to 16 byte boundary. */
 107 #define ALIGNED_SYMBOL_REF_P(X) \
 108         (GET_CODE (X) == SYMBOL_REF \
 109           && (SYMBOL_REF_FLAGS (X) & SYMBOL_FLAG_ALIGN1) == 0 \
 110           && (! SYMBOL_REF_FUNCTION_P (X) \
 111               || align_functions >= 16))
 112
 113 #define PCC_BITFIELD_TYPE_MATTERS 1
 114
 115 #define MAX_FIXED_MODE_SIZE 128
 116
 117 #define STACK_SAVEAREA_MODE(save_level) \
 118   (save_level == SAVE_FUNCTION ? VOIDmode \
 119     : save_level == SAVE_NONLOCAL ? SImode \
 120       : Pmode)
 121
 122 #define STACK_SIZE_MODE SImode
 123
 124 \f
 125 /* Type Layout */
 126
 127 #define INT_TYPE_SIZE 32
 128
 129 #define LONG_TYPE_SIZE 32
 130
 131 #define LONG_LONG_TYPE_SIZE 64
 132
 133 #define FLOAT_TYPE_SIZE 32
 134
 135 #define DOUBLE_TYPE_SIZE 64
 136
 137 #define LONG_DOUBLE_TYPE_SIZE 64
 138
 139 #define DEFAULT_SIGNED_CHAR 0
 140
 141 #define STDINT_LONG32 0
 142
 143 \f
 144 /* Register Basics */
 145
 146 /* 128-130 are special registers that never appear in assembly code. */
 147 #define FIRST_PSEUDO_REGISTER 131
 148
 149 #define FIXED_REGISTERS {                           \
 150     1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 151     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 152     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 153     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 154     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 155     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 156     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 157     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 158     1, 1, 1 \
 159 }
 160
 161 #define CALL_USED_REGISTERS {                       \
 162     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 163     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 164     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 165     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 166     1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, \
 167     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 168     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 169     0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, \
 170     1, 1, 1 \
 171 }
 172
 173 \f
 174 /* Values in Registers */
 175
 176 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 177     ((GET_MODE_BITSIZE(MODE)+MAX_FIXED_MODE_SIZE-1)/MAX_FIXED_MODE_SIZE)
 178
 179 #define HARD_REGNO_MODE_OK(REGNO, MODE) 1
 180
 181 #define MODES_TIEABLE_P(MODE1, MODE2) \
 182   (GET_MODE_BITSIZE (MODE1) <= MAX_FIXED_MODE_SIZE \
 183    && GET_MODE_BITSIZE (MODE2) <= MAX_FIXED_MODE_SIZE)
 184
 185 \f
 186 /* Register Classes */
 187
 188 enum reg_class {
 189    NO_REGS,
 190    GENERAL_REGS,
 191    ALL_REGS,
 192    LIM_REG_CLASSES
 193 };
 194
 195 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 196
 197 #define REG_CLASS_NAMES \
 198 {  "NO_REGS", \
 199    "GENERAL_REGS", \
 200    "ALL_REGS" \
 201 }
 202
 203 #define REG_CLASS_CONTENTS { \
 204     {0, 0, 0, 0, 0}, /* no regs */ \
 205     {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}, /* general regs */ \
 206     {0xffffffff, 0xffffffff, 0xffffffff, 0xffffffff, 0x3}} /* all regs */
 207
 208 #define REGNO_REG_CLASS(REGNO) (GENERAL_REGS)
 209
 210 #define BASE_REG_CLASS GENERAL_REGS
 211
 212 #define INDEX_REG_CLASS GENERAL_REGS
 213
 214 #define REGNO_OK_FOR_BASE_P(regno) \
 215    ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
 216
 217 #define REGNO_OK_FOR_INDEX_P(regno)  \
 218    ((regno) < FIRST_PSEUDO_REGISTER || (regno > LAST_VIRTUAL_REGISTER && reg_renumber[regno] >= 0))
 219
 220 #define INT_REG_OK_FOR_INDEX_P(X,STRICT) \
 221         ((!(STRICT) || REGNO_OK_FOR_INDEX_P (REGNO (X))))
 222 #define INT_REG_OK_FOR_BASE_P(X,STRICT) \
 223         ((!(STRICT) || REGNO_OK_FOR_BASE_P (REGNO (X))))
 224
 225 /* GCC assumes that modes are in the lowpart of a register, which is
 226    only true for SPU. */
 227 #define CANNOT_CHANGE_MODE_CLASS(FROM, TO, CLASS) \
 228         ((GET_MODE_SIZE (FROM) > 4 || GET_MODE_SIZE (TO) > 4) \
 229          && (GET_MODE_SIZE (FROM) < 16 || GET_MODE_SIZE (TO) < 16) \
 230          && GET_MODE_SIZE (FROM) != GET_MODE_SIZE (TO))
 231
 232 #define REGISTER_TARGET_PRAGMAS() do {                                  \
 233 c_register_addr_space ("__ea", ADDR_SPACE_EA);                          \
 234 targetm.resolve_overloaded_builtin = spu_resolve_overloaded_builtin;    \
 235 }while (0);
 236
 237 \f
 238 /* Frame Layout */
 239
 240 #define STACK_GROWS_DOWNWARD 1
 241
 242 #define FRAME_GROWS_DOWNWARD 1
 243
 244 #define STARTING_FRAME_OFFSET (0)
 245
 246 #define STACK_POINTER_OFFSET 32
 247
 248 #define FIRST_PARM_OFFSET(FNDECL) (0)
 249
 250 #define DYNAMIC_CHAIN_ADDRESS(FP) plus_constant (Pmode, (FP), -16)
 251
 252 #define RETURN_ADDR_RTX(COUNT,FP) (spu_return_addr (COUNT, FP))
 253
 254 /* Should this be defined?  Would it simplify our implementation. */
 255 /* #define RETURN_ADDR_IN_PREVIOUS_FRAME */
 256
 257 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG(Pmode, LINK_REGISTER_REGNUM)
 258
 259 #define DWARF_FRAME_RETURN_COLUMN DWARF_FRAME_REGNUM (LINK_REGISTER_REGNUM)
 260
 261 #define ARG_POINTER_CFA_OFFSET(FNDECL) \
 262   (crtl->args.pretend_args_size - STACK_POINTER_OFFSET)
 263
 264 \f
 265 /* Stack Checking */
 266
 267 /* We store the Available Stack Size in the second slot of the stack
 268    register.   We emit stack checking code during the prologue.  */
 269 #define STACK_CHECK_BUILTIN 1
 270
 271 \f
 272 /* Frame Registers, and other registers */
 273
 274 #define STACK_POINTER_REGNUM 1
 275
 276 /* Will be eliminated. */
 277 #define FRAME_POINTER_REGNUM 128
 278
 279 /* This is not specified in any ABI, so could be set to anything. */
 280 #define HARD_FRAME_POINTER_REGNUM 127
 281
 282 /* Will be eliminated. */
 283 #define ARG_POINTER_REGNUM 129
 284
 285 #define STATIC_CHAIN_REGNUM 2
 286
 287 #define LINK_REGISTER_REGNUM 0
 288
 289 /* Used to keep track of instructions that have clobbered the hint
 290  * buffer.  Users can also specify it in inline asm. */
 291 #define HBR_REGNUM 130
 292
 293 #define MAX_REGISTER_ARGS    72
 294 #define FIRST_ARG_REGNUM     3
 295 #define LAST_ARG_REGNUM      (FIRST_ARG_REGNUM + MAX_REGISTER_ARGS - 1)
 296
 297 #define MAX_REGISTER_RETURN  72
 298 #define FIRST_RETURN_REGNUM  3
 299 #define LAST_RETURN_REGNUM   (FIRST_RETURN_REGNUM + MAX_REGISTER_RETURN - 1)
 300
 301 \f
 302 /* Elimination */
 303
 304 #define ELIMINABLE_REGS  \
 305   {{ARG_POINTER_REGNUM,  STACK_POINTER_REGNUM},                         \
 306   {ARG_POINTER_REGNUM,   HARD_FRAME_POINTER_REGNUM},                    \
 307   {FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM},                         \
 308   {FRAME_POINTER_REGNUM, HARD_FRAME_POINTER_REGNUM}}
 309
 310 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 311   ((OFFSET) = spu_initial_elimination_offset((FROM),(TO)))
 312
 313 \f
 314 /* Stack Arguments */
 315
 316 #define ACCUMULATE_OUTGOING_ARGS 1
 317
 318 #define REG_PARM_STACK_SPACE(FNDECL) 0
 319
 320 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 321
 322 \f
 323 /* Register Arguments */
 324
 325 #define CUMULATIVE_ARGS int
 326
 327 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,FNDECL,N_NAMED_ARGS) \
 328                 ((CUM) = 0)
 329
 330 /* The SPU ABI wants 32/64-bit types at offset 0 in the quad-word on the
 331    stack.  8/16-bit types should be at offsets 3/2 respectively.  */
 332 #define FUNCTION_ARG_OFFSET(MODE, TYPE)                                 \
 333 (((TYPE) && INTEGRAL_TYPE_P (TYPE) && GET_MODE_SIZE (MODE) < 4)         \
 334  ? (4 - GET_MODE_SIZE (MODE))                                           \
 335  : 0)
 336
 337 #define FUNCTION_ARG_PADDING(MODE,TYPE) upward
 338
 339 #define PAD_VARARGS_DOWN 0
 340
 341 #define FUNCTION_ARG_REGNO_P(N) ((N) >= (FIRST_ARG_REGNUM) && (N) <= (LAST_ARG_REGNUM))
 342 \f
 343 /* Scalar Return */
 344
 345 #define FUNCTION_VALUE(VALTYPE, FUNC) \
 346         (spu_function_value((VALTYPE),(FUNC)))
 347
 348 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, FIRST_RETURN_REGNUM)
 349
 350 #define FUNCTION_VALUE_REGNO_P(N) ((N) >= (FIRST_RETURN_REGNUM) && (N) <= (LAST_RETURN_REGNUM))
 351
 352 \f
 353 /* Machine-specific symbol_ref flags.  */
 354 #define SYMBOL_FLAG_ALIGN1      (SYMBOL_FLAG_MACH_DEP << 0)
 355 \f
 356 /* Aggregate Return */
 357
 358 #define DEFAULT_PCC_STRUCT_RETURN 0
 359
 360 \f
 361 /* Function Entry */
 362
 363 #define EXIT_IGNORE_STACK 0
 364
 365 #define EPILOGUE_USES(REGNO) ((REGNO)==1 ? 1 : 0)
 366
 367 \f
 368 /* Profiling */
 369
 370 #define FUNCTION_PROFILER(FILE, LABELNO)  \
 371   spu_function_profiler ((FILE), (LABELNO));
 372
 373 #define NO_PROFILE_COUNTERS 1
 374
 375 #define PROFILE_BEFORE_PROLOGUE 1
 376
 377 \f
 378 /* Trampolines */
 379
 380 #define TRAMPOLINE_SIZE (TARGET_LARGE_MEM ? 20 : 16)
 381
 382 #define TRAMPOLINE_ALIGNMENT 128
 383 \f
 384 /* Addressing Modes */
 385
 386 #define CONSTANT_ADDRESS_P(X)   spu_constant_address_p(X)
 387
 388 #define MAX_REGS_PER_ADDRESS 2
 389
 390 #define LEGITIMIZE_RELOAD_ADDRESS(AD, MODE, OPNUM, TYPE, IND, WIN)      \
 391 do {                                                                    \
 392   rtx new_rtx = spu_legitimize_reload_address (AD, MODE, OPNUM,         \
 393                                                (int)(TYPE));            \
 394   if (new_rtx)                                                          \
 395     {                                                                   \
 396       (AD) = new_rtx;                                                   \
 397       goto WIN;                                                         \
 398     }                                                                   \
 399 } while (0)
 400
 401 \f
 402 /* Costs */
 403
 404 #define BRANCH_COST(speed_p, predictable_p) spu_branch_cost
 405
 406 #define SLOW_BYTE_ACCESS 0
 407
 408 #define MOVE_RATIO(speed) ((speed)? 32 : 4)
 409
 410 #define NO_FUNCTION_CSE 1
 411
 412 \f
 413 /* Sections */
 414
 415 #define TEXT_SECTION_ASM_OP ".text"
 416
 417 #define DATA_SECTION_ASM_OP ".data"
 418
 419 #define JUMP_TABLES_IN_TEXT_SECTION 1
 420
 421 \f
 422 /* PIC */
 423 #define PIC_OFFSET_TABLE_REGNUM 126
 424
 425 \f
 426 /* File Framework */
 427
 428 #define ASM_APP_ON ""
 429
 430 #define ASM_APP_OFF ""
 431
 432 \f
 433 /* Uninitialized Data */
 434 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED)  \
 435 ( fputs (".comm ", (FILE)),                     \
 436   assemble_name ((FILE), (NAME)),               \
 437   fprintf ((FILE), ",%d\n", (ROUNDED)))
 438
 439 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED)  \
 440 ( fputs (".lcomm ", (FILE)),                    \
 441   assemble_name ((FILE), (NAME)),               \
 442   fprintf ((FILE), ",%d\n", (ROUNDED)))
 443
 444 \f
 445 /* Label Output */
 446 #define ASM_OUTPUT_LABEL(FILE,NAME)     \
 447   do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
 448
 449 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
 450   asm_fprintf (FILE, "%U%s", default_strip_name_encoding (NAME))
 451
 452 #define ASM_OUTPUT_SYMBOL_REF(FILE, X) \
 453   do                                                    \
 454     {                                                   \
 455       tree decl;                                        \
 456       assemble_name (FILE, XSTR ((X), 0));              \
 457       if ((decl = SYMBOL_REF_DECL ((X))) != 0           \
 458           && TREE_CODE (decl) == VAR_DECL               \
 459           && TYPE_ADDR_SPACE (TREE_TYPE (decl)))        \
 460         fputs ("@ppu", FILE);                           \
 461     } while (0)
 462
 463 \f
 464 /* Instruction Output */
 465 #define REGISTER_NAMES \
 466 {"$lr", "$sp", "$2", "$3", "$4", "$5", "$6", "$7", "$8", "$9", "$10", "$11", "$12", "$13", "$14", "$15", \
 467  "$16", "$17", "$18", "$19", "$20", "$21", "$22", "$23", "$24", "$25", "$26", "$27", "$28", "$29", "$30", "$31", \
 468  "$32", "$33", "$34", "$35", "$36", "$37", "$38", "$39", "$40", "$41", "$42", "$43", "$44", "$45", "$46", "$47", \
 469  "$48", "$49", "$50", "$51", "$52", "$53", "$54", "$55", "$56", "$57", "$58", "$59", "$60", "$61", "$62", "$63", \
 470  "$64", "$65", "$66", "$67", "$68", "$69", "$70", "$71", "$72", "$73", "$74", "$75", "$76", "$77", "$78", "$79", \
 471  "$80", "$81", "$82", "$83", "$84", "$85", "$86", "$87", "$88", "$89", "$90", "$91", "$92", "$93", "$94", "$95", \
 472  "$96", "$97", "$98", "$99", "$100", "$101", "$102", "$103", "$104", "$105", "$106", "$107", "$108", "$109", "$110", "$111", \
 473  "$112", "$113", "$114", "$115", "$116", "$117", "$118", "$119", "$120", "$121", "$122", "$123", "$124", "$125", "$126", "$127", \
 474  "$vfp", "$vap", "hbr" \
 475 }
 476
 477 #define PRINT_OPERAND(FILE, X, CODE)  print_operand(FILE, X, CODE)
 478
 479 #define PRINT_OPERAND_ADDRESS(FILE, ADDR)  \
 480  print_operand_address (FILE, ADDR)
 481
 482 #define LOCAL_LABEL_PREFIX "."
 483
 484 #define USER_LABEL_PREFIX ""
 485
 486 #define ASM_COMMENT_START "#"
 487
 488 \f
 489 /* Dispatch Tables */
 490
 491 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL)  \
 492   fprintf (FILE, "\t.word .L%d-.L%d\n", VALUE, REL)
 493
 494 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE)  \
 495   fprintf (FILE, "\t.word .L%d\n", VALUE)
 496
 497 \f
 498 /* Alignment Output */
 499
 500 #define ASM_OUTPUT_ALIGN(FILE,LOG)  \
 501   do { if (LOG!=0) fprintf (FILE, "\t.align\t%d\n", (LOG)); } while (0)
 502
 503 \f
 504 /* Misc */
 505
 506 #define CASE_VECTOR_MODE SImode
 507
 508 #define MOVE_MAX 16
 509
 510 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) ((INPREC) <= 32 && (OUTPREC) <= (INPREC))
 511
 512 #define STORE_FLAG_VALUE -1
 513
 514 #define Pmode SImode
 515
 516 #define FUNCTION_MODE QImode
 517
 518 #define NO_IMPLICIT_EXTERN_C 1
 519
 520
 521 /* Address spaces.  */
 522 #define ADDR_SPACE_EA   1
 523
 524
 525 /* Builtins.  */
 526
 527 enum spu_builtin_type
 528 {
 529   B_INSN,
 530   B_JUMP,
 531   B_BISLED,
 532   B_CALL,
 533   B_HINT,
 534   B_OVERLOAD,
 535   B_INTERNAL
 536 };
 537
 538 struct spu_builtin_description
 539 {
 540   int fcode;
 541   int icode;
 542   const char *name;
 543   enum spu_builtin_type type;
 544
 545   /* The first element of parm is always the return type.  The rest
 546      are a zero terminated list of parameters.  */
 547   int parm[5];
 548 };
 549
 550 extern struct spu_builtin_description spu_builtins[];
 551