Add Knights Landing support to __builtin_cpu_is
[official-gcc.git] / gcc / testsuite / gcc.target / i386 / builtin_target.c
blob068db23f9d95d230e9099df69ceb4a4f53df81cd
1 /* This test checks if the __builtin_cpu_is and __builtin_cpu_supports calls
2 are recognized. It also independently uses CPUID to get cpu type and
3 features supported and checks if the builtins correctly identify the
4 platform. The code to do the identification is adapted from
5 libgcc/config/i386/cpuinfo.c. */
7 /* { dg-do run } */
9 #include <assert.h>
10 #include "cpuid.h"
12 /* Check if the Intel CPU model and sub-model are identified. */
13 static void
14 check_intel_cpu_model (unsigned int family, unsigned int model,
15 unsigned int brand_id)
17 /* Parse family and model only if brand ID is 0. */
18 if (brand_id == 0)
20 switch (family)
22 case 0x5:
23 /* Pentium. */
24 break;
25 case 0x6:
26 switch (model)
28 case 0x1c:
29 case 0x26:
30 /* Atom. */
31 assert (__builtin_cpu_is ("atom"));
32 break;
33 case 0x37:
34 case 0x4a:
35 case 0x4d:
36 case 0x5a:
37 case 0x5d:
38 /* Silvermont. */
39 assert (__builtin_cpu_is ("silvermont"));
40 break;
41 case 0x57:
42 /* Knights Landing. */
43 assert (__builtin_cpu_is ("knl"));
44 break;
45 case 0x1a:
46 case 0x1e:
47 case 0x1f:
48 case 0x2e:
49 /* Nehalem. */
50 assert (__builtin_cpu_is ("corei7"));
51 assert (__builtin_cpu_is ("nehalem"));
52 break;
53 case 0x25:
54 case 0x2c:
55 case 0x2f:
56 /* Westmere. */
57 assert (__builtin_cpu_is ("corei7"));
58 assert (__builtin_cpu_is ("westmere"));
59 break;
60 case 0x2a:
61 case 0x2d:
62 /* Sandy Bridge. */
63 assert (__builtin_cpu_is ("corei7"));
64 assert (__builtin_cpu_is ("sandybridge"));
65 break;
66 case 0x3a:
67 case 0x3e:
68 /* Ivy Bridge. */
69 assert (__builtin_cpu_is ("corei7"));
70 assert (__builtin_cpu_is ("ivybridge"));
71 break;
72 case 0x3c:
73 case 0x3f:
74 case 0x45:
75 case 0x46:
76 /* Haswell. */
77 assert (__builtin_cpu_is ("corei7"));
78 assert (__builtin_cpu_is ("haswell"));
79 break;
80 case 0x3d:
81 case 0x47:
82 case 0x4f:
83 case 0x56:
84 /* Broadwell. */
85 assert (__builtin_cpu_is ("corei7"));
86 assert (__builtin_cpu_is ("broadwell"));
87 break;
88 case 0x17:
89 case 0x1d:
90 /* Penryn. */
91 case 0x0f:
92 /* Merom. */
93 assert (__builtin_cpu_is ("core2"));
94 break;
95 default:
96 break;
98 break;
99 default:
100 /* We have no idea. */
101 break;
106 /* Check if the AMD CPU model and sub-model are identified. */
107 static void
108 check_amd_cpu_model (unsigned int family, unsigned int model)
110 switch (family)
112 /* AMD Family 10h. */
113 case 0x10:
114 switch (model)
116 case 0x2:
117 /* Barcelona. */
118 assert (__builtin_cpu_is ("amdfam10h"));
119 assert (__builtin_cpu_is ("barcelona"));
120 break;
121 case 0x4:
122 /* Shanghai. */
123 assert (__builtin_cpu_is ("amdfam10h"));
124 assert (__builtin_cpu_is ("shanghai"));
125 break;
126 case 0x8:
127 /* Istanbul. */
128 assert (__builtin_cpu_is ("amdfam10h"));
129 assert (__builtin_cpu_is ("istanbul"));
130 break;
131 default:
132 break;
134 break;
135 /* AMD Family 15h. */
136 case 0x15:
137 assert (__builtin_cpu_is ("amdfam15h"));
138 /* Bulldozer version 1. */
139 if ( model <= 0xf)
140 assert (__builtin_cpu_is ("bdver1"));
141 /* Bulldozer version 2. */
142 if (model >= 0x10 && model <= 0x1f)
143 assert (__builtin_cpu_is ("bdver2"));
144 break;
145 default:
146 break;
150 /* Check if the ISA features are identified. */
151 static void
152 check_features (unsigned int ecx, unsigned int edx,
153 int max_cpuid_level)
155 if (edx & bit_CMOV)
156 assert (__builtin_cpu_supports ("cmov"));
157 if (edx & bit_MMX)
158 assert (__builtin_cpu_supports ("mmx"));
159 if (edx & bit_SSE)
160 assert (__builtin_cpu_supports ("sse"));
161 if (edx & bit_SSE2)
162 assert (__builtin_cpu_supports ("sse2"));
163 if (ecx & bit_POPCNT)
164 assert (__builtin_cpu_supports ("popcnt"));
165 if (ecx & bit_SSE3)
166 assert (__builtin_cpu_supports ("sse3"));
167 if (ecx & bit_SSSE3)
168 assert (__builtin_cpu_supports ("ssse3"));
169 if (ecx & bit_SSE4_1)
170 assert (__builtin_cpu_supports ("sse4.1"));
171 if (ecx & bit_SSE4_2)
172 assert (__builtin_cpu_supports ("sse4.2"));
173 if (ecx & bit_AVX)
174 assert (__builtin_cpu_supports ("avx"));
176 /* Get advanced features at level 7 (eax = 7, ecx = 0). */
177 if (max_cpuid_level >= 7)
179 unsigned int eax, ebx, ecx, edx;
180 __cpuid_count (7, 0, eax, ebx, ecx, edx);
181 if (ebx & bit_AVX2)
182 assert (__builtin_cpu_supports ("avx2"));
183 if (ebx & bit_AVX512F)
184 assert (__builtin_cpu_supports ("avx512f"));
188 static int __attribute__ ((noinline))
189 __get_cpuid_output (unsigned int __level,
190 unsigned int *__eax, unsigned int *__ebx,
191 unsigned int *__ecx, unsigned int *__edx)
193 return __get_cpuid (__level, __eax, __ebx, __ecx, __edx);
196 static int
197 check_detailed ()
199 unsigned int eax, ebx, ecx, edx;
201 int max_level;
202 unsigned int vendor;
203 unsigned int model, family, brand_id;
204 unsigned int extended_model, extended_family;
206 /* Assume cpuid insn present. Run in level 0 to get vendor id. */
207 if (!__get_cpuid_output (0, &eax, &ebx, &ecx, &edx))
208 return 0;
210 vendor = ebx;
211 max_level = eax;
213 if (max_level < 1)
214 return 0;
216 if (!__get_cpuid_output (1, &eax, &ebx, &ecx, &edx))
217 return 0;
219 model = (eax >> 4) & 0x0f;
220 family = (eax >> 8) & 0x0f;
221 brand_id = ebx & 0xff;
222 extended_model = (eax >> 12) & 0xf0;
223 extended_family = (eax >> 20) & 0xff;
225 if (vendor == signature_INTEL_ebx)
227 assert (__builtin_cpu_is ("intel"));
228 /* Adjust family and model for Intel CPUs. */
229 if (family == 0x0f)
231 family += extended_family;
232 model += extended_model;
234 else if (family == 0x06)
235 model += extended_model;
236 check_intel_cpu_model (family, model, brand_id);
237 check_features (ecx, edx, max_level);
239 else if (vendor == signature_AMD_ebx)
241 assert (__builtin_cpu_is ("amd"));
242 /* Adjust model and family for AMD CPUS. */
243 if (family == 0x0f)
245 family += extended_family;
246 model += (extended_model << 4);
248 check_amd_cpu_model (family, model);
249 check_features (ecx, edx, max_level);
252 return 0;
255 static int
256 quick_check ()
258 /* Check CPU Features. */
259 assert (__builtin_cpu_supports ("cmov") >= 0);
261 assert (__builtin_cpu_supports ("mmx") >= 0);
263 assert (__builtin_cpu_supports ("popcnt") >= 0);
265 assert (__builtin_cpu_supports ("sse") >= 0);
267 assert (__builtin_cpu_supports ("sse2") >= 0);
269 assert (__builtin_cpu_supports ("sse3") >= 0);
271 assert (__builtin_cpu_supports ("ssse3") >= 0);
273 assert (__builtin_cpu_supports ("sse4.1") >= 0);
275 assert (__builtin_cpu_supports ("sse4.2") >= 0);
277 assert (__builtin_cpu_supports ("avx") >= 0);
279 assert (__builtin_cpu_supports ("avx2") >= 0);
281 assert (__builtin_cpu_supports ("avx512f") >= 0);
283 /* Check CPU type. */
284 assert (__builtin_cpu_is ("amd") >= 0);
286 assert (__builtin_cpu_is ("intel") >= 0);
288 assert (__builtin_cpu_is ("atom") >= 0);
290 assert (__builtin_cpu_is ("core2") >= 0);
292 assert (__builtin_cpu_is ("corei7") >= 0);
294 assert (__builtin_cpu_is ("nehalem") >= 0);
296 assert (__builtin_cpu_is ("westmere") >= 0);
298 assert (__builtin_cpu_is ("sandybridge") >= 0);
300 assert (__builtin_cpu_is ("amdfam10h") >= 0);
302 assert (__builtin_cpu_is ("barcelona") >= 0);
304 assert (__builtin_cpu_is ("shanghai") >= 0);
306 assert (__builtin_cpu_is ("istanbul") >= 0);
308 assert (__builtin_cpu_is ("amdfam15h") >= 0);
310 assert (__builtin_cpu_is ("bdver1") >= 0);
312 assert (__builtin_cpu_is ("bdver2") >= 0);
314 return 0;
317 int main ()
319 __builtin_cpu_init ();
320 quick_check ();
321 check_detailed ();
322 return 0;