* varasm.c (assemble_real): Use REAL_VALUE_TO_x and assemble_integer
[official-gcc.git] / gcc / config / arc / arc.h
blobd31ccdbc2527f50982b63e94aa141cb646f8e084
1 /* Definitions of target machine for GNU compiler, Argonaut ARC cpu.
2 Copyright (C) 1994, 1995, 1997, 1998, 1999, 2000, 2001
3 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
22 /* ??? This is an old port, and is undoubtedly suffering from bit rot. */
24 /* Things to do:
26 - PREDICATE_CODES
27 - incscc, decscc?
28 - print active compiler options in assembler output
32 #undef ASM_SPEC
33 #undef LINK_SPEC
34 #undef STARTFILE_SPEC
35 #undef ENDFILE_SPEC
36 #undef SIZE_TYPE
37 #undef PTRDIFF_TYPE
38 #undef WCHAR_TYPE
39 #undef WCHAR_TYPE_SIZE
40 #undef ASM_OUTPUT_LABELREF
42 /* Print subsidiary information on the compiler version in use. */
43 #define TARGET_VERSION fprintf (stderr, " (arc)")
45 /* Names to predefine in the preprocessor for this target machine. */
46 #define CPP_PREDEFINES "-Acpu=arc -Amachine=arc -D__arc__"
48 /* Additional flags for the preprocessor. */
49 #define CPP_SPEC "\
50 %{!mcpu=*:-D__base__} %{mcpu=base:-D__base__} \
51 %{EB:-D__big_endian__} \
54 /* Pass -mmangle-cpu if we get -mcpu=*.
55 Doing it this way lets one have it on as default with -mcpu=*,
56 but also lets one turn it off with -mno-mangle-cpu. */
57 #define CC1_SPEC "\
58 %{mcpu=*:-mmangle-cpu} \
59 %{EB:%{EL:%emay not use both -EB and -EL}} \
60 %{EB:-mbig-endian} %{EL:-mlittle-endian} \
63 #define ASM_SPEC "%{v} %{EB} %{EL}"
65 #define LINK_SPEC "%{v} %{EB} %{EL}"
67 #define STARTFILE_SPEC "%{!shared:crt0.o%s} crtinit.o%s"
69 #define ENDFILE_SPEC "crtfini.o%s"
71 /* Run-time compilation parameters selecting different hardware subsets. */
73 extern int target_flags;
75 /* Mangle all user symbols for the specified cpu.
76 ARC's can be shipped in which a collection of cpus are coupled together.
77 Each CPU may be different in some way, and thus we may need to distinguish
78 code compiled for one to ensure it isn't linked with code compiled for
79 another. */
80 #define TARGET_MASK_MANGLE_CPU 1
81 #define TARGET_MANGLE_CPU (target_flags & TARGET_MASK_MANGLE_CPU)
83 #if 0
84 /* Mangle libgcc symbols by adding a suffix for the specified cpu. */
85 #define TARGET_MASK_MANGLE_CPU_LIBGCC 2
86 #define TARGET_MANGLE_CPU_LIBGCC (target_flags & TARGET_MASK_MANGLE_CPU_LIBGCC)
87 #endif
89 /* Align loops to 32 byte boundaries (cache line size). */
90 #define TARGET_MASK_ALIGN_LOOPS 4
91 #define TARGET_ALIGN_LOOPS (target_flags & TARGET_MASK_ALIGN_LOOPS)
93 /* Big Endian. */
94 #define TARGET_MASK_BIG_ENDIAN 8
95 #define TARGET_BIG_ENDIAN (target_flags & TARGET_MASK_BIG_ENDIAN)
97 /* Turn off conditional execution optimization,
98 so we can see how well it does, or in case it's buggy. */
99 #define TARGET_MASK_NO_COND_EXEC 0x10
100 #define TARGET_NO_COND_EXEC (target_flags & TARGET_MASK_NO_COND_EXEC)
102 /* Macro to define tables used to set the flags.
103 This is a list in braces of pairs in braces,
104 each pair being { "NAME", VALUE }
105 where VALUE is the bits to set or minus the bits to clear.
106 An empty string NAME is used to identify the default VALUE. */
108 #define TARGET_SWITCHES \
110 { "mangle-cpu", TARGET_MASK_MANGLE_CPU }, \
111 { "no-mangle-cpu", -TARGET_MASK_MANGLE_CPU }, \
112 /* { "mangle-cpu-libgcc", TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \
113 /* { "no-mangle-cpu-libgcc", -TARGET_MASK_MANGLE_CPU_LIBGCC }, */ \
114 { "align-loops", TARGET_MASK_ALIGN_LOOPS }, \
115 { "no-align-loops", -TARGET_MASK_ALIGN_LOOPS }, \
116 { "big-endian", TARGET_MASK_BIG_ENDIAN }, \
117 { "little-endian", -TARGET_MASK_BIG_ENDIAN }, \
118 { "no-cond-exec", TARGET_MASK_NO_COND_EXEC }, \
119 SUBTARGET_SWITCHES \
120 { "", TARGET_DEFAULT } \
123 #define TARGET_DEFAULT (0)
125 #define SUBTARGET_SWITCHES
127 /* Instruction set characteristics.
128 These are internal macros, set by the appropriate -mcpu= option. */
130 /* Non-zero means the cpu has a barrel shifter. */
131 #define TARGET_SHIFTER 0
133 /* This macro is similar to `TARGET_SWITCHES' but defines names of
134 command options that have values. Its definition is an
135 initializer with a subgrouping for each command option.
137 Each subgrouping contains a string constant, that defines the
138 fixed part of the option name, and the address of a variable.
139 The variable, type `char *', is set to the variable part of the
140 given option if the fixed part matches. The actual option name
141 is made by appending `-m' to the specified name.
143 Here is an example which defines `-mshort-data-NUMBER'. If the
144 given option is `-mshort-data-512', the variable `m88k_short_data'
145 will be set to the string `"512"'.
147 extern char *m88k_short_data;
148 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
150 extern const char *arc_cpu_string;
151 extern const char *arc_text_string,*arc_data_string,*arc_rodata_string;
153 #define TARGET_OPTIONS \
155 { "cpu=", &arc_cpu_string }, \
156 { "text=", &arc_text_string }, \
157 { "data=", &arc_data_string }, \
158 { "rodata=", &arc_rodata_string }, \
161 /* Which cpu we're compiling for. */
162 extern int arc_cpu_type;
164 /* Check if CPU is an extension and set `arc_cpu_type' and `arc_mangle_cpu'
165 appropriately. The result should be non-zero if the cpu is recognized,
166 otherwise zero. This is intended to be redefined in a cover file.
167 This is used by arc_init. */
168 #define ARC_EXTENSION_CPU(cpu) 0
170 /* Sometimes certain combinations of command options do not make
171 sense on a particular target machine. You can define a macro
172 `OVERRIDE_OPTIONS' to take account of this. This macro, if
173 defined, is executed once just after all the command options have
174 been parsed.
176 Don't use this macro to turn on various extra optimizations for
177 `-O'. That is what `OPTIMIZATION_OPTIONS' is for. */
180 #define OVERRIDE_OPTIONS \
181 do { \
182 /* These need to be done at start up. It's convenient to do them here. */ \
183 arc_init (); \
184 } while (0)
186 /* Target machine storage layout. */
188 /* Define to use software floating point emulator for REAL_ARITHMETIC and
189 decimal <-> binary conversion. */
190 #define REAL_ARITHMETIC
192 /* Define this if most significant bit is lowest numbered
193 in instructions that operate on numbered bit-fields. */
194 #define BITS_BIG_ENDIAN 1
196 /* Define this if most significant byte of a word is the lowest numbered. */
197 #define BYTES_BIG_ENDIAN (TARGET_BIG_ENDIAN)
199 /* Define this if most significant word of a multiword number is the lowest
200 numbered. */
201 #define WORDS_BIG_ENDIAN (TARGET_BIG_ENDIAN)
203 /* Define this to set the endianness to use in libgcc2.c, which can
204 not depend on target_flags. */
205 #ifdef __big_endian__
206 #define LIBGCC2_WORDS_BIG_ENDIAN 1
207 #else
208 #define LIBGCC2_WORDS_BIG_ENDIAN 0
209 #endif
211 /* Number of bits in an addressable storage unit. */
212 #define BITS_PER_UNIT 8
214 /* Width in bits of a "word", which is the contents of a machine register.
215 Note that this is not necessarily the width of data type `int';
216 if using 16-bit ints on a 68000, this would still be 32.
217 But on a machine with 16-bit registers, this would be 16. */
218 #define BITS_PER_WORD 32
220 /* Width of a word, in units (bytes). */
221 #define UNITS_PER_WORD 4
223 /* Define this macro if it is advisable to hold scalars in registers
224 in a wider mode than that declared by the program. In such cases,
225 the value is constrained to be within the bounds of the declared
226 type, but kept valid in the wider mode. The signedness of the
227 extension may differ from that of the type. */
228 #define PROMOTE_MODE(MODE,UNSIGNEDP,TYPE) \
229 if (GET_MODE_CLASS (MODE) == MODE_INT \
230 && GET_MODE_SIZE (MODE) < UNITS_PER_WORD) \
232 (MODE) = SImode; \
235 /* Define this macro if the promotion described by `PROMOTE_MODE'
236 should also be done for outgoing function arguments. */
237 #define PROMOTE_FUNCTION_ARGS
239 /* Likewise, if the function return value is promoted. */
240 #define PROMOTE_FUNCTION_RETURN
242 /* Width in bits of a pointer.
243 See also the macro `Pmode' defined below. */
244 #define POINTER_SIZE 32
246 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
247 #define PARM_BOUNDARY 32
249 /* Boundary (in *bits*) on which stack pointer should be aligned. */
250 #define STACK_BOUNDARY 64
252 /* ALIGN FRAMES on word boundaries */
253 #define ARC_STACK_ALIGN(LOC) (((LOC)+7) & ~7)
255 /* Allocation boundary (in *bits*) for the code of a function. */
256 #define FUNCTION_BOUNDARY 32
258 /* Alignment of field after `int : 0' in a structure. */
259 #define EMPTY_FIELD_BOUNDARY 32
261 /* Every structure's size must be a multiple of this. */
262 #define STRUCTURE_SIZE_BOUNDARY 8
264 /* A bitfield declared as `int' forces `int' alignment for the struct. */
265 #define PCC_BITFIELD_TYPE_MATTERS 1
267 /* No data type wants to be aligned rounder than this. */
268 /* This is bigger than currently necessary for the ARC. If 8 byte floats are
269 ever added it's not clear whether they'll need such alignment or not. For
270 now we assume they will. We can always relax it if necessary but the
271 reverse isn't true. */
272 #define BIGGEST_ALIGNMENT 64
274 /* The best alignment to use in cases where we have a choice. */
275 #define FASTEST_ALIGNMENT 32
277 /* Make strings word-aligned so strcpy from constants will be faster. */
278 #define CONSTANT_ALIGNMENT(EXP, ALIGN) \
279 ((TREE_CODE (EXP) == STRING_CST \
280 && (ALIGN) < FASTEST_ALIGNMENT) \
281 ? FASTEST_ALIGNMENT : (ALIGN))
283 /* Make arrays of chars word-aligned for the same reasons. */
284 #define DATA_ALIGNMENT(TYPE, ALIGN) \
285 (TREE_CODE (TYPE) == ARRAY_TYPE \
286 && TYPE_MODE (TREE_TYPE (TYPE)) == QImode \
287 && (ALIGN) < FASTEST_ALIGNMENT ? FASTEST_ALIGNMENT : (ALIGN))
289 /* Set this nonzero if move instructions will actually fail to work
290 when given unaligned data. */
291 /* On the ARC the lower address bits are masked to 0 as necessary. The chip
292 won't croak when given an unaligned address, but the insn will still fail
293 to produce the correct result. */
294 #define STRICT_ALIGNMENT 1
296 /* Layout of source language data types. */
298 #define SHORT_TYPE_SIZE 16
299 #define INT_TYPE_SIZE 32
300 #define LONG_TYPE_SIZE 32
301 #define LONG_LONG_TYPE_SIZE 64
302 #define FLOAT_TYPE_SIZE 32
303 #define DOUBLE_TYPE_SIZE 64
304 #define LONG_DOUBLE_TYPE_SIZE 64
306 /* Define this as 1 if `char' should by default be signed; else as 0. */
307 #define DEFAULT_SIGNED_CHAR 1
309 #define SIZE_TYPE "long unsigned int"
310 #define PTRDIFF_TYPE "long int"
311 #define WCHAR_TYPE "short unsigned int"
312 #define WCHAR_TYPE_SIZE 16
314 /* Standard register usage. */
316 /* Number of actual hardware registers.
317 The hardware registers are assigned numbers for the compiler
318 from 0 to just below FIRST_PSEUDO_REGISTER.
319 All registers that the compiler knows about must be given numbers,
320 even those that are not normally considered general registers. */
321 /* Registers 61, 62, and 63 are not really registers and we needn't treat
322 them as such. We still need a register for the condition code. */
323 #define FIRST_PSEUDO_REGISTER 62
325 /* 1 for registers that have pervasive standard uses
326 and are not available for the register allocator.
328 0-28 - general purpose registers
329 29 - ilink1 (interrupt link register)
330 30 - ilink2 (interrupt link register)
331 31 - blink (branch link register)
332 32-59 - reserved for extensions
333 60 - LP_COUNT
334 61 - condition code
336 For doc purposes:
337 61 - short immediate data indicator (setting flags)
338 62 - long immediate data indicator
339 63 - short immediate data indicator (not setting flags).
341 The general purpose registers are further broken down into:
342 0-7 - arguments/results
343 8-15 - call used
344 16-23 - call saved
345 24 - call used, static chain pointer
346 25 - call used, gptmp
347 26 - global pointer
348 27 - frame pointer
349 28 - stack pointer
351 By default, the extension registers are not available. */
353 #define FIXED_REGISTERS \
354 { 0, 0, 0, 0, 0, 0, 0, 0, \
355 0, 0, 0, 0, 0, 0, 0, 0, \
356 0, 0, 0, 0, 0, 0, 0, 0, \
357 0, 0, 0, 1, 1, 1, 1, 0, \
359 1, 1, 1, 1, 1, 1, 1, 1, \
360 1, 1, 1, 1, 1, 1, 1, 1, \
361 1, 1, 1, 1, 1, 1, 1, 1, \
362 1, 1, 1, 1, 1, 1 }
364 /* 1 for registers not available across function calls.
365 These must include the FIXED_REGISTERS and also any
366 registers that can be used without being saved.
367 The latter must include the registers where values are returned
368 and the register where structure-value addresses are passed.
369 Aside from that, you can include as many other registers as you like. */
371 #define CALL_USED_REGISTERS \
372 { 1, 1, 1, 1, 1, 1, 1, 1, \
373 1, 1, 1, 1, 1, 1, 1, 1, \
374 0, 0, 0, 0, 0, 0, 0, 0, \
375 1, 1, 1, 1, 1, 1, 1, 1, \
377 1, 1, 1, 1, 1, 1, 1, 1, \
378 1, 1, 1, 1, 1, 1, 1, 1, \
379 1, 1, 1, 1, 1, 1, 1, 1, \
380 1, 1, 1, 1, 1, 1 }
382 /* If defined, an initializer for a vector of integers, containing the
383 numbers of hard registers in the order in which GNU CC should
384 prefer to use them (from most preferred to least). */
385 #define REG_ALLOC_ORDER \
386 { 2, 3, 4, 5, 6, 7, 8, 9, 10, 11, 12, 13, 14, 15, 0, 1, \
387 16, 17, 18, 19, 20, 21, 22, 23, 24, 25, 26, 31, \
388 32, 33, 34, 35, 36, 37, 38, 39, 40, 41, 42, 43, 44, 45, 46, 47, \
389 48, 49, 50, 51, 52, 53, 54, 55, 56, 57, 58, 59, 60, 61, \
390 27, 28, 29, 30 }
392 /* Return number of consecutive hard regs needed starting at reg REGNO
393 to hold something of mode MODE.
394 This is ordinarily the length in words of a value of mode MODE
395 but can be less for certain modes in special long registers. */
396 #define HARD_REGNO_NREGS(REGNO, MODE) \
397 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
399 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
400 extern unsigned int arc_hard_regno_mode_ok[];
401 extern unsigned int arc_mode_class[];
402 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
403 ((arc_hard_regno_mode_ok[REGNO] & arc_mode_class[MODE]) != 0)
405 /* A C expression that is nonzero if it is desirable to choose
406 register allocation so as to avoid move instructions between a
407 value of mode MODE1 and a value of mode MODE2.
409 If `HARD_REGNO_MODE_OK (R, MODE1)' and `HARD_REGNO_MODE_OK (R,
410 MODE2)' are ever different for any R, then `MODES_TIEABLE_P (MODE1,
411 MODE2)' must be zero. */
413 /* Tie QI/HI/SI modes together. */
414 #define MODES_TIEABLE_P(MODE1, MODE2) \
415 (GET_MODE_CLASS (MODE1) == MODE_INT \
416 && GET_MODE_CLASS (MODE2) == MODE_INT \
417 && GET_MODE_SIZE (MODE1) <= UNITS_PER_WORD \
418 && GET_MODE_SIZE (MODE2) <= UNITS_PER_WORD)
420 /* Register classes and constants. */
422 /* Define the classes of registers for register constraints in the
423 machine description. Also define ranges of constants.
425 One of the classes must always be named ALL_REGS and include all hard regs.
426 If there is more than one class, another class must be named NO_REGS
427 and contain no registers.
429 The name GENERAL_REGS must be the name of a class (or an alias for
430 another name such as ALL_REGS). This is the class of registers
431 that is allowed by "g" or "r" in a register constraint.
432 Also, registers outside this class are allocated only when
433 instructions express preferences for them.
435 The classes must be numbered in nondecreasing order; that is,
436 a larger-numbered class must never be contained completely
437 in a smaller-numbered class.
439 For any two classes, it is very desirable that there be another
440 class that represents their union.
442 It is important that any condition codes have class NO_REGS.
443 See `register_operand'. */
445 enum reg_class {
446 NO_REGS, LPCOUNT_REG, GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
449 #define N_REG_CLASSES (int) LIM_REG_CLASSES
451 /* Give names of register classes as strings for dump file. */
452 #define REG_CLASS_NAMES \
453 { "NO_REGS", "LPCOUNT_REG", "GENERAL_REGS", "ALL_REGS" }
455 /* Define which registers fit in which classes.
456 This is an initializer for a vector of HARD_REG_SET
457 of length N_REG_CLASSES. */
459 #define REG_CLASS_CONTENTS \
460 { {0, 0}, {0, 0x10000000}, {0xffffffff, 0xfffffff}, \
461 {0xffffffff, 0x1fffffff} }
463 /* The same information, inverted:
464 Return the class number of the smallest class containing
465 reg number REGNO. This could be a conditional expression
466 or could index an array. */
467 extern enum reg_class arc_regno_reg_class[];
468 #define REGNO_REG_CLASS(REGNO) \
469 (arc_regno_reg_class[REGNO])
471 /* The class value for index registers, and the one for base regs. */
472 #define INDEX_REG_CLASS GENERAL_REGS
473 #define BASE_REG_CLASS GENERAL_REGS
475 /* Get reg_class from a letter such as appears in the machine description. */
476 #define REG_CLASS_FROM_LETTER(C) \
477 ((C) == 'l' ? LPCOUNT_REG /* ??? needed? */ \
478 : NO_REGS)
480 /* These assume that REGNO is a hard or pseudo reg number.
481 They give nonzero only if REGNO is a hard reg of the suitable class
482 or a pseudo reg currently allocated to a suitable hard reg.
483 Since they use reg_renumber, they are safe only once reg_renumber
484 has been allocated, which happens in local-alloc.c. */
485 #define REGNO_OK_FOR_BASE_P(REGNO) \
486 ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29)
487 #define REGNO_OK_FOR_INDEX_P(REGNO) \
488 ((REGNO) < 29 || (unsigned) reg_renumber[REGNO] < 29)
490 /* Given an rtx X being reloaded into a reg required to be
491 in class CLASS, return the class of reg to actually use.
492 In general this is just CLASS; but on some machines
493 in some cases it is preferable to use a more restrictive class. */
494 #define PREFERRED_RELOAD_CLASS(X,CLASS) \
495 (CLASS)
497 /* Return the maximum number of consecutive registers
498 needed to represent mode MODE in a register of class CLASS. */
499 #define CLASS_MAX_NREGS(CLASS, MODE) \
500 ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
502 /* The letters I, J, K, L, M, N, O, P in a register constraint string
503 can be used to stand for particular ranges of immediate operands.
504 This macro defines what the ranges are.
505 C is the letter, and VALUE is a constant value.
506 Return 1 if VALUE is in the range specified by C. */
507 /* 'I' is used for short immediates (always signed).
508 'J' is used for long immediates.
509 'K' is used for any constant up to 64 bits (for 64x32 situations?). */
511 /* local to this file */
512 #define SMALL_INT(X) ((unsigned) ((X) + 0x100) < 0x200)
513 /* local to this file */
514 #define LARGE_INT(X) \
515 ((X) >= (-(HOST_WIDE_INT) 0x7fffffff - 1) \
516 && (X) <= (unsigned HOST_WIDE_INT) 0xffffffff)
518 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
519 ((C) == 'I' ? SMALL_INT (VALUE) \
520 : (C) == 'J' ? LARGE_INT (VALUE) \
521 : (C) == 'K' ? 1 \
522 : 0)
524 /* Similar, but for floating constants, and defining letters G and H.
525 Here VALUE is the CONST_DOUBLE rtx itself. */
526 /* 'G' is used for integer values for the multiplication insns where the
527 operands are extended from 4 bytes to 8 bytes.
528 'H' is used when any 64 bit constant is allowed. */
529 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) \
530 ((C) == 'G' ? arc_double_limm_p (VALUE) \
531 : (C) == 'H' ? 1 \
532 : 0)
534 /* A C expression that defines the optional machine-dependent constraint
535 letters that can be used to segregate specific types of operands,
536 usually memory references, for the target machine. It should return 1 if
537 VALUE corresponds to the operand type represented by the constraint letter
538 C. If C is not defined as an extra constraint, the value returned should
539 be 0 regardless of VALUE. */
540 /* ??? This currently isn't used. Waiting for PIC. */
541 #if 0
542 #define EXTRA_CONSTRAINT(VALUE, C) \
543 ((C) == 'R' ? (SYMBOL_REF_FLAG (VALUE) || GET_CODE (VALUE) == LABEL_REF) \
544 : 0)
545 #endif
547 /* Stack layout and stack pointer usage. */
549 /* Define this macro if pushing a word onto the stack moves the stack
550 pointer to a smaller address. */
551 #define STACK_GROWS_DOWNWARD
553 /* Define this if the nominal address of the stack frame
554 is at the high-address end of the local variables;
555 that is, each additional local variable allocated
556 goes at a more negative offset in the frame. */
557 #define FRAME_GROWS_DOWNWARD
559 /* Offset within stack frame to start allocating local variables at.
560 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
561 first local allocated. Otherwise, it is the offset to the BEGINNING
562 of the first local allocated. */
563 #define STARTING_FRAME_OFFSET 0
565 /* Offset from the stack pointer register to the first location at which
566 outgoing arguments are placed. */
567 #define STACK_POINTER_OFFSET FIRST_PARM_OFFSET (0)
569 /* Offset of first parameter from the argument pointer register value. */
570 /* 4 bytes for each of previous fp, return address, and previous gp.
571 4 byte reserved area for future considerations. */
572 #define FIRST_PARM_OFFSET(FNDECL) 16
574 /* A C expression whose value is RTL representing the address in a
575 stack frame where the pointer to the caller's frame is stored.
576 Assume that FRAMEADDR is an RTL expression for the address of the
577 stack frame itself.
579 If you don't define this macro, the default is to return the value
580 of FRAMEADDR--that is, the stack frame address is also the address
581 of the stack word that points to the previous frame. */
582 /* ??? unfinished */
583 /*define DYNAMIC_CHAIN_ADDRESS (FRAMEADDR)*/
585 /* A C expression whose value is RTL representing the value of the
586 return address for the frame COUNT steps up from the current frame.
587 FRAMEADDR is the frame pointer of the COUNT frame, or the frame
588 pointer of the COUNT - 1 frame if `RETURN_ADDR_IN_PREVIOUS_FRAME'
589 is defined. */
590 /* The current return address is in r31. The return address of anything
591 farther back is at [%fp,4]. */
592 #if 0 /* The default value should work. */
593 #define RETURN_ADDR_RTX(COUNT, FRAME) \
594 (((COUNT) == -1) \
595 ? gen_rtx_REG (Pmode, 31) \
596 : copy_to_reg (gen_rtx_MEM (Pmode, \
597 memory_address (Pmode, \
598 plus_constant ((FRAME), \
599 UNITS_PER_WORD)))))
600 #endif
602 /* Register to use for pushing function arguments. */
603 #define STACK_POINTER_REGNUM 28
605 /* Base register for access to local variables of the function. */
606 #define FRAME_POINTER_REGNUM 27
608 /* Base register for access to arguments of the function. */
609 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
611 /* Register in which static-chain is passed to a function. This must
612 not be a register used by the prologue. */
613 #define STATIC_CHAIN_REGNUM 24
615 /* A C expression which is nonzero if a function must have and use a
616 frame pointer. This expression is evaluated in the reload pass.
617 If its value is nonzero the function will have a frame pointer. */
618 #define FRAME_POINTER_REQUIRED \
619 (current_function_calls_alloca)
621 /* C statement to store the difference between the frame pointer
622 and the stack pointer values immediately after the function prologue. */
623 #define INITIAL_FRAME_POINTER_OFFSET(VAR) \
624 ((VAR) = arc_compute_frame_size (get_frame_size ()))
626 /* Function argument passing. */
628 /* When a prototype says `char' or `short', really pass an `int'. */
629 #define PROMOTE_PROTOTYPES 1
631 /* If defined, the maximum amount of space required for outgoing
632 arguments will be computed and placed into the variable
633 `current_function_outgoing_args_size'. No space will be pushed
634 onto the stack for each call; instead, the function prologue should
635 increase the stack frame size by this amount. */
636 #define ACCUMULATE_OUTGOING_ARGS 1
638 /* Value is the number of bytes of arguments automatically
639 popped when returning from a subroutine call.
640 FUNDECL is the declaration node of the function (as a tree),
641 FUNTYPE is the data type of the function (as a tree),
642 or for a library call it is an identifier node for the subroutine name.
643 SIZE is the number of bytes of arguments passed on the stack. */
644 #define RETURN_POPS_ARGS(DECL, FUNTYPE, SIZE) 0
646 /* Define a data type for recording info about an argument list
647 during the scan of that argument list. This data type should
648 hold all necessary information about the function itself
649 and about the args processed so far, enough to enable macros
650 such as FUNCTION_ARG to determine where the next arg should go. */
651 #define CUMULATIVE_ARGS int
653 /* Initialize a variable CUM of type CUMULATIVE_ARGS
654 for a call to a function whose data type is FNTYPE.
655 For a library call, FNTYPE is 0. */
656 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) \
657 ((CUM) = 0)
659 /* The number of registers used for parameter passing. Local to this file. */
660 #define MAX_ARC_PARM_REGS 8
662 /* 1 if N is a possible register number for function argument passing. */
663 #define FUNCTION_ARG_REGNO_P(N) \
664 ((unsigned) (N) < MAX_ARC_PARM_REGS)
666 /* The ROUND_ADVANCE* macros are local to this file. */
667 /* Round SIZE up to a word boundary. */
668 #define ROUND_ADVANCE(SIZE) \
669 (((SIZE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
671 /* Round arg MODE/TYPE up to the next word boundary. */
672 #define ROUND_ADVANCE_ARG(MODE, TYPE) \
673 ((MODE) == BLKmode \
674 ? ROUND_ADVANCE (int_size_in_bytes (TYPE)) \
675 : ROUND_ADVANCE (GET_MODE_SIZE (MODE)))
677 /* Round CUM up to the necessary point for argument MODE/TYPE. */
678 #define ROUND_ADVANCE_CUM(CUM, MODE, TYPE) \
679 ((((MODE) == BLKmode ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) \
680 > BITS_PER_WORD) \
681 ? (((CUM) + 1) & ~1) \
682 : (CUM))
684 /* Return boolean indicating arg of type TYPE and mode MODE will be passed in
685 a reg. This includes arguments that have to be passed by reference as the
686 pointer to them is passed in a reg if one is available (and that is what
687 we're given).
688 When passing arguments NAMED is always 1. When receiving arguments NAMED
689 is 1 for each argument except the last in a stdarg/varargs function. In
690 a stdarg function we want to treat the last named arg as named. In a
691 varargs function we want to treat the last named arg (which is
692 `__builtin_va_alist') as unnamed.
693 This macro is only used in this file. */
694 #define PASS_IN_REG_P(CUM, MODE, TYPE, NAMED) \
695 ((!current_function_varargs || (NAMED)) \
696 && (CUM) < MAX_ARC_PARM_REGS \
697 && ((ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
698 + ROUND_ADVANCE_ARG ((MODE), (TYPE)) \
699 <= MAX_ARC_PARM_REGS)))
701 /* Determine where to put an argument to a function.
702 Value is zero to push the argument on the stack,
703 or a hard register in which to store the argument.
705 MODE is the argument's machine mode.
706 TYPE is the data type of the argument (as a tree).
707 This is null for libcalls where that information may
708 not be available.
709 CUM is a variable of type CUMULATIVE_ARGS which gives info about
710 the preceding args and about the function being called.
711 NAMED is nonzero if this argument is a named parameter
712 (otherwise it is an extra parameter matching an ellipsis). */
713 /* On the ARC the first MAX_ARC_PARM_REGS args are normally in registers
714 and the rest are pushed. */
715 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
716 (PASS_IN_REG_P ((CUM), (MODE), (TYPE), (NAMED)) \
717 ? gen_rtx_REG ((MODE), ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE))) \
718 : 0)
720 /* A C expression for the number of words, at the beginning of an
721 argument, must be put in registers. The value must be zero for
722 arguments that are passed entirely in registers or that are entirely
723 pushed on the stack.
725 On some machines, certain arguments must be passed partially in
726 registers and partially in memory. On these machines, typically the
727 first @var{n} words of arguments are passed in registers, and the rest
728 on the stack. If a multi-word argument (a @code{double} or a
729 structure) crosses that boundary, its first few words must be passed
730 in registers and the rest must be pushed. This macro tells the
731 compiler when this occurs, and how many of the words should go in
732 registers. */
733 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) 0
735 /* A C expression that indicates when an argument must be passed by
736 reference. If nonzero for an argument, a copy of that argument is
737 made in memory and a pointer to the argument is passed instead of
738 the argument itself. The pointer is passed in whatever way is
739 appropriate for passing a pointer to that type. */
740 /* All aggregates and arguments greater than 8 bytes are passed this way. */
741 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
742 (TYPE \
743 && (AGGREGATE_TYPE_P (TYPE) \
744 || int_size_in_bytes (TYPE) > 8))
746 /* A C expression that indicates when it is the called function's
747 responsibility to make copies of arguments passed by reference.
748 If the callee can determine that the argument won't be modified, it can
749 avoid the copy. */
750 /* ??? We'd love to be able to use NAMED here. Unfortunately, it doesn't
751 include the last named argument so we keep track of the args ourselves. */
753 #define FUNCTION_ARG_CALLEE_COPIES(CUM, MODE, TYPE, NAMED) \
754 FUNCTION_ARG_PASS_BY_REFERENCE ((CUM), (MODE), (TYPE), (NAMED))
756 /* Update the data in CUM to advance over an argument
757 of mode MODE and data type TYPE.
758 (TYPE is null for libcalls where that information may not be available.) */
759 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
760 ((CUM) = (ROUND_ADVANCE_CUM ((CUM), (MODE), (TYPE)) \
761 + ROUND_ADVANCE_ARG ((MODE), (TYPE))))
763 /* If defined, a C expression that gives the alignment boundary, in bits,
764 of an argument with the specified mode and type. If it is not defined,
765 PARM_BOUNDARY is used for all arguments. */
766 #define FUNCTION_ARG_BOUNDARY(MODE, TYPE) \
767 (((TYPE) ? TYPE_ALIGN (TYPE) : GET_MODE_BITSIZE (MODE)) <= PARM_BOUNDARY \
768 ? PARM_BOUNDARY \
769 : 2 * PARM_BOUNDARY)
771 /* This macro offers an alternative
772 to using `__builtin_saveregs' and defining the macro
773 `EXPAND_BUILTIN_SAVEREGS'. Use it to store the anonymous register
774 arguments into the stack so that all the arguments appear to have
775 been passed consecutively on the stack. Once this is done, you
776 can use the standard implementation of varargs that works for
777 machines that pass all their arguments on the stack.
779 The argument ARGS_SO_FAR is the `CUMULATIVE_ARGS' data structure,
780 containing the values that obtain after processing of the named
781 arguments. The arguments MODE and TYPE describe the last named
782 argument--its machine mode and its data type as a tree node.
784 The macro implementation should do two things: first, push onto the
785 stack all the argument registers *not* used for the named
786 arguments, and second, store the size of the data thus pushed into
787 the `int'-valued variable whose name is supplied as the argument
788 PRETEND_SIZE. The value that you store here will serve as
789 additional offset for setting up the stack frame.
791 If the argument NO_RTL is nonzero, it means that the
792 arguments of the function are being analyzed for the second time.
793 This happens for an inline function, which is not actually
794 compiled until the end of the source file. The macro
795 `SETUP_INCOMING_VARARGS' should not generate any instructions in
796 this case. */
798 #define SETUP_INCOMING_VARARGS(ARGS_SO_FAR, MODE, TYPE, PRETEND_SIZE, NO_RTL) \
799 arc_setup_incoming_varargs(&ARGS_SO_FAR, MODE, TYPE, &PRETEND_SIZE, NO_RTL)
801 /* Function results. */
803 /* Define how to find the value returned by a function.
804 VALTYPE is the data type of the value (as a tree).
805 If the precise function being called is known, FUNC is its FUNCTION_DECL;
806 otherwise, FUNC is 0. */
807 #define FUNCTION_VALUE(VALTYPE, FUNC) gen_rtx_REG (TYPE_MODE (VALTYPE), 0)
809 /* Define how to find the value returned by a library function
810 assuming the value has mode MODE. */
811 #define LIBCALL_VALUE(MODE) gen_rtx_REG (MODE, 0)
813 /* 1 if N is a possible register number for a function value
814 as seen by the caller. */
815 /* ??? What about r1 in DI/DF values. */
816 #define FUNCTION_VALUE_REGNO_P(N) ((N) == 0)
818 /* A C expression which can inhibit the returning of certain function
819 values in registers, based on the type of value. A nonzero value says
820 to return the function value in memory, just as large structures are
821 always returned. Here TYPE will be a C expression of type `tree',
822 representing the data type of the value. */
823 #define RETURN_IN_MEMORY(TYPE) \
824 (AGGREGATE_TYPE_P (TYPE) \
825 || int_size_in_bytes (TYPE) > 8 \
826 || TREE_ADDRESSABLE (TYPE))
828 /* Tell GCC to use RETURN_IN_MEMORY. */
829 #define DEFAULT_PCC_STRUCT_RETURN 0
831 /* Register in which address to store a structure value
832 is passed to a function, or 0 to use `invisible' first argument. */
833 #define STRUCT_VALUE 0
835 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
836 the stack pointer does not matter. The value is tested only in
837 functions that have frame pointers.
838 No definition is equivalent to always zero. */
839 #define EXIT_IGNORE_STACK 0
841 /* Epilogue delay slots. */
842 #define DELAY_SLOTS_FOR_EPILOGUE arc_delay_slots_for_epilogue ()
844 #define ELIGIBLE_FOR_EPILOGUE_DELAY(TRIAL, SLOTS_FILLED) \
845 arc_eligible_for_epilogue_delay (TRIAL, SLOTS_FILLED)
847 /* Output assembler code to FILE to increment profiler label # LABELNO
848 for profiling a function entry. */
849 #define FUNCTION_PROFILER(FILE, LABELNO)
851 /* Trampolines. */
852 /* ??? This doesn't work yet because GCC will use as the address of a nested
853 function the address of the trampoline. We need to use that address
854 right shifted by 2. It looks like we'll need PSImode after all. :-( */
856 /* Output assembler code for a block containing the constant parts
857 of a trampoline, leaving space for the variable parts. */
858 /* On the ARC, the trampoline is quite simple as we have 32 bit immediate
859 constants.
861 mov r24,STATIC
862 j.nd FUNCTION
864 #define TRAMPOLINE_TEMPLATE(FILE) \
865 do { \
866 assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x631f7c00)); \
867 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
868 assemble_aligned_integer (UNITS_PER_WORD, GEN_INT (0x381f0000)); \
869 assemble_aligned_integer (UNITS_PER_WORD, const0_rtx); \
870 } while (0)
872 /* Length in units of the trampoline for entering a nested function. */
873 #define TRAMPOLINE_SIZE 16
875 /* Emit RTL insns to initialize the variable parts of a trampoline.
876 FNADDR is an RTX for the address of the function's pure code.
877 CXT is an RTX for the static chain value for the function. */
878 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
879 do { \
880 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 4)), CXT); \
881 emit_move_insn (gen_rtx_MEM (SImode, plus_constant (TRAMP, 12)), FNADDR); \
882 emit_insn (gen_flush_icache (validize_mem (gen_rtx_MEM (SImode, TRAMP)))); \
883 } while (0)
885 /* Library calls. */
887 /* Generate calls to memcpy, memcmp and memset. */
888 #define TARGET_MEM_FUNCTIONS
890 /* Addressing modes, and classification of registers for them. */
892 /* Maximum number of registers that can appear in a valid memory address. */
893 /* The `ld' insn allows 2, but the `st' insn only allows 1. */
894 #define MAX_REGS_PER_ADDRESS 1
896 /* We have pre inc/dec (load/store with update). */
897 #define HAVE_PRE_INCREMENT 1
898 #define HAVE_PRE_DECREMENT 1
900 /* Recognize any constant value that is a valid address. */
901 #define CONSTANT_ADDRESS_P(X) \
902 (GET_CODE (X) == LABEL_REF || GET_CODE (X) == SYMBOL_REF \
903 || GET_CODE (X) == CONST_INT || GET_CODE (X) == CONST)
905 /* Nonzero if the constant value X is a legitimate general operand.
906 We can handle any 32 or 64 bit constant. */
907 /* "1" should work since the largest constant should be a 64 bit critter. */
908 /* ??? Not sure what to do for 64x32 compiler. */
909 #define LEGITIMATE_CONSTANT_P(X) 1
911 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
912 and check its validity for a certain class.
913 We have two alternate definitions for each of them.
914 The usual definition accepts all pseudo regs; the other rejects
915 them unless they have been allocated suitable hard regs.
916 The symbol REG_OK_STRICT causes the latter definition to be used.
918 Most source files want to accept pseudo regs in the hope that
919 they will get allocated to the class that the insn wants them to be in.
920 Source files for reload pass need to be strict.
921 After reload, it makes no difference, since pseudo regs have
922 been eliminated by then. */
924 #ifndef REG_OK_STRICT
926 /* Nonzero if X is a hard reg that can be used as an index
927 or if it is a pseudo reg. */
928 #define REG_OK_FOR_INDEX_P(X) \
929 ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29)
930 /* Nonzero if X is a hard reg that can be used as a base reg
931 or if it is a pseudo reg. */
932 #define REG_OK_FOR_BASE_P(X) \
933 ((unsigned) REGNO (X) - 29 >= FIRST_PSEUDO_REGISTER - 29)
935 #else
937 /* Nonzero if X is a hard reg that can be used as an index. */
938 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
939 /* Nonzero if X is a hard reg that can be used as a base reg. */
940 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
942 #endif
944 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
945 that is a valid memory address for an instruction.
946 The MODE argument is the machine mode for the MEM expression
947 that wants to use this address. */
948 /* The `ld' insn allows [reg],[reg+shimm],[reg+limm],[reg+reg],[limm]
949 but the `st' insn only allows [reg],[reg+shimm],[limm].
950 The only thing we can do is only allow the most strict case `st' and hope
951 other parts optimize out the restrictions for `ld'. */
953 /* local to this file */
954 #define RTX_OK_FOR_BASE_P(X) \
955 (REG_P (X) && REG_OK_FOR_BASE_P (X))
957 /* local to this file */
958 #define RTX_OK_FOR_INDEX_P(X) \
959 (0 && /*???*/ REG_P (X) && REG_OK_FOR_INDEX_P (X))
961 /* local to this file */
962 /* ??? Loads can handle any constant, stores can only handle small ones. */
963 #define RTX_OK_FOR_OFFSET_P(X) \
964 (GET_CODE (X) == CONST_INT && SMALL_INT (INTVAL (X)))
966 #define LEGITIMATE_OFFSET_ADDRESS_P(MODE, X) \
967 (GET_CODE (X) == PLUS \
968 && RTX_OK_FOR_BASE_P (XEXP (X, 0)) \
969 && (RTX_OK_FOR_INDEX_P (XEXP (X, 1)) \
970 || RTX_OK_FOR_OFFSET_P (XEXP (X, 1))))
972 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
973 { if (RTX_OK_FOR_BASE_P (X)) \
974 goto ADDR; \
975 if (LEGITIMATE_OFFSET_ADDRESS_P ((MODE), (X))) \
976 goto ADDR; \
977 if (GET_CODE (X) == CONST_INT && LARGE_INT (INTVAL (X))) \
978 goto ADDR; \
979 if (GET_CODE (X) == SYMBOL_REF \
980 || GET_CODE (X) == LABEL_REF \
981 || GET_CODE (X) == CONST) \
982 goto ADDR; \
983 if ((GET_CODE (X) == PRE_DEC || GET_CODE (X) == PRE_INC) \
984 /* We're restricted here by the `st' insn. */ \
985 && RTX_OK_FOR_BASE_P (XEXP ((X), 0))) \
986 goto ADDR; \
989 /* Try machine-dependent ways of modifying an illegitimate address
990 to be legitimate. If we find one, return the new, valid address.
991 This macro is used in only one place: `memory_address' in explow.c.
993 OLDX is the address as it was before break_out_memory_refs was called.
994 In some cases it is useful to look at this to decide what needs to be done.
996 MODE and WIN are passed so that this macro can use
997 GO_IF_LEGITIMATE_ADDRESS.
999 It is always safe for this macro to do nothing. It exists to recognize
1000 opportunities to optimize the output. */
1002 #define LEGITIMIZE_ADDRESS(X, OLDX, MODE, WIN)
1004 /* Go to LABEL if ADDR (a legitimate address expression)
1005 has an effect that depends on the machine mode it is used for. */
1006 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR, LABEL) \
1007 { if (GET_CODE (ADDR) == PRE_DEC) \
1008 goto LABEL; \
1009 if (GET_CODE (ADDR) == PRE_INC) \
1010 goto LABEL; \
1013 /* Condition code usage. */
1015 /* Some insns set all condition code flags, some only set the ZNC flags, and
1016 some only set the ZN flags. */
1018 #define EXTRA_CC_MODES \
1019 CC(CCZNCmode, "CCZNC") \
1020 CC(CCZNmode, "CCZN")
1022 /* Given a comparison code (EQ, NE, etc.) and the first operand of a COMPARE,
1023 return the mode to be used for the comparison. */
1024 #define SELECT_CC_MODE(OP, X, Y) \
1025 arc_select_cc_mode (OP, X, Y)
1027 /* Return non-zero if SELECT_CC_MODE will never return MODE for a
1028 floating point inequality comparison. */
1029 #define REVERSIBLE_CC_MODE(MODE) 1 /*???*/
1031 /* Costs. */
1033 /* An insn is define to cost 4 "units", and we work from there.
1034 COSTS_N_INSNS (N) is defined as (N) * 4 - 2 so that seems reasonable.
1035 Some values are supposed to be defined relative to each other and thus
1036 aren't necessarily related to COSTS_N_INSNS. */
1038 /* Compute the cost of computing a constant rtl expression RTX
1039 whose rtx-code is CODE. The body of this macro is a portion
1040 of a switch statement. If the code is computed here,
1041 return it with a return statement. Otherwise, break from the switch. */
1042 /* Small integers are as cheap as registers. 4 byte values can be fetched
1043 as immediate constants - let's give that the cost of an extra insn. */
1044 #define CONST_COSTS(X, CODE, OUTER_CODE) \
1045 case CONST_INT : \
1046 if (SMALL_INT (INTVAL (X))) \
1047 return 0; \
1048 /* fall through */ \
1049 case CONST : \
1050 case LABEL_REF : \
1051 case SYMBOL_REF : \
1052 return 4; \
1053 case CONST_DOUBLE : \
1055 rtx high, low; \
1056 split_double (X, &high, &low); \
1057 return 4 * (!SMALL_INT (INTVAL (high)) \
1058 + !SMALL_INT (INTVAL (low))); \
1061 /* Compute the cost of an address. */
1062 #define ADDRESS_COST(ADDR) (REG_P (ADDR) ? 1 : arc_address_cost (ADDR))
1064 /* Compute extra cost of moving data between one register class
1065 and another. */
1066 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) 2
1068 /* Compute the cost of moving data between registers and memory. */
1069 /* Memory is 3 times as expensive as registers.
1070 ??? Is that the right way to look at it? */
1071 #define MEMORY_MOVE_COST(MODE,CLASS,IN) \
1072 (GET_MODE_SIZE (MODE) <= UNITS_PER_WORD ? 6 : 12)
1074 /* The cost of a branch insn. */
1075 /* ??? What's the right value here? Branches are certainly more
1076 expensive than reg->reg moves. */
1077 #define BRANCH_COST 2
1079 /* Provide the costs of a rtl expression. This is in the body of a
1080 switch on CODE. The purpose for the cost of MULT is to encourage
1081 `synth_mult' to find a synthetic multiply when reasonable.
1083 If we need more than 12 insns to do a multiply, then go out-of-line,
1084 since the call overhead will be < 10% of the cost of the multiply. */
1085 #define RTX_COSTS(X, CODE, OUTER_CODE) \
1086 case ASHIFT : \
1087 case ASHIFTRT : \
1088 case LSHIFTRT : \
1089 if (TARGET_SHIFTER) \
1090 return COSTS_N_INSNS (1); \
1091 if (GET_CODE (XEXP ((X), 1)) != CONST_INT) \
1092 return COSTS_N_INSNS (16); \
1093 return COSTS_N_INSNS (INTVAL (XEXP ((X), 1)));
1095 /* Nonzero if access to memory by bytes is slow and undesirable.
1096 For RISC chips, it means that access to memory by bytes is no
1097 better than access by words when possible, so grab a whole word
1098 and maybe make use of that. */
1099 #define SLOW_BYTE_ACCESS 1
1101 /* Define this macro if it is as good or better to call a constant
1102 function address than to call an address kept in a register. */
1103 /* On the ARC, calling through registers is slow. */
1104 #define NO_FUNCTION_CSE
1106 /* Define this macro if it is as good or better for a function to call
1107 itself with an explicit address than to call an address kept in a
1108 register. */
1109 /* On the ARC, calling through registers is slow. */
1110 #define NO_RECURSIVE_FUNCTION_CSE
1112 /* Section selection. */
1113 /* WARNING: These section names also appear in dwarfout.c. */
1115 /* The names of the text, data, and readonly-data sections are runtime
1116 selectable. */
1118 #define ARC_SECTION_FORMAT "\t.section %s"
1119 #define ARC_DEFAULT_TEXT_SECTION ".text"
1120 #define ARC_DEFAULT_DATA_SECTION ".data"
1121 #define ARC_DEFAULT_RODATA_SECTION ".rodata"
1123 extern const char *arc_text_section, *arc_data_section, *arc_rodata_section;
1125 /* initfini.c uses this in an asm. */
1126 #if defined (CRT_INIT) || defined (CRT_FINI)
1127 #define TEXT_SECTION_ASM_OP "\t.section .text"
1128 #else
1129 #define TEXT_SECTION_ASM_OP arc_text_section /*"\t.section .text"*/
1130 #endif
1131 #define DATA_SECTION_ASM_OP arc_data_section /*"\t.section .data"*/
1133 #undef CONST_SECTION_ASM_OP
1134 #define CONST_SECTION_ASM_OP arc_rodata_section /*"\t.section .rodata"*/
1136 #define BSS_SECTION_ASM_OP "\t.section .bss"
1138 /* Define this macro if jump tables (for tablejump insns) should be
1139 output in the text section, along with the assembler instructions.
1140 Otherwise, the readonly data section is used.
1141 This macro is irrelevant if there is no separate readonly data section. */
1142 /*#define JUMP_TABLES_IN_TEXT_SECTION*/
1144 /* Define this macro if references to a symbol must be treated
1145 differently depending on something about the variable or
1146 function named by the symbol (such as what section it is in).
1148 The macro definition, if any, is executed immediately after the
1149 rtl for DECL or other node is created.
1150 The value of the rtl will be a `mem' whose address is a
1151 `symbol_ref'.
1153 The usual thing for this macro to do is to store a flag in the
1154 `symbol_ref' (such as `SYMBOL_REF_FLAG') or to store a modified
1155 name string in the `symbol_ref' (if one bit is not enough
1156 information). */
1158 /* On the ARC, function addresses are not the same as normal addresses.
1159 Branch to absolute address insns take an address that is right-shifted
1160 by 2. We encode the fact that we have a function here, and then emit a
1161 special assembler op when outputting the address. */
1162 #define ENCODE_SECTION_INFO(DECL) \
1163 do { \
1164 if (TREE_CODE (DECL) == FUNCTION_DECL) \
1165 SYMBOL_REF_FLAG (XEXP (DECL_RTL (DECL), 0)) = 1; \
1166 } while (0)
1168 /* Decode SYM_NAME and store the real name part in VAR, sans
1169 the characters that encode section info. Define this macro if
1170 ENCODE_SECTION_INFO alters the symbol's name string. */
1171 /*#define STRIP_NAME_ENCODING(VAR, SYM_NAME)*/
1173 /* For DWARF. Marginally different than default so output is "prettier"
1174 (and consistent with above). */
1175 #define PUSHSECTION_ASM_OP "\t.section "
1177 /* Tell crtstuff.c we're using ELF. */
1178 #define OBJECT_FORMAT_ELF
1180 /* PIC */
1182 /* The register number of the register used to address a table of static
1183 data addresses in memory. In some cases this register is defined by a
1184 processor's ``application binary interface'' (ABI). When this macro
1185 is defined, RTL is generated for this register once, as with the stack
1186 pointer and frame pointer registers. If this macro is not defined, it
1187 is up to the machine-dependent files to allocate such a register (if
1188 necessary). */
1189 #define PIC_OFFSET_TABLE_REGNUM 26
1191 /* Define this macro if the register defined by PIC_OFFSET_TABLE_REGNUM is
1192 clobbered by calls. Do not define this macro if PIC_OFFSET_TABLE_REGNUM
1193 is not defined. */
1194 /* This register is call-saved on the ARC. */
1195 /*#define PIC_OFFSET_TABLE_REG_CALL_CLOBBERED*/
1197 /* By generating position-independent code, when two different programs (A
1198 and B) share a common library (libC.a), the text of the library can be
1199 shared whether or not the library is linked at the same address for both
1200 programs. In some of these environments, position-independent code
1201 requires not only the use of different addressing modes, but also
1202 special code to enable the use of these addressing modes.
1204 The FINALIZE_PIC macro serves as a hook to emit these special
1205 codes once the function is being compiled into assembly code, but not
1206 before. (It is not done before, because in the case of compiling an
1207 inline function, it would lead to multiple PIC prologues being
1208 included in functions which used inline functions and were compiled to
1209 assembly language.) */
1211 #define FINALIZE_PIC arc_finalize_pic ()
1213 /* A C expression that is nonzero if X is a legitimate immediate
1214 operand on the target machine when generating position independent code.
1215 You can assume that X satisfies CONSTANT_P, so you need not
1216 check this. You can also assume `flag_pic' is true, so you need not
1217 check it either. You need not define this macro if all constants
1218 (including SYMBOL_REF) can be immediate operands when generating
1219 position independent code. */
1220 /*#define LEGITIMATE_PIC_OPERAND_P(X)*/
1222 /* Control the assembler format that we output. */
1224 /* Output at beginning of assembler file. */
1225 #undef ASM_FILE_START
1226 #define ASM_FILE_START(FILE) arc_asm_file_start (FILE)
1228 /* A C string constant describing how to begin a comment in the target
1229 assembler language. The compiler assumes that the comment will
1230 end at the end of the line. */
1231 #define ASM_COMMENT_START ";"
1233 /* Output to assembler file text saying following lines
1234 may contain character constants, extra white space, comments, etc. */
1235 #define ASM_APP_ON ""
1237 /* Output to assembler file text saying following lines
1238 no longer contain unusual constructs. */
1239 #define ASM_APP_OFF ""
1241 /* This is how to output the definition of a user-level label named NAME,
1242 such as the label on a static function or variable NAME. */
1243 #define ASM_OUTPUT_LABEL(FILE, NAME) \
1244 do { assemble_name (FILE, NAME); fputs (":\n", FILE); } while (0)
1246 /* This is how to output a command to make the user-level label named NAME
1247 defined for reference from other files. */
1248 #define ASM_GLOBALIZE_LABEL(FILE, NAME) \
1249 do { \
1250 fputs ("\t.global\t", FILE); \
1251 assemble_name (FILE, NAME); \
1252 fputs ("\n", FILE); \
1253 } while (0)
1255 /* A C statement (sans semicolon) to output on FILE an assembler pseudo-op to
1256 declare a library function name external. The name of the library function
1257 is given by SYMREF, which has type RTX and is a SYMBOL_REF. */
1258 #if 0
1259 /* On the ARC we want to have libgcc's for multiple cpus in one binary.
1260 We can't use `assemble_name' here as that will call ASM_OUTPUT_LABELREF
1261 and we'll get another suffix added on if -mmangle-cpu. */
1262 extern const char *arc_mangle_cpu;
1263 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, SYMREF) \
1264 do { \
1265 if (TARGET_MANGLE_CPU_LIBGCC) \
1267 fprintf (FILE, "\t.rename\t_%s, _%s%s\n", \
1268 XSTR (SYMREF, 0), XSTR (SYMREF, 0), \
1269 arc_mangle_suffix); \
1271 } while (0)
1272 #endif
1274 /* This is how to output a reference to a user-level label named NAME.
1275 `assemble_name' uses this. */
1276 /* We mangle all user labels to provide protection from linking code
1277 compiled for different cpus. */
1278 /* We work around a dwarfout.c deficiency by watching for labels from it and
1279 not adding the '_' prefix nor the cpu suffix. There is a comment in
1280 dwarfout.c that says it should be using ASM_OUTPUT_INTERNAL_LABEL. */
1281 extern const char *arc_mangle_cpu;
1282 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
1283 do { \
1284 if ((NAME)[0] == '.' && (NAME)[1] == 'L') \
1285 fprintf (FILE, "%s", NAME); \
1286 else \
1288 fputc ('_', FILE); \
1289 if (TARGET_MANGLE_CPU && arc_mangle_cpu != NULL) \
1290 fprintf (FILE, "%s_", arc_mangle_cpu); \
1291 fprintf (FILE, "%s", NAME); \
1293 } while (0)
1295 /* This is how to output a definition of an internal numbered label where
1296 PREFIX is the class of label and NUM is the number within the class. */
1297 #undef ASM_OUTPUT_INTERNAL_LABEL
1298 #define ASM_OUTPUT_INTERNAL_LABEL(FILE, PREFIX, NUM) \
1299 do { \
1300 arc_ccfsm_at_label (PREFIX, NUM); \
1301 fprintf (FILE, ".%s%d:\n", PREFIX, NUM); \
1302 } while (0)
1304 /* Store in OUTPUT a string (made with alloca) containing
1305 an assembler-name for a local static variable named NAME.
1306 LABELNO is an integer which is different for each call. */
1307 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1308 ( (OUTPUT) = (char *) alloca (strlen ((NAME)) + 10), \
1309 sprintf ((OUTPUT), "%s.%d", (NAME), (LABELNO)))
1311 /* Assembler pseudo-op to equate one value with another. */
1312 /* ??? This is needed because dwarfout.c provides a default definition too
1313 late for defaults.h (which contains the default definition of ASM_OUTPUT_DEF
1314 that we use). */
1315 #define SET_ASM_OP "\t.set\t"
1317 /* How to refer to registers in assembler output.
1318 This sequence is indexed by compiler's hard-register-number (see above). */
1319 #define REGISTER_NAMES \
1320 {"r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7", \
1321 "r8", "r9", "r10", "r11", "r12", "r13", "r14", "r15", \
1322 "r16", "r17", "r18", "r19", "r20", "r21", "r22", "r23", \
1323 "r24", "r25", "r26", "fp", "sp", "ilink1", "ilink2", "blink", \
1324 "r32", "r33", "r34", "r35", "r36", "r37", "r38", "r39", \
1325 "r40", "r41", "r42", "r43", "r44", "r45", "r46", "r47", \
1326 "r48", "r49", "r50", "r51", "r52", "r53", "r54", "r55", \
1327 "r56", "r57", "r58", "r59", "lp_count", "cc"}
1329 /* Entry to the insn conditionalizer. */
1330 #define FINAL_PRESCAN_INSN(INSN, OPVEC, NOPERANDS) \
1331 arc_final_prescan_insn (INSN, OPVEC, NOPERANDS)
1333 /* A C expression which evaluates to true if CODE is a valid
1334 punctuation character for use in the `PRINT_OPERAND' macro. */
1335 extern char arc_punct_chars[];
1336 #define PRINT_OPERAND_PUNCT_VALID_P(CHAR) \
1337 arc_punct_chars[(unsigned char) (CHAR)]
1339 /* Print operand X (an rtx) in assembler syntax to file FILE.
1340 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1341 For `%' followed by punctuation, CODE is the punctuation and X is null. */
1342 #define PRINT_OPERAND(FILE, X, CODE) \
1343 arc_print_operand (FILE, X, CODE)
1345 /* A C compound statement to output to stdio stream STREAM the
1346 assembler syntax for an instruction operand that is a memory
1347 reference whose address is ADDR. ADDR is an RTL expression.
1349 On some machines, the syntax for a symbolic address depends on
1350 the section that the address refers to. On these machines,
1351 define the macro `ENCODE_SECTION_INFO' to store the information
1352 into the `symbol_ref', and then check for it here. */
1353 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
1354 arc_print_operand_address (FILE, ADDR)
1356 /* This is how to output an element of a case-vector that is absolute. */
1357 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1358 do { \
1359 char label[30]; \
1360 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1361 fprintf (FILE, "\t.word %%st("); \
1362 assemble_name (FILE, label); \
1363 fprintf (FILE, ")\n"); \
1364 } while (0)
1366 /* This is how to output an element of a case-vector that is relative. */
1367 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
1368 do { \
1369 char label[30]; \
1370 ASM_GENERATE_INTERNAL_LABEL (label, "L", VALUE); \
1371 fprintf (FILE, "\t.word %%st("); \
1372 assemble_name (FILE, label); \
1373 fprintf (FILE, "-"); \
1374 ASM_GENERATE_INTERNAL_LABEL (label, "L", REL); \
1375 assemble_name (FILE, label); \
1376 fprintf (FILE, ")\n"); \
1377 } while (0)
1379 /* The desired alignment for the location counter at the beginning
1380 of a loop. */
1381 /* On the ARC, align loops to 32 byte boundaries (cache line size)
1382 if -malign-loops. */
1383 #define LOOP_ALIGN(LABEL) (TARGET_ALIGN_LOOPS ? 5 : 0)
1385 /* This is how to output an assembler line
1386 that says to advance the location counter
1387 to a multiple of 2**LOG bytes. */
1388 #define ASM_OUTPUT_ALIGN(FILE,LOG) \
1389 do { if ((LOG) != 0) fprintf (FILE, "\t.align %d\n", 1 << (LOG)); } while (0)
1391 /* Debugging information. */
1393 /* Generate DBX and DWARF debugging information. */
1394 #ifndef DBX_DEBUGGING_INFO
1395 #define DBX_DEBUGGING_INFO
1396 #endif
1397 #ifndef DWARF_DEBUGGING_INFO
1398 #define DWARF_DEBUGGING_INFO
1399 #endif
1401 /* Prefer STABS (for now). */
1402 #undef PREFERRED_DEBUGGING_TYPE
1403 #define PREFERRED_DEBUGGING_TYPE DBX_DEBUG
1405 /* Turn off splitting of long stabs. */
1406 #define DBX_CONTIN_LENGTH 0
1408 /* Miscellaneous. */
1410 /* Specify the machine mode that this machine uses
1411 for the index in the tablejump instruction. */
1412 #define CASE_VECTOR_MODE Pmode
1414 /* Define as C expression which evaluates to nonzero if the tablejump
1415 instruction expects the table to contain offsets from the address of the
1416 table.
1417 Do not define this if the table should contain absolute addresses. */
1418 /* It's not clear what PIC will look like or whether we want to use -fpic
1419 for the embedded form currently being talked about. For now require -fpic
1420 to get pc relative switch tables. */
1421 /*#define CASE_VECTOR_PC_RELATIVE 1 */
1423 /* Define if operations between registers always perform the operation
1424 on the full register even if a narrower mode is specified. */
1425 #define WORD_REGISTER_OPERATIONS
1427 /* Define if loading in MODE, an integral mode narrower than BITS_PER_WORD
1428 will either zero-extend or sign-extend. The value of this macro should
1429 be the code that says which one of the two operations is implicitly
1430 done, NIL if none. */
1431 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
1433 /* Specify the tree operation to be used to convert reals to integers. */
1434 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1436 /* This is the kind of divide that is easiest to do in the general case. */
1437 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1439 /* Max number of bytes we can move from memory to memory
1440 in one reasonably fast instruction. */
1441 #define MOVE_MAX 4
1443 /* Define this to be nonzero if shift instructions ignore all but the low-order
1444 few bits. */
1445 #define SHIFT_COUNT_TRUNCATED 1
1447 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1448 is done just by pretending it is already truncated. */
1449 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1451 /* We assume that the store-condition-codes instructions store 0 for false
1452 and some other value for true. This is the value stored for true. */
1453 #define STORE_FLAG_VALUE 1
1455 /* Specify the machine mode that pointers have.
1456 After generation of rtl, the compiler makes no further distinction
1457 between pointers and any other objects of this machine mode. */
1458 /* ??? The arc doesn't have full 32 bit pointers, but making this PSImode has
1459 its own problems (you have to add extendpsisi2 and trucnsipsi2 but how does
1460 one do it without getting excess code?). Try to avoid it. */
1461 #define Pmode SImode
1463 /* A function address in a call instruction. */
1464 #define FUNCTION_MODE SImode
1466 /* alloca should avoid clobbering the old register save area. */
1467 /* ??? Not defined in tm.texi. */
1468 #define SETJMP_VIA_SAVE_AREA
1470 /* Define the information needed to generate branch and scc insns. This is
1471 stored from the compare operation. Note that we can't use "rtx" here
1472 since it hasn't been defined! */
1473 extern struct rtx_def *arc_compare_op0, *arc_compare_op1;
1475 /* ARC function types. */
1476 enum arc_function_type {
1477 ARC_FUNCTION_UNKNOWN, ARC_FUNCTION_NORMAL,
1478 /* These are interrupt handlers. The name corresponds to the register
1479 name that contains the return address. */
1480 ARC_FUNCTION_ILINK1, ARC_FUNCTION_ILINK2
1482 #define ARC_INTERRUPT_P(TYPE) \
1483 ((TYPE) == ARC_FUNCTION_ILINK1 || (TYPE) == ARC_FUNCTION_ILINK2)
1484 /* Compute the type of a function from its DECL. */
1487 /* Implement `va_start' for varargs and stdarg. */
1488 #define EXPAND_BUILTIN_VA_START(stdarg, valist, nextarg) \
1489 arc_va_start (stdarg, valist, nextarg)
1491 /* Implement `va_arg'. */
1492 #define EXPAND_BUILTIN_VA_ARG(valist, type) \
1493 arc_va_arg (valist, type)