gcc/testsuite/gcc.target/aarch64/sha1_1.c

   1
   2 /* { dg-do compile } */
   3 /* { dg-options "-march=armv8-a+crypto" } */
   4
   5 #include "arm_neon.h"
   6
   7 uint32x4_t
   8 test_vsha1cq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
   9 {
  10   return vsha1cq_u32 (hash_abcd, hash_e, wk);
  11 }
  12
  13 /* { dg-final { scan-assembler-times "sha1c\\tq" 1 } } */
  14
  15 uint32x4_t
  16 test_vsha1mq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
  17 {
  18   return vsha1mq_u32 (hash_abcd, hash_e, wk);
  19 }
  20
  21 /* { dg-final { scan-assembler-times "sha1m\\tq" 1 } } */
  22
  23 uint32x4_t
  24 test_vsha1pq_u32 (uint32x4_t hash_abcd, uint32_t hash_e, uint32x4_t wk)
  25 {
  26   return vsha1pq_u32 (hash_abcd, hash_e, wk);
  27 }
  28
  29 /* { dg-final { scan-assembler-times "sha1p\\tq" 1 } } */
  30
  31 uint32_t
  32 test_vsha1h_u32 (uint32_t hash_e)
  33 {
  34   return vsha1h_u32 (hash_e);
  35 }
  36
  37 /* { dg-final { scan-assembler-times "sha1h\\ts" 1 } } */
  38
  39 uint32x4_t
  40 test_vsha1su0q_u32 (uint32x4_t w0_3, uint32x4_t w4_7, uint32x4_t w8_11)
  41 {
  42   return vsha1su0q_u32 (w0_3, w4_7, w8_11);
  43 }
  44
  45 /* { dg-final { scan-assembler-times "sha1su0\\tv" 1 } } */
  46
  47 uint32x4_t
  48 test_vsha1su1q_u32 (uint32x4_t tw0_3, uint32x4_t w12_15)
  49 {
  50   return vsha1su1q_u32 (tw0_3, w12_15);
  51 }
  52
  53 /* { dg-final { scan-assembler-times "sha1su1\\tv" 1 } } */
  54