[AArch64/arm] PR testsuite/85326 Avoid C++ tests when C++ compiler not present
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / orr_imm_1.c
blob4c8208b5ac226ff93859f0d2633dac96bad3cac7
1 /* { dg-do assemble } */
2 /* { dg-options "-O2 --save-temps -ftree-vectorize" } */
4 #pragma GCC target "+nosve"
6 /* Each function uses the correspoding 'CLASS' in
7 Marco CHECK (aarch64_simd_valid_immediate). */
9 void
10 orr_0 (int *a)
12 for (int i = 0; i < 1024; i++)
13 a[i] |= 0xab;
16 void
17 orr_1 (int *a)
19 for (int i = 0; i < 1024; i++)
20 a[i] |= 0x0000cd00;
23 void
24 orr_2 (int *a)
26 for (int i = 0; i < 1024; i++)
27 a[i] |= 0x00ef0000;
30 void
31 orr_3 (int *a)
33 for (int i = 0; i < 1024; i++)
34 a[i] |= 0x12000000;
37 void
38 orr_4 (short *a)
40 for (int i = 0; i < 1024; i++)
41 a[i] |= 0x00340034;
44 void
45 orr_5 (int *a)
47 for (int i = 0; i < 1024; i++)
48 a[i] |= 0x56005600;
51 /* { dg-final { scan-assembler "orr\\tv\[0-9\]+.4s, #171" } } */
52 /* { dg-final { scan-assembler "orr\\tv\[0-9\]+.4s, #205, lsl #8" } } */
53 /* { dg-final { scan-assembler "orr\\tv\[0-9\]+.4s, #239, lsl #16" } } */
54 /* { dg-final { scan-assembler "orr\\tv\[0-9\]+.4s, #18, lsl #24" } } */
55 /* { dg-final { scan-assembler "orr\\tv\[0-9\]+.8h, #52" } } */
56 /* { dg-final { scan-assembler "orr\\tv\[0-9\]+.8h, #86, lsl #8" } } */