[AArch64/arm] PR testsuite/85326 Avoid C++ tests when C++ compiler not present
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / _Float16_3.c
blob92d6dd9647dadc25141d4b4c6a7d0677b4cf11d0
1 /* { dg-do compile } */
2 /* { dg-options "-O3 -march=armv8.2-a+nofp16 -std=c11 -ffp-contract=fast" } */
3 /* { dg-skip-if "" { *-*-* } { "-mcpu=*" } { "" } } */
5 #pragma GCC target ("arch=armv8.2-a+nofp16")
7 _Float16
8 foo_v8 (_Float16 x, _Float16 y, unsigned int *eval)
10 *eval = __FLT_EVAL_METHOD__;
11 return x * x + y;
14 __fp16
15 bar_v8 (__fp16 x, __fp16 y, unsigned int *eval)
17 *eval = __FLT_EVAL_METHOD__;
18 return x * x + y;
21 #pragma GCC target ("arch=armv8.2-a+fp16")
23 _Float16
24 foo_v82 (_Float16 x, _Float16 y, unsigned int *eval)
26 *eval = __FLT_EVAL_METHOD__;
27 return x * x + y;
30 __fp16
31 bar_v82 (__fp16 x, __fp16 y, unsigned int *eval)
33 *eval = __FLT_EVAL_METHOD__;
34 return x * x + y;
37 /* Test that we merge to FMA operations. This indicates that we are not
38 making extraneous conversions between modes. */
40 /* Three FMA operations in 32-bit precision, from foo_v8, bar_v8, bar_v82. */
41 /* { dg-final { scan-assembler-times "fmadd\ts\[0-9\]\+" 3 } } */
43 /* One FMA operation in 16-bit precision, from foo_v82. */
44 /* { dg-final { scan-assembler-times "fmadd\th\[0-9\]\+" 1 } } */
46 /* Test that in C11 mode, we don't reset __FLT_EVAL_METHOD__. */
47 /* { dg-final { scan-assembler-times "str\twzr" 4 } } */