1 /* Copyright (C) 2012-2015 Free Software Foundation, Inc.
2 Contributed by Richard Henderson <rth@redhat.com>.
4 This file is part of the GNU Transactional Memory Library (libitm).
6 Libitm is free software; you can redistribute it and/or modify it
7 under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 3 of the License, or
9 (at your option) any later version.
11 Libitm is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or FITNESS
13 FOR A PARTICULAR PURPOSE. See the GNU General Public License for
16 Under Section 7 of GPL version 3, you are granted additional
17 permissions described in the GCC Runtime Library Exception, version
18 3.1, as published by the Free Software Foundation.
20 You should have received a copy of the GNU General Public License and
21 a copy of the GCC Runtime Library Exception along with this program;
22 see the files COPYING3 and COPYING.RUNTIME respectively. If not, see
23 <http://www.gnu.org/licenses/>. */
25 #ifdef HAVE_SYS_AUXV_H
29 namespace GTM HIDDEN
{
31 typedef int v128
__attribute__((vector_size(16), may_alias
, aligned(16)));
32 typedef struct gtm_jmpbuf
34 #if defined(__ALTIVEC__) || defined(__VSX__)
35 v128 vr
[12]; /* vr20-vr31 */
36 unsigned long long vscr
; /* long long for padding only */
39 double fr
[18]; /* f14-f31 */
42 unsigned long gr
[18]; /* r14-r31 */
45 unsigned long toc
; /* r2 on aix, r13 on darwin */
49 /* The size of one line in hardware caches (in bytes). */
50 #if defined (__powerpc64__) || defined (__ppc64__)
51 # define HW_CACHELINE_SIZE 128
53 # define HW_CACHELINE_SIZE 32
59 __asm
volatile ("" : : : "memory");
62 // Use HTM if it is supported by the system.
63 // See gtm_thread::begin_transaction for how these functions are used.
64 #if defined (__linux__) \
65 && defined (HAVE_AS_HTM) \
66 && defined (HAVE_GETAUXVAL) \
67 && defined (AT_HWCAP2) \
68 && defined (PPC_FEATURE2_HAS_HTM)
70 #include <htmintrin.h>
72 #define USE_HTM_FASTPATH
74 #define _TBEGIN_STARTED 0
75 #define _TBEGIN_INDETERMINATE 1
76 #define _TBEGIN_PERSISTENT 2
78 /* Number of retries for transient failures. */
79 #define _HTM_RETRIES 10
84 return (getauxval (AT_HWCAP2
) & PPC_FEATURE2_HAS_HTM
) ? true : false;
87 static inline uint32_t
90 // Maximum number of times we try to execute a transaction
91 // as a HW transaction.
92 return htm_available () ? _HTM_RETRIES
: 0;
95 static inline uint32_t
98 if (__builtin_expect (__builtin_tbegin (0), 1))
99 return _TBEGIN_STARTED
;
101 if (_TEXASRU_FAILURE_PERSISTENT (__builtin_get_texasru ()))
102 return _TBEGIN_PERSISTENT
;
104 return _TBEGIN_INDETERMINATE
;
108 htm_begin_success (uint32_t begin_ret
)
110 return begin_ret
== _TBEGIN_STARTED
;
122 __builtin_tabort (0);
126 htm_abort_should_retry (uint32_t begin_ret
)
128 return begin_ret
!= _TBEGIN_PERSISTENT
;
131 /* Returns true iff a hardware transaction is currently being executed. */
133 htm_transaction_active (void)
135 return (_HTM_STATE (__builtin_ttest ()) == _HTM_TRANSACTIONAL
);