1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987-2017 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
20 /* This file contains subroutines used only from the file reload1.c.
21 It knows how to scan one insn for operands and values
22 that need to be copied into registers to make valid code.
23 It also finds other operands and values which are valid
24 but for which equivalent values in registers exist and
25 ought to be used instead.
27 Before processing the first insn of the function, call `init_reload'.
28 init_reload actually has to be called earlier anyway.
30 To scan an insn, call `find_reloads'. This does two things:
31 1. sets up tables describing which values must be reloaded
32 for this insn, and what kind of hard regs they must be reloaded into;
33 2. optionally record the locations where those values appear in
34 the data, so they can be replaced properly later.
35 This is done only if the second arg to `find_reloads' is nonzero.
37 The third arg to `find_reloads' specifies the number of levels
38 of indirect addressing supported by the machine. If it is zero,
39 indirect addressing is not valid. If it is one, (MEM (REG n))
40 is valid even if (REG n) did not get a hard register; if it is two,
41 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
42 hard register, and similarly for higher values.
44 Then you must choose the hard regs to reload those pseudo regs into,
45 and generate appropriate load insns before this insn and perhaps
46 also store insns after this insn. Set up the array `reload_reg_rtx'
47 to contain the REG rtx's for the registers you used. In some
48 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
49 for certain reloads. Then that tells you which register to use,
50 so you do not need to allocate one. But you still do need to add extra
51 instructions to copy the value into and out of that register.
53 Finally you must call `subst_reloads' to substitute the reload reg rtx's
54 into the locations already recorded.
58 find_reloads can alter the operands of the instruction it is called on.
60 1. Two operands of any sort may be interchanged, if they are in a
61 commutative instruction.
62 This happens only if find_reloads thinks the instruction will compile
65 2. Pseudo-registers that are equivalent to constants are replaced
66 with those constants if they are not in hard registers.
68 1 happens every time find_reloads is called.
69 2 happens only when REPLACE is 1, which is only when
70 actually doing the reloads, not when just counting them.
72 Using a reload register for several reloads in one insn:
74 When an insn has reloads, it is considered as having three parts:
75 the input reloads, the insn itself after reloading, and the output reloads.
76 Reloads of values used in memory addresses are often needed for only one part.
78 When this is so, reload_when_needed records which part needs the reload.
79 Two reloads for different parts of the insn can share the same reload
82 When a reload is used for addresses in multiple parts, or when it is
83 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
84 a register with any other reload. */
88 /* We do not enable this with CHECKING_P, since it is awfully slow. */
93 #include "coretypes.h"
105 #include "rtl-error.h"
107 #include "addresses.h"
110 /* True if X is a constant that can be forced into the constant pool.
111 MODE is the mode of the operand, or VOIDmode if not known. */
112 #define CONST_POOL_OK_P(MODE, X) \
113 ((MODE) != VOIDmode \
115 && GET_CODE (X) != HIGH \
116 && !targetm.cannot_force_const_mem (MODE, X))
118 /* True if C is a non-empty register class that has too few registers
119 to be safely used as a reload target class. */
122 small_register_class_p (reg_class_t rclass
)
124 return (reg_class_size
[(int) rclass
] == 1
125 || (reg_class_size
[(int) rclass
] >= 1
126 && targetm
.class_likely_spilled_p (rclass
)));
130 /* All reloads of the current insn are recorded here. See reload.h for
133 struct reload rld
[MAX_RELOADS
];
135 /* All the "earlyclobber" operands of the current insn
136 are recorded here. */
138 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
140 int reload_n_operands
;
142 /* Replacing reloads.
144 If `replace_reloads' is nonzero, then as each reload is recorded
145 an entry is made for it in the table `replacements'.
146 Then later `subst_reloads' can look through that table and
147 perform all the replacements needed. */
149 /* Nonzero means record the places to replace. */
150 static int replace_reloads
;
152 /* Each replacement is recorded with a structure like this. */
155 rtx
*where
; /* Location to store in */
156 int what
; /* which reload this is for */
157 machine_mode mode
; /* mode it must have */
160 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
162 /* Number of replacements currently recorded. */
163 static int n_replacements
;
165 /* Used to track what is modified by an operand. */
168 int reg_flag
; /* Nonzero if referencing a register. */
169 int safe
; /* Nonzero if this can't conflict with anything. */
170 rtx base
; /* Base address for MEM. */
171 HOST_WIDE_INT start
; /* Starting offset or register number. */
172 HOST_WIDE_INT end
; /* Ending offset or register number. */
175 #ifdef SECONDARY_MEMORY_NEEDED
177 /* Save MEMs needed to copy from one class of registers to another. One MEM
178 is used per mode, but normally only one or two modes are ever used.
180 We keep two versions, before and after register elimination. The one
181 after register elimination is record separately for each operand. This
182 is done in case the address is not valid to be sure that we separately
185 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
186 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
187 static int secondary_memlocs_elim_used
= 0;
190 /* The instruction we are doing reloads for;
191 so we can test whether a register dies in it. */
192 static rtx_insn
*this_insn
;
194 /* Nonzero if this instruction is a user-specified asm with operands. */
195 static int this_insn_is_asm
;
197 /* If hard_regs_live_known is nonzero,
198 we can tell which hard regs are currently live,
199 at least enough to succeed in choosing dummy reloads. */
200 static int hard_regs_live_known
;
202 /* Indexed by hard reg number,
203 element is nonnegative if hard reg has been spilled.
204 This vector is passed to `find_reloads' as an argument
205 and is not changed here. */
206 static short *static_reload_reg_p
;
208 /* Set to 1 in subst_reg_equivs if it changes anything. */
209 static int subst_reg_equivs_changed
;
211 /* On return from push_reload, holds the reload-number for the OUT
212 operand, which can be different for that from the input operand. */
213 static int output_reloadnum
;
215 /* Compare two RTX's. */
216 #define MATCHES(x, y) \
217 (x == y || (x != 0 && (REG_P (x) \
218 ? REG_P (y) && REGNO (x) == REGNO (y) \
219 : rtx_equal_p (x, y) && ! side_effects_p (x))))
221 /* Indicates if two reloads purposes are for similar enough things that we
222 can merge their reloads. */
223 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
224 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
225 || ((when1) == (when2) && (op1) == (op2)) \
226 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
227 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
228 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
229 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
230 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
232 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
233 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
234 ((when1) != (when2) \
235 || ! ((op1) == (op2) \
236 || (when1) == RELOAD_FOR_INPUT \
237 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
238 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
240 /* If we are going to reload an address, compute the reload type to
242 #define ADDR_TYPE(type) \
243 ((type) == RELOAD_FOR_INPUT_ADDRESS \
244 ? RELOAD_FOR_INPADDR_ADDRESS \
245 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
246 ? RELOAD_FOR_OUTADDR_ADDRESS \
249 static int push_secondary_reload (int, rtx
, int, int, enum reg_class
,
250 machine_mode
, enum reload_type
,
251 enum insn_code
*, secondary_reload_info
*);
252 static enum reg_class
find_valid_class (machine_mode
, machine_mode
,
254 static void push_replacement (rtx
*, int, machine_mode
);
255 static void dup_replacements (rtx
*, rtx
*);
256 static void combine_reloads (void);
257 static int find_reusable_reload (rtx
*, rtx
, enum reg_class
,
258 enum reload_type
, int, int);
259 static rtx
find_dummy_reload (rtx
, rtx
, rtx
*, rtx
*, machine_mode
,
260 machine_mode
, reg_class_t
, int, int);
261 static int hard_reg_set_here_p (unsigned int, unsigned int, rtx
);
262 static struct decomposition
decompose (rtx
);
263 static int immune_p (rtx
, rtx
, struct decomposition
);
264 static bool alternative_allows_const_pool_ref (rtx
, const char *, int);
265 static rtx
find_reloads_toplev (rtx
, int, enum reload_type
, int, int,
267 static rtx
make_memloc (rtx
, int);
268 static int maybe_memory_address_addr_space_p (machine_mode
, rtx
,
269 addr_space_t
, rtx
*);
270 static int find_reloads_address (machine_mode
, rtx
*, rtx
, rtx
*,
271 int, enum reload_type
, int, rtx_insn
*);
272 static rtx
subst_reg_equivs (rtx
, rtx_insn
*);
273 static rtx
subst_indexed_address (rtx
);
274 static void update_auto_inc_notes (rtx_insn
*, int, int);
275 static int find_reloads_address_1 (machine_mode
, addr_space_t
, rtx
, int,
276 enum rtx_code
, enum rtx_code
, rtx
*,
277 int, enum reload_type
,int, rtx_insn
*);
278 static void find_reloads_address_part (rtx
, rtx
*, enum reg_class
,
280 enum reload_type
, int);
281 static rtx
find_reloads_subreg_address (rtx
, int, enum reload_type
,
282 int, rtx_insn
*, int *);
283 static void copy_replacements_1 (rtx
*, rtx
*, int);
284 static int find_inc_amount (rtx
, rtx
);
285 static int refers_to_mem_for_reload_p (rtx
);
286 static int refers_to_regno_for_reload_p (unsigned int, unsigned int,
289 /* Add NEW to reg_equiv_alt_mem_list[REGNO] if it's not present in the
293 push_reg_equiv_alt_mem (int regno
, rtx mem
)
297 for (it
= reg_equiv_alt_mem_list (regno
); it
; it
= XEXP (it
, 1))
298 if (rtx_equal_p (XEXP (it
, 0), mem
))
301 reg_equiv_alt_mem_list (regno
)
302 = alloc_EXPR_LIST (REG_EQUIV
, mem
,
303 reg_equiv_alt_mem_list (regno
));
306 /* Determine if any secondary reloads are needed for loading (if IN_P is
307 nonzero) or storing (if IN_P is zero) X to or from a reload register of
308 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
309 are needed, push them.
311 Return the reload number of the secondary reload we made, or -1 if
312 we didn't need one. *PICODE is set to the insn_code to use if we do
313 need a secondary reload. */
316 push_secondary_reload (int in_p
, rtx x
, int opnum
, int optional
,
317 enum reg_class reload_class
,
318 machine_mode reload_mode
, enum reload_type type
,
319 enum insn_code
*picode
, secondary_reload_info
*prev_sri
)
321 enum reg_class rclass
= NO_REGS
;
322 enum reg_class scratch_class
;
323 machine_mode mode
= reload_mode
;
324 enum insn_code icode
= CODE_FOR_nothing
;
325 enum insn_code t_icode
= CODE_FOR_nothing
;
326 enum reload_type secondary_type
;
327 int s_reload
, t_reload
= -1;
328 const char *scratch_constraint
;
329 secondary_reload_info sri
;
331 if (type
== RELOAD_FOR_INPUT_ADDRESS
332 || type
== RELOAD_FOR_OUTPUT_ADDRESS
333 || type
== RELOAD_FOR_INPADDR_ADDRESS
334 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
335 secondary_type
= type
;
337 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
339 *picode
= CODE_FOR_nothing
;
341 /* If X is a paradoxical SUBREG, use the inner value to determine both the
342 mode and object being reloaded. */
343 if (paradoxical_subreg_p (x
))
346 reload_mode
= GET_MODE (x
);
349 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
350 is still a pseudo-register by now, it *must* have an equivalent MEM
351 but we don't want to assume that), use that equivalent when seeing if
352 a secondary reload is needed since whether or not a reload is needed
353 might be sensitive to the form of the MEM. */
355 if (REG_P (x
) && REGNO (x
) >= FIRST_PSEUDO_REGISTER
356 && reg_equiv_mem (REGNO (x
)))
357 x
= reg_equiv_mem (REGNO (x
));
359 sri
.icode
= CODE_FOR_nothing
;
360 sri
.prev_sri
= prev_sri
;
361 rclass
= (enum reg_class
) targetm
.secondary_reload (in_p
, x
, reload_class
,
363 icode
= (enum insn_code
) sri
.icode
;
365 /* If we don't need any secondary registers, done. */
366 if (rclass
== NO_REGS
&& icode
== CODE_FOR_nothing
)
369 if (rclass
!= NO_REGS
)
370 t_reload
= push_secondary_reload (in_p
, x
, opnum
, optional
, rclass
,
371 reload_mode
, type
, &t_icode
, &sri
);
373 /* If we will be using an insn, the secondary reload is for a
376 if (icode
!= CODE_FOR_nothing
)
378 /* If IN_P is nonzero, the reload register will be the output in
379 operand 0. If IN_P is zero, the reload register will be the input
380 in operand 1. Outputs should have an initial "=", which we must
383 /* ??? It would be useful to be able to handle only two, or more than
384 three, operands, but for now we can only handle the case of having
385 exactly three: output, input and one temp/scratch. */
386 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
388 /* ??? We currently have no way to represent a reload that needs
389 an icode to reload from an intermediate tertiary reload register.
390 We should probably have a new field in struct reload to tag a
391 chain of scratch operand reloads onto. */
392 gcc_assert (rclass
== NO_REGS
);
394 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
395 gcc_assert (*scratch_constraint
== '=');
396 scratch_constraint
++;
397 if (*scratch_constraint
== '&')
398 scratch_constraint
++;
399 scratch_class
= (reg_class_for_constraint
400 (lookup_constraint (scratch_constraint
)));
402 rclass
= scratch_class
;
403 mode
= insn_data
[(int) icode
].operand
[2].mode
;
406 /* This case isn't valid, so fail. Reload is allowed to use the same
407 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
408 in the case of a secondary register, we actually need two different
409 registers for correct code. We fail here to prevent the possibility of
410 silently generating incorrect code later.
412 The convention is that secondary input reloads are valid only if the
413 secondary_class is different from class. If you have such a case, you
414 can not use secondary reloads, you must work around the problem some
417 Allow this when a reload_in/out pattern is being used. I.e. assume
418 that the generated code handles this case. */
420 gcc_assert (!in_p
|| rclass
!= reload_class
|| icode
!= CODE_FOR_nothing
421 || t_icode
!= CODE_FOR_nothing
);
423 /* See if we can reuse an existing secondary reload. */
424 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
425 if (rld
[s_reload
].secondary_p
426 && (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
)
427 || reg_class_subset_p (rld
[s_reload
].rclass
, rclass
))
428 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
429 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
430 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
431 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
432 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
433 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
434 && (small_register_class_p (rclass
)
435 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
436 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
437 opnum
, rld
[s_reload
].opnum
))
440 rld
[s_reload
].inmode
= mode
;
442 rld
[s_reload
].outmode
= mode
;
444 if (reg_class_subset_p (rclass
, rld
[s_reload
].rclass
))
445 rld
[s_reload
].rclass
= rclass
;
447 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
448 rld
[s_reload
].optional
&= optional
;
449 rld
[s_reload
].secondary_p
= 1;
450 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
451 opnum
, rld
[s_reload
].opnum
))
452 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
457 if (s_reload
== n_reloads
)
459 #ifdef SECONDARY_MEMORY_NEEDED
460 /* If we need a memory location to copy between the two reload regs,
461 set it up now. Note that we do the input case before making
462 the reload and the output case after. This is due to the
463 way reloads are output. */
465 if (in_p
&& icode
== CODE_FOR_nothing
466 && SECONDARY_MEMORY_NEEDED (rclass
, reload_class
, mode
))
468 get_secondary_mem (x
, reload_mode
, opnum
, type
);
470 /* We may have just added new reloads. Make sure we add
471 the new reload at the end. */
472 s_reload
= n_reloads
;
476 /* We need to make a new secondary reload for this register class. */
477 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
478 rld
[s_reload
].rclass
= rclass
;
480 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
481 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
482 rld
[s_reload
].reg_rtx
= 0;
483 rld
[s_reload
].optional
= optional
;
484 rld
[s_reload
].inc
= 0;
485 /* Maybe we could combine these, but it seems too tricky. */
486 rld
[s_reload
].nocombine
= 1;
487 rld
[s_reload
].in_reg
= 0;
488 rld
[s_reload
].out_reg
= 0;
489 rld
[s_reload
].opnum
= opnum
;
490 rld
[s_reload
].when_needed
= secondary_type
;
491 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
492 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
493 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
494 rld
[s_reload
].secondary_out_icode
495 = ! in_p
? t_icode
: CODE_FOR_nothing
;
496 rld
[s_reload
].secondary_p
= 1;
500 #ifdef SECONDARY_MEMORY_NEEDED
501 if (! in_p
&& icode
== CODE_FOR_nothing
502 && SECONDARY_MEMORY_NEEDED (reload_class
, rclass
, mode
))
503 get_secondary_mem (x
, mode
, opnum
, type
);
511 /* If a secondary reload is needed, return its class. If both an intermediate
512 register and a scratch register is needed, we return the class of the
513 intermediate register. */
515 secondary_reload_class (bool in_p
, reg_class_t rclass
, machine_mode mode
,
518 enum insn_code icode
;
519 secondary_reload_info sri
;
521 sri
.icode
= CODE_FOR_nothing
;
524 = (enum reg_class
) targetm
.secondary_reload (in_p
, x
, rclass
, mode
, &sri
);
525 icode
= (enum insn_code
) sri
.icode
;
527 /* If there are no secondary reloads at all, we return NO_REGS.
528 If an intermediate register is needed, we return its class. */
529 if (icode
== CODE_FOR_nothing
|| rclass
!= NO_REGS
)
532 /* No intermediate register is needed, but we have a special reload
533 pattern, which we assume for now needs a scratch register. */
534 return scratch_reload_class (icode
);
537 /* ICODE is the insn_code of a reload pattern. Check that it has exactly
538 three operands, verify that operand 2 is an output operand, and return
540 ??? We'd like to be able to handle any pattern with at least 2 operands,
541 for zero or more scratch registers, but that needs more infrastructure. */
543 scratch_reload_class (enum insn_code icode
)
545 const char *scratch_constraint
;
546 enum reg_class rclass
;
548 gcc_assert (insn_data
[(int) icode
].n_operands
== 3);
549 scratch_constraint
= insn_data
[(int) icode
].operand
[2].constraint
;
550 gcc_assert (*scratch_constraint
== '=');
551 scratch_constraint
++;
552 if (*scratch_constraint
== '&')
553 scratch_constraint
++;
554 rclass
= reg_class_for_constraint (lookup_constraint (scratch_constraint
));
555 gcc_assert (rclass
!= NO_REGS
);
559 #ifdef SECONDARY_MEMORY_NEEDED
561 /* Return a memory location that will be used to copy X in mode MODE.
562 If we haven't already made a location for this mode in this insn,
563 call find_reloads_address on the location being returned. */
566 get_secondary_mem (rtx x ATTRIBUTE_UNUSED
, machine_mode mode
,
567 int opnum
, enum reload_type type
)
572 /* By default, if MODE is narrower than a word, widen it to a word.
573 This is required because most machines that require these memory
574 locations do not support short load and stores from all registers
575 (e.g., FP registers). */
577 #ifdef SECONDARY_MEMORY_NEEDED_MODE
578 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
580 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
581 mode
= mode_for_size (BITS_PER_WORD
,
582 GET_MODE_CLASS (mode
), 0).require ();
585 /* If we already have made a MEM for this operand in MODE, return it. */
586 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
587 return secondary_memlocs_elim
[(int) mode
][opnum
];
589 /* If this is the first time we've tried to get a MEM for this mode,
590 allocate a new one. `something_changed' in reload will get set
591 by noticing that the frame size has changed. */
593 if (secondary_memlocs
[(int) mode
] == 0)
595 #ifdef SECONDARY_MEMORY_NEEDED_RTX
596 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
598 secondary_memlocs
[(int) mode
]
599 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
603 /* Get a version of the address doing any eliminations needed. If that
604 didn't give us a new MEM, make a new one if it isn't valid. */
606 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
607 mem_valid
= strict_memory_address_addr_space_p (mode
, XEXP (loc
, 0),
608 MEM_ADDR_SPACE (loc
));
610 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
611 loc
= copy_rtx (loc
);
613 /* The only time the call below will do anything is if the stack
614 offset is too large. In that case IND_LEVELS doesn't matter, so we
615 can just pass a zero. Adjust the type to be the address of the
616 corresponding object. If the address was valid, save the eliminated
617 address. If it wasn't valid, we need to make a reload each time, so
622 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
623 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
626 find_reloads_address (mode
, &loc
, XEXP (loc
, 0), &XEXP (loc
, 0),
630 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
631 if (secondary_memlocs_elim_used
<= (int)mode
)
632 secondary_memlocs_elim_used
= (int)mode
+ 1;
636 /* Clear any secondary memory locations we've made. */
639 clear_secondary_mem (void)
641 memset (secondary_memlocs
, 0, sizeof secondary_memlocs
);
643 #endif /* SECONDARY_MEMORY_NEEDED */
646 /* Find the largest class which has at least one register valid in
647 mode INNER, and which for every such register, that register number
648 plus N is also valid in OUTER (if in range) and is cheap to move
649 into REGNO. Such a class must exist. */
651 static enum reg_class
652 find_valid_class (machine_mode outer ATTRIBUTE_UNUSED
,
653 machine_mode inner ATTRIBUTE_UNUSED
, int n
,
654 unsigned int dest_regno ATTRIBUTE_UNUSED
)
659 enum reg_class best_class
= NO_REGS
;
660 enum reg_class dest_class ATTRIBUTE_UNUSED
= REGNO_REG_CLASS (dest_regno
);
661 unsigned int best_size
= 0;
664 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
668 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
- n
&& ! bad
; regno
++)
669 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
))
671 if (targetm
.hard_regno_mode_ok (regno
, inner
))
674 if (TEST_HARD_REG_BIT (reg_class_contents
[rclass
], regno
+ n
)
675 && !targetm
.hard_regno_mode_ok (regno
+ n
, outer
))
682 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
684 if ((reg_class_size
[rclass
] > best_size
685 && (best_cost
< 0 || best_cost
>= cost
))
688 best_class
= (enum reg_class
) rclass
;
689 best_size
= reg_class_size
[rclass
];
690 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
695 gcc_assert (best_size
!= 0);
700 /* We are trying to reload a subreg of something that is not a register.
701 Find the largest class which contains only registers valid in
702 mode MODE. OUTER is the mode of the subreg, DEST_CLASS the class in
703 which we would eventually like to obtain the object. */
705 static enum reg_class
706 find_valid_class_1 (machine_mode outer ATTRIBUTE_UNUSED
,
707 machine_mode mode ATTRIBUTE_UNUSED
,
708 enum reg_class dest_class ATTRIBUTE_UNUSED
)
713 enum reg_class best_class
= NO_REGS
;
714 unsigned int best_size
= 0;
717 for (rclass
= 1; rclass
< N_REG_CLASSES
; rclass
++)
719 unsigned int computed_rclass_size
= 0;
721 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
; regno
++)
723 if (in_hard_reg_set_p (reg_class_contents
[rclass
], mode
, regno
)
724 && targetm
.hard_regno_mode_ok (regno
, mode
))
725 computed_rclass_size
++;
728 cost
= register_move_cost (outer
, (enum reg_class
) rclass
, dest_class
);
730 if ((computed_rclass_size
> best_size
731 && (best_cost
< 0 || best_cost
>= cost
))
734 best_class
= (enum reg_class
) rclass
;
735 best_size
= computed_rclass_size
;
736 best_cost
= register_move_cost (outer
, (enum reg_class
) rclass
,
741 gcc_assert (best_size
!= 0);
743 #ifdef LIMIT_RELOAD_CLASS
744 best_class
= LIMIT_RELOAD_CLASS (mode
, best_class
);
749 /* Return the number of a previously made reload that can be combined with
750 a new one, or n_reloads if none of the existing reloads can be used.
751 OUT, RCLASS, TYPE and OPNUM are the same arguments as passed to
752 push_reload, they determine the kind of the new reload that we try to
753 combine. P_IN points to the corresponding value of IN, which can be
754 modified by this function.
755 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
758 find_reusable_reload (rtx
*p_in
, rtx out
, enum reg_class rclass
,
759 enum reload_type type
, int opnum
, int dont_share
)
763 /* We can't merge two reloads if the output of either one is
766 if (earlyclobber_operand_p (out
))
769 /* We can use an existing reload if the class is right
770 and at least one of IN and OUT is a match
771 and the other is at worst neutral.
772 (A zero compared against anything is neutral.)
774 For targets with small register classes, don't use existing reloads
775 unless they are for the same thing since that can cause us to need
776 more reload registers than we otherwise would. */
778 for (i
= 0; i
< n_reloads
; i
++)
779 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
780 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
781 /* If the existing reload has a register, it must fit our class. */
782 && (rld
[i
].reg_rtx
== 0
783 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
784 true_regnum (rld
[i
].reg_rtx
)))
785 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
786 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
787 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
788 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
789 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
790 && (small_register_class_p (rclass
)
791 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
792 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
795 /* Reloading a plain reg for input can match a reload to postincrement
796 that reg, since the postincrement's value is the right value.
797 Likewise, it can match a preincrement reload, since we regard
798 the preincrementation as happening before any ref in this insn
800 for (i
= 0; i
< n_reloads
; i
++)
801 if ((reg_class_subset_p (rclass
, rld
[i
].rclass
)
802 || reg_class_subset_p (rld
[i
].rclass
, rclass
))
803 /* If the existing reload has a register, it must fit our
805 && (rld
[i
].reg_rtx
== 0
806 || TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
807 true_regnum (rld
[i
].reg_rtx
)))
808 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
810 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == RTX_AUTOINC
811 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
812 || (REG_P (rld
[i
].in
)
813 && GET_RTX_CLASS (GET_CODE (in
)) == RTX_AUTOINC
814 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
815 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
816 && (small_register_class_p (rclass
)
817 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
818 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
819 opnum
, rld
[i
].opnum
))
821 /* Make sure reload_in ultimately has the increment,
822 not the plain register. */
830 /* Return true if X is a SUBREG that will need reloading of its SUBREG_REG
831 expression. MODE is the mode that X will be used in. OUTPUT is true if
832 the function is invoked for the output part of an enclosing reload. */
835 reload_inner_reg_of_subreg (rtx x
, machine_mode mode
, bool output
)
839 /* Only SUBREGs are problematical. */
840 if (GET_CODE (x
) != SUBREG
)
843 inner
= SUBREG_REG (x
);
845 /* If INNER is a constant or PLUS, then INNER will need reloading. */
846 if (CONSTANT_P (inner
) || GET_CODE (inner
) == PLUS
)
849 /* If INNER is not a hard register, then INNER will not need reloading. */
850 if (!(REG_P (inner
) && HARD_REGISTER_P (inner
)))
853 /* If INNER is not ok for MODE, then INNER will need reloading. */
854 if (!targetm
.hard_regno_mode_ok (subreg_regno (x
), mode
))
857 /* If this is for an output, and the outer part is a word or smaller,
858 INNER is larger than a word and the number of registers in INNER is
859 not the same as the number of words in INNER, then INNER will need
860 reloading (with an in-out reload). */
862 && GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
863 && GET_MODE_SIZE (GET_MODE (inner
)) > UNITS_PER_WORD
864 && ((GET_MODE_SIZE (GET_MODE (inner
)) / UNITS_PER_WORD
)
865 != (int) hard_regno_nregs
[REGNO (inner
)][GET_MODE (inner
)]));
868 /* Return nonzero if IN can be reloaded into REGNO with mode MODE without
869 requiring an extra reload register. The caller has already found that
870 IN contains some reference to REGNO, so check that we can produce the
871 new value in a single step. E.g. if we have
872 (set (reg r13) (plus (reg r13) (const int 1))), and there is an
873 instruction that adds one to a register, this should succeed.
874 However, if we have something like
875 (set (reg r13) (plus (reg r13) (const int 999))), and the constant 999
876 needs to be loaded into a register first, we need a separate reload
878 Such PLUS reloads are generated by find_reload_address_part.
879 The out-of-range PLUS expressions are usually introduced in the instruction
880 patterns by register elimination and substituting pseudos without a home
881 by their function-invariant equivalences. */
883 can_reload_into (rtx in
, int regno
, machine_mode mode
)
888 struct recog_data_d save_recog_data
;
890 /* For matching constraints, we often get notional input reloads where
891 we want to use the original register as the reload register. I.e.
892 technically this is a non-optional input-output reload, but IN is
893 already a valid register, and has been chosen as the reload register.
894 Speed this up, since it trivially works. */
898 /* To test MEMs properly, we'd have to take into account all the reloads
899 that are already scheduled, which can become quite complicated.
900 And since we've already handled address reloads for this MEM, it
901 should always succeed anyway. */
905 /* If we can make a simple SET insn that does the job, everything should
907 dst
= gen_rtx_REG (mode
, regno
);
908 test_insn
= make_insn_raw (gen_rtx_SET (dst
, in
));
909 save_recog_data
= recog_data
;
910 if (recog_memoized (test_insn
) >= 0)
912 extract_insn (test_insn
);
913 r
= constrain_operands (1, get_enabled_alternatives (test_insn
));
915 recog_data
= save_recog_data
;
919 /* Record one reload that needs to be performed.
920 IN is an rtx saying where the data are to be found before this instruction.
921 OUT says where they must be stored after the instruction.
922 (IN is zero for data not read, and OUT is zero for data not written.)
923 INLOC and OUTLOC point to the places in the instructions where
924 IN and OUT were found.
925 If IN and OUT are both nonzero, it means the same register must be used
926 to reload both IN and OUT.
928 RCLASS is a register class required for the reloaded data.
929 INMODE is the machine mode that the instruction requires
930 for the reg that replaces IN and OUTMODE is likewise for OUT.
932 If IN is zero, then OUT's location and mode should be passed as
935 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
937 OPTIONAL nonzero means this reload does not need to be performed:
938 it can be discarded if that is more convenient.
940 OPNUM and TYPE say what the purpose of this reload is.
942 The return value is the reload-number for this reload.
944 If both IN and OUT are nonzero, in some rare cases we might
945 want to make two separate reloads. (Actually we never do this now.)
946 Therefore, the reload-number for OUT is stored in
947 output_reloadnum when we return; the return value applies to IN.
948 Usually (presently always), when IN and OUT are nonzero,
949 the two reload-numbers are equal, but the caller should be careful to
953 push_reload (rtx in
, rtx out
, rtx
*inloc
, rtx
*outloc
,
954 enum reg_class rclass
, machine_mode inmode
,
955 machine_mode outmode
, int strict_low
, int optional
,
956 int opnum
, enum reload_type type
)
960 int dont_remove_subreg
= 0;
961 #ifdef LIMIT_RELOAD_CLASS
962 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
964 int secondary_in_reload
= -1, secondary_out_reload
= -1;
965 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
966 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
967 enum reg_class subreg_in_class ATTRIBUTE_UNUSED
;
968 subreg_in_class
= NO_REGS
;
970 /* INMODE and/or OUTMODE could be VOIDmode if no mode
971 has been specified for the operand. In that case,
972 use the operand's mode as the mode to reload. */
973 if (inmode
== VOIDmode
&& in
!= 0)
974 inmode
= GET_MODE (in
);
975 if (outmode
== VOIDmode
&& out
!= 0)
976 outmode
= GET_MODE (out
);
978 /* If find_reloads and friends until now missed to replace a pseudo
979 with a constant of reg_equiv_constant something went wrong
981 Note that it can't simply be done here if we missed it earlier
982 since the constant might need to be pushed into the literal pool
983 and the resulting memref would probably need further
985 if (in
!= 0 && REG_P (in
))
987 int regno
= REGNO (in
);
989 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
990 || reg_renumber
[regno
] >= 0
991 || reg_equiv_constant (regno
) == NULL_RTX
);
994 /* reg_equiv_constant only contains constants which are obviously
995 not appropriate as destination. So if we would need to replace
996 the destination pseudo with a constant we are in real
998 if (out
!= 0 && REG_P (out
))
1000 int regno
= REGNO (out
);
1002 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
1003 || reg_renumber
[regno
] >= 0
1004 || reg_equiv_constant (regno
) == NULL_RTX
);
1007 /* If we have a read-write operand with an address side-effect,
1008 change either IN or OUT so the side-effect happens only once. */
1009 if (in
!= 0 && out
!= 0 && MEM_P (in
) && rtx_equal_p (in
, out
))
1010 switch (GET_CODE (XEXP (in
, 0)))
1012 case POST_INC
: case POST_DEC
: case POST_MODIFY
:
1013 in
= replace_equiv_address_nv (in
, XEXP (XEXP (in
, 0), 0));
1016 case PRE_INC
: case PRE_DEC
: case PRE_MODIFY
:
1017 out
= replace_equiv_address_nv (out
, XEXP (XEXP (out
, 0), 0));
1024 /* If we are reloading a (SUBREG constant ...), really reload just the
1025 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
1026 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
1027 a pseudo and hence will become a MEM) with M1 wider than M2 and the
1028 register is a pseudo, also reload the inside expression.
1029 For machines that extend byte loads, do this for any SUBREG of a pseudo
1030 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
1031 M2 is an integral mode that gets extended when loaded.
1032 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1033 where either M1 is not valid for R or M2 is wider than a word but we
1034 only need one register to store an M2-sized quantity in R.
1035 (However, if OUT is nonzero, we need to reload the reg *and*
1036 the subreg, so do nothing here, and let following statement handle it.)
1038 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
1039 we can't handle it here because CONST_INT does not indicate a mode.
1041 Similarly, we must reload the inside expression if we have a
1042 STRICT_LOW_PART (presumably, in == out in this case).
1044 Also reload the inner expression if it does not require a secondary
1045 reload but the SUBREG does.
1047 Finally, reload the inner expression if it is a register that is in
1048 the class whose registers cannot be referenced in a different size
1049 and M1 is not the same size as M2. If subreg_lowpart_p is false, we
1050 cannot reload just the inside since we might end up with the wrong
1051 register class. But if it is inside a STRICT_LOW_PART, we have
1052 no choice, so we hope we do get the right register class there. */
1054 scalar_int_mode inner_mode
;
1055 if (in
!= 0 && GET_CODE (in
) == SUBREG
1056 && (subreg_lowpart_p (in
) || strict_low
)
1057 #ifdef CANNOT_CHANGE_MODE_CLASS
1058 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (in
)), inmode
, rclass
)
1060 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (in
))]
1061 && (CONSTANT_P (SUBREG_REG (in
))
1062 || GET_CODE (SUBREG_REG (in
)) == PLUS
1064 || (((REG_P (SUBREG_REG (in
))
1065 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
1066 || MEM_P (SUBREG_REG (in
)))
1067 && (paradoxical_subreg_p (inmode
, GET_MODE (SUBREG_REG (in
)))
1068 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1069 && is_a
<scalar_int_mode
> (GET_MODE (SUBREG_REG (in
)),
1071 && GET_MODE_SIZE (inner_mode
) <= UNITS_PER_WORD
1072 && paradoxical_subreg_p (inmode
, inner_mode
)
1073 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)
1074 || (WORD_REGISTER_OPERATIONS
1075 && partial_subreg_p (inmode
, GET_MODE (SUBREG_REG (in
)))
1076 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
1077 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
1078 / UNITS_PER_WORD
)))))
1079 || (REG_P (SUBREG_REG (in
))
1080 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1081 /* The case where out is nonzero
1082 is handled differently in the following statement. */
1083 && (out
== 0 || subreg_lowpart_p (in
))
1084 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1085 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1087 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1089 != (int) hard_regno_nregs
[REGNO (SUBREG_REG (in
))]
1090 [GET_MODE (SUBREG_REG (in
))]))
1091 || !targetm
.hard_regno_mode_ok (subreg_regno (in
), inmode
)))
1092 || (secondary_reload_class (1, rclass
, inmode
, in
) != NO_REGS
1093 && (secondary_reload_class (1, rclass
, GET_MODE (SUBREG_REG (in
)),
1096 #ifdef CANNOT_CHANGE_MODE_CLASS
1097 || (REG_P (SUBREG_REG (in
))
1098 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1099 && REG_CANNOT_CHANGE_MODE_P
1100 (REGNO (SUBREG_REG (in
)), GET_MODE (SUBREG_REG (in
)), inmode
))
1104 #ifdef LIMIT_RELOAD_CLASS
1105 in_subreg_loc
= inloc
;
1107 inloc
= &SUBREG_REG (in
);
1110 if (!WORD_REGISTER_OPERATIONS
1111 && LOAD_EXTEND_OP (GET_MODE (in
)) == UNKNOWN
1113 /* This is supposed to happen only for paradoxical subregs made by
1114 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
1115 gcc_assert (GET_MODE_SIZE (GET_MODE (in
)) <= GET_MODE_SIZE (inmode
));
1117 inmode
= GET_MODE (in
);
1120 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1121 where M1 is not valid for R if it was not handled by the code above.
1123 Similar issue for (SUBREG constant ...) if it was not handled by the
1124 code above. This can happen if SUBREG_BYTE != 0.
1126 However, we must reload the inner reg *as well as* the subreg in
1129 if (in
!= 0 && reload_inner_reg_of_subreg (in
, inmode
, false))
1131 if (REG_P (SUBREG_REG (in
)))
1133 = find_valid_class (inmode
, GET_MODE (SUBREG_REG (in
)),
1134 subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1135 GET_MODE (SUBREG_REG (in
)),
1138 REGNO (SUBREG_REG (in
)));
1139 else if (CONSTANT_P (SUBREG_REG (in
))
1140 || GET_CODE (SUBREG_REG (in
)) == PLUS
)
1141 subreg_in_class
= find_valid_class_1 (inmode
,
1142 GET_MODE (SUBREG_REG (in
)),
1145 /* This relies on the fact that emit_reload_insns outputs the
1146 instructions for input reloads of type RELOAD_OTHER in the same
1147 order as the reloads. Thus if the outer reload is also of type
1148 RELOAD_OTHER, we are guaranteed that this inner reload will be
1149 output before the outer reload. */
1150 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), (rtx
*) 0,
1151 subreg_in_class
, VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1152 dont_remove_subreg
= 1;
1155 /* Similarly for paradoxical and problematical SUBREGs on the output.
1156 Note that there is no reason we need worry about the previous value
1157 of SUBREG_REG (out); even if wider than out, storing in a subreg is
1158 entitled to clobber it all (except in the case of a word mode subreg
1159 or of a STRICT_LOW_PART, in that latter case the constraint should
1160 label it input-output.) */
1161 if (out
!= 0 && GET_CODE (out
) == SUBREG
1162 && (subreg_lowpart_p (out
) || strict_low
)
1163 #ifdef CANNOT_CHANGE_MODE_CLASS
1164 && !CANNOT_CHANGE_MODE_CLASS (GET_MODE (SUBREG_REG (out
)), outmode
, rclass
)
1166 && contains_allocatable_reg_of_mode
[rclass
][GET_MODE (SUBREG_REG (out
))]
1167 && (CONSTANT_P (SUBREG_REG (out
))
1169 || (((REG_P (SUBREG_REG (out
))
1170 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1171 || MEM_P (SUBREG_REG (out
)))
1172 && (paradoxical_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1173 || (WORD_REGISTER_OPERATIONS
1174 && partial_subreg_p (outmode
, GET_MODE (SUBREG_REG (out
)))
1175 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1176 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1177 / UNITS_PER_WORD
)))))
1178 || (REG_P (SUBREG_REG (out
))
1179 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1180 /* The case of a word mode subreg
1181 is handled differently in the following statement. */
1182 && ! (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1183 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1185 && !targetm
.hard_regno_mode_ok (subreg_regno (out
), outmode
))
1186 || (secondary_reload_class (0, rclass
, outmode
, out
) != NO_REGS
1187 && (secondary_reload_class (0, rclass
, GET_MODE (SUBREG_REG (out
)),
1190 #ifdef CANNOT_CHANGE_MODE_CLASS
1191 || (REG_P (SUBREG_REG (out
))
1192 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1193 && REG_CANNOT_CHANGE_MODE_P (REGNO (SUBREG_REG (out
)),
1194 GET_MODE (SUBREG_REG (out
)),
1199 #ifdef LIMIT_RELOAD_CLASS
1200 out_subreg_loc
= outloc
;
1202 outloc
= &SUBREG_REG (out
);
1204 gcc_assert (WORD_REGISTER_OPERATIONS
|| !MEM_P (out
)
1205 || GET_MODE_SIZE (GET_MODE (out
))
1206 <= GET_MODE_SIZE (outmode
));
1207 outmode
= GET_MODE (out
);
1210 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R
1211 where either M1 is not valid for R or M2 is wider than a word but we
1212 only need one register to store an M2-sized quantity in R.
1214 However, we must reload the inner reg *as well as* the subreg in
1215 that case and the inner reg is an in-out reload. */
1217 if (out
!= 0 && reload_inner_reg_of_subreg (out
, outmode
, true))
1219 enum reg_class in_out_class
1220 = find_valid_class (outmode
, GET_MODE (SUBREG_REG (out
)),
1221 subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1222 GET_MODE (SUBREG_REG (out
)),
1225 REGNO (SUBREG_REG (out
)));
1227 /* This relies on the fact that emit_reload_insns outputs the
1228 instructions for output reloads of type RELOAD_OTHER in reverse
1229 order of the reloads. Thus if the outer reload is also of type
1230 RELOAD_OTHER, we are guaranteed that this inner reload will be
1231 output after the outer reload. */
1232 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1233 &SUBREG_REG (out
), in_out_class
, VOIDmode
, VOIDmode
,
1234 0, 0, opnum
, RELOAD_OTHER
);
1235 dont_remove_subreg
= 1;
1238 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1239 if (in
!= 0 && out
!= 0 && MEM_P (out
)
1240 && (REG_P (in
) || MEM_P (in
) || GET_CODE (in
) == PLUS
)
1241 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1244 /* If IN is a SUBREG of a hard register, make a new REG. This
1245 simplifies some of the cases below. */
1247 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))
1248 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1249 && ! dont_remove_subreg
)
1250 in
= gen_rtx_REG (GET_MODE (in
), subreg_regno (in
));
1252 /* Similarly for OUT. */
1253 if (out
!= 0 && GET_CODE (out
) == SUBREG
1254 && REG_P (SUBREG_REG (out
))
1255 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1256 && ! dont_remove_subreg
)
1257 out
= gen_rtx_REG (GET_MODE (out
), subreg_regno (out
));
1259 /* Narrow down the class of register wanted if that is
1260 desirable on this machine for efficiency. */
1262 reg_class_t preferred_class
= rclass
;
1265 preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
1267 /* Output reloads may need analogous treatment, different in detail. */
1270 = targetm
.preferred_output_reload_class (out
, preferred_class
);
1272 /* Discard what the target said if we cannot do it. */
1273 if (preferred_class
!= NO_REGS
1274 || (optional
&& type
== RELOAD_FOR_OUTPUT
))
1275 rclass
= (enum reg_class
) preferred_class
;
1278 /* Make sure we use a class that can handle the actual pseudo
1279 inside any subreg. For example, on the 386, QImode regs
1280 can appear within SImode subregs. Although GENERAL_REGS
1281 can handle SImode, QImode needs a smaller class. */
1282 #ifdef LIMIT_RELOAD_CLASS
1284 rclass
= LIMIT_RELOAD_CLASS (inmode
, rclass
);
1285 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1286 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), rclass
);
1289 rclass
= LIMIT_RELOAD_CLASS (outmode
, rclass
);
1290 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1291 rclass
= LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), rclass
);
1294 /* Verify that this class is at least possible for the mode that
1296 if (this_insn_is_asm
)
1299 if (paradoxical_subreg_p (inmode
, outmode
))
1303 if (mode
== VOIDmode
)
1305 error_for_asm (this_insn
, "cannot reload integer constant "
1306 "operand in %<asm%>");
1311 outmode
= word_mode
;
1313 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1314 if (targetm
.hard_regno_mode_ok (i
, mode
)
1315 && in_hard_reg_set_p (reg_class_contents
[(int) rclass
], mode
, i
))
1317 if (i
== FIRST_PSEUDO_REGISTER
)
1319 error_for_asm (this_insn
, "impossible register constraint "
1321 /* Avoid further trouble with this insn. */
1322 PATTERN (this_insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
1323 /* We used to continue here setting class to ALL_REGS, but it triggers
1324 sanity check on i386 for:
1325 void foo(long double d)
1329 Returning zero here ought to be safe as we take care in
1330 find_reloads to not process the reloads when instruction was
1337 /* Optional output reloads are always OK even if we have no register class,
1338 since the function of these reloads is only to have spill_reg_store etc.
1339 set, so that the storing insn can be deleted later. */
1340 gcc_assert (rclass
!= NO_REGS
1341 || (optional
!= 0 && type
== RELOAD_FOR_OUTPUT
));
1343 i
= find_reusable_reload (&in
, out
, rclass
, type
, opnum
, dont_share
);
1347 /* See if we need a secondary reload register to move between CLASS
1348 and IN or CLASS and OUT. Get the icode and push any required reloads
1349 needed for each of them if so. */
1353 = push_secondary_reload (1, in
, opnum
, optional
, rclass
, inmode
, type
,
1354 &secondary_in_icode
, NULL
);
1355 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1356 secondary_out_reload
1357 = push_secondary_reload (0, out
, opnum
, optional
, rclass
, outmode
,
1358 type
, &secondary_out_icode
, NULL
);
1360 /* We found no existing reload suitable for re-use.
1361 So add an additional reload. */
1363 #ifdef SECONDARY_MEMORY_NEEDED
1364 if (subreg_in_class
== NO_REGS
1367 || (GET_CODE (in
) == SUBREG
&& REG_P (SUBREG_REG (in
))))
1368 && reg_or_subregno (in
) < FIRST_PSEUDO_REGISTER
)
1369 subreg_in_class
= REGNO_REG_CLASS (reg_or_subregno (in
));
1370 /* If a memory location is needed for the copy, make one. */
1371 if (subreg_in_class
!= NO_REGS
1372 && SECONDARY_MEMORY_NEEDED (subreg_in_class
, rclass
, inmode
))
1373 get_secondary_mem (in
, inmode
, opnum
, type
);
1379 rld
[i
].rclass
= rclass
;
1380 rld
[i
].inmode
= inmode
;
1381 rld
[i
].outmode
= outmode
;
1383 rld
[i
].optional
= optional
;
1385 rld
[i
].nocombine
= 0;
1386 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1387 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1388 rld
[i
].opnum
= opnum
;
1389 rld
[i
].when_needed
= type
;
1390 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1391 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1392 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1393 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1394 rld
[i
].secondary_p
= 0;
1398 #ifdef SECONDARY_MEMORY_NEEDED
1401 || (GET_CODE (out
) == SUBREG
&& REG_P (SUBREG_REG (out
))))
1402 && reg_or_subregno (out
) < FIRST_PSEUDO_REGISTER
1403 && SECONDARY_MEMORY_NEEDED (rclass
,
1404 REGNO_REG_CLASS (reg_or_subregno (out
)),
1406 get_secondary_mem (out
, outmode
, opnum
, type
);
1411 /* We are reusing an existing reload,
1412 but we may have additional information for it.
1413 For example, we may now have both IN and OUT
1414 while the old one may have just one of them. */
1416 /* The modes can be different. If they are, we want to reload in
1417 the larger mode, so that the value is valid for both modes. */
1418 if (inmode
!= VOIDmode
1419 && partial_subreg_p (rld
[i
].inmode
, inmode
))
1420 rld
[i
].inmode
= inmode
;
1421 if (outmode
!= VOIDmode
1422 && partial_subreg_p (rld
[i
].outmode
, outmode
))
1423 rld
[i
].outmode
= outmode
;
1426 rtx in_reg
= inloc
? *inloc
: 0;
1427 /* If we merge reloads for two distinct rtl expressions that
1428 are identical in content, there might be duplicate address
1429 reloads. Remove the extra set now, so that if we later find
1430 that we can inherit this reload, we can get rid of the
1431 address reloads altogether.
1433 Do not do this if both reloads are optional since the result
1434 would be an optional reload which could potentially leave
1435 unresolved address replacements.
1437 It is not sufficient to call transfer_replacements since
1438 choose_reload_regs will remove the replacements for address
1439 reloads of inherited reloads which results in the same
1441 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1442 && ! (rld
[i
].optional
&& optional
))
1444 /* We must keep the address reload with the lower operand
1446 if (opnum
> rld
[i
].opnum
)
1448 remove_address_replacements (in
);
1450 in_reg
= rld
[i
].in_reg
;
1453 remove_address_replacements (rld
[i
].in
);
1455 /* When emitting reloads we don't necessarily look at the in-
1456 and outmode, but also directly at the operands (in and out).
1457 So we can't simply overwrite them with whatever we have found
1458 for this (to-be-merged) reload, we have to "merge" that too.
1459 Reusing another reload already verified that we deal with the
1460 same operands, just possibly in different modes. So we
1461 overwrite the operands only when the new mode is larger.
1462 See also PR33613. */
1464 || partial_subreg_p (GET_MODE (rld
[i
].in
), GET_MODE (in
)))
1468 && partial_subreg_p (GET_MODE (rld
[i
].in_reg
),
1469 GET_MODE (in_reg
))))
1470 rld
[i
].in_reg
= in_reg
;
1476 && partial_subreg_p (GET_MODE (rld
[i
].out
),
1481 || partial_subreg_p (GET_MODE (rld
[i
].out_reg
),
1482 GET_MODE (*outloc
))))
1483 rld
[i
].out_reg
= *outloc
;
1485 if (reg_class_subset_p (rclass
, rld
[i
].rclass
))
1486 rld
[i
].rclass
= rclass
;
1487 rld
[i
].optional
&= optional
;
1488 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1489 opnum
, rld
[i
].opnum
))
1490 rld
[i
].when_needed
= RELOAD_OTHER
;
1491 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1494 /* If the ostensible rtx being reloaded differs from the rtx found
1495 in the location to substitute, this reload is not safe to combine
1496 because we cannot reliably tell whether it appears in the insn. */
1498 if (in
!= 0 && in
!= *inloc
)
1499 rld
[i
].nocombine
= 1;
1502 /* This was replaced by changes in find_reloads_address_1 and the new
1503 function inc_for_reload, which go with a new meaning of reload_inc. */
1505 /* If this is an IN/OUT reload in an insn that sets the CC,
1506 it must be for an autoincrement. It doesn't work to store
1507 the incremented value after the insn because that would clobber the CC.
1508 So we must do the increment of the value reloaded from,
1509 increment it, store it back, then decrement again. */
1510 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1514 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1515 /* If we did not find a nonzero amount-to-increment-by,
1516 that contradicts the belief that IN is being incremented
1517 in an address in this insn. */
1518 gcc_assert (rld
[i
].inc
!= 0);
1522 /* If we will replace IN and OUT with the reload-reg,
1523 record where they are located so that substitution need
1524 not do a tree walk. */
1526 if (replace_reloads
)
1530 struct replacement
*r
= &replacements
[n_replacements
++];
1535 if (outloc
!= 0 && outloc
!= inloc
)
1537 struct replacement
*r
= &replacements
[n_replacements
++];
1544 /* If this reload is just being introduced and it has both
1545 an incoming quantity and an outgoing quantity that are
1546 supposed to be made to match, see if either one of the two
1547 can serve as the place to reload into.
1549 If one of them is acceptable, set rld[i].reg_rtx
1552 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1554 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1557 earlyclobber_operand_p (out
));
1559 /* If the outgoing register already contains the same value
1560 as the incoming one, we can dispense with loading it.
1561 The easiest way to tell the caller that is to give a phony
1562 value for the incoming operand (same as outgoing one). */
1563 if (rld
[i
].reg_rtx
== out
1564 && (REG_P (in
) || CONSTANT_P (in
))
1565 && 0 != find_equiv_reg (in
, this_insn
, NO_REGS
, REGNO (out
),
1566 static_reload_reg_p
, i
, inmode
))
1570 /* If this is an input reload and the operand contains a register that
1571 dies in this insn and is used nowhere else, see if it is the right class
1572 to be used for this reload. Use it if so. (This occurs most commonly
1573 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1574 this if it is also an output reload that mentions the register unless
1575 the output is a SUBREG that clobbers an entire register.
1577 Note that the operand might be one of the spill regs, if it is a
1578 pseudo reg and we are in a block where spilling has not taken place.
1579 But if there is no spilling in this block, that is OK.
1580 An explicitly used hard reg cannot be a spill reg. */
1582 if (rld
[i
].reg_rtx
== 0 && in
!= 0 && hard_regs_live_known
)
1586 machine_mode rel_mode
= inmode
;
1588 if (out
&& partial_subreg_p (rel_mode
, outmode
))
1591 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1592 if (REG_NOTE_KIND (note
) == REG_DEAD
1593 && REG_P (XEXP (note
, 0))
1594 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1595 && reg_mentioned_p (XEXP (note
, 0), in
)
1596 /* Check that a former pseudo is valid; see find_dummy_reload. */
1597 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1598 || (! bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1599 ORIGINAL_REGNO (XEXP (note
, 0)))
1600 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1))
1601 && ! refers_to_regno_for_reload_p (regno
,
1602 end_hard_regno (rel_mode
,
1604 PATTERN (this_insn
), inloc
)
1605 && ! find_reg_fusage (this_insn
, USE
, XEXP (note
, 0))
1606 /* If this is also an output reload, IN cannot be used as
1607 the reload register if it is set in this insn unless IN
1609 && (out
== 0 || in
== out
1610 || ! hard_reg_set_here_p (regno
,
1611 end_hard_regno (rel_mode
, regno
),
1612 PATTERN (this_insn
)))
1613 /* ??? Why is this code so different from the previous?
1614 Is there any simple coherent way to describe the two together?
1615 What's going on here. */
1617 || (GET_CODE (in
) == SUBREG
1618 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1620 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1621 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1622 /* Make sure the operand fits in the reg that dies. */
1623 && (GET_MODE_SIZE (rel_mode
)
1624 <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0))))
1625 && targetm
.hard_regno_mode_ok (regno
, inmode
)
1626 && targetm
.hard_regno_mode_ok (regno
, outmode
))
1629 unsigned int nregs
= MAX (hard_regno_nregs
[regno
][inmode
],
1630 hard_regno_nregs
[regno
][outmode
]);
1632 for (offs
= 0; offs
< nregs
; offs
++)
1633 if (fixed_regs
[regno
+ offs
]
1634 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
1639 && (! (refers_to_regno_for_reload_p
1640 (regno
, end_hard_regno (inmode
, regno
), in
, (rtx
*) 0))
1641 || can_reload_into (in
, regno
, inmode
)))
1643 rld
[i
].reg_rtx
= gen_rtx_REG (rel_mode
, regno
);
1650 output_reloadnum
= i
;
1655 /* Record an additional place we must replace a value
1656 for which we have already recorded a reload.
1657 RELOADNUM is the value returned by push_reload
1658 when the reload was recorded.
1659 This is used in insn patterns that use match_dup. */
1662 push_replacement (rtx
*loc
, int reloadnum
, machine_mode mode
)
1664 if (replace_reloads
)
1666 struct replacement
*r
= &replacements
[n_replacements
++];
1667 r
->what
= reloadnum
;
1673 /* Duplicate any replacement we have recorded to apply at
1674 location ORIG_LOC to also be performed at DUP_LOC.
1675 This is used in insn patterns that use match_dup. */
1678 dup_replacements (rtx
*dup_loc
, rtx
*orig_loc
)
1680 int i
, n
= n_replacements
;
1682 for (i
= 0; i
< n
; i
++)
1684 struct replacement
*r
= &replacements
[i
];
1685 if (r
->where
== orig_loc
)
1686 push_replacement (dup_loc
, r
->what
, r
->mode
);
1690 /* Transfer all replacements that used to be in reload FROM to be in
1694 transfer_replacements (int to
, int from
)
1698 for (i
= 0; i
< n_replacements
; i
++)
1699 if (replacements
[i
].what
== from
)
1700 replacements
[i
].what
= to
;
1703 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1704 or a subpart of it. If we have any replacements registered for IN_RTX,
1705 cancel the reloads that were supposed to load them.
1706 Return nonzero if we canceled any reloads. */
1708 remove_address_replacements (rtx in_rtx
)
1711 char reload_flags
[MAX_RELOADS
];
1712 int something_changed
= 0;
1714 memset (reload_flags
, 0, sizeof reload_flags
);
1715 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1717 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1718 reload_flags
[replacements
[i
].what
] |= 1;
1721 replacements
[j
++] = replacements
[i
];
1722 reload_flags
[replacements
[i
].what
] |= 2;
1725 /* Note that the following store must be done before the recursive calls. */
1728 for (i
= n_reloads
- 1; i
>= 0; i
--)
1730 if (reload_flags
[i
] == 1)
1732 deallocate_reload_reg (i
);
1733 remove_address_replacements (rld
[i
].in
);
1735 something_changed
= 1;
1738 return something_changed
;
1741 /* If there is only one output reload, and it is not for an earlyclobber
1742 operand, try to combine it with a (logically unrelated) input reload
1743 to reduce the number of reload registers needed.
1745 This is safe if the input reload does not appear in
1746 the value being output-reloaded, because this implies
1747 it is not needed any more once the original insn completes.
1749 If that doesn't work, see we can use any of the registers that
1750 die in this insn as a reload register. We can if it is of the right
1751 class and does not appear in the value being output-reloaded. */
1754 combine_reloads (void)
1757 int output_reload
= -1;
1758 int secondary_out
= -1;
1761 /* Find the output reload; return unless there is exactly one
1762 and that one is mandatory. */
1764 for (i
= 0; i
< n_reloads
; i
++)
1765 if (rld
[i
].out
!= 0)
1767 if (output_reload
>= 0)
1772 if (output_reload
< 0 || rld
[output_reload
].optional
)
1775 /* An input-output reload isn't combinable. */
1777 if (rld
[output_reload
].in
!= 0)
1780 /* If this reload is for an earlyclobber operand, we can't do anything. */
1781 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1784 /* If there is a reload for part of the address of this operand, we would
1785 need to change it to RELOAD_FOR_OTHER_ADDRESS. But that would extend
1786 its life to the point where doing this combine would not lower the
1787 number of spill registers needed. */
1788 for (i
= 0; i
< n_reloads
; i
++)
1789 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
1790 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
1791 && rld
[i
].opnum
== rld
[output_reload
].opnum
)
1794 /* Check each input reload; can we combine it? */
1796 for (i
= 0; i
< n_reloads
; i
++)
1797 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1798 /* Life span of this reload must not extend past main insn. */
1799 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1800 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1801 && rld
[i
].when_needed
!= RELOAD_OTHER
1802 && (ira_reg_class_max_nregs
[(int)rld
[i
].rclass
][(int) rld
[i
].inmode
]
1803 == ira_reg_class_max_nregs
[(int) rld
[output_reload
].rclass
]
1804 [(int) rld
[output_reload
].outmode
])
1806 && rld
[i
].reg_rtx
== 0
1807 #ifdef SECONDARY_MEMORY_NEEDED
1808 /* Don't combine two reloads with different secondary
1809 memory locations. */
1810 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1811 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1812 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1813 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1815 && (targetm
.small_register_classes_for_mode_p (VOIDmode
)
1816 ? (rld
[i
].rclass
== rld
[output_reload
].rclass
)
1817 : (reg_class_subset_p (rld
[i
].rclass
,
1818 rld
[output_reload
].rclass
)
1819 || reg_class_subset_p (rld
[output_reload
].rclass
,
1821 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1822 /* Args reversed because the first arg seems to be
1823 the one that we imagine being modified
1824 while the second is the one that might be affected. */
1825 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1827 /* However, if the input is a register that appears inside
1828 the output, then we also can't share.
1829 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1830 If the same reload reg is used for both reg 69 and the
1831 result to be stored in memory, then that result
1832 will clobber the address of the memory ref. */
1833 && ! (REG_P (rld
[i
].in
)
1834 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1835 rld
[output_reload
].out
))))
1836 && ! reload_inner_reg_of_subreg (rld
[i
].in
, rld
[i
].inmode
,
1837 rld
[i
].when_needed
!= RELOAD_FOR_INPUT
)
1838 && (reg_class_size
[(int) rld
[i
].rclass
]
1839 || targetm
.small_register_classes_for_mode_p (VOIDmode
))
1840 /* We will allow making things slightly worse by combining an
1841 input and an output, but no worse than that. */
1842 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1843 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1847 /* We have found a reload to combine with! */
1848 rld
[i
].out
= rld
[output_reload
].out
;
1849 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1850 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1851 /* Mark the old output reload as inoperative. */
1852 rld
[output_reload
].out
= 0;
1853 /* The combined reload is needed for the entire insn. */
1854 rld
[i
].when_needed
= RELOAD_OTHER
;
1855 /* If the output reload had a secondary reload, copy it. */
1856 if (rld
[output_reload
].secondary_out_reload
!= -1)
1858 rld
[i
].secondary_out_reload
1859 = rld
[output_reload
].secondary_out_reload
;
1860 rld
[i
].secondary_out_icode
1861 = rld
[output_reload
].secondary_out_icode
;
1864 #ifdef SECONDARY_MEMORY_NEEDED
1865 /* Copy any secondary MEM. */
1866 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1867 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1868 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1870 /* If required, minimize the register class. */
1871 if (reg_class_subset_p (rld
[output_reload
].rclass
,
1873 rld
[i
].rclass
= rld
[output_reload
].rclass
;
1875 /* Transfer all replacements from the old reload to the combined. */
1876 for (j
= 0; j
< n_replacements
; j
++)
1877 if (replacements
[j
].what
== output_reload
)
1878 replacements
[j
].what
= i
;
1883 /* If this insn has only one operand that is modified or written (assumed
1884 to be the first), it must be the one corresponding to this reload. It
1885 is safe to use anything that dies in this insn for that output provided
1886 that it does not occur in the output (we already know it isn't an
1887 earlyclobber. If this is an asm insn, give up. */
1889 if (INSN_CODE (this_insn
) == -1)
1892 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1893 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1894 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1897 /* See if some hard register that dies in this insn and is not used in
1898 the output is the right class. Only works if the register we pick
1899 up can fully hold our output reload. */
1900 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1901 if (REG_NOTE_KIND (note
) == REG_DEAD
1902 && REG_P (XEXP (note
, 0))
1903 && !reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1904 rld
[output_reload
].out
)
1905 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1906 && targetm
.hard_regno_mode_ok (regno
, rld
[output_reload
].outmode
)
1907 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].rclass
],
1909 && (hard_regno_nregs
[regno
][rld
[output_reload
].outmode
]
1910 <= hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))])
1911 /* Ensure that a secondary or tertiary reload for this output
1912 won't want this register. */
1913 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1914 || (!(TEST_HARD_REG_BIT
1915 (reg_class_contents
[(int) rld
[secondary_out
].rclass
], regno
))
1916 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1917 || !(TEST_HARD_REG_BIT
1918 (reg_class_contents
[(int) rld
[secondary_out
].rclass
],
1920 && !fixed_regs
[regno
]
1921 /* Check that a former pseudo is valid; see find_dummy_reload. */
1922 && (ORIGINAL_REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1923 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
1924 ORIGINAL_REGNO (XEXP (note
, 0)))
1925 && hard_regno_nregs
[regno
][GET_MODE (XEXP (note
, 0))] == 1)))
1927 rld
[output_reload
].reg_rtx
1928 = gen_rtx_REG (rld
[output_reload
].outmode
, regno
);
1933 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1934 See if one of IN and OUT is a register that may be used;
1935 this is desirable since a spill-register won't be needed.
1936 If so, return the register rtx that proves acceptable.
1938 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1939 RCLASS is the register class required for the reload.
1941 If FOR_REAL is >= 0, it is the number of the reload,
1942 and in some cases when it can be discovered that OUT doesn't need
1943 to be computed, clear out rld[FOR_REAL].out.
1945 If FOR_REAL is -1, this should not be done, because this call
1946 is just to see if a register can be found, not to find and install it.
1948 EARLYCLOBBER is nonzero if OUT is an earlyclobber operand. This
1949 puts an additional constraint on being able to use IN for OUT since
1950 IN must not appear elsewhere in the insn (it is assumed that IN itself
1951 is safe from the earlyclobber). */
1954 find_dummy_reload (rtx real_in
, rtx real_out
, rtx
*inloc
, rtx
*outloc
,
1955 machine_mode inmode
, machine_mode outmode
,
1956 reg_class_t rclass
, int for_real
, int earlyclobber
)
1964 /* If operands exceed a word, we can't use either of them
1965 unless they have the same size. */
1966 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1967 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1968 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1971 /* Note that {in,out}_offset are needed only when 'in' or 'out'
1972 respectively refers to a hard register. */
1974 /* Find the inside of any subregs. */
1975 while (GET_CODE (out
) == SUBREG
)
1977 if (REG_P (SUBREG_REG (out
))
1978 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
)
1979 out_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (out
)),
1980 GET_MODE (SUBREG_REG (out
)),
1983 out
= SUBREG_REG (out
);
1985 while (GET_CODE (in
) == SUBREG
)
1987 if (REG_P (SUBREG_REG (in
))
1988 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
)
1989 in_offset
+= subreg_regno_offset (REGNO (SUBREG_REG (in
)),
1990 GET_MODE (SUBREG_REG (in
)),
1993 in
= SUBREG_REG (in
);
1996 /* Narrow down the reg class, the same way push_reload will;
1997 otherwise we might find a dummy now, but push_reload won't. */
1999 reg_class_t preferred_class
= targetm
.preferred_reload_class (in
, rclass
);
2000 if (preferred_class
!= NO_REGS
)
2001 rclass
= (enum reg_class
) preferred_class
;
2004 /* See if OUT will do. */
2006 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
2008 unsigned int regno
= REGNO (out
) + out_offset
;
2009 unsigned int nwords
= hard_regno_nregs
[regno
][outmode
];
2012 /* When we consider whether the insn uses OUT,
2013 ignore references within IN. They don't prevent us
2014 from copying IN into OUT, because those refs would
2015 move into the insn that reloads IN.
2017 However, we only ignore IN in its role as this reload.
2018 If the insn uses IN elsewhere and it contains OUT,
2019 that counts. We can't be sure it's the "same" operand
2020 so it might not go through this reload.
2022 We also need to avoid using OUT if it, or part of it, is a
2023 fixed register. Modifying such registers, even transiently,
2024 may have undefined effects on the machine, such as modifying
2025 the stack pointer. */
2027 *inloc
= const0_rtx
;
2029 if (regno
< FIRST_PSEUDO_REGISTER
2030 && targetm
.hard_regno_mode_ok (regno
, outmode
)
2031 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2032 PATTERN (this_insn
), outloc
))
2036 for (i
= 0; i
< nwords
; i
++)
2037 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2039 || fixed_regs
[regno
+ i
])
2044 if (REG_P (real_out
))
2047 value
= gen_rtx_REG (outmode
, regno
);
2054 /* Consider using IN if OUT was not acceptable
2055 or if OUT dies in this insn (like the quotient in a divmod insn).
2056 We can't use IN unless it is dies in this insn,
2057 which means we must know accurately which hard regs are live.
2058 Also, the result can't go in IN if IN is used within OUT,
2059 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
2060 if (hard_regs_live_known
2062 && REGNO (in
) < FIRST_PSEUDO_REGISTER
2064 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
2065 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
2066 && !fixed_regs
[REGNO (in
)]
2067 && targetm
.hard_regno_mode_ok (REGNO (in
),
2068 /* The only case where out and real_out
2069 might have different modes is where
2070 real_out is a subreg, and in that
2071 case, out has a real mode. */
2072 (GET_MODE (out
) != VOIDmode
2073 ? GET_MODE (out
) : outmode
))
2074 && (ORIGINAL_REGNO (in
) < FIRST_PSEUDO_REGISTER
2075 /* However only do this if we can be sure that this input
2076 operand doesn't correspond with an uninitialized pseudo.
2077 global can assign some hardreg to it that is the same as
2078 the one assigned to a different, also live pseudo (as it
2079 can ignore the conflict). We must never introduce writes
2080 to such hardregs, as they would clobber the other live
2081 pseudo. See PR 20973. */
2082 || (!bitmap_bit_p (DF_LR_OUT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)),
2083 ORIGINAL_REGNO (in
))
2084 /* Similarly, only do this if we can be sure that the death
2085 note is still valid. global can assign some hardreg to
2086 the pseudo referenced in the note and simultaneously a
2087 subword of this hardreg to a different, also live pseudo,
2088 because only another subword of the hardreg is actually
2089 used in the insn. This cannot happen if the pseudo has
2090 been assigned exactly one hardreg. See PR 33732. */
2091 && hard_regno_nregs
[REGNO (in
)][GET_MODE (in
)] == 1)))
2093 unsigned int regno
= REGNO (in
) + in_offset
;
2094 unsigned int nwords
= hard_regno_nregs
[regno
][inmode
];
2096 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, (rtx
*) 0)
2097 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
2098 PATTERN (this_insn
))
2100 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
2101 PATTERN (this_insn
), inloc
)))
2105 for (i
= 0; i
< nwords
; i
++)
2106 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) rclass
],
2112 /* If we were going to use OUT as the reload reg
2113 and changed our mind, it means OUT is a dummy that
2114 dies here. So don't bother copying value to it. */
2115 if (for_real
>= 0 && value
== real_out
)
2116 rld
[for_real
].out
= 0;
2117 if (REG_P (real_in
))
2120 value
= gen_rtx_REG (inmode
, regno
);
2128 /* This page contains subroutines used mainly for determining
2129 whether the IN or an OUT of a reload can serve as the
2132 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
2135 earlyclobber_operand_p (rtx x
)
2139 for (i
= 0; i
< n_earlyclobbers
; i
++)
2140 if (reload_earlyclobbers
[i
] == x
)
2146 /* Return 1 if expression X alters a hard reg in the range
2147 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
2148 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
2149 X should be the body of an instruction. */
2152 hard_reg_set_here_p (unsigned int beg_regno
, unsigned int end_regno
, rtx x
)
2154 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
2156 rtx op0
= SET_DEST (x
);
2158 while (GET_CODE (op0
) == SUBREG
)
2159 op0
= SUBREG_REG (op0
);
2162 unsigned int r
= REGNO (op0
);
2164 /* See if this reg overlaps range under consideration. */
2166 && end_hard_regno (GET_MODE (op0
), r
) > beg_regno
)
2170 else if (GET_CODE (x
) == PARALLEL
)
2172 int i
= XVECLEN (x
, 0) - 1;
2175 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
2182 /* Return 1 if ADDR is a valid memory address for mode MODE
2183 in address space AS, and check that each pseudo reg has the
2184 proper kind of hard reg. */
2187 strict_memory_address_addr_space_p (machine_mode mode ATTRIBUTE_UNUSED
,
2188 rtx addr
, addr_space_t as
)
2190 #ifdef GO_IF_LEGITIMATE_ADDRESS
2191 gcc_assert (ADDR_SPACE_GENERIC_P (as
));
2192 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
2198 return targetm
.addr_space
.legitimate_address_p (mode
, addr
, 1, as
);
2202 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
2203 if they are the same hard reg, and has special hacks for
2204 autoincrement and autodecrement.
2205 This is specifically intended for find_reloads to use
2206 in determining whether two operands match.
2207 X is the operand whose number is the lower of the two.
2209 The value is 2 if Y contains a pre-increment that matches
2210 a non-incrementing address in X. */
2212 /* ??? To be completely correct, we should arrange to pass
2213 for X the output operand and for Y the input operand.
2214 For now, we assume that the output operand has the lower number
2215 because that is natural in (SET output (... input ...)). */
2218 operands_match_p (rtx x
, rtx y
)
2221 RTX_CODE code
= GET_CODE (x
);
2227 if ((code
== REG
|| (code
== SUBREG
&& REG_P (SUBREG_REG (x
))))
2228 && (REG_P (y
) || (GET_CODE (y
) == SUBREG
2229 && REG_P (SUBREG_REG (y
)))))
2235 i
= REGNO (SUBREG_REG (x
));
2236 if (i
>= FIRST_PSEUDO_REGISTER
)
2238 i
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
2239 GET_MODE (SUBREG_REG (x
)),
2246 if (GET_CODE (y
) == SUBREG
)
2248 j
= REGNO (SUBREG_REG (y
));
2249 if (j
>= FIRST_PSEUDO_REGISTER
)
2251 j
+= subreg_regno_offset (REGNO (SUBREG_REG (y
)),
2252 GET_MODE (SUBREG_REG (y
)),
2259 /* On a REG_WORDS_BIG_ENDIAN machine, point to the last register of a
2260 multiple hard register group of scalar integer registers, so that
2261 for example (reg:DI 0) and (reg:SI 1) will be considered the same
2263 scalar_int_mode xmode
;
2264 if (REG_WORDS_BIG_ENDIAN
2265 && is_a
<scalar_int_mode
> (GET_MODE (x
), &xmode
)
2266 && GET_MODE_SIZE (xmode
) > UNITS_PER_WORD
2267 && i
< FIRST_PSEUDO_REGISTER
)
2268 i
+= hard_regno_nregs
[i
][xmode
] - 1;
2269 scalar_int_mode ymode
;
2270 if (REG_WORDS_BIG_ENDIAN
2271 && is_a
<scalar_int_mode
> (GET_MODE (y
), &ymode
)
2272 && GET_MODE_SIZE (ymode
) > UNITS_PER_WORD
2273 && j
< FIRST_PSEUDO_REGISTER
)
2274 j
+= hard_regno_nregs
[j
][ymode
] - 1;
2278 /* If two operands must match, because they are really a single
2279 operand of an assembler insn, then two postincrements are invalid
2280 because the assembler insn would increment only once.
2281 On the other hand, a postincrement matches ordinary indexing
2282 if the postincrement is the output operand. */
2283 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2284 return operands_match_p (XEXP (x
, 0), y
);
2285 /* Two preincrements are invalid
2286 because the assembler insn would increment only once.
2287 On the other hand, a preincrement matches ordinary indexing
2288 if the preincrement is the input operand.
2289 In this case, return 2, since some callers need to do special
2290 things when this happens. */
2291 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2292 || GET_CODE (y
) == PRE_MODIFY
)
2293 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2297 /* Now we have disposed of all the cases in which different rtx codes
2299 if (code
!= GET_CODE (y
))
2302 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2303 if (GET_MODE (x
) != GET_MODE (y
))
2306 /* MEMs referring to different address space are not equivalent. */
2307 if (code
== MEM
&& MEM_ADDR_SPACE (x
) != MEM_ADDR_SPACE (y
))
2316 return label_ref_label (x
) == label_ref_label (y
);
2318 return XSTR (x
, 0) == XSTR (y
, 0);
2324 /* Compare the elements. If any pair of corresponding elements
2325 fail to match, return 0 for the whole things. */
2328 fmt
= GET_RTX_FORMAT (code
);
2329 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2335 if (XWINT (x
, i
) != XWINT (y
, i
))
2340 if (XINT (x
, i
) != XINT (y
, i
))
2345 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2348 /* If any subexpression returns 2,
2349 we should return 2 if we are successful. */
2358 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2360 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2362 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2370 /* It is believed that rtx's at this level will never
2371 contain anything but integers and other rtx's,
2372 except for within LABEL_REFs and SYMBOL_REFs. */
2377 return 1 + success_2
;
2380 /* Describe the range of registers or memory referenced by X.
2381 If X is a register, set REG_FLAG and put the first register
2382 number into START and the last plus one into END.
2383 If X is a memory reference, put a base address into BASE
2384 and a range of integer offsets into START and END.
2385 If X is pushing on the stack, we can assume it causes no trouble,
2386 so we set the SAFE field. */
2388 static struct decomposition
2391 struct decomposition val
;
2394 memset (&val
, 0, sizeof (val
));
2396 switch (GET_CODE (x
))
2400 rtx base
= NULL_RTX
, offset
= 0;
2401 rtx addr
= XEXP (x
, 0);
2403 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2404 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2406 val
.base
= XEXP (addr
, 0);
2407 val
.start
= -GET_MODE_SIZE (GET_MODE (x
));
2408 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2409 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2413 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2415 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2416 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2417 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2419 val
.base
= XEXP (addr
, 0);
2420 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2421 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2422 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2427 if (GET_CODE (addr
) == CONST
)
2429 addr
= XEXP (addr
, 0);
2432 if (GET_CODE (addr
) == PLUS
)
2434 if (CONSTANT_P (XEXP (addr
, 0)))
2436 base
= XEXP (addr
, 1);
2437 offset
= XEXP (addr
, 0);
2439 else if (CONSTANT_P (XEXP (addr
, 1)))
2441 base
= XEXP (addr
, 0);
2442 offset
= XEXP (addr
, 1);
2449 offset
= const0_rtx
;
2451 if (GET_CODE (offset
) == CONST
)
2452 offset
= XEXP (offset
, 0);
2453 if (GET_CODE (offset
) == PLUS
)
2455 if (CONST_INT_P (XEXP (offset
, 0)))
2457 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2458 offset
= XEXP (offset
, 0);
2460 else if (CONST_INT_P (XEXP (offset
, 1)))
2462 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2463 offset
= XEXP (offset
, 1);
2467 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2468 offset
= const0_rtx
;
2471 else if (!CONST_INT_P (offset
))
2473 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2474 offset
= const0_rtx
;
2477 if (all_const
&& GET_CODE (base
) == PLUS
)
2478 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2480 gcc_assert (CONST_INT_P (offset
));
2482 val
.start
= INTVAL (offset
);
2483 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2490 val
.start
= true_regnum (x
);
2491 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2493 /* A pseudo with no hard reg. */
2494 val
.start
= REGNO (x
);
2495 val
.end
= val
.start
+ 1;
2499 val
.end
= end_hard_regno (GET_MODE (x
), val
.start
);
2503 if (!REG_P (SUBREG_REG (x
)))
2504 /* This could be more precise, but it's good enough. */
2505 return decompose (SUBREG_REG (x
));
2507 val
.start
= true_regnum (x
);
2508 if (val
.start
< 0 || val
.start
>= FIRST_PSEUDO_REGISTER
)
2509 return decompose (SUBREG_REG (x
));
2512 val
.end
= val
.start
+ subreg_nregs (x
);
2516 /* This hasn't been assigned yet, so it can't conflict yet. */
2521 gcc_assert (CONSTANT_P (x
));
2528 /* Return 1 if altering Y will not modify the value of X.
2529 Y is also described by YDATA, which should be decompose (Y). */
2532 immune_p (rtx x
, rtx y
, struct decomposition ydata
)
2534 struct decomposition xdata
;
2537 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, (rtx
*) 0);
2541 gcc_assert (MEM_P (y
));
2542 /* If Y is memory and X is not, Y can't affect X. */
2546 xdata
= decompose (x
);
2548 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2550 /* If bases are distinct symbolic constants, there is no overlap. */
2551 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2553 /* Constants and stack slots never overlap. */
2554 if (CONSTANT_P (xdata
.base
)
2555 && (ydata
.base
== frame_pointer_rtx
2556 || ydata
.base
== hard_frame_pointer_rtx
2557 || ydata
.base
== stack_pointer_rtx
))
2559 if (CONSTANT_P (ydata
.base
)
2560 && (xdata
.base
== frame_pointer_rtx
2561 || xdata
.base
== hard_frame_pointer_rtx
2562 || xdata
.base
== stack_pointer_rtx
))
2564 /* If either base is variable, we don't know anything. */
2568 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2571 /* Similar, but calls decompose. */
2574 safe_from_earlyclobber (rtx op
, rtx clobber
)
2576 struct decomposition early_data
;
2578 early_data
= decompose (clobber
);
2579 return immune_p (op
, clobber
, early_data
);
2582 /* Main entry point of this file: search the body of INSN
2583 for values that need reloading and record them with push_reload.
2584 REPLACE nonzero means record also where the values occur
2585 so that subst_reloads can be used.
2587 IND_LEVELS says how many levels of indirection are supported by this
2588 machine; a value of zero means that a memory reference is not a valid
2591 LIVE_KNOWN says we have valid information about which hard
2592 regs are live at each point in the program; this is true when
2593 we are called from global_alloc but false when stupid register
2594 allocation has been done.
2596 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2597 which is nonnegative if the reg has been commandeered for reloading into.
2598 It is copied into STATIC_RELOAD_REG_P and referenced from there
2599 by various subroutines.
2601 Return TRUE if some operands need to be changed, because of swapping
2602 commutative operands, reg_equiv_address substitution, or whatever. */
2605 find_reloads (rtx_insn
*insn
, int replace
, int ind_levels
, int live_known
,
2606 short *reload_reg_p
)
2608 int insn_code_number
;
2611 /* These start out as the constraints for the insn
2612 and they are chewed up as we consider alternatives. */
2613 const char *constraints
[MAX_RECOG_OPERANDS
];
2614 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2616 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2617 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2618 /* Nonzero for a MEM operand whose entire address needs a reload.
2619 May be -1 to indicate the entire address may or may not need a reload. */
2620 int address_reloaded
[MAX_RECOG_OPERANDS
];
2621 /* Nonzero for an address operand that needs to be completely reloaded.
2622 May be -1 to indicate the entire operand may or may not need a reload. */
2623 int address_operand_reloaded
[MAX_RECOG_OPERANDS
];
2624 /* Value of enum reload_type to use for operand. */
2625 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2626 /* Value of enum reload_type to use within address of operand. */
2627 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2628 /* Save the usage of each operand. */
2629 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2630 int no_input_reloads
= 0, no_output_reloads
= 0;
2632 reg_class_t this_alternative
[MAX_RECOG_OPERANDS
];
2633 char this_alternative_match_win
[MAX_RECOG_OPERANDS
];
2634 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2635 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2636 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2637 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2638 reg_class_t goal_alternative
[MAX_RECOG_OPERANDS
];
2639 int this_alternative_number
;
2640 int goal_alternative_number
= 0;
2641 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2642 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2643 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2644 char goal_alternative_match_win
[MAX_RECOG_OPERANDS
];
2645 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2646 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2647 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2648 int goal_alternative_swapped
;
2651 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2652 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2653 rtx body
= PATTERN (insn
);
2654 rtx set
= single_set (insn
);
2655 int goal_earlyclobber
= 0, this_earlyclobber
;
2656 machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2662 n_earlyclobbers
= 0;
2663 replace_reloads
= replace
;
2664 hard_regs_live_known
= live_known
;
2665 static_reload_reg_p
= reload_reg_p
;
2667 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2668 neither are insns that SET cc0. Insns that use CC0 are not allowed
2669 to have any input reloads. */
2670 if (JUMP_P (insn
) || CALL_P (insn
))
2671 no_output_reloads
= 1;
2673 if (HAVE_cc0
&& reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2674 no_input_reloads
= 1;
2675 if (HAVE_cc0
&& reg_set_p (cc0_rtx
, PATTERN (insn
)))
2676 no_output_reloads
= 1;
2678 #ifdef SECONDARY_MEMORY_NEEDED
2679 /* The eliminated forms of any secondary memory locations are per-insn, so
2680 clear them out here. */
2682 if (secondary_memlocs_elim_used
)
2684 memset (secondary_memlocs_elim
, 0,
2685 sizeof (secondary_memlocs_elim
[0]) * secondary_memlocs_elim_used
);
2686 secondary_memlocs_elim_used
= 0;
2690 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2691 is cheap to move between them. If it is not, there may not be an insn
2692 to do the copy, so we may need a reload. */
2693 if (GET_CODE (body
) == SET
2694 && REG_P (SET_DEST (body
))
2695 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2696 && REG_P (SET_SRC (body
))
2697 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2698 && register_move_cost (GET_MODE (SET_SRC (body
)),
2699 REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2700 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2703 extract_insn (insn
);
2705 noperands
= reload_n_operands
= recog_data
.n_operands
;
2706 n_alternatives
= recog_data
.n_alternatives
;
2708 /* Just return "no reloads" if insn has no operands with constraints. */
2709 if (noperands
== 0 || n_alternatives
== 0)
2712 insn_code_number
= INSN_CODE (insn
);
2713 this_insn_is_asm
= insn_code_number
< 0;
2715 memcpy (operand_mode
, recog_data
.operand_mode
,
2716 noperands
* sizeof (machine_mode
));
2717 memcpy (constraints
, recog_data
.constraints
,
2718 noperands
* sizeof (const char *));
2722 /* If we will need to know, later, whether some pair of operands
2723 are the same, we must compare them now and save the result.
2724 Reloading the base and index registers will clobber them
2725 and afterward they will fail to match. */
2727 for (i
= 0; i
< noperands
; i
++)
2733 substed_operand
[i
] = recog_data
.operand
[i
];
2736 modified
[i
] = RELOAD_READ
;
2738 /* Scan this operand's constraint to see if it is an output operand,
2739 an in-out operand, is commutative, or should match another. */
2743 p
+= CONSTRAINT_LEN (c
, p
);
2747 modified
[i
] = RELOAD_WRITE
;
2750 modified
[i
] = RELOAD_READ_WRITE
;
2754 /* The last operand should not be marked commutative. */
2755 gcc_assert (i
!= noperands
- 1);
2757 /* We currently only support one commutative pair of
2758 operands. Some existing asm code currently uses more
2759 than one pair. Previously, that would usually work,
2760 but sometimes it would crash the compiler. We
2761 continue supporting that case as well as we can by
2762 silently ignoring all but the first pair. In the
2763 future we may handle it correctly. */
2764 if (commutative
< 0)
2767 gcc_assert (this_insn_is_asm
);
2770 /* Use of ISDIGIT is tempting here, but it may get expensive because
2771 of locale support we don't want. */
2772 case '0': case '1': case '2': case '3': case '4':
2773 case '5': case '6': case '7': case '8': case '9':
2775 c
= strtoul (p
- 1, &end
, 10);
2778 operands_match
[c
][i
]
2779 = operands_match_p (recog_data
.operand
[c
],
2780 recog_data
.operand
[i
]);
2782 /* An operand may not match itself. */
2783 gcc_assert (c
!= i
);
2785 /* If C can be commuted with C+1, and C might need to match I,
2786 then C+1 might also need to match I. */
2787 if (commutative
>= 0)
2789 if (c
== commutative
|| c
== commutative
+ 1)
2791 int other
= c
+ (c
== commutative
? 1 : -1);
2792 operands_match
[other
][i
]
2793 = operands_match_p (recog_data
.operand
[other
],
2794 recog_data
.operand
[i
]);
2796 if (i
== commutative
|| i
== commutative
+ 1)
2798 int other
= i
+ (i
== commutative
? 1 : -1);
2799 operands_match
[c
][other
]
2800 = operands_match_p (recog_data
.operand
[c
],
2801 recog_data
.operand
[other
]);
2803 /* Note that C is supposed to be less than I.
2804 No need to consider altering both C and I because in
2805 that case we would alter one into the other. */
2812 /* Examine each operand that is a memory reference or memory address
2813 and reload parts of the addresses into index registers.
2814 Also here any references to pseudo regs that didn't get hard regs
2815 but are equivalent to constants get replaced in the insn itself
2816 with those constants. Nobody will ever see them again.
2818 Finally, set up the preferred classes of each operand. */
2820 for (i
= 0; i
< noperands
; i
++)
2822 RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2824 address_reloaded
[i
] = 0;
2825 address_operand_reloaded
[i
] = 0;
2826 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2827 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2830 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2831 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2834 if (*constraints
[i
] == 0)
2835 /* Ignore things like match_operator operands. */
2837 else if (insn_extra_address_constraint
2838 (lookup_constraint (constraints
[i
])))
2840 address_operand_reloaded
[i
]
2841 = find_reloads_address (recog_data
.operand_mode
[i
], (rtx
*) 0,
2842 recog_data
.operand
[i
],
2843 recog_data
.operand_loc
[i
],
2844 i
, operand_type
[i
], ind_levels
, insn
);
2846 /* If we now have a simple operand where we used to have a
2847 PLUS or MULT, re-recognize and try again. */
2848 if ((OBJECT_P (*recog_data
.operand_loc
[i
])
2849 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2850 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2851 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2853 INSN_CODE (insn
) = -1;
2854 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2859 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2860 substed_operand
[i
] = recog_data
.operand
[i
];
2862 /* Address operands are reloaded in their existing mode,
2863 no matter what is specified in the machine description. */
2864 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2866 /* If the address is a single CONST_INT pick address mode
2867 instead otherwise we will later not know in which mode
2868 the reload should be performed. */
2869 if (operand_mode
[i
] == VOIDmode
)
2870 operand_mode
[i
] = Pmode
;
2873 else if (code
== MEM
)
2876 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2877 recog_data
.operand_loc
[i
],
2878 XEXP (recog_data
.operand
[i
], 0),
2879 &XEXP (recog_data
.operand
[i
], 0),
2880 i
, address_type
[i
], ind_levels
, insn
);
2881 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2882 substed_operand
[i
] = recog_data
.operand
[i
];
2884 else if (code
== SUBREG
)
2886 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2888 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2891 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2893 &address_reloaded
[i
]);
2895 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2896 that didn't get a hard register, emit a USE with a REG_EQUAL
2897 note in front so that we might inherit a previous, possibly
2903 && (GET_MODE_SIZE (GET_MODE (reg
))
2904 >= GET_MODE_SIZE (GET_MODE (op
)))
2905 && reg_equiv_constant (REGNO (reg
)) == 0)
2906 set_unique_reg_note (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
),
2908 REG_EQUAL
, reg_equiv_memory_loc (REGNO (reg
)));
2910 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2912 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == RTX_UNARY
)
2913 /* We can get a PLUS as an "operand" as a result of register
2914 elimination. See eliminate_regs and gen_reload. We handle
2915 a unary operator by reloading the operand. */
2916 substed_operand
[i
] = recog_data
.operand
[i
]
2917 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2918 ind_levels
, 0, insn
,
2919 &address_reloaded
[i
]);
2920 else if (code
== REG
)
2922 /* This is equivalent to calling find_reloads_toplev.
2923 The code is duplicated for speed.
2924 When we find a pseudo always equivalent to a constant,
2925 we replace it by the constant. We must be sure, however,
2926 that we don't try to replace it in the insn in which it
2928 int regno
= REGNO (recog_data
.operand
[i
]);
2929 if (reg_equiv_constant (regno
) != 0
2930 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2932 /* Record the existing mode so that the check if constants are
2933 allowed will work when operand_mode isn't specified. */
2935 if (operand_mode
[i
] == VOIDmode
)
2936 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2938 substed_operand
[i
] = recog_data
.operand
[i
]
2939 = reg_equiv_constant (regno
);
2941 if (reg_equiv_memory_loc (regno
) != 0
2942 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
2943 /* We need not give a valid is_set_dest argument since the case
2944 of a constant equivalence was checked above. */
2945 substed_operand
[i
] = recog_data
.operand
[i
]
2946 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2947 ind_levels
, 0, insn
,
2948 &address_reloaded
[i
]);
2950 /* If the operand is still a register (we didn't replace it with an
2951 equivalent), get the preferred class to reload it into. */
2952 code
= GET_CODE (recog_data
.operand
[i
]);
2954 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2955 >= FIRST_PSEUDO_REGISTER
)
2956 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2960 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2961 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2964 /* If this is simply a copy from operand 1 to operand 0, merge the
2965 preferred classes for the operands. */
2966 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2967 && recog_data
.operand
[1] == SET_SRC (set
))
2969 preferred_class
[0] = preferred_class
[1]
2970 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2971 pref_or_nothing
[0] |= pref_or_nothing
[1];
2972 pref_or_nothing
[1] |= pref_or_nothing
[0];
2975 /* Now see what we need for pseudo-regs that didn't get hard regs
2976 or got the wrong kind of hard reg. For this, we must consider
2977 all the operands together against the register constraints. */
2979 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2981 goal_alternative_swapped
= 0;
2983 /* The constraints are made of several alternatives.
2984 Each operand's constraint looks like foo,bar,... with commas
2985 separating the alternatives. The first alternatives for all
2986 operands go together, the second alternatives go together, etc.
2988 First loop over alternatives. */
2990 alternative_mask enabled
= get_enabled_alternatives (insn
);
2991 for (this_alternative_number
= 0;
2992 this_alternative_number
< n_alternatives
;
2993 this_alternative_number
++)
2997 if (!TEST_BIT (enabled
, this_alternative_number
))
3001 for (i
= 0; i
< recog_data
.n_operands
; i
++)
3002 constraints
[i
] = skip_alternative (constraints
[i
]);
3007 /* If insn is commutative (it's safe to exchange a certain pair
3008 of operands) then we need to try each alternative twice, the
3009 second time matching those two operands as if we had
3010 exchanged them. To do this, really exchange them in
3012 for (swapped
= 0; swapped
< (commutative
>= 0 ? 2 : 1); swapped
++)
3014 /* Loop over operands for one constraint alternative. */
3015 /* LOSERS counts those that don't fit this alternative
3016 and would require loading. */
3018 /* BAD is set to 1 if it some operand can't fit this alternative
3019 even after reloading. */
3021 /* REJECT is a count of how undesirable this alternative says it is
3022 if any reloading is required. If the alternative matches exactly
3023 then REJECT is ignored, but otherwise it gets this much
3024 counted against it in addition to the reloading needed. Each
3025 ? counts three times here since we want the disparaging caused by
3026 a bad register class to only count 1/3 as much. */
3031 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3032 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3033 /* Swap the duplicates too. */
3034 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3035 if (recog_data
.dup_num
[i
] == commutative
3036 || recog_data
.dup_num
[i
] == commutative
+ 1)
3037 *recog_data
.dup_loc
[i
]
3038 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3040 std::swap (preferred_class
[commutative
],
3041 preferred_class
[commutative
+ 1]);
3042 std::swap (pref_or_nothing
[commutative
],
3043 pref_or_nothing
[commutative
+ 1]);
3044 std::swap (address_reloaded
[commutative
],
3045 address_reloaded
[commutative
+ 1]);
3048 this_earlyclobber
= 0;
3050 for (i
= 0; i
< noperands
; i
++)
3052 const char *p
= constraints
[i
];
3057 /* 0 => this operand can be reloaded somehow for this alternative. */
3059 /* 0 => this operand can be reloaded if the alternative allows regs. */
3063 rtx operand
= recog_data
.operand
[i
];
3065 /* Nonzero means this is a MEM that must be reloaded into a reg
3066 regardless of what the constraint says. */
3067 int force_reload
= 0;
3069 /* Nonzero if a constant forced into memory would be OK for this
3072 int earlyclobber
= 0;
3073 enum constraint_num cn
;
3076 /* If the predicate accepts a unary operator, it means that
3077 we need to reload the operand, but do not do this for
3078 match_operator and friends. */
3079 if (UNARY_P (operand
) && *p
!= 0)
3080 operand
= XEXP (operand
, 0);
3082 /* If the operand is a SUBREG, extract
3083 the REG or MEM (or maybe even a constant) within.
3084 (Constants can occur as a result of reg_equiv_constant.) */
3086 while (GET_CODE (operand
) == SUBREG
)
3088 /* Offset only matters when operand is a REG and
3089 it is a hard reg. This is because it is passed
3090 to reg_fits_class_p if it is a REG and all pseudos
3091 return 0 from that function. */
3092 if (REG_P (SUBREG_REG (operand
))
3093 && REGNO (SUBREG_REG (operand
)) < FIRST_PSEUDO_REGISTER
)
3095 if (simplify_subreg_regno (REGNO (SUBREG_REG (operand
)),
3096 GET_MODE (SUBREG_REG (operand
)),
3097 SUBREG_BYTE (operand
),
3098 GET_MODE (operand
)) < 0)
3100 offset
+= subreg_regno_offset (REGNO (SUBREG_REG (operand
)),
3101 GET_MODE (SUBREG_REG (operand
)),
3102 SUBREG_BYTE (operand
),
3103 GET_MODE (operand
));
3105 operand
= SUBREG_REG (operand
);
3106 /* Force reload if this is a constant or PLUS or if there may
3107 be a problem accessing OPERAND in the outer mode. */
3108 scalar_int_mode inner_mode
;
3109 if (CONSTANT_P (operand
)
3110 || GET_CODE (operand
) == PLUS
3111 /* We must force a reload of paradoxical SUBREGs
3112 of a MEM because the alignment of the inner value
3113 may not be enough to do the outer reference. On
3114 big-endian machines, it may also reference outside
3117 On machines that extend byte operations and we have a
3118 SUBREG where both the inner and outer modes are no wider
3119 than a word and the inner mode is narrower, is integral,
3120 and gets extended when loaded from memory, combine.c has
3121 made assumptions about the behavior of the machine in such
3122 register access. If the data is, in fact, in memory we
3123 must always load using the size assumed to be in the
3124 register and let the insn do the different-sized
3127 This is doubly true if WORD_REGISTER_OPERATIONS. In
3128 this case eliminate_regs has left non-paradoxical
3129 subregs for push_reload to see. Make sure it does
3130 by forcing the reload.
3132 ??? When is it right at this stage to have a subreg
3133 of a mem that is _not_ to be handled specially? IMO
3134 those should have been reduced to just a mem. */
3135 || ((MEM_P (operand
)
3137 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3138 && (WORD_REGISTER_OPERATIONS
3139 || ((GET_MODE_BITSIZE (GET_MODE (operand
))
3140 < BIGGEST_ALIGNMENT
)
3141 && paradoxical_subreg_p (operand_mode
[i
],
3142 GET_MODE (operand
)))
3144 || ((GET_MODE_SIZE (operand_mode
[i
])
3146 && (is_a
<scalar_int_mode
>
3147 (GET_MODE (operand
), &inner_mode
))
3148 && (GET_MODE_SIZE (inner_mode
)
3150 && paradoxical_subreg_p (operand_mode
[i
],
3152 && LOAD_EXTEND_OP (inner_mode
) != UNKNOWN
)))
3157 this_alternative
[i
] = NO_REGS
;
3158 this_alternative_win
[i
] = 0;
3159 this_alternative_match_win
[i
] = 0;
3160 this_alternative_offmemok
[i
] = 0;
3161 this_alternative_earlyclobber
[i
] = 0;
3162 this_alternative_matches
[i
] = -1;
3164 /* An empty constraint or empty alternative
3165 allows anything which matched the pattern. */
3166 if (*p
== 0 || *p
== ',')
3169 /* Scan this alternative's specs for this operand;
3170 set WIN if the operand fits any letter in this alternative.
3171 Otherwise, clear BADOP if this operand could
3172 fit some letter after reloads,
3173 or set WINREG if this operand could fit after reloads
3174 provided the constraint allows some registers. */
3177 switch ((c
= *p
, len
= CONSTRAINT_LEN (c
, p
)), c
)
3195 /* Ignore rest of this alternative as far as
3196 reloading is concerned. */
3199 while (*p
&& *p
!= ',');
3203 case '0': case '1': case '2': case '3': case '4':
3204 case '5': case '6': case '7': case '8': case '9':
3205 m
= strtoul (p
, &end
, 10);
3209 this_alternative_matches
[i
] = m
;
3210 /* We are supposed to match a previous operand.
3211 If we do, we win if that one did.
3212 If we do not, count both of the operands as losers.
3213 (This is too conservative, since most of the time
3214 only a single reload insn will be needed to make
3215 the two operands win. As a result, this alternative
3216 may be rejected when it is actually desirable.) */
3217 if ((swapped
&& (m
!= commutative
|| i
!= commutative
+ 1))
3218 /* If we are matching as if two operands were swapped,
3219 also pretend that operands_match had been computed
3221 But if I is the second of those and C is the first,
3222 don't exchange them, because operands_match is valid
3223 only on one side of its diagonal. */
3225 [(m
== commutative
|| m
== commutative
+ 1)
3226 ? 2 * commutative
+ 1 - m
: m
]
3227 [(i
== commutative
|| i
== commutative
+ 1)
3228 ? 2 * commutative
+ 1 - i
: i
])
3229 : operands_match
[m
][i
])
3231 /* If we are matching a non-offsettable address where an
3232 offsettable address was expected, then we must reject
3233 this combination, because we can't reload it. */
3234 if (this_alternative_offmemok
[m
]
3235 && MEM_P (recog_data
.operand
[m
])
3236 && this_alternative
[m
] == NO_REGS
3237 && ! this_alternative_win
[m
])
3240 did_match
= this_alternative_win
[m
];
3244 /* Operands don't match. */
3247 /* Retroactively mark the operand we had to match
3248 as a loser, if it wasn't already. */
3249 if (this_alternative_win
[m
])
3251 this_alternative_win
[m
] = 0;
3252 if (this_alternative
[m
] == NO_REGS
)
3254 /* But count the pair only once in the total badness of
3255 this alternative, if the pair can be a dummy reload.
3256 The pointers in operand_loc are not swapped; swap
3257 them by hand if necessary. */
3258 if (swapped
&& i
== commutative
)
3259 loc1
= commutative
+ 1;
3260 else if (swapped
&& i
== commutative
+ 1)
3264 if (swapped
&& m
== commutative
)
3265 loc2
= commutative
+ 1;
3266 else if (swapped
&& m
== commutative
+ 1)
3271 = find_dummy_reload (recog_data
.operand
[i
],
3272 recog_data
.operand
[m
],
3273 recog_data
.operand_loc
[loc1
],
3274 recog_data
.operand_loc
[loc2
],
3275 operand_mode
[i
], operand_mode
[m
],
3276 this_alternative
[m
], -1,
3277 this_alternative_earlyclobber
[m
]);
3282 /* This can be fixed with reloads if the operand
3283 we are supposed to match can be fixed with reloads. */
3285 this_alternative
[i
] = this_alternative
[m
];
3287 /* If we have to reload this operand and some previous
3288 operand also had to match the same thing as this
3289 operand, we don't know how to do that. So reject this
3291 if (! did_match
|| force_reload
)
3292 for (j
= 0; j
< i
; j
++)
3293 if (this_alternative_matches
[j
]
3294 == this_alternative_matches
[i
])
3302 /* All necessary reloads for an address_operand
3303 were handled in find_reloads_address. */
3305 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3311 case TARGET_MEM_CONSTRAINT
:
3316 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3317 && reg_renumber
[REGNO (operand
)] < 0))
3319 if (CONST_POOL_OK_P (operand_mode
[i
], operand
))
3326 && ! address_reloaded
[i
]
3327 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
3328 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
3334 && ! address_reloaded
[i
]
3335 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
3336 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
3340 /* Memory operand whose address is not offsettable. */
3345 && ! (ind_levels
? offsettable_memref_p (operand
)
3346 : offsettable_nonstrict_memref_p (operand
))
3347 /* Certain mem addresses will become offsettable
3348 after they themselves are reloaded. This is important;
3349 we don't want our own handling of unoffsettables
3350 to override the handling of reg_equiv_address. */
3351 && !(REG_P (XEXP (operand
, 0))
3353 || reg_equiv_address (REGNO (XEXP (operand
, 0))) != 0)))
3357 /* Memory operand whose address is offsettable. */
3361 if ((MEM_P (operand
)
3362 /* If IND_LEVELS, find_reloads_address won't reload a
3363 pseudo that didn't get a hard reg, so we have to
3364 reject that case. */
3365 && ((ind_levels
? offsettable_memref_p (operand
)
3366 : offsettable_nonstrict_memref_p (operand
))
3367 /* A reloaded address is offsettable because it is now
3368 just a simple register indirect. */
3369 || address_reloaded
[i
] == 1))
3371 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3372 && reg_renumber
[REGNO (operand
)] < 0
3373 /* If reg_equiv_address is nonzero, we will be
3374 loading it into a register; hence it will be
3375 offsettable, but we cannot say that reg_equiv_mem
3376 is offsettable without checking. */
3377 && ((reg_equiv_mem (REGNO (operand
)) != 0
3378 && offsettable_memref_p (reg_equiv_mem (REGNO (operand
))))
3379 || (reg_equiv_address (REGNO (operand
)) != 0))))
3381 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3389 /* Output operand that is stored before the need for the
3390 input operands (and their index registers) is over. */
3391 earlyclobber
= 1, this_earlyclobber
= 1;
3401 /* A PLUS is never a valid operand, but reload can make
3402 it from a register when eliminating registers. */
3403 && GET_CODE (operand
) != PLUS
3404 /* A SCRATCH is not a valid operand. */
3405 && GET_CODE (operand
) != SCRATCH
3406 && (! CONSTANT_P (operand
)
3408 || LEGITIMATE_PIC_OPERAND_P (operand
))
3409 && (GENERAL_REGS
== ALL_REGS
3411 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3412 && reg_renumber
[REGNO (operand
)] < 0)))
3418 cn
= lookup_constraint (p
);
3419 switch (get_constraint_type (cn
))
3422 cl
= reg_class_for_constraint (cn
);
3428 if (CONST_INT_P (operand
)
3429 && (insn_const_int_ok_for_constraint
3430 (INTVAL (operand
), cn
)))
3437 if (constraint_satisfied_p (operand
, cn
))
3439 /* If the address was already reloaded,
3441 else if (MEM_P (operand
) && address_reloaded
[i
] == 1)
3443 /* Likewise if the address will be reloaded because
3444 reg_equiv_address is nonzero. For reg_equiv_mem
3445 we have to check. */
3446 else if (REG_P (operand
)
3447 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3448 && reg_renumber
[REGNO (operand
)] < 0
3449 && ((reg_equiv_mem (REGNO (operand
)) != 0
3450 && (constraint_satisfied_p
3451 (reg_equiv_mem (REGNO (operand
)),
3453 || (reg_equiv_address (REGNO (operand
))
3457 /* If we didn't already win, we can reload
3458 constants via force_const_mem, and other
3459 MEMs by reloading the address like for 'o'. */
3460 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3467 case CT_SPECIAL_MEMORY
:
3470 if (constraint_satisfied_p (operand
, cn
))
3472 /* Likewise if the address will be reloaded because
3473 reg_equiv_address is nonzero. For reg_equiv_mem
3474 we have to check. */
3475 else if (REG_P (operand
)
3476 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3477 && reg_renumber
[REGNO (operand
)] < 0
3478 && reg_equiv_mem (REGNO (operand
)) != 0
3479 && (constraint_satisfied_p
3480 (reg_equiv_mem (REGNO (operand
)), cn
)))
3485 if (constraint_satisfied_p (operand
, cn
))
3488 /* If we didn't already win, we can reload
3489 the address into a base register. */
3491 = base_reg_class (VOIDmode
, ADDR_SPACE_GENERIC
,
3497 if (constraint_satisfied_p (operand
, cn
))
3505 = reg_class_subunion
[this_alternative
[i
]][cl
];
3506 if (GET_MODE (operand
) == BLKmode
)
3510 && reg_fits_class_p (operand
, this_alternative
[i
],
3511 offset
, GET_MODE (recog_data
.operand
[i
])))
3515 while ((p
+= len
), c
);
3517 if (swapped
== (commutative
>= 0 ? 1 : 0))
3520 /* If this operand could be handled with a reg,
3521 and some reg is allowed, then this operand can be handled. */
3522 if (winreg
&& this_alternative
[i
] != NO_REGS
3523 && (win
|| !class_only_fixed_regs
[this_alternative
[i
]]))
3526 /* Record which operands fit this alternative. */
3527 this_alternative_earlyclobber
[i
] = earlyclobber
;
3528 if (win
&& ! force_reload
)
3529 this_alternative_win
[i
] = 1;
3530 else if (did_match
&& ! force_reload
)
3531 this_alternative_match_win
[i
] = 1;
3534 int const_to_mem
= 0;
3536 this_alternative_offmemok
[i
] = offmemok
;
3540 /* Alternative loses if it has no regs for a reg operand. */
3542 && this_alternative
[i
] == NO_REGS
3543 && this_alternative_matches
[i
] < 0)
3546 /* If this is a constant that is reloaded into the desired
3547 class by copying it to memory first, count that as another
3548 reload. This is consistent with other code and is
3549 required to avoid choosing another alternative when
3550 the constant is moved into memory by this function on
3551 an early reload pass. Note that the test here is
3552 precisely the same as in the code below that calls
3554 if (CONST_POOL_OK_P (operand_mode
[i
], operand
)
3555 && ((targetm
.preferred_reload_class (operand
,
3556 this_alternative
[i
])
3558 || no_input_reloads
))
3561 if (this_alternative
[i
] != NO_REGS
)
3565 /* Alternative loses if it requires a type of reload not
3566 permitted for this insn. We can always reload SCRATCH
3567 and objects with a REG_UNUSED note. */
3568 if (GET_CODE (operand
) != SCRATCH
3569 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3570 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3572 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3576 /* If we can't reload this value at all, reject this
3577 alternative. Note that we could also lose due to
3578 LIMIT_RELOAD_CLASS, but we don't check that
3581 if (! CONSTANT_P (operand
) && this_alternative
[i
] != NO_REGS
)
3583 if (targetm
.preferred_reload_class (operand
,
3584 this_alternative
[i
])
3588 if (operand_type
[i
] == RELOAD_FOR_OUTPUT
3589 && (targetm
.preferred_output_reload_class (operand
,
3590 this_alternative
[i
])
3595 /* We prefer to reload pseudos over reloading other things,
3596 since such reloads may be able to be eliminated later.
3597 If we are reloading a SCRATCH, we won't be generating any
3598 insns, just using a register, so it is also preferred.
3599 So bump REJECT in other cases. Don't do this in the
3600 case where we are forcing a constant into memory and
3601 it will then win since we don't want to have a different
3602 alternative match then. */
3603 if (! (REG_P (operand
)
3604 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3605 && GET_CODE (operand
) != SCRATCH
3606 && ! (const_to_mem
&& constmemok
))
3609 /* Input reloads can be inherited more often than output
3610 reloads can be removed, so penalize output reloads. */
3611 if (operand_type
[i
] != RELOAD_FOR_INPUT
3612 && GET_CODE (operand
) != SCRATCH
)
3616 /* If this operand is a pseudo register that didn't get
3617 a hard reg and this alternative accepts some
3618 register, see if the class that we want is a subset
3619 of the preferred class for this register. If not,
3620 but it intersects that class, use the preferred class
3621 instead. If it does not intersect the preferred
3622 class, show that usage of this alternative should be
3623 discouraged; it will be discouraged more still if the
3624 register is `preferred or nothing'. We do this
3625 because it increases the chance of reusing our spill
3626 register in a later insn and avoiding a pair of
3627 memory stores and loads.
3629 Don't bother with this if this alternative will
3630 accept this operand.
3632 Don't do this for a multiword operand, since it is
3633 only a small win and has the risk of requiring more
3634 spill registers, which could cause a large loss.
3636 Don't do this if the preferred class has only one
3637 register because we might otherwise exhaust the
3640 if (! win
&& ! did_match
3641 && this_alternative
[i
] != NO_REGS
3642 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3643 && reg_class_size
[(int) preferred_class
[i
]] > 0
3644 && ! small_register_class_p (preferred_class
[i
]))
3646 if (! reg_class_subset_p (this_alternative
[i
],
3647 preferred_class
[i
]))
3649 /* Since we don't have a way of forming the intersection,
3650 we just do something special if the preferred class
3651 is a subset of the class we have; that's the most
3652 common case anyway. */
3653 if (reg_class_subset_p (preferred_class
[i
],
3654 this_alternative
[i
]))
3655 this_alternative
[i
] = preferred_class
[i
];
3657 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3662 /* Now see if any output operands that are marked "earlyclobber"
3663 in this alternative conflict with any input operands
3664 or any memory addresses. */
3666 for (i
= 0; i
< noperands
; i
++)
3667 if (this_alternative_earlyclobber
[i
]
3668 && (this_alternative_win
[i
] || this_alternative_match_win
[i
]))
3670 struct decomposition early_data
;
3672 early_data
= decompose (recog_data
.operand
[i
]);
3674 gcc_assert (modified
[i
] != RELOAD_READ
);
3676 if (this_alternative
[i
] == NO_REGS
)
3678 this_alternative_earlyclobber
[i
] = 0;
3679 gcc_assert (this_insn_is_asm
);
3680 error_for_asm (this_insn
,
3681 "%<&%> constraint used with no register class");
3684 for (j
= 0; j
< noperands
; j
++)
3685 /* Is this an input operand or a memory ref? */
3686 if ((MEM_P (recog_data
.operand
[j
])
3687 || modified
[j
] != RELOAD_WRITE
)
3689 /* Ignore things like match_operator operands. */
3690 && !recog_data
.is_operator
[j
]
3691 /* Don't count an input operand that is constrained to match
3692 the early clobber operand. */
3693 && ! (this_alternative_matches
[j
] == i
3694 && rtx_equal_p (recog_data
.operand
[i
],
3695 recog_data
.operand
[j
]))
3696 /* Is it altered by storing the earlyclobber operand? */
3697 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3700 /* If the output is in a non-empty few-regs class,
3701 it's costly to reload it, so reload the input instead. */
3702 if (small_register_class_p (this_alternative
[i
])
3703 && (REG_P (recog_data
.operand
[j
])
3704 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3707 this_alternative_win
[j
] = 0;
3708 this_alternative_match_win
[j
] = 0;
3713 /* If an earlyclobber operand conflicts with something,
3714 it must be reloaded, so request this and count the cost. */
3718 this_alternative_win
[i
] = 0;
3719 this_alternative_match_win
[j
] = 0;
3720 for (j
= 0; j
< noperands
; j
++)
3721 if (this_alternative_matches
[j
] == i
3722 && this_alternative_match_win
[j
])
3724 this_alternative_win
[j
] = 0;
3725 this_alternative_match_win
[j
] = 0;
3731 /* If one alternative accepts all the operands, no reload required,
3732 choose that alternative; don't consider the remaining ones. */
3735 /* Unswap these so that they are never swapped at `finish'. */
3738 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3739 recog_data
.operand
[commutative
+ 1]
3740 = substed_operand
[commutative
+ 1];
3742 for (i
= 0; i
< noperands
; i
++)
3744 goal_alternative_win
[i
] = this_alternative_win
[i
];
3745 goal_alternative_match_win
[i
] = this_alternative_match_win
[i
];
3746 goal_alternative
[i
] = this_alternative
[i
];
3747 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3748 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3749 goal_alternative_earlyclobber
[i
]
3750 = this_alternative_earlyclobber
[i
];
3752 goal_alternative_number
= this_alternative_number
;
3753 goal_alternative_swapped
= swapped
;
3754 goal_earlyclobber
= this_earlyclobber
;
3758 /* REJECT, set by the ! and ? constraint characters and when a register
3759 would be reloaded into a non-preferred class, discourages the use of
3760 this alternative for a reload goal. REJECT is incremented by six
3761 for each ? and two for each non-preferred class. */
3762 losers
= losers
* 6 + reject
;
3764 /* If this alternative can be made to work by reloading,
3765 and it needs less reloading than the others checked so far,
3766 record it as the chosen goal for reloading. */
3771 for (i
= 0; i
< noperands
; i
++)
3773 goal_alternative
[i
] = this_alternative
[i
];
3774 goal_alternative_win
[i
] = this_alternative_win
[i
];
3775 goal_alternative_match_win
[i
]
3776 = this_alternative_match_win
[i
];
3777 goal_alternative_offmemok
[i
]
3778 = this_alternative_offmemok
[i
];
3779 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3780 goal_alternative_earlyclobber
[i
]
3781 = this_alternative_earlyclobber
[i
];
3783 goal_alternative_swapped
= swapped
;
3785 goal_alternative_number
= this_alternative_number
;
3786 goal_earlyclobber
= this_earlyclobber
;
3792 /* If the commutative operands have been swapped, swap
3793 them back in order to check the next alternative. */
3794 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3795 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
+ 1];
3796 /* Unswap the duplicates too. */
3797 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3798 if (recog_data
.dup_num
[i
] == commutative
3799 || recog_data
.dup_num
[i
] == commutative
+ 1)
3800 *recog_data
.dup_loc
[i
]
3801 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3803 /* Unswap the operand related information as well. */
3804 std::swap (preferred_class
[commutative
],
3805 preferred_class
[commutative
+ 1]);
3806 std::swap (pref_or_nothing
[commutative
],
3807 pref_or_nothing
[commutative
+ 1]);
3808 std::swap (address_reloaded
[commutative
],
3809 address_reloaded
[commutative
+ 1]);
3814 /* The operands don't meet the constraints.
3815 goal_alternative describes the alternative
3816 that we could reach by reloading the fewest operands.
3817 Reload so as to fit it. */
3819 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3821 /* No alternative works with reloads?? */
3822 if (insn_code_number
>= 0)
3823 fatal_insn ("unable to generate reloads for:", insn
);
3824 error_for_asm (insn
, "inconsistent operand constraints in an %<asm%>");
3825 /* Avoid further trouble with this insn. */
3826 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3831 /* Jump to `finish' from above if all operands are valid already.
3832 In that case, goal_alternative_win is all 1. */
3835 /* Right now, for any pair of operands I and J that are required to match,
3837 goal_alternative_matches[J] is I.
3838 Set up goal_alternative_matched as the inverse function:
3839 goal_alternative_matched[I] = J. */
3841 for (i
= 0; i
< noperands
; i
++)
3842 goal_alternative_matched
[i
] = -1;
3844 for (i
= 0; i
< noperands
; i
++)
3845 if (! goal_alternative_win
[i
]
3846 && goal_alternative_matches
[i
] >= 0)
3847 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3849 for (i
= 0; i
< noperands
; i
++)
3850 goal_alternative_win
[i
] |= goal_alternative_match_win
[i
];
3852 /* If the best alternative is with operands 1 and 2 swapped,
3853 consider them swapped before reporting the reloads. Update the
3854 operand numbers of any reloads already pushed. */
3856 if (goal_alternative_swapped
)
3858 std::swap (substed_operand
[commutative
],
3859 substed_operand
[commutative
+ 1]);
3860 std::swap (recog_data
.operand
[commutative
],
3861 recog_data
.operand
[commutative
+ 1]);
3862 std::swap (*recog_data
.operand_loc
[commutative
],
3863 *recog_data
.operand_loc
[commutative
+ 1]);
3865 for (i
= 0; i
< recog_data
.n_dups
; i
++)
3866 if (recog_data
.dup_num
[i
] == commutative
3867 || recog_data
.dup_num
[i
] == commutative
+ 1)
3868 *recog_data
.dup_loc
[i
]
3869 = recog_data
.operand
[(int) recog_data
.dup_num
[i
]];
3871 for (i
= 0; i
< n_reloads
; i
++)
3873 if (rld
[i
].opnum
== commutative
)
3874 rld
[i
].opnum
= commutative
+ 1;
3875 else if (rld
[i
].opnum
== commutative
+ 1)
3876 rld
[i
].opnum
= commutative
;
3880 for (i
= 0; i
< noperands
; i
++)
3882 operand_reloadnum
[i
] = -1;
3884 /* If this is an earlyclobber operand, we need to widen the scope.
3885 The reload must remain valid from the start of the insn being
3886 reloaded until after the operand is stored into its destination.
3887 We approximate this with RELOAD_OTHER even though we know that we
3888 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3890 One special case that is worth checking is when we have an
3891 output that is earlyclobber but isn't used past the insn (typically
3892 a SCRATCH). In this case, we only need have the reload live
3893 through the insn itself, but not for any of our input or output
3895 But we must not accidentally narrow the scope of an existing
3896 RELOAD_OTHER reload - leave these alone.
3898 In any case, anything needed to address this operand can remain
3899 however they were previously categorized. */
3901 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3903 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3904 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3907 /* Any constants that aren't allowed and can't be reloaded
3908 into registers are here changed into memory references. */
3909 for (i
= 0; i
< noperands
; i
++)
3910 if (! goal_alternative_win
[i
])
3912 rtx op
= recog_data
.operand
[i
];
3913 rtx subreg
= NULL_RTX
;
3914 rtx plus
= NULL_RTX
;
3915 machine_mode mode
= operand_mode
[i
];
3917 /* Reloads of SUBREGs of CONSTANT RTXs are handled later in
3918 push_reload so we have to let them pass here. */
3919 if (GET_CODE (op
) == SUBREG
)
3922 op
= SUBREG_REG (op
);
3923 mode
= GET_MODE (op
);
3926 if (GET_CODE (op
) == PLUS
)
3932 if (CONST_POOL_OK_P (mode
, op
)
3933 && ((targetm
.preferred_reload_class (op
, goal_alternative
[i
])
3935 || no_input_reloads
))
3937 int this_address_reloaded
;
3938 rtx tem
= force_const_mem (mode
, op
);
3940 /* If we stripped a SUBREG or a PLUS above add it back. */
3941 if (plus
!= NULL_RTX
)
3942 tem
= gen_rtx_PLUS (mode
, XEXP (plus
, 0), tem
);
3944 if (subreg
!= NULL_RTX
)
3945 tem
= gen_rtx_SUBREG (operand_mode
[i
], tem
, SUBREG_BYTE (subreg
));
3947 this_address_reloaded
= 0;
3948 substed_operand
[i
] = recog_data
.operand
[i
]
3949 = find_reloads_toplev (tem
, i
, address_type
[i
], ind_levels
,
3950 0, insn
, &this_address_reloaded
);
3952 /* If the alternative accepts constant pool refs directly
3953 there will be no reload needed at all. */
3954 if (plus
== NULL_RTX
3955 && subreg
== NULL_RTX
3956 && alternative_allows_const_pool_ref (this_address_reloaded
!= 1
3957 ? substed_operand
[i
]
3959 recog_data
.constraints
[i
],
3960 goal_alternative_number
))
3961 goal_alternative_win
[i
] = 1;
3965 /* Record the values of the earlyclobber operands for the caller. */
3966 if (goal_earlyclobber
)
3967 for (i
= 0; i
< noperands
; i
++)
3968 if (goal_alternative_earlyclobber
[i
])
3969 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3971 /* Now record reloads for all the operands that need them. */
3972 for (i
= 0; i
< noperands
; i
++)
3973 if (! goal_alternative_win
[i
])
3975 /* Operands that match previous ones have already been handled. */
3976 if (goal_alternative_matches
[i
] >= 0)
3978 /* Handle an operand with a nonoffsettable address
3979 appearing where an offsettable address will do
3980 by reloading the address into a base register.
3982 ??? We can also do this when the operand is a register and
3983 reg_equiv_mem is not offsettable, but this is a bit tricky,
3984 so we don't bother with it. It may not be worth doing. */
3985 else if (goal_alternative_matched
[i
] == -1
3986 && goal_alternative_offmemok
[i
]
3987 && MEM_P (recog_data
.operand
[i
]))
3989 /* If the address to be reloaded is a VOIDmode constant,
3990 use the default address mode as mode of the reload register,
3991 as would have been done by find_reloads_address. */
3992 addr_space_t as
= MEM_ADDR_SPACE (recog_data
.operand
[i
]);
3993 machine_mode address_mode
;
3995 address_mode
= get_address_mode (recog_data
.operand
[i
]);
3996 operand_reloadnum
[i
]
3997 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3998 &XEXP (recog_data
.operand
[i
], 0), (rtx
*) 0,
3999 base_reg_class (VOIDmode
, as
, MEM
, SCRATCH
),
4001 VOIDmode
, 0, 0, i
, RELOAD_OTHER
);
4002 rld
[operand_reloadnum
[i
]].inc
4003 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
4005 /* If this operand is an output, we will have made any
4006 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
4007 now we are treating part of the operand as an input, so
4008 we must change these to RELOAD_FOR_OTHER_ADDRESS. */
4010 if (modified
[i
] == RELOAD_WRITE
)
4012 for (j
= 0; j
< n_reloads
; j
++)
4014 if (rld
[j
].opnum
== i
)
4016 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
4017 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4018 else if (rld
[j
].when_needed
4019 == RELOAD_FOR_OUTADDR_ADDRESS
)
4020 rld
[j
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4025 else if (goal_alternative_matched
[i
] == -1)
4027 operand_reloadnum
[i
]
4028 = push_reload ((modified
[i
] != RELOAD_WRITE
4029 ? recog_data
.operand
[i
] : 0),
4030 (modified
[i
] != RELOAD_READ
4031 ? recog_data
.operand
[i
] : 0),
4032 (modified
[i
] != RELOAD_WRITE
4033 ? recog_data
.operand_loc
[i
] : 0),
4034 (modified
[i
] != RELOAD_READ
4035 ? recog_data
.operand_loc
[i
] : 0),
4036 (enum reg_class
) goal_alternative
[i
],
4037 (modified
[i
] == RELOAD_WRITE
4038 ? VOIDmode
: operand_mode
[i
]),
4039 (modified
[i
] == RELOAD_READ
4040 ? VOIDmode
: operand_mode
[i
]),
4041 (insn_code_number
< 0 ? 0
4042 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4043 0, i
, operand_type
[i
]);
4045 /* In a matching pair of operands, one must be input only
4046 and the other must be output only.
4047 Pass the input operand as IN and the other as OUT. */
4048 else if (modified
[i
] == RELOAD_READ
4049 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
4051 operand_reloadnum
[i
]
4052 = push_reload (recog_data
.operand
[i
],
4053 recog_data
.operand
[goal_alternative_matched
[i
]],
4054 recog_data
.operand_loc
[i
],
4055 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4056 (enum reg_class
) goal_alternative
[i
],
4058 operand_mode
[goal_alternative_matched
[i
]],
4059 0, 0, i
, RELOAD_OTHER
);
4060 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
4062 else if (modified
[i
] == RELOAD_WRITE
4063 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
4065 operand_reloadnum
[goal_alternative_matched
[i
]]
4066 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
4067 recog_data
.operand
[i
],
4068 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
4069 recog_data
.operand_loc
[i
],
4070 (enum reg_class
) goal_alternative
[i
],
4071 operand_mode
[goal_alternative_matched
[i
]],
4073 0, 0, i
, RELOAD_OTHER
);
4074 operand_reloadnum
[i
] = output_reloadnum
;
4078 gcc_assert (insn_code_number
< 0);
4079 error_for_asm (insn
, "inconsistent operand constraints "
4081 /* Avoid further trouble with this insn. */
4082 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
4087 else if (goal_alternative_matched
[i
] < 0
4088 && goal_alternative_matches
[i
] < 0
4089 && address_operand_reloaded
[i
] != 1
4092 /* For each non-matching operand that's a MEM or a pseudo-register
4093 that didn't get a hard register, make an optional reload.
4094 This may get done even if the insn needs no reloads otherwise. */
4096 rtx operand
= recog_data
.operand
[i
];
4098 while (GET_CODE (operand
) == SUBREG
)
4099 operand
= SUBREG_REG (operand
);
4100 if ((MEM_P (operand
)
4102 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4103 /* If this is only for an output, the optional reload would not
4104 actually cause us to use a register now, just note that
4105 something is stored here. */
4106 && (goal_alternative
[i
] != NO_REGS
4107 || modified
[i
] == RELOAD_WRITE
)
4108 && ! no_input_reloads
4109 /* An optional output reload might allow to delete INSN later.
4110 We mustn't make in-out reloads on insns that are not permitted
4112 If this is an asm, we can't delete it; we must not even call
4113 push_reload for an optional output reload in this case,
4114 because we can't be sure that the constraint allows a register,
4115 and push_reload verifies the constraints for asms. */
4116 && (modified
[i
] == RELOAD_READ
4117 || (! no_output_reloads
&& ! this_insn_is_asm
)))
4118 operand_reloadnum
[i
]
4119 = push_reload ((modified
[i
] != RELOAD_WRITE
4120 ? recog_data
.operand
[i
] : 0),
4121 (modified
[i
] != RELOAD_READ
4122 ? recog_data
.operand
[i
] : 0),
4123 (modified
[i
] != RELOAD_WRITE
4124 ? recog_data
.operand_loc
[i
] : 0),
4125 (modified
[i
] != RELOAD_READ
4126 ? recog_data
.operand_loc
[i
] : 0),
4127 (enum reg_class
) goal_alternative
[i
],
4128 (modified
[i
] == RELOAD_WRITE
4129 ? VOIDmode
: operand_mode
[i
]),
4130 (modified
[i
] == RELOAD_READ
4131 ? VOIDmode
: operand_mode
[i
]),
4132 (insn_code_number
< 0 ? 0
4133 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
4134 1, i
, operand_type
[i
]);
4135 /* If a memory reference remains (either as a MEM or a pseudo that
4136 did not get a hard register), yet we can't make an optional
4137 reload, check if this is actually a pseudo register reference;
4138 we then need to emit a USE and/or a CLOBBER so that reload
4139 inheritance will do the right thing. */
4143 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
4144 && reg_renumber
[REGNO (operand
)] < 0)))
4146 operand
= *recog_data
.operand_loc
[i
];
4148 while (GET_CODE (operand
) == SUBREG
)
4149 operand
= SUBREG_REG (operand
);
4150 if (REG_P (operand
))
4152 if (modified
[i
] != RELOAD_WRITE
)
4153 /* We mark the USE with QImode so that we recognize
4154 it as one that can be safely deleted at the end
4156 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, operand
),
4158 if (modified
[i
] != RELOAD_READ
)
4159 emit_insn_after (gen_clobber (operand
), insn
);
4163 else if (goal_alternative_matches
[i
] >= 0
4164 && goal_alternative_win
[goal_alternative_matches
[i
]]
4165 && modified
[i
] == RELOAD_READ
4166 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
4167 && ! no_input_reloads
&& ! no_output_reloads
4170 /* Similarly, make an optional reload for a pair of matching
4171 objects that are in MEM or a pseudo that didn't get a hard reg. */
4173 rtx operand
= recog_data
.operand
[i
];
4175 while (GET_CODE (operand
) == SUBREG
)
4176 operand
= SUBREG_REG (operand
);
4177 if ((MEM_P (operand
)
4179 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
4180 && (goal_alternative
[goal_alternative_matches
[i
]] != NO_REGS
))
4181 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
4182 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
4183 recog_data
.operand
[i
],
4184 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
4185 recog_data
.operand_loc
[i
],
4186 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
4187 operand_mode
[goal_alternative_matches
[i
]],
4189 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
4192 /* Perform whatever substitutions on the operands we are supposed
4193 to make due to commutativity or replacement of registers
4194 with equivalent constants or memory slots. */
4196 for (i
= 0; i
< noperands
; i
++)
4198 /* We only do this on the last pass through reload, because it is
4199 possible for some data (like reg_equiv_address) to be changed during
4200 later passes. Moreover, we lose the opportunity to get a useful
4201 reload_{in,out}_reg when we do these replacements. */
4205 rtx substitution
= substed_operand
[i
];
4207 *recog_data
.operand_loc
[i
] = substitution
;
4209 /* If we're replacing an operand with a LABEL_REF, we need to
4210 make sure that there's a REG_LABEL_OPERAND note attached to
4211 this instruction. */
4212 if (GET_CODE (substitution
) == LABEL_REF
4213 && !find_reg_note (insn
, REG_LABEL_OPERAND
,
4214 label_ref_label (substitution
))
4215 /* For a JUMP_P, if it was a branch target it must have
4216 already been recorded as such. */
4218 || !label_is_jump_target_p (label_ref_label (substitution
),
4221 add_reg_note (insn
, REG_LABEL_OPERAND
,
4222 label_ref_label (substitution
));
4223 if (LABEL_P (label_ref_label (substitution
)))
4224 ++LABEL_NUSES (label_ref_label (substitution
));
4229 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
4232 /* If this insn pattern contains any MATCH_DUP's, make sure that
4233 they will be substituted if the operands they match are substituted.
4234 Also do now any substitutions we already did on the operands.
4236 Don't do this if we aren't making replacements because we might be
4237 propagating things allocated by frame pointer elimination into places
4238 it doesn't expect. */
4240 if (insn_code_number
>= 0 && replace
)
4241 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
4243 int opno
= recog_data
.dup_num
[i
];
4244 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
4245 dup_replacements (recog_data
.dup_loc
[i
], recog_data
.operand_loc
[opno
]);
4249 /* This loses because reloading of prior insns can invalidate the equivalence
4250 (or at least find_equiv_reg isn't smart enough to find it any more),
4251 causing this insn to need more reload regs than it needed before.
4252 It may be too late to make the reload regs available.
4253 Now this optimization is done safely in choose_reload_regs. */
4255 /* For each reload of a reg into some other class of reg,
4256 search for an existing equivalent reg (same value now) in the right class.
4257 We can use it as long as we don't need to change its contents. */
4258 for (i
= 0; i
< n_reloads
; i
++)
4259 if (rld
[i
].reg_rtx
== 0
4261 && REG_P (rld
[i
].in
)
4265 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].rclass
, -1,
4266 static_reload_reg_p
, 0, rld
[i
].inmode
);
4267 /* Prevent generation of insn to load the value
4268 because the one we found already has the value. */
4270 rld
[i
].in
= rld
[i
].reg_rtx
;
4274 /* If we detected error and replaced asm instruction by USE, forget about the
4276 if (GET_CODE (PATTERN (insn
)) == USE
4277 && CONST_INT_P (XEXP (PATTERN (insn
), 0)))
4280 /* Perhaps an output reload can be combined with another
4281 to reduce needs by one. */
4282 if (!goal_earlyclobber
)
4285 /* If we have a pair of reloads for parts of an address, they are reloading
4286 the same object, the operands themselves were not reloaded, and they
4287 are for two operands that are supposed to match, merge the reloads and
4288 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
4290 for (i
= 0; i
< n_reloads
; i
++)
4294 for (j
= i
+ 1; j
< n_reloads
; j
++)
4295 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4296 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4297 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4298 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4299 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4300 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4301 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4302 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4303 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
4304 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4305 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
4306 && (operand_reloadnum
[rld
[j
].opnum
] < 0
4307 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
4308 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
4309 || (goal_alternative_matches
[rld
[j
].opnum
]
4312 for (k
= 0; k
< n_replacements
; k
++)
4313 if (replacements
[k
].what
== j
)
4314 replacements
[k
].what
= i
;
4316 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4317 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4318 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4320 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4325 /* Scan all the reloads and update their type.
4326 If a reload is for the address of an operand and we didn't reload
4327 that operand, change the type. Similarly, change the operand number
4328 of a reload when two operands match. If a reload is optional, treat it
4329 as though the operand isn't reloaded.
4331 ??? This latter case is somewhat odd because if we do the optional
4332 reload, it means the object is hanging around. Thus we need only
4333 do the address reload if the optional reload was NOT done.
4335 Change secondary reloads to be the address type of their operand, not
4338 If an operand's reload is now RELOAD_OTHER, change any
4339 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
4340 RELOAD_FOR_OTHER_ADDRESS. */
4342 for (i
= 0; i
< n_reloads
; i
++)
4344 if (rld
[i
].secondary_p
4345 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
])
4346 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
4348 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4349 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4350 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4351 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4352 && (operand_reloadnum
[rld
[i
].opnum
] < 0
4353 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
4355 /* If we have a secondary reload to go along with this reload,
4356 change its type to RELOAD_FOR_OPADDR_ADDR. */
4358 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4359 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4360 && rld
[i
].secondary_in_reload
!= -1)
4362 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
4364 rld
[secondary_in_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4366 /* If there's a tertiary reload we have to change it also. */
4367 if (secondary_in_reload
> 0
4368 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
4369 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
4370 = RELOAD_FOR_OPADDR_ADDR
;
4373 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
4374 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4375 && rld
[i
].secondary_out_reload
!= -1)
4377 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
4379 rld
[secondary_out_reload
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4381 /* If there's a tertiary reload we have to change it also. */
4382 if (secondary_out_reload
4383 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
4384 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
4385 = RELOAD_FOR_OPADDR_ADDR
;
4388 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
4389 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
4390 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
4392 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
4395 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
4396 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
4397 && operand_reloadnum
[rld
[i
].opnum
] >= 0
4398 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
4400 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
4402 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
4403 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
4406 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
4407 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
4408 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
4410 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
4411 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
4412 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
4413 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
4414 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4415 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4416 This is complicated by the fact that a single operand can have more
4417 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4418 choose_reload_regs without affecting code quality, and cases that
4419 actually fail are extremely rare, so it turns out to be better to fix
4420 the problem here by not generating cases that choose_reload_regs will
4422 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4423 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4425 We can reduce the register pressure by exploiting that a
4426 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4427 does not conflict with any of them, if it is only used for the first of
4428 the RELOAD_FOR_X_ADDRESS reloads. */
4430 int first_op_addr_num
= -2;
4431 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4432 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4433 int need_change
= 0;
4434 /* We use last_op_addr_reload and the contents of the above arrays
4435 first as flags - -2 means no instance encountered, -1 means exactly
4436 one instance encountered.
4437 If more than one instance has been encountered, we store the reload
4438 number of the first reload of the kind in question; reload numbers
4439 are known to be non-negative. */
4440 for (i
= 0; i
< noperands
; i
++)
4441 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4442 for (i
= n_reloads
- 1; i
>= 0; i
--)
4444 switch (rld
[i
].when_needed
)
4446 case RELOAD_FOR_OPERAND_ADDRESS
:
4447 if (++first_op_addr_num
>= 0)
4449 first_op_addr_num
= i
;
4453 case RELOAD_FOR_INPUT_ADDRESS
:
4454 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4456 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4460 case RELOAD_FOR_OUTPUT_ADDRESS
:
4461 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4463 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4474 for (i
= 0; i
< n_reloads
; i
++)
4477 enum reload_type type
;
4479 switch (rld
[i
].when_needed
)
4481 case RELOAD_FOR_OPADDR_ADDR
:
4482 first_num
= first_op_addr_num
;
4483 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4485 case RELOAD_FOR_INPADDR_ADDRESS
:
4486 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4487 type
= RELOAD_FOR_INPUT_ADDRESS
;
4489 case RELOAD_FOR_OUTADDR_ADDRESS
:
4490 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4491 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4498 else if (i
> first_num
)
4499 rld
[i
].when_needed
= type
;
4502 /* Check if the only TYPE reload that uses reload I is
4503 reload FIRST_NUM. */
4504 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4506 if (rld
[j
].when_needed
== type
4507 && (rld
[i
].secondary_p
4508 ? rld
[j
].secondary_in_reload
== i
4509 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4511 rld
[i
].when_needed
= type
;
4520 /* See if we have any reloads that are now allowed to be merged
4521 because we've changed when the reload is needed to
4522 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4523 check for the most common cases. */
4525 for (i
= 0; i
< n_reloads
; i
++)
4526 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4527 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4528 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4529 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4530 for (j
= 0; j
< n_reloads
; j
++)
4531 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4532 && rld
[j
].when_needed
== rld
[i
].when_needed
4533 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4534 && rld
[i
].rclass
== rld
[j
].rclass
4535 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4536 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4538 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4539 transfer_replacements (i
, j
);
4543 /* If we made any reloads for addresses, see if they violate a
4544 "no input reloads" requirement for this insn. But loads that we
4545 do after the insn (such as for output addresses) are fine. */
4546 if (HAVE_cc0
&& no_input_reloads
)
4547 for (i
= 0; i
< n_reloads
; i
++)
4548 gcc_assert (rld
[i
].in
== 0
4549 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
4550 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
);
4552 /* Compute reload_mode and reload_nregs. */
4553 for (i
= 0; i
< n_reloads
; i
++)
4555 rld
[i
].mode
= rld
[i
].inmode
;
4556 if (rld
[i
].mode
== VOIDmode
4557 || partial_subreg_p (rld
[i
].mode
, rld
[i
].outmode
))
4558 rld
[i
].mode
= rld
[i
].outmode
;
4560 rld
[i
].nregs
= ira_reg_class_max_nregs
[rld
[i
].rclass
][rld
[i
].mode
];
4563 /* Special case a simple move with an input reload and a
4564 destination of a hard reg, if the hard reg is ok, use it. */
4565 for (i
= 0; i
< n_reloads
; i
++)
4566 if (rld
[i
].when_needed
== RELOAD_FOR_INPUT
4567 && GET_CODE (PATTERN (insn
)) == SET
4568 && REG_P (SET_DEST (PATTERN (insn
)))
4569 && (SET_SRC (PATTERN (insn
)) == rld
[i
].in
4570 || SET_SRC (PATTERN (insn
)) == rld
[i
].in_reg
)
4571 && !elimination_target_reg_p (SET_DEST (PATTERN (insn
))))
4573 rtx dest
= SET_DEST (PATTERN (insn
));
4574 unsigned int regno
= REGNO (dest
);
4576 if (regno
< FIRST_PSEUDO_REGISTER
4577 && TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
)
4578 && targetm
.hard_regno_mode_ok (regno
, rld
[i
].mode
))
4580 int nr
= hard_regno_nregs
[regno
][rld
[i
].mode
];
4583 for (nri
= 1; nri
< nr
; nri
++)
4584 if (! TEST_HARD_REG_BIT (reg_class_contents
[rld
[i
].rclass
], regno
+ nri
))
4591 rld
[i
].reg_rtx
= dest
;
4598 /* Return true if alternative number ALTNUM in constraint-string
4599 CONSTRAINT is guaranteed to accept a reloaded constant-pool reference.
4600 MEM gives the reference if its address hasn't been fully reloaded,
4601 otherwise it is NULL. */
4604 alternative_allows_const_pool_ref (rtx mem ATTRIBUTE_UNUSED
,
4605 const char *constraint
, int altnum
)
4609 /* Skip alternatives before the one requested. */
4612 while (*constraint
++ != ',')
4616 /* Scan the requested alternative for TARGET_MEM_CONSTRAINT or 'o'.
4617 If one of them is present, this alternative accepts the result of
4618 passing a constant-pool reference through find_reloads_toplev.
4620 The same is true of extra memory constraints if the address
4621 was reloaded into a register. However, the target may elect
4622 to disallow the original constant address, forcing it to be
4623 reloaded into a register instead. */
4624 for (; (c
= *constraint
) && c
!= ',' && c
!= '#';
4625 constraint
+= CONSTRAINT_LEN (c
, constraint
))
4627 enum constraint_num cn
= lookup_constraint (constraint
);
4628 if (insn_extra_memory_constraint (cn
)
4629 && (mem
== NULL
|| constraint_satisfied_p (mem
, cn
)))
4635 /* Scan X for memory references and scan the addresses for reloading.
4636 Also checks for references to "constant" regs that we want to eliminate
4637 and replaces them with the values they stand for.
4638 We may alter X destructively if it contains a reference to such.
4639 If X is just a constant reg, we return the equivalent value
4642 IND_LEVELS says how many levels of indirect addressing this machine
4645 OPNUM and TYPE identify the purpose of the reload.
4647 IS_SET_DEST is true if X is the destination of a SET, which is not
4648 appropriate to be replaced by a constant.
4650 INSN, if nonzero, is the insn in which we do the reload. It is used
4651 to determine if we may generate output reloads, and where to put USEs
4652 for pseudos that we have to replace with stack slots.
4654 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4655 result of find_reloads_address. */
4658 find_reloads_toplev (rtx x
, int opnum
, enum reload_type type
,
4659 int ind_levels
, int is_set_dest
, rtx_insn
*insn
,
4660 int *address_reloaded
)
4662 RTX_CODE code
= GET_CODE (x
);
4664 const char *fmt
= GET_RTX_FORMAT (code
);
4670 /* This code is duplicated for speed in find_reloads. */
4671 int regno
= REGNO (x
);
4672 if (reg_equiv_constant (regno
) != 0 && !is_set_dest
)
4673 x
= reg_equiv_constant (regno
);
4675 /* This creates (subreg (mem...)) which would cause an unnecessary
4676 reload of the mem. */
4677 else if (reg_equiv_mem (regno
) != 0)
4678 x
= reg_equiv_mem (regno
);
4680 else if (reg_equiv_memory_loc (regno
)
4681 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
4683 rtx mem
= make_memloc (x
, regno
);
4684 if (reg_equiv_address (regno
)
4685 || ! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
4687 /* If this is not a toplevel operand, find_reloads doesn't see
4688 this substitution. We have to emit a USE of the pseudo so
4689 that delete_output_reload can see it. */
4690 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4691 /* We mark the USE with QImode so that we recognize it
4692 as one that can be safely deleted at the end of
4694 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
),
4697 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4698 opnum
, type
, ind_levels
, insn
);
4699 if (!rtx_equal_p (x
, mem
))
4700 push_reg_equiv_alt_mem (regno
, x
);
4701 if (address_reloaded
)
4702 *address_reloaded
= i
;
4711 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4712 opnum
, type
, ind_levels
, insn
);
4713 if (address_reloaded
)
4714 *address_reloaded
= i
;
4719 if (code
== SUBREG
&& REG_P (SUBREG_REG (x
)))
4721 /* Check for SUBREG containing a REG that's equivalent to a
4722 constant. If the constant has a known value, truncate it
4723 right now. Similarly if we are extracting a single-word of a
4724 multi-word constant. If the constant is symbolic, allow it
4725 to be substituted normally. push_reload will strip the
4726 subreg later. The constant must not be VOIDmode, because we
4727 will lose the mode of the register (this should never happen
4728 because one of the cases above should handle it). */
4730 int regno
= REGNO (SUBREG_REG (x
));
4733 if (regno
>= FIRST_PSEUDO_REGISTER
4734 && reg_renumber
[regno
] < 0
4735 && reg_equiv_constant (regno
) != 0)
4738 simplify_gen_subreg (GET_MODE (x
), reg_equiv_constant (regno
),
4739 GET_MODE (SUBREG_REG (x
)), SUBREG_BYTE (x
));
4741 if (CONSTANT_P (tem
)
4742 && !targetm
.legitimate_constant_p (GET_MODE (x
), tem
))
4744 tem
= force_const_mem (GET_MODE (x
), tem
);
4745 i
= find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4746 &XEXP (tem
, 0), opnum
, type
,
4748 if (address_reloaded
)
4749 *address_reloaded
= i
;
4754 /* If the subreg contains a reg that will be converted to a mem,
4755 attempt to convert the whole subreg to a (narrower or wider)
4756 memory reference instead. If this succeeds, we're done --
4757 otherwise fall through to check whether the inner reg still
4758 needs address reloads anyway. */
4760 if (regno
>= FIRST_PSEUDO_REGISTER
4761 && reg_equiv_memory_loc (regno
) != 0)
4763 tem
= find_reloads_subreg_address (x
, opnum
, type
, ind_levels
,
4764 insn
, address_reloaded
);
4770 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4774 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4775 ind_levels
, is_set_dest
, insn
,
4777 /* If we have replaced a reg with it's equivalent memory loc -
4778 that can still be handled here e.g. if it's in a paradoxical
4779 subreg - we must make the change in a copy, rather than using
4780 a destructive change. This way, find_reloads can still elect
4781 not to do the change. */
4782 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4784 x
= shallow_copy_rtx (x
);
4787 XEXP (x
, i
) = new_part
;
4793 /* Return a mem ref for the memory equivalent of reg REGNO.
4794 This mem ref is not shared with anything. */
4797 make_memloc (rtx ad
, int regno
)
4799 /* We must rerun eliminate_regs, in case the elimination
4800 offsets have changed. */
4802 = XEXP (eliminate_regs (reg_equiv_memory_loc (regno
), VOIDmode
, NULL_RTX
),
4805 /* If TEM might contain a pseudo, we must copy it to avoid
4806 modifying it when we do the substitution for the reload. */
4807 if (rtx_varies_p (tem
, 0))
4808 tem
= copy_rtx (tem
);
4810 tem
= replace_equiv_address_nv (reg_equiv_memory_loc (regno
), tem
);
4811 tem
= adjust_address_nv (tem
, GET_MODE (ad
), 0);
4813 /* Copy the result if it's still the same as the equivalence, to avoid
4814 modifying it when we do the substitution for the reload. */
4815 if (tem
== reg_equiv_memory_loc (regno
))
4816 tem
= copy_rtx (tem
);
4820 /* Returns true if AD could be turned into a valid memory reference
4821 to mode MODE in address space AS by reloading the part pointed to
4822 by PART into a register. */
4825 maybe_memory_address_addr_space_p (machine_mode mode
, rtx ad
,
4826 addr_space_t as
, rtx
*part
)
4830 rtx reg
= gen_rtx_REG (GET_MODE (tem
), max_reg_num ());
4833 retv
= memory_address_addr_space_p (mode
, ad
, as
);
4839 /* Record all reloads needed for handling memory address AD
4840 which appears in *LOC in a memory reference to mode MODE
4841 which itself is found in location *MEMREFLOC.
4842 Note that we take shortcuts assuming that no multi-reg machine mode
4843 occurs as part of an address.
4845 OPNUM and TYPE specify the purpose of this reload.
4847 IND_LEVELS says how many levels of indirect addressing this machine
4850 INSN, if nonzero, is the insn in which we do the reload. It is used
4851 to determine if we may generate output reloads, and where to put USEs
4852 for pseudos that we have to replace with stack slots.
4854 Value is one if this address is reloaded or replaced as a whole; it is
4855 zero if the top level of this address was not reloaded or replaced, and
4856 it is -1 if it may or may not have been reloaded or replaced.
4858 Note that there is no verification that the address will be valid after
4859 this routine does its work. Instead, we rely on the fact that the address
4860 was valid when reload started. So we need only undo things that reload
4861 could have broken. These are wrong register types, pseudos not allocated
4862 to a hard register, and frame pointer elimination. */
4865 find_reloads_address (machine_mode mode
, rtx
*memrefloc
, rtx ad
,
4866 rtx
*loc
, int opnum
, enum reload_type type
,
4867 int ind_levels
, rtx_insn
*insn
)
4869 addr_space_t as
= memrefloc
? MEM_ADDR_SPACE (*memrefloc
)
4870 : ADDR_SPACE_GENERIC
;
4872 int removed_and
= 0;
4876 /* If the address is a register, see if it is a legitimate address and
4877 reload if not. We first handle the cases where we need not reload
4878 or where we must reload in a non-standard way. */
4884 if (reg_equiv_constant (regno
) != 0)
4886 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
4887 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4888 GET_MODE (ad
), opnum
, type
, ind_levels
);
4892 tem
= reg_equiv_memory_loc (regno
);
4895 if (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
)
4897 tem
= make_memloc (ad
, regno
);
4898 if (! strict_memory_address_addr_space_p (GET_MODE (tem
),
4900 MEM_ADDR_SPACE (tem
)))
4904 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
4905 &XEXP (tem
, 0), opnum
,
4906 ADDR_TYPE (type
), ind_levels
, insn
);
4907 if (!rtx_equal_p (tem
, orig
))
4908 push_reg_equiv_alt_mem (regno
, tem
);
4910 /* We can avoid a reload if the register's equivalent memory
4911 expression is valid as an indirect memory address.
4912 But not all addresses are valid in a mem used as an indirect
4913 address: only reg or reg+constant. */
4916 && strict_memory_address_addr_space_p (mode
, tem
, as
)
4917 && (REG_P (XEXP (tem
, 0))
4918 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4919 && REG_P (XEXP (XEXP (tem
, 0), 0))
4920 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4922 /* TEM is not the same as what we'll be replacing the
4923 pseudo with after reload, put a USE in front of INSN
4924 in the final reload pass. */
4926 && num_not_at_initial_offset
4927 && ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
4930 /* We mark the USE with QImode so that we
4931 recognize it as one that can be safely
4932 deleted at the end of reload. */
4933 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
),
4936 /* This doesn't really count as replacing the address
4937 as a whole, since it is still a memory access. */
4945 /* The only remaining case where we can avoid a reload is if this is a
4946 hard register that is valid as a base register and which is not the
4947 subject of a CLOBBER in this insn. */
4949 else if (regno
< FIRST_PSEUDO_REGISTER
4950 && regno_ok_for_base_p (regno
, mode
, as
, MEM
, SCRATCH
)
4951 && ! regno_clobbered_p (regno
, this_insn
, mode
, 0))
4954 /* If we do not have one of the cases above, we must do the reload. */
4955 push_reload (ad
, NULL_RTX
, loc
, (rtx
*) 0,
4956 base_reg_class (mode
, as
, MEM
, SCRATCH
),
4957 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4961 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4963 /* The address appears valid, so reloads are not needed.
4964 But the address may contain an eliminable register.
4965 This can happen because a machine with indirect addressing
4966 may consider a pseudo register by itself a valid address even when
4967 it has failed to get a hard reg.
4968 So do a tree-walk to find and eliminate all such regs. */
4970 /* But first quickly dispose of a common case. */
4971 if (GET_CODE (ad
) == PLUS
4972 && CONST_INT_P (XEXP (ad
, 1))
4973 && REG_P (XEXP (ad
, 0))
4974 && reg_equiv_constant (REGNO (XEXP (ad
, 0))) == 0)
4977 subst_reg_equivs_changed
= 0;
4978 *loc
= subst_reg_equivs (ad
, insn
);
4980 if (! subst_reg_equivs_changed
)
4983 /* Check result for validity after substitution. */
4984 if (strict_memory_address_addr_space_p (mode
, ad
, as
))
4988 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4991 if (memrefloc
&& ADDR_SPACE_GENERIC_P (as
))
4993 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4998 *memrefloc
= copy_rtx (*memrefloc
);
4999 XEXP (*memrefloc
, 0) = ad
;
5000 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
5006 /* The address is not valid. We have to figure out why. First see if
5007 we have an outer AND and remove it if so. Then analyze what's inside. */
5009 if (GET_CODE (ad
) == AND
)
5012 loc
= &XEXP (ad
, 0);
5016 /* One possibility for why the address is invalid is that it is itself
5017 a MEM. This can happen when the frame pointer is being eliminated, a
5018 pseudo is not allocated to a hard register, and the offset between the
5019 frame and stack pointers is not its initial value. In that case the
5020 pseudo will have been replaced by a MEM referring to the
5024 /* First ensure that the address in this MEM is valid. Then, unless
5025 indirect addresses are valid, reload the MEM into a register. */
5027 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
5028 opnum
, ADDR_TYPE (type
),
5029 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
5031 /* If tem was changed, then we must create a new memory reference to
5032 hold it and store it back into memrefloc. */
5033 if (tem
!= ad
&& memrefloc
)
5035 *memrefloc
= copy_rtx (*memrefloc
);
5036 copy_replacements (tem
, XEXP (*memrefloc
, 0));
5037 loc
= &XEXP (*memrefloc
, 0);
5039 loc
= &XEXP (*loc
, 0);
5042 /* Check similar cases as for indirect addresses as above except
5043 that we can allow pseudos and a MEM since they should have been
5044 taken care of above. */
5047 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
5048 || MEM_P (XEXP (tem
, 0))
5049 || ! (REG_P (XEXP (tem
, 0))
5050 || (GET_CODE (XEXP (tem
, 0)) == PLUS
5051 && REG_P (XEXP (XEXP (tem
, 0), 0))
5052 && CONST_INT_P (XEXP (XEXP (tem
, 0), 1)))))
5054 /* Must use TEM here, not AD, since it is the one that will
5055 have any subexpressions reloaded, if needed. */
5056 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0,
5057 base_reg_class (mode
, as
, MEM
, SCRATCH
), GET_MODE (tem
),
5060 return ! removed_and
;
5066 /* If we have address of a stack slot but it's not valid because the
5067 displacement is too large, compute the sum in a register.
5068 Handle all base registers here, not just fp/ap/sp, because on some
5069 targets (namely SH) we can also get too large displacements from
5070 big-endian corrections. */
5071 else if (GET_CODE (ad
) == PLUS
5072 && REG_P (XEXP (ad
, 0))
5073 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
5074 && CONST_INT_P (XEXP (ad
, 1))
5075 && (regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
, PLUS
,
5077 /* Similarly, if we were to reload the base register and the
5078 mem+offset address is still invalid, then we want to reload
5079 the whole address, not just the base register. */
5080 || ! maybe_memory_address_addr_space_p
5081 (mode
, ad
, as
, &(XEXP (ad
, 0)))))
5084 /* Unshare the MEM rtx so we can safely alter it. */
5087 *memrefloc
= copy_rtx (*memrefloc
);
5088 loc
= &XEXP (*memrefloc
, 0);
5090 loc
= &XEXP (*loc
, 0);
5093 if (double_reg_address_ok
[mode
]
5094 && regno_ok_for_base_p (REGNO (XEXP (ad
, 0)), mode
, as
,
5097 /* Unshare the sum as well. */
5098 *loc
= ad
= copy_rtx (ad
);
5100 /* Reload the displacement into an index reg.
5101 We assume the frame pointer or arg pointer is a base reg. */
5102 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
5103 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
5109 /* If the sum of two regs is not necessarily valid,
5110 reload the sum into a base reg.
5111 That will at least work. */
5112 find_reloads_address_part (ad
, loc
,
5113 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5114 GET_MODE (ad
), opnum
, type
, ind_levels
);
5116 return ! removed_and
;
5119 /* If we have an indexed stack slot, there are three possible reasons why
5120 it might be invalid: The index might need to be reloaded, the address
5121 might have been made by frame pointer elimination and hence have a
5122 constant out of range, or both reasons might apply.
5124 We can easily check for an index needing reload, but even if that is the
5125 case, we might also have an invalid constant. To avoid making the
5126 conservative assumption and requiring two reloads, we see if this address
5127 is valid when not interpreted strictly. If it is, the only problem is
5128 that the index needs a reload and find_reloads_address_1 will take care
5131 Handle all base registers here, not just fp/ap/sp, because on some
5132 targets (namely SPARC) we can also get invalid addresses from preventive
5133 subreg big-endian corrections made by find_reloads_toplev. We
5134 can also get expressions involving LO_SUM (rather than PLUS) from
5135 find_reloads_subreg_address.
5137 If we decide to do something, it must be that `double_reg_address_ok'
5138 is true. We generate a reload of the base register + constant and
5139 rework the sum so that the reload register will be added to the index.
5140 This is safe because we know the address isn't shared.
5142 We check for the base register as both the first and second operand of
5143 the innermost PLUS and/or LO_SUM. */
5145 for (op_index
= 0; op_index
< 2; ++op_index
)
5147 rtx operand
, addend
;
5148 enum rtx_code inner_code
;
5150 if (GET_CODE (ad
) != PLUS
)
5153 inner_code
= GET_CODE (XEXP (ad
, 0));
5154 if (!(GET_CODE (ad
) == PLUS
5155 && CONST_INT_P (XEXP (ad
, 1))
5156 && (inner_code
== PLUS
|| inner_code
== LO_SUM
)))
5159 operand
= XEXP (XEXP (ad
, 0), op_index
);
5160 if (!REG_P (operand
) || REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
5163 addend
= XEXP (XEXP (ad
, 0), 1 - op_index
);
5165 if ((regno_ok_for_base_p (REGNO (operand
), mode
, as
, inner_code
,
5167 || operand
== frame_pointer_rtx
5168 || (!HARD_FRAME_POINTER_IS_FRAME_POINTER
5169 && operand
== hard_frame_pointer_rtx
)
5170 || (FRAME_POINTER_REGNUM
!= ARG_POINTER_REGNUM
5171 && operand
== arg_pointer_rtx
)
5172 || operand
== stack_pointer_rtx
)
5173 && ! maybe_memory_address_addr_space_p
5174 (mode
, ad
, as
, &XEXP (XEXP (ad
, 0), 1 - op_index
)))
5179 offset_reg
= plus_constant (GET_MODE (ad
), operand
,
5180 INTVAL (XEXP (ad
, 1)));
5182 /* Form the adjusted address. */
5183 if (GET_CODE (XEXP (ad
, 0)) == PLUS
)
5184 ad
= gen_rtx_PLUS (GET_MODE (ad
),
5185 op_index
== 0 ? offset_reg
: addend
,
5186 op_index
== 0 ? addend
: offset_reg
);
5188 ad
= gen_rtx_LO_SUM (GET_MODE (ad
),
5189 op_index
== 0 ? offset_reg
: addend
,
5190 op_index
== 0 ? addend
: offset_reg
);
5193 cls
= base_reg_class (mode
, as
, MEM
, GET_CODE (addend
));
5194 find_reloads_address_part (XEXP (ad
, op_index
),
5195 &XEXP (ad
, op_index
), cls
,
5196 GET_MODE (ad
), opnum
, type
, ind_levels
);
5197 find_reloads_address_1 (mode
, as
,
5198 XEXP (ad
, 1 - op_index
), 1, GET_CODE (ad
),
5199 GET_CODE (XEXP (ad
, op_index
)),
5200 &XEXP (ad
, 1 - op_index
), opnum
,
5207 /* See if address becomes valid when an eliminable register
5208 in a sum is replaced. */
5211 if (GET_CODE (ad
) == PLUS
)
5212 tem
= subst_indexed_address (ad
);
5213 if (tem
!= ad
&& strict_memory_address_addr_space_p (mode
, tem
, as
))
5215 /* Ok, we win that way. Replace any additional eliminable
5218 subst_reg_equivs_changed
= 0;
5219 tem
= subst_reg_equivs (tem
, insn
);
5221 /* Make sure that didn't make the address invalid again. */
5223 if (! subst_reg_equivs_changed
5224 || strict_memory_address_addr_space_p (mode
, tem
, as
))
5231 /* If constants aren't valid addresses, reload the constant address
5233 if (CONSTANT_P (ad
) && ! strict_memory_address_addr_space_p (mode
, ad
, as
))
5235 machine_mode address_mode
= GET_MODE (ad
);
5236 if (address_mode
== VOIDmode
)
5237 address_mode
= targetm
.addr_space
.address_mode (as
);
5239 /* If AD is an address in the constant pool, the MEM rtx may be shared.
5240 Unshare it so we can safely alter it. */
5241 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
5242 && CONSTANT_POOL_ADDRESS_P (ad
))
5244 *memrefloc
= copy_rtx (*memrefloc
);
5245 loc
= &XEXP (*memrefloc
, 0);
5247 loc
= &XEXP (*loc
, 0);
5250 find_reloads_address_part (ad
, loc
,
5251 base_reg_class (mode
, as
, MEM
, SCRATCH
),
5252 address_mode
, opnum
, type
, ind_levels
);
5253 return ! removed_and
;
5256 return find_reloads_address_1 (mode
, as
, ad
, 0, MEM
, SCRATCH
, loc
,
5257 opnum
, type
, ind_levels
, insn
);
5260 /* Find all pseudo regs appearing in AD
5261 that are eliminable in favor of equivalent values
5262 and do not have hard regs; replace them by their equivalents.
5263 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
5264 front of it for pseudos that we have to replace with stack slots. */
5267 subst_reg_equivs (rtx ad
, rtx_insn
*insn
)
5269 RTX_CODE code
= GET_CODE (ad
);
5286 int regno
= REGNO (ad
);
5288 if (reg_equiv_constant (regno
) != 0)
5290 subst_reg_equivs_changed
= 1;
5291 return reg_equiv_constant (regno
);
5293 if (reg_equiv_memory_loc (regno
) && num_not_at_initial_offset
)
5295 rtx mem
= make_memloc (ad
, regno
);
5296 if (! rtx_equal_p (mem
, reg_equiv_mem (regno
)))
5298 subst_reg_equivs_changed
= 1;
5299 /* We mark the USE with QImode so that we recognize it
5300 as one that can be safely deleted at the end of
5302 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
),
5311 /* Quickly dispose of a common case. */
5312 if (XEXP (ad
, 0) == frame_pointer_rtx
5313 && CONST_INT_P (XEXP (ad
, 1)))
5321 fmt
= GET_RTX_FORMAT (code
);
5322 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5324 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
5328 /* Compute the sum of X and Y, making canonicalizations assumed in an
5329 address, namely: sum constant integers, surround the sum of two
5330 constants with a CONST, put the constant as the second operand, and
5331 group the constant on the outermost sum.
5333 This routine assumes both inputs are already in canonical form. */
5336 form_sum (machine_mode mode
, rtx x
, rtx y
)
5340 gcc_assert (GET_MODE (x
) == mode
|| GET_MODE (x
) == VOIDmode
);
5341 gcc_assert (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
);
5343 if (CONST_INT_P (x
))
5344 return plus_constant (mode
, y
, INTVAL (x
));
5345 else if (CONST_INT_P (y
))
5346 return plus_constant (mode
, x
, INTVAL (y
));
5347 else if (CONSTANT_P (x
))
5348 tem
= x
, x
= y
, y
= tem
;
5350 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
5351 return form_sum (mode
, XEXP (x
, 0), form_sum (mode
, XEXP (x
, 1), y
));
5353 /* Note that if the operands of Y are specified in the opposite
5354 order in the recursive calls below, infinite recursion will occur. */
5355 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
5356 return form_sum (mode
, form_sum (mode
, x
, XEXP (y
, 0)), XEXP (y
, 1));
5358 /* If both constant, encapsulate sum. Otherwise, just form sum. A
5359 constant will have been placed second. */
5360 if (CONSTANT_P (x
) && CONSTANT_P (y
))
5362 if (GET_CODE (x
) == CONST
)
5364 if (GET_CODE (y
) == CONST
)
5367 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
5370 return gen_rtx_PLUS (mode
, x
, y
);
5373 /* If ADDR is a sum containing a pseudo register that should be
5374 replaced with a constant (from reg_equiv_constant),
5375 return the result of doing so, and also apply the associative
5376 law so that the result is more likely to be a valid address.
5377 (But it is not guaranteed to be one.)
5379 Note that at most one register is replaced, even if more are
5380 replaceable. Also, we try to put the result into a canonical form
5381 so it is more likely to be a valid address.
5383 In all other cases, return ADDR. */
5386 subst_indexed_address (rtx addr
)
5388 rtx op0
= 0, op1
= 0, op2
= 0;
5392 if (GET_CODE (addr
) == PLUS
)
5394 /* Try to find a register to replace. */
5395 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
5397 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
5398 && reg_renumber
[regno
] < 0
5399 && reg_equiv_constant (regno
) != 0)
5400 op0
= reg_equiv_constant (regno
);
5401 else if (REG_P (op1
)
5402 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
5403 && reg_renumber
[regno
] < 0
5404 && reg_equiv_constant (regno
) != 0)
5405 op1
= reg_equiv_constant (regno
);
5406 else if (GET_CODE (op0
) == PLUS
5407 && (tem
= subst_indexed_address (op0
)) != op0
)
5409 else if (GET_CODE (op1
) == PLUS
5410 && (tem
= subst_indexed_address (op1
)) != op1
)
5415 /* Pick out up to three things to add. */
5416 if (GET_CODE (op1
) == PLUS
)
5417 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
5418 else if (GET_CODE (op0
) == PLUS
)
5419 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
5421 /* Compute the sum. */
5423 op1
= form_sum (GET_MODE (addr
), op1
, op2
);
5425 op0
= form_sum (GET_MODE (addr
), op0
, op1
);
5432 /* Update the REG_INC notes for an insn. It updates all REG_INC
5433 notes for the instruction which refer to REGNO the to refer
5434 to the reload number.
5436 INSN is the insn for which any REG_INC notes need updating.
5438 REGNO is the register number which has been reloaded.
5440 RELOADNUM is the reload number. */
5443 update_auto_inc_notes (rtx_insn
*insn ATTRIBUTE_UNUSED
, int regno ATTRIBUTE_UNUSED
,
5444 int reloadnum ATTRIBUTE_UNUSED
)
5449 for (rtx link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
5450 if (REG_NOTE_KIND (link
) == REG_INC
5451 && (int) REGNO (XEXP (link
, 0)) == regno
)
5452 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5455 /* Record the pseudo registers we must reload into hard registers in a
5456 subexpression of a would-be memory address, X referring to a value
5457 in mode MODE. (This function is not called if the address we find
5460 CONTEXT = 1 means we are considering regs as index regs,
5461 = 0 means we are considering them as base regs.
5462 OUTER_CODE is the code of the enclosing RTX, typically a MEM, a PLUS,
5464 If CONTEXT == 0 and OUTER_CODE is a PLUS or LO_SUM, then INDEX_CODE
5465 is the code of the index part of the address. Otherwise, pass SCRATCH
5467 OPNUM and TYPE specify the purpose of any reloads made.
5469 IND_LEVELS says how many levels of indirect addressing are
5470 supported at this point in the address.
5472 INSN, if nonzero, is the insn in which we do the reload. It is used
5473 to determine if we may generate output reloads.
5475 We return nonzero if X, as a whole, is reloaded or replaced. */
5477 /* Note that we take shortcuts assuming that no multi-reg machine mode
5478 occurs as part of an address.
5479 Also, this is not fully machine-customizable; it works for machines
5480 such as VAXen and 68000's and 32000's, but other possible machines
5481 could have addressing modes that this does not handle right.
5482 If you add push_reload calls here, you need to make sure gen_reload
5483 handles those cases gracefully. */
5486 find_reloads_address_1 (machine_mode mode
, addr_space_t as
,
5488 enum rtx_code outer_code
, enum rtx_code index_code
,
5489 rtx
*loc
, int opnum
, enum reload_type type
,
5490 int ind_levels
, rtx_insn
*insn
)
5492 #define REG_OK_FOR_CONTEXT(CONTEXT, REGNO, MODE, AS, OUTER, INDEX) \
5494 ? regno_ok_for_base_p (REGNO, MODE, AS, OUTER, INDEX) \
5495 : REGNO_OK_FOR_INDEX_P (REGNO))
5497 enum reg_class context_reg_class
;
5498 RTX_CODE code
= GET_CODE (x
);
5499 bool reloaded_inner_of_autoinc
= false;
5502 context_reg_class
= INDEX_REG_CLASS
;
5504 context_reg_class
= base_reg_class (mode
, as
, outer_code
, index_code
);
5510 rtx orig_op0
= XEXP (x
, 0);
5511 rtx orig_op1
= XEXP (x
, 1);
5512 RTX_CODE code0
= GET_CODE (orig_op0
);
5513 RTX_CODE code1
= GET_CODE (orig_op1
);
5517 if (GET_CODE (op0
) == SUBREG
)
5519 op0
= SUBREG_REG (op0
);
5520 code0
= GET_CODE (op0
);
5521 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5522 op0
= gen_rtx_REG (word_mode
,
5524 subreg_regno_offset (REGNO (SUBREG_REG (orig_op0
)),
5525 GET_MODE (SUBREG_REG (orig_op0
)),
5526 SUBREG_BYTE (orig_op0
),
5527 GET_MODE (orig_op0
))));
5530 if (GET_CODE (op1
) == SUBREG
)
5532 op1
= SUBREG_REG (op1
);
5533 code1
= GET_CODE (op1
);
5534 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5535 /* ??? Why is this given op1's mode and above for
5536 ??? op0 SUBREGs we use word_mode? */
5537 op1
= gen_rtx_REG (GET_MODE (op1
),
5539 subreg_regno_offset (REGNO (SUBREG_REG (orig_op1
)),
5540 GET_MODE (SUBREG_REG (orig_op1
)),
5541 SUBREG_BYTE (orig_op1
),
5542 GET_MODE (orig_op1
))));
5544 /* Plus in the index register may be created only as a result of
5545 register rematerialization for expression like &localvar*4. Reload it.
5546 It may be possible to combine the displacement on the outer level,
5547 but it is probably not worthwhile to do so. */
5550 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5551 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5552 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5554 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5558 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5559 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5561 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5562 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5564 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5565 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5569 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5570 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5572 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5573 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5575 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5576 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5580 else if (code0
== CONST_INT
|| code0
== CONST
5581 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5582 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, code0
,
5583 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5586 else if (code1
== CONST_INT
|| code1
== CONST
5587 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5588 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, code1
,
5589 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5592 else if (code0
== REG
&& code1
== REG
)
5594 if (REGNO_OK_FOR_INDEX_P (REGNO (op1
))
5595 && regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5597 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
))
5598 && regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5600 else if (regno_ok_for_base_p (REGNO (op0
), mode
, as
, PLUS
, REG
))
5601 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5602 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5604 else if (REGNO_OK_FOR_INDEX_P (REGNO (op1
)))
5605 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5606 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5608 else if (regno_ok_for_base_p (REGNO (op1
), mode
, as
, PLUS
, REG
))
5609 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5610 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5612 else if (REGNO_OK_FOR_INDEX_P (REGNO (op0
)))
5613 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5614 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5618 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5619 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5621 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5622 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5627 else if (code0
== REG
)
5629 find_reloads_address_1 (mode
, as
, orig_op0
, 1, PLUS
, SCRATCH
,
5630 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5632 find_reloads_address_1 (mode
, as
, orig_op1
, 0, PLUS
, REG
,
5633 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5637 else if (code1
== REG
)
5639 find_reloads_address_1 (mode
, as
, orig_op1
, 1, PLUS
, SCRATCH
,
5640 &XEXP (x
, 1), opnum
, type
, ind_levels
,
5642 find_reloads_address_1 (mode
, as
, orig_op0
, 0, PLUS
, REG
,
5643 &XEXP (x
, 0), opnum
, type
, ind_levels
,
5653 rtx op0
= XEXP (x
, 0);
5654 rtx op1
= XEXP (x
, 1);
5655 enum rtx_code index_code
;
5659 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5662 /* Currently, we only support {PRE,POST}_MODIFY constructs
5663 where a base register is {inc,dec}remented by the contents
5664 of another register or by a constant value. Thus, these
5665 operands must match. */
5666 gcc_assert (op0
== XEXP (op1
, 0));
5668 /* Require index register (or constant). Let's just handle the
5669 register case in the meantime... If the target allows
5670 auto-modify by a constant then we could try replacing a pseudo
5671 register with its equivalent constant where applicable.
5673 We also handle the case where the register was eliminated
5674 resulting in a PLUS subexpression.
5676 If we later decide to reload the whole PRE_MODIFY or
5677 POST_MODIFY, inc_for_reload might clobber the reload register
5678 before reading the index. The index register might therefore
5679 need to live longer than a TYPE reload normally would, so be
5680 conservative and class it as RELOAD_OTHER. */
5681 if ((REG_P (XEXP (op1
, 1))
5682 && !REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5683 || GET_CODE (XEXP (op1
, 1)) == PLUS
)
5684 find_reloads_address_1 (mode
, as
, XEXP (op1
, 1), 1, code
, SCRATCH
,
5685 &XEXP (op1
, 1), opnum
, RELOAD_OTHER
,
5688 gcc_assert (REG_P (XEXP (op1
, 0)));
5690 regno
= REGNO (XEXP (op1
, 0));
5691 index_code
= GET_CODE (XEXP (op1
, 1));
5693 /* A register that is incremented cannot be constant! */
5694 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5695 || reg_equiv_constant (regno
) == 0);
5697 /* Handle a register that is equivalent to a memory location
5698 which cannot be addressed directly. */
5699 if (reg_equiv_memory_loc (regno
) != 0
5700 && (reg_equiv_address (regno
) != 0
5701 || num_not_at_initial_offset
))
5703 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5705 if (reg_equiv_address (regno
)
5706 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5710 /* First reload the memory location's address.
5711 We can't use ADDR_TYPE (type) here, because we need to
5712 write back the value after reading it, hence we actually
5713 need two registers. */
5714 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5715 &XEXP (tem
, 0), opnum
,
5719 if (!rtx_equal_p (tem
, orig
))
5720 push_reg_equiv_alt_mem (regno
, tem
);
5722 /* Then reload the memory location into a base
5724 reloadnum
= push_reload (tem
, tem
, &XEXP (x
, 0),
5726 base_reg_class (mode
, as
,
5728 GET_MODE (x
), GET_MODE (x
), 0,
5729 0, opnum
, RELOAD_OTHER
);
5731 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5736 if (reg_renumber
[regno
] >= 0)
5737 regno
= reg_renumber
[regno
];
5739 /* We require a base register here... */
5740 if (!regno_ok_for_base_p (regno
, GET_MODE (x
), as
, code
, index_code
))
5742 reloadnum
= push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5743 &XEXP (op1
, 0), &XEXP (x
, 0),
5744 base_reg_class (mode
, as
,
5746 GET_MODE (x
), GET_MODE (x
), 0, 0,
5747 opnum
, RELOAD_OTHER
);
5749 update_auto_inc_notes (this_insn
, regno
, reloadnum
);
5759 if (REG_P (XEXP (x
, 0)))
5761 int regno
= REGNO (XEXP (x
, 0));
5765 /* A register that is incremented cannot be constant! */
5766 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
5767 || reg_equiv_constant (regno
) == 0);
5769 /* Handle a register that is equivalent to a memory location
5770 which cannot be addressed directly. */
5771 if (reg_equiv_memory_loc (regno
) != 0
5772 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5774 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5775 if (reg_equiv_address (regno
)
5776 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5780 /* First reload the memory location's address.
5781 We can't use ADDR_TYPE (type) here, because we need to
5782 write back the value after reading it, hence we actually
5783 need two registers. */
5784 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5785 &XEXP (tem
, 0), opnum
, type
,
5787 reloaded_inner_of_autoinc
= true;
5788 if (!rtx_equal_p (tem
, orig
))
5789 push_reg_equiv_alt_mem (regno
, tem
);
5790 /* Put this inside a new increment-expression. */
5791 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5792 /* Proceed to reload that, as if it contained a register. */
5796 /* If we have a hard register that is ok in this incdec context,
5797 don't make a reload. If the register isn't nice enough for
5798 autoincdec, we can reload it. But, if an autoincrement of a
5799 register that we here verified as playing nice, still outside
5800 isn't "valid", it must be that no autoincrement is "valid".
5801 If that is true and something made an autoincrement anyway,
5802 this must be a special context where one is allowed.
5803 (For example, a "push" instruction.)
5804 We can't improve this address, so leave it alone. */
5806 /* Otherwise, reload the autoincrement into a suitable hard reg
5807 and record how much to increment by. */
5809 if (reg_renumber
[regno
] >= 0)
5810 regno
= reg_renumber
[regno
];
5811 if (regno
>= FIRST_PSEUDO_REGISTER
5812 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, code
,
5817 /* If we can output the register afterwards, do so, this
5818 saves the extra update.
5819 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5820 CALL_INSN - and it does not set CC0.
5821 But don't do this if we cannot directly address the
5822 memory location, since this will make it harder to
5823 reuse address reloads, and increases register pressure.
5824 Also don't do this if we can probably update x directly. */
5825 rtx equiv
= (MEM_P (XEXP (x
, 0))
5827 : reg_equiv_mem (regno
));
5828 enum insn_code icode
= optab_handler (add_optab
, GET_MODE (x
));
5829 if (insn
&& NONJUMP_INSN_P (insn
)
5831 && ! sets_cc0_p (PATTERN (insn
))
5833 && (regno
< FIRST_PSEUDO_REGISTER
5835 && memory_operand (equiv
, GET_MODE (equiv
))
5836 && ! (icode
!= CODE_FOR_nothing
5837 && insn_operand_matches (icode
, 0, equiv
)
5838 && insn_operand_matches (icode
, 1, equiv
))))
5839 /* Using RELOAD_OTHER means we emit this and the reload we
5840 made earlier in the wrong order. */
5841 && !reloaded_inner_of_autoinc
)
5843 /* We use the original pseudo for loc, so that
5844 emit_reload_insns() knows which pseudo this
5845 reload refers to and updates the pseudo rtx, not
5846 its equivalent memory location, as well as the
5847 corresponding entry in reg_last_reload_reg. */
5848 loc
= &XEXP (x_orig
, 0);
5851 = push_reload (x
, x
, loc
, loc
,
5853 GET_MODE (x
), GET_MODE (x
), 0, 0,
5854 opnum
, RELOAD_OTHER
);
5859 = push_reload (x
, x
, loc
, (rtx
*) 0,
5861 GET_MODE (x
), GET_MODE (x
), 0, 0,
5864 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5869 update_auto_inc_notes (this_insn
, REGNO (XEXP (x_orig
, 0)),
5879 /* Look for parts to reload in the inner expression and reload them
5880 too, in addition to this operation. Reloading all inner parts in
5881 addition to this one shouldn't be necessary, but at this point,
5882 we don't know if we can possibly omit any part that *can* be
5883 reloaded. Targets that are better off reloading just either part
5884 (or perhaps even a different part of an outer expression), should
5885 define LEGITIMIZE_RELOAD_ADDRESS. */
5886 find_reloads_address_1 (GET_MODE (XEXP (x
, 0)), as
, XEXP (x
, 0),
5887 context
, code
, SCRATCH
, &XEXP (x
, 0), opnum
,
5888 type
, ind_levels
, insn
);
5889 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5891 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5895 /* This is probably the result of a substitution, by eliminate_regs, of
5896 an equivalent address for a pseudo that was not allocated to a hard
5897 register. Verify that the specified address is valid and reload it
5900 Since we know we are going to reload this item, don't decrement for
5901 the indirection level.
5903 Note that this is actually conservative: it would be slightly more
5904 efficient to use the value of SPILL_INDIRECT_LEVELS from
5907 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5908 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5909 push_reload (*loc
, NULL_RTX
, loc
, (rtx
*) 0,
5911 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5916 int regno
= REGNO (x
);
5918 if (reg_equiv_constant (regno
) != 0)
5920 find_reloads_address_part (reg_equiv_constant (regno
), loc
,
5922 GET_MODE (x
), opnum
, type
, ind_levels
);
5926 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5927 that feeds this insn. */
5928 if (reg_equiv_mem (regno
) != 0)
5930 push_reload (reg_equiv_mem (regno
), NULL_RTX
, loc
, (rtx
*) 0,
5932 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5937 if (reg_equiv_memory_loc (regno
)
5938 && (reg_equiv_address (regno
) != 0 || num_not_at_initial_offset
))
5940 rtx tem
= make_memloc (x
, regno
);
5941 if (reg_equiv_address (regno
) != 0
5942 || ! rtx_equal_p (tem
, reg_equiv_mem (regno
)))
5945 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5946 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5948 if (!rtx_equal_p (x
, tem
))
5949 push_reg_equiv_alt_mem (regno
, x
);
5953 if (reg_renumber
[regno
] >= 0)
5954 regno
= reg_renumber
[regno
];
5956 if (regno
>= FIRST_PSEUDO_REGISTER
5957 || !REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5960 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5962 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5966 /* If a register appearing in an address is the subject of a CLOBBER
5967 in this insn, reload it into some other register to be safe.
5968 The CLOBBER is supposed to make the register unavailable
5969 from before this insn to after it. */
5970 if (regno_clobbered_p (regno
, this_insn
, GET_MODE (x
), 0))
5972 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5974 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5981 if (REG_P (SUBREG_REG (x
)))
5983 /* If this is a SUBREG of a hard register and the resulting register
5984 is of the wrong class, reload the whole SUBREG. This avoids
5985 needless copies if SUBREG_REG is multi-word. */
5986 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5988 int regno ATTRIBUTE_UNUSED
= subreg_regno (x
);
5990 if (!REG_OK_FOR_CONTEXT (context
, regno
, mode
, as
, outer_code
,
5993 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0,
5995 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5999 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
6000 is larger than the class size, then reload the whole SUBREG. */
6003 enum reg_class rclass
= context_reg_class
;
6004 if (ira_reg_class_max_nregs
[rclass
][GET_MODE (SUBREG_REG (x
))]
6005 > reg_class_size
[(int) rclass
])
6007 /* If the inner register will be replaced by a memory
6008 reference, we can do this only if we can replace the
6009 whole subreg by a (narrower) memory reference. If
6010 this is not possible, fall through and reload just
6011 the inner register (including address reloads). */
6012 if (reg_equiv_memory_loc (REGNO (SUBREG_REG (x
))) != 0)
6014 rtx tem
= find_reloads_subreg_address (x
, opnum
,
6020 push_reload (tem
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6021 GET_MODE (tem
), VOIDmode
, 0, 0,
6028 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6029 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
6042 const char *fmt
= GET_RTX_FORMAT (code
);
6045 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6048 /* Pass SCRATCH for INDEX_CODE, since CODE can never be a PLUS once
6050 find_reloads_address_1 (mode
, as
, XEXP (x
, i
), context
,
6051 code
, SCRATCH
, &XEXP (x
, i
),
6052 opnum
, type
, ind_levels
, insn
);
6056 #undef REG_OK_FOR_CONTEXT
6060 /* X, which is found at *LOC, is a part of an address that needs to be
6061 reloaded into a register of class RCLASS. If X is a constant, or if
6062 X is a PLUS that contains a constant, check that the constant is a
6063 legitimate operand and that we are supposed to be able to load
6064 it into the register.
6066 If not, force the constant into memory and reload the MEM instead.
6068 MODE is the mode to use, in case X is an integer constant.
6070 OPNUM and TYPE describe the purpose of any reloads made.
6072 IND_LEVELS says how many levels of indirect addressing this machine
6076 find_reloads_address_part (rtx x
, rtx
*loc
, enum reg_class rclass
,
6077 machine_mode mode
, int opnum
,
6078 enum reload_type type
, int ind_levels
)
6081 && (!targetm
.legitimate_constant_p (mode
, x
)
6082 || targetm
.preferred_reload_class (x
, rclass
) == NO_REGS
))
6084 x
= force_const_mem (mode
, x
);
6085 find_reloads_address (mode
, &x
, XEXP (x
, 0), &XEXP (x
, 0),
6086 opnum
, type
, ind_levels
, 0);
6089 else if (GET_CODE (x
) == PLUS
6090 && CONSTANT_P (XEXP (x
, 1))
6091 && (!targetm
.legitimate_constant_p (GET_MODE (x
), XEXP (x
, 1))
6092 || targetm
.preferred_reload_class (XEXP (x
, 1), rclass
)
6097 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
6098 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
6099 find_reloads_address (mode
, &XEXP (x
, 1), XEXP (tem
, 0), &XEXP (tem
, 0),
6100 opnum
, type
, ind_levels
, 0);
6103 push_reload (x
, NULL_RTX
, loc
, (rtx
*) 0, rclass
,
6104 mode
, VOIDmode
, 0, 0, opnum
, type
);
6107 /* X, a subreg of a pseudo, is a part of an address that needs to be
6108 reloaded, and the pseusdo is equivalent to a memory location.
6110 Attempt to replace the whole subreg by a (possibly narrower or wider)
6111 memory reference. If this is possible, return this new memory
6112 reference, and push all required address reloads. Otherwise,
6115 OPNUM and TYPE identify the purpose of the reload.
6117 IND_LEVELS says how many levels of indirect addressing are
6118 supported at this point in the address.
6120 INSN, if nonzero, is the insn in which we do the reload. It is used
6121 to determine where to put USEs for pseudos that we have to replace with
6125 find_reloads_subreg_address (rtx x
, int opnum
, enum reload_type type
,
6126 int ind_levels
, rtx_insn
*insn
,
6127 int *address_reloaded
)
6129 machine_mode outer_mode
= GET_MODE (x
);
6130 machine_mode inner_mode
= GET_MODE (SUBREG_REG (x
));
6131 int regno
= REGNO (SUBREG_REG (x
));
6136 gcc_assert (reg_equiv_memory_loc (regno
) != 0);
6138 /* We cannot replace the subreg with a modified memory reference if:
6140 - we have a paradoxical subreg that implicitly acts as a zero or
6141 sign extension operation due to LOAD_EXTEND_OP;
6143 - we have a subreg that is implicitly supposed to act on the full
6144 register due to WORD_REGISTER_OPERATIONS (see also eliminate_regs);
6146 - the address of the equivalent memory location is mode-dependent; or
6148 - we have a paradoxical subreg and the resulting memory is not
6149 sufficiently aligned to allow access in the wider mode.
6151 In addition, we choose not to perform the replacement for *any*
6152 paradoxical subreg, even if it were possible in principle. This
6153 is to avoid generating wider memory references than necessary.
6155 This corresponds to how previous versions of reload used to handle
6156 paradoxical subregs where no address reload was required. */
6158 if (paradoxical_subreg_p (x
))
6161 if (WORD_REGISTER_OPERATIONS
6162 && partial_subreg_p (outer_mode
, inner_mode
)
6163 && ((GET_MODE_SIZE (outer_mode
) - 1) / UNITS_PER_WORD
6164 == (GET_MODE_SIZE (inner_mode
) - 1) / UNITS_PER_WORD
))
6167 /* Since we don't attempt to handle paradoxical subregs, we can just
6168 call into simplify_subreg, which will handle all remaining checks
6170 orig
= make_memloc (SUBREG_REG (x
), regno
);
6171 offset
= SUBREG_BYTE (x
);
6172 tem
= simplify_subreg (outer_mode
, orig
, inner_mode
, offset
);
6173 if (!tem
|| !MEM_P (tem
))
6176 /* Now push all required address reloads, if any. */
6177 reloaded
= find_reloads_address (GET_MODE (tem
), &tem
,
6178 XEXP (tem
, 0), &XEXP (tem
, 0),
6179 opnum
, type
, ind_levels
, insn
);
6180 /* ??? Do we need to handle nonzero offsets somehow? */
6181 if (!offset
&& !rtx_equal_p (tem
, orig
))
6182 push_reg_equiv_alt_mem (regno
, tem
);
6184 /* For some processors an address may be valid in the original mode but
6185 not in a smaller mode. For example, ARM accepts a scaled index register
6186 in SImode but not in HImode. Note that this is only a problem if the
6187 address in reg_equiv_mem is already invalid in the new mode; other
6188 cases would be fixed by find_reloads_address as usual.
6190 ??? We attempt to handle such cases here by doing an additional reload
6191 of the full address after the usual processing by find_reloads_address.
6192 Note that this may not work in the general case, but it seems to cover
6193 the cases where this situation currently occurs. A more general fix
6194 might be to reload the *value* instead of the address, but this would
6195 not be expected by the callers of this routine as-is.
6197 If find_reloads_address already completed replaced the address, there
6198 is nothing further to do. */
6200 && reg_equiv_mem (regno
) != 0
6201 && !strict_memory_address_addr_space_p
6202 (GET_MODE (x
), XEXP (reg_equiv_mem (regno
), 0),
6203 MEM_ADDR_SPACE (reg_equiv_mem (regno
))))
6205 push_reload (XEXP (tem
, 0), NULL_RTX
, &XEXP (tem
, 0), (rtx
*) 0,
6206 base_reg_class (GET_MODE (tem
), MEM_ADDR_SPACE (tem
),
6208 GET_MODE (XEXP (tem
, 0)), VOIDmode
, 0, 0, opnum
, type
);
6212 /* If this is not a toplevel operand, find_reloads doesn't see this
6213 substitution. We have to emit a USE of the pseudo so that
6214 delete_output_reload can see it. */
6215 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
6216 /* We mark the USE with QImode so that we recognize it as one that
6217 can be safely deleted at the end of reload. */
6218 PUT_MODE (emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
),
6221 if (address_reloaded
)
6222 *address_reloaded
= reloaded
;
6227 /* Substitute into the current INSN the registers into which we have reloaded
6228 the things that need reloading. The array `replacements'
6229 contains the locations of all pointers that must be changed
6230 and says what to replace them with.
6232 Return the rtx that X translates into; usually X, but modified. */
6235 subst_reloads (rtx_insn
*insn
)
6239 for (i
= 0; i
< n_replacements
; i
++)
6241 struct replacement
*r
= &replacements
[i
];
6242 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6246 /* This checking takes a very long time on some platforms
6247 causing the gcc.c-torture/compile/limits-fnargs.c test
6248 to time out during testing. See PR 31850.
6250 Internal consistency test. Check that we don't modify
6251 anything in the equivalence arrays. Whenever something from
6252 those arrays needs to be reloaded, it must be unshared before
6253 being substituted into; the equivalence must not be modified.
6254 Otherwise, if the equivalence is used after that, it will
6255 have been modified, and the thing substituted (probably a
6256 register) is likely overwritten and not a usable equivalence. */
6259 for (check_regno
= 0; check_regno
< max_regno
; check_regno
++)
6261 #define CHECK_MODF(ARRAY) \
6262 gcc_assert (!(*reg_equivs)[check_regno].ARRAY \
6263 || !loc_mentioned_in_p (r->where, \
6264 (*reg_equivs)[check_regno].ARRAY))
6266 CHECK_MODF (constant
);
6267 CHECK_MODF (memory_loc
);
6268 CHECK_MODF (address
);
6272 #endif /* DEBUG_RELOAD */
6274 /* If we're replacing a LABEL_REF with a register, there must
6275 already be an indication (to e.g. flow) which label this
6276 register refers to. */
6277 gcc_assert (GET_CODE (*r
->where
) != LABEL_REF
6279 || find_reg_note (insn
,
6281 XEXP (*r
->where
, 0))
6282 || label_is_jump_target_p (XEXP (*r
->where
, 0), insn
));
6284 /* Encapsulate RELOADREG so its machine mode matches what
6285 used to be there. Note that gen_lowpart_common will
6286 do the wrong thing if RELOADREG is multi-word. RELOADREG
6287 will always be a REG here. */
6288 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
6289 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6291 *r
->where
= reloadreg
;
6293 /* If reload got no reg and isn't optional, something's wrong. */
6295 gcc_assert (rld
[r
->what
].optional
);
6299 /* Make a copy of any replacements being done into X and move those
6300 copies to locations in Y, a copy of X. */
6303 copy_replacements (rtx x
, rtx y
)
6305 copy_replacements_1 (&x
, &y
, n_replacements
);
6309 copy_replacements_1 (rtx
*px
, rtx
*py
, int orig_replacements
)
6313 struct replacement
*r
;
6317 for (j
= 0; j
< orig_replacements
; j
++)
6318 if (replacements
[j
].where
== px
)
6320 r
= &replacements
[n_replacements
++];
6322 r
->what
= replacements
[j
].what
;
6323 r
->mode
= replacements
[j
].mode
;
6328 code
= GET_CODE (x
);
6329 fmt
= GET_RTX_FORMAT (code
);
6331 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6334 copy_replacements_1 (&XEXP (x
, i
), &XEXP (y
, i
), orig_replacements
);
6335 else if (fmt
[i
] == 'E')
6336 for (j
= XVECLEN (x
, i
); --j
>= 0; )
6337 copy_replacements_1 (&XVECEXP (x
, i
, j
), &XVECEXP (y
, i
, j
),
6342 /* Change any replacements being done to *X to be done to *Y. */
6345 move_replacements (rtx
*x
, rtx
*y
)
6349 for (i
= 0; i
< n_replacements
; i
++)
6350 if (replacements
[i
].where
== x
)
6351 replacements
[i
].where
= y
;
6354 /* If LOC was scheduled to be replaced by something, return the replacement.
6355 Otherwise, return *LOC. */
6358 find_replacement (rtx
*loc
)
6360 struct replacement
*r
;
6362 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
6364 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
6366 if (reloadreg
&& r
->where
== loc
)
6368 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6369 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6373 else if (reloadreg
&& GET_CODE (*loc
) == SUBREG
6374 && r
->where
== &SUBREG_REG (*loc
))
6376 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
6377 reloadreg
= reload_adjust_reg_for_mode (reloadreg
, r
->mode
);
6379 return simplify_gen_subreg (GET_MODE (*loc
), reloadreg
,
6380 GET_MODE (SUBREG_REG (*loc
)),
6381 SUBREG_BYTE (*loc
));
6385 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
6386 what's inside and make a new rtl if so. */
6387 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
6388 || GET_CODE (*loc
) == MULT
)
6390 rtx x
= find_replacement (&XEXP (*loc
, 0));
6391 rtx y
= find_replacement (&XEXP (*loc
, 1));
6393 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
6394 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
6400 /* Return nonzero if register in range [REGNO, ENDREGNO)
6401 appears either explicitly or implicitly in X
6402 other than being stored into (except for earlyclobber operands).
6404 References contained within the substructure at LOC do not count.
6405 LOC may be zero, meaning don't ignore anything.
6407 This is similar to refers_to_regno_p in rtlanal.c except that we
6408 look at equivalences for pseudos that didn't get hard registers. */
6411 refers_to_regno_for_reload_p (unsigned int regno
, unsigned int endregno
,
6423 code
= GET_CODE (x
);
6430 /* If this is a pseudo, a hard register must not have been allocated.
6431 X must therefore either be a constant or be in memory. */
6432 if (r
>= FIRST_PSEUDO_REGISTER
)
6434 if (reg_equiv_memory_loc (r
))
6435 return refers_to_regno_for_reload_p (regno
, endregno
,
6436 reg_equiv_memory_loc (r
),
6439 gcc_assert (reg_equiv_constant (r
) || reg_equiv_invariant (r
));
6443 return (endregno
> r
6444 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
6445 ? hard_regno_nregs
[r
][GET_MODE (x
)]
6449 /* If this is a SUBREG of a hard reg, we can see exactly which
6450 registers are being modified. Otherwise, handle normally. */
6451 if (REG_P (SUBREG_REG (x
))
6452 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
6454 unsigned int inner_regno
= subreg_regno (x
);
6455 unsigned int inner_endregno
6456 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
6457 ? subreg_nregs (x
) : 1);
6459 return endregno
> inner_regno
&& regno
< inner_endregno
;
6465 if (&SET_DEST (x
) != loc
6466 /* Note setting a SUBREG counts as referring to the REG it is in for
6467 a pseudo but not for hard registers since we can
6468 treat each word individually. */
6469 && ((GET_CODE (SET_DEST (x
)) == SUBREG
6470 && loc
!= &SUBREG_REG (SET_DEST (x
))
6471 && REG_P (SUBREG_REG (SET_DEST (x
)))
6472 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
6473 && refers_to_regno_for_reload_p (regno
, endregno
,
6474 SUBREG_REG (SET_DEST (x
)),
6476 /* If the output is an earlyclobber operand, this is
6478 || ((!REG_P (SET_DEST (x
))
6479 || earlyclobber_operand_p (SET_DEST (x
)))
6480 && refers_to_regno_for_reload_p (regno
, endregno
,
6481 SET_DEST (x
), loc
))))
6484 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
6493 /* X does not match, so try its subexpressions. */
6495 fmt
= GET_RTX_FORMAT (code
);
6496 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6498 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
6506 if (refers_to_regno_for_reload_p (regno
, endregno
,
6510 else if (fmt
[i
] == 'E')
6513 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6514 if (loc
!= &XVECEXP (x
, i
, j
)
6515 && refers_to_regno_for_reload_p (regno
, endregno
,
6516 XVECEXP (x
, i
, j
), loc
))
6523 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
6524 we check if any register number in X conflicts with the relevant register
6525 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
6526 contains a MEM (we don't bother checking for memory addresses that can't
6527 conflict because we expect this to be a rare case.
6529 This function is similar to reg_overlap_mentioned_p in rtlanal.c except
6530 that we look at equivalences for pseudos that didn't get hard registers. */
6533 reg_overlap_mentioned_for_reload_p (rtx x
, rtx in
)
6535 int regno
, endregno
;
6537 /* Overly conservative. */
6538 if (GET_CODE (x
) == STRICT_LOW_PART
6539 || GET_RTX_CLASS (GET_CODE (x
)) == RTX_AUTOINC
)
6542 /* If either argument is a constant, then modifying X can not affect IN. */
6543 if (CONSTANT_P (x
) || CONSTANT_P (in
))
6545 else if (GET_CODE (x
) == SUBREG
&& MEM_P (SUBREG_REG (x
)))
6546 return refers_to_mem_for_reload_p (in
);
6547 else if (GET_CODE (x
) == SUBREG
)
6549 regno
= REGNO (SUBREG_REG (x
));
6550 if (regno
< FIRST_PSEUDO_REGISTER
)
6551 regno
+= subreg_regno_offset (REGNO (SUBREG_REG (x
)),
6552 GET_MODE (SUBREG_REG (x
)),
6555 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
6556 ? subreg_nregs (x
) : 1);
6558 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6564 /* If this is a pseudo, it must not have been assigned a hard register.
6565 Therefore, it must either be in memory or be a constant. */
6567 if (regno
>= FIRST_PSEUDO_REGISTER
)
6569 if (reg_equiv_memory_loc (regno
))
6570 return refers_to_mem_for_reload_p (in
);
6571 gcc_assert (reg_equiv_constant (regno
));
6575 endregno
= END_REGNO (x
);
6577 return refers_to_regno_for_reload_p (regno
, endregno
, in
, (rtx
*) 0);
6580 return refers_to_mem_for_reload_p (in
);
6581 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
6582 || GET_CODE (x
) == CC0
)
6583 return reg_mentioned_p (x
, in
);
6586 gcc_assert (GET_CODE (x
) == PLUS
);
6588 /* We actually want to know if X is mentioned somewhere inside IN.
6589 We must not say that (plus (sp) (const_int 124)) is in
6590 (plus (sp) (const_int 64)), since that can lead to incorrect reload
6591 allocation when spuriously changing a RELOAD_FOR_OUTPUT_ADDRESS
6592 into a RELOAD_OTHER on behalf of another RELOAD_OTHER. */
6597 else if (GET_CODE (in
) == PLUS
)
6598 return (rtx_equal_p (x
, in
)
6599 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 0))
6600 || reg_overlap_mentioned_for_reload_p (x
, XEXP (in
, 1)));
6601 else return (reg_overlap_mentioned_for_reload_p (XEXP (x
, 0), in
)
6602 || reg_overlap_mentioned_for_reload_p (XEXP (x
, 1), in
));
6608 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6612 refers_to_mem_for_reload_p (rtx x
)
6621 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6622 && reg_equiv_memory_loc (REGNO (x
)));
6624 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6625 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6627 && (MEM_P (XEXP (x
, i
))
6628 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6634 /* Check the insns before INSN to see if there is a suitable register
6635 containing the same value as GOAL.
6636 If OTHER is -1, look for a register in class RCLASS.
6637 Otherwise, just see if register number OTHER shares GOAL's value.
6639 Return an rtx for the register found, or zero if none is found.
6641 If RELOAD_REG_P is (short *)1,
6642 we reject any hard reg that appears in reload_reg_rtx
6643 because such a hard reg is also needed coming into this insn.
6645 If RELOAD_REG_P is any other nonzero value,
6646 it is a vector indexed by hard reg number
6647 and we reject any hard reg whose element in the vector is nonnegative
6648 as well as any that appears in reload_reg_rtx.
6650 If GOAL is zero, then GOALREG is a register number; we look
6651 for an equivalent for that register.
6653 MODE is the machine mode of the value we want an equivalence for.
6654 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6656 This function is used by jump.c as well as in the reload pass.
6658 If GOAL is the sum of the stack pointer and a constant, we treat it
6659 as if it were a constant except that sp is required to be unchanging. */
6662 find_equiv_reg (rtx goal
, rtx_insn
*insn
, enum reg_class rclass
, int other
,
6663 short *reload_reg_p
, int goalreg
, machine_mode mode
)
6666 rtx goaltry
, valtry
, value
;
6673 int goal_mem_addr_varies
= 0;
6674 int need_stable_sp
= 0;
6681 else if (REG_P (goal
))
6682 regno
= REGNO (goal
);
6683 else if (MEM_P (goal
))
6685 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6686 if (MEM_VOLATILE_P (goal
))
6688 if (flag_float_store
&& SCALAR_FLOAT_MODE_P (GET_MODE (goal
)))
6690 /* An address with side effects must be reexecuted. */
6705 else if (CONSTANT_P (goal
))
6707 else if (GET_CODE (goal
) == PLUS
6708 && XEXP (goal
, 0) == stack_pointer_rtx
6709 && CONSTANT_P (XEXP (goal
, 1)))
6710 goal_const
= need_stable_sp
= 1;
6711 else if (GET_CODE (goal
) == PLUS
6712 && XEXP (goal
, 0) == frame_pointer_rtx
6713 && CONSTANT_P (XEXP (goal
, 1)))
6719 /* Scan insns back from INSN, looking for one that copies
6720 a value into or out of GOAL.
6721 Stop and give up if we reach a label. */
6726 if (p
&& DEBUG_INSN_P (p
))
6729 if (p
== 0 || LABEL_P (p
)
6730 || num
> PARAM_VALUE (PARAM_MAX_RELOAD_SEARCH_INSNS
))
6733 /* Don't reuse register contents from before a setjmp-type
6734 function call; on the second return (from the longjmp) it
6735 might have been clobbered by a later reuse. It doesn't
6736 seem worthwhile to actually go and see if it is actually
6737 reused even if that information would be readily available;
6738 just don't reuse it across the setjmp call. */
6739 if (CALL_P (p
) && find_reg_note (p
, REG_SETJMP
, NULL_RTX
))
6742 if (NONJUMP_INSN_P (p
)
6743 /* If we don't want spill regs ... */
6744 && (! (reload_reg_p
!= 0
6745 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6746 /* ... then ignore insns introduced by reload; they aren't
6747 useful and can cause results in reload_as_needed to be
6748 different from what they were when calculating the need for
6749 spills. If we notice an input-reload insn here, we will
6750 reject it below, but it might hide a usable equivalent.
6751 That makes bad code. It may even fail: perhaps no reg was
6752 spilled for this insn because it was assumed we would find
6754 || INSN_UID (p
) < reload_first_uid
))
6757 pat
= single_set (p
);
6759 /* First check for something that sets some reg equal to GOAL. */
6762 && true_regnum (SET_SRC (pat
)) == regno
6763 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6766 && true_regnum (SET_DEST (pat
)) == regno
6767 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6769 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6770 /* When looking for stack pointer + const,
6771 make sure we don't use a stack adjust. */
6772 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6773 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6775 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6776 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6778 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6779 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6780 /* If we are looking for a constant,
6781 and something equivalent to that constant was copied
6782 into a reg, we can use that reg. */
6783 || (goal_const
&& REG_NOTES (p
) != 0
6784 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6785 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6787 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6788 || (REG_P (SET_DEST (pat
))
6789 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6790 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6791 && CONST_INT_P (goal
)
6793 = operand_subword (XEXP (tem
, 0), 0, 0,
6795 && rtx_equal_p (goal
, goaltry
)
6797 = operand_subword (SET_DEST (pat
), 0, 0,
6799 && (valueno
= true_regnum (valtry
)) >= 0)))
6800 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6802 && REG_P (SET_DEST (pat
))
6803 && CONST_DOUBLE_AS_FLOAT_P (XEXP (tem
, 0))
6804 && SCALAR_FLOAT_MODE_P (GET_MODE (XEXP (tem
, 0)))
6805 && CONST_INT_P (goal
)
6806 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6808 && rtx_equal_p (goal
, goaltry
)
6810 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6811 && (valueno
= true_regnum (valtry
)) >= 0)))
6815 if (valueno
!= other
)
6818 else if ((unsigned) valueno
>= FIRST_PSEUDO_REGISTER
)
6820 else if (!in_hard_reg_set_p (reg_class_contents
[(int) rclass
],
6830 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6831 (or copying VALUE into GOAL, if GOAL is also a register).
6832 Now verify that VALUE is really valid. */
6834 /* VALUENO is the register number of VALUE; a hard register. */
6836 /* Don't try to re-use something that is killed in this insn. We want
6837 to be able to trust REG_UNUSED notes. */
6838 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6841 /* If we propose to get the value from the stack pointer or if GOAL is
6842 a MEM based on the stack pointer, we need a stable SP. */
6843 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6844 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6848 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6849 if (GET_MODE (value
) != mode
)
6852 /* Reject VALUE if it was loaded from GOAL
6853 and is also a register that appears in the address of GOAL. */
6855 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6856 && refers_to_regno_for_reload_p (valueno
, end_hard_regno (mode
, valueno
),
6860 /* Reject registers that overlap GOAL. */
6862 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6863 nregs
= hard_regno_nregs
[regno
][mode
];
6866 valuenregs
= hard_regno_nregs
[valueno
][mode
];
6868 if (!goal_mem
&& !goal_const
6869 && regno
+ nregs
> valueno
&& regno
< valueno
+ valuenregs
)
6872 /* Reject VALUE if it is one of the regs reserved for reloads.
6873 Reload1 knows how to reuse them anyway, and it would get
6874 confused if we allocated one without its knowledge.
6875 (Now that insns introduced by reload are ignored above,
6876 this case shouldn't happen, but I'm not positive.) */
6878 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) HOST_WIDE_INT_1
)
6881 for (i
= 0; i
< valuenregs
; ++i
)
6882 if (reload_reg_p
[valueno
+ i
] >= 0)
6886 /* Reject VALUE if it is a register being used for an input reload
6887 even if it is not one of those reserved. */
6889 if (reload_reg_p
!= 0)
6892 for (i
= 0; i
< n_reloads
; i
++)
6893 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6895 int regno1
= REGNO (rld
[i
].reg_rtx
);
6896 int nregs1
= hard_regno_nregs
[regno1
]
6897 [GET_MODE (rld
[i
].reg_rtx
)];
6898 if (regno1
< valueno
+ valuenregs
6899 && regno1
+ nregs1
> valueno
)
6905 /* We must treat frame pointer as varying here,
6906 since it can vary--in a nonlocal goto as generated by expand_goto. */
6907 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6909 /* Now verify that the values of GOAL and VALUE remain unaltered
6910 until INSN is reached. */
6919 /* Don't trust the conversion past a function call
6920 if either of the two is in a call-clobbered register, or memory. */
6925 if (goal_mem
|| need_stable_sp
)
6928 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6929 for (i
= 0; i
< nregs
; ++i
)
6930 if (call_used_regs
[regno
+ i
]
6931 || targetm
.hard_regno_call_part_clobbered (regno
+ i
, mode
))
6934 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6935 for (i
= 0; i
< valuenregs
; ++i
)
6936 if (call_used_regs
[valueno
+ i
]
6937 || targetm
.hard_regno_call_part_clobbered (valueno
+ i
,
6946 /* Watch out for unspec_volatile, and volatile asms. */
6947 if (volatile_insn_p (pat
))
6950 /* If this insn P stores in either GOAL or VALUE, return 0.
6951 If GOAL is a memory ref and this insn writes memory, return 0.
6952 If GOAL is a memory ref and its address is not constant,
6953 and this insn P changes a register used in GOAL, return 0. */
6955 if (GET_CODE (pat
) == COND_EXEC
)
6956 pat
= COND_EXEC_CODE (pat
);
6957 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6959 rtx dest
= SET_DEST (pat
);
6960 while (GET_CODE (dest
) == SUBREG
6961 || GET_CODE (dest
) == ZERO_EXTRACT
6962 || GET_CODE (dest
) == STRICT_LOW_PART
)
6963 dest
= XEXP (dest
, 0);
6966 int xregno
= REGNO (dest
);
6968 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6969 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
6972 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6974 if (xregno
< valueno
+ valuenregs
6975 && xregno
+ xnregs
> valueno
)
6977 if (goal_mem_addr_varies
6978 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6980 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6983 else if (goal_mem
&& MEM_P (dest
)
6984 && ! push_operand (dest
, GET_MODE (dest
)))
6986 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
6987 && reg_equiv_memory_loc (regno
) != 0)
6989 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6992 else if (GET_CODE (pat
) == PARALLEL
)
6995 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6997 rtx v1
= XVECEXP (pat
, 0, i
);
6998 if (GET_CODE (v1
) == COND_EXEC
)
6999 v1
= COND_EXEC_CODE (v1
);
7000 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
7002 rtx dest
= SET_DEST (v1
);
7003 while (GET_CODE (dest
) == SUBREG
7004 || GET_CODE (dest
) == ZERO_EXTRACT
7005 || GET_CODE (dest
) == STRICT_LOW_PART
)
7006 dest
= XEXP (dest
, 0);
7009 int xregno
= REGNO (dest
);
7011 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
7012 xnregs
= hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7015 if (xregno
< regno
+ nregs
7016 && xregno
+ xnregs
> regno
)
7018 if (xregno
< valueno
+ valuenregs
7019 && xregno
+ xnregs
> valueno
)
7021 if (goal_mem_addr_varies
7022 && reg_overlap_mentioned_for_reload_p (dest
,
7025 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
7028 else if (goal_mem
&& MEM_P (dest
)
7029 && ! push_operand (dest
, GET_MODE (dest
)))
7031 else if (MEM_P (dest
) && regno
>= FIRST_PSEUDO_REGISTER
7032 && reg_equiv_memory_loc (regno
) != 0)
7034 else if (need_stable_sp
7035 && push_operand (dest
, GET_MODE (dest
)))
7041 if (CALL_P (p
) && CALL_INSN_FUNCTION_USAGE (p
))
7045 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
7046 link
= XEXP (link
, 1))
7048 pat
= XEXP (link
, 0);
7049 if (GET_CODE (pat
) == CLOBBER
)
7051 rtx dest
= SET_DEST (pat
);
7055 int xregno
= REGNO (dest
);
7057 = hard_regno_nregs
[xregno
][GET_MODE (dest
)];
7059 if (xregno
< regno
+ nregs
7060 && xregno
+ xnregs
> regno
)
7062 else if (xregno
< valueno
+ valuenregs
7063 && xregno
+ xnregs
> valueno
)
7065 else if (goal_mem_addr_varies
7066 && reg_overlap_mentioned_for_reload_p (dest
,
7071 else if (goal_mem
&& MEM_P (dest
)
7072 && ! push_operand (dest
, GET_MODE (dest
)))
7074 else if (need_stable_sp
7075 && push_operand (dest
, GET_MODE (dest
)))
7082 /* If this insn auto-increments or auto-decrements
7083 either regno or valueno, return 0 now.
7084 If GOAL is a memory ref and its address is not constant,
7085 and this insn P increments a register used in GOAL, return 0. */
7089 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
7090 if (REG_NOTE_KIND (link
) == REG_INC
7091 && REG_P (XEXP (link
, 0)))
7093 int incno
= REGNO (XEXP (link
, 0));
7094 if (incno
< regno
+ nregs
&& incno
>= regno
)
7096 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
7098 if (goal_mem_addr_varies
7099 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
7109 /* Find a place where INCED appears in an increment or decrement operator
7110 within X, and return the amount INCED is incremented or decremented by.
7111 The value is always positive. */
7114 find_inc_amount (rtx x
, rtx inced
)
7116 enum rtx_code code
= GET_CODE (x
);
7122 rtx addr
= XEXP (x
, 0);
7123 if ((GET_CODE (addr
) == PRE_DEC
7124 || GET_CODE (addr
) == POST_DEC
7125 || GET_CODE (addr
) == PRE_INC
7126 || GET_CODE (addr
) == POST_INC
)
7127 && XEXP (addr
, 0) == inced
)
7128 return GET_MODE_SIZE (GET_MODE (x
));
7129 else if ((GET_CODE (addr
) == PRE_MODIFY
7130 || GET_CODE (addr
) == POST_MODIFY
)
7131 && GET_CODE (XEXP (addr
, 1)) == PLUS
7132 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
7133 && XEXP (addr
, 0) == inced
7134 && CONST_INT_P (XEXP (XEXP (addr
, 1), 1)))
7136 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
7137 return i
< 0 ? -i
: i
;
7141 fmt
= GET_RTX_FORMAT (code
);
7142 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
7146 int tem
= find_inc_amount (XEXP (x
, i
), inced
);
7153 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
7155 int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
7165 /* Return 1 if registers from REGNO to ENDREGNO are the subjects of a
7166 REG_INC note in insn INSN. REGNO must refer to a hard register. */
7169 reg_inc_found_and_valid_p (unsigned int regno
, unsigned int endregno
,
7179 if (! INSN_P (insn
))
7182 for (link
= REG_NOTES (insn
); link
; link
= XEXP (link
, 1))
7183 if (REG_NOTE_KIND (link
) == REG_INC
)
7185 unsigned int test
= (int) REGNO (XEXP (link
, 0));
7186 if (test
>= regno
&& test
< endregno
)
7192 /* Return 1 if register REGNO is the subject of a clobber in insn INSN.
7193 If SETS is 1, also consider SETs. If SETS is 2, enable checking
7194 REG_INC. REGNO must refer to a hard register. */
7197 regno_clobbered_p (unsigned int regno
, rtx_insn
*insn
, machine_mode mode
,
7200 unsigned int nregs
, endregno
;
7202 /* regno must be a hard register. */
7203 gcc_assert (regno
< FIRST_PSEUDO_REGISTER
);
7205 nregs
= hard_regno_nregs
[regno
][mode
];
7206 endregno
= regno
+ nregs
;
7208 if ((GET_CODE (PATTERN (insn
)) == CLOBBER
7209 || (sets
== 1 && GET_CODE (PATTERN (insn
)) == SET
))
7210 && REG_P (XEXP (PATTERN (insn
), 0)))
7212 unsigned int test
= REGNO (XEXP (PATTERN (insn
), 0));
7214 return test
>= regno
&& test
< endregno
;
7217 if (sets
== 2 && reg_inc_found_and_valid_p (regno
, endregno
, insn
))
7220 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
7222 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
7226 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
7227 if ((GET_CODE (elt
) == CLOBBER
7228 || (sets
== 1 && GET_CODE (elt
) == SET
))
7229 && REG_P (XEXP (elt
, 0)))
7231 unsigned int test
= REGNO (XEXP (elt
, 0));
7233 if (test
>= regno
&& test
< endregno
)
7237 && reg_inc_found_and_valid_p (regno
, endregno
, elt
))
7245 /* Find the low part, with mode MODE, of a hard regno RELOADREG. */
7247 reload_adjust_reg_for_mode (rtx reloadreg
, machine_mode mode
)
7251 if (GET_MODE (reloadreg
) == mode
)
7254 regno
= REGNO (reloadreg
);
7256 if (REG_WORDS_BIG_ENDIAN
)
7257 regno
+= (int) hard_regno_nregs
[regno
][GET_MODE (reloadreg
)]
7258 - (int) hard_regno_nregs
[regno
][mode
];
7260 return gen_rtx_REG (mode
, regno
);
7263 static const char *const reload_when_needed_name
[] =
7266 "RELOAD_FOR_OUTPUT",
7268 "RELOAD_FOR_INPUT_ADDRESS",
7269 "RELOAD_FOR_INPADDR_ADDRESS",
7270 "RELOAD_FOR_OUTPUT_ADDRESS",
7271 "RELOAD_FOR_OUTADDR_ADDRESS",
7272 "RELOAD_FOR_OPERAND_ADDRESS",
7273 "RELOAD_FOR_OPADDR_ADDR",
7275 "RELOAD_FOR_OTHER_ADDRESS"
7278 /* These functions are used to print the variables set by 'find_reloads' */
7281 debug_reload_to_stream (FILE *f
)
7288 for (r
= 0; r
< n_reloads
; r
++)
7290 fprintf (f
, "Reload %d: ", r
);
7294 fprintf (f
, "reload_in (%s) = ",
7295 GET_MODE_NAME (rld
[r
].inmode
));
7296 print_inline_rtx (f
, rld
[r
].in
, 24);
7297 fprintf (f
, "\n\t");
7300 if (rld
[r
].out
!= 0)
7302 fprintf (f
, "reload_out (%s) = ",
7303 GET_MODE_NAME (rld
[r
].outmode
));
7304 print_inline_rtx (f
, rld
[r
].out
, 24);
7305 fprintf (f
, "\n\t");
7308 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].rclass
]);
7310 fprintf (f
, "%s (opnum = %d)",
7311 reload_when_needed_name
[(int) rld
[r
].when_needed
],
7314 if (rld
[r
].optional
)
7315 fprintf (f
, ", optional");
7317 if (rld
[r
].nongroup
)
7318 fprintf (f
, ", nongroup");
7320 if (rld
[r
].inc
!= 0)
7321 fprintf (f
, ", inc by %d", rld
[r
].inc
);
7323 if (rld
[r
].nocombine
)
7324 fprintf (f
, ", can't combine");
7326 if (rld
[r
].secondary_p
)
7327 fprintf (f
, ", secondary_reload_p");
7329 if (rld
[r
].in_reg
!= 0)
7331 fprintf (f
, "\n\treload_in_reg: ");
7332 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
7335 if (rld
[r
].out_reg
!= 0)
7337 fprintf (f
, "\n\treload_out_reg: ");
7338 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
7341 if (rld
[r
].reg_rtx
!= 0)
7343 fprintf (f
, "\n\treload_reg_rtx: ");
7344 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
7348 if (rld
[r
].secondary_in_reload
!= -1)
7350 fprintf (f
, "%ssecondary_in_reload = %d",
7351 prefix
, rld
[r
].secondary_in_reload
);
7355 if (rld
[r
].secondary_out_reload
!= -1)
7356 fprintf (f
, "%ssecondary_out_reload = %d\n",
7357 prefix
, rld
[r
].secondary_out_reload
);
7360 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
7362 fprintf (f
, "%ssecondary_in_icode = %s", prefix
,
7363 insn_data
[rld
[r
].secondary_in_icode
].name
);
7367 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
7368 fprintf (f
, "%ssecondary_out_icode = %s", prefix
,
7369 insn_data
[rld
[r
].secondary_out_icode
].name
);
7378 debug_reload_to_stream (stderr
);