1 /* Emit RTL for the GNU C-Compiler expander.
2 Copyright (C) 1987, 1988, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000, 2001 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* Middle-to-low level generation of rtx code and insns.
25 This file contains the functions `gen_rtx', `gen_reg_rtx'
26 and `gen_label_rtx' that are the usual ways of creating rtl
27 expressions for most purposes.
29 It also has the functions for creating insns and linking
30 them in the doubly-linked chain.
32 The patterns of the insns are created by machine-dependent
33 routines in insn-emit.c, which is generated automatically from
34 the machine description. These routines use `gen_rtx' to make
35 the individual rtx's of the pattern; what is machine dependent
36 is the kind of rtx's they make and what arguments they use. */
48 #include "hard-reg-set.h"
50 #include "insn-config.h"
55 #include "basic-block.h"
58 /* Commonly used modes. */
60 enum machine_mode byte_mode
; /* Mode whose width is BITS_PER_UNIT. */
61 enum machine_mode word_mode
; /* Mode whose width is BITS_PER_WORD. */
62 enum machine_mode double_mode
; /* Mode whose width is DOUBLE_TYPE_SIZE. */
63 enum machine_mode ptr_mode
; /* Mode whose width is POINTER_SIZE. */
66 /* This is *not* reset after each function. It gives each CODE_LABEL
67 in the entire compilation a unique label number. */
69 static int label_num
= 1;
71 /* Highest label number in current function.
72 Zero means use the value of label_num instead.
73 This is nonzero only when belatedly compiling an inline function. */
75 static int last_label_num
;
77 /* Value label_num had when set_new_first_and_last_label_number was called.
78 If label_num has not changed since then, last_label_num is valid. */
80 static int base_label_num
;
82 /* Nonzero means do not generate NOTEs for source line numbers. */
84 static int no_line_numbers
;
86 /* Commonly used rtx's, so that we only need space for one copy.
87 These are initialized once for the entire compilation.
88 All of these except perhaps the floating-point CONST_DOUBLEs
89 are unique; no other rtx-object will be equal to any of these. */
91 rtx global_rtl
[GR_MAX
];
93 /* We record floating-point CONST_DOUBLEs in each floating-point mode for
94 the values of 0, 1, and 2. For the integer entries and VOIDmode, we
95 record a copy of const[012]_rtx. */
97 rtx const_tiny_rtx
[3][(int) MAX_MACHINE_MODE
];
101 REAL_VALUE_TYPE dconst0
;
102 REAL_VALUE_TYPE dconst1
;
103 REAL_VALUE_TYPE dconst2
;
104 REAL_VALUE_TYPE dconstm1
;
106 /* All references to the following fixed hard registers go through
107 these unique rtl objects. On machines where the frame-pointer and
108 arg-pointer are the same register, they use the same unique object.
110 After register allocation, other rtl objects which used to be pseudo-regs
111 may be clobbered to refer to the frame-pointer register.
112 But references that were originally to the frame-pointer can be
113 distinguished from the others because they contain frame_pointer_rtx.
115 When to use frame_pointer_rtx and hard_frame_pointer_rtx is a little
116 tricky: until register elimination has taken place hard_frame_pointer_rtx
117 should be used if it is being set, and frame_pointer_rtx otherwise. After
118 register elimination hard_frame_pointer_rtx should always be used.
119 On machines where the two registers are same (most) then these are the
122 In an inline procedure, the stack and frame pointer rtxs may not be
123 used for anything else. */
124 rtx struct_value_rtx
; /* (REG:Pmode STRUCT_VALUE_REGNUM) */
125 rtx struct_value_incoming_rtx
; /* (REG:Pmode STRUCT_VALUE_INCOMING_REGNUM) */
126 rtx static_chain_rtx
; /* (REG:Pmode STATIC_CHAIN_REGNUM) */
127 rtx static_chain_incoming_rtx
; /* (REG:Pmode STATIC_CHAIN_INCOMING_REGNUM) */
128 rtx pic_offset_table_rtx
; /* (REG:Pmode PIC_OFFSET_TABLE_REGNUM) */
130 /* This is used to implement __builtin_return_address for some machines.
131 See for instance the MIPS port. */
132 rtx return_address_pointer_rtx
; /* (REG:Pmode RETURN_ADDRESS_POINTER_REGNUM) */
134 /* We make one copy of (const_int C) where C is in
135 [- MAX_SAVED_CONST_INT, MAX_SAVED_CONST_INT]
136 to save space during the compilation and simplify comparisons of
139 rtx const_int_rtx
[MAX_SAVED_CONST_INT
* 2 + 1];
141 /* A hash table storing CONST_INTs whose absolute value is greater
142 than MAX_SAVED_CONST_INT. */
144 static htab_t const_int_htab
;
146 /* start_sequence and gen_sequence can make a lot of rtx expressions which are
147 shortly thrown away. We use two mechanisms to prevent this waste:
149 For sizes up to 5 elements, we keep a SEQUENCE and its associated
150 rtvec for use by gen_sequence. One entry for each size is
151 sufficient because most cases are calls to gen_sequence followed by
152 immediately emitting the SEQUENCE. Reuse is safe since emitting a
153 sequence is destructive on the insn in it anyway and hence can't be
156 We do not bother to save this cached data over nested function calls.
157 Instead, we just reinitialize them. */
159 #define SEQUENCE_RESULT_SIZE 5
161 static rtx sequence_result
[SEQUENCE_RESULT_SIZE
];
163 /* During RTL generation, we also keep a list of free INSN rtl codes. */
164 static rtx free_insn
;
166 #define first_insn (cfun->emit->x_first_insn)
167 #define last_insn (cfun->emit->x_last_insn)
168 #define cur_insn_uid (cfun->emit->x_cur_insn_uid)
169 #define last_linenum (cfun->emit->x_last_linenum)
170 #define last_filename (cfun->emit->x_last_filename)
171 #define first_label_num (cfun->emit->x_first_label_num)
173 static rtx make_jump_insn_raw
PARAMS ((rtx
));
174 static rtx make_call_insn_raw
PARAMS ((rtx
));
175 static rtx find_line_note
PARAMS ((rtx
));
176 static void mark_sequence_stack
PARAMS ((struct sequence_stack
*));
177 static void unshare_all_rtl_1
PARAMS ((rtx
));
178 static void unshare_all_decls
PARAMS ((tree
));
179 static void reset_used_decls
PARAMS ((tree
));
180 static hashval_t const_int_htab_hash
PARAMS ((const void *));
181 static int const_int_htab_eq
PARAMS ((const void *,
183 static int rtx_htab_mark_1
PARAMS ((void **, void *));
184 static void rtx_htab_mark
PARAMS ((void *));
187 /* Returns a hash code for X (which is a really a CONST_INT). */
190 const_int_htab_hash (x
)
193 return (hashval_t
) INTVAL ((const struct rtx_def
*) x
);
196 /* Returns non-zero if the value represented by X (which is really a
197 CONST_INT) is the same as that given by Y (which is really a
201 const_int_htab_eq (x
, y
)
205 return (INTVAL ((const struct rtx_def
*) x
) == *((const HOST_WIDE_INT
*) y
));
208 /* Mark the hash-table element X (which is really a pointer to an
212 rtx_htab_mark_1 (x
, data
)
214 void *data ATTRIBUTE_UNUSED
;
220 /* Mark all the elements of HTAB (which is really an htab_t full of
227 htab_traverse (*((htab_t
*) htab
), rtx_htab_mark_1
, NULL
);
230 /* Generate a new REG rtx. Make sure ORIGINAL_REGNO is set properly, and
231 don't attempt to share with the various global pieces of rtl (such as
232 frame_pointer_rtx). */
235 gen_raw_REG (mode
, regno
)
236 enum machine_mode mode
;
239 rtx x
= gen_rtx_raw_REG (mode
, regno
);
240 ORIGINAL_REGNO (x
) = regno
;
244 /* There are some RTL codes that require special attention; the generation
245 functions do the raw handling. If you add to this list, modify
246 special_rtx in gengenrtl.c as well. */
249 gen_rtx_CONST_INT (mode
, arg
)
250 enum machine_mode mode ATTRIBUTE_UNUSED
;
255 if (arg
>= - MAX_SAVED_CONST_INT
&& arg
<= MAX_SAVED_CONST_INT
)
256 return const_int_rtx
[arg
+ MAX_SAVED_CONST_INT
];
258 #if STORE_FLAG_VALUE != 1 && STORE_FLAG_VALUE != -1
259 if (const_true_rtx
&& arg
== STORE_FLAG_VALUE
)
260 return const_true_rtx
;
263 /* Look up the CONST_INT in the hash table. */
264 slot
= htab_find_slot_with_hash (const_int_htab
, &arg
,
265 (hashval_t
) arg
, INSERT
);
267 *slot
= gen_rtx_raw_CONST_INT (VOIDmode
, arg
);
272 /* CONST_DOUBLEs needs special handling because their length is known
276 gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
)
277 enum machine_mode mode
;
279 HOST_WIDE_INT arg1
, arg2
;
281 rtx r
= rtx_alloc (CONST_DOUBLE
);
286 X0EXP (r
, 1) = NULL_RTX
;
290 for (i
= GET_RTX_LENGTH (CONST_DOUBLE
) - 1; i
> 3; --i
)
297 gen_rtx_REG (mode
, regno
)
298 enum machine_mode mode
;
301 /* In case the MD file explicitly references the frame pointer, have
302 all such references point to the same frame pointer. This is
303 used during frame pointer elimination to distinguish the explicit
304 references to these registers from pseudos that happened to be
307 If we have eliminated the frame pointer or arg pointer, we will
308 be using it as a normal register, for example as a spill
309 register. In such cases, we might be accessing it in a mode that
310 is not Pmode and therefore cannot use the pre-allocated rtx.
312 Also don't do this when we are making new REGs in reload, since
313 we don't want to get confused with the real pointers. */
315 if (mode
== Pmode
&& !reload_in_progress
)
317 if (regno
== FRAME_POINTER_REGNUM
)
318 return frame_pointer_rtx
;
319 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
320 if (regno
== HARD_FRAME_POINTER_REGNUM
)
321 return hard_frame_pointer_rtx
;
323 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM && HARD_FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
324 if (regno
== ARG_POINTER_REGNUM
)
325 return arg_pointer_rtx
;
327 #ifdef RETURN_ADDRESS_POINTER_REGNUM
328 if (regno
== RETURN_ADDRESS_POINTER_REGNUM
)
329 return return_address_pointer_rtx
;
331 if (regno
== STACK_POINTER_REGNUM
)
332 return stack_pointer_rtx
;
335 return gen_raw_REG (mode
, regno
);
339 gen_rtx_MEM (mode
, addr
)
340 enum machine_mode mode
;
343 rtx rt
= gen_rtx_raw_MEM (mode
, addr
);
345 /* This field is not cleared by the mere allocation of the rtx, so
347 MEM_ALIAS_SET (rt
) = 0;
352 /* rtx gen_rtx (code, mode, [element1, ..., elementn])
354 ** This routine generates an RTX of the size specified by
355 ** <code>, which is an RTX code. The RTX structure is initialized
356 ** from the arguments <element1> through <elementn>, which are
357 ** interpreted according to the specific RTX type's format. The
358 ** special machine mode associated with the rtx (if any) is specified
361 ** gen_rtx can be invoked in a way which resembles the lisp-like
362 ** rtx it will generate. For example, the following rtx structure:
364 ** (plus:QI (mem:QI (reg:SI 1))
365 ** (mem:QI (plusw:SI (reg:SI 2) (reg:SI 3))))
367 ** ...would be generated by the following C code:
369 ** gen_rtx (PLUS, QImode,
370 ** gen_rtx (MEM, QImode,
371 ** gen_rtx (REG, SImode, 1)),
372 ** gen_rtx (MEM, QImode,
373 ** gen_rtx (PLUS, SImode,
374 ** gen_rtx (REG, SImode, 2),
375 ** gen_rtx (REG, SImode, 3)))),
380 gen_rtx
VPARAMS ((enum rtx_code code
, enum machine_mode mode
, ...))
382 #ifndef ANSI_PROTOTYPES
384 enum machine_mode mode
;
387 register int i
; /* Array indices... */
388 register const char *fmt
; /* Current rtx's format... */
389 register rtx rt_val
; /* RTX to return to caller... */
393 #ifndef ANSI_PROTOTYPES
394 code
= va_arg (p
, enum rtx_code
);
395 mode
= va_arg (p
, enum machine_mode
);
401 rt_val
= gen_rtx_CONST_INT (mode
, va_arg (p
, HOST_WIDE_INT
));
406 rtx arg0
= va_arg (p
, rtx
);
407 HOST_WIDE_INT arg1
= va_arg (p
, HOST_WIDE_INT
);
408 HOST_WIDE_INT arg2
= va_arg (p
, HOST_WIDE_INT
);
409 rt_val
= gen_rtx_CONST_DOUBLE (mode
, arg0
, arg1
, arg2
);
414 rt_val
= gen_rtx_REG (mode
, va_arg (p
, int));
418 rt_val
= gen_rtx_MEM (mode
, va_arg (p
, rtx
));
422 rt_val
= rtx_alloc (code
); /* Allocate the storage space. */
423 rt_val
->mode
= mode
; /* Store the machine mode... */
425 fmt
= GET_RTX_FORMAT (code
); /* Find the right format... */
426 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
430 case '0': /* Unused field. */
433 case 'i': /* An integer? */
434 XINT (rt_val
, i
) = va_arg (p
, int);
437 case 'w': /* A wide integer? */
438 XWINT (rt_val
, i
) = va_arg (p
, HOST_WIDE_INT
);
441 case 's': /* A string? */
442 XSTR (rt_val
, i
) = va_arg (p
, char *);
445 case 'e': /* An expression? */
446 case 'u': /* An insn? Same except when printing. */
447 XEXP (rt_val
, i
) = va_arg (p
, rtx
);
450 case 'E': /* An RTX vector? */
451 XVEC (rt_val
, i
) = va_arg (p
, rtvec
);
454 case 'b': /* A bitmap? */
455 XBITMAP (rt_val
, i
) = va_arg (p
, bitmap
);
458 case 't': /* A tree? */
459 XTREE (rt_val
, i
) = va_arg (p
, tree
);
473 /* gen_rtvec (n, [rt1, ..., rtn])
475 ** This routine creates an rtvec and stores within it the
476 ** pointers to rtx's which are its arguments.
481 gen_rtvec
VPARAMS ((int n
, ...))
483 #ifndef ANSI_PROTOTYPES
492 #ifndef ANSI_PROTOTYPES
497 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
499 vector
= (rtx
*) alloca (n
* sizeof (rtx
));
501 for (i
= 0; i
< n
; i
++)
502 vector
[i
] = va_arg (p
, rtx
);
505 return gen_rtvec_v (n
, vector
);
509 gen_rtvec_v (n
, argp
)
514 register rtvec rt_val
;
517 return NULL_RTVEC
; /* Don't allocate an empty rtvec... */
519 rt_val
= rtvec_alloc (n
); /* Allocate an rtvec... */
521 for (i
= 0; i
< n
; i
++)
522 rt_val
->elem
[i
] = *argp
++;
528 /* Generate a REG rtx for a new pseudo register of mode MODE.
529 This pseudo is assigned the next sequential register number. */
533 enum machine_mode mode
;
535 struct function
*f
= cfun
;
538 /* Don't let anything called after initial flow analysis create new
543 if (generating_concat_p
544 && (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
545 || GET_MODE_CLASS (mode
) == MODE_COMPLEX_INT
))
547 /* For complex modes, don't make a single pseudo.
548 Instead, make a CONCAT of two pseudos.
549 This allows noncontiguous allocation of the real and imaginary parts,
550 which makes much better code. Besides, allocating DCmode
551 pseudos overstrains reload on some machines like the 386. */
552 rtx realpart
, imagpart
;
553 int size
= GET_MODE_UNIT_SIZE (mode
);
554 enum machine_mode partmode
555 = mode_for_size (size
* BITS_PER_UNIT
,
556 (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
557 ? MODE_FLOAT
: MODE_INT
),
560 realpart
= gen_reg_rtx (partmode
);
561 imagpart
= gen_reg_rtx (partmode
);
562 return gen_rtx_CONCAT (mode
, realpart
, imagpart
);
565 /* Make sure regno_pointer_align and regno_reg_rtx are large enough
566 to have an element for this pseudo reg number. */
568 if (reg_rtx_no
== f
->emit
->regno_pointer_align_length
)
570 int old_size
= f
->emit
->regno_pointer_align_length
;
573 new = xrealloc (f
->emit
->regno_pointer_align
, old_size
* 2);
574 memset (new + old_size
, 0, old_size
);
575 f
->emit
->regno_pointer_align
= (unsigned char *) new;
577 new1
= (rtx
*) xrealloc (f
->emit
->x_regno_reg_rtx
,
578 old_size
* 2 * sizeof (rtx
));
579 memset (new1
+ old_size
, 0, old_size
* sizeof (rtx
));
580 regno_reg_rtx
= new1
;
582 f
->emit
->regno_pointer_align_length
= old_size
* 2;
585 val
= gen_raw_REG (mode
, reg_rtx_no
);
586 regno_reg_rtx
[reg_rtx_no
++] = val
;
590 /* Identify REG (which may be a CONCAT) as a user register. */
596 if (GET_CODE (reg
) == CONCAT
)
598 REG_USERVAR_P (XEXP (reg
, 0)) = 1;
599 REG_USERVAR_P (XEXP (reg
, 1)) = 1;
601 else if (GET_CODE (reg
) == REG
)
602 REG_USERVAR_P (reg
) = 1;
607 /* Identify REG as a probable pointer register and show its alignment
608 as ALIGN, if nonzero. */
611 mark_reg_pointer (reg
, align
)
615 if (! REG_POINTER (reg
))
617 REG_POINTER (reg
) = 1;
620 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
622 else if (align
&& align
< REGNO_POINTER_ALIGN (REGNO (reg
)))
623 /* We can no-longer be sure just how aligned this pointer is */
624 REGNO_POINTER_ALIGN (REGNO (reg
)) = align
;
627 /* Return 1 plus largest pseudo reg number used in the current function. */
635 /* Return 1 + the largest label number used so far in the current function. */
640 if (last_label_num
&& label_num
== base_label_num
)
641 return last_label_num
;
645 /* Return first label number used in this function (if any were used). */
648 get_first_label_num ()
650 return first_label_num
;
653 /* Return a value representing some low-order bits of X, where the number
654 of low-order bits is given by MODE. Note that no conversion is done
655 between floating-point and fixed-point values, rather, the bit
656 representation is returned.
658 This function handles the cases in common between gen_lowpart, below,
659 and two variants in cse.c and combine.c. These are the cases that can
660 be safely handled at all points in the compilation.
662 If this is not a case we can handle, return 0. */
665 gen_lowpart_common (mode
, x
)
666 enum machine_mode mode
;
671 if (GET_MODE (x
) == mode
)
674 /* MODE must occupy no more words than the mode of X. */
675 if (GET_MODE (x
) != VOIDmode
676 && ((GET_MODE_SIZE (mode
) + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
677 > ((GET_MODE_SIZE (GET_MODE (x
)) + (UNITS_PER_WORD
- 1))
681 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
)
682 word
= ((GET_MODE_SIZE (GET_MODE (x
))
683 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
686 if ((GET_CODE (x
) == ZERO_EXTEND
|| GET_CODE (x
) == SIGN_EXTEND
)
687 && (GET_MODE_CLASS (mode
) == MODE_INT
688 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
))
690 /* If we are getting the low-order part of something that has been
691 sign- or zero-extended, we can either just use the object being
692 extended or make a narrower extension. If we want an even smaller
693 piece than the size of the object being extended, call ourselves
696 This case is used mostly by combine and cse. */
698 if (GET_MODE (XEXP (x
, 0)) == mode
)
700 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (XEXP (x
, 0))))
701 return gen_lowpart_common (mode
, XEXP (x
, 0));
702 else if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (GET_MODE (x
)))
703 return gen_rtx_fmt_e (GET_CODE (x
), mode
, XEXP (x
, 0));
705 else if (GET_CODE (x
) == SUBREG
706 && (GET_MODE_SIZE (mode
) <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
707 || GET_MODE_SIZE (mode
) <= UNITS_PER_WORD
708 || GET_MODE_SIZE (mode
) == GET_MODE_UNIT_SIZE (GET_MODE (x
))))
709 return (GET_MODE (SUBREG_REG (x
)) == mode
&& SUBREG_WORD (x
) == 0
711 : gen_rtx_SUBREG (mode
, SUBREG_REG (x
), SUBREG_WORD (x
) + word
));
712 else if (GET_CODE (x
) == REG
)
714 /* Let the backend decide how many registers to skip. This is needed
715 in particular for Sparc64 where fp regs are smaller than a word. */
716 /* ??? Note that subregs are now ambiguous, in that those against
717 pseudos are sized by the Word Size, while those against hard
718 regs are sized by the underlying register size. Better would be
719 to always interpret the subreg offset parameter as bytes or bits. */
721 if (WORDS_BIG_ENDIAN
&& REGNO (x
) < FIRST_PSEUDO_REGISTER
722 && GET_MODE_SIZE (GET_MODE (x
)) > GET_MODE_SIZE (mode
))
723 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
724 - HARD_REGNO_NREGS (REGNO (x
), mode
));
726 /* If the register is not valid for MODE, return 0. If we don't
727 do this, there is no way to fix up the resulting REG later.
728 But we do do this if the current REG is not valid for its
729 mode. This latter is a kludge, but is required due to the
730 way that parameters are passed on some machines, most
732 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
733 && ! HARD_REGNO_MODE_OK (REGNO (x
) + word
, mode
)
734 && HARD_REGNO_MODE_OK (REGNO (x
), GET_MODE (x
)))
736 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
737 /* integrate.c can't handle parts of a return value register. */
738 && (! REG_FUNCTION_VALUE_P (x
)
739 || ! rtx_equal_function_value_matters
)
740 #ifdef CLASS_CANNOT_CHANGE_MODE
741 && ! (CLASS_CANNOT_CHANGE_MODE_P (mode
, GET_MODE (x
))
742 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_INT
743 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_COMPLEX_FLOAT
744 && (TEST_HARD_REG_BIT
745 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
748 /* We want to keep the stack, frame, and arg pointers
750 && x
!= frame_pointer_rtx
751 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
752 && x
!= arg_pointer_rtx
754 && x
!= stack_pointer_rtx
)
755 return gen_rtx_REG (mode
, REGNO (x
) + word
);
757 return gen_rtx_SUBREG (mode
, x
, word
);
759 /* If X is a CONST_INT or a CONST_DOUBLE, extract the appropriate bits
760 from the low-order part of the constant. */
761 else if ((GET_MODE_CLASS (mode
) == MODE_INT
762 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
763 && GET_MODE (x
) == VOIDmode
764 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
))
766 /* If MODE is twice the host word size, X is already the desired
767 representation. Otherwise, if MODE is wider than a word, we can't
768 do this. If MODE is exactly a word, return just one CONST_INT. */
770 if (GET_MODE_BITSIZE (mode
) >= 2 * HOST_BITS_PER_WIDE_INT
)
772 else if (GET_MODE_BITSIZE (mode
) > HOST_BITS_PER_WIDE_INT
)
774 else if (GET_MODE_BITSIZE (mode
) == HOST_BITS_PER_WIDE_INT
)
775 return (GET_CODE (x
) == CONST_INT
? x
776 : GEN_INT (CONST_DOUBLE_LOW (x
)));
779 /* MODE must be narrower than HOST_BITS_PER_WIDE_INT. */
780 HOST_WIDE_INT val
= (GET_CODE (x
) == CONST_INT
? INTVAL (x
)
781 : CONST_DOUBLE_LOW (x
));
783 /* Sign extend to HOST_WIDE_INT. */
784 val
= trunc_int_for_mode (val
, mode
);
786 return (GET_CODE (x
) == CONST_INT
&& INTVAL (x
) == val
? x
791 #ifndef REAL_ARITHMETIC
792 /* If X is an integral constant but we want it in floating-point, it
793 must be the case that we have a union of an integer and a floating-point
794 value. If the machine-parameters allow it, simulate that union here
795 and return the result. The two-word and single-word cases are
798 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
799 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
800 || flag_pretend_float
)
801 && GET_MODE_CLASS (mode
) == MODE_FLOAT
802 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
803 && GET_CODE (x
) == CONST_INT
804 && sizeof (float) * HOST_BITS_PER_CHAR
== HOST_BITS_PER_WIDE_INT
)
806 union {HOST_WIDE_INT i
; float d
; } u
;
809 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
811 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
812 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
813 || flag_pretend_float
)
814 && GET_MODE_CLASS (mode
) == MODE_FLOAT
815 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
816 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
817 && GET_MODE (x
) == VOIDmode
818 && (sizeof (double) * HOST_BITS_PER_CHAR
819 == 2 * HOST_BITS_PER_WIDE_INT
))
821 union {HOST_WIDE_INT i
[2]; double d
; } u
;
822 HOST_WIDE_INT low
, high
;
824 if (GET_CODE (x
) == CONST_INT
)
825 low
= INTVAL (x
), high
= low
>> (HOST_BITS_PER_WIDE_INT
-1);
827 low
= CONST_DOUBLE_LOW (x
), high
= CONST_DOUBLE_HIGH (x
);
829 #ifdef HOST_WORDS_BIG_ENDIAN
830 u
.i
[0] = high
, u
.i
[1] = low
;
832 u
.i
[0] = low
, u
.i
[1] = high
;
835 return CONST_DOUBLE_FROM_REAL_VALUE (u
.d
, mode
);
838 /* Similarly, if this is converting a floating-point value into a
839 single-word integer. Only do this is the host and target parameters are
842 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
843 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
844 || flag_pretend_float
)
845 && (GET_MODE_CLASS (mode
) == MODE_INT
846 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
847 && GET_CODE (x
) == CONST_DOUBLE
848 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
849 && GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
)
850 return operand_subword (x
, word
, 0, GET_MODE (x
));
852 /* Similarly, if this is converting a floating-point value into a
853 two-word integer, we can do this one word at a time and make an
854 integer. Only do this is the host and target parameters are
857 else if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
858 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
859 || flag_pretend_float
)
860 && (GET_MODE_CLASS (mode
) == MODE_INT
861 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
862 && GET_CODE (x
) == CONST_DOUBLE
863 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
864 && GET_MODE_BITSIZE (mode
) == 2 * BITS_PER_WORD
)
867 = operand_subword (x
, word
+ WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
869 = operand_subword (x
, word
+ ! WORDS_BIG_ENDIAN
, 0, GET_MODE (x
));
871 if (lowpart
&& GET_CODE (lowpart
) == CONST_INT
872 && highpart
&& GET_CODE (highpart
) == CONST_INT
)
873 return immed_double_const (INTVAL (lowpart
), INTVAL (highpart
), mode
);
875 #else /* ifndef REAL_ARITHMETIC */
877 /* When we have a FP emulator, we can handle all conversions between
878 FP and integer operands. This simplifies reload because it
879 doesn't have to deal with constructs like (subreg:DI
880 (const_double:SF ...)) or (subreg:DF (const_int ...)). */
882 else if (mode
== SFmode
883 && GET_CODE (x
) == CONST_INT
)
889 r
= REAL_VALUE_FROM_TARGET_SINGLE (i
);
890 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
892 else if (mode
== DFmode
893 && (GET_CODE (x
) == CONST_INT
|| GET_CODE (x
) == CONST_DOUBLE
)
894 && GET_MODE (x
) == VOIDmode
)
898 HOST_WIDE_INT low
, high
;
900 if (GET_CODE (x
) == CONST_INT
)
903 high
= low
>> (HOST_BITS_PER_WIDE_INT
- 1);
907 low
= CONST_DOUBLE_LOW (x
);
908 high
= CONST_DOUBLE_HIGH (x
);
911 /* REAL_VALUE_TARGET_DOUBLE takes the addressing order of the
913 if (WORDS_BIG_ENDIAN
)
914 i
[0] = high
, i
[1] = low
;
916 i
[0] = low
, i
[1] = high
;
918 r
= REAL_VALUE_FROM_TARGET_DOUBLE (i
);
919 return CONST_DOUBLE_FROM_REAL_VALUE (r
, mode
);
921 else if ((GET_MODE_CLASS (mode
) == MODE_INT
922 || GET_MODE_CLASS (mode
) == MODE_PARTIAL_INT
)
923 && GET_CODE (x
) == CONST_DOUBLE
924 && GET_MODE_CLASS (GET_MODE (x
)) == MODE_FLOAT
)
927 long i
[4]; /* Only the low 32 bits of each 'long' are used. */
928 int endian
= WORDS_BIG_ENDIAN
? 1 : 0;
930 REAL_VALUE_FROM_CONST_DOUBLE (r
, x
);
931 switch (GET_MODE (x
))
934 REAL_VALUE_TO_TARGET_SINGLE (r
, i
[endian
]);
938 REAL_VALUE_TO_TARGET_DOUBLE (r
, i
);
940 #if LONG_DOUBLE_TYPE_SIZE == 96
942 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
+ endian
);
946 REAL_VALUE_TO_TARGET_LONG_DOUBLE (r
, i
);
953 /* Now, pack the 32-bit elements of the array into a CONST_DOUBLE
955 #if HOST_BITS_PER_WIDE_INT == 32
956 return immed_double_const (i
[endian
], i
[1 - endian
], mode
);
961 if (HOST_BITS_PER_WIDE_INT
!= 64)
964 for (c
= 0; c
< 4; c
++)
967 switch (GET_MODE (x
))
971 return immed_double_const (((unsigned long) i
[endian
]) |
972 (((HOST_WIDE_INT
) i
[1-endian
]) << 32),
975 return immed_double_const (((unsigned long) i
[endian
*3]) |
976 (((HOST_WIDE_INT
) i
[1+endian
]) << 32),
977 ((unsigned long) i
[2-endian
]) |
978 (((HOST_WIDE_INT
) i
[3-endian
*3]) << 32),
984 #endif /* ifndef REAL_ARITHMETIC */
986 /* Otherwise, we can't do this. */
990 /* Return the real part (which has mode MODE) of a complex value X.
991 This always comes at the low address in memory. */
994 gen_realpart (mode
, x
)
995 enum machine_mode mode
;
998 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
1000 else if (WORDS_BIG_ENDIAN
1001 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1003 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1005 ("Can't access real part of complex value in hard register");
1006 else if (WORDS_BIG_ENDIAN
)
1007 return gen_highpart (mode
, x
);
1009 return gen_lowpart (mode
, x
);
1012 /* Return the imaginary part (which has mode MODE) of a complex value X.
1013 This always comes at the high address in memory. */
1016 gen_imagpart (mode
, x
)
1017 enum machine_mode mode
;
1020 if (GET_CODE (x
) == CONCAT
&& GET_MODE (XEXP (x
, 0)) == mode
)
1022 else if (WORDS_BIG_ENDIAN
)
1023 return gen_lowpart (mode
, x
);
1024 else if (!WORDS_BIG_ENDIAN
1025 && GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
1027 && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1029 ("can't access imaginary part of complex value in hard register");
1031 return gen_highpart (mode
, x
);
1034 /* Return 1 iff X, assumed to be a SUBREG,
1035 refers to the real part of the complex value in its containing reg.
1036 Complex values are always stored with the real part in the first word,
1037 regardless of WORDS_BIG_ENDIAN. */
1040 subreg_realpart_p (x
)
1043 if (GET_CODE (x
) != SUBREG
)
1046 return ((unsigned int) SUBREG_WORD (x
) * UNITS_PER_WORD
1047 < GET_MODE_UNIT_SIZE (GET_MODE (SUBREG_REG (x
))));
1050 /* Assuming that X is an rtx (e.g., MEM, REG or SUBREG) for a value,
1051 return an rtx (MEM, SUBREG, or CONST_INT) that refers to the
1052 least-significant part of X.
1053 MODE specifies how big a part of X to return;
1054 it usually should not be larger than a word.
1055 If X is a MEM whose address is a QUEUED, the value may be so also. */
1058 gen_lowpart (mode
, x
)
1059 enum machine_mode mode
;
1062 rtx result
= gen_lowpart_common (mode
, x
);
1066 else if (GET_CODE (x
) == REG
)
1068 /* Must be a hard reg that's not valid in MODE. */
1069 result
= gen_lowpart_common (mode
, copy_to_reg (x
));
1074 else if (GET_CODE (x
) == MEM
)
1076 /* The only additional case we can do is MEM. */
1077 register int offset
= 0;
1078 if (WORDS_BIG_ENDIAN
)
1079 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1080 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1082 if (BYTES_BIG_ENDIAN
)
1083 /* Adjust the address so that the address-after-the-data
1085 offset
-= (MIN (UNITS_PER_WORD
, GET_MODE_SIZE (mode
))
1086 - MIN (UNITS_PER_WORD
, GET_MODE_SIZE (GET_MODE (x
))));
1088 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1090 else if (GET_CODE (x
) == ADDRESSOF
)
1091 return gen_lowpart (mode
, force_reg (GET_MODE (x
), x
));
1096 /* Like `gen_lowpart', but refer to the most significant part.
1097 This is used to access the imaginary part of a complex number. */
1100 gen_highpart (mode
, x
)
1101 enum machine_mode mode
;
1104 /* This case loses if X is a subreg. To catch bugs early,
1105 complain if an invalid MODE is used even in other cases. */
1106 if (GET_MODE_SIZE (mode
) > UNITS_PER_WORD
1107 && GET_MODE_SIZE (mode
) != GET_MODE_UNIT_SIZE (GET_MODE (x
)))
1109 if (GET_CODE (x
) == CONST_DOUBLE
1110 #if !(TARGET_FLOAT_FORMAT != HOST_FLOAT_FORMAT || defined (REAL_IS_NOT_DOUBLE))
1111 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_FLOAT
1114 return GEN_INT (CONST_DOUBLE_HIGH (x
) & GET_MODE_MASK (mode
));
1115 else if (GET_CODE (x
) == CONST_INT
)
1117 if (HOST_BITS_PER_WIDE_INT
<= BITS_PER_WORD
)
1119 return GEN_INT (INTVAL (x
) >> (HOST_BITS_PER_WIDE_INT
- BITS_PER_WORD
));
1121 else if (GET_CODE (x
) == MEM
)
1123 register int offset
= 0;
1124 if (! WORDS_BIG_ENDIAN
)
1125 offset
= (MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
)
1126 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
));
1128 if (! BYTES_BIG_ENDIAN
1129 && GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
1130 offset
-= (GET_MODE_SIZE (mode
)
1131 - MIN (UNITS_PER_WORD
,
1132 GET_MODE_SIZE (GET_MODE (x
))));
1134 return change_address (x
, mode
, plus_constant (XEXP (x
, 0), offset
));
1136 else if (GET_CODE (x
) == SUBREG
)
1138 /* The only time this should occur is when we are looking at a
1139 multi-word item with a SUBREG whose mode is the same as that of the
1140 item. It isn't clear what we would do if it wasn't. */
1141 if (SUBREG_WORD (x
) != 0)
1143 return gen_highpart (mode
, SUBREG_REG (x
));
1145 else if (GET_CODE (x
) == REG
)
1149 /* Let the backend decide how many registers to skip. This is needed
1150 in particular for sparc64 where fp regs are smaller than a word. */
1151 /* ??? Note that subregs are now ambiguous, in that those against
1152 pseudos are sized by the word size, while those against hard
1153 regs are sized by the underlying register size. Better would be
1154 to always interpret the subreg offset parameter as bytes or bits. */
1156 if (GET_MODE_SIZE (GET_MODE (x
)) < GET_MODE_SIZE (mode
))
1158 else if (WORDS_BIG_ENDIAN
)
1160 else if (REGNO (x
) < FIRST_PSEUDO_REGISTER
)
1161 word
= (HARD_REGNO_NREGS (REGNO (x
), GET_MODE (x
))
1162 - HARD_REGNO_NREGS (REGNO (x
), mode
));
1164 word
= ((GET_MODE_SIZE (GET_MODE (x
))
1165 - MAX (GET_MODE_SIZE (mode
), UNITS_PER_WORD
))
1168 if (REGNO (x
) < FIRST_PSEUDO_REGISTER
1169 /* integrate.c can't handle parts of a return value register. */
1170 && (! REG_FUNCTION_VALUE_P (x
)
1171 || ! rtx_equal_function_value_matters
)
1172 /* We want to keep the stack, frame, and arg pointers special. */
1173 && x
!= frame_pointer_rtx
1174 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1175 && x
!= arg_pointer_rtx
1177 && x
!= stack_pointer_rtx
)
1178 return gen_rtx_REG (mode
, REGNO (x
) + word
);
1180 return gen_rtx_SUBREG (mode
, x
, word
);
1186 /* Return 1 iff X, assumed to be a SUBREG,
1187 refers to the least significant part of its containing reg.
1188 If X is not a SUBREG, always return 1 (it is its own low part!). */
1191 subreg_lowpart_p (x
)
1194 if (GET_CODE (x
) != SUBREG
)
1196 else if (GET_MODE (SUBREG_REG (x
)) == VOIDmode
)
1199 if (WORDS_BIG_ENDIAN
1200 && GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))) > UNITS_PER_WORD
)
1201 return (SUBREG_WORD (x
)
1202 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))
1203 - MAX (GET_MODE_SIZE (GET_MODE (x
)), UNITS_PER_WORD
))
1206 return SUBREG_WORD (x
) == 0;
1209 /* Return subword I of operand OP.
1210 The word number, I, is interpreted as the word number starting at the
1211 low-order address. Word 0 is the low-order word if not WORDS_BIG_ENDIAN,
1212 otherwise it is the high-order word.
1214 If we cannot extract the required word, we return zero. Otherwise, an
1215 rtx corresponding to the requested word will be returned.
1217 VALIDATE_ADDRESS is nonzero if the address should be validated. Before
1218 reload has completed, a valid address will always be returned. After
1219 reload, if a valid address cannot be returned, we return zero.
1221 If VALIDATE_ADDRESS is zero, we simply form the required address; validating
1222 it is the responsibility of the caller.
1224 MODE is the mode of OP in case it is a CONST_INT. */
1227 operand_subword (op
, i
, validate_address
, mode
)
1230 int validate_address
;
1231 enum machine_mode mode
;
1234 int size_ratio
= HOST_BITS_PER_WIDE_INT
/ BITS_PER_WORD
;
1236 if (mode
== VOIDmode
)
1237 mode
= GET_MODE (op
);
1239 if (mode
== VOIDmode
)
1242 /* If OP is narrower than a word, fail. */
1244 && (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
))
1247 /* If we want a word outside OP, return zero. */
1249 && (i
+ 1) * UNITS_PER_WORD
> GET_MODE_SIZE (mode
))
1252 /* If OP is already an integer word, return it. */
1253 if (GET_MODE_CLASS (mode
) == MODE_INT
1254 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
)
1257 /* If OP is a REG or SUBREG, we can handle it very simply. */
1258 if (GET_CODE (op
) == REG
)
1260 /* ??? There is a potential problem with this code. It does not
1261 properly handle extractions of a subword from a hard register
1262 that is larger than word_mode. Presumably the check for
1263 HARD_REGNO_MODE_OK catches these most of these cases. */
1265 /* If OP is a hard register, but OP + I is not a hard register,
1266 then extracting a subword is impossible.
1268 For example, consider if OP is the last hard register and it is
1269 larger than word_mode. If we wanted word N (for N > 0) because a
1270 part of that hard register was known to contain a useful value,
1271 then OP + I would refer to a pseudo, not the hard register we
1273 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1274 && REGNO (op
) + i
>= FIRST_PSEUDO_REGISTER
)
1277 /* If the register is not valid for MODE, return 0. Note we
1278 have to check both OP and OP + I since they may refer to
1279 different parts of the register file.
1281 Consider if OP refers to the last 96bit FP register and we want
1282 subword 3 because that subword is known to contain a value we
1284 if (REGNO (op
) < FIRST_PSEUDO_REGISTER
1285 && (! HARD_REGNO_MODE_OK (REGNO (op
), word_mode
)
1286 || ! HARD_REGNO_MODE_OK (REGNO (op
) + i
, word_mode
)))
1288 else if (REGNO (op
) >= FIRST_PSEUDO_REGISTER
1289 || (REG_FUNCTION_VALUE_P (op
)
1290 && rtx_equal_function_value_matters
)
1291 /* We want to keep the stack, frame, and arg pointers
1293 || op
== frame_pointer_rtx
1294 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
1295 || op
== arg_pointer_rtx
1297 || op
== stack_pointer_rtx
)
1298 return gen_rtx_SUBREG (word_mode
, op
, i
);
1300 return gen_rtx_REG (word_mode
, REGNO (op
) + i
);
1302 else if (GET_CODE (op
) == SUBREG
)
1303 return gen_rtx_SUBREG (word_mode
, SUBREG_REG (op
), i
+ SUBREG_WORD (op
));
1304 else if (GET_CODE (op
) == CONCAT
)
1306 unsigned int partwords
1307 = GET_MODE_UNIT_SIZE (GET_MODE (op
)) / UNITS_PER_WORD
;
1310 return operand_subword (XEXP (op
, 0), i
, validate_address
, mode
);
1311 return operand_subword (XEXP (op
, 1), i
- partwords
,
1312 validate_address
, mode
);
1315 /* Form a new MEM at the requested address. */
1316 if (GET_CODE (op
) == MEM
)
1318 rtx addr
= plus_constant (XEXP (op
, 0), i
* UNITS_PER_WORD
);
1321 if (validate_address
)
1323 if (reload_completed
)
1325 if (! strict_memory_address_p (word_mode
, addr
))
1329 addr
= memory_address (word_mode
, addr
);
1332 new = gen_rtx_MEM (word_mode
, addr
);
1333 MEM_COPY_ATTRIBUTES (new, op
);
1337 /* The only remaining cases are when OP is a constant. If the host and
1338 target floating formats are the same, handling two-word floating
1339 constants are easy. Note that REAL_VALUE_TO_TARGET_{SINGLE,DOUBLE}
1340 are defined as returning one or two 32 bit values, respectively,
1341 and not values of BITS_PER_WORD bits. */
1342 #ifdef REAL_ARITHMETIC
1343 /* The output is some bits, the width of the target machine's word.
1344 A wider-word host can surely hold them in a CONST_INT. A narrower-word
1346 if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1347 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1348 && GET_MODE_BITSIZE (mode
) == 64
1349 && GET_CODE (op
) == CONST_DOUBLE
)
1354 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1355 REAL_VALUE_TO_TARGET_DOUBLE (rv
, k
);
1357 /* We handle 32-bit and >= 64-bit words here. Note that the order in
1358 which the words are written depends on the word endianness.
1359 ??? This is a potential portability problem and should
1360 be fixed at some point.
1362 We must excercise caution with the sign bit. By definition there
1363 are 32 significant bits in K; there may be more in a HOST_WIDE_INT.
1364 Consider a host with a 32-bit long and a 64-bit HOST_WIDE_INT.
1365 So we explicitly mask and sign-extend as necessary. */
1366 if (BITS_PER_WORD
== 32)
1369 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1370 return GEN_INT (val
);
1372 #if HOST_BITS_PER_WIDE_INT >= 64
1373 else if (BITS_PER_WORD
>= 64 && i
== 0)
1375 val
= k
[! WORDS_BIG_ENDIAN
];
1376 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1377 val
|= (HOST_WIDE_INT
) k
[WORDS_BIG_ENDIAN
] & 0xffffffff;
1378 return GEN_INT (val
);
1381 else if (BITS_PER_WORD
== 16)
1384 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1387 return GEN_INT (val
);
1392 else if (HOST_BITS_PER_WIDE_INT
>= BITS_PER_WORD
1393 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1394 && GET_MODE_BITSIZE (mode
) > 64
1395 && GET_CODE (op
) == CONST_DOUBLE
)
1400 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1401 REAL_VALUE_TO_TARGET_LONG_DOUBLE (rv
, k
);
1403 if (BITS_PER_WORD
== 32)
1406 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1407 return GEN_INT (val
);
1409 #if HOST_BITS_PER_WIDE_INT >= 64
1410 else if (BITS_PER_WORD
>= 64 && i
<= 1)
1412 val
= k
[i
*2 + ! WORDS_BIG_ENDIAN
];
1413 val
= (((val
& 0xffffffff) ^ 0x80000000) - 0x80000000) << 32;
1414 val
|= (HOST_WIDE_INT
) k
[i
*2 + WORDS_BIG_ENDIAN
] & 0xffffffff;
1415 return GEN_INT (val
);
1421 #else /* no REAL_ARITHMETIC */
1422 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1423 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1424 || flag_pretend_float
)
1425 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1426 && GET_MODE_SIZE (mode
) == 2 * UNITS_PER_WORD
1427 && GET_CODE (op
) == CONST_DOUBLE
)
1429 /* The constant is stored in the host's word-ordering,
1430 but we want to access it in the target's word-ordering. Some
1431 compilers don't like a conditional inside macro args, so we have two
1432 copies of the return. */
1433 #ifdef HOST_WORDS_BIG_ENDIAN
1434 return GEN_INT (i
== WORDS_BIG_ENDIAN
1435 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1437 return GEN_INT (i
!= WORDS_BIG_ENDIAN
1438 ? CONST_DOUBLE_HIGH (op
) : CONST_DOUBLE_LOW (op
));
1441 #endif /* no REAL_ARITHMETIC */
1443 /* Single word float is a little harder, since single- and double-word
1444 values often do not have the same high-order bits. We have already
1445 verified that we want the only defined word of the single-word value. */
1446 #ifdef REAL_ARITHMETIC
1447 if (GET_MODE_CLASS (mode
) == MODE_FLOAT
1448 && GET_MODE_BITSIZE (mode
) == 32
1449 && GET_CODE (op
) == CONST_DOUBLE
)
1454 REAL_VALUE_FROM_CONST_DOUBLE (rv
, op
);
1455 REAL_VALUE_TO_TARGET_SINGLE (rv
, l
);
1457 /* Sign extend from known 32-bit value to HOST_WIDE_INT. */
1459 val
= ((val
& 0xffffffff) ^ 0x80000000) - 0x80000000;
1461 if (BITS_PER_WORD
== 16)
1463 if ((i
& 1) == !WORDS_BIG_ENDIAN
)
1468 return GEN_INT (val
);
1471 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1472 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1473 || flag_pretend_float
)
1474 && sizeof (float) * 8 == HOST_BITS_PER_WIDE_INT
1475 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1476 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1477 && GET_CODE (op
) == CONST_DOUBLE
)
1480 union {float f
; HOST_WIDE_INT i
; } u
;
1482 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1485 return GEN_INT (u
.i
);
1487 if (((HOST_FLOAT_FORMAT
== TARGET_FLOAT_FORMAT
1488 && HOST_BITS_PER_WIDE_INT
== BITS_PER_WORD
)
1489 || flag_pretend_float
)
1490 && sizeof (double) * 8 == HOST_BITS_PER_WIDE_INT
1491 && GET_MODE_CLASS (mode
) == MODE_FLOAT
1492 && GET_MODE_SIZE (mode
) == UNITS_PER_WORD
1493 && GET_CODE (op
) == CONST_DOUBLE
)
1496 union {double d
; HOST_WIDE_INT i
; } u
;
1498 REAL_VALUE_FROM_CONST_DOUBLE (d
, op
);
1501 return GEN_INT (u
.i
);
1503 #endif /* no REAL_ARITHMETIC */
1505 /* The only remaining cases that we can handle are integers.
1506 Convert to proper endianness now since these cases need it.
1507 At this point, i == 0 means the low-order word.
1509 We do not want to handle the case when BITS_PER_WORD <= HOST_BITS_PER_INT
1510 in general. However, if OP is (const_int 0), we can just return
1513 if (op
== const0_rtx
)
1516 if (GET_MODE_CLASS (mode
) != MODE_INT
1517 || (GET_CODE (op
) != CONST_INT
&& GET_CODE (op
) != CONST_DOUBLE
)
1518 || BITS_PER_WORD
> HOST_BITS_PER_WIDE_INT
)
1521 if (WORDS_BIG_ENDIAN
)
1522 i
= GET_MODE_SIZE (mode
) / UNITS_PER_WORD
- 1 - i
;
1524 /* Find out which word on the host machine this value is in and get
1525 it from the constant. */
1526 val
= (i
/ size_ratio
== 0
1527 ? (GET_CODE (op
) == CONST_INT
? INTVAL (op
) : CONST_DOUBLE_LOW (op
))
1528 : (GET_CODE (op
) == CONST_INT
1529 ? (INTVAL (op
) < 0 ? ~0 : 0) : CONST_DOUBLE_HIGH (op
)));
1531 /* Get the value we want into the low bits of val. */
1532 if (BITS_PER_WORD
< HOST_BITS_PER_WIDE_INT
)
1533 val
= ((val
>> ((i
% size_ratio
) * BITS_PER_WORD
)));
1535 val
= trunc_int_for_mode (val
, word_mode
);
1537 return GEN_INT (val
);
1540 /* Similar to `operand_subword', but never return 0. If we can't extract
1541 the required subword, put OP into a register and try again. If that fails,
1542 abort. We always validate the address in this case. It is not valid
1543 to call this function after reload; it is mostly meant for RTL
1546 MODE is the mode of OP, in case it is CONST_INT. */
1549 operand_subword_force (op
, i
, mode
)
1552 enum machine_mode mode
;
1554 rtx result
= operand_subword (op
, i
, 1, mode
);
1559 if (mode
!= BLKmode
&& mode
!= VOIDmode
)
1561 /* If this is a register which can not be accessed by words, copy it
1562 to a pseudo register. */
1563 if (GET_CODE (op
) == REG
)
1564 op
= copy_to_reg (op
);
1566 op
= force_reg (mode
, op
);
1569 result
= operand_subword (op
, i
, 1, mode
);
1576 /* Given a compare instruction, swap the operands.
1577 A test instruction is changed into a compare of 0 against the operand. */
1580 reverse_comparison (insn
)
1583 rtx body
= PATTERN (insn
);
1586 if (GET_CODE (body
) == SET
)
1587 comp
= SET_SRC (body
);
1589 comp
= SET_SRC (XVECEXP (body
, 0, 0));
1591 if (GET_CODE (comp
) == COMPARE
)
1593 rtx op0
= XEXP (comp
, 0);
1594 rtx op1
= XEXP (comp
, 1);
1595 XEXP (comp
, 0) = op1
;
1596 XEXP (comp
, 1) = op0
;
1600 rtx
new = gen_rtx_COMPARE (VOIDmode
,
1601 CONST0_RTX (GET_MODE (comp
)), comp
);
1602 if (GET_CODE (body
) == SET
)
1603 SET_SRC (body
) = new;
1605 SET_SRC (XVECEXP (body
, 0, 0)) = new;
1609 /* Return a memory reference like MEMREF, but with its mode changed
1610 to MODE and its address changed to ADDR.
1611 (VOIDmode means don't change the mode.
1612 NULL for ADDR means don't change the address.) */
1615 change_address (memref
, mode
, addr
)
1617 enum machine_mode mode
;
1622 if (GET_CODE (memref
) != MEM
)
1624 if (mode
== VOIDmode
)
1625 mode
= GET_MODE (memref
);
1627 addr
= XEXP (memref
, 0);
1629 /* If reload is in progress or has completed, ADDR must be valid.
1630 Otherwise, we can call memory_address to make it valid. */
1631 if (reload_completed
|| reload_in_progress
)
1633 if (! memory_address_p (mode
, addr
))
1637 addr
= memory_address (mode
, addr
);
1639 if (rtx_equal_p (addr
, XEXP (memref
, 0)) && mode
== GET_MODE (memref
))
1642 new = gen_rtx_MEM (mode
, addr
);
1643 MEM_COPY_ATTRIBUTES (new, memref
);
1647 /* Return a newly created CODE_LABEL rtx with a unique label number. */
1654 label
= gen_rtx_CODE_LABEL (VOIDmode
, 0, NULL_RTX
,
1655 NULL_RTX
, label_num
++, NULL_PTR
, NULL_PTR
);
1657 LABEL_NUSES (label
) = 0;
1658 LABEL_ALTERNATE_NAME (label
) = NULL
;
1662 /* For procedure integration. */
1664 /* Install new pointers to the first and last insns in the chain.
1665 Also, set cur_insn_uid to one higher than the last in use.
1666 Used for an inline-procedure after copying the insn chain. */
1669 set_new_first_and_last_insn (first
, last
)
1678 for (insn
= first
; insn
; insn
= NEXT_INSN (insn
))
1679 cur_insn_uid
= MAX (cur_insn_uid
, INSN_UID (insn
));
1684 /* Set the range of label numbers found in the current function.
1685 This is used when belatedly compiling an inline function. */
1688 set_new_first_and_last_label_num (first
, last
)
1691 base_label_num
= label_num
;
1692 first_label_num
= first
;
1693 last_label_num
= last
;
1696 /* Set the last label number found in the current function.
1697 This is used when belatedly compiling an inline function. */
1700 set_new_last_label_num (last
)
1703 base_label_num
= label_num
;
1704 last_label_num
= last
;
1707 /* Restore all variables describing the current status from the structure *P.
1708 This is used after a nested function. */
1711 restore_emit_status (p
)
1712 struct function
*p ATTRIBUTE_UNUSED
;
1715 clear_emit_caches ();
1718 /* Clear out all parts of the state in F that can safely be discarded
1719 after the function has been compiled, to let garbage collection
1720 reclaim the memory. */
1723 free_emit_status (f
)
1726 free (f
->emit
->x_regno_reg_rtx
);
1727 free (f
->emit
->regno_pointer_align
);
1732 /* Go through all the RTL insn bodies and copy any invalid shared
1733 structure. This routine should only be called once. */
1736 unshare_all_rtl (fndecl
, insn
)
1742 /* Make sure that virtual parameters are not shared. */
1743 for (decl
= DECL_ARGUMENTS (fndecl
); decl
; decl
= TREE_CHAIN (decl
))
1744 DECL_RTL (decl
) = copy_rtx_if_shared (DECL_RTL (decl
));
1746 /* Make sure that virtual stack slots are not shared. */
1747 unshare_all_decls (DECL_INITIAL (fndecl
));
1749 /* Unshare just about everything else. */
1750 unshare_all_rtl_1 (insn
);
1752 /* Make sure the addresses of stack slots found outside the insn chain
1753 (such as, in DECL_RTL of a variable) are not shared
1754 with the insn chain.
1756 This special care is necessary when the stack slot MEM does not
1757 actually appear in the insn chain. If it does appear, its address
1758 is unshared from all else at that point. */
1759 stack_slot_list
= copy_rtx_if_shared (stack_slot_list
);
1762 /* Go through all the RTL insn bodies and copy any invalid shared
1763 structure, again. This is a fairly expensive thing to do so it
1764 should be done sparingly. */
1767 unshare_all_rtl_again (insn
)
1773 for (p
= insn
; p
; p
= NEXT_INSN (p
))
1776 reset_used_flags (PATTERN (p
));
1777 reset_used_flags (REG_NOTES (p
));
1778 reset_used_flags (LOG_LINKS (p
));
1781 /* Make sure that virtual stack slots are not shared. */
1782 reset_used_decls (DECL_INITIAL (cfun
->decl
));
1784 /* Make sure that virtual parameters are not shared. */
1785 for (decl
= DECL_ARGUMENTS (cfun
->decl
); decl
; decl
= TREE_CHAIN (decl
))
1786 reset_used_flags (DECL_RTL (decl
));
1788 reset_used_flags (stack_slot_list
);
1790 unshare_all_rtl (cfun
->decl
, insn
);
1793 /* Go through all the RTL insn bodies and copy any invalid shared structure.
1794 Assumes the mark bits are cleared at entry. */
1797 unshare_all_rtl_1 (insn
)
1800 for (; insn
; insn
= NEXT_INSN (insn
))
1803 PATTERN (insn
) = copy_rtx_if_shared (PATTERN (insn
));
1804 REG_NOTES (insn
) = copy_rtx_if_shared (REG_NOTES (insn
));
1805 LOG_LINKS (insn
) = copy_rtx_if_shared (LOG_LINKS (insn
));
1809 /* Go through all virtual stack slots of a function and copy any
1810 shared structure. */
1812 unshare_all_decls (blk
)
1817 /* Copy shared decls. */
1818 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1819 DECL_RTL (t
) = copy_rtx_if_shared (DECL_RTL (t
));
1821 /* Now process sub-blocks. */
1822 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1823 unshare_all_decls (t
);
1826 /* Go through all virtual stack slots of a function and mark them as
1829 reset_used_decls (blk
)
1835 for (t
= BLOCK_VARS (blk
); t
; t
= TREE_CHAIN (t
))
1836 reset_used_flags (DECL_RTL (t
));
1838 /* Now process sub-blocks. */
1839 for (t
= BLOCK_SUBBLOCKS (blk
); t
; t
= TREE_CHAIN (t
))
1840 reset_used_decls (t
);
1843 /* Mark ORIG as in use, and return a copy of it if it was already in use.
1844 Recursively does the same for subexpressions. */
1847 copy_rtx_if_shared (orig
)
1850 register rtx x
= orig
;
1852 register enum rtx_code code
;
1853 register const char *format_ptr
;
1859 code
= GET_CODE (x
);
1861 /* These types may be freely shared. */
1874 /* SCRATCH must be shared because they represent distinct values. */
1878 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
1879 a LABEL_REF, it isn't sharable. */
1880 if (GET_CODE (XEXP (x
, 0)) == PLUS
1881 && GET_CODE (XEXP (XEXP (x
, 0), 0)) == SYMBOL_REF
1882 && GET_CODE (XEXP (XEXP (x
, 0), 1)) == CONST_INT
)
1891 /* The chain of insns is not being copied. */
1895 /* A MEM is allowed to be shared if its address is constant.
1897 We used to allow sharing of MEMs which referenced
1898 virtual_stack_vars_rtx or virtual_incoming_args_rtx, but
1899 that can lose. instantiate_virtual_regs will not unshare
1900 the MEMs, and combine may change the structure of the address
1901 because it looks safe and profitable in one context, but
1902 in some other context it creates unrecognizable RTL. */
1903 if (CONSTANT_ADDRESS_P (XEXP (x
, 0)))
1912 /* This rtx may not be shared. If it has already been seen,
1913 replace it with a copy of itself. */
1919 copy
= rtx_alloc (code
);
1921 (sizeof (*copy
) - sizeof (copy
->fld
)
1922 + sizeof (copy
->fld
[0]) * GET_RTX_LENGTH (code
)));
1928 /* Now scan the subexpressions recursively.
1929 We can store any replaced subexpressions directly into X
1930 since we know X is not shared! Any vectors in X
1931 must be copied if X was copied. */
1933 format_ptr
= GET_RTX_FORMAT (code
);
1935 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
1937 switch (*format_ptr
++)
1940 XEXP (x
, i
) = copy_rtx_if_shared (XEXP (x
, i
));
1944 if (XVEC (x
, i
) != NULL
)
1947 int len
= XVECLEN (x
, i
);
1949 if (copied
&& len
> 0)
1950 XVEC (x
, i
) = gen_rtvec_v (len
, XVEC (x
, i
)->elem
);
1951 for (j
= 0; j
< len
; j
++)
1952 XVECEXP (x
, i
, j
) = copy_rtx_if_shared (XVECEXP (x
, i
, j
));
1960 /* Clear all the USED bits in X to allow copy_rtx_if_shared to be used
1961 to look for shared sub-parts. */
1964 reset_used_flags (x
)
1968 register enum rtx_code code
;
1969 register const char *format_ptr
;
1974 code
= GET_CODE (x
);
1976 /* These types may be freely shared so we needn't do any resetting
1997 /* The chain of insns is not being copied. */
2006 format_ptr
= GET_RTX_FORMAT (code
);
2007 for (i
= 0; i
< GET_RTX_LENGTH (code
); i
++)
2009 switch (*format_ptr
++)
2012 reset_used_flags (XEXP (x
, i
));
2016 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
2017 reset_used_flags (XVECEXP (x
, i
, j
));
2023 /* Copy X if necessary so that it won't be altered by changes in OTHER.
2024 Return X or the rtx for the pseudo reg the value of X was copied into.
2025 OTHER must be valid as a SET_DEST. */
2028 make_safe_from (x
, other
)
2032 switch (GET_CODE (other
))
2035 other
= SUBREG_REG (other
);
2037 case STRICT_LOW_PART
:
2040 other
= XEXP (other
, 0);
2046 if ((GET_CODE (other
) == MEM
2048 && GET_CODE (x
) != REG
2049 && GET_CODE (x
) != SUBREG
)
2050 || (GET_CODE (other
) == REG
2051 && (REGNO (other
) < FIRST_PSEUDO_REGISTER
2052 || reg_mentioned_p (other
, x
))))
2054 rtx temp
= gen_reg_rtx (GET_MODE (x
));
2055 emit_move_insn (temp
, x
);
2061 /* Emission of insns (adding them to the doubly-linked list). */
2063 /* Return the first insn of the current sequence or current function. */
2071 /* Return the last insn emitted in current sequence or current function. */
2079 /* Specify a new insn as the last in the chain. */
2082 set_last_insn (insn
)
2085 if (NEXT_INSN (insn
) != 0)
2090 /* Return the last insn emitted, even if it is in a sequence now pushed. */
2093 get_last_insn_anywhere ()
2095 struct sequence_stack
*stack
;
2098 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
2099 if (stack
->last
!= 0)
2104 /* Return a number larger than any instruction's uid in this function. */
2109 return cur_insn_uid
;
2112 /* Renumber instructions so that no instruction UIDs are wasted. */
2115 renumber_insns (stream
)
2120 /* If we're not supposed to renumber instructions, don't. */
2121 if (!flag_renumber_insns
)
2124 /* If there aren't that many instructions, then it's not really
2125 worth renumbering them. */
2126 if (flag_renumber_insns
== 1 && get_max_uid () < 25000)
2131 for (insn
= get_insns (); insn
; insn
= NEXT_INSN (insn
))
2134 fprintf (stream
, "Renumbering insn %d to %d\n",
2135 INSN_UID (insn
), cur_insn_uid
);
2136 INSN_UID (insn
) = cur_insn_uid
++;
2140 /* Return the next insn. If it is a SEQUENCE, return the first insn
2149 insn
= NEXT_INSN (insn
);
2150 if (insn
&& GET_CODE (insn
) == INSN
2151 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2152 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2158 /* Return the previous insn. If it is a SEQUENCE, return the last insn
2162 previous_insn (insn
)
2167 insn
= PREV_INSN (insn
);
2168 if (insn
&& GET_CODE (insn
) == INSN
2169 && GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2170 insn
= XVECEXP (PATTERN (insn
), 0, XVECLEN (PATTERN (insn
), 0) - 1);
2176 /* Return the next insn after INSN that is not a NOTE. This routine does not
2177 look inside SEQUENCEs. */
2180 next_nonnote_insn (insn
)
2185 insn
= NEXT_INSN (insn
);
2186 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2193 /* Return the previous insn before INSN that is not a NOTE. This routine does
2194 not look inside SEQUENCEs. */
2197 prev_nonnote_insn (insn
)
2202 insn
= PREV_INSN (insn
);
2203 if (insn
== 0 || GET_CODE (insn
) != NOTE
)
2210 /* Return the next INSN, CALL_INSN or JUMP_INSN after INSN;
2211 or 0, if there is none. This routine does not look inside
2215 next_real_insn (insn
)
2220 insn
= NEXT_INSN (insn
);
2221 if (insn
== 0 || GET_CODE (insn
) == INSN
2222 || GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
)
2229 /* Return the last INSN, CALL_INSN or JUMP_INSN before INSN;
2230 or 0, if there is none. This routine does not look inside
2234 prev_real_insn (insn
)
2239 insn
= PREV_INSN (insn
);
2240 if (insn
== 0 || GET_CODE (insn
) == INSN
|| GET_CODE (insn
) == CALL_INSN
2241 || GET_CODE (insn
) == JUMP_INSN
)
2248 /* Find the next insn after INSN that really does something. This routine
2249 does not look inside SEQUENCEs. Until reload has completed, this is the
2250 same as next_real_insn. */
2253 active_insn_p (insn
)
2256 return (GET_CODE (insn
) == CALL_INSN
|| GET_CODE (insn
) == JUMP_INSN
2257 || (GET_CODE (insn
) == INSN
2258 && (! reload_completed
2259 || (GET_CODE (PATTERN (insn
)) != USE
2260 && GET_CODE (PATTERN (insn
)) != CLOBBER
))));
2264 next_active_insn (insn
)
2269 insn
= NEXT_INSN (insn
);
2270 if (insn
== 0 || active_insn_p (insn
))
2277 /* Find the last insn before INSN that really does something. This routine
2278 does not look inside SEQUENCEs. Until reload has completed, this is the
2279 same as prev_real_insn. */
2282 prev_active_insn (insn
)
2287 insn
= PREV_INSN (insn
);
2288 if (insn
== 0 || active_insn_p (insn
))
2295 /* Return the next CODE_LABEL after the insn INSN, or 0 if there is none. */
2303 insn
= NEXT_INSN (insn
);
2304 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2311 /* Return the last CODE_LABEL before the insn INSN, or 0 if there is none. */
2319 insn
= PREV_INSN (insn
);
2320 if (insn
== 0 || GET_CODE (insn
) == CODE_LABEL
)
2328 /* INSN uses CC0 and is being moved into a delay slot. Set up REG_CC_SETTER
2329 and REG_CC_USER notes so we can find it. */
2332 link_cc0_insns (insn
)
2335 rtx user
= next_nonnote_insn (insn
);
2337 if (GET_CODE (user
) == INSN
&& GET_CODE (PATTERN (user
)) == SEQUENCE
)
2338 user
= XVECEXP (PATTERN (user
), 0, 0);
2340 REG_NOTES (user
) = gen_rtx_INSN_LIST (REG_CC_SETTER
, insn
,
2342 REG_NOTES (insn
) = gen_rtx_INSN_LIST (REG_CC_USER
, user
, REG_NOTES (insn
));
2345 /* Return the next insn that uses CC0 after INSN, which is assumed to
2346 set it. This is the inverse of prev_cc0_setter (i.e., prev_cc0_setter
2347 applied to the result of this function should yield INSN).
2349 Normally, this is simply the next insn. However, if a REG_CC_USER note
2350 is present, it contains the insn that uses CC0.
2352 Return 0 if we can't find the insn. */
2355 next_cc0_user (insn
)
2358 rtx note
= find_reg_note (insn
, REG_CC_USER
, NULL_RTX
);
2361 return XEXP (note
, 0);
2363 insn
= next_nonnote_insn (insn
);
2364 if (insn
&& GET_CODE (insn
) == INSN
&& GET_CODE (PATTERN (insn
)) == SEQUENCE
)
2365 insn
= XVECEXP (PATTERN (insn
), 0, 0);
2367 if (insn
&& INSN_P (insn
) && reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
2373 /* Find the insn that set CC0 for INSN. Unless INSN has a REG_CC_SETTER
2374 note, it is the previous insn. */
2377 prev_cc0_setter (insn
)
2380 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2383 return XEXP (note
, 0);
2385 insn
= prev_nonnote_insn (insn
);
2386 if (! sets_cc0_p (PATTERN (insn
)))
2393 /* Try splitting insns that can be split for better scheduling.
2394 PAT is the pattern which might split.
2395 TRIAL is the insn providing PAT.
2396 LAST is non-zero if we should return the last insn of the sequence produced.
2398 If this routine succeeds in splitting, it returns the first or last
2399 replacement insn depending on the value of LAST. Otherwise, it
2400 returns TRIAL. If the insn to be returned can be split, it will be. */
2403 try_split (pat
, trial
, last
)
2407 rtx before
= PREV_INSN (trial
);
2408 rtx after
= NEXT_INSN (trial
);
2409 rtx seq
= split_insns (pat
, trial
);
2410 int has_barrier
= 0;
2413 /* If we are splitting a JUMP_INSN, it might be followed by a BARRIER.
2414 We may need to handle this specially. */
2415 if (after
&& GET_CODE (after
) == BARRIER
)
2418 after
= NEXT_INSN (after
);
2423 /* SEQ can either be a SEQUENCE or the pattern of a single insn.
2424 The latter case will normally arise only when being done so that
2425 it, in turn, will be split (SFmode on the 29k is an example). */
2426 if (GET_CODE (seq
) == SEQUENCE
)
2430 /* Avoid infinite loop if any insn of the result matches
2431 the original pattern. */
2432 for (i
= 0; i
< XVECLEN (seq
, 0); i
++)
2433 if (GET_CODE (XVECEXP (seq
, 0, i
)) == INSN
2434 && rtx_equal_p (PATTERN (XVECEXP (seq
, 0, i
)), pat
))
2438 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2439 if (GET_CODE (XVECEXP (seq
, 0, i
)) == JUMP_INSN
)
2440 mark_jump_label (PATTERN (XVECEXP (seq
, 0, i
)),
2441 XVECEXP (seq
, 0, i
), 0, 0);
2443 /* If we are splitting a CALL_INSN, look for the CALL_INSN
2444 in SEQ and copy our CALL_INSN_FUNCTION_USAGE to it. */
2445 if (GET_CODE (trial
) == CALL_INSN
)
2446 for (i
= XVECLEN (seq
, 0) - 1; i
>= 0; i
--)
2447 if (GET_CODE (XVECEXP (seq
, 0, i
)) == CALL_INSN
)
2448 CALL_INSN_FUNCTION_USAGE (XVECEXP (seq
, 0, i
))
2449 = CALL_INSN_FUNCTION_USAGE (trial
);
2451 tem
= emit_insn_after (seq
, before
);
2453 delete_insn (trial
);
2455 emit_barrier_after (tem
);
2457 /* Recursively call try_split for each new insn created; by the
2458 time control returns here that insn will be fully split, so
2459 set LAST and continue from the insn after the one returned.
2460 We can't use next_active_insn here since AFTER may be a note.
2461 Ignore deleted insns, which can be occur if not optimizing. */
2462 for (tem
= NEXT_INSN (before
); tem
!= after
; tem
= NEXT_INSN (tem
))
2463 if (! INSN_DELETED_P (tem
) && INSN_P (tem
))
2464 tem
= try_split (PATTERN (tem
), tem
, 1);
2466 /* Avoid infinite loop if the result matches the original pattern. */
2467 else if (rtx_equal_p (seq
, pat
))
2471 PATTERN (trial
) = seq
;
2472 INSN_CODE (trial
) = -1;
2473 try_split (seq
, trial
, last
);
2476 /* Return either the first or the last insn, depending on which was
2479 ? (after
? prev_active_insn (after
) : last_insn
)
2480 : next_active_insn (before
);
2486 /* Make and return an INSN rtx, initializing all its slots.
2487 Store PATTERN in the pattern slots. */
2490 make_insn_raw (pattern
)
2495 insn
= rtx_alloc (INSN
);
2497 INSN_UID (insn
) = cur_insn_uid
++;
2498 PATTERN (insn
) = pattern
;
2499 INSN_CODE (insn
) = -1;
2500 LOG_LINKS (insn
) = NULL
;
2501 REG_NOTES (insn
) = NULL
;
2503 #ifdef ENABLE_RTL_CHECKING
2506 && (returnjump_p (insn
)
2507 || (GET_CODE (insn
) == SET
2508 && SET_DEST (insn
) == pc_rtx
)))
2510 warning ("ICE: emit_insn used where emit_jump_insn needed:\n");
2518 /* Like `make_insn' but make a JUMP_INSN instead of an insn. */
2521 make_jump_insn_raw (pattern
)
2526 insn
= rtx_alloc (JUMP_INSN
);
2527 INSN_UID (insn
) = cur_insn_uid
++;
2529 PATTERN (insn
) = pattern
;
2530 INSN_CODE (insn
) = -1;
2531 LOG_LINKS (insn
) = NULL
;
2532 REG_NOTES (insn
) = NULL
;
2533 JUMP_LABEL (insn
) = NULL
;
2538 /* Like `make_insn' but make a CALL_INSN instead of an insn. */
2541 make_call_insn_raw (pattern
)
2546 insn
= rtx_alloc (CALL_INSN
);
2547 INSN_UID (insn
) = cur_insn_uid
++;
2549 PATTERN (insn
) = pattern
;
2550 INSN_CODE (insn
) = -1;
2551 LOG_LINKS (insn
) = NULL
;
2552 REG_NOTES (insn
) = NULL
;
2553 CALL_INSN_FUNCTION_USAGE (insn
) = NULL
;
2558 /* Add INSN to the end of the doubly-linked list.
2559 INSN may be an INSN, JUMP_INSN, CALL_INSN, CODE_LABEL, BARRIER or NOTE. */
2565 PREV_INSN (insn
) = last_insn
;
2566 NEXT_INSN (insn
) = 0;
2568 if (NULL
!= last_insn
)
2569 NEXT_INSN (last_insn
) = insn
;
2571 if (NULL
== first_insn
)
2577 /* Add INSN into the doubly-linked list after insn AFTER. This and
2578 the next should be the only functions called to insert an insn once
2579 delay slots have been filled since only they know how to update a
2583 add_insn_after (insn
, after
)
2586 rtx next
= NEXT_INSN (after
);
2588 if (optimize
&& INSN_DELETED_P (after
))
2591 NEXT_INSN (insn
) = next
;
2592 PREV_INSN (insn
) = after
;
2596 PREV_INSN (next
) = insn
;
2597 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2598 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = insn
;
2600 else if (last_insn
== after
)
2604 struct sequence_stack
*stack
= seq_stack
;
2605 /* Scan all pending sequences too. */
2606 for (; stack
; stack
= stack
->next
)
2607 if (after
== stack
->last
)
2617 NEXT_INSN (after
) = insn
;
2618 if (GET_CODE (after
) == INSN
&& GET_CODE (PATTERN (after
)) == SEQUENCE
)
2620 rtx sequence
= PATTERN (after
);
2621 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2625 /* Add INSN into the doubly-linked list before insn BEFORE. This and
2626 the previous should be the only functions called to insert an insn once
2627 delay slots have been filled since only they know how to update a
2631 add_insn_before (insn
, before
)
2634 rtx prev
= PREV_INSN (before
);
2636 if (optimize
&& INSN_DELETED_P (before
))
2639 PREV_INSN (insn
) = prev
;
2640 NEXT_INSN (insn
) = before
;
2644 NEXT_INSN (prev
) = insn
;
2645 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2647 rtx sequence
= PATTERN (prev
);
2648 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = insn
;
2651 else if (first_insn
== before
)
2655 struct sequence_stack
*stack
= seq_stack
;
2656 /* Scan all pending sequences too. */
2657 for (; stack
; stack
= stack
->next
)
2658 if (before
== stack
->first
)
2660 stack
->first
= insn
;
2668 PREV_INSN (before
) = insn
;
2669 if (GET_CODE (before
) == INSN
&& GET_CODE (PATTERN (before
)) == SEQUENCE
)
2670 PREV_INSN (XVECEXP (PATTERN (before
), 0, 0)) = insn
;
2673 /* Remove an insn from its doubly-linked list. This function knows how
2674 to handle sequences. */
2679 rtx next
= NEXT_INSN (insn
);
2680 rtx prev
= PREV_INSN (insn
);
2683 NEXT_INSN (prev
) = next
;
2684 if (GET_CODE (prev
) == INSN
&& GET_CODE (PATTERN (prev
)) == SEQUENCE
)
2686 rtx sequence
= PATTERN (prev
);
2687 NEXT_INSN (XVECEXP (sequence
, 0, XVECLEN (sequence
, 0) - 1)) = next
;
2690 else if (first_insn
== insn
)
2694 struct sequence_stack
*stack
= seq_stack
;
2695 /* Scan all pending sequences too. */
2696 for (; stack
; stack
= stack
->next
)
2697 if (insn
== stack
->first
)
2699 stack
->first
= next
;
2709 PREV_INSN (next
) = prev
;
2710 if (GET_CODE (next
) == INSN
&& GET_CODE (PATTERN (next
)) == SEQUENCE
)
2711 PREV_INSN (XVECEXP (PATTERN (next
), 0, 0)) = prev
;
2713 else if (last_insn
== insn
)
2717 struct sequence_stack
*stack
= seq_stack
;
2718 /* Scan all pending sequences too. */
2719 for (; stack
; stack
= stack
->next
)
2720 if (insn
== stack
->last
)
2731 /* Delete all insns made since FROM.
2732 FROM becomes the new last instruction. */
2735 delete_insns_since (from
)
2741 NEXT_INSN (from
) = 0;
2745 /* This function is deprecated, please use sequences instead.
2747 Move a consecutive bunch of insns to a different place in the chain.
2748 The insns to be moved are those between FROM and TO.
2749 They are moved to a new position after the insn AFTER.
2750 AFTER must not be FROM or TO or any insn in between.
2752 This function does not know about SEQUENCEs and hence should not be
2753 called after delay-slot filling has been done. */
2756 reorder_insns (from
, to
, after
)
2757 rtx from
, to
, after
;
2759 /* Splice this bunch out of where it is now. */
2760 if (PREV_INSN (from
))
2761 NEXT_INSN (PREV_INSN (from
)) = NEXT_INSN (to
);
2763 PREV_INSN (NEXT_INSN (to
)) = PREV_INSN (from
);
2764 if (last_insn
== to
)
2765 last_insn
= PREV_INSN (from
);
2766 if (first_insn
== from
)
2767 first_insn
= NEXT_INSN (to
);
2769 /* Make the new neighbors point to it and it to them. */
2770 if (NEXT_INSN (after
))
2771 PREV_INSN (NEXT_INSN (after
)) = to
;
2773 NEXT_INSN (to
) = NEXT_INSN (after
);
2774 PREV_INSN (from
) = after
;
2775 NEXT_INSN (after
) = from
;
2776 if (after
== last_insn
)
2780 /* Return the line note insn preceding INSN. */
2783 find_line_note (insn
)
2786 if (no_line_numbers
)
2789 for (; insn
; insn
= PREV_INSN (insn
))
2790 if (GET_CODE (insn
) == NOTE
2791 && NOTE_LINE_NUMBER (insn
) >= 0)
2797 /* Like reorder_insns, but inserts line notes to preserve the line numbers
2798 of the moved insns when debugging. This may insert a note between AFTER
2799 and FROM, and another one after TO. */
2802 reorder_insns_with_line_notes (from
, to
, after
)
2803 rtx from
, to
, after
;
2805 rtx from_line
= find_line_note (from
);
2806 rtx after_line
= find_line_note (after
);
2808 reorder_insns (from
, to
, after
);
2810 if (from_line
== after_line
)
2814 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
2815 NOTE_LINE_NUMBER (from_line
),
2818 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
2819 NOTE_LINE_NUMBER (after_line
),
2823 /* Remove unnecessary notes from the instruction stream. */
2826 remove_unnecessary_notes ()
2831 /* We must not remove the first instruction in the function because
2832 the compiler depends on the first instruction being a note. */
2833 for (insn
= NEXT_INSN (get_insns ()); insn
; insn
= next
)
2835 /* Remember what's next. */
2836 next
= NEXT_INSN (insn
);
2838 /* We're only interested in notes. */
2839 if (GET_CODE (insn
) != NOTE
)
2842 /* By now, all notes indicating lexical blocks should have
2843 NOTE_BLOCK filled in. */
2844 if ((NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BLOCK_BEG
2845 || NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BLOCK_END
)
2846 && NOTE_BLOCK (insn
) == NULL_TREE
)
2849 /* Remove NOTE_INSN_DELETED notes. */
2850 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_DELETED
)
2852 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_BLOCK_END
)
2854 /* Scan back to see if there are any non-note instructions
2855 between INSN and the beginning of this block. If not,
2856 then there is no PC range in the generated code that will
2857 actually be in this block, so there's no point in
2858 remembering the existence of the block. */
2861 for (prev
= PREV_INSN (insn
); prev
; prev
= PREV_INSN (prev
))
2863 /* This block contains a real instruction. Note that we
2864 don't include labels; if the only thing in the block
2865 is a label, then there are still no PC values that
2866 lie within the block. */
2870 /* We're only interested in NOTEs. */
2871 if (GET_CODE (prev
) != NOTE
)
2874 if (NOTE_LINE_NUMBER (prev
) == NOTE_INSN_BLOCK_BEG
)
2876 /* If the BLOCKs referred to by these notes don't
2877 match, then something is wrong with our BLOCK
2878 nesting structure. */
2879 if (NOTE_BLOCK (prev
) != NOTE_BLOCK (insn
))
2882 if (debug_ignore_block (NOTE_BLOCK (insn
)))
2884 BLOCK_DEAD (NOTE_BLOCK (insn
)) = 1;
2890 else if (NOTE_LINE_NUMBER (prev
) == NOTE_INSN_BLOCK_END
)
2891 /* There's a nested block. We need to leave the
2892 current block in place since otherwise the debugger
2893 wouldn't be able to show symbols from our block in
2894 the nested block. */
2902 /* Emit an insn of given code and pattern
2903 at a specified place within the doubly-linked list. */
2905 /* Make an instruction with body PATTERN
2906 and output it before the instruction BEFORE. */
2909 emit_insn_before (pattern
, before
)
2910 register rtx pattern
, before
;
2912 register rtx insn
= before
;
2914 if (GET_CODE (pattern
) == SEQUENCE
)
2918 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
2920 insn
= XVECEXP (pattern
, 0, i
);
2921 add_insn_before (insn
, before
);
2926 insn
= make_insn_raw (pattern
);
2927 add_insn_before (insn
, before
);
2933 /* Similar to emit_insn_before, but update basic block boundaries as well. */
2936 emit_block_insn_before (pattern
, before
, block
)
2937 rtx pattern
, before
;
2940 rtx prev
= PREV_INSN (before
);
2941 rtx r
= emit_insn_before (pattern
, before
);
2942 if (block
&& block
->head
== before
)
2943 block
->head
= NEXT_INSN (prev
);
2947 /* Make an instruction with body PATTERN and code JUMP_INSN
2948 and output it before the instruction BEFORE. */
2951 emit_jump_insn_before (pattern
, before
)
2952 register rtx pattern
, before
;
2956 if (GET_CODE (pattern
) == SEQUENCE
)
2957 insn
= emit_insn_before (pattern
, before
);
2960 insn
= make_jump_insn_raw (pattern
);
2961 add_insn_before (insn
, before
);
2967 /* Make an instruction with body PATTERN and code CALL_INSN
2968 and output it before the instruction BEFORE. */
2971 emit_call_insn_before (pattern
, before
)
2972 register rtx pattern
, before
;
2976 if (GET_CODE (pattern
) == SEQUENCE
)
2977 insn
= emit_insn_before (pattern
, before
);
2980 insn
= make_call_insn_raw (pattern
);
2981 add_insn_before (insn
, before
);
2982 PUT_CODE (insn
, CALL_INSN
);
2988 /* Make an insn of code BARRIER
2989 and output it before the insn BEFORE. */
2992 emit_barrier_before (before
)
2993 register rtx before
;
2995 register rtx insn
= rtx_alloc (BARRIER
);
2997 INSN_UID (insn
) = cur_insn_uid
++;
2999 add_insn_before (insn
, before
);
3003 /* Emit the label LABEL before the insn BEFORE. */
3006 emit_label_before (label
, before
)
3009 /* This can be called twice for the same label as a result of the
3010 confusion that follows a syntax error! So make it harmless. */
3011 if (INSN_UID (label
) == 0)
3013 INSN_UID (label
) = cur_insn_uid
++;
3014 add_insn_before (label
, before
);
3020 /* Emit a note of subtype SUBTYPE before the insn BEFORE. */
3023 emit_note_before (subtype
, before
)
3027 register rtx note
= rtx_alloc (NOTE
);
3028 INSN_UID (note
) = cur_insn_uid
++;
3029 NOTE_SOURCE_FILE (note
) = 0;
3030 NOTE_LINE_NUMBER (note
) = subtype
;
3032 add_insn_before (note
, before
);
3036 /* Make an insn of code INSN with body PATTERN
3037 and output it after the insn AFTER. */
3040 emit_insn_after (pattern
, after
)
3041 register rtx pattern
, after
;
3043 register rtx insn
= after
;
3045 if (GET_CODE (pattern
) == SEQUENCE
)
3049 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3051 insn
= XVECEXP (pattern
, 0, i
);
3052 add_insn_after (insn
, after
);
3058 insn
= make_insn_raw (pattern
);
3059 add_insn_after (insn
, after
);
3065 /* Similar to emit_insn_after, except that line notes are to be inserted so
3066 as to act as if this insn were at FROM. */
3069 emit_insn_after_with_line_notes (pattern
, after
, from
)
3070 rtx pattern
, after
, from
;
3072 rtx from_line
= find_line_note (from
);
3073 rtx after_line
= find_line_note (after
);
3074 rtx insn
= emit_insn_after (pattern
, after
);
3077 emit_line_note_after (NOTE_SOURCE_FILE (from_line
),
3078 NOTE_LINE_NUMBER (from_line
),
3082 emit_line_note_after (NOTE_SOURCE_FILE (after_line
),
3083 NOTE_LINE_NUMBER (after_line
),
3087 /* Similar to emit_insn_after, but update basic block boundaries as well. */
3090 emit_block_insn_after (pattern
, after
, block
)
3094 rtx r
= emit_insn_after (pattern
, after
);
3095 if (block
&& block
->end
== after
)
3100 /* Make an insn of code JUMP_INSN with body PATTERN
3101 and output it after the insn AFTER. */
3104 emit_jump_insn_after (pattern
, after
)
3105 register rtx pattern
, after
;
3109 if (GET_CODE (pattern
) == SEQUENCE
)
3110 insn
= emit_insn_after (pattern
, after
);
3113 insn
= make_jump_insn_raw (pattern
);
3114 add_insn_after (insn
, after
);
3120 /* Make an insn of code BARRIER
3121 and output it after the insn AFTER. */
3124 emit_barrier_after (after
)
3127 register rtx insn
= rtx_alloc (BARRIER
);
3129 INSN_UID (insn
) = cur_insn_uid
++;
3131 add_insn_after (insn
, after
);
3135 /* Emit the label LABEL after the insn AFTER. */
3138 emit_label_after (label
, after
)
3141 /* This can be called twice for the same label
3142 as a result of the confusion that follows a syntax error!
3143 So make it harmless. */
3144 if (INSN_UID (label
) == 0)
3146 INSN_UID (label
) = cur_insn_uid
++;
3147 add_insn_after (label
, after
);
3153 /* Emit a note of subtype SUBTYPE after the insn AFTER. */
3156 emit_note_after (subtype
, after
)
3160 register rtx note
= rtx_alloc (NOTE
);
3161 INSN_UID (note
) = cur_insn_uid
++;
3162 NOTE_SOURCE_FILE (note
) = 0;
3163 NOTE_LINE_NUMBER (note
) = subtype
;
3164 add_insn_after (note
, after
);
3168 /* Emit a line note for FILE and LINE after the insn AFTER. */
3171 emit_line_note_after (file
, line
, after
)
3178 if (no_line_numbers
&& line
> 0)
3184 note
= rtx_alloc (NOTE
);
3185 INSN_UID (note
) = cur_insn_uid
++;
3186 NOTE_SOURCE_FILE (note
) = file
;
3187 NOTE_LINE_NUMBER (note
) = line
;
3188 add_insn_after (note
, after
);
3192 /* Make an insn of code INSN with pattern PATTERN
3193 and add it to the end of the doubly-linked list.
3194 If PATTERN is a SEQUENCE, take the elements of it
3195 and emit an insn for each element.
3197 Returns the last insn emitted. */
3203 rtx insn
= last_insn
;
3205 if (GET_CODE (pattern
) == SEQUENCE
)
3209 for (i
= 0; i
< XVECLEN (pattern
, 0); i
++)
3211 insn
= XVECEXP (pattern
, 0, i
);
3217 insn
= make_insn_raw (pattern
);
3224 /* Emit the insns in a chain starting with INSN.
3225 Return the last insn emitted. */
3235 rtx next
= NEXT_INSN (insn
);
3244 /* Emit the insns in a chain starting with INSN and place them in front of
3245 the insn BEFORE. Return the last insn emitted. */
3248 emit_insns_before (insn
, before
)
3256 rtx next
= NEXT_INSN (insn
);
3257 add_insn_before (insn
, before
);
3265 /* Emit the insns in a chain starting with FIRST and place them in back of
3266 the insn AFTER. Return the last insn emitted. */
3269 emit_insns_after (first
, after
)
3274 register rtx after_after
;
3282 for (last
= first
; NEXT_INSN (last
); last
= NEXT_INSN (last
))
3285 after_after
= NEXT_INSN (after
);
3287 NEXT_INSN (after
) = first
;
3288 PREV_INSN (first
) = after
;
3289 NEXT_INSN (last
) = after_after
;
3291 PREV_INSN (after_after
) = last
;
3293 if (after
== last_insn
)
3298 /* Make an insn of code JUMP_INSN with pattern PATTERN
3299 and add it to the end of the doubly-linked list. */
3302 emit_jump_insn (pattern
)
3305 if (GET_CODE (pattern
) == SEQUENCE
)
3306 return emit_insn (pattern
);
3309 register rtx insn
= make_jump_insn_raw (pattern
);
3315 /* Make an insn of code CALL_INSN with pattern PATTERN
3316 and add it to the end of the doubly-linked list. */
3319 emit_call_insn (pattern
)
3322 if (GET_CODE (pattern
) == SEQUENCE
)
3323 return emit_insn (pattern
);
3326 register rtx insn
= make_call_insn_raw (pattern
);
3328 PUT_CODE (insn
, CALL_INSN
);
3333 /* Add the label LABEL to the end of the doubly-linked list. */
3339 /* This can be called twice for the same label
3340 as a result of the confusion that follows a syntax error!
3341 So make it harmless. */
3342 if (INSN_UID (label
) == 0)
3344 INSN_UID (label
) = cur_insn_uid
++;
3350 /* Make an insn of code BARRIER
3351 and add it to the end of the doubly-linked list. */
3356 register rtx barrier
= rtx_alloc (BARRIER
);
3357 INSN_UID (barrier
) = cur_insn_uid
++;
3362 /* Make an insn of code NOTE
3363 with data-fields specified by FILE and LINE
3364 and add it to the end of the doubly-linked list,
3365 but only if line-numbers are desired for debugging info. */
3368 emit_line_note (file
, line
)
3372 set_file_and_line_for_stmt (file
, line
);
3375 if (no_line_numbers
)
3379 return emit_note (file
, line
);
3382 /* Make an insn of code NOTE
3383 with data-fields specified by FILE and LINE
3384 and add it to the end of the doubly-linked list.
3385 If it is a line-number NOTE, omit it if it matches the previous one. */
3388 emit_note (file
, line
)
3396 if (file
&& last_filename
&& !strcmp (file
, last_filename
)
3397 && line
== last_linenum
)
3399 last_filename
= file
;
3400 last_linenum
= line
;
3403 if (no_line_numbers
&& line
> 0)
3409 note
= rtx_alloc (NOTE
);
3410 INSN_UID (note
) = cur_insn_uid
++;
3411 NOTE_SOURCE_FILE (note
) = file
;
3412 NOTE_LINE_NUMBER (note
) = line
;
3417 /* Emit a NOTE, and don't omit it even if LINE is the previous note. */
3420 emit_line_note_force (file
, line
)
3425 return emit_line_note (file
, line
);
3428 /* Cause next statement to emit a line note even if the line number
3429 has not changed. This is used at the beginning of a function. */
3432 force_next_line_note ()
3437 /* Place a note of KIND on insn INSN with DATUM as the datum. If a
3438 note of this type already exists, remove it first. */
3441 set_unique_reg_note (insn
, kind
, datum
)
3446 rtx note
= find_reg_note (insn
, kind
, NULL_RTX
);
3448 /* First remove the note if there already is one. */
3450 remove_note (insn
, note
);
3452 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (kind
, datum
, REG_NOTES (insn
));
3455 /* Return an indication of which type of insn should have X as a body.
3456 The value is CODE_LABEL, INSN, CALL_INSN or JUMP_INSN. */
3462 if (GET_CODE (x
) == CODE_LABEL
)
3464 if (GET_CODE (x
) == CALL
)
3466 if (GET_CODE (x
) == RETURN
)
3468 if (GET_CODE (x
) == SET
)
3470 if (SET_DEST (x
) == pc_rtx
)
3472 else if (GET_CODE (SET_SRC (x
)) == CALL
)
3477 if (GET_CODE (x
) == PARALLEL
)
3480 for (j
= XVECLEN (x
, 0) - 1; j
>= 0; j
--)
3481 if (GET_CODE (XVECEXP (x
, 0, j
)) == CALL
)
3483 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3484 && SET_DEST (XVECEXP (x
, 0, j
)) == pc_rtx
)
3486 else if (GET_CODE (XVECEXP (x
, 0, j
)) == SET
3487 && GET_CODE (SET_SRC (XVECEXP (x
, 0, j
))) == CALL
)
3493 /* Emit the rtl pattern X as an appropriate kind of insn.
3494 If X is a label, it is simply added into the insn chain. */
3500 enum rtx_code code
= classify_insn (x
);
3502 if (code
== CODE_LABEL
)
3503 return emit_label (x
);
3504 else if (code
== INSN
)
3505 return emit_insn (x
);
3506 else if (code
== JUMP_INSN
)
3508 register rtx insn
= emit_jump_insn (x
);
3509 if (any_uncondjump_p (insn
) || GET_CODE (x
) == RETURN
)
3510 return emit_barrier ();
3513 else if (code
== CALL_INSN
)
3514 return emit_call_insn (x
);
3519 /* Begin emitting insns to a sequence which can be packaged in an
3520 RTL_EXPR. If this sequence will contain something that might cause
3521 the compiler to pop arguments to function calls (because those
3522 pops have previously been deferred; see INHIBIT_DEFER_POP for more
3523 details), use do_pending_stack_adjust before calling this function.
3524 That will ensure that the deferred pops are not accidentally
3525 emitted in the middle of this sequence. */
3530 struct sequence_stack
*tem
;
3532 tem
= (struct sequence_stack
*) xmalloc (sizeof (struct sequence_stack
));
3534 tem
->next
= seq_stack
;
3535 tem
->first
= first_insn
;
3536 tem
->last
= last_insn
;
3537 tem
->sequence_rtl_expr
= seq_rtl_expr
;
3545 /* Similarly, but indicate that this sequence will be placed in T, an
3546 RTL_EXPR. See the documentation for start_sequence for more
3547 information about how to use this function. */
3550 start_sequence_for_rtl_expr (t
)
3558 /* Set up the insn chain starting with FIRST as the current sequence,
3559 saving the previously current one. See the documentation for
3560 start_sequence for more information about how to use this function. */
3563 push_to_sequence (first
)
3570 for (last
= first
; last
&& NEXT_INSN (last
); last
= NEXT_INSN (last
));
3576 /* Set up the insn chain from a chain stort in FIRST to LAST. */
3579 push_to_full_sequence (first
, last
)
3585 /* We really should have the end of the insn chain here. */
3586 if (last
&& NEXT_INSN (last
))
3590 /* Set up the outer-level insn chain
3591 as the current sequence, saving the previously current one. */
3594 push_topmost_sequence ()
3596 struct sequence_stack
*stack
, *top
= NULL
;
3600 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3603 first_insn
= top
->first
;
3604 last_insn
= top
->last
;
3605 seq_rtl_expr
= top
->sequence_rtl_expr
;
3608 /* After emitting to the outer-level insn chain, update the outer-level
3609 insn chain, and restore the previous saved state. */
3612 pop_topmost_sequence ()
3614 struct sequence_stack
*stack
, *top
= NULL
;
3616 for (stack
= seq_stack
; stack
; stack
= stack
->next
)
3619 top
->first
= first_insn
;
3620 top
->last
= last_insn
;
3621 /* ??? Why don't we save seq_rtl_expr here? */
3626 /* After emitting to a sequence, restore previous saved state.
3628 To get the contents of the sequence just made, you must call
3629 `gen_sequence' *before* calling here.
3631 If the compiler might have deferred popping arguments while
3632 generating this sequence, and this sequence will not be immediately
3633 inserted into the instruction stream, use do_pending_stack_adjust
3634 before calling gen_sequence. That will ensure that the deferred
3635 pops are inserted into this sequence, and not into some random
3636 location in the instruction stream. See INHIBIT_DEFER_POP for more
3637 information about deferred popping of arguments. */
3642 struct sequence_stack
*tem
= seq_stack
;
3644 first_insn
= tem
->first
;
3645 last_insn
= tem
->last
;
3646 seq_rtl_expr
= tem
->sequence_rtl_expr
;
3647 seq_stack
= tem
->next
;
3652 /* This works like end_sequence, but records the old sequence in FIRST
3656 end_full_sequence (first
, last
)
3659 *first
= first_insn
;
3664 /* Return 1 if currently emitting into a sequence. */
3669 return seq_stack
!= 0;
3672 /* Generate a SEQUENCE rtx containing the insns already emitted
3673 to the current sequence.
3675 This is how the gen_... function from a DEFINE_EXPAND
3676 constructs the SEQUENCE that it returns. */
3686 /* Count the insns in the chain. */
3688 for (tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
))
3691 /* If only one insn, return it rather than a SEQUENCE.
3692 (Now that we cache SEQUENCE expressions, it isn't worth special-casing
3693 the case of an empty list.)
3694 We only return the pattern of an insn if its code is INSN and it
3695 has no notes. This ensures that no information gets lost. */
3697 && ! RTX_FRAME_RELATED_P (first_insn
)
3698 && GET_CODE (first_insn
) == INSN
3699 /* Don't throw away any reg notes. */
3700 && REG_NOTES (first_insn
) == 0)
3701 return PATTERN (first_insn
);
3703 result
= gen_rtx_SEQUENCE (VOIDmode
, rtvec_alloc (len
));
3705 for (i
= 0, tem
= first_insn
; tem
; tem
= NEXT_INSN (tem
), i
++)
3706 XVECEXP (result
, 0, i
) = tem
;
3711 /* Put the various virtual registers into REGNO_REG_RTX. */
3714 init_virtual_regs (es
)
3715 struct emit_status
*es
;
3717 rtx
*ptr
= es
->x_regno_reg_rtx
;
3718 ptr
[VIRTUAL_INCOMING_ARGS_REGNUM
] = virtual_incoming_args_rtx
;
3719 ptr
[VIRTUAL_STACK_VARS_REGNUM
] = virtual_stack_vars_rtx
;
3720 ptr
[VIRTUAL_STACK_DYNAMIC_REGNUM
] = virtual_stack_dynamic_rtx
;
3721 ptr
[VIRTUAL_OUTGOING_ARGS_REGNUM
] = virtual_outgoing_args_rtx
;
3722 ptr
[VIRTUAL_CFA_REGNUM
] = virtual_cfa_rtx
;
3726 clear_emit_caches ()
3730 /* Clear the start_sequence/gen_sequence cache. */
3731 for (i
= 0; i
< SEQUENCE_RESULT_SIZE
; i
++)
3732 sequence_result
[i
] = 0;
3736 /* Used by copy_insn_1 to avoid copying SCRATCHes more than once. */
3737 static rtx copy_insn_scratch_in
[MAX_RECOG_OPERANDS
];
3738 static rtx copy_insn_scratch_out
[MAX_RECOG_OPERANDS
];
3739 static int copy_insn_n_scratches
;
3741 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3742 copied an ASM_OPERANDS.
3743 In that case, it is the original input-operand vector. */
3744 static rtvec orig_asm_operands_vector
;
3746 /* When an insn is being copied by copy_insn_1, this is nonzero if we have
3747 copied an ASM_OPERANDS.
3748 In that case, it is the copied input-operand vector. */
3749 static rtvec copy_asm_operands_vector
;
3751 /* Likewise for the constraints vector. */
3752 static rtvec orig_asm_constraints_vector
;
3753 static rtvec copy_asm_constraints_vector
;
3755 /* Recursively create a new copy of an rtx for copy_insn.
3756 This function differs from copy_rtx in that it handles SCRATCHes and
3757 ASM_OPERANDs properly.
3758 Normally, this function is not used directly; use copy_insn as front end.
3759 However, you could first copy an insn pattern with copy_insn and then use
3760 this function afterwards to properly copy any REG_NOTEs containing
3769 register RTX_CODE code
;
3770 register const char *format_ptr
;
3772 code
= GET_CODE (orig
);
3788 for (i
= 0; i
< copy_insn_n_scratches
; i
++)
3789 if (copy_insn_scratch_in
[i
] == orig
)
3790 return copy_insn_scratch_out
[i
];
3794 /* CONST can be shared if it contains a SYMBOL_REF. If it contains
3795 a LABEL_REF, it isn't sharable. */
3796 if (GET_CODE (XEXP (orig
, 0)) == PLUS
3797 && GET_CODE (XEXP (XEXP (orig
, 0), 0)) == SYMBOL_REF
3798 && GET_CODE (XEXP (XEXP (orig
, 0), 1)) == CONST_INT
)
3802 /* A MEM with a constant address is not sharable. The problem is that
3803 the constant address may need to be reloaded. If the mem is shared,
3804 then reloading one copy of this mem will cause all copies to appear
3805 to have been reloaded. */
3811 copy
= rtx_alloc (code
);
3813 /* Copy the various flags, and other information. We assume that
3814 all fields need copying, and then clear the fields that should
3815 not be copied. That is the sensible default behavior, and forces
3816 us to explicitly document why we are *not* copying a flag. */
3817 memcpy (copy
, orig
, sizeof (struct rtx_def
) - sizeof (rtunion
));
3819 /* We do not copy the USED flag, which is used as a mark bit during
3820 walks over the RTL. */
3823 /* We do not copy JUMP, CALL, or FRAME_RELATED for INSNs. */
3824 if (GET_RTX_CLASS (code
) == 'i')
3828 copy
->frame_related
= 0;
3831 format_ptr
= GET_RTX_FORMAT (GET_CODE (copy
));
3833 for (i
= 0; i
< GET_RTX_LENGTH (GET_CODE (copy
)); i
++)
3835 copy
->fld
[i
] = orig
->fld
[i
];
3836 switch (*format_ptr
++)
3839 if (XEXP (orig
, i
) != NULL
)
3840 XEXP (copy
, i
) = copy_insn_1 (XEXP (orig
, i
));
3845 if (XVEC (orig
, i
) == orig_asm_constraints_vector
)
3846 XVEC (copy
, i
) = copy_asm_constraints_vector
;
3847 else if (XVEC (orig
, i
) == orig_asm_operands_vector
)
3848 XVEC (copy
, i
) = copy_asm_operands_vector
;
3849 else if (XVEC (orig
, i
) != NULL
)
3851 XVEC (copy
, i
) = rtvec_alloc (XVECLEN (orig
, i
));
3852 for (j
= 0; j
< XVECLEN (copy
, i
); j
++)
3853 XVECEXP (copy
, i
, j
) = copy_insn_1 (XVECEXP (orig
, i
, j
));
3864 /* These are left unchanged. */
3872 if (code
== SCRATCH
)
3874 i
= copy_insn_n_scratches
++;
3875 if (i
>= MAX_RECOG_OPERANDS
)
3877 copy_insn_scratch_in
[i
] = orig
;
3878 copy_insn_scratch_out
[i
] = copy
;
3880 else if (code
== ASM_OPERANDS
)
3882 orig_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (orig
);
3883 copy_asm_operands_vector
= ASM_OPERANDS_INPUT_VEC (copy
);
3884 orig_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (orig
);
3885 copy_asm_constraints_vector
= ASM_OPERANDS_INPUT_CONSTRAINT_VEC (copy
);
3891 /* Create a new copy of an rtx.
3892 This function differs from copy_rtx in that it handles SCRATCHes and
3893 ASM_OPERANDs properly.
3894 INSN doesn't really have to be a full INSN; it could be just the
3900 copy_insn_n_scratches
= 0;
3901 orig_asm_operands_vector
= 0;
3902 orig_asm_constraints_vector
= 0;
3903 copy_asm_operands_vector
= 0;
3904 copy_asm_constraints_vector
= 0;
3905 return copy_insn_1 (insn
);
3908 /* Initialize data structures and variables in this file
3909 before generating rtl for each function. */
3914 struct function
*f
= cfun
;
3916 f
->emit
= (struct emit_status
*) xmalloc (sizeof (struct emit_status
));
3919 seq_rtl_expr
= NULL
;
3921 reg_rtx_no
= LAST_VIRTUAL_REGISTER
+ 1;
3924 first_label_num
= label_num
;
3928 clear_emit_caches ();
3930 /* Init the tables that describe all the pseudo regs. */
3932 f
->emit
->regno_pointer_align_length
= LAST_VIRTUAL_REGISTER
+ 101;
3934 f
->emit
->regno_pointer_align
3935 = (unsigned char *) xcalloc (f
->emit
->regno_pointer_align_length
,
3936 sizeof (unsigned char));
3939 = (rtx
*) xcalloc (f
->emit
->regno_pointer_align_length
* sizeof (rtx
),
3942 /* Put copies of all the virtual register rtx into regno_reg_rtx. */
3943 init_virtual_regs (f
->emit
);
3945 /* Indicate that the virtual registers and stack locations are
3947 REG_POINTER (stack_pointer_rtx
) = 1;
3948 REG_POINTER (frame_pointer_rtx
) = 1;
3949 REG_POINTER (hard_frame_pointer_rtx
) = 1;
3950 REG_POINTER (arg_pointer_rtx
) = 1;
3952 REG_POINTER (virtual_incoming_args_rtx
) = 1;
3953 REG_POINTER (virtual_stack_vars_rtx
) = 1;
3954 REG_POINTER (virtual_stack_dynamic_rtx
) = 1;
3955 REG_POINTER (virtual_outgoing_args_rtx
) = 1;
3956 REG_POINTER (virtual_cfa_rtx
) = 1;
3958 #ifdef STACK_BOUNDARY
3959 REGNO_POINTER_ALIGN (STACK_POINTER_REGNUM
) = STACK_BOUNDARY
;
3960 REGNO_POINTER_ALIGN (FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
3961 REGNO_POINTER_ALIGN (HARD_FRAME_POINTER_REGNUM
) = STACK_BOUNDARY
;
3962 REGNO_POINTER_ALIGN (ARG_POINTER_REGNUM
) = STACK_BOUNDARY
;
3964 REGNO_POINTER_ALIGN (VIRTUAL_INCOMING_ARGS_REGNUM
) = STACK_BOUNDARY
;
3965 REGNO_POINTER_ALIGN (VIRTUAL_STACK_VARS_REGNUM
) = STACK_BOUNDARY
;
3966 REGNO_POINTER_ALIGN (VIRTUAL_STACK_DYNAMIC_REGNUM
) = STACK_BOUNDARY
;
3967 REGNO_POINTER_ALIGN (VIRTUAL_OUTGOING_ARGS_REGNUM
) = STACK_BOUNDARY
;
3968 REGNO_POINTER_ALIGN (VIRTUAL_CFA_REGNUM
) = BITS_PER_WORD
;
3971 #ifdef INIT_EXPANDERS
3976 /* Mark SS for GC. */
3979 mark_sequence_stack (ss
)
3980 struct sequence_stack
*ss
;
3984 ggc_mark_rtx (ss
->first
);
3985 ggc_mark_tree (ss
->sequence_rtl_expr
);
3990 /* Mark ES for GC. */
3993 mark_emit_status (es
)
3994 struct emit_status
*es
;
4002 for (i
= es
->regno_pointer_align_length
, r
= es
->x_regno_reg_rtx
;
4006 mark_sequence_stack (es
->sequence_stack
);
4007 ggc_mark_tree (es
->sequence_rtl_expr
);
4008 ggc_mark_rtx (es
->x_first_insn
);
4011 /* Create some permanent unique rtl objects shared between all functions.
4012 LINE_NUMBERS is nonzero if line numbers are to be generated. */
4015 init_emit_once (line_numbers
)
4019 enum machine_mode mode
;
4020 enum machine_mode double_mode
;
4022 /* Initialize the CONST_INT hash table. */
4023 const_int_htab
= htab_create (37, const_int_htab_hash
,
4024 const_int_htab_eq
, NULL
);
4025 ggc_add_root (&const_int_htab
, 1, sizeof (const_int_htab
),
4028 no_line_numbers
= ! line_numbers
;
4030 /* Compute the word and byte modes. */
4032 byte_mode
= VOIDmode
;
4033 word_mode
= VOIDmode
;
4034 double_mode
= VOIDmode
;
4036 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4037 mode
= GET_MODE_WIDER_MODE (mode
))
4039 if (GET_MODE_BITSIZE (mode
) == BITS_PER_UNIT
4040 && byte_mode
== VOIDmode
)
4043 if (GET_MODE_BITSIZE (mode
) == BITS_PER_WORD
4044 && word_mode
== VOIDmode
)
4048 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4049 mode
= GET_MODE_WIDER_MODE (mode
))
4051 if (GET_MODE_BITSIZE (mode
) == DOUBLE_TYPE_SIZE
4052 && double_mode
== VOIDmode
)
4056 ptr_mode
= mode_for_size (POINTER_SIZE
, GET_MODE_CLASS (Pmode
), 0);
4058 /* Assign register numbers to the globally defined register rtx.
4059 This must be done at runtime because the register number field
4060 is in a union and some compilers can't initialize unions. */
4062 pc_rtx
= gen_rtx (PC
, VOIDmode
);
4063 cc0_rtx
= gen_rtx (CC0
, VOIDmode
);
4064 stack_pointer_rtx
= gen_raw_REG (Pmode
, STACK_POINTER_REGNUM
);
4065 frame_pointer_rtx
= gen_raw_REG (Pmode
, FRAME_POINTER_REGNUM
);
4066 if (hard_frame_pointer_rtx
== 0)
4067 hard_frame_pointer_rtx
= gen_raw_REG (Pmode
,
4068 HARD_FRAME_POINTER_REGNUM
);
4069 if (arg_pointer_rtx
== 0)
4070 arg_pointer_rtx
= gen_raw_REG (Pmode
, ARG_POINTER_REGNUM
);
4071 virtual_incoming_args_rtx
=
4072 gen_raw_REG (Pmode
, VIRTUAL_INCOMING_ARGS_REGNUM
);
4073 virtual_stack_vars_rtx
=
4074 gen_raw_REG (Pmode
, VIRTUAL_STACK_VARS_REGNUM
);
4075 virtual_stack_dynamic_rtx
=
4076 gen_raw_REG (Pmode
, VIRTUAL_STACK_DYNAMIC_REGNUM
);
4077 virtual_outgoing_args_rtx
=
4078 gen_raw_REG (Pmode
, VIRTUAL_OUTGOING_ARGS_REGNUM
);
4079 virtual_cfa_rtx
= gen_raw_REG (Pmode
, VIRTUAL_CFA_REGNUM
);
4081 /* These rtx must be roots if GC is enabled. */
4082 ggc_add_rtx_root (global_rtl
, GR_MAX
);
4084 #ifdef INIT_EXPANDERS
4085 /* This is to initialize {init|mark|free}_machine_status before the first
4086 call to push_function_context_to. This is needed by the Chill front
4087 end which calls push_function_context_to before the first cal to
4088 init_function_start. */
4092 /* Create the unique rtx's for certain rtx codes and operand values. */
4094 /* Don't use gen_rtx here since gen_rtx in this case
4095 tries to use these variables. */
4096 for (i
= - MAX_SAVED_CONST_INT
; i
<= MAX_SAVED_CONST_INT
; i
++)
4097 const_int_rtx
[i
+ MAX_SAVED_CONST_INT
] =
4098 gen_rtx_raw_CONST_INT (VOIDmode
, i
);
4099 ggc_add_rtx_root (const_int_rtx
, 2 * MAX_SAVED_CONST_INT
+ 1);
4101 if (STORE_FLAG_VALUE
>= - MAX_SAVED_CONST_INT
4102 && STORE_FLAG_VALUE
<= MAX_SAVED_CONST_INT
)
4103 const_true_rtx
= const_int_rtx
[STORE_FLAG_VALUE
+ MAX_SAVED_CONST_INT
];
4105 const_true_rtx
= gen_rtx_CONST_INT (VOIDmode
, STORE_FLAG_VALUE
);
4107 dconst0
= REAL_VALUE_ATOF ("0", double_mode
);
4108 dconst1
= REAL_VALUE_ATOF ("1", double_mode
);
4109 dconst2
= REAL_VALUE_ATOF ("2", double_mode
);
4110 dconstm1
= REAL_VALUE_ATOF ("-1", double_mode
);
4112 for (i
= 0; i
<= 2; i
++)
4114 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_FLOAT
); mode
!= VOIDmode
;
4115 mode
= GET_MODE_WIDER_MODE (mode
))
4117 rtx tem
= rtx_alloc (CONST_DOUBLE
);
4118 union real_extract u
;
4120 memset ((char *) &u
, 0, sizeof u
); /* Zero any holes in a structure. */
4121 u
.d
= i
== 0 ? dconst0
: i
== 1 ? dconst1
: dconst2
;
4123 memcpy (&CONST_DOUBLE_LOW (tem
), &u
, sizeof u
);
4124 CONST_DOUBLE_MEM (tem
) = cc0_rtx
;
4125 CONST_DOUBLE_CHAIN (tem
) = NULL_RTX
;
4126 PUT_MODE (tem
, mode
);
4128 const_tiny_rtx
[i
][(int) mode
] = tem
;
4131 const_tiny_rtx
[i
][(int) VOIDmode
] = GEN_INT (i
);
4133 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_INT
); mode
!= VOIDmode
;
4134 mode
= GET_MODE_WIDER_MODE (mode
))
4135 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4137 for (mode
= GET_CLASS_NARROWEST_MODE (MODE_PARTIAL_INT
);
4139 mode
= GET_MODE_WIDER_MODE (mode
))
4140 const_tiny_rtx
[i
][(int) mode
] = GEN_INT (i
);
4143 for (i
= (int) CCmode
; i
< (int) MAX_MACHINE_MODE
; ++i
)
4144 if (GET_MODE_CLASS ((enum machine_mode
) i
) == MODE_CC
)
4145 const_tiny_rtx
[0][i
] = const0_rtx
;
4147 const_tiny_rtx
[0][(int) BImode
] = const0_rtx
;
4148 if (STORE_FLAG_VALUE
== 1)
4149 const_tiny_rtx
[1][(int) BImode
] = const1_rtx
;
4151 /* For bounded pointers, `&const_tiny_rtx[0][0]' is not the same as
4152 `(rtx *) const_tiny_rtx'. The former has bounds that only cover
4153 `const_tiny_rtx[0]', whereas the latter has bounds that cover all. */
4154 ggc_add_rtx_root ((rtx
*) const_tiny_rtx
, sizeof const_tiny_rtx
/ sizeof (rtx
));
4155 ggc_add_rtx_root (&const_true_rtx
, 1);
4157 #ifdef RETURN_ADDRESS_POINTER_REGNUM
4158 return_address_pointer_rtx
4159 = gen_raw_REG (Pmode
, RETURN_ADDRESS_POINTER_REGNUM
);
4163 struct_value_rtx
= STRUCT_VALUE
;
4165 struct_value_rtx
= gen_rtx_REG (Pmode
, STRUCT_VALUE_REGNUM
);
4168 #ifdef STRUCT_VALUE_INCOMING
4169 struct_value_incoming_rtx
= STRUCT_VALUE_INCOMING
;
4171 #ifdef STRUCT_VALUE_INCOMING_REGNUM
4172 struct_value_incoming_rtx
4173 = gen_rtx_REG (Pmode
, STRUCT_VALUE_INCOMING_REGNUM
);
4175 struct_value_incoming_rtx
= struct_value_rtx
;
4179 #ifdef STATIC_CHAIN_REGNUM
4180 static_chain_rtx
= gen_rtx_REG (Pmode
, STATIC_CHAIN_REGNUM
);
4182 #ifdef STATIC_CHAIN_INCOMING_REGNUM
4183 if (STATIC_CHAIN_INCOMING_REGNUM
!= STATIC_CHAIN_REGNUM
)
4184 static_chain_incoming_rtx
4185 = gen_rtx_REG (Pmode
, STATIC_CHAIN_INCOMING_REGNUM
);
4188 static_chain_incoming_rtx
= static_chain_rtx
;
4192 static_chain_rtx
= STATIC_CHAIN
;
4194 #ifdef STATIC_CHAIN_INCOMING
4195 static_chain_incoming_rtx
= STATIC_CHAIN_INCOMING
;
4197 static_chain_incoming_rtx
= static_chain_rtx
;
4201 if (PIC_OFFSET_TABLE_REGNUM
!= INVALID_REGNUM
)
4202 pic_offset_table_rtx
= gen_rtx_REG (Pmode
, PIC_OFFSET_TABLE_REGNUM
);
4204 ggc_add_rtx_root (&pic_offset_table_rtx
, 1);
4205 ggc_add_rtx_root (&struct_value_rtx
, 1);
4206 ggc_add_rtx_root (&struct_value_incoming_rtx
, 1);
4207 ggc_add_rtx_root (&static_chain_rtx
, 1);
4208 ggc_add_rtx_root (&static_chain_incoming_rtx
, 1);
4209 ggc_add_rtx_root (&return_address_pointer_rtx
, 1);
4212 /* Query and clear/ restore no_line_numbers. This is used by the
4213 switch / case handling in stmt.c to give proper line numbers in
4214 warnings about unreachable code. */
4217 force_line_numbers ()
4219 int old
= no_line_numbers
;
4221 no_line_numbers
= 0;
4223 force_next_line_note ();
4228 restore_line_number_status (old_value
)
4231 no_line_numbers
= old_value
;