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1 /* Perform instruction reorganizations for delay slot filling.
2 Copyright (C) 1992, 93-99, 2000 Free Software Foundation, Inc.
3 Contributed by Richard Kenner (kenner@vlsi1.ultra.nyu.edu).
4 Hacked by Michael Tiemann (tiemann@cygnus.com).
6 This file is part of GNU CC.
8 GNU CC is free software; you can redistribute it and/or modify
9 it under the terms of the GNU General Public License as published by
10 the Free Software Foundation; either version 2, or (at your option)
11 any later version.
13 GNU CC is distributed in the hope that it will be useful,
14 but WITHOUT ANY WARRANTY; without even the implied warranty of
15 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
16 GNU General Public License for more details.
18 You should have received a copy of the GNU General Public License
19 along with GNU CC; see the file COPYING. If not, write to
20 the Free Software Foundation, 59 Temple Place - Suite 330,
21 Boston, MA 02111-1307, USA. */
23 /* Instruction reorganization pass.
25 This pass runs after register allocation and final jump
26 optimization. It should be the last pass to run before peephole.
27 It serves primarily to fill delay slots of insns, typically branch
28 and call insns. Other insns typically involve more complicated
29 interactions of data dependencies and resource constraints, and
30 are better handled by scheduling before register allocation (by the
31 function `schedule_insns').
33 The Branch Penalty is the number of extra cycles that are needed to
34 execute a branch insn. On an ideal machine, branches take a single
35 cycle, and the Branch Penalty is 0. Several RISC machines approach
36 branch delays differently:
38 The MIPS and AMD 29000 have a single branch delay slot. Most insns
39 (except other branches) can be used to fill this slot. When the
40 slot is filled, two insns execute in two cycles, reducing the
41 branch penalty to zero.
43 The Motorola 88000 conditionally exposes its branch delay slot,
44 so code is shorter when it is turned off, but will run faster
45 when useful insns are scheduled there.
47 The IBM ROMP has two forms of branch and call insns, both with and
48 without a delay slot. Much like the 88k, insns not using the delay
49 slot can be shorted (2 bytes vs. 4 bytes), but will run slowed.
51 The SPARC always has a branch delay slot, but its effects can be
52 annulled when the branch is not taken. This means that failing to
53 find other sources of insns, we can hoist an insn from the branch
54 target that would only be safe to execute knowing that the branch
55 is taken.
57 The HP-PA always has a branch delay slot. For unconditional branches
58 its effects can be annulled when the branch is taken. The effects
59 of the delay slot in a conditional branch can be nullified for forward
60 taken branches, or for untaken backward branches. This means
61 we can hoist insns from the fall-through path for forward branches or
62 steal insns from the target of backward branches.
64 The TMS320C3x and C4x have three branch delay slots. When the three
65 slots are filled, the branch penalty is zero. Most insns can fill the
66 delay slots except jump insns.
68 Three techniques for filling delay slots have been implemented so far:
70 (1) `fill_simple_delay_slots' is the simplest, most efficient way
71 to fill delay slots. This pass first looks for insns which come
72 from before the branch and which are safe to execute after the
73 branch. Then it searches after the insn requiring delay slots or,
74 in the case of a branch, for insns that are after the point at
75 which the branch merges into the fallthrough code, if such a point
76 exists. When such insns are found, the branch penalty decreases
77 and no code expansion takes place.
79 (2) `fill_eager_delay_slots' is more complicated: it is used for
80 scheduling conditional jumps, or for scheduling jumps which cannot
81 be filled using (1). A machine need not have annulled jumps to use
82 this strategy, but it helps (by keeping more options open).
83 `fill_eager_delay_slots' tries to guess the direction the branch
84 will go; if it guesses right 100% of the time, it can reduce the
85 branch penalty as much as `fill_simple_delay_slots' does. If it
86 guesses wrong 100% of the time, it might as well schedule nops (or
87 on the m88k, unexpose the branch slot). When
88 `fill_eager_delay_slots' takes insns from the fall-through path of
89 the jump, usually there is no code expansion; when it takes insns
90 from the branch target, there is code expansion if it is not the
91 only way to reach that target.
93 (3) `relax_delay_slots' uses a set of rules to simplify code that
94 has been reorganized by (1) and (2). It finds cases where
95 conditional test can be eliminated, jumps can be threaded, extra
96 insns can be eliminated, etc. It is the job of (1) and (2) to do a
97 good job of scheduling locally; `relax_delay_slots' takes care of
98 making the various individual schedules work well together. It is
99 especially tuned to handle the control flow interactions of branch
100 insns. It does nothing for insns with delay slots that do not
101 branch.
103 On machines that use CC0, we are very conservative. We will not make
104 a copy of an insn involving CC0 since we want to maintain a 1-1
105 correspondence between the insn that sets and uses CC0. The insns are
106 allowed to be separated by placing an insn that sets CC0 (but not an insn
107 that uses CC0; we could do this, but it doesn't seem worthwhile) in a
108 delay slot. In that case, we point each insn at the other with REG_CC_USER
109 and REG_CC_SETTER notes. Note that these restrictions affect very few
110 machines because most RISC machines with delay slots will not use CC0
111 (the RT is the only known exception at this point).
113 Not yet implemented:
115 The Acorn Risc Machine can conditionally execute most insns, so
116 it is profitable to move single insns into a position to execute
117 based on the condition code of the previous insn.
119 The HP-PA can conditionally nullify insns, providing a similar
120 effect to the ARM, differing mostly in which insn is "in charge". */
122 #include "config.h"
123 #include "system.h"
124 #include "toplev.h"
125 #include "rtl.h"
126 #include "tm_p.h"
127 #include "expr.h"
128 #include "function.h"
129 #include "insn-config.h"
130 #include "conditions.h"
131 #include "hard-reg-set.h"
132 #include "basic-block.h"
133 #include "regs.h"
134 #include "insn-flags.h"
135 #include "recog.h"
136 #include "flags.h"
137 #include "output.h"
138 #include "obstack.h"
139 #include "insn-attr.h"
140 #include "resource.h"
143 #ifdef DELAY_SLOTS
145 #define obstack_chunk_alloc xmalloc
146 #define obstack_chunk_free free
148 #ifndef ANNUL_IFTRUE_SLOTS
149 #define eligible_for_annul_true(INSN, SLOTS, TRIAL, FLAGS) 0
150 #endif
151 #ifndef ANNUL_IFFALSE_SLOTS
152 #define eligible_for_annul_false(INSN, SLOTS, TRIAL, FLAGS) 0
153 #endif
155 /* Insns which have delay slots that have not yet been filled. */
157 static struct obstack unfilled_slots_obstack;
158 static rtx *unfilled_firstobj;
160 /* Define macros to refer to the first and last slot containing unfilled
161 insns. These are used because the list may move and its address
162 should be recomputed at each use. */
164 #define unfilled_slots_base \
165 ((rtx *) obstack_base (&unfilled_slots_obstack))
167 #define unfilled_slots_next \
168 ((rtx *) obstack_next_free (&unfilled_slots_obstack))
170 /* Points to the label before the end of the function. */
171 static rtx end_of_function_label;
173 /* Mapping between INSN_UID's and position in the code since INSN_UID's do
174 not always monotonically increase. */
175 static int *uid_to_ruid;
177 /* Highest valid index in `uid_to_ruid'. */
178 static int max_uid;
180 static int stop_search_p PARAMS ((rtx, int));
181 static int resource_conflicts_p PARAMS ((struct resources *,
182 struct resources *));
183 static int insn_references_resource_p PARAMS ((rtx, struct resources *, int));
184 static int insn_sets_resource_p PARAMS ((rtx, struct resources *, int));
185 static rtx find_end_label PARAMS ((void));
186 static rtx emit_delay_sequence PARAMS ((rtx, rtx, int));
187 static rtx add_to_delay_list PARAMS ((rtx, rtx));
188 static rtx delete_from_delay_slot PARAMS ((rtx));
189 static void delete_scheduled_jump PARAMS ((rtx));
190 static void note_delay_statistics PARAMS ((int, int));
191 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
192 static rtx optimize_skip PARAMS ((rtx));
193 #endif
194 static int get_jump_flags PARAMS ((rtx, rtx));
195 static int rare_destination PARAMS ((rtx));
196 static int mostly_true_jump PARAMS ((rtx, rtx));
197 static rtx get_branch_condition PARAMS ((rtx, rtx));
198 static int condition_dominates_p PARAMS ((rtx, rtx));
199 static int redirect_with_delay_slots_safe_p PARAMS ((rtx, rtx, rtx));
200 static int redirect_with_delay_list_safe_p PARAMS ((rtx, rtx, rtx));
201 static int check_annul_list_true_false PARAMS ((int, rtx));
202 static rtx steal_delay_list_from_target PARAMS ((rtx, rtx, rtx, rtx,
203 struct resources *,
204 struct resources *,
205 struct resources *,
206 int, int *, int *, rtx *));
207 static rtx steal_delay_list_from_fallthrough PARAMS ((rtx, rtx, rtx, rtx,
208 struct resources *,
209 struct resources *,
210 struct resources *,
211 int, int *, int *));
212 static void try_merge_delay_insns PARAMS ((rtx, rtx));
213 static rtx redundant_insn PARAMS ((rtx, rtx, rtx));
214 static int own_thread_p PARAMS ((rtx, rtx, int));
215 static void update_block PARAMS ((rtx, rtx));
216 static int reorg_redirect_jump PARAMS ((rtx, rtx));
217 static void update_reg_dead_notes PARAMS ((rtx, rtx));
218 static void fix_reg_dead_note PARAMS ((rtx, rtx));
219 static void update_reg_unused_notes PARAMS ((rtx, rtx));
220 static void fill_simple_delay_slots PARAMS ((int));
221 static rtx fill_slots_from_thread PARAMS ((rtx, rtx, rtx, rtx, int, int,
222 int, int, int *, rtx));
223 static void fill_eager_delay_slots PARAMS ((void));
224 static void relax_delay_slots PARAMS ((rtx));
225 #ifdef HAVE_return
226 static void make_return_insns PARAMS ((rtx));
227 #endif
229 /* Return TRUE if this insn should stop the search for insn to fill delay
230 slots. LABELS_P indicates that labels should terminate the search.
231 In all cases, jumps terminate the search. */
233 static int
234 stop_search_p (insn, labels_p)
235 rtx insn;
236 int labels_p;
238 if (insn == 0)
239 return 1;
241 switch (GET_CODE (insn))
243 case NOTE:
244 case CALL_INSN:
245 return 0;
247 case CODE_LABEL:
248 return labels_p;
250 case JUMP_INSN:
251 case BARRIER:
252 return 1;
254 case INSN:
255 /* OK unless it contains a delay slot or is an `asm' insn of some type.
256 We don't know anything about these. */
257 return (GET_CODE (PATTERN (insn)) == SEQUENCE
258 || GET_CODE (PATTERN (insn)) == ASM_INPUT
259 || asm_noperands (PATTERN (insn)) >= 0);
261 default:
262 abort ();
266 /* Return TRUE if any resources are marked in both RES1 and RES2 or if either
267 resource set contains a volatile memory reference. Otherwise, return FALSE. */
269 static int
270 resource_conflicts_p (res1, res2)
271 struct resources *res1, *res2;
273 if ((res1->cc && res2->cc) || (res1->memory && res2->memory)
274 || (res1->unch_memory && res2->unch_memory)
275 || res1->volatil || res2->volatil)
276 return 1;
278 #ifdef HARD_REG_SET
279 return (res1->regs & res2->regs) != HARD_CONST (0);
280 #else
282 int i;
284 for (i = 0; i < HARD_REG_SET_LONGS; i++)
285 if ((res1->regs[i] & res2->regs[i]) != 0)
286 return 1;
287 return 0;
289 #endif
292 /* Return TRUE if any resource marked in RES, a `struct resources', is
293 referenced by INSN. If INCLUDE_DELAYED_EFFECTS is set, return if the called
294 routine is using those resources.
296 We compute this by computing all the resources referenced by INSN and
297 seeing if this conflicts with RES. It might be faster to directly check
298 ourselves, and this is the way it used to work, but it means duplicating
299 a large block of complex code. */
301 static int
302 insn_references_resource_p (insn, res, include_delayed_effects)
303 register rtx insn;
304 register struct resources *res;
305 int include_delayed_effects;
307 struct resources insn_res;
309 CLEAR_RESOURCE (&insn_res);
310 mark_referenced_resources (insn, &insn_res, include_delayed_effects);
311 return resource_conflicts_p (&insn_res, res);
314 /* Return TRUE if INSN modifies resources that are marked in RES.
315 INCLUDE_DELAYED_EFFECTS is set if the actions of that routine should be
316 included. CC0 is only modified if it is explicitly set; see comments
317 in front of mark_set_resources for details. */
319 static int
320 insn_sets_resource_p (insn, res, include_delayed_effects)
321 register rtx insn;
322 register struct resources *res;
323 int include_delayed_effects;
325 struct resources insn_sets;
327 CLEAR_RESOURCE (&insn_sets);
328 mark_set_resources (insn, &insn_sets, 0, include_delayed_effects);
329 return resource_conflicts_p (&insn_sets, res);
332 /* Find a label at the end of the function or before a RETURN. If there is
333 none, make one. */
335 static rtx
336 find_end_label ()
338 rtx insn;
340 /* If we found one previously, return it. */
341 if (end_of_function_label)
342 return end_of_function_label;
344 /* Otherwise, see if there is a label at the end of the function. If there
345 is, it must be that RETURN insns aren't needed, so that is our return
346 label and we don't have to do anything else. */
348 insn = get_last_insn ();
349 while (GET_CODE (insn) == NOTE
350 || (GET_CODE (insn) == INSN
351 && (GET_CODE (PATTERN (insn)) == USE
352 || GET_CODE (PATTERN (insn)) == CLOBBER)))
353 insn = PREV_INSN (insn);
355 /* When a target threads its epilogue we might already have a
356 suitable return insn. If so put a label before it for the
357 end_of_function_label. */
358 if (GET_CODE (insn) == BARRIER
359 && GET_CODE (PREV_INSN (insn)) == JUMP_INSN
360 && GET_CODE (PATTERN (PREV_INSN (insn))) == RETURN)
362 rtx temp = PREV_INSN (PREV_INSN (insn));
363 end_of_function_label = gen_label_rtx ();
364 LABEL_NUSES (end_of_function_label) = 0;
366 /* Put the label before an USE insns that may proceed the RETURN insn. */
367 while (GET_CODE (temp) == USE)
368 temp = PREV_INSN (temp);
370 emit_label_after (end_of_function_label, temp);
373 else if (GET_CODE (insn) == CODE_LABEL)
374 end_of_function_label = insn;
375 else
377 /* Otherwise, make a new label and emit a RETURN and BARRIER,
378 if needed. */
379 end_of_function_label = gen_label_rtx ();
380 LABEL_NUSES (end_of_function_label) = 0;
381 emit_label (end_of_function_label);
382 #ifdef HAVE_return
383 if (HAVE_return)
385 /* The return we make may have delay slots too. */
386 rtx insn = gen_return ();
387 insn = emit_jump_insn (insn);
388 emit_barrier ();
389 if (num_delay_slots (insn) > 0)
390 obstack_ptr_grow (&unfilled_slots_obstack, insn);
392 #endif
395 /* Show one additional use for this label so it won't go away until
396 we are done. */
397 ++LABEL_NUSES (end_of_function_label);
399 return end_of_function_label;
402 /* Put INSN and LIST together in a SEQUENCE rtx of LENGTH, and replace
403 the pattern of INSN with the SEQUENCE.
405 Chain the insns so that NEXT_INSN of each insn in the sequence points to
406 the next and NEXT_INSN of the last insn in the sequence points to
407 the first insn after the sequence. Similarly for PREV_INSN. This makes
408 it easier to scan all insns.
410 Returns the SEQUENCE that replaces INSN. */
412 static rtx
413 emit_delay_sequence (insn, list, length)
414 rtx insn;
415 rtx list;
416 int length;
418 register int i = 1;
419 register rtx li;
420 int had_barrier = 0;
422 /* Allocate the rtvec to hold the insns and the SEQUENCE. */
423 rtvec seqv = rtvec_alloc (length + 1);
424 rtx seq = gen_rtx_SEQUENCE (VOIDmode, seqv);
425 rtx seq_insn = make_insn_raw (seq);
426 rtx first = get_insns ();
427 rtx last = get_last_insn ();
429 /* Make a copy of the insn having delay slots. */
430 rtx delay_insn = copy_rtx (insn);
432 /* If INSN is followed by a BARRIER, delete the BARRIER since it will only
433 confuse further processing. Update LAST in case it was the last insn.
434 We will put the BARRIER back in later. */
435 if (NEXT_INSN (insn) && GET_CODE (NEXT_INSN (insn)) == BARRIER)
437 delete_insn (NEXT_INSN (insn));
438 last = get_last_insn ();
439 had_barrier = 1;
442 /* Splice our SEQUENCE into the insn stream where INSN used to be. */
443 NEXT_INSN (seq_insn) = NEXT_INSN (insn);
444 PREV_INSN (seq_insn) = PREV_INSN (insn);
446 if (insn != last)
447 PREV_INSN (NEXT_INSN (seq_insn)) = seq_insn;
449 if (insn != first)
450 NEXT_INSN (PREV_INSN (seq_insn)) = seq_insn;
452 /* Note the calls to set_new_first_and_last_insn must occur after
453 SEQ_INSN has been completely spliced into the insn stream.
455 Otherwise CUR_INSN_UID will get set to an incorrect value because
456 set_new_first_and_last_insn will not find SEQ_INSN in the chain. */
457 if (insn == last)
458 set_new_first_and_last_insn (first, seq_insn);
460 if (insn == first)
461 set_new_first_and_last_insn (seq_insn, last);
463 /* Build our SEQUENCE and rebuild the insn chain. */
464 XVECEXP (seq, 0, 0) = delay_insn;
465 INSN_DELETED_P (delay_insn) = 0;
466 PREV_INSN (delay_insn) = PREV_INSN (seq_insn);
468 for (li = list; li; li = XEXP (li, 1), i++)
470 rtx tem = XEXP (li, 0);
471 rtx note;
473 /* Show that this copy of the insn isn't deleted. */
474 INSN_DELETED_P (tem) = 0;
476 XVECEXP (seq, 0, i) = tem;
477 PREV_INSN (tem) = XVECEXP (seq, 0, i - 1);
478 NEXT_INSN (XVECEXP (seq, 0, i - 1)) = tem;
480 /* Remove any REG_DEAD notes because we can't rely on them now
481 that the insn has been moved. */
482 for (note = REG_NOTES (tem); note; note = XEXP (note, 1))
483 if (REG_NOTE_KIND (note) == REG_DEAD)
484 XEXP (note, 0) = const0_rtx;
487 NEXT_INSN (XVECEXP (seq, 0, length)) = NEXT_INSN (seq_insn);
489 /* If the previous insn is a SEQUENCE, update the NEXT_INSN pointer on the
490 last insn in that SEQUENCE to point to us. Similarly for the first
491 insn in the following insn if it is a SEQUENCE. */
493 if (PREV_INSN (seq_insn) && GET_CODE (PREV_INSN (seq_insn)) == INSN
494 && GET_CODE (PATTERN (PREV_INSN (seq_insn))) == SEQUENCE)
495 NEXT_INSN (XVECEXP (PATTERN (PREV_INSN (seq_insn)), 0,
496 XVECLEN (PATTERN (PREV_INSN (seq_insn)), 0) - 1))
497 = seq_insn;
499 if (NEXT_INSN (seq_insn) && GET_CODE (NEXT_INSN (seq_insn)) == INSN
500 && GET_CODE (PATTERN (NEXT_INSN (seq_insn))) == SEQUENCE)
501 PREV_INSN (XVECEXP (PATTERN (NEXT_INSN (seq_insn)), 0, 0)) = seq_insn;
503 /* If there used to be a BARRIER, put it back. */
504 if (had_barrier)
505 emit_barrier_after (seq_insn);
507 if (i != length + 1)
508 abort ();
510 return seq_insn;
513 /* Add INSN to DELAY_LIST and return the head of the new list. The list must
514 be in the order in which the insns are to be executed. */
516 static rtx
517 add_to_delay_list (insn, delay_list)
518 rtx insn;
519 rtx delay_list;
521 /* If we have an empty list, just make a new list element. If
522 INSN has its block number recorded, clear it since we may
523 be moving the insn to a new block. */
525 if (delay_list == 0)
527 clear_hashed_info_for_insn (insn);
528 return gen_rtx_INSN_LIST (VOIDmode, insn, NULL_RTX);
531 /* Otherwise this must be an INSN_LIST. Add INSN to the end of the
532 list. */
533 XEXP (delay_list, 1) = add_to_delay_list (insn, XEXP (delay_list, 1));
535 return delay_list;
538 /* Delete INSN from the delay slot of the insn that it is in, which may
539 produce an insn with no delay slots. Return the new insn. */
541 static rtx
542 delete_from_delay_slot (insn)
543 rtx insn;
545 rtx trial, seq_insn, seq, prev;
546 rtx delay_list = 0;
547 int i;
549 /* We first must find the insn containing the SEQUENCE with INSN in its
550 delay slot. Do this by finding an insn, TRIAL, where
551 PREV_INSN (NEXT_INSN (TRIAL)) != TRIAL. */
553 for (trial = insn;
554 PREV_INSN (NEXT_INSN (trial)) == trial;
555 trial = NEXT_INSN (trial))
558 seq_insn = PREV_INSN (NEXT_INSN (trial));
559 seq = PATTERN (seq_insn);
561 /* Create a delay list consisting of all the insns other than the one
562 we are deleting (unless we were the only one). */
563 if (XVECLEN (seq, 0) > 2)
564 for (i = 1; i < XVECLEN (seq, 0); i++)
565 if (XVECEXP (seq, 0, i) != insn)
566 delay_list = add_to_delay_list (XVECEXP (seq, 0, i), delay_list);
568 /* Delete the old SEQUENCE, re-emit the insn that used to have the delay
569 list, and rebuild the delay list if non-empty. */
570 prev = PREV_INSN (seq_insn);
571 trial = XVECEXP (seq, 0, 0);
572 delete_insn (seq_insn);
573 add_insn_after (trial, prev);
575 if (GET_CODE (trial) == JUMP_INSN
576 && (simplejump_p (trial) || GET_CODE (PATTERN (trial)) == RETURN))
577 emit_barrier_after (trial);
579 /* If there are any delay insns, remit them. Otherwise clear the
580 annul flag. */
581 if (delay_list)
582 trial = emit_delay_sequence (trial, delay_list, XVECLEN (seq, 0) - 2);
583 else
584 INSN_ANNULLED_BRANCH_P (trial) = 0;
586 INSN_FROM_TARGET_P (insn) = 0;
588 /* Show we need to fill this insn again. */
589 obstack_ptr_grow (&unfilled_slots_obstack, trial);
591 return trial;
594 /* Delete INSN, a JUMP_INSN. If it is a conditional jump, we must track down
595 the insn that sets CC0 for it and delete it too. */
597 static void
598 delete_scheduled_jump (insn)
599 rtx insn;
601 /* Delete the insn that sets cc0 for us. On machines without cc0, we could
602 delete the insn that sets the condition code, but it is hard to find it.
603 Since this case is rare anyway, don't bother trying; there would likely
604 be other insns that became dead anyway, which we wouldn't know to
605 delete. */
607 #ifdef HAVE_cc0
608 if (reg_mentioned_p (cc0_rtx, insn))
610 rtx note = find_reg_note (insn, REG_CC_SETTER, NULL_RTX);
612 /* If a reg-note was found, it points to an insn to set CC0. This
613 insn is in the delay list of some other insn. So delete it from
614 the delay list it was in. */
615 if (note)
617 if (! FIND_REG_INC_NOTE (XEXP (note, 0), NULL_RTX)
618 && sets_cc0_p (PATTERN (XEXP (note, 0))) == 1)
619 delete_from_delay_slot (XEXP (note, 0));
621 else
623 /* The insn setting CC0 is our previous insn, but it may be in
624 a delay slot. It will be the last insn in the delay slot, if
625 it is. */
626 rtx trial = previous_insn (insn);
627 if (GET_CODE (trial) == NOTE)
628 trial = prev_nonnote_insn (trial);
629 if (sets_cc0_p (PATTERN (trial)) != 1
630 || FIND_REG_INC_NOTE (trial, 0))
631 return;
632 if (PREV_INSN (NEXT_INSN (trial)) == trial)
633 delete_insn (trial);
634 else
635 delete_from_delay_slot (trial);
638 #endif
640 delete_insn (insn);
643 /* Counters for delay-slot filling. */
645 #define NUM_REORG_FUNCTIONS 2
646 #define MAX_DELAY_HISTOGRAM 3
647 #define MAX_REORG_PASSES 2
649 static int num_insns_needing_delays[NUM_REORG_FUNCTIONS][MAX_REORG_PASSES];
651 static int num_filled_delays[NUM_REORG_FUNCTIONS][MAX_DELAY_HISTOGRAM+1][MAX_REORG_PASSES];
653 static int reorg_pass_number;
655 static void
656 note_delay_statistics (slots_filled, index)
657 int slots_filled, index;
659 num_insns_needing_delays[index][reorg_pass_number]++;
660 if (slots_filled > MAX_DELAY_HISTOGRAM)
661 slots_filled = MAX_DELAY_HISTOGRAM;
662 num_filled_delays[index][slots_filled][reorg_pass_number]++;
665 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
667 /* Optimize the following cases:
669 1. When a conditional branch skips over only one instruction,
670 use an annulling branch and put that insn in the delay slot.
671 Use either a branch that annuls when the condition if true or
672 invert the test with a branch that annuls when the condition is
673 false. This saves insns, since otherwise we must copy an insn
674 from the L1 target.
676 (orig) (skip) (otherwise)
677 Bcc.n L1 Bcc',a L1 Bcc,a L1'
678 insn insn insn2
679 L1: L1: L1:
680 insn2 insn2 insn2
681 insn3 insn3 L1':
682 insn3
684 2. When a conditional branch skips over only one instruction,
685 and after that, it unconditionally branches somewhere else,
686 perform the similar optimization. This saves executing the
687 second branch in the case where the inverted condition is true.
689 Bcc.n L1 Bcc',a L2
690 insn insn
691 L1: L1:
692 Bra L2 Bra L2
694 INSN is a JUMP_INSN.
696 This should be expanded to skip over N insns, where N is the number
697 of delay slots required. */
699 static rtx
700 optimize_skip (insn)
701 register rtx insn;
703 register rtx trial = next_nonnote_insn (insn);
704 rtx next_trial = next_active_insn (trial);
705 rtx delay_list = 0;
706 rtx target_label;
707 int flags;
709 flags = get_jump_flags (insn, JUMP_LABEL (insn));
711 if (trial == 0
712 || GET_CODE (trial) != INSN
713 || GET_CODE (PATTERN (trial)) == SEQUENCE
714 || recog_memoized (trial) < 0
715 || (! eligible_for_annul_false (insn, 0, trial, flags)
716 && ! eligible_for_annul_true (insn, 0, trial, flags)))
717 return 0;
719 /* There are two cases where we are just executing one insn (we assume
720 here that a branch requires only one insn; this should be generalized
721 at some point): Where the branch goes around a single insn or where
722 we have one insn followed by a branch to the same label we branch to.
723 In both of these cases, inverting the jump and annulling the delay
724 slot give the same effect in fewer insns. */
725 if ((next_trial == next_active_insn (JUMP_LABEL (insn))
726 && ! (next_trial == 0 && current_function_epilogue_delay_list != 0))
727 || (next_trial != 0
728 && GET_CODE (next_trial) == JUMP_INSN
729 && JUMP_LABEL (insn) == JUMP_LABEL (next_trial)
730 && (simplejump_p (next_trial)
731 || GET_CODE (PATTERN (next_trial)) == RETURN)))
733 if (eligible_for_annul_false (insn, 0, trial, flags))
735 if (invert_jump (insn, JUMP_LABEL (insn)))
736 INSN_FROM_TARGET_P (trial) = 1;
737 else if (! eligible_for_annul_true (insn, 0, trial, flags))
738 return 0;
741 delay_list = add_to_delay_list (trial, NULL_RTX);
742 next_trial = next_active_insn (trial);
743 update_block (trial, trial);
744 delete_insn (trial);
746 /* Also, if we are targeting an unconditional
747 branch, thread our jump to the target of that branch. Don't
748 change this into a RETURN here, because it may not accept what
749 we have in the delay slot. We'll fix this up later. */
750 if (next_trial && GET_CODE (next_trial) == JUMP_INSN
751 && (simplejump_p (next_trial)
752 || GET_CODE (PATTERN (next_trial)) == RETURN))
754 target_label = JUMP_LABEL (next_trial);
755 if (target_label == 0)
756 target_label = find_end_label ();
758 /* Recompute the flags based on TARGET_LABEL since threading
759 the jump to TARGET_LABEL may change the direction of the
760 jump (which may change the circumstances in which the
761 delay slot is nullified). */
762 flags = get_jump_flags (insn, target_label);
763 if (eligible_for_annul_true (insn, 0, trial, flags))
764 reorg_redirect_jump (insn, target_label);
767 INSN_ANNULLED_BRANCH_P (insn) = 1;
770 return delay_list;
772 #endif
775 /* Encode and return branch direction and prediction information for
776 INSN assuming it will jump to LABEL.
778 Non conditional branches return no direction information and
779 are predicted as very likely taken. */
781 static int
782 get_jump_flags (insn, label)
783 rtx insn, label;
785 int flags;
787 /* get_jump_flags can be passed any insn with delay slots, these may
788 be INSNs, CALL_INSNs, or JUMP_INSNs. Only JUMP_INSNs have branch
789 direction information, and only if they are conditional jumps.
791 If LABEL is zero, then there is no way to determine the branch
792 direction. */
793 if (GET_CODE (insn) == JUMP_INSN
794 && (condjump_p (insn) || condjump_in_parallel_p (insn))
795 && INSN_UID (insn) <= max_uid
796 && label != 0
797 && INSN_UID (label) <= max_uid)
798 flags
799 = (uid_to_ruid[INSN_UID (label)] > uid_to_ruid[INSN_UID (insn)])
800 ? ATTR_FLAG_forward : ATTR_FLAG_backward;
801 /* No valid direction information. */
802 else
803 flags = 0;
805 /* If insn is a conditional branch call mostly_true_jump to get
806 determine the branch prediction.
808 Non conditional branches are predicted as very likely taken. */
809 if (GET_CODE (insn) == JUMP_INSN
810 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
812 int prediction;
814 prediction = mostly_true_jump (insn, get_branch_condition (insn, label));
815 switch (prediction)
817 case 2:
818 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
819 break;
820 case 1:
821 flags |= ATTR_FLAG_likely;
822 break;
823 case 0:
824 flags |= ATTR_FLAG_unlikely;
825 break;
826 case -1:
827 flags |= (ATTR_FLAG_very_unlikely | ATTR_FLAG_unlikely);
828 break;
830 default:
831 abort();
834 else
835 flags |= (ATTR_FLAG_very_likely | ATTR_FLAG_likely);
837 return flags;
840 /* Return 1 if INSN is a destination that will be branched to rarely (the
841 return point of a function); return 2 if DEST will be branched to very
842 rarely (a call to a function that doesn't return). Otherwise,
843 return 0. */
845 static int
846 rare_destination (insn)
847 rtx insn;
849 int jump_count = 0;
850 rtx next;
852 for (; insn; insn = next)
854 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == SEQUENCE)
855 insn = XVECEXP (PATTERN (insn), 0, 0);
857 next = NEXT_INSN (insn);
859 switch (GET_CODE (insn))
861 case CODE_LABEL:
862 return 0;
863 case BARRIER:
864 /* A BARRIER can either be after a JUMP_INSN or a CALL_INSN. We
865 don't scan past JUMP_INSNs, so any barrier we find here must
866 have been after a CALL_INSN and hence mean the call doesn't
867 return. */
868 return 2;
869 case JUMP_INSN:
870 if (GET_CODE (PATTERN (insn)) == RETURN)
871 return 1;
872 else if (simplejump_p (insn)
873 && jump_count++ < 10)
874 next = JUMP_LABEL (insn);
875 else
876 return 0;
878 default:
879 break;
883 /* If we got here it means we hit the end of the function. So this
884 is an unlikely destination. */
886 return 1;
889 /* Return truth value of the statement that this branch
890 is mostly taken. If we think that the branch is extremely likely
891 to be taken, we return 2. If the branch is slightly more likely to be
892 taken, return 1. If the branch is slightly less likely to be taken,
893 return 0 and if the branch is highly unlikely to be taken, return -1.
895 CONDITION, if non-zero, is the condition that JUMP_INSN is testing. */
897 static int
898 mostly_true_jump (jump_insn, condition)
899 rtx jump_insn, condition;
901 rtx target_label = JUMP_LABEL (jump_insn);
902 rtx insn;
903 int rare_dest = rare_destination (target_label);
904 int rare_fallthrough = rare_destination (NEXT_INSN (jump_insn));
906 /* If branch probabilities are available, then use that number since it
907 always gives a correct answer. */
908 if (flag_branch_probabilities)
910 rtx note = find_reg_note (jump_insn, REG_BR_PROB, 0);
911 if (note)
913 int prob = XINT (note, 0);
915 if (prob >= REG_BR_PROB_BASE * 9 / 10)
916 return 2;
917 else if (prob >= REG_BR_PROB_BASE / 2)
918 return 1;
919 else if (prob >= REG_BR_PROB_BASE / 10)
920 return 0;
921 else
922 return -1;
926 /* If this is a branch outside a loop, it is highly unlikely. */
927 if (GET_CODE (PATTERN (jump_insn)) == SET
928 && GET_CODE (SET_SRC (PATTERN (jump_insn))) == IF_THEN_ELSE
929 && ((GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 1)) == LABEL_REF
930 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 1)))
931 || (GET_CODE (XEXP (SET_SRC (PATTERN (jump_insn)), 2)) == LABEL_REF
932 && LABEL_OUTSIDE_LOOP_P (XEXP (SET_SRC (PATTERN (jump_insn)), 2)))))
933 return -1;
935 if (target_label)
937 /* If this is the test of a loop, it is very likely true. We scan
938 backwards from the target label. If we find a NOTE_INSN_LOOP_BEG
939 before the next real insn, we assume the branch is to the top of
940 the loop. */
941 for (insn = PREV_INSN (target_label);
942 insn && GET_CODE (insn) == NOTE;
943 insn = PREV_INSN (insn))
944 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_BEG)
945 return 2;
947 /* If this is a jump to the test of a loop, it is likely true. We scan
948 forwards from the target label. If we find a NOTE_INSN_LOOP_VTOP
949 before the next real insn, we assume the branch is to the loop branch
950 test. */
951 for (insn = NEXT_INSN (target_label);
952 insn && GET_CODE (insn) == NOTE;
953 insn = PREV_INSN (insn))
954 if (NOTE_LINE_NUMBER (insn) == NOTE_INSN_LOOP_VTOP)
955 return 1;
958 /* Look at the relative rarities of the fallthrough and destination. If
959 they differ, we can predict the branch that way. */
961 switch (rare_fallthrough - rare_dest)
963 case -2:
964 return -1;
965 case -1:
966 return 0;
967 case 0:
968 break;
969 case 1:
970 return 1;
971 case 2:
972 return 2;
975 /* If we couldn't figure out what this jump was, assume it won't be
976 taken. This should be rare. */
977 if (condition == 0)
978 return 0;
980 /* EQ tests are usually false and NE tests are usually true. Also,
981 most quantities are positive, so we can make the appropriate guesses
982 about signed comparisons against zero. */
983 switch (GET_CODE (condition))
985 case CONST_INT:
986 /* Unconditional branch. */
987 return 1;
988 case EQ:
989 return 0;
990 case NE:
991 return 1;
992 case LE:
993 case LT:
994 if (XEXP (condition, 1) == const0_rtx)
995 return 0;
996 break;
997 case GE:
998 case GT:
999 if (XEXP (condition, 1) == const0_rtx)
1000 return 1;
1001 break;
1003 default:
1004 break;
1007 /* Predict backward branches usually take, forward branches usually not. If
1008 we don't know whether this is forward or backward, assume the branch
1009 will be taken, since most are. */
1010 return (target_label == 0 || INSN_UID (jump_insn) > max_uid
1011 || INSN_UID (target_label) > max_uid
1012 || (uid_to_ruid[INSN_UID (jump_insn)]
1013 > uid_to_ruid[INSN_UID (target_label)]));
1016 /* Return the condition under which INSN will branch to TARGET. If TARGET
1017 is zero, return the condition under which INSN will return. If INSN is
1018 an unconditional branch, return const_true_rtx. If INSN isn't a simple
1019 type of jump, or it doesn't go to TARGET, return 0. */
1021 static rtx
1022 get_branch_condition (insn, target)
1023 rtx insn;
1024 rtx target;
1026 rtx pat = PATTERN (insn);
1027 rtx src;
1029 if (condjump_in_parallel_p (insn))
1030 pat = XVECEXP (pat, 0, 0);
1032 if (GET_CODE (pat) == RETURN)
1033 return target == 0 ? const_true_rtx : 0;
1035 else if (GET_CODE (pat) != SET || SET_DEST (pat) != pc_rtx)
1036 return 0;
1038 src = SET_SRC (pat);
1039 if (GET_CODE (src) == LABEL_REF && XEXP (src, 0) == target)
1040 return const_true_rtx;
1042 else if (GET_CODE (src) == IF_THEN_ELSE
1043 && ((target == 0 && GET_CODE (XEXP (src, 1)) == RETURN)
1044 || (GET_CODE (XEXP (src, 1)) == LABEL_REF
1045 && XEXP (XEXP (src, 1), 0) == target))
1046 && XEXP (src, 2) == pc_rtx)
1047 return XEXP (src, 0);
1049 else if (GET_CODE (src) == IF_THEN_ELSE
1050 && ((target == 0 && GET_CODE (XEXP (src, 2)) == RETURN)
1051 || (GET_CODE (XEXP (src, 2)) == LABEL_REF
1052 && XEXP (XEXP (src, 2), 0) == target))
1053 && XEXP (src, 1) == pc_rtx)
1054 return gen_rtx_fmt_ee (reverse_condition (GET_CODE (XEXP (src, 0))),
1055 GET_MODE (XEXP (src, 0)),
1056 XEXP (XEXP (src, 0), 0), XEXP (XEXP (src, 0), 1));
1058 return 0;
1061 /* Return non-zero if CONDITION is more strict than the condition of
1062 INSN, i.e., if INSN will always branch if CONDITION is true. */
1064 static int
1065 condition_dominates_p (condition, insn)
1066 rtx condition;
1067 rtx insn;
1069 rtx other_condition = get_branch_condition (insn, JUMP_LABEL (insn));
1070 enum rtx_code code = GET_CODE (condition);
1071 enum rtx_code other_code;
1073 if (rtx_equal_p (condition, other_condition)
1074 || other_condition == const_true_rtx)
1075 return 1;
1077 else if (condition == const_true_rtx || other_condition == 0)
1078 return 0;
1080 other_code = GET_CODE (other_condition);
1081 if (GET_RTX_LENGTH (code) != 2 || GET_RTX_LENGTH (other_code) != 2
1082 || ! rtx_equal_p (XEXP (condition, 0), XEXP (other_condition, 0))
1083 || ! rtx_equal_p (XEXP (condition, 1), XEXP (other_condition, 1)))
1084 return 0;
1086 return comparison_dominates_p (code, other_code);
1089 /* Return non-zero if redirecting JUMP to NEWLABEL does not invalidate
1090 any insns already in the delay slot of JUMP. */
1092 static int
1093 redirect_with_delay_slots_safe_p (jump, newlabel, seq)
1094 rtx jump, newlabel, seq;
1096 int flags, i;
1097 rtx pat = PATTERN (seq);
1099 /* Make sure all the delay slots of this jump would still
1100 be valid after threading the jump. If they are still
1101 valid, then return non-zero. */
1103 flags = get_jump_flags (jump, newlabel);
1104 for (i = 1; i < XVECLEN (pat, 0); i++)
1105 if (! (
1106 #ifdef ANNUL_IFFALSE_SLOTS
1107 (INSN_ANNULLED_BRANCH_P (jump)
1108 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1109 ? eligible_for_annul_false (jump, i - 1,
1110 XVECEXP (pat, 0, i), flags) :
1111 #endif
1112 #ifdef ANNUL_IFTRUE_SLOTS
1113 (INSN_ANNULLED_BRANCH_P (jump)
1114 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
1115 ? eligible_for_annul_true (jump, i - 1,
1116 XVECEXP (pat, 0, i), flags) :
1117 #endif
1118 eligible_for_delay (jump, i -1, XVECEXP (pat, 0, i), flags)))
1119 break;
1121 return (i == XVECLEN (pat, 0));
1124 /* Return non-zero if redirecting JUMP to NEWLABEL does not invalidate
1125 any insns we wish to place in the delay slot of JUMP. */
1127 static int
1128 redirect_with_delay_list_safe_p (jump, newlabel, delay_list)
1129 rtx jump, newlabel, delay_list;
1131 int flags, i;
1132 rtx li;
1134 /* Make sure all the insns in DELAY_LIST would still be
1135 valid after threading the jump. If they are still
1136 valid, then return non-zero. */
1138 flags = get_jump_flags (jump, newlabel);
1139 for (li = delay_list, i = 0; li; li = XEXP (li, 1), i++)
1140 if (! (
1141 #ifdef ANNUL_IFFALSE_SLOTS
1142 (INSN_ANNULLED_BRANCH_P (jump)
1143 && INSN_FROM_TARGET_P (XEXP (li, 0)))
1144 ? eligible_for_annul_false (jump, i, XEXP (li, 0), flags) :
1145 #endif
1146 #ifdef ANNUL_IFTRUE_SLOTS
1147 (INSN_ANNULLED_BRANCH_P (jump)
1148 && ! INSN_FROM_TARGET_P (XEXP (li, 0)))
1149 ? eligible_for_annul_true (jump, i, XEXP (li, 0), flags) :
1150 #endif
1151 eligible_for_delay (jump, i, XEXP (li, 0), flags)))
1152 break;
1154 return (li == NULL);
1157 /* DELAY_LIST is a list of insns that have already been placed into delay
1158 slots. See if all of them have the same annulling status as ANNUL_TRUE_P.
1159 If not, return 0; otherwise return 1. */
1161 static int
1162 check_annul_list_true_false (annul_true_p, delay_list)
1163 int annul_true_p;
1164 rtx delay_list;
1166 rtx temp;
1168 if (delay_list)
1170 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1172 rtx trial = XEXP (temp, 0);
1174 if ((annul_true_p && INSN_FROM_TARGET_P (trial))
1175 || (!annul_true_p && !INSN_FROM_TARGET_P (trial)))
1176 return 0;
1180 return 1;
1184 /* INSN branches to an insn whose pattern SEQ is a SEQUENCE. Given that
1185 the condition tested by INSN is CONDITION and the resources shown in
1186 OTHER_NEEDED are needed after INSN, see whether INSN can take all the insns
1187 from SEQ's delay list, in addition to whatever insns it may execute
1188 (in DELAY_LIST). SETS and NEEDED are denote resources already set and
1189 needed while searching for delay slot insns. Return the concatenated
1190 delay list if possible, otherwise, return 0.
1192 SLOTS_TO_FILL is the total number of slots required by INSN, and
1193 PSLOTS_FILLED points to the number filled so far (also the number of
1194 insns in DELAY_LIST). It is updated with the number that have been
1195 filled from the SEQUENCE, if any.
1197 PANNUL_P points to a non-zero value if we already know that we need
1198 to annul INSN. If this routine determines that annulling is needed,
1199 it may set that value non-zero.
1201 PNEW_THREAD points to a location that is to receive the place at which
1202 execution should continue. */
1204 static rtx
1205 steal_delay_list_from_target (insn, condition, seq, delay_list,
1206 sets, needed, other_needed,
1207 slots_to_fill, pslots_filled, pannul_p,
1208 pnew_thread)
1209 rtx insn, condition;
1210 rtx seq;
1211 rtx delay_list;
1212 struct resources *sets, *needed, *other_needed;
1213 int slots_to_fill;
1214 int *pslots_filled;
1215 int *pannul_p;
1216 rtx *pnew_thread;
1218 rtx temp;
1219 int slots_remaining = slots_to_fill - *pslots_filled;
1220 int total_slots_filled = *pslots_filled;
1221 rtx new_delay_list = 0;
1222 int must_annul = *pannul_p;
1223 int used_annul = 0;
1224 int i;
1225 struct resources cc_set;
1227 /* We can't do anything if there are more delay slots in SEQ than we
1228 can handle, or if we don't know that it will be a taken branch.
1229 We know that it will be a taken branch if it is either an unconditional
1230 branch or a conditional branch with a stricter branch condition.
1232 Also, exit if the branch has more than one set, since then it is computing
1233 other results that can't be ignored, e.g. the HPPA mov&branch instruction.
1234 ??? It may be possible to move other sets into INSN in addition to
1235 moving the instructions in the delay slots.
1237 We can not steal the delay list if one of the instructions in the
1238 current delay_list modifies the condition codes and the jump in the
1239 sequence is a conditional jump. We can not do this because we can
1240 not change the direction of the jump because the condition codes
1241 will effect the direction of the jump in the sequence. */
1243 CLEAR_RESOURCE (&cc_set);
1244 for (temp = delay_list; temp; temp = XEXP (temp, 1))
1246 rtx trial = XEXP (temp, 0);
1248 mark_set_resources (trial, &cc_set, 0, 1);
1249 if (insn_references_resource_p (XVECEXP (seq , 0, 0), &cc_set, 0))
1250 return delay_list;
1253 if (XVECLEN (seq, 0) - 1 > slots_remaining
1254 || ! condition_dominates_p (condition, XVECEXP (seq, 0, 0))
1255 || ! single_set (XVECEXP (seq, 0, 0)))
1256 return delay_list;
1258 for (i = 1; i < XVECLEN (seq, 0); i++)
1260 rtx trial = XVECEXP (seq, 0, i);
1261 int flags;
1263 if (insn_references_resource_p (trial, sets, 0)
1264 || insn_sets_resource_p (trial, needed, 0)
1265 || insn_sets_resource_p (trial, sets, 0)
1266 #ifdef HAVE_cc0
1267 /* If TRIAL sets CC0, we can't copy it, so we can't steal this
1268 delay list. */
1269 || find_reg_note (trial, REG_CC_USER, NULL_RTX)
1270 #endif
1271 /* If TRIAL is from the fallthrough code of an annulled branch insn
1272 in SEQ, we cannot use it. */
1273 || (INSN_ANNULLED_BRANCH_P (XVECEXP (seq, 0, 0))
1274 && ! INSN_FROM_TARGET_P (trial)))
1275 return delay_list;
1277 /* If this insn was already done (usually in a previous delay slot),
1278 pretend we put it in our delay slot. */
1279 if (redundant_insn (trial, insn, new_delay_list))
1280 continue;
1282 /* We will end up re-vectoring this branch, so compute flags
1283 based on jumping to the new label. */
1284 flags = get_jump_flags (insn, JUMP_LABEL (XVECEXP (seq, 0, 0)));
1286 if (! must_annul
1287 && ((condition == const_true_rtx
1288 || (! insn_sets_resource_p (trial, other_needed, 0)
1289 && ! may_trap_p (PATTERN (trial)))))
1290 ? eligible_for_delay (insn, total_slots_filled, trial, flags)
1291 : (must_annul || (delay_list == NULL && new_delay_list == NULL))
1292 && (must_annul = 1,
1293 check_annul_list_true_false (0, delay_list)
1294 && check_annul_list_true_false (0, new_delay_list)
1295 && eligible_for_annul_false (insn, total_slots_filled,
1296 trial, flags)))
1298 if (must_annul)
1299 used_annul = 1;
1300 temp = copy_rtx (trial);
1301 INSN_FROM_TARGET_P (temp) = 1;
1302 new_delay_list = add_to_delay_list (temp, new_delay_list);
1303 total_slots_filled++;
1305 if (--slots_remaining == 0)
1306 break;
1308 else
1309 return delay_list;
1312 /* Show the place to which we will be branching. */
1313 *pnew_thread = next_active_insn (JUMP_LABEL (XVECEXP (seq, 0, 0)));
1315 /* Add any new insns to the delay list and update the count of the
1316 number of slots filled. */
1317 *pslots_filled = total_slots_filled;
1318 if (used_annul)
1319 *pannul_p = 1;
1321 if (delay_list == 0)
1322 return new_delay_list;
1324 for (temp = new_delay_list; temp; temp = XEXP (temp, 1))
1325 delay_list = add_to_delay_list (XEXP (temp, 0), delay_list);
1327 return delay_list;
1330 /* Similar to steal_delay_list_from_target except that SEQ is on the
1331 fallthrough path of INSN. Here we only do something if the delay insn
1332 of SEQ is an unconditional branch. In that case we steal its delay slot
1333 for INSN since unconditional branches are much easier to fill. */
1335 static rtx
1336 steal_delay_list_from_fallthrough (insn, condition, seq,
1337 delay_list, sets, needed, other_needed,
1338 slots_to_fill, pslots_filled, pannul_p)
1339 rtx insn, condition;
1340 rtx seq;
1341 rtx delay_list;
1342 struct resources *sets, *needed, *other_needed;
1343 int slots_to_fill;
1344 int *pslots_filled;
1345 int *pannul_p;
1347 int i;
1348 int flags;
1349 int must_annul = *pannul_p;
1350 int used_annul = 0;
1352 flags = get_jump_flags (insn, JUMP_LABEL (insn));
1354 /* We can't do anything if SEQ's delay insn isn't an
1355 unconditional branch. */
1357 if (! simplejump_p (XVECEXP (seq, 0, 0))
1358 && GET_CODE (PATTERN (XVECEXP (seq, 0, 0))) != RETURN)
1359 return delay_list;
1361 for (i = 1; i < XVECLEN (seq, 0); i++)
1363 rtx trial = XVECEXP (seq, 0, i);
1365 /* If TRIAL sets CC0, stealing it will move it too far from the use
1366 of CC0. */
1367 if (insn_references_resource_p (trial, sets, 0)
1368 || insn_sets_resource_p (trial, needed, 0)
1369 || insn_sets_resource_p (trial, sets, 0)
1370 #ifdef HAVE_cc0
1371 || sets_cc0_p (PATTERN (trial))
1372 #endif
1375 break;
1377 /* If this insn was already done, we don't need it. */
1378 if (redundant_insn (trial, insn, delay_list))
1380 delete_from_delay_slot (trial);
1381 continue;
1384 if (! must_annul
1385 && ((condition == const_true_rtx
1386 || (! insn_sets_resource_p (trial, other_needed, 0)
1387 && ! may_trap_p (PATTERN (trial)))))
1388 ? eligible_for_delay (insn, *pslots_filled, trial, flags)
1389 : (must_annul || delay_list == NULL) && (must_annul = 1,
1390 check_annul_list_true_false (1, delay_list)
1391 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
1393 if (must_annul)
1394 used_annul = 1;
1395 delete_from_delay_slot (trial);
1396 delay_list = add_to_delay_list (trial, delay_list);
1398 if (++(*pslots_filled) == slots_to_fill)
1399 break;
1401 else
1402 break;
1405 if (used_annul)
1406 *pannul_p = 1;
1407 return delay_list;
1411 /* Try merging insns starting at THREAD which match exactly the insns in
1412 INSN's delay list.
1414 If all insns were matched and the insn was previously annulling, the
1415 annul bit will be cleared.
1417 For each insn that is merged, if the branch is or will be non-annulling,
1418 we delete the merged insn. */
1420 static void
1421 try_merge_delay_insns (insn, thread)
1422 rtx insn, thread;
1424 rtx trial, next_trial;
1425 rtx delay_insn = XVECEXP (PATTERN (insn), 0, 0);
1426 int annul_p = INSN_ANNULLED_BRANCH_P (delay_insn);
1427 int slot_number = 1;
1428 int num_slots = XVECLEN (PATTERN (insn), 0);
1429 rtx next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1430 struct resources set, needed;
1431 rtx merged_insns = 0;
1432 int i;
1433 int flags;
1435 flags = get_jump_flags (delay_insn, JUMP_LABEL (delay_insn));
1437 CLEAR_RESOURCE (&needed);
1438 CLEAR_RESOURCE (&set);
1440 /* If this is not an annulling branch, take into account anything needed in
1441 INSN's delay slot. This prevents two increments from being incorrectly
1442 folded into one. If we are annulling, this would be the correct
1443 thing to do. (The alternative, looking at things set in NEXT_TO_MATCH
1444 will essentially disable this optimization. This method is somewhat of
1445 a kludge, but I don't see a better way.) */
1446 if (! annul_p)
1447 for (i = 1 ; i < num_slots ; i++)
1448 if (XVECEXP (PATTERN (insn), 0, i))
1449 mark_referenced_resources (XVECEXP (PATTERN (insn), 0, i), &needed, 1);
1451 for (trial = thread; !stop_search_p (trial, 1); trial = next_trial)
1453 rtx pat = PATTERN (trial);
1454 rtx oldtrial = trial;
1456 next_trial = next_nonnote_insn (trial);
1458 /* TRIAL must be a CALL_INSN or INSN. Skip USE and CLOBBER. */
1459 if (GET_CODE (trial) == INSN
1460 && (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER))
1461 continue;
1463 if (GET_CODE (next_to_match) == GET_CODE (trial)
1464 #ifdef HAVE_cc0
1465 /* We can't share an insn that sets cc0. */
1466 && ! sets_cc0_p (pat)
1467 #endif
1468 && ! insn_references_resource_p (trial, &set, 1)
1469 && ! insn_sets_resource_p (trial, &set, 1)
1470 && ! insn_sets_resource_p (trial, &needed, 1)
1471 && (trial = try_split (pat, trial, 0)) != 0
1472 /* Update next_trial, in case try_split succeeded. */
1473 && (next_trial = next_nonnote_insn (trial))
1474 /* Likewise THREAD. */
1475 && (thread = oldtrial == thread ? trial : thread)
1476 && rtx_equal_p (PATTERN (next_to_match), PATTERN (trial))
1477 /* Have to test this condition if annul condition is different
1478 from (and less restrictive than) non-annulling one. */
1479 && eligible_for_delay (delay_insn, slot_number - 1, trial, flags))
1482 if (! annul_p)
1484 update_block (trial, thread);
1485 if (trial == thread)
1486 thread = next_active_insn (thread);
1488 delete_insn (trial);
1489 INSN_FROM_TARGET_P (next_to_match) = 0;
1491 else
1492 merged_insns = gen_rtx_INSN_LIST (VOIDmode, trial, merged_insns);
1494 if (++slot_number == num_slots)
1495 break;
1497 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1500 mark_set_resources (trial, &set, 0, 1);
1501 mark_referenced_resources (trial, &needed, 1);
1504 /* See if we stopped on a filled insn. If we did, try to see if its
1505 delay slots match. */
1506 if (slot_number != num_slots
1507 && trial && GET_CODE (trial) == INSN
1508 && GET_CODE (PATTERN (trial)) == SEQUENCE
1509 && ! INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (trial), 0, 0)))
1511 rtx pat = PATTERN (trial);
1512 rtx filled_insn = XVECEXP (pat, 0, 0);
1514 /* Account for resources set/needed by the filled insn. */
1515 mark_set_resources (filled_insn, &set, 0, 1);
1516 mark_referenced_resources (filled_insn, &needed, 1);
1518 for (i = 1; i < XVECLEN (pat, 0); i++)
1520 rtx dtrial = XVECEXP (pat, 0, i);
1522 if (! insn_references_resource_p (dtrial, &set, 1)
1523 && ! insn_sets_resource_p (dtrial, &set, 1)
1524 && ! insn_sets_resource_p (dtrial, &needed, 1)
1525 #ifdef HAVE_cc0
1526 && ! sets_cc0_p (PATTERN (dtrial))
1527 #endif
1528 && rtx_equal_p (PATTERN (next_to_match), PATTERN (dtrial))
1529 && eligible_for_delay (delay_insn, slot_number - 1, dtrial, flags))
1531 if (! annul_p)
1533 rtx new;
1535 update_block (dtrial, thread);
1536 new = delete_from_delay_slot (dtrial);
1537 if (INSN_DELETED_P (thread))
1538 thread = new;
1539 INSN_FROM_TARGET_P (next_to_match) = 0;
1541 else
1542 merged_insns = gen_rtx_INSN_LIST (SImode, dtrial,
1543 merged_insns);
1545 if (++slot_number == num_slots)
1546 break;
1548 next_to_match = XVECEXP (PATTERN (insn), 0, slot_number);
1550 else
1552 /* Keep track of the set/referenced resources for the delay
1553 slots of any trial insns we encounter. */
1554 mark_set_resources (dtrial, &set, 0, 1);
1555 mark_referenced_resources (dtrial, &needed, 1);
1560 /* If all insns in the delay slot have been matched and we were previously
1561 annulling the branch, we need not any more. In that case delete all the
1562 merged insns. Also clear the INSN_FROM_TARGET_P bit of each insn in
1563 the delay list so that we know that it isn't only being used at the
1564 target. */
1565 if (slot_number == num_slots && annul_p)
1567 for (; merged_insns; merged_insns = XEXP (merged_insns, 1))
1569 if (GET_MODE (merged_insns) == SImode)
1571 rtx new;
1573 update_block (XEXP (merged_insns, 0), thread);
1574 new = delete_from_delay_slot (XEXP (merged_insns, 0));
1575 if (INSN_DELETED_P (thread))
1576 thread = new;
1578 else
1580 update_block (XEXP (merged_insns, 0), thread);
1581 delete_insn (XEXP (merged_insns, 0));
1585 INSN_ANNULLED_BRANCH_P (delay_insn) = 0;
1587 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
1588 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i)) = 0;
1592 /* See if INSN is redundant with an insn in front of TARGET. Often this
1593 is called when INSN is a candidate for a delay slot of TARGET.
1594 DELAY_LIST are insns that will be placed in delay slots of TARGET in front
1595 of INSN. Often INSN will be redundant with an insn in a delay slot of
1596 some previous insn. This happens when we have a series of branches to the
1597 same label; in that case the first insn at the target might want to go
1598 into each of the delay slots.
1600 If we are not careful, this routine can take up a significant fraction
1601 of the total compilation time (4%), but only wins rarely. Hence we
1602 speed this routine up by making two passes. The first pass goes back
1603 until it hits a label and sees if it find an insn with an identical
1604 pattern. Only in this (relatively rare) event does it check for
1605 data conflicts.
1607 We do not split insns we encounter. This could cause us not to find a
1608 redundant insn, but the cost of splitting seems greater than the possible
1609 gain in rare cases. */
1611 static rtx
1612 redundant_insn (insn, target, delay_list)
1613 rtx insn;
1614 rtx target;
1615 rtx delay_list;
1617 rtx target_main = target;
1618 rtx ipat = PATTERN (insn);
1619 rtx trial, pat;
1620 struct resources needed, set;
1621 int i;
1623 /* If INSN has any REG_UNUSED notes, it can't match anything since we
1624 are allowed to not actually assign to such a register. */
1625 if (find_reg_note (insn, REG_UNUSED, NULL_RTX) != 0)
1626 return 0;
1628 /* Scan backwards looking for a match. */
1629 for (trial = PREV_INSN (target); trial; trial = PREV_INSN (trial))
1631 if (GET_CODE (trial) == CODE_LABEL)
1632 return 0;
1634 if (GET_RTX_CLASS (GET_CODE (trial)) != 'i')
1635 continue;
1637 pat = PATTERN (trial);
1638 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1639 continue;
1641 if (GET_CODE (pat) == SEQUENCE)
1643 /* Stop for a CALL and its delay slots because it is difficult to
1644 track its resource needs correctly. */
1645 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1646 return 0;
1648 /* Stop for an INSN or JUMP_INSN with delayed effects and its delay
1649 slots because it is difficult to track its resource needs
1650 correctly. */
1652 #ifdef INSN_SETS_ARE_DELAYED
1653 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1654 return 0;
1655 #endif
1657 #ifdef INSN_REFERENCES_ARE_DELAYED
1658 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1659 return 0;
1660 #endif
1662 /* See if any of the insns in the delay slot match, updating
1663 resource requirements as we go. */
1664 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1665 if (GET_CODE (XVECEXP (pat, 0, i)) == GET_CODE (insn)
1666 && rtx_equal_p (PATTERN (XVECEXP (pat, 0, i)), ipat)
1667 && ! find_reg_note (XVECEXP (pat, 0, i), REG_UNUSED, NULL_RTX))
1668 break;
1670 /* If found a match, exit this loop early. */
1671 if (i > 0)
1672 break;
1675 else if (GET_CODE (trial) == GET_CODE (insn) && rtx_equal_p (pat, ipat)
1676 && ! find_reg_note (trial, REG_UNUSED, NULL_RTX))
1677 break;
1680 /* If we didn't find an insn that matches, return 0. */
1681 if (trial == 0)
1682 return 0;
1684 /* See what resources this insn sets and needs. If they overlap, or
1685 if this insn references CC0, it can't be redundant. */
1687 CLEAR_RESOURCE (&needed);
1688 CLEAR_RESOURCE (&set);
1689 mark_set_resources (insn, &set, 0, 1);
1690 mark_referenced_resources (insn, &needed, 1);
1692 /* If TARGET is a SEQUENCE, get the main insn. */
1693 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1694 target_main = XVECEXP (PATTERN (target), 0, 0);
1696 if (resource_conflicts_p (&needed, &set)
1697 #ifdef HAVE_cc0
1698 || reg_mentioned_p (cc0_rtx, ipat)
1699 #endif
1700 /* The insn requiring the delay may not set anything needed or set by
1701 INSN. */
1702 || insn_sets_resource_p (target_main, &needed, 1)
1703 || insn_sets_resource_p (target_main, &set, 1))
1704 return 0;
1706 /* Insns we pass may not set either NEEDED or SET, so merge them for
1707 simpler tests. */
1708 needed.memory |= set.memory;
1709 needed.unch_memory |= set.unch_memory;
1710 IOR_HARD_REG_SET (needed.regs, set.regs);
1712 /* This insn isn't redundant if it conflicts with an insn that either is
1713 or will be in a delay slot of TARGET. */
1715 while (delay_list)
1717 if (insn_sets_resource_p (XEXP (delay_list, 0), &needed, 1))
1718 return 0;
1719 delay_list = XEXP (delay_list, 1);
1722 if (GET_CODE (target) == INSN && GET_CODE (PATTERN (target)) == SEQUENCE)
1723 for (i = 1; i < XVECLEN (PATTERN (target), 0); i++)
1724 if (insn_sets_resource_p (XVECEXP (PATTERN (target), 0, i), &needed, 1))
1725 return 0;
1727 /* Scan backwards until we reach a label or an insn that uses something
1728 INSN sets or sets something insn uses or sets. */
1730 for (trial = PREV_INSN (target);
1731 trial && GET_CODE (trial) != CODE_LABEL;
1732 trial = PREV_INSN (trial))
1734 if (GET_CODE (trial) != INSN && GET_CODE (trial) != CALL_INSN
1735 && GET_CODE (trial) != JUMP_INSN)
1736 continue;
1738 pat = PATTERN (trial);
1739 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
1740 continue;
1742 if (GET_CODE (pat) == SEQUENCE)
1744 /* If this is a CALL_INSN and its delay slots, it is hard to track
1745 the resource needs properly, so give up. */
1746 if (GET_CODE (XVECEXP (pat, 0, 0)) == CALL_INSN)
1747 return 0;
1749 /* If this is an INSN or JUMP_INSN with delayed effects, it
1750 is hard to track the resource needs properly, so give up. */
1752 #ifdef INSN_SETS_ARE_DELAYED
1753 if (INSN_SETS_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1754 return 0;
1755 #endif
1757 #ifdef INSN_REFERENCES_ARE_DELAYED
1758 if (INSN_REFERENCES_ARE_DELAYED (XVECEXP (pat, 0, 0)))
1759 return 0;
1760 #endif
1762 /* See if any of the insns in the delay slot match, updating
1763 resource requirements as we go. */
1764 for (i = XVECLEN (pat, 0) - 1; i > 0; i--)
1766 rtx candidate = XVECEXP (pat, 0, i);
1768 /* If an insn will be annulled if the branch is false, it isn't
1769 considered as a possible duplicate insn. */
1770 if (rtx_equal_p (PATTERN (candidate), ipat)
1771 && ! (INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1772 && INSN_FROM_TARGET_P (candidate)))
1774 /* Show that this insn will be used in the sequel. */
1775 INSN_FROM_TARGET_P (candidate) = 0;
1776 return candidate;
1779 /* Unless this is an annulled insn from the target of a branch,
1780 we must stop if it sets anything needed or set by INSN. */
1781 if ((! INSN_ANNULLED_BRANCH_P (XVECEXP (pat, 0, 0))
1782 || ! INSN_FROM_TARGET_P (candidate))
1783 && insn_sets_resource_p (candidate, &needed, 1))
1784 return 0;
1788 /* If the insn requiring the delay slot conflicts with INSN, we
1789 must stop. */
1790 if (insn_sets_resource_p (XVECEXP (pat, 0, 0), &needed, 1))
1791 return 0;
1793 else
1795 /* See if TRIAL is the same as INSN. */
1796 pat = PATTERN (trial);
1797 if (rtx_equal_p (pat, ipat))
1798 return trial;
1800 /* Can't go any further if TRIAL conflicts with INSN. */
1801 if (insn_sets_resource_p (trial, &needed, 1))
1802 return 0;
1806 return 0;
1809 /* Return 1 if THREAD can only be executed in one way. If LABEL is non-zero,
1810 it is the target of the branch insn being scanned. If ALLOW_FALLTHROUGH
1811 is non-zero, we are allowed to fall into this thread; otherwise, we are
1812 not.
1814 If LABEL is used more than one or we pass a label other than LABEL before
1815 finding an active insn, we do not own this thread. */
1817 static int
1818 own_thread_p (thread, label, allow_fallthrough)
1819 rtx thread;
1820 rtx label;
1821 int allow_fallthrough;
1823 rtx active_insn;
1824 rtx insn;
1826 /* We don't own the function end. */
1827 if (thread == 0)
1828 return 0;
1830 /* Get the first active insn, or THREAD, if it is an active insn. */
1831 active_insn = next_active_insn (PREV_INSN (thread));
1833 for (insn = thread; insn != active_insn; insn = NEXT_INSN (insn))
1834 if (GET_CODE (insn) == CODE_LABEL
1835 && (insn != label || LABEL_NUSES (insn) != 1))
1836 return 0;
1838 if (allow_fallthrough)
1839 return 1;
1841 /* Ensure that we reach a BARRIER before any insn or label. */
1842 for (insn = prev_nonnote_insn (thread);
1843 insn == 0 || GET_CODE (insn) != BARRIER;
1844 insn = prev_nonnote_insn (insn))
1845 if (insn == 0
1846 || GET_CODE (insn) == CODE_LABEL
1847 || (GET_CODE (insn) == INSN
1848 && GET_CODE (PATTERN (insn)) != USE
1849 && GET_CODE (PATTERN (insn)) != CLOBBER))
1850 return 0;
1852 return 1;
1855 /* Called when INSN is being moved from a location near the target of a jump.
1856 We leave a marker of the form (use (INSN)) immediately in front
1857 of WHERE for mark_target_live_regs. These markers will be deleted when
1858 reorg finishes.
1860 We used to try to update the live status of registers if WHERE is at
1861 the start of a basic block, but that can't work since we may remove a
1862 BARRIER in relax_delay_slots. */
1864 static void
1865 update_block (insn, where)
1866 rtx insn;
1867 rtx where;
1869 /* Ignore if this was in a delay slot and it came from the target of
1870 a branch. */
1871 if (INSN_FROM_TARGET_P (insn))
1872 return;
1874 emit_insn_before (gen_rtx_USE (VOIDmode, insn), where);
1876 /* INSN might be making a value live in a block where it didn't use to
1877 be. So recompute liveness information for this block. */
1879 incr_ticks_for_insn (insn);
1882 /* Similar to REDIRECT_JUMP except that we update the BB_TICKS entry for
1883 the basic block containing the jump. */
1885 static int
1886 reorg_redirect_jump (jump, nlabel)
1887 rtx jump;
1888 rtx nlabel;
1890 incr_ticks_for_insn (jump);
1891 return redirect_jump (jump, nlabel);
1894 /* Called when INSN is being moved forward into a delay slot of DELAYED_INSN.
1895 We check every instruction between INSN and DELAYED_INSN for REG_DEAD notes
1896 that reference values used in INSN. If we find one, then we move the
1897 REG_DEAD note to INSN.
1899 This is needed to handle the case where an later insn (after INSN) has a
1900 REG_DEAD note for a register used by INSN, and this later insn subsequently
1901 gets moved before a CODE_LABEL because it is a redundant insn. In this
1902 case, mark_target_live_regs may be confused into thinking the register
1903 is dead because it sees a REG_DEAD note immediately before a CODE_LABEL. */
1905 static void
1906 update_reg_dead_notes (insn, delayed_insn)
1907 rtx insn, delayed_insn;
1909 rtx p, link, next;
1911 for (p = next_nonnote_insn (insn); p != delayed_insn;
1912 p = next_nonnote_insn (p))
1913 for (link = REG_NOTES (p); link; link = next)
1915 next = XEXP (link, 1);
1917 if (REG_NOTE_KIND (link) != REG_DEAD
1918 || GET_CODE (XEXP (link, 0)) != REG)
1919 continue;
1921 if (reg_referenced_p (XEXP (link, 0), PATTERN (insn)))
1923 /* Move the REG_DEAD note from P to INSN. */
1924 remove_note (p, link);
1925 XEXP (link, 1) = REG_NOTES (insn);
1926 REG_NOTES (insn) = link;
1931 /* Called when an insn redundant with start_insn is deleted. If there
1932 is a REG_DEAD note for the target of start_insn between start_insn
1933 and stop_insn, then the REG_DEAD note needs to be deleted since the
1934 value no longer dies there.
1936 If the REG_DEAD note isn't deleted, then mark_target_live_regs may be
1937 confused into thinking the register is dead. */
1939 static void
1940 fix_reg_dead_note (start_insn, stop_insn)
1941 rtx start_insn, stop_insn;
1943 rtx p, link, next;
1945 for (p = next_nonnote_insn (start_insn); p != stop_insn;
1946 p = next_nonnote_insn (p))
1947 for (link = REG_NOTES (p); link; link = next)
1949 next = XEXP (link, 1);
1951 if (REG_NOTE_KIND (link) != REG_DEAD
1952 || GET_CODE (XEXP (link, 0)) != REG)
1953 continue;
1955 if (reg_set_p (XEXP (link, 0), PATTERN (start_insn)))
1957 remove_note (p, link);
1958 return;
1963 /* Delete any REG_UNUSED notes that exist on INSN but not on REDUNDANT_INSN.
1965 This handles the case of udivmodXi4 instructions which optimize their
1966 output depending on whether any REG_UNUSED notes are present.
1967 we must make sure that INSN calculates as many results as REDUNDANT_INSN
1968 does. */
1970 static void
1971 update_reg_unused_notes (insn, redundant_insn)
1972 rtx insn, redundant_insn;
1974 rtx link, next;
1976 for (link = REG_NOTES (insn); link; link = next)
1978 next = XEXP (link, 1);
1980 if (REG_NOTE_KIND (link) != REG_UNUSED
1981 || GET_CODE (XEXP (link, 0)) != REG)
1982 continue;
1984 if (! find_regno_note (redundant_insn, REG_UNUSED,
1985 REGNO (XEXP (link, 0))))
1986 remove_note (insn, link);
1990 /* Scan a function looking for insns that need a delay slot and find insns to
1991 put into the delay slot.
1993 NON_JUMPS_P is non-zero if we are to only try to fill non-jump insns (such
1994 as calls). We do these first since we don't want jump insns (that are
1995 easier to fill) to get the only insns that could be used for non-jump insns.
1996 When it is zero, only try to fill JUMP_INSNs.
1998 When slots are filled in this manner, the insns (including the
1999 delay_insn) are put together in a SEQUENCE rtx. In this fashion,
2000 it is possible to tell whether a delay slot has really been filled
2001 or not. `final' knows how to deal with this, by communicating
2002 through FINAL_SEQUENCE. */
2004 static void
2005 fill_simple_delay_slots (non_jumps_p)
2006 int non_jumps_p;
2008 register rtx insn, pat, trial, next_trial;
2009 register int i;
2010 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2011 struct resources needed, set;
2012 int slots_to_fill, slots_filled;
2013 rtx delay_list;
2015 for (i = 0; i < num_unfilled_slots; i++)
2017 int flags;
2018 /* Get the next insn to fill. If it has already had any slots assigned,
2019 we can't do anything with it. Maybe we'll improve this later. */
2021 insn = unfilled_slots_base[i];
2022 if (insn == 0
2023 || INSN_DELETED_P (insn)
2024 || (GET_CODE (insn) == INSN
2025 && GET_CODE (PATTERN (insn)) == SEQUENCE)
2026 || (GET_CODE (insn) == JUMP_INSN && non_jumps_p)
2027 || (GET_CODE (insn) != JUMP_INSN && ! non_jumps_p))
2028 continue;
2030 /* It may have been that this insn used to need delay slots, but
2031 now doesn't; ignore in that case. This can happen, for example,
2032 on the HP PA RISC, where the number of delay slots depends on
2033 what insns are nearby. */
2034 slots_to_fill = num_delay_slots (insn);
2036 /* Some machine description have defined instructions to have
2037 delay slots only in certain circumstances which may depend on
2038 nearby insns (which change due to reorg's actions).
2040 For example, the PA port normally has delay slots for unconditional
2041 jumps.
2043 However, the PA port claims such jumps do not have a delay slot
2044 if they are immediate successors of certain CALL_INSNs. This
2045 allows the port to favor filling the delay slot of the call with
2046 the unconditional jump. */
2047 if (slots_to_fill == 0)
2048 continue;
2050 /* This insn needs, or can use, some delay slots. SLOTS_TO_FILL
2051 says how many. After initialization, first try optimizing
2053 call _foo call _foo
2054 nop add %o7,.-L1,%o7
2055 b,a L1
2058 If this case applies, the delay slot of the call is filled with
2059 the unconditional jump. This is done first to avoid having the
2060 delay slot of the call filled in the backward scan. Also, since
2061 the unconditional jump is likely to also have a delay slot, that
2062 insn must exist when it is subsequently scanned.
2064 This is tried on each insn with delay slots as some machines
2065 have insns which perform calls, but are not represented as
2066 CALL_INSNs. */
2068 slots_filled = 0;
2069 delay_list = 0;
2071 if (GET_CODE (insn) == JUMP_INSN)
2072 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2073 else
2074 flags = get_jump_flags (insn, NULL_RTX);
2076 if ((trial = next_active_insn (insn))
2077 && GET_CODE (trial) == JUMP_INSN
2078 && simplejump_p (trial)
2079 && eligible_for_delay (insn, slots_filled, trial, flags)
2080 && no_labels_between_p (insn, trial))
2082 rtx *tmp;
2083 slots_filled++;
2084 delay_list = add_to_delay_list (trial, delay_list);
2086 /* TRIAL may have had its delay slot filled, then unfilled. When
2087 the delay slot is unfilled, TRIAL is placed back on the unfilled
2088 slots obstack. Unfortunately, it is placed on the end of the
2089 obstack, not in its original location. Therefore, we must search
2090 from entry i + 1 to the end of the unfilled slots obstack to
2091 try and find TRIAL. */
2092 tmp = &unfilled_slots_base[i + 1];
2093 while (*tmp != trial && tmp != unfilled_slots_next)
2094 tmp++;
2096 /* Remove the unconditional jump from consideration for delay slot
2097 filling and unthread it. */
2098 if (*tmp == trial)
2099 *tmp = 0;
2101 rtx next = NEXT_INSN (trial);
2102 rtx prev = PREV_INSN (trial);
2103 if (prev)
2104 NEXT_INSN (prev) = next;
2105 if (next)
2106 PREV_INSN (next) = prev;
2110 /* Now, scan backwards from the insn to search for a potential
2111 delay-slot candidate. Stop searching when a label or jump is hit.
2113 For each candidate, if it is to go into the delay slot (moved
2114 forward in execution sequence), it must not need or set any resources
2115 that were set by later insns and must not set any resources that
2116 are needed for those insns.
2118 The delay slot insn itself sets resources unless it is a call
2119 (in which case the called routine, not the insn itself, is doing
2120 the setting). */
2122 if (slots_filled < slots_to_fill)
2124 CLEAR_RESOURCE (&needed);
2125 CLEAR_RESOURCE (&set);
2126 mark_set_resources (insn, &set, 0, 0);
2127 mark_referenced_resources (insn, &needed, 0);
2129 for (trial = prev_nonnote_insn (insn); ! stop_search_p (trial, 1);
2130 trial = next_trial)
2132 next_trial = prev_nonnote_insn (trial);
2134 /* This must be an INSN or CALL_INSN. */
2135 pat = PATTERN (trial);
2137 /* USE and CLOBBER at this level was just for flow; ignore it. */
2138 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2139 continue;
2141 /* Check for resource conflict first, to avoid unnecessary
2142 splitting. */
2143 if (! insn_references_resource_p (trial, &set, 1)
2144 && ! insn_sets_resource_p (trial, &set, 1)
2145 && ! insn_sets_resource_p (trial, &needed, 1)
2146 #ifdef HAVE_cc0
2147 /* Can't separate set of cc0 from its use. */
2148 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2149 #endif
2152 trial = try_split (pat, trial, 1);
2153 next_trial = prev_nonnote_insn (trial);
2154 if (eligible_for_delay (insn, slots_filled, trial, flags))
2156 /* In this case, we are searching backward, so if we
2157 find insns to put on the delay list, we want
2158 to put them at the head, rather than the
2159 tail, of the list. */
2161 update_reg_dead_notes (trial, insn);
2162 delay_list = gen_rtx_INSN_LIST (VOIDmode,
2163 trial, delay_list);
2164 update_block (trial, trial);
2165 delete_insn (trial);
2166 if (slots_to_fill == ++slots_filled)
2167 break;
2168 continue;
2172 mark_set_resources (trial, &set, 0, 1);
2173 mark_referenced_resources (trial, &needed, 1);
2177 /* If all needed slots haven't been filled, we come here. */
2179 /* Try to optimize case of jumping around a single insn. */
2180 #if defined(ANNUL_IFFALSE_SLOTS) || defined(ANNUL_IFTRUE_SLOTS)
2181 if (slots_filled != slots_to_fill
2182 && delay_list == 0
2183 && GET_CODE (insn) == JUMP_INSN
2184 && (condjump_p (insn) || condjump_in_parallel_p (insn)))
2186 delay_list = optimize_skip (insn);
2187 if (delay_list)
2188 slots_filled += 1;
2190 #endif
2192 /* Try to get insns from beyond the insn needing the delay slot.
2193 These insns can neither set or reference resources set in insns being
2194 skipped, cannot set resources in the insn being skipped, and, if this
2195 is a CALL_INSN (or a CALL_INSN is passed), cannot trap (because the
2196 call might not return).
2198 There used to be code which continued past the target label if
2199 we saw all uses of the target label. This code did not work,
2200 because it failed to account for some instructions which were
2201 both annulled and marked as from the target. This can happen as a
2202 result of optimize_skip. Since this code was redundant with
2203 fill_eager_delay_slots anyways, it was just deleted. */
2205 if (slots_filled != slots_to_fill
2206 && (GET_CODE (insn) != JUMP_INSN
2207 || ((condjump_p (insn) || condjump_in_parallel_p (insn))
2208 && ! simplejump_p (insn)
2209 && JUMP_LABEL (insn) != 0)))
2211 rtx target = 0;
2212 int maybe_never = 0;
2213 struct resources needed_at_jump;
2215 CLEAR_RESOURCE (&needed);
2216 CLEAR_RESOURCE (&set);
2218 if (GET_CODE (insn) == CALL_INSN)
2220 mark_set_resources (insn, &set, 0, 1);
2221 mark_referenced_resources (insn, &needed, 1);
2222 maybe_never = 1;
2224 else
2226 mark_set_resources (insn, &set, 0, 1);
2227 mark_referenced_resources (insn, &needed, 1);
2228 if (GET_CODE (insn) == JUMP_INSN)
2229 target = JUMP_LABEL (insn);
2232 for (trial = next_nonnote_insn (insn); trial; trial = next_trial)
2234 rtx pat, trial_delay;
2236 next_trial = next_nonnote_insn (trial);
2238 if (GET_CODE (trial) == CODE_LABEL
2239 || GET_CODE (trial) == BARRIER)
2240 break;
2242 /* We must have an INSN, JUMP_INSN, or CALL_INSN. */
2243 pat = PATTERN (trial);
2245 /* Stand-alone USE and CLOBBER are just for flow. */
2246 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2247 continue;
2249 /* If this already has filled delay slots, get the insn needing
2250 the delay slots. */
2251 if (GET_CODE (pat) == SEQUENCE)
2252 trial_delay = XVECEXP (pat, 0, 0);
2253 else
2254 trial_delay = trial;
2256 /* If this is a jump insn to our target, indicate that we have
2257 seen another jump to it. If we aren't handling a conditional
2258 jump, stop our search. Otherwise, compute the needs at its
2259 target and add them to NEEDED. */
2260 if (GET_CODE (trial_delay) == JUMP_INSN)
2262 if (target == 0)
2263 break;
2264 else if (JUMP_LABEL (trial_delay) != target)
2266 rtx ninsn =
2267 next_active_insn (JUMP_LABEL (trial_delay));
2269 mark_target_live_regs (get_insns (), ninsn,
2270 &needed_at_jump);
2271 needed.memory |= needed_at_jump.memory;
2272 needed.unch_memory |= needed_at_jump.unch_memory;
2273 IOR_HARD_REG_SET (needed.regs, needed_at_jump.regs);
2277 /* See if we have a resource problem before we try to
2278 split. */
2279 if (target == 0
2280 && GET_CODE (pat) != SEQUENCE
2281 && ! insn_references_resource_p (trial, &set, 1)
2282 && ! insn_sets_resource_p (trial, &set, 1)
2283 && ! insn_sets_resource_p (trial, &needed, 1)
2284 #ifdef HAVE_cc0
2285 && ! (reg_mentioned_p (cc0_rtx, pat) && ! sets_cc0_p (pat))
2286 #endif
2287 && ! (maybe_never && may_trap_p (pat))
2288 && (trial = try_split (pat, trial, 0))
2289 && eligible_for_delay (insn, slots_filled, trial, flags))
2291 next_trial = next_nonnote_insn (trial);
2292 delay_list = add_to_delay_list (trial, delay_list);
2294 #ifdef HAVE_cc0
2295 if (reg_mentioned_p (cc0_rtx, pat))
2296 link_cc0_insns (trial);
2297 #endif
2299 delete_insn (trial);
2300 if (slots_to_fill == ++slots_filled)
2301 break;
2302 continue;
2305 mark_set_resources (trial, &set, 0, 1);
2306 mark_referenced_resources (trial, &needed, 1);
2308 /* Ensure we don't put insns between the setting of cc and the
2309 comparison by moving a setting of cc into an earlier delay
2310 slot since these insns could clobber the condition code. */
2311 set.cc = 1;
2313 /* If this is a call or jump, we might not get here. */
2314 if (GET_CODE (trial_delay) == CALL_INSN
2315 || GET_CODE (trial_delay) == JUMP_INSN)
2316 maybe_never = 1;
2319 /* If there are slots left to fill and our search was stopped by an
2320 unconditional branch, try the insn at the branch target. We can
2321 redirect the branch if it works.
2323 Don't do this if the insn at the branch target is a branch. */
2324 if (slots_to_fill != slots_filled
2325 && trial
2326 && GET_CODE (trial) == JUMP_INSN
2327 && simplejump_p (trial)
2328 && (target == 0 || JUMP_LABEL (trial) == target)
2329 && (next_trial = next_active_insn (JUMP_LABEL (trial))) != 0
2330 && ! (GET_CODE (next_trial) == INSN
2331 && GET_CODE (PATTERN (next_trial)) == SEQUENCE)
2332 && GET_CODE (next_trial) != JUMP_INSN
2333 && ! insn_references_resource_p (next_trial, &set, 1)
2334 && ! insn_sets_resource_p (next_trial, &set, 1)
2335 && ! insn_sets_resource_p (next_trial, &needed, 1)
2336 #ifdef HAVE_cc0
2337 && ! reg_mentioned_p (cc0_rtx, PATTERN (next_trial))
2338 #endif
2339 && ! (maybe_never && may_trap_p (PATTERN (next_trial)))
2340 && (next_trial = try_split (PATTERN (next_trial), next_trial, 0))
2341 && eligible_for_delay (insn, slots_filled, next_trial, flags))
2343 rtx new_label = next_active_insn (next_trial);
2345 if (new_label != 0)
2346 new_label = get_label_before (new_label);
2347 else
2348 new_label = find_end_label ();
2350 delay_list
2351 = add_to_delay_list (copy_rtx (next_trial), delay_list);
2352 slots_filled++;
2353 reorg_redirect_jump (trial, new_label);
2355 /* If we merged because we both jumped to the same place,
2356 redirect the original insn also. */
2357 if (target)
2358 reorg_redirect_jump (insn, new_label);
2362 /* If this is an unconditional jump, then try to get insns from the
2363 target of the jump. */
2364 if (GET_CODE (insn) == JUMP_INSN
2365 && simplejump_p (insn)
2366 && slots_filled != slots_to_fill)
2367 delay_list
2368 = fill_slots_from_thread (insn, const_true_rtx,
2369 next_active_insn (JUMP_LABEL (insn)),
2370 NULL, 1, 1,
2371 own_thread_p (JUMP_LABEL (insn),
2372 JUMP_LABEL (insn), 0),
2373 slots_to_fill, &slots_filled,
2374 delay_list);
2376 if (delay_list)
2377 unfilled_slots_base[i]
2378 = emit_delay_sequence (insn, delay_list, slots_filled);
2380 if (slots_to_fill == slots_filled)
2381 unfilled_slots_base[i] = 0;
2383 note_delay_statistics (slots_filled, 0);
2386 #ifdef DELAY_SLOTS_FOR_EPILOGUE
2387 /* See if the epilogue needs any delay slots. Try to fill them if so.
2388 The only thing we can do is scan backwards from the end of the
2389 function. If we did this in a previous pass, it is incorrect to do it
2390 again. */
2391 if (current_function_epilogue_delay_list)
2392 return;
2394 slots_to_fill = DELAY_SLOTS_FOR_EPILOGUE;
2395 if (slots_to_fill == 0)
2396 return;
2398 slots_filled = 0;
2399 CLEAR_RESOURCE (&set);
2401 /* The frame pointer and stack pointer are needed at the beginning of
2402 the epilogue, so instructions setting them can not be put in the
2403 epilogue delay slot. However, everything else needed at function
2404 end is safe, so we don't want to use end_of_function_needs here. */
2405 CLEAR_RESOURCE (&needed);
2406 if (frame_pointer_needed)
2408 SET_HARD_REG_BIT (needed.regs, FRAME_POINTER_REGNUM);
2409 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
2410 SET_HARD_REG_BIT (needed.regs, HARD_FRAME_POINTER_REGNUM);
2411 #endif
2412 #ifdef EXIT_IGNORE_STACK
2413 if (! EXIT_IGNORE_STACK
2414 || current_function_sp_is_unchanging)
2415 #endif
2416 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2418 else
2419 SET_HARD_REG_BIT (needed.regs, STACK_POINTER_REGNUM);
2421 #ifdef EPILOGUE_USES
2422 for (i = 0; i <FIRST_PSEUDO_REGISTER; i++)
2424 if (EPILOGUE_USES (i))
2425 SET_HARD_REG_BIT (needed.regs, i);
2427 #endif
2429 for (trial = get_last_insn (); ! stop_search_p (trial, 1);
2430 trial = PREV_INSN (trial))
2432 if (GET_CODE (trial) == NOTE)
2433 continue;
2434 pat = PATTERN (trial);
2435 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2436 continue;
2438 if (! insn_references_resource_p (trial, &set, 1)
2439 && ! insn_sets_resource_p (trial, &needed, 1)
2440 && ! insn_sets_resource_p (trial, &set, 1)
2441 #ifdef HAVE_cc0
2442 /* Don't want to mess with cc0 here. */
2443 && ! reg_mentioned_p (cc0_rtx, pat)
2444 #endif
2447 trial = try_split (pat, trial, 1);
2448 if (ELIGIBLE_FOR_EPILOGUE_DELAY (trial, slots_filled))
2450 /* Here as well we are searching backward, so put the
2451 insns we find on the head of the list. */
2453 current_function_epilogue_delay_list
2454 = gen_rtx_INSN_LIST (VOIDmode, trial,
2455 current_function_epilogue_delay_list);
2456 mark_end_of_function_resources (trial, 1);
2457 update_block (trial, trial);
2458 delete_insn (trial);
2460 /* Clear deleted bit so final.c will output the insn. */
2461 INSN_DELETED_P (trial) = 0;
2463 if (slots_to_fill == ++slots_filled)
2464 break;
2465 continue;
2469 mark_set_resources (trial, &set, 0, 1);
2470 mark_referenced_resources (trial, &needed, 1);
2473 note_delay_statistics (slots_filled, 0);
2474 #endif
2477 /* Try to find insns to place in delay slots.
2479 INSN is the jump needing SLOTS_TO_FILL delay slots. It tests CONDITION
2480 or is an unconditional branch if CONDITION is const_true_rtx.
2481 *PSLOTS_FILLED is updated with the number of slots that we have filled.
2483 THREAD is a flow-of-control, either the insns to be executed if the
2484 branch is true or if the branch is false, THREAD_IF_TRUE says which.
2486 OPPOSITE_THREAD is the thread in the opposite direction. It is used
2487 to see if any potential delay slot insns set things needed there.
2489 LIKELY is non-zero if it is extremely likely that the branch will be
2490 taken and THREAD_IF_TRUE is set. This is used for the branch at the
2491 end of a loop back up to the top.
2493 OWN_THREAD and OWN_OPPOSITE_THREAD are true if we are the only user of the
2494 thread. I.e., it is the fallthrough code of our jump or the target of the
2495 jump when we are the only jump going there.
2497 If OWN_THREAD is false, it must be the "true" thread of a jump. In that
2498 case, we can only take insns from the head of the thread for our delay
2499 slot. We then adjust the jump to point after the insns we have taken. */
2501 static rtx
2502 fill_slots_from_thread (insn, condition, thread, opposite_thread, likely,
2503 thread_if_true, own_thread,
2504 slots_to_fill, pslots_filled, delay_list)
2505 rtx insn;
2506 rtx condition;
2507 rtx thread, opposite_thread;
2508 int likely;
2509 int thread_if_true;
2510 int own_thread;
2511 int slots_to_fill, *pslots_filled;
2512 rtx delay_list;
2514 rtx new_thread;
2515 struct resources opposite_needed, set, needed;
2516 rtx trial;
2517 int lose = 0;
2518 int must_annul = 0;
2519 int flags;
2521 /* Validate our arguments. */
2522 if ((condition == const_true_rtx && ! thread_if_true)
2523 || (! own_thread && ! thread_if_true))
2524 abort ();
2526 flags = get_jump_flags (insn, JUMP_LABEL (insn));
2528 /* If our thread is the end of subroutine, we can't get any delay
2529 insns from that. */
2530 if (thread == 0)
2531 return delay_list;
2533 /* If this is an unconditional branch, nothing is needed at the
2534 opposite thread. Otherwise, compute what is needed there. */
2535 if (condition == const_true_rtx)
2536 CLEAR_RESOURCE (&opposite_needed);
2537 else
2538 mark_target_live_regs (get_insns (), opposite_thread, &opposite_needed);
2540 /* If the insn at THREAD can be split, do it here to avoid having to
2541 update THREAD and NEW_THREAD if it is done in the loop below. Also
2542 initialize NEW_THREAD. */
2544 new_thread = thread = try_split (PATTERN (thread), thread, 0);
2546 /* Scan insns at THREAD. We are looking for an insn that can be removed
2547 from THREAD (it neither sets nor references resources that were set
2548 ahead of it and it doesn't set anything needs by the insns ahead of
2549 it) and that either can be placed in an annulling insn or aren't
2550 needed at OPPOSITE_THREAD. */
2552 CLEAR_RESOURCE (&needed);
2553 CLEAR_RESOURCE (&set);
2555 /* If we do not own this thread, we must stop as soon as we find
2556 something that we can't put in a delay slot, since all we can do
2557 is branch into THREAD at a later point. Therefore, labels stop
2558 the search if this is not the `true' thread. */
2560 for (trial = thread;
2561 ! stop_search_p (trial, ! thread_if_true) && (! lose || own_thread);
2562 trial = next_nonnote_insn (trial))
2564 rtx pat, old_trial;
2566 /* If we have passed a label, we no longer own this thread. */
2567 if (GET_CODE (trial) == CODE_LABEL)
2569 own_thread = 0;
2570 continue;
2573 pat = PATTERN (trial);
2574 if (GET_CODE (pat) == USE || GET_CODE (pat) == CLOBBER)
2575 continue;
2577 /* If TRIAL conflicts with the insns ahead of it, we lose. Also,
2578 don't separate or copy insns that set and use CC0. */
2579 if (! insn_references_resource_p (trial, &set, 1)
2580 && ! insn_sets_resource_p (trial, &set, 1)
2581 && ! insn_sets_resource_p (trial, &needed, 1)
2582 #ifdef HAVE_cc0
2583 && ! (reg_mentioned_p (cc0_rtx, pat)
2584 && (! own_thread || ! sets_cc0_p (pat)))
2585 #endif
2588 rtx prior_insn;
2590 /* If TRIAL is redundant with some insn before INSN, we don't
2591 actually need to add it to the delay list; we can merely pretend
2592 we did. */
2593 if ((prior_insn = redundant_insn (trial, insn, delay_list)))
2595 fix_reg_dead_note (prior_insn, insn);
2596 if (own_thread)
2598 update_block (trial, thread);
2599 if (trial == thread)
2601 thread = next_active_insn (thread);
2602 if (new_thread == trial)
2603 new_thread = thread;
2606 delete_insn (trial);
2608 else
2610 update_reg_unused_notes (prior_insn, trial);
2611 new_thread = next_active_insn (trial);
2614 continue;
2617 /* There are two ways we can win: If TRIAL doesn't set anything
2618 needed at the opposite thread and can't trap, or if it can
2619 go into an annulled delay slot. */
2620 if (!must_annul
2621 && (condition == const_true_rtx
2622 || (! insn_sets_resource_p (trial, &opposite_needed, 1)
2623 && ! may_trap_p (pat))))
2625 old_trial = trial;
2626 trial = try_split (pat, trial, 0);
2627 if (new_thread == old_trial)
2628 new_thread = trial;
2629 if (thread == old_trial)
2630 thread = trial;
2631 pat = PATTERN (trial);
2632 if (eligible_for_delay (insn, *pslots_filled, trial, flags))
2633 goto winner;
2635 else if (0
2636 #ifdef ANNUL_IFTRUE_SLOTS
2637 || ! thread_if_true
2638 #endif
2639 #ifdef ANNUL_IFFALSE_SLOTS
2640 || thread_if_true
2641 #endif
2644 old_trial = trial;
2645 trial = try_split (pat, trial, 0);
2646 if (new_thread == old_trial)
2647 new_thread = trial;
2648 if (thread == old_trial)
2649 thread = trial;
2650 pat = PATTERN (trial);
2651 if ((must_annul || delay_list == NULL) && (thread_if_true
2652 ? check_annul_list_true_false (0, delay_list)
2653 && eligible_for_annul_false (insn, *pslots_filled, trial, flags)
2654 : check_annul_list_true_false (1, delay_list)
2655 && eligible_for_annul_true (insn, *pslots_filled, trial, flags)))
2657 rtx temp;
2659 must_annul = 1;
2660 winner:
2662 #ifdef HAVE_cc0
2663 if (reg_mentioned_p (cc0_rtx, pat))
2664 link_cc0_insns (trial);
2665 #endif
2667 /* If we own this thread, delete the insn. If this is the
2668 destination of a branch, show that a basic block status
2669 may have been updated. In any case, mark the new
2670 starting point of this thread. */
2671 if (own_thread)
2673 update_block (trial, thread);
2674 if (trial == thread)
2676 thread = next_active_insn (thread);
2677 if (new_thread == trial)
2678 new_thread = thread;
2680 delete_insn (trial);
2682 else
2683 new_thread = next_active_insn (trial);
2685 temp = own_thread ? trial : copy_rtx (trial);
2686 if (thread_if_true)
2687 INSN_FROM_TARGET_P (temp) = 1;
2689 delay_list = add_to_delay_list (temp, delay_list);
2691 if (slots_to_fill == ++(*pslots_filled))
2693 /* Even though we have filled all the slots, we
2694 may be branching to a location that has a
2695 redundant insn. Skip any if so. */
2696 while (new_thread && ! own_thread
2697 && ! insn_sets_resource_p (new_thread, &set, 1)
2698 && ! insn_sets_resource_p (new_thread, &needed, 1)
2699 && ! insn_references_resource_p (new_thread,
2700 &set, 1)
2701 && (prior_insn
2702 = redundant_insn (new_thread, insn,
2703 delay_list)))
2705 /* We know we do not own the thread, so no need
2706 to call update_block and delete_insn. */
2707 fix_reg_dead_note (prior_insn, insn);
2708 update_reg_unused_notes (prior_insn, new_thread);
2709 new_thread = next_active_insn (new_thread);
2711 break;
2714 continue;
2719 /* This insn can't go into a delay slot. */
2720 lose = 1;
2721 mark_set_resources (trial, &set, 0, 1);
2722 mark_referenced_resources (trial, &needed, 1);
2724 /* Ensure we don't put insns between the setting of cc and the comparison
2725 by moving a setting of cc into an earlier delay slot since these insns
2726 could clobber the condition code. */
2727 set.cc = 1;
2729 /* If this insn is a register-register copy and the next insn has
2730 a use of our destination, change it to use our source. That way,
2731 it will become a candidate for our delay slot the next time
2732 through this loop. This case occurs commonly in loops that
2733 scan a list.
2735 We could check for more complex cases than those tested below,
2736 but it doesn't seem worth it. It might also be a good idea to try
2737 to swap the two insns. That might do better.
2739 We can't do this if the next insn modifies our destination, because
2740 that would make the replacement into the insn invalid. We also can't
2741 do this if it modifies our source, because it might be an earlyclobber
2742 operand. This latter test also prevents updating the contents of
2743 a PRE_INC. */
2745 if (GET_CODE (trial) == INSN && GET_CODE (pat) == SET
2746 && GET_CODE (SET_SRC (pat)) == REG
2747 && GET_CODE (SET_DEST (pat)) == REG)
2749 rtx next = next_nonnote_insn (trial);
2751 if (next && GET_CODE (next) == INSN
2752 && GET_CODE (PATTERN (next)) != USE
2753 && ! reg_set_p (SET_DEST (pat), next)
2754 && ! reg_set_p (SET_SRC (pat), next)
2755 && reg_referenced_p (SET_DEST (pat), PATTERN (next))
2756 && ! modified_in_p (SET_DEST (pat), next))
2757 validate_replace_rtx (SET_DEST (pat), SET_SRC (pat), next);
2761 /* If we stopped on a branch insn that has delay slots, see if we can
2762 steal some of the insns in those slots. */
2763 if (trial && GET_CODE (trial) == INSN
2764 && GET_CODE (PATTERN (trial)) == SEQUENCE
2765 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN)
2767 /* If this is the `true' thread, we will want to follow the jump,
2768 so we can only do this if we have taken everything up to here. */
2769 if (thread_if_true && trial == new_thread)
2770 delay_list
2771 = steal_delay_list_from_target (insn, condition, PATTERN (trial),
2772 delay_list, &set, &needed,
2773 &opposite_needed, slots_to_fill,
2774 pslots_filled, &must_annul,
2775 &new_thread);
2776 else if (! thread_if_true)
2777 delay_list
2778 = steal_delay_list_from_fallthrough (insn, condition,
2779 PATTERN (trial),
2780 delay_list, &set, &needed,
2781 &opposite_needed, slots_to_fill,
2782 pslots_filled, &must_annul);
2785 /* If we haven't found anything for this delay slot and it is very
2786 likely that the branch will be taken, see if the insn at our target
2787 increments or decrements a register with an increment that does not
2788 depend on the destination register. If so, try to place the opposite
2789 arithmetic insn after the jump insn and put the arithmetic insn in the
2790 delay slot. If we can't do this, return. */
2791 if (delay_list == 0 && likely && new_thread
2792 && GET_CODE (new_thread) == INSN
2793 && GET_CODE (PATTERN (new_thread)) != ASM_INPUT
2794 && asm_noperands (PATTERN (new_thread)) < 0)
2796 rtx pat = PATTERN (new_thread);
2797 rtx dest;
2798 rtx src;
2800 trial = new_thread;
2801 pat = PATTERN (trial);
2803 if (GET_CODE (trial) != INSN || GET_CODE (pat) != SET
2804 || ! eligible_for_delay (insn, 0, trial, flags))
2805 return 0;
2807 dest = SET_DEST (pat), src = SET_SRC (pat);
2808 if ((GET_CODE (src) == PLUS || GET_CODE (src) == MINUS)
2809 && rtx_equal_p (XEXP (src, 0), dest)
2810 && ! reg_overlap_mentioned_p (dest, XEXP (src, 1)))
2812 rtx other = XEXP (src, 1);
2813 rtx new_arith;
2814 rtx ninsn;
2816 /* If this is a constant adjustment, use the same code with
2817 the negated constant. Otherwise, reverse the sense of the
2818 arithmetic. */
2819 if (GET_CODE (other) == CONST_INT)
2820 new_arith = gen_rtx_fmt_ee (GET_CODE (src), GET_MODE (src), dest,
2821 negate_rtx (GET_MODE (src), other));
2822 else
2823 new_arith = gen_rtx_fmt_ee (GET_CODE (src) == PLUS ? MINUS : PLUS,
2824 GET_MODE (src), dest, other);
2826 ninsn = emit_insn_after (gen_rtx_SET (VOIDmode, dest, new_arith),
2827 insn);
2829 if (recog_memoized (ninsn) < 0
2830 || (extract_insn (ninsn), ! constrain_operands (1)))
2832 delete_insn (ninsn);
2833 return 0;
2836 if (own_thread)
2838 update_block (trial, thread);
2839 if (trial == thread)
2841 thread = next_active_insn (thread);
2842 if (new_thread == trial)
2843 new_thread = thread;
2845 delete_insn (trial);
2847 else
2848 new_thread = next_active_insn (trial);
2850 ninsn = own_thread ? trial : copy_rtx (trial);
2851 if (thread_if_true)
2852 INSN_FROM_TARGET_P (ninsn) = 1;
2854 delay_list = add_to_delay_list (ninsn, NULL_RTX);
2855 (*pslots_filled)++;
2859 if (delay_list && must_annul)
2860 INSN_ANNULLED_BRANCH_P (insn) = 1;
2862 /* If we are to branch into the middle of this thread, find an appropriate
2863 label or make a new one if none, and redirect INSN to it. If we hit the
2864 end of the function, use the end-of-function label. */
2865 if (new_thread != thread)
2867 rtx label;
2869 if (! thread_if_true)
2870 abort ();
2872 if (new_thread && GET_CODE (new_thread) == JUMP_INSN
2873 && (simplejump_p (new_thread)
2874 || GET_CODE (PATTERN (new_thread)) == RETURN)
2875 && redirect_with_delay_list_safe_p (insn,
2876 JUMP_LABEL (new_thread),
2877 delay_list))
2878 new_thread = follow_jumps (JUMP_LABEL (new_thread));
2880 if (new_thread == 0)
2881 label = find_end_label ();
2882 else if (GET_CODE (new_thread) == CODE_LABEL)
2883 label = new_thread;
2884 else
2885 label = get_label_before (new_thread);
2887 reorg_redirect_jump (insn, label);
2890 return delay_list;
2893 /* Make another attempt to find insns to place in delay slots.
2895 We previously looked for insns located in front of the delay insn
2896 and, for non-jump delay insns, located behind the delay insn.
2898 Here only try to schedule jump insns and try to move insns from either
2899 the target or the following insns into the delay slot. If annulling is
2900 supported, we will be likely to do this. Otherwise, we can do this only
2901 if safe. */
2903 static void
2904 fill_eager_delay_slots ()
2906 register rtx insn;
2907 register int i;
2908 int num_unfilled_slots = unfilled_slots_next - unfilled_slots_base;
2910 for (i = 0; i < num_unfilled_slots; i++)
2912 rtx condition;
2913 rtx target_label, insn_at_target, fallthrough_insn;
2914 rtx delay_list = 0;
2915 int own_target;
2916 int own_fallthrough;
2917 int prediction, slots_to_fill, slots_filled;
2919 insn = unfilled_slots_base[i];
2920 if (insn == 0
2921 || INSN_DELETED_P (insn)
2922 || GET_CODE (insn) != JUMP_INSN
2923 || ! (condjump_p (insn) || condjump_in_parallel_p (insn)))
2924 continue;
2926 slots_to_fill = num_delay_slots (insn);
2927 /* Some machine description have defined instructions to have
2928 delay slots only in certain circumstances which may depend on
2929 nearby insns (which change due to reorg's actions).
2931 For example, the PA port normally has delay slots for unconditional
2932 jumps.
2934 However, the PA port claims such jumps do not have a delay slot
2935 if they are immediate successors of certain CALL_INSNs. This
2936 allows the port to favor filling the delay slot of the call with
2937 the unconditional jump. */
2938 if (slots_to_fill == 0)
2939 continue;
2941 slots_filled = 0;
2942 target_label = JUMP_LABEL (insn);
2943 condition = get_branch_condition (insn, target_label);
2945 if (condition == 0)
2946 continue;
2948 /* Get the next active fallthrough and target insns and see if we own
2949 them. Then see whether the branch is likely true. We don't need
2950 to do a lot of this for unconditional branches. */
2952 insn_at_target = next_active_insn (target_label);
2953 own_target = own_thread_p (target_label, target_label, 0);
2955 if (condition == const_true_rtx)
2957 own_fallthrough = 0;
2958 fallthrough_insn = 0;
2959 prediction = 2;
2961 else
2963 fallthrough_insn = next_active_insn (insn);
2964 own_fallthrough = own_thread_p (NEXT_INSN (insn), NULL_RTX, 1);
2965 prediction = mostly_true_jump (insn, condition);
2968 /* If this insn is expected to branch, first try to get insns from our
2969 target, then our fallthrough insns. If it is not, expected to branch,
2970 try the other order. */
2972 if (prediction > 0)
2974 delay_list
2975 = fill_slots_from_thread (insn, condition, insn_at_target,
2976 fallthrough_insn, prediction == 2, 1,
2977 own_target,
2978 slots_to_fill, &slots_filled, delay_list);
2980 if (delay_list == 0 && own_fallthrough)
2982 /* Even though we didn't find anything for delay slots,
2983 we might have found a redundant insn which we deleted
2984 from the thread that was filled. So we have to recompute
2985 the next insn at the target. */
2986 target_label = JUMP_LABEL (insn);
2987 insn_at_target = next_active_insn (target_label);
2989 delay_list
2990 = fill_slots_from_thread (insn, condition, fallthrough_insn,
2991 insn_at_target, 0, 0,
2992 own_fallthrough,
2993 slots_to_fill, &slots_filled,
2994 delay_list);
2997 else
2999 if (own_fallthrough)
3000 delay_list
3001 = fill_slots_from_thread (insn, condition, fallthrough_insn,
3002 insn_at_target, 0, 0,
3003 own_fallthrough,
3004 slots_to_fill, &slots_filled,
3005 delay_list);
3007 if (delay_list == 0)
3008 delay_list
3009 = fill_slots_from_thread (insn, condition, insn_at_target,
3010 next_active_insn (insn), 0, 1,
3011 own_target,
3012 slots_to_fill, &slots_filled,
3013 delay_list);
3016 if (delay_list)
3017 unfilled_slots_base[i]
3018 = emit_delay_sequence (insn, delay_list, slots_filled);
3020 if (slots_to_fill == slots_filled)
3021 unfilled_slots_base[i] = 0;
3023 note_delay_statistics (slots_filled, 1);
3027 /* Once we have tried two ways to fill a delay slot, make a pass over the
3028 code to try to improve the results and to do such things as more jump
3029 threading. */
3031 static void
3032 relax_delay_slots (first)
3033 rtx first;
3035 register rtx insn, next, pat;
3036 register rtx trial, delay_insn, target_label;
3038 /* Look at every JUMP_INSN and see if we can improve it. */
3039 for (insn = first; insn; insn = next)
3041 rtx other;
3043 next = next_active_insn (insn);
3045 /* If this is a jump insn, see if it now jumps to a jump, jumps to
3046 the next insn, or jumps to a label that is not the last of a
3047 group of consecutive labels. */
3048 if (GET_CODE (insn) == JUMP_INSN
3049 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3050 && (target_label = JUMP_LABEL (insn)) != 0)
3052 target_label = follow_jumps (target_label);
3053 target_label = prev_label (next_active_insn (target_label));
3055 if (target_label == 0)
3056 target_label = find_end_label ();
3058 if (next_active_insn (target_label) == next
3059 && ! condjump_in_parallel_p (insn))
3061 delete_jump (insn);
3062 continue;
3065 if (target_label != JUMP_LABEL (insn))
3066 reorg_redirect_jump (insn, target_label);
3068 /* See if this jump branches around a unconditional jump.
3069 If so, invert this jump and point it to the target of the
3070 second jump. */
3071 if (next && GET_CODE (next) == JUMP_INSN
3072 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3073 && next_active_insn (target_label) == next_active_insn (next)
3074 && no_labels_between_p (insn, next))
3076 rtx label = JUMP_LABEL (next);
3078 /* Be careful how we do this to avoid deleting code or
3079 labels that are momentarily dead. See similar optimization
3080 in jump.c.
3082 We also need to ensure we properly handle the case when
3083 invert_jump fails. */
3085 ++LABEL_NUSES (target_label);
3086 if (label)
3087 ++LABEL_NUSES (label);
3089 if (invert_jump (insn, label))
3091 delete_insn (next);
3092 next = insn;
3095 if (label)
3096 --LABEL_NUSES (label);
3098 if (--LABEL_NUSES (target_label) == 0)
3099 delete_insn (target_label);
3101 continue;
3105 /* If this is an unconditional jump and the previous insn is a
3106 conditional jump, try reversing the condition of the previous
3107 insn and swapping our targets. The next pass might be able to
3108 fill the slots.
3110 Don't do this if we expect the conditional branch to be true, because
3111 we would then be making the more common case longer. */
3113 if (GET_CODE (insn) == JUMP_INSN
3114 && (simplejump_p (insn) || GET_CODE (PATTERN (insn)) == RETURN)
3115 && (other = prev_active_insn (insn)) != 0
3116 && (condjump_p (other) || condjump_in_parallel_p (other))
3117 && no_labels_between_p (other, insn)
3118 && 0 > mostly_true_jump (other,
3119 get_branch_condition (other,
3120 JUMP_LABEL (other))))
3122 rtx other_target = JUMP_LABEL (other);
3123 target_label = JUMP_LABEL (insn);
3125 /* Increment the count of OTHER_TARGET, so it doesn't get deleted
3126 as we move the label. */
3127 if (other_target)
3128 ++LABEL_NUSES (other_target);
3130 if (invert_jump (other, target_label))
3131 reorg_redirect_jump (insn, other_target);
3133 if (other_target)
3134 --LABEL_NUSES (other_target);
3137 /* Now look only at cases where we have filled a delay slot. */
3138 if (GET_CODE (insn) != INSN
3139 || GET_CODE (PATTERN (insn)) != SEQUENCE)
3140 continue;
3142 pat = PATTERN (insn);
3143 delay_insn = XVECEXP (pat, 0, 0);
3145 /* See if the first insn in the delay slot is redundant with some
3146 previous insn. Remove it from the delay slot if so; then set up
3147 to reprocess this insn. */
3148 if (redundant_insn (XVECEXP (pat, 0, 1), delay_insn, 0))
3150 delete_from_delay_slot (XVECEXP (pat, 0, 1));
3151 next = prev_active_insn (next);
3152 continue;
3155 /* See if we have a RETURN insn with a filled delay slot followed
3156 by a RETURN insn with an unfilled a delay slot. If so, we can delete
3157 the first RETURN (but not it's delay insn). This gives the same
3158 effect in fewer instructions.
3160 Only do so if optimizing for size since this results in slower, but
3161 smaller code. */
3162 if (optimize_size
3163 && GET_CODE (PATTERN (delay_insn)) == RETURN
3164 && next
3165 && GET_CODE (next) == JUMP_INSN
3166 && GET_CODE (PATTERN (next)) == RETURN)
3168 int i;
3170 /* Delete the RETURN and just execute the delay list insns.
3172 We do this by deleting the INSN containing the SEQUENCE, then
3173 re-emitting the insns separately, and then deleting the RETURN.
3174 This allows the count of the jump target to be properly
3175 decremented. */
3177 /* Clear the from target bit, since these insns are no longer
3178 in delay slots. */
3179 for (i = 0; i < XVECLEN (pat, 0); i++)
3180 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3182 trial = PREV_INSN (insn);
3183 delete_insn (insn);
3184 emit_insn_after (pat, trial);
3185 delete_scheduled_jump (delay_insn);
3186 continue;
3189 /* Now look only at the cases where we have a filled JUMP_INSN. */
3190 if (GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3191 || ! (condjump_p (XVECEXP (PATTERN (insn), 0, 0))
3192 || condjump_in_parallel_p (XVECEXP (PATTERN (insn), 0, 0))))
3193 continue;
3195 target_label = JUMP_LABEL (delay_insn);
3197 if (target_label)
3199 /* If this jump goes to another unconditional jump, thread it, but
3200 don't convert a jump into a RETURN here. */
3201 trial = follow_jumps (target_label);
3202 /* We use next_real_insn instead of next_active_insn, so that
3203 the special USE insns emitted by reorg won't be ignored.
3204 If they are ignored, then they will get deleted if target_label
3205 is now unreachable, and that would cause mark_target_live_regs
3206 to fail. */
3207 trial = prev_label (next_real_insn (trial));
3208 if (trial == 0 && target_label != 0)
3209 trial = find_end_label ();
3211 if (trial != target_label
3212 && redirect_with_delay_slots_safe_p (delay_insn, trial, insn))
3214 reorg_redirect_jump (delay_insn, trial);
3215 target_label = trial;
3218 /* If the first insn at TARGET_LABEL is redundant with a previous
3219 insn, redirect the jump to the following insn process again. */
3220 trial = next_active_insn (target_label);
3221 if (trial && GET_CODE (PATTERN (trial)) != SEQUENCE
3222 && redundant_insn (trial, insn, 0))
3224 rtx tmp;
3226 /* Figure out where to emit the special USE insn so we don't
3227 later incorrectly compute register live/death info. */
3228 tmp = next_active_insn (trial);
3229 if (tmp == 0)
3230 tmp = find_end_label ();
3232 /* Insert the special USE insn and update dataflow info. */
3233 update_block (trial, tmp);
3235 /* Now emit a label before the special USE insn, and
3236 redirect our jump to the new label. */
3237 target_label = get_label_before (PREV_INSN (tmp));
3238 reorg_redirect_jump (delay_insn, target_label);
3239 next = insn;
3240 continue;
3243 /* Similarly, if it is an unconditional jump with one insn in its
3244 delay list and that insn is redundant, thread the jump. */
3245 if (trial && GET_CODE (PATTERN (trial)) == SEQUENCE
3246 && XVECLEN (PATTERN (trial), 0) == 2
3247 && GET_CODE (XVECEXP (PATTERN (trial), 0, 0)) == JUMP_INSN
3248 && (simplejump_p (XVECEXP (PATTERN (trial), 0, 0))
3249 || GET_CODE (PATTERN (XVECEXP (PATTERN (trial), 0, 0))) == RETURN)
3250 && redundant_insn (XVECEXP (PATTERN (trial), 0, 1), insn, 0))
3252 target_label = JUMP_LABEL (XVECEXP (PATTERN (trial), 0, 0));
3253 if (target_label == 0)
3254 target_label = find_end_label ();
3256 if (redirect_with_delay_slots_safe_p (delay_insn, target_label,
3257 insn))
3259 reorg_redirect_jump (delay_insn, target_label);
3260 next = insn;
3261 continue;
3266 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3267 && prev_active_insn (target_label) == insn
3268 && ! condjump_in_parallel_p (delay_insn)
3269 #ifdef HAVE_cc0
3270 /* If the last insn in the delay slot sets CC0 for some insn,
3271 various code assumes that it is in a delay slot. We could
3272 put it back where it belonged and delete the register notes,
3273 but it doesn't seem worthwhile in this uncommon case. */
3274 && ! find_reg_note (XVECEXP (pat, 0, XVECLEN (pat, 0) - 1),
3275 REG_CC_USER, NULL_RTX)
3276 #endif
3279 int i;
3281 /* All this insn does is execute its delay list and jump to the
3282 following insn. So delete the jump and just execute the delay
3283 list insns.
3285 We do this by deleting the INSN containing the SEQUENCE, then
3286 re-emitting the insns separately, and then deleting the jump.
3287 This allows the count of the jump target to be properly
3288 decremented. */
3290 /* Clear the from target bit, since these insns are no longer
3291 in delay slots. */
3292 for (i = 0; i < XVECLEN (pat, 0); i++)
3293 INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)) = 0;
3295 trial = PREV_INSN (insn);
3296 delete_insn (insn);
3297 emit_insn_after (pat, trial);
3298 delete_scheduled_jump (delay_insn);
3299 continue;
3302 /* See if this is an unconditional jump around a single insn which is
3303 identical to the one in its delay slot. In this case, we can just
3304 delete the branch and the insn in its delay slot. */
3305 if (next && GET_CODE (next) == INSN
3306 && prev_label (next_active_insn (next)) == target_label
3307 && simplejump_p (insn)
3308 && XVECLEN (pat, 0) == 2
3309 && rtx_equal_p (PATTERN (next), PATTERN (XVECEXP (pat, 0, 1))))
3311 delete_insn (insn);
3312 continue;
3315 /* See if this jump (with its delay slots) branches around another
3316 jump (without delay slots). If so, invert this jump and point
3317 it to the target of the second jump. We cannot do this for
3318 annulled jumps, though. Again, don't convert a jump to a RETURN
3319 here. */
3320 if (! INSN_ANNULLED_BRANCH_P (delay_insn)
3321 && next && GET_CODE (next) == JUMP_INSN
3322 && (simplejump_p (next) || GET_CODE (PATTERN (next)) == RETURN)
3323 && next_active_insn (target_label) == next_active_insn (next)
3324 && no_labels_between_p (insn, next))
3326 rtx label = JUMP_LABEL (next);
3327 rtx old_label = JUMP_LABEL (delay_insn);
3329 if (label == 0)
3330 label = find_end_label ();
3332 if (redirect_with_delay_slots_safe_p (delay_insn, label, insn))
3334 /* Be careful how we do this to avoid deleting code or labels
3335 that are momentarily dead. See similar optimization in
3336 jump.c */
3337 if (old_label)
3338 ++LABEL_NUSES (old_label);
3340 if (invert_jump (delay_insn, label))
3342 int i;
3344 /* Must update the INSN_FROM_TARGET_P bits now that
3345 the branch is reversed, so that mark_target_live_regs
3346 will handle the delay slot insn correctly. */
3347 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
3349 rtx slot = XVECEXP (PATTERN (insn), 0, i);
3350 INSN_FROM_TARGET_P (slot) = ! INSN_FROM_TARGET_P (slot);
3353 delete_insn (next);
3354 next = insn;
3357 if (old_label && --LABEL_NUSES (old_label) == 0)
3358 delete_insn (old_label);
3359 continue;
3363 /* If we own the thread opposite the way this insn branches, see if we
3364 can merge its delay slots with following insns. */
3365 if (INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3366 && own_thread_p (NEXT_INSN (insn), 0, 1))
3367 try_merge_delay_insns (insn, next);
3368 else if (! INSN_FROM_TARGET_P (XVECEXP (pat, 0, 1))
3369 && own_thread_p (target_label, target_label, 0))
3370 try_merge_delay_insns (insn, next_active_insn (target_label));
3372 /* If we get here, we haven't deleted INSN. But we may have deleted
3373 NEXT, so recompute it. */
3374 next = next_active_insn (insn);
3378 #ifdef HAVE_return
3380 /* Look for filled jumps to the end of function label. We can try to convert
3381 them into RETURN insns if the insns in the delay slot are valid for the
3382 RETURN as well. */
3384 static void
3385 make_return_insns (first)
3386 rtx first;
3388 rtx insn, jump_insn, pat;
3389 rtx real_return_label = end_of_function_label;
3390 int slots, i;
3392 /* See if there is a RETURN insn in the function other than the one we
3393 made for END_OF_FUNCTION_LABEL. If so, set up anything we can't change
3394 into a RETURN to jump to it. */
3395 for (insn = first; insn; insn = NEXT_INSN (insn))
3396 if (GET_CODE (insn) == JUMP_INSN && GET_CODE (PATTERN (insn)) == RETURN)
3398 real_return_label = get_label_before (insn);
3399 break;
3402 /* Show an extra usage of REAL_RETURN_LABEL so it won't go away if it
3403 was equal to END_OF_FUNCTION_LABEL. */
3404 LABEL_NUSES (real_return_label)++;
3406 /* Clear the list of insns to fill so we can use it. */
3407 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3409 for (insn = first; insn; insn = NEXT_INSN (insn))
3411 int flags;
3413 /* Only look at filled JUMP_INSNs that go to the end of function
3414 label. */
3415 if (GET_CODE (insn) != INSN
3416 || GET_CODE (PATTERN (insn)) != SEQUENCE
3417 || GET_CODE (XVECEXP (PATTERN (insn), 0, 0)) != JUMP_INSN
3418 || JUMP_LABEL (XVECEXP (PATTERN (insn), 0, 0)) != end_of_function_label)
3419 continue;
3421 pat = PATTERN (insn);
3422 jump_insn = XVECEXP (pat, 0, 0);
3424 /* If we can't make the jump into a RETURN, try to redirect it to the best
3425 RETURN and go on to the next insn. */
3426 if (! reorg_redirect_jump (jump_insn, NULL_RTX))
3428 /* Make sure redirecting the jump will not invalidate the delay
3429 slot insns. */
3430 if (redirect_with_delay_slots_safe_p (jump_insn,
3431 real_return_label,
3432 insn))
3433 reorg_redirect_jump (jump_insn, real_return_label);
3434 continue;
3437 /* See if this RETURN can accept the insns current in its delay slot.
3438 It can if it has more or an equal number of slots and the contents
3439 of each is valid. */
3441 flags = get_jump_flags (jump_insn, JUMP_LABEL (jump_insn));
3442 slots = num_delay_slots (jump_insn);
3443 if (slots >= XVECLEN (pat, 0) - 1)
3445 for (i = 1; i < XVECLEN (pat, 0); i++)
3446 if (! (
3447 #ifdef ANNUL_IFFALSE_SLOTS
3448 (INSN_ANNULLED_BRANCH_P (jump_insn)
3449 && INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3450 ? eligible_for_annul_false (jump_insn, i - 1,
3451 XVECEXP (pat, 0, i), flags) :
3452 #endif
3453 #ifdef ANNUL_IFTRUE_SLOTS
3454 (INSN_ANNULLED_BRANCH_P (jump_insn)
3455 && ! INSN_FROM_TARGET_P (XVECEXP (pat, 0, i)))
3456 ? eligible_for_annul_true (jump_insn, i - 1,
3457 XVECEXP (pat, 0, i), flags) :
3458 #endif
3459 eligible_for_delay (jump_insn, i -1, XVECEXP (pat, 0, i), flags)))
3460 break;
3462 else
3463 i = 0;
3465 if (i == XVECLEN (pat, 0))
3466 continue;
3468 /* We have to do something with this insn. If it is an unconditional
3469 RETURN, delete the SEQUENCE and output the individual insns,
3470 followed by the RETURN. Then set things up so we try to find
3471 insns for its delay slots, if it needs some. */
3472 if (GET_CODE (PATTERN (jump_insn)) == RETURN)
3474 rtx prev = PREV_INSN (insn);
3476 delete_insn (insn);
3477 for (i = 1; i < XVECLEN (pat, 0); i++)
3478 prev = emit_insn_after (PATTERN (XVECEXP (pat, 0, i)), prev);
3480 insn = emit_jump_insn_after (PATTERN (jump_insn), prev);
3481 emit_barrier_after (insn);
3483 if (slots)
3484 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3486 else
3487 /* It is probably more efficient to keep this with its current
3488 delay slot as a branch to a RETURN. */
3489 reorg_redirect_jump (jump_insn, real_return_label);
3492 /* Now delete REAL_RETURN_LABEL if we never used it. Then try to fill any
3493 new delay slots we have created. */
3494 if (--LABEL_NUSES (real_return_label) == 0)
3495 delete_insn (real_return_label);
3497 fill_simple_delay_slots (1);
3498 fill_simple_delay_slots (0);
3500 #endif
3502 /* Try to find insns to place in delay slots. */
3504 void
3505 dbr_schedule (first, file)
3506 rtx first;
3507 FILE *file;
3509 rtx insn, next, epilogue_insn = 0;
3510 int i;
3511 #if 0
3512 int old_flag_no_peephole = flag_no_peephole;
3514 /* Execute `final' once in prescan mode to delete any insns that won't be
3515 used. Don't let final try to do any peephole optimization--it will
3516 ruin dataflow information for this pass. */
3518 flag_no_peephole = 1;
3519 final (first, 0, NO_DEBUG, 1, 1);
3520 flag_no_peephole = old_flag_no_peephole;
3521 #endif
3523 /* If the current function has no insns other than the prologue and
3524 epilogue, then do not try to fill any delay slots. */
3525 if (n_basic_blocks == 0)
3526 return;
3528 /* Find the highest INSN_UID and allocate and initialize our map from
3529 INSN_UID's to position in code. */
3530 for (max_uid = 0, insn = first; insn; insn = NEXT_INSN (insn))
3532 if (INSN_UID (insn) > max_uid)
3533 max_uid = INSN_UID (insn);
3534 if (GET_CODE (insn) == NOTE
3535 && NOTE_LINE_NUMBER (insn) == NOTE_INSN_EPILOGUE_BEG)
3536 epilogue_insn = insn;
3539 uid_to_ruid = (int *) xmalloc ((max_uid + 1) * sizeof (int));
3540 for (i = 0, insn = first; insn; i++, insn = NEXT_INSN (insn))
3541 uid_to_ruid[INSN_UID (insn)] = i;
3543 /* Initialize the list of insns that need filling. */
3544 if (unfilled_firstobj == 0)
3546 gcc_obstack_init (&unfilled_slots_obstack);
3547 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
3550 for (insn = next_active_insn (first); insn; insn = next_active_insn (insn))
3552 rtx target;
3554 INSN_ANNULLED_BRANCH_P (insn) = 0;
3555 INSN_FROM_TARGET_P (insn) = 0;
3557 /* Skip vector tables. We can't get attributes for them. */
3558 if (GET_CODE (insn) == JUMP_INSN
3559 && (GET_CODE (PATTERN (insn)) == ADDR_VEC
3560 || GET_CODE (PATTERN (insn)) == ADDR_DIFF_VEC))
3561 continue;
3563 if (num_delay_slots (insn) > 0)
3564 obstack_ptr_grow (&unfilled_slots_obstack, insn);
3566 /* Ensure all jumps go to the last of a set of consecutive labels. */
3567 if (GET_CODE (insn) == JUMP_INSN
3568 && (condjump_p (insn) || condjump_in_parallel_p (insn))
3569 && JUMP_LABEL (insn) != 0
3570 && ((target = prev_label (next_active_insn (JUMP_LABEL (insn))))
3571 != JUMP_LABEL (insn)))
3572 redirect_jump (insn, target);
3575 init_resource_info (epilogue_insn);
3577 /* Show we haven't computed an end-of-function label yet. */
3578 end_of_function_label = 0;
3580 /* Initialize the statistics for this function. */
3581 bzero ((char *) num_insns_needing_delays, sizeof num_insns_needing_delays);
3582 bzero ((char *) num_filled_delays, sizeof num_filled_delays);
3584 /* Now do the delay slot filling. Try everything twice in case earlier
3585 changes make more slots fillable. */
3587 for (reorg_pass_number = 0;
3588 reorg_pass_number < MAX_REORG_PASSES;
3589 reorg_pass_number++)
3591 fill_simple_delay_slots (1);
3592 fill_simple_delay_slots (0);
3593 fill_eager_delay_slots ();
3594 relax_delay_slots (first);
3597 /* Delete any USE insns made by update_block; subsequent passes don't need
3598 them or know how to deal with them. */
3599 for (insn = first; insn; insn = next)
3601 next = NEXT_INSN (insn);
3603 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
3604 && GET_RTX_CLASS (GET_CODE (XEXP (PATTERN (insn), 0))) == 'i')
3605 next = delete_insn (insn);
3608 /* If we made an end of function label, indicate that it is now
3609 safe to delete it by undoing our prior adjustment to LABEL_NUSES.
3610 If it is now unused, delete it. */
3611 if (end_of_function_label && --LABEL_NUSES (end_of_function_label) == 0)
3612 delete_insn (end_of_function_label);
3614 #ifdef HAVE_return
3615 if (HAVE_return && end_of_function_label != 0)
3616 make_return_insns (first);
3617 #endif
3619 obstack_free (&unfilled_slots_obstack, unfilled_firstobj);
3621 /* It is not clear why the line below is needed, but it does seem to be. */
3622 unfilled_firstobj = (rtx *) obstack_alloc (&unfilled_slots_obstack, 0);
3624 /* Reposition the prologue and epilogue notes in case we moved the
3625 prologue/epilogue insns. */
3626 reposition_prologue_and_epilogue_notes (first);
3628 if (file)
3630 register int i, j, need_comma;
3631 int total_delay_slots[MAX_DELAY_HISTOGRAM + 1];
3632 int total_annul_slots[MAX_DELAY_HISTOGRAM + 1];
3634 for (reorg_pass_number = 0;
3635 reorg_pass_number < MAX_REORG_PASSES;
3636 reorg_pass_number++)
3638 fprintf (file, ";; Reorg pass #%d:\n", reorg_pass_number + 1);
3639 for (i = 0; i < NUM_REORG_FUNCTIONS; i++)
3641 need_comma = 0;
3642 fprintf (file, ";; Reorg function #%d\n", i);
3644 fprintf (file, ";; %d insns needing delay slots\n;; ",
3645 num_insns_needing_delays[i][reorg_pass_number]);
3647 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3648 if (num_filled_delays[i][j][reorg_pass_number])
3650 if (need_comma)
3651 fprintf (file, ", ");
3652 need_comma = 1;
3653 fprintf (file, "%d got %d delays",
3654 num_filled_delays[i][j][reorg_pass_number], j);
3656 fprintf (file, "\n");
3659 bzero ((char *) total_delay_slots, sizeof total_delay_slots);
3660 bzero ((char *) total_annul_slots, sizeof total_annul_slots);
3661 for (insn = first; insn; insn = NEXT_INSN (insn))
3663 if (! INSN_DELETED_P (insn)
3664 && GET_CODE (insn) == INSN
3665 && GET_CODE (PATTERN (insn)) != USE
3666 && GET_CODE (PATTERN (insn)) != CLOBBER)
3668 if (GET_CODE (PATTERN (insn)) == SEQUENCE)
3670 j = XVECLEN (PATTERN (insn), 0) - 1;
3671 if (j > MAX_DELAY_HISTOGRAM)
3672 j = MAX_DELAY_HISTOGRAM;
3673 if (INSN_ANNULLED_BRANCH_P (XVECEXP (PATTERN (insn), 0, 0)))
3674 total_annul_slots[j]++;
3675 else
3676 total_delay_slots[j]++;
3678 else if (num_delay_slots (insn) > 0)
3679 total_delay_slots[0]++;
3682 fprintf (file, ";; Reorg totals: ");
3683 need_comma = 0;
3684 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3686 if (total_delay_slots[j])
3688 if (need_comma)
3689 fprintf (file, ", ");
3690 need_comma = 1;
3691 fprintf (file, "%d got %d delays", total_delay_slots[j], j);
3694 fprintf (file, "\n");
3695 #if defined (ANNUL_IFTRUE_SLOTS) || defined (ANNUL_IFFALSE_SLOTS)
3696 fprintf (file, ";; Reorg annuls: ");
3697 need_comma = 0;
3698 for (j = 0; j < MAX_DELAY_HISTOGRAM + 1; j++)
3700 if (total_annul_slots[j])
3702 if (need_comma)
3703 fprintf (file, ", ");
3704 need_comma = 1;
3705 fprintf (file, "%d got %d delays", total_annul_slots[j], j);
3708 fprintf (file, "\n");
3709 #endif
3710 fprintf (file, "\n");
3713 /* For all JUMP insns, fill in branch prediction notes, so that during
3714 assembler output a target can set branch prediction bits in the code.
3715 We have to do this now, as up until this point the destinations of
3716 JUMPS can be moved around and changed, but past right here that cannot
3717 happen. */
3718 for (insn = first; insn; insn = NEXT_INSN (insn))
3720 int pred_flags;
3722 if (GET_CODE (insn) == INSN)
3724 rtx pat = PATTERN (insn);
3726 if (GET_CODE (pat) == SEQUENCE)
3727 insn = XVECEXP (pat, 0, 0);
3729 if (GET_CODE (insn) != JUMP_INSN)
3730 continue;
3732 pred_flags = get_jump_flags (insn, JUMP_LABEL (insn));
3733 REG_NOTES (insn) = gen_rtx_EXPR_LIST (REG_BR_PRED,
3734 GEN_INT (pred_flags),
3735 REG_NOTES (insn));
3737 free_resource_info ();
3738 free (uid_to_ruid);
3740 #endif /* DELAY_SLOTS */