1 2023-10-15 Tobias Burnus <tobias@codesourcery.com>
3 * doc/invoke.texi (-fopenacc, -fopenmp, -fopenmp-simd): Use @samp not
4 @code; document more completely the supported Fortran sentinels.
6 2023-10-15 Roger Sayle <roger@nextmovesoftware.com>
8 * optabs.cc (expand_subword_shift): Call simplify_expand_binop
9 instead of expand_binop. Optimize cases (i.e. avoid generating
10 RTL) when CARRIES or INTO_INPUT is zero. Use one_cmpl_optab
11 (i.e. NOT) instead of xor_optab with ~0 to calculate ~OP1.
13 2023-10-15 Jakub Jelinek <jakub@redhat.com>
15 PR tree-optimization/111800
16 * wide-int-print.h (print_dec_buf_size, print_decs_buf_size,
17 print_decu_buf_size, print_hex_buf_size): New inline functions.
18 * wide-int.cc (assert_deceq): Use print_dec_buf_size.
19 (assert_hexeq): Use print_hex_buf_size.
20 * wide-int-print.cc (print_decs): Use print_decs_buf_size.
21 (print_decu): Use print_decu_buf_size.
22 (print_hex): Use print_hex_buf_size.
23 (pp_wide_int_large): Use print_dec_buf_size.
24 * value-range.cc (irange_bitmask::dump): Use print_hex_buf_size.
25 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
27 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
28 print_dec_buf_size. Use TYPE_SIGN macro in print_dec call argument.
30 2023-10-15 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
32 * combine.cc (simplify_compare_const): Fix handling of unsigned
35 2023-10-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
37 * config/riscv/vector-iterators.md: Fix vsingle incorrect attribute for RVVM2x2QI.
39 2023-10-14 Tobias Burnus <tobias@codesourcery.com>
41 * gimplify.cc (gimplify_bind_expr): Handle Fortran's
42 'omp allocate' for stack variables.
44 2023-10-14 Jakub Jelinek <jakub@redhat.com>
47 * tree-core.h (struct tree_base): Remove int_length.offset
48 member, change type of int_length.unextended and int_length.extended
49 from unsigned char to unsigned short.
50 * tree.h (TREE_INT_CST_OFFSET_NUNITS): Remove.
51 (wi::extended_tree <N>::get_len): Don't use TREE_INT_CST_OFFSET_NUNITS,
52 instead compute it at runtime from TREE_INT_CST_EXT_NUNITS and
54 * tree.cc (wide_int_to_tree_1): Don't assert
55 TREE_INT_CST_OFFSET_NUNITS value.
56 (make_int_cst): Don't initialize TREE_INT_CST_OFFSET_NUNITS.
57 * wide-int.h (WIDE_INT_MAX_ELTS): Change from 255 to 1024.
58 (WIDEST_INT_MAX_ELTS): Change from 510 to 2048, adjust comment.
59 (trailing_wide_int_storage): Change m_len type from unsigned char *
61 (trailing_wide_int_storage::trailing_wide_int_storage): Change second
62 argument from unsigned char * to unsigned short *.
63 (trailing_wide_ints): Change m_max_len type from unsigned char to
64 unsigned short. Change m_len element type from
65 struct{unsigned char len;} to unsigned short.
66 (trailing_wide_ints <N>::operator []): Remove .len from m_len
68 * value-range-storage.h (irange_storage::lengths_address): Change
69 return type from const unsigned char * to const unsigned short *.
70 (irange_storage::write_lengths_address): Change return type from
71 unsigned char * to unsigned short *.
72 * value-range-storage.cc (irange_storage::write_lengths_address):
74 (irange_storage::lengths_address): Change return type from
75 const unsigned char * to const unsigned short *.
76 (write_wide_int): Change len argument type from unsigned char *&
78 (irange_storage::set_irange): Change len variable type from
79 unsigned char * to unsigned short *.
80 (read_wide_int): Change len argument type from unsigned char to
81 unsigned short. Use trailing_wide_int_storage <unsigned short>
82 instead of trailing_wide_int_storage and
83 trailing_wide_int <unsigned short> instead of trailing_wide_int.
84 (irange_storage::get_irange): Change len variable type from
85 unsigned char * to unsigned short *.
86 (irange_storage::size): Multiply n by sizeof (unsigned short)
87 in len_size variable initialization.
88 (irange_storage::dump): Change len variable type from
89 unsigned char * to unsigned short *.
91 2023-10-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
93 * config/riscv/vector-iterators.md: Remove redundant iterators.
95 2023-10-13 Andrew MacLeod <amacleod@redhat.com>
97 PR tree-optimization/111622
98 * value-relation.cc (equiv_oracle::add_partial_equiv): Do not
99 register a partial equivalence if an operand has no uses.
101 2023-10-13 Richard Biener <rguenther@suse.de>
103 PR tree-optimization/111795
104 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
105 integer mode mask arguments.
107 2023-10-13 Richard Biener <rguenther@suse.de>
109 * tree-vect-slp.cc (mask_call_maps): New.
110 (vect_get_operand_map): Handle IFN_MASK_CALL.
111 (vect_build_slp_tree_1): Likewise.
112 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
115 2023-10-13 Richard Biener <rguenther@suse.de>
117 PR tree-optimization/111779
118 * tree-sra.cc (sra_handled_bf_read_p): New function.
119 (build_access_from_expr_1): Handle some BIT_FIELD_REFs.
120 (sra_modify_expr): Likewise.
121 (make_fancy_name_1): Skip over BIT_FIELD_REF.
123 2023-10-13 Richard Biener <rguenther@suse.de>
125 PR tree-optimization/111773
126 * tree-ssa-dce.cc (mark_stmt_if_obviously_necessary): Do
127 not elide noreturn calls that are reflected to the IL.
129 2023-10-13 Kito Cheng <kito.cheng@sifive.com>
131 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Bump
133 * config/riscv/riscv.h (MAX_POLY_VARIANT): New.
135 2023-10-13 Pan Li <pan2.li@intel.com>
137 * config/riscv/autovec.md (lfloor<mode><v_i_l_ll_convert>2): New
138 pattern for lfloor/lfloorf.
139 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
140 (expand_vec_lfloor): New func decl for expanding lfloor.
141 * config/riscv/riscv-v.cc (expand_vec_lfloor): New func impl
142 for expanding lfloor.
144 2023-10-13 Pan Li <pan2.li@intel.com>
146 * config/riscv/autovec.md (lceil<mode><v_i_l_ll_convert>2): New
147 pattern] for lceil/lceilf.
148 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
149 (expand_vec_lceil): New func decl for expanding lceil.
150 * config/riscv/riscv-v.cc (expand_vec_lceil): New func impl
153 2023-10-12 Michael Meissner <meissner@linux.ibm.com>
156 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): Protect
157 code from shifts that are undefined.
158 (can_be_built_by_li_lis_and_rldicr): Likewise.
159 (can_be_built_by_li_and_rldic): Protect code from shifts that
160 undefined. Also replace uses of 1ULL with HOST_WIDE_INT_1U.
162 2023-10-12 Alex Coplan <alex.coplan@arm.com>
164 * reg-notes.def (NOALIAS): Correct comment.
166 2023-10-12 Jakub Jelinek <jakub@redhat.com>
169 * tree.h (wi::int_traits <unextended_tree>::needs_write_val_arg): New
171 (int_traits <extended_tree <N>>::needs_write_val_arg): Likewise.
172 (wi::ints_for): Provide separate partial specializations for
173 generic_wide_int <extended_tree <N>> and INL_CONST_PRECISION or that
174 and CONST_PRECISION, rather than using
175 int_traits <extended_tree <N> >::precision_type as the second template
177 * rtl.h (wi::int_traits <rtx_mode_t>::needs_write_val_arg): New
179 * double-int.h (wi::int_traits <double_int>::needs_write_val_arg):
182 2023-10-12 Mary Bennett <mary.bennett@embecosm.com>
185 * doc/extend.texi: Change subsubsection to subsection for
188 2023-10-12 Tamar Christina <tamar.christina@arm.com>
190 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Add undef.
192 2023-10-12 Jakub Jelinek <jakub@redhat.com>
194 * wide-int.h (widest_int_storage <N>::write_val): If l is small
195 and there is space in u.val array, store a canary value at the
197 (widest_int_storage <N>::set_len): Check the canary hasn't been
200 2023-10-12 Jakub Jelinek <jakub@redhat.com>
203 * wide-int.h: Adjust file comment.
204 (WIDE_INT_MAX_INL_ELTS): Define to former value of WIDE_INT_MAX_ELTS.
205 (WIDE_INT_MAX_INL_PRECISION): Define.
206 (WIDE_INT_MAX_ELTS): Change to 255. Assert that WIDE_INT_MAX_INL_ELTS
207 is smaller than WIDE_INT_MAX_ELTS.
208 (RWIDE_INT_MAX_ELTS, RWIDE_INT_MAX_PRECISION, WIDEST_INT_MAX_ELTS,
209 WIDEST_INT_MAX_PRECISION): Define.
210 (WI_BINARY_RESULT_VAR, WI_UNARY_RESULT_VAR): Change write_val callers
211 to pass 0 as a new argument.
212 (class widest_int_storage): Likewise.
213 (widest_int, widest2_int): Change typedefs to use widest_int_storage
214 rather than fixed_wide_int_storage.
215 (enum wi::precision_type): Add INL_CONST_PRECISION enumerator.
216 (struct binary_traits): Add partial specializations for
218 (generic_wide_int): Add needs_write_val_arg static data member.
219 (int_traits): Likewise.
220 (wide_int_storage): Replace val non-static data member with a union
221 u of it and HOST_WIDE_INT *valp. Declare copy constructor, copy
222 assignment operator and destructor. Add unsigned int argument to
224 (wide_int_storage::wide_int_storage): Initialize precision to 0
225 in the default ctor. Remove unnecessary {}s around STATIC_ASSERTs.
226 Assert in non-default ctor T's precision_type is not
227 INL_CONST_PRECISION and allocate u.valp for large precision. Add
229 (wide_int_storage::~wide_int_storage): New.
230 (wide_int_storage::operator=): Add copy assignment operator. In
231 assignment operator remove unnecessary {}s around STATIC_ASSERTs,
232 assert ctor T's precision_type is not INL_CONST_PRECISION and
233 if precision changes, deallocate and/or allocate u.valp.
234 (wide_int_storage::get_val): Return u.valp rather than u.val for
236 (wide_int_storage::write_val): Likewise. Add an unused unsigned int
238 (wide_int_storage::set_len): Use write_val instead of writing val
240 (wide_int_storage::from, wide_int_storage::from_array): Adjust
242 (wide_int_storage::create): Allocate u.valp for large precisions.
243 (wi::int_traits <wide_int_storage>::get_binary_precision): New.
244 (fixed_wide_int_storage::fixed_wide_int_storage): Make default
246 (fixed_wide_int_storage::write_val): Add unused unsigned int argument.
247 (fixed_wide_int_storage::from, fixed_wide_int_storage::from_array):
248 Adjust write_val callers.
249 (wi::int_traits <fixed_wide_int_storage>::get_binary_precision): New.
250 (WIDEST_INT): Define.
251 (widest_int_storage): New template class.
252 (wi::int_traits <widest_int_storage>): New.
253 (trailing_wide_int_storage::write_val): Add unused unsigned int
255 (wi::get_binary_precision): Use
256 wi::int_traits <WI_BINARY_RESULT (T1, T2)>::get_binary_precision
257 rather than get_precision on get_binary_result.
258 (wi::copy): Adjust write_val callers. Don't call set_len if
260 (wi::bit_not): If result.needs_write_val_arg, call write_val
261 again with upper bound estimate of len.
262 (wi::sext, wi::zext, wi::set_bit): Likewise.
263 (wi::bit_and, wi::bit_and_not, wi::bit_or, wi::bit_or_not,
264 wi::bit_xor, wi::add, wi::sub, wi::mul, wi::mul_high, wi::div_trunc,
265 wi::div_floor, wi::div_ceil, wi::div_round, wi::divmod_trunc,
266 wi::mod_trunc, wi::mod_floor, wi::mod_ceil, wi::mod_round,
267 wi::lshift, wi::lrshift, wi::arshift): Likewise.
268 (wi::bswap, wi::bitreverse): Assert result.needs_write_val_arg
270 (gt_ggc_mx, gt_pch_nx): Remove generic template for all
271 generic_wide_int, instead add functions and templates for each
272 storage of generic_wide_int. Make functions for
273 generic_wide_int <wide_int_storage> and templates for
274 generic_wide_int <widest_int_storage <N>> deleted.
275 (wi::mask, wi::shifted_mask): Adjust write_val calls.
276 * wide-int.cc (zeros): Decrease array size to 1.
277 (BLOCKS_NEEDED): Use CEIL.
278 (canonize): Use HOST_WIDE_INT_M1.
279 (wi::from_buffer): Pass 0 to write_val.
280 (wi::to_mpz): Use CEIL.
281 (wi::from_mpz): Likewise. Pass 0 to write_val. Use
282 WIDE_INT_MAX_INL_ELTS instead of WIDE_INT_MAX_ELTS.
283 (wi::mul_internal): Use WIDE_INT_MAX_INL_PRECISION instead of
284 MAX_BITSIZE_MODE_ANY_INT in automatic array sizes, for prec
285 above WIDE_INT_MAX_INL_PRECISION estimate precision from
286 lengths of operands. Use XALLOCAVEC allocated buffers for
287 prec above WIDE_INT_MAX_INL_PRECISION.
288 (wi::divmod_internal): Likewise.
289 (wi::lshift_large): For len > WIDE_INT_MAX_INL_ELTS estimate
290 it from xlen and skip.
291 (rshift_large_common): Remove xprecision argument, add len
292 argument with len computed in caller. Don't return anything.
293 (wi::lrshift_large, wi::arshift_large): Compute len here
294 and pass it to rshift_large_common, for lengths above
295 WIDE_INT_MAX_INL_ELTS using estimations from xlen if possible.
296 (assert_deceq, assert_hexeq): For lengths above
297 WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
298 (test_printing): Use WIDE_INT_MAX_INL_PRECISION instead of
299 WIDE_INT_MAX_PRECISION.
300 * wide-int-print.h (WIDE_INT_PRINT_BUFFER_SIZE): Use
301 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION.
302 * wide-int-print.cc (print_decs, print_decu, print_hex): For
303 lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC allocated buffer.
304 * tree.h (wi::int_traits<extended_tree <N>>): Change precision_type
305 to INL_CONST_PRECISION for N == ADDR_MAX_PRECISION.
306 (widest_extended_tree): Use WIDEST_INT_MAX_PRECISION instead of
307 WIDE_INT_MAX_PRECISION.
308 (wi::ints_for): Use int_traits <extended_tree <N> >::precision_type
309 instead of hard coded CONST_PRECISION.
310 (widest2_int_cst): Use WIDEST_INT_MAX_PRECISION instead of
311 WIDE_INT_MAX_PRECISION.
312 (wi::extended_tree <N>::get_len): Use WIDEST_INT_MAX_PRECISION rather
313 than WIDE_INT_MAX_PRECISION.
314 (wi::ints_for::zero): Use
315 wi::int_traits <wi::extended_tree <N> >::precision_type instead of
317 * tree.cc (build_replicated_int_cst): Formatting fix. Use
318 WIDE_INT_MAX_INL_ELTS rather than WIDE_INT_MAX_ELTS.
319 * print-tree.cc (print_node): Don't print TREE_UNAVAILABLE on
320 INTEGER_CSTs, TREE_VECs or SSA_NAMEs.
321 * double-int.h (wi::int_traits <double_int>::precision_type): Change
322 to INL_CONST_PRECISION from CONST_PRECISION.
323 * poly-int.h (struct poly_coeff_traits): Add partial specialization
324 for wi::INL_CONST_PRECISION.
325 * cfgloop.h (bound_wide_int): New typedef.
326 (struct nb_iter_bound): Change bound type from widest_int to
328 (struct loop): Change nb_iterations_upper_bound,
329 nb_iterations_likely_upper_bound and nb_iterations_estimate type from
330 widest_int to bound_wide_int.
331 * cfgloop.cc (record_niter_bound): Return early if wi::min_precision
332 of i_bound is too large for bound_wide_int. Adjustments for the
333 widest_int to bound_wide_int type change in non-static data members.
334 (get_estimated_loop_iterations, get_max_loop_iterations,
335 get_likely_max_loop_iterations): Adjustments for the widest_int to
336 bound_wide_int type change in non-static data members.
337 * tree-vect-loop.cc (vect_transform_loop): Likewise.
338 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations): Use
339 XALLOCAVEC allocated buffer for i_bound len above
340 WIDE_INT_MAX_INL_ELTS.
341 (record_estimate): Return early if wi::min_precision of i_bound is too
342 large for bound_wide_int. Adjustments for the widest_int to
343 bound_wide_int type change in non-static data members.
344 (wide_int_cmp): Use bound_wide_int instead of widest_int.
345 (bound_index): Use bound_wide_int instead of widest_int.
346 (discover_iteration_bound_by_body_walk): Likewise. Use
347 widest_int::from to convert it to widest_int when passed to
349 (maybe_lower_iteration_bound): Use widest_int::from to convert it to
350 widest_int when passed to record_niter_bound.
351 (estimate_numbers_of_iteration): Don't record upper bound if
352 loop->nb_iterations has too large precision for bound_wide_int.
353 (n_of_executions_at_most): Use widest_int::from.
354 * tree-ssa-loop-ivcanon.cc (remove_redundant_iv_tests): Adjust for
355 the widest_int to bound_wide_int changes.
356 * match.pd (fold_sign_changed_comparison simplification): Use
357 wide_int::from on wi::to_wide instead of wi::to_widest.
358 * value-range.h (irange::maybe_resize): Avoid using memcpy on
359 non-trivially copyable elements.
360 * value-range.cc (irange_bitmask::dump): Use XALLOCAVEC allocated
361 buffer for mask or value len above WIDE_INT_PRINT_BUFFER_SIZE.
362 * fold-const.cc (fold_convert_const_int_from_int, fold_unary_loc):
363 Use wide_int::from on wi::to_wide instead of wi::to_widest.
364 * tree-ssa-ccp.cc (bit_value_binop): Zero extend r1max from width
365 before calling wi::udiv_trunc.
366 * lto-streamer-out.cc (output_cfg): Adjustments for the widest_int to
367 bound_wide_int type change in non-static data members.
368 * lto-streamer-in.cc (input_cfg): Likewise.
369 (lto_input_tree_1): Use WIDE_INT_MAX_INL_ELTS rather than
370 WIDE_INT_MAX_ELTS. For length above WIDE_INT_MAX_INL_ELTS use
371 XALLOCAVEC allocated buffer. Formatting fix.
372 * data-streamer-in.cc (streamer_read_wide_int,
373 streamer_read_widest_int): Likewise.
374 * tree-affine.cc (aff_combination_expand): Use placement new to
375 construct name_expansion.
376 (free_name_expansion): Destruct name_expansion.
377 * gimple-ssa-strength-reduction.cc (struct slsr_cand_d): Change
378 index type from widest_int to offset_int.
379 (class incr_info_d): Change incr type from widest_int to offset_int.
380 (alloc_cand_and_find_basis, backtrace_base_for_ref,
381 restructure_reference, slsr_process_ref, create_mul_ssa_cand,
382 create_mul_imm_cand, create_add_ssa_cand, create_add_imm_cand,
383 slsr_process_add, cand_abs_increment, replace_mult_candidate,
384 replace_unconditional_candidate, incr_vec_index,
385 create_add_on_incoming_edge, create_phi_basis_1,
386 replace_conditional_candidate, record_increment,
387 record_phi_increments_1, phi_incr_cost_1, phi_incr_cost,
388 lowest_cost_path, total_savings, ncd_with_phi, ncd_of_cand_and_phis,
389 nearest_common_dominator_for_cands, insert_initializers,
390 all_phi_incrs_profitable_1, replace_one_candidate,
391 replace_profitable_candidates): Use offset_int rather than widest_int
392 and wi::to_offset rather than wi::to_widest.
393 * real.cc (real_to_integer): Use WIDE_INT_MAX_INL_ELTS rather than
394 2 * WIDE_INT_MAX_ELTS and for words above that use XALLOCAVEC
396 * tree-ssa-loop-ivopts.cc (niter_for_exit): Use placement new
397 to construct tree_niter_desc and destruct it on failure.
398 (free_tree_niter_desc): Destruct tree_niter_desc if value is non-NULL.
399 * gengtype.cc (main): Remove widest_int handling.
400 * graphite-isl-ast-to-gimple.cc (widest_int_from_isl_expr_int): Use
401 WIDEST_INT_MAX_ELTS instead of WIDE_INT_MAX_ELTS.
402 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Use
403 WIDE_INT_MAX_INL_PRECISION instead of WIDE_INT_MAX_PRECISION and
404 assert get_len () fits into it.
405 * value-range-pretty-print.cc (vrange_printer::print_irange_bitmasks):
406 For mask or value lengths above WIDE_INT_MAX_INL_ELTS use XALLOCAVEC
408 * gimple-ssa-sprintf.cc (adjust_range_for_overflow): Use
409 wide_int::from on wi::to_wide instead of wi::to_widest.
410 * omp-general.cc (score_wide_int): New typedef.
411 (omp_context_compute_score): Use score_wide_int instead of widest_int
412 and adjust for those changes.
413 (struct omp_declare_variant_entry): Change score and
414 score_in_declare_simd_clone non-static data member type from widest_int
416 (omp_resolve_late_declare_variant, omp_resolve_declare_variant): Use
417 score_wide_int instead of widest_int and adjust for those changes.
418 (omp_lto_output_declare_variant_alt): Likewise.
419 (omp_lto_input_declare_variant_alt): Likewise.
420 * godump.cc (go_output_typedef): Assert get_len () is smaller than
421 WIDE_INT_MAX_INL_ELTS.
423 2023-10-12 Pan Li <pan2.li@intel.com>
425 * config/riscv/autovec.md (lround<mode><v_i_l_ll_convert>2): New
426 pattern for lround/lroundf.
427 * config/riscv/riscv-protos.h (enum insn_type): New enum value.
428 (expand_vec_lround): New func decl for expanding lround.
429 * config/riscv/riscv-v.cc (expand_vec_lround): New func impl
430 for expanding lround.
432 2023-10-12 Jakub Jelinek <jakub@redhat.com>
434 * dwarf2out.h (wide_int_ptr): Remove.
435 (dw_wide_int_ptr): New typedef.
436 (struct dw_val_node): Change type of val_wide from wide_int_ptr
438 (struct dw_wide_int): New type.
439 (dw_wide_int::elt): New method.
440 (dw_wide_int::operator ==): Likewise.
441 * dwarf2out.cc (get_full_len): Change argument type to
442 const dw_wide_int & from const wide_int &. Use CEIL. Call
443 get_precision method instead of calling wi::get_precision.
444 (alloc_dw_wide_int): New function.
445 (add_AT_wide): Change w argument type to const wide_int_ref &
446 from const wide_int &. Use alloc_dw_wide_int.
447 (mem_loc_descriptor, loc_descriptor): Use alloc_dw_wide_int.
448 (insert_wide_int): Change val argument type to const wide_int_ref &
449 from const wide_int &.
450 (add_const_value_attribute): Pass rtx_mode_t temporary directly to
451 add_AT_wide instead of using a temporary variable.
453 2023-10-12 Richard Biener <rguenther@suse.de>
455 PR tree-optimization/111764
456 * tree-vect-loop.cc (check_reduction_path): Remove the attempt
457 to allow x + x via special-casing of assigns.
459 2023-10-12 Hu, Lin1 <lin1.hu@intel.com>
461 * common/config/i386/cpuinfo.h (get_available_features):
463 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_USER_MSR_SET): New.
464 (OPTION_MASK_ISA2_USER_MSR_UNSET): Ditto.
465 (ix86_handle_option): Handle -musermsr.
466 * common/config/i386/i386-cpuinfo.h (enum processor_features):
467 Add FEATURE_USER_MSR.
468 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for usermsr.
469 * config.gcc: Add usermsrintrin.h
470 * config/i386/cpuid.h (bit_USER_MSR): New.
471 * config/i386/i386-builtin-types.def:
472 Add DEF_FUNCTION_TYPE (VOID, UINT64, UINT64).
473 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
474 Add __builtin_urdmsr and __builtin_uwrmsr.
475 * config/i386/i386-builtins.h (ix86_builtins):
476 Add IX86_BUILTIN_URDMSR and IX86_BUILTIN_UWRMSR.
477 * config/i386/i386-c.cc (ix86_target_macros_internal):
479 * config/i386/i386-expand.cc (ix86_expand_builtin):
481 * config/i386/i386-isa.def (USER_MSR): Add DEF_PTA(USER_MSR).
482 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
484 * config/i386/i386.md (urdmsr): New define_insn.
486 * config/i386/i386.opt: Add option -musermsr.
487 * config/i386/x86gprintrin.h: Include usermsrintrin.h
488 * doc/extend.texi: Document usermsr.
489 * doc/invoke.texi: Document -musermsr.
490 * doc/sourcebuild.texi: Document target usermsr.
491 * config/i386/usermsrintrin.h: New file.
493 2023-10-12 Yang Yujie <yangyujie@loongson.cn>
495 * config.gcc: Add loongarch-driver.h to tm_files.
496 * config/loongarch/loongarch.h: Do not include loongarch-driver.h.
497 * config/loongarch/t-loongarch: Append loongarch-multilib.h to $(GTM_H)
498 instead of $(TM_H) for building generator programs.
500 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
503 * config/rs6000/rs6000.md (stack_protect_setsi): Support prefixed
504 instruction emission and incorporate to stack_protect_set<mode>.
505 (stack_protect_setdi): Rename to ...
506 (stack_protect_set<mode>): ... this, adjust constraint.
507 (stack_protect_testsi): Support prefixed instruction emission and
508 incorporate to stack_protect_test<mode>.
509 (stack_protect_testdi): Rename to ...
510 (stack_protect_test<mode>): ... this, adjust constraint.
512 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
514 * tree-vect-stmts.cc (vectorizable_store): Consider generated
515 VEC_PERM_EXPR stmt for VMAT_CONTIGUOUS_REVERSE in costing as
518 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
520 * tree-vect-stmts.cc (vect_model_store_cost): Remove.
521 (vectorizable_store): Adjust the costing for the remaining memory
522 access types VMAT_CONTIGUOUS{, _DOWN, _REVERSE}.
524 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
526 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
527 get VMAT_CONTIGUOUS_PERMUTE and remove VMAT_CONTIGUOUS_PERMUTE related
529 (vectorizable_store): Adjust the cost handling on
530 VMAT_CONTIGUOUS_PERMUTE without calling vect_model_store_cost.
532 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
534 * tree-vect-stmts.cc (vect_model_store_cost): Assert it will never
535 get VMAT_LOAD_STORE_LANES.
536 (vectorizable_store): Adjust the cost handling on VMAT_LOAD_STORE_LANES
537 without calling vect_model_store_cost. Factor out new lambda function
538 update_prologue_cost.
540 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
542 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
543 VMAT_ELEMENTWISE and VMAT_STRIDED_SLP any more, and remove their
545 (vectorizable_store): Adjust the cost handling on VMAT_ELEMENTWISE
546 and VMAT_STRIDED_SLP without calling vect_model_store_cost.
548 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
550 * tree-vect-stmts.cc (vectorizable_store): Adjust costing on
551 vectorizable_scan_store without calling vect_model_store_cost
554 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
556 * tree-vect-stmts.cc (vect_model_store_cost): Assert it won't get
557 VMAT_GATHER_SCATTER any more, remove VMAT_GATHER_SCATTER related
558 handlings and the related parameter gs_info.
559 (vect_build_scatter_store_calls): Add the handlings on costing with
560 one more argument cost_vec.
561 (vectorizable_store): Adjust the cost handling on VMAT_GATHER_SCATTER
562 without calling vect_model_store_cost any more.
564 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
566 * tree-vect-stmts.cc (vectorizable_store): Move and duplicate the call
567 to vect_model_store_cost down to some different transform paths
568 according to the handlings of different vect_memory_access_types
569 or some special handling need.
571 2023-10-12 Kewen Lin <linkw@linux.ibm.com>
573 * tree-vect-stmts.cc (vectorizable_store): Ensure the generated
574 vector store for some case of VMAT_ELEMENTWISE is supported.
576 2023-10-12 Mo, Zewei <zewei.mo@intel.com>
577 Hu Lin1 <lin1.hu@intel.com>
578 Hongyu Wang <hongyu.wang@intel.com>
580 * config/i386/i386.cc (gen_push2): New function to emit push2
581 and adjust cfa offset.
582 (ix86_pro_and_epilogue_can_use_push2_pop2): New function to
583 determine whether push2/pop2 can be used.
584 (ix86_compute_frame_layout): Adjust preferred stack boundary
585 and stack alignment needed for push2/pop2.
586 (ix86_emit_save_regs): Emit push2 when available.
587 (ix86_emit_restore_reg_using_pop2): New function to emit pop2
589 (ix86_emit_restore_regs_using_pop2): New function to loop
590 through the saved regs and call above.
591 (ix86_expand_epilogue): Call ix86_emit_restore_regs_using_pop2
592 when push2pop2 available.
593 * config/i386/i386.md (push2_di): New pattern for push2.
594 (pop2_di): Likewise for pop2.
596 2023-10-12 Pan Li <pan2.li@intel.com>
598 * config/riscv/autovec.md (lrint<mode><vlconvert>2): Rename from.
599 (lrint<mode><v_i_l_ll_convert>2): Rename to.
600 * config/riscv/vector-iterators.md: Rename and remove TARGET_64BIT.
602 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
604 * config/riscv/riscv-opts.h (TARGET_MIN_VLEN_OPTS): New.
606 2023-10-11 Jeff Law <jlaw@ventanamicro.com>
608 * config/riscv/riscv.md (jump): Adjust sequence to use a "jump"
609 pseudo op instead of a "call" pseudo op.
611 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
613 * config/riscv/riscv-subset.h (riscv_subset_list::parse_single_std_ext):
615 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
616 (riscv_subset_list::clone): Ditto.
617 (riscv_subset_list::parse_single_ext): Ditto.
618 (riscv_subset_list::set_loc): Ditto.
619 (riscv_set_arch_by_subset_list): Ditto.
620 * common/config/riscv/riscv-common.cc
621 (riscv_subset_list::parse_single_std_ext): New.
622 (riscv_subset_list::parse_single_multiletter_ext): Ditto.
623 (riscv_subset_list::clone): Ditto.
624 (riscv_subset_list::parse_single_ext): Ditto.
625 (riscv_subset_list::set_loc): Ditto.
626 (riscv_set_arch_by_subset_list): Ditto.
628 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
630 * config/riscv/riscv.cc (riscv_convert_vector_bits): Get setting
631 from argument rather than get setting from global setting.
632 (riscv_override_options_internal): New, splited from
633 riscv_override_options, also take a gcc_options argument.
634 (riscv_option_override): Splited most part to
635 riscv_override_options_internal.
637 2023-10-11 Kito Cheng <kito.cheng@sifive.com>
639 * doc/options.texi (Mask): Document TARGET_<NAME>_P and
640 TARGET_<NAME>_OPTS_P.
641 (InverseMask): Ditto.
642 * opth-gen.awk (Mask): Generate TARGET_<NAME>_P and
643 TARGET_<NAME>_OPTS_P macro.
644 (InverseMask): Ditto.
646 2023-10-11 Andrew Pinski <pinskia@gmail.com>
648 PR tree-optimization/111282
649 * match.pd (`a & ~(a ^ b)`, `a & (a == b)`,
650 `a & ((~a) ^ b)`): New patterns.
652 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
654 * common/config/riscv/riscv-common.cc: Add the XCValu
656 * config/riscv/constraints.md: Add builtins for the XCValu
658 * config/riscv/predicates.md (immediate_register_operand):
660 * config/riscv/corev.def: Likewise.
661 * config/riscv/corev.md: Likewise.
662 * config/riscv/riscv-builtins.cc (AVAIL): Likewise.
663 (RISCV_ATYPE_UHI): Likewise.
664 * config/riscv/riscv-ftypes.def: Likewise.
665 * config/riscv/riscv.opt: Likewise.
666 * config/riscv/riscv.cc (riscv_print_operand): Likewise.
667 * doc/extend.texi: Add XCValu documentation.
668 * doc/sourcebuild.texi: Likewise.
670 2023-10-11 Mary Bennett <mary.bennett@embecosm.com>
672 * common/config/riscv/riscv-common.cc: Add XCVmac.
673 * config/riscv/riscv-ftypes.def: Add XCVmac builtins.
674 * config/riscv/riscv-builtins.cc: Likewise.
675 * config/riscv/riscv.md: Likewise.
676 * config/riscv/riscv.opt: Likewise.
677 * doc/extend.texi: Add XCVmac builtin documentation.
678 * doc/sourcebuild.texi: Likewise.
679 * config/riscv/corev.def: New file.
680 * config/riscv/corev.md: New file.
682 2023-10-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
684 * config/riscv/autovec.md: Fix index bug.
685 * config/riscv/riscv-protos.h (gather_scatter_valid_offset_mode_p): New function.
686 * config/riscv/riscv-v.cc (expand_gather_scatter): Fix index bug.
687 (gather_scatter_valid_offset_mode_p): New function.
689 2023-10-11 Pan Li <pan2.li@intel.com>
691 * config/riscv/autovec.md (lrint<mode><vlconvert>2): New pattern
693 * config/riscv/riscv-protos.h (expand_vec_lrint): New func decl
695 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f): New helper func impl
697 (expand_vec_lrint): New function impl for expanding lint.
698 * config/riscv/vector-iterators.md: New mode attr and iterator.
700 2023-10-11 Richard Biener <rguenther@suse.de>
701 Jakub Jelinek <jakub@redhat.com>
703 PR tree-optimization/111519
704 * tree-ssa-strlen.cc (strlen_pass::count_nonzero_bytes): Add vuse
705 argument and pass it through to recursive calls and
706 count_nonzero_bytes_addr calls. Don't shadow the stmt argument, but
707 change stmt for gimple_assign_single_p statements for which we don't
709 (strlen_pass::count_nonzero_bytes_addr): Add vuse argument and pass
710 it through to recursive calls and count_nonzero_bytes calls. Don't
711 use get_strinfo if gimple_vuse (stmt) is different from vuse. Don't
712 shadow the stmt argument.
714 2023-10-11 Roger Sayle <roger@nextmovesoftware.com>
717 PR tree-optimization/106245
718 * simplify-rtx.cc (simplify_relational_operation_1): Simplify
719 the RTL (ne:SI (subreg:QI (ashift:SI x 7) 0) 0) to (and:SI x 1).
721 2023-10-11 liuhongt <hongtao.liu@intel.com>
724 * config/i386/mmx.md (divv4hf3): Refine predicate of
725 operands[2] with register_operand.
727 2023-10-10 Andrew Waterman <andrew@sifive.com>
728 Philipp Tomsich <philipp.tomsich@vrull.eu>
729 Jeff Law <jlaw@ventanamicro.com>
731 * config/riscv/riscv.cc (struct machine_function): Track if a
732 far-branch/jump is used within a function (and $ra needs to be
734 (riscv_print_operand): Implement 'N' (inverse integer branch).
735 (riscv_far_jump_used_p): Implement.
736 (riscv_save_return_addr_reg_p): New function.
737 (riscv_save_reg_p): Use riscv_save_return_addr_reg_p.
738 * config/riscv/riscv.h (FIXED_REGISTERS): Update $ra.
739 (CALL_USED_REGISTERS): Update $ra.
740 * config/riscv/riscv.md: Add new types "ret" and "jalr".
741 (length attribute): Handle long conditional and unconditional
743 (conditional branch pattern): Handle case where jump can not
744 reach the intended target.
745 (indirect_jump, tablejump): Use new "jalr" type.
746 (simple_return): Use new "ret" type.
747 (simple_return_internal, eh_return_internal): Likewise.
748 (gpr_restore_return, riscv_mret): Likewise.
749 (riscv_uret, riscv_sret): Likewise.
750 * config/riscv/generic.md (generic_branch): Also recognize jalr & ret
752 * config/riscv/sifive-7.md (sifive_7_jump): Likewise.
754 2023-10-10 Andrew Pinski <pinskia@gmail.com>
756 PR tree-optimization/111679
757 * match.pd (`a | ((~a) ^ b)`): New pattern.
759 2023-10-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
762 * config/riscv/autovec.md: Add VLS BOOL modes.
764 2023-10-10 Richard Biener <rguenther@suse.de>
766 PR tree-optimization/111751
767 * fold-const.cc (fold_view_convert_expr): Up the buffer size
769 * tree-ssa-sccvn.cc (visit_reference_op_load): Special case
770 constants, giving up when re-interpretation to the target type
773 2023-10-10 Richard Biener <rguenther@suse.de>
775 PR tree-optimization/111751
776 * tree-ssa-sccvn.cc (visit_reference_op_load): Exempt
777 BLKmode result from the padding bits check.
779 2023-10-10 Claudiu Zissulescu <claziss@gmail.com>
781 * config/arc/arc.cc (arc_select_cc_mode): Match NEG code with
783 * config/arc/arc.md (addsi_compare): Make pattern canonical.
784 (addsi_compare_2): Fix identation, constraint letters.
785 (addsi_compare_3): Likewise.
787 2023-10-09 Eugene Rozenfeld <erozen@microsoft.com>
789 * auto-profile.cc (afdo_calculate_branch_prob): Fix count comparisons
790 * tree-vect-loop-manip.cc (vect_do_peeling): Guard against zero count
791 when scaling loop profile
793 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
795 PR tree-optimization/111694
796 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Adjust
798 * value-relation.cc (adjust_equivalence_range): New.
799 * value-relation.h (adjust_equivalence_range): New prototype.
801 2023-10-09 Andrew MacLeod <amacleod@redhat.com>
803 * gimple-range-gori.cc (gori_compute::compute_operand1_range): Do
804 not call get_identity_relation.
805 (gori_compute::compute_operand2_range): Ditto.
806 * value-relation.cc (get_identity_relation): Remove.
807 * value-relation.h (get_identity_relation): Remove protyotype.
809 2023-10-09 Robin Dapp <rdapp@ventanamicro.com>
811 * config/riscv/riscv-cores.def (RISCV_TUNE): Add parameter.
812 * config/riscv/riscv-opts.h (enum riscv_microarchitecture_type):
814 * config/riscv/riscv.cc (riscv_sched_adjust_cost): Implement
816 (TARGET_SCHED_ADJUST_COST): Define.
817 * config/riscv/riscv.md (no,yes"): Include generic-ooo.md
818 * config/riscv/riscv.opt: Add -madjust-lmul-cost.
819 * config/riscv/generic-ooo.md: New file.
820 * config/riscv/vector.md: Add vsetvl_pre.
822 2023-10-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
824 * config/riscv/riscv-opts.h (TARGET_VECTOR_MISALIGN_SUPPORTED): New macro.
825 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Depend on movmisalign pattern.
826 * config/riscv/vector.md (movmisalign<mode>): New pattern.
828 2023-10-09 Xianmiao Qu <cooper.qu@linux.alibaba.com>
830 * config/riscv/thead.cc (th_mempair_save_regs): Fix missing CFI
831 directives for store-pair instruction.
833 2023-10-09 Richard Biener <rguenther@suse.de>
835 PR tree-optimization/111715
836 * alias.cc (reference_alias_ptr_type_1): When we have
837 a type-punning ref at the base search for the access
838 path part that's still semantically valid.
840 2023-10-09 Pan Li <pan2.li@intel.com>
842 * config/riscv/riscv-v.cc (shuffle_bswap_pattern): New func impl
844 (expand_vec_perm_const_1): Add handling for shuffle bswap pattern.
846 2023-10-09 Roger Sayle <roger@nextmovesoftware.com>
848 * config/i386/i386-expand.cc (ix86_split_ashr): Split shifts by
849 one into ashr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR
851 (ix86_split_lshr): Likewise, split shifts by one bit into
852 lshr[sd]i3_carry followed by rcr[sd]i2, if TARGET_USE_RCR or -Oz.
853 * config/i386/i386.h (TARGET_USE_RCR): New backend macro.
854 * config/i386/i386.md (rcrsi2): New define_insn for rcrl.
855 (rcrdi2): New define_insn for rcrq.
856 (<anyshiftrt><mode>3_carry): New define_insn for right shifts that
857 set the carry flag from the least significant bit, modelled using
859 * config/i386/x86-tune.def (X86_TUNE_USE_RCR): New tuning parameter
860 controlling use of rcr 1 vs. shrd, which is significantly faster on
863 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
865 * config/i386/i386.opt: Allow -mno-evex512.
867 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
868 Hu, Lin1 <lin1.hu@intel.com>
870 * config/i386/sse.md (V48H_AVX512VL): Add TARGET_EVEX512.
873 (VFH_AVX512VL): Ditto.
875 (VHF_AVX512VL): Ditto.
876 (VI2H_AVX512VL): Ditto.
877 (VI2F_256_512): Ditto.
878 (VF48_I1248): Remove unused iterator.
879 (VF48H_AVX512VL): Add TARGET_EVEX512.
880 (VF_AVX512): Remove unused iterator.
881 (REDUC_PLUS_MODE): Add TARGET_EVEX512.
882 (REDUC_SMINMAX_MODE): Ditto.
884 (VFH_SF_AVX512VL): Ditto.
885 (VEC_PERM_AVX2): Ditto.
887 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
888 Hu, Lin1 <lin1.hu@intel.com>
890 * config/i386/sse.md (VI1_AVX512VL): Add TARGET_EVEX512.
892 (VI1_AVX512F): Ditto.
893 (VI1_AVX512VNNI): Ditto.
894 (VI1_AVX512VL_F): Ditto.
895 (VI12_VI48F_AVX512VL): Ditto.
896 (*avx512f_permvar_truncv32hiv32qi_1): Ditto.
897 (sdot_prod<mode>): Ditto.
898 (VEC_PERM_AVX2): Ditto.
901 (vpmadd52<vpmadd52type>v8di): Ditto.
902 (usdot_prod<mode>): Ditto.
903 (vpdpbusd_v16si): Ditto.
904 (vpdpbusds_v16si): Ditto.
905 (vpdpwssd_v16si): Ditto.
906 (vpdpwssds_v16si): Ditto.
907 (VI48_AVX512VP2VL): Ditto.
908 (avx512vp2intersect_2intersectv16si): Ditto.
909 (VF_AVX512BF16VL): Ditto.
910 (VF1_AVX512_256): Ditto.
912 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
914 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
915 Make sure there is EVEX512 enabled.
916 (ix86_expand_vecop_qihi2): Refuse V32QI->V32HI when no EVEX512.
917 * config/i386/i386.cc (ix86_hard_regno_mode_ok): Disable 64 bit mask
918 when !TARGET_EVEX512.
919 * config/i386/i386.md (avx512bw_512): New.
920 (SWI1248_AVX512BWDQ_64): Add TARGET_EVEX512.
921 (*zero_extendsidi2): Change isa to avx512bw_512.
924 (*andn<mode>_1): Change isa to kmov_isa.
925 (*<code><mode>_1): Ditto.
926 (*notxor<mode>_1): Ditto.
927 (*one_cmpl<mode>2_1): Ditto.
928 (*one_cmplsi2_1_zext): Change isa to avx512bw_512.
929 (*ashl<mode>3_1): Change isa to kmov_isa.
930 (*lshr<mode>3_1): Ditto.
931 * config/i386/sse.md (VI12HFBF_AVX512VL): Add TARGET_EVEX512.
932 (VI1248_AVX512VLBW): Ditto.
933 (VHFBF_AVX512VL): Ditto.
938 (VI12_256_512_AVX512VL): Ditto.
939 (VI2_AVX2_AVX512BW): Ditto.
940 (VI2_AVX512VNNIBW): Ditto.
941 (VI2_AVX512VL): Ditto.
942 (VI2HFBF_AVX512VL): Ditto.
943 (VI8_AVX2_AVX512BW): Ditto.
944 (VIMAX_AVX2_AVX512BW): Ditto.
945 (VIMAX_AVX512VL): Ditto.
946 (VI12_AVX2_AVX512BW): Ditto.
947 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
948 (VI248_AVX512VL): Ditto.
949 (VI248_AVX512VLBW): Ditto.
950 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
951 (VI248_AVX512BW): Ditto.
952 (VI248_AVX512BW_AVX512VL): Ditto.
954 (VI124_256_AVX512F_AVX512BW): Ditto.
955 (VI_AVX512BW): Ditto.
956 (VIHFBF_AVX512BW): Ditto.
957 (SWI1248_AVX512BWDQ): Ditto.
958 (SWI1248_AVX512BW): Ditto.
959 (SWI1248_AVX512BWDQ2): Ditto.
960 (*knotsi_1_zext): Ditto.
961 (define_split for zero_extend + not): Ditto.
963 (REDUC_SMINMAX_MODE): Ditto.
964 (VEC_EXTRACT_MODE): Ditto.
965 (*avx512bw_permvar_truncv16siv16hi_1): Ditto.
966 (*avx512bw_permvar_truncv16siv16hi_1_hf): Ditto.
967 (truncv32hiv32qi2): Ditto.
968 (avx512bw_<code>v32hiv32qi2): Ditto.
969 (avx512bw_<code>v32hiv32qi2_mask): Ditto.
970 (avx512bw_<code>v32hiv32qi2_mask_store): Ditto.
972 (VEC_PERM_AVX2): Ditto.
973 (AVX512ZEXTMASK): Ditto.
975 (vec_pack_trunc_<mode>): Change iterator to SWI24_MASK.
976 (avx512bw_packsswb<mask_name>): Add TARGET_EVEX512.
977 (avx512bw_packssdw<mask_name>): Ditto.
978 (avx512bw_interleave_highv64qi<mask_name>): Ditto.
979 (avx512bw_interleave_lowv64qi<mask_name>): Ditto.
980 (<mask_codefor>avx512bw_pshuflwv32hi<mask_name>): Ditto.
981 (<mask_codefor>avx512bw_pshufhwv32hi<mask_name>): Ditto.
982 (vec_unpacks_lo_di): Ditto.
984 (vec_unpacks_hi_<mode>): Change iterator to SWI48x_MASK.
985 (avx512bw_umulhrswv32hi3<mask_name>): Add TARGET_EVEX512.
986 (VI1248_AVX512VL_AVX512BW): Ditto.
987 (avx512bw_<code>v32qiv32hi2<mask_name>): Ditto.
988 (*avx512bw_zero_extendv32qiv32hi2_1): Ditto.
989 (*avx512bw_zero_extendv32qiv32hi2_2): Ditto.
990 (<insn>v32qiv32hi2): Ditto.
991 (pbroadcast_evex_isa): Change isa attribute to avx512bw_512.
992 (VPERMI2): Add TARGET_EVEX512.
995 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
997 * config/i386/i386-expand.cc (ix86_expand_sse2_mulvxdi3):
998 Add TARGET_EVEX512 for 512 bit usage.
999 * config/i386/i386.cc (standard_sse_constant_opcode): Ditto.
1000 * config/i386/sse.md (VF1_VF2_AVX512DQ): Ditto.
1001 (VF1_128_256VL): Ditto.
1002 (VF2_AVX512VL): Ditto.
1003 (VI8_256_512): Ditto.
1004 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
1006 (AVX512_VEC): Ditto.
1007 (AVX512_VEC_2): Ditto.
1008 (VI4F_BRCST32x2): Ditto.
1009 (VI8F_BRCST64x2): Ditto.
1011 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1013 * config/i386/i386-builtins.cc
1014 (ix86_vectorize_builtin_gather): Disable 512 bit gather
1015 when !TARGET_EVEX512.
1016 * config/i386/i386-expand.cc (ix86_valid_mask_cmp_mode):
1018 (ix86_expand_int_sse_cmp): Ditto.
1019 (ix86_expand_vector_init_one_nonzero): Disable subroutine
1020 when !TARGET_EVEX512.
1021 (ix86_emit_swsqrtsf): Add TARGET_EVEX512.
1022 (ix86_vectorize_vec_perm_const): Disable subroutine when
1024 * config/i386/i386.cc
1025 (standard_sse_constant_p): Add TARGET_EVEX512.
1026 (standard_sse_constant_opcode): Ditto.
1027 (ix86_get_ssemov): Ditto.
1028 (ix86_legitimate_constant_p): Ditto.
1029 (ix86_vectorize_builtin_scatter): Diable 512 bit scatter
1030 when !TARGET_EVEX512.
1031 * config/i386/i386.md (avx512f_512): New.
1032 (movxi): Add TARGET_EVEX512.
1033 (*movxi_internal_avx512f): Ditto.
1034 (*movdi_internal): Change alternative 12 to ?Yv. Adjust mode
1036 (*movsi_internal): Change alternative 8 to ?Yv. Adjust mode for
1038 (*movhi_internal): Change alternative 11 to *Yv.
1039 (*movdf_internal): Change alternative 12 to Yv.
1040 (*movsf_internal): Change alternative 5 to Yv. Adjust mode for
1041 alternative 5 and 6.
1042 (*mov<mode>_internal): Change alternative 4 to Yv.
1043 (define_split for convert SF to DF): Add TARGET_EVEX512.
1044 (extendbfsf2_1): Ditto.
1045 * config/i386/predicates.md (bcst_mem_operand): Disable predicate
1046 for 512 bit when !TARGET_EVEX512.
1047 * config/i386/sse.md (VMOVE): Add TARGET_EVEX512.
1048 (V48_AVX512VL): Ditto.
1049 (V48_256_512_AVX512VL): Ditto.
1050 (V48H_AVX512VL): Ditto.
1051 (VI12_AVX512VL): Ditto.
1056 (VF1_VF2_AVX512DQ): Ditto.
1063 (VF2_512_256): Ditto.
1064 (VF2_512_256VL): Ditto.
1067 (VI48_AVX512VL): Ditto.
1068 (VI1248_AVX512VLBW): Ditto.
1069 (VF_AVX512VL): Ditto.
1070 (VFH_AVX512VL): Ditto.
1071 (VF1_AVX512VL): Ditto.
1076 (VI8_AVX512VL): Ditto.
1077 (VI2_AVX512F): Ditto.
1078 (VI4_AVX512F): Ditto.
1079 (VI4_AVX512VL): Ditto.
1080 (VI48_AVX512F_AVX512VL): Ditto.
1081 (VI8_AVX2_AVX512F): Ditto.
1082 (VI8_AVX_AVX512F): Ditto.
1085 (VI124_AVX2_24_AVX512F_1_AVX512BW): Ditto.
1086 (VI248_AVX512VLBW): Ditto.
1087 (VI248_AVX2_8_AVX512F_24_AVX512BW): Ditto.
1088 (VI248_AVX512BW): Ditto.
1089 (VI248_AVX512BW_AVX512VL): Ditto.
1090 (VI48_AVX512F): Ditto.
1091 (VI48_AVX_AVX512F): Ditto.
1092 (VI12_AVX_AVX512F): Ditto.
1094 (VI124_256_AVX512F_AVX512BW): Ditto.
1096 (VI_AVX512BW): Ditto.
1097 (VIHFBF_AVX512BW): Ditto.
1098 (VI4F_256_512): Ditto.
1099 (VI48F_256_512): Ditto.
1101 (VI12_VI48F_AVX512VL): Ditto.
1103 (AVX512MODE2P): Ditto.
1104 (STORENT_MODE): Ditto.
1105 (REDUC_PLUS_MODE): Ditto.
1106 (REDUC_SMINMAX_MODE): Ditto.
1107 (*andnot<mode>3): Change isa attribute to avx512f_512.
1108 (*andnot<mode>3): Ditto.
1109 (<code><mode>3): Ditto.
1111 (FMAMODEM): Add TARGET_EVEX512.
1112 (FMAMODE_AVX512): Ditto.
1113 (VFH_SF_AVX512VL): Ditto.
1114 (avx512f_fix_notruncv16sfv16si<mask_name><round_name>): Ditto.
1115 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):
1117 (avx512f_cvtdq2pd512_2): Ditto.
1118 (avx512f_cvtpd2dq512<mask_name><round_name>): Ditto.
1119 (fix<fixunssuffix>_truncv8dfv8si2<mask_name><round_saeonly_name>):
1121 (<mask_codefor>avx512f_cvtpd2ps512<mask_name><round_name>): Ditto.
1122 (vec_unpacks_lo_v16sf): Ditto.
1123 (vec_unpacks_hi_v16sf): Ditto.
1124 (vec_unpacks_float_hi_v16si): Ditto.
1125 (vec_unpacks_float_lo_v16si): Ditto.
1126 (vec_unpacku_float_hi_v16si): Ditto.
1127 (vec_unpacku_float_lo_v16si): Ditto.
1128 (vec_pack_sfix_trunc_v8df): Ditto.
1129 (avx512f_vec_pack_sfix_v8df): Ditto.
1130 (<mask_codefor>avx512f_unpckhps512<mask_name>): Ditto.
1131 (<mask_codefor>avx512f_unpcklps512<mask_name>): Ditto.
1132 (<mask_codefor>avx512f_movshdup512<mask_name>): Ditto.
1133 (<mask_codefor>avx512f_movsldup512<mask_name>): Ditto.
1134 (AVX512_VEC): Ditto.
1135 (AVX512_VEC_2): Ditto.
1136 (vec_extract_lo_v64qi): Ditto.
1137 (vec_extract_hi_v64qi): Ditto.
1138 (VEC_EXTRACT_MODE): Ditto.
1139 (<mask_codefor>avx512f_unpckhpd512<mask_name>): Ditto.
1140 (avx512f_movddup512<mask_name>): Ditto.
1141 (avx512f_unpcklpd512<mask_name>): Ditto.
1142 (*<avx512>_vternlog<mode>_all): Ditto.
1143 (*<avx512>_vpternlog<mode>_1): Ditto.
1144 (*<avx512>_vpternlog<mode>_2): Ditto.
1145 (*<avx512>_vpternlog<mode>_3): Ditto.
1146 (avx512f_shufps512_mask): Ditto.
1147 (avx512f_shufps512_1<mask_name>): Ditto.
1148 (avx512f_shufpd512_mask): Ditto.
1149 (avx512f_shufpd512_1<mask_name>): Ditto.
1150 (<mask_codefor>avx512f_interleave_highv8di<mask_name>): Ditto.
1151 (<mask_codefor>avx512f_interleave_lowv8di<mask_name>): Ditto.
1152 (vec_dupv2df<mask_name>): Ditto.
1153 (trunc<pmov_src_lower><mode>2): Ditto.
1154 (*avx512f_<code><pmov_src_lower><mode>2): Ditto.
1155 (*avx512f_vpermvar_truncv8div8si_1): Ditto.
1156 (avx512f_<code><pmov_src_lower><mode>2_mask): Ditto.
1157 (avx512f_<code><pmov_src_lower><mode>2_mask_store): Ditto.
1158 (truncv8div8qi2): Ditto.
1159 (avx512f_<code>v8div16qi2): Ditto.
1160 (*avx512f_<code>v8div16qi2_store_1): Ditto.
1161 (*avx512f_<code>v8div16qi2_store_2): Ditto.
1162 (avx512f_<code>v8div16qi2_mask): Ditto.
1163 (*avx512f_<code>v8div16qi2_mask_1): Ditto.
1164 (*avx512f_<code>v8div16qi2_mask_store_1): Ditto.
1165 (avx512f_<code>v8div16qi2_mask_store_2): Ditto.
1166 (vec_widen_umult_even_v16si<mask_name>): Ditto.
1167 (*vec_widen_umult_even_v16si<mask_name>): Ditto.
1168 (vec_widen_smult_even_v16si<mask_name>): Ditto.
1169 (*vec_widen_smult_even_v16si<mask_name>): Ditto.
1170 (VEC_PERM_AVX2): Ditto.
1171 (one_cmpl<mode>2): Ditto.
1172 (<mask_codefor>one_cmpl<mode>2<mask_name>): Ditto.
1173 (*one_cmpl<mode>2_pternlog_false_dep): Ditto.
1174 (define_split to xor): Ditto.
1175 (*andnot<mode>3): Ditto.
1176 (define_split for ior): Ditto.
1177 (*iornot<mode>3): Ditto.
1178 (*xnor<mode>3): Ditto.
1179 (*<nlogic><mode>3): Ditto.
1180 (<mask_codefor>avx512f_interleave_highv16si<mask_name>): Ditto.
1181 (<mask_codefor>avx512f_interleave_lowv16si<mask_name>): Ditto.
1182 (avx512f_pshufdv3_mask): Ditto.
1183 (avx512f_pshufd_1<mask_name>): Ditto.
1184 (*vec_extractv4ti): Ditto.
1185 (VEXTRACTI128_MODE): Ditto.
1186 (define_split to vec_extract): Ditto.
1187 (VI1248_AVX512VL_AVX512BW): Ditto.
1188 (<mask_codefor>avx512f_<code>v16qiv16si2<mask_name>): Ditto.
1189 (<insn>v16qiv16si2): Ditto.
1190 (avx512f_<code>v16hiv16si2<mask_name>): Ditto.
1191 (<insn>v16hiv16si2): Ditto.
1192 (avx512f_zero_extendv16hiv16si2_1): Ditto.
1193 (avx512f_<code>v8qiv8di2<mask_name>): Ditto.
1194 (*avx512f_<code>v8qiv8di2<mask_name>_1): Ditto.
1195 (*avx512f_<code>v8qiv8di2<mask_name>_2): Ditto.
1196 (<insn>v8qiv8di2): Ditto.
1197 (avx512f_<code>v8hiv8di2<mask_name>): Ditto.
1198 (<insn>v8hiv8di2): Ditto.
1199 (avx512f_<code>v8siv8di2<mask_name>): Ditto.
1200 (*avx512f_zero_extendv8siv8di2_1): Ditto.
1201 (*avx512f_zero_extendv8siv8di2_2): Ditto.
1202 (<insn>v8siv8di2): Ditto.
1203 (avx512f_roundps512_sfix): Ditto.
1204 (vashrv8di3): Ditto.
1205 (vashrv16si3): Ditto.
1206 (pbroadcast_evex_isa): Change isa attribute to avx512f_512.
1207 (vec_dupv4sf): Add TARGET_EVEX512.
1208 (*vec_dupv4si): Ditto.
1209 (*vec_dupv2di): Ditto.
1210 (vec_dup<mode>): Change isa attribute to avx512f_512.
1211 (VPERMI2): Add TARGET_EVEX512.
1213 (VEC_INIT_MODE): Ditto.
1214 (VEC_INIT_HALF_MODE): Ditto.
1215 (<mask_codefor>avx512f_vcvtph2ps512<mask_name><round_saeonly_name>):
1217 (avx512f_vcvtps2ph512_mask_sae): Ditto.
1218 (<mask_codefor>avx512f_vcvtps2ph512<mask_name><round_saeonly_name>):
1220 (*avx512f_vcvtps2ph512<merge_mask_name>): Ditto.
1221 (INT_BROADCAST_MODE): Ditto.
1223 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1225 * config/i386/i386-expand.cc (ix86_broadcast_from_constant):
1226 Disable zmm broadcast for !TARGET_EVEX512.
1227 * config/i386/i386-options.cc (ix86_option_override_internal):
1228 Do not use PVW_512 when no-evex512.
1229 (ix86_simd_clone_adjust): Add evex512 target into string.
1230 * config/i386/i386.cc (type_natural_mode): Report ABI warning
1231 when using zmm register w/o evex512.
1232 (ix86_return_in_memory): Do not allow zmm when !TARGET_EVEX512.
1233 (ix86_hard_regno_mode_ok): Ditto.
1234 (ix86_set_reg_reg_cost): Ditto.
1235 (ix86_rtx_costs): Ditto.
1236 (ix86_vector_mode_supported_p): Ditto.
1237 (ix86_preferred_simd_mode): Ditto.
1238 (ix86_get_mask_mode): Ditto.
1239 (ix86_simd_clone_compute_vecsize_and_simdlen): Disable 512 bit
1240 libmvec call when !TARGET_EVEX512.
1241 (ix86_simd_clone_usable): Ditto.
1242 * config/i386/i386.h (BIGGEST_ALIGNMENT): Disable 512 alignment
1243 when !TARGET_EVEX512
1244 (MOVE_MAX): Do not use PVW_512 when !TARGET_EVEX512.
1245 (STORE_MAX_PIECES): Ditto.
1247 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1249 * config/i386/i386-builtin.def (BDESC): Add
1250 OPTION_MASK_ISA2_EVEX512.
1252 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1254 * config/i386/i386-builtin.def (BDESC): Add
1255 OPTION_MASK_ISA2_EVEX512.
1257 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1259 * config/i386/i386-builtin.def (BDESC): Add
1260 OPTION_MASK_ISA2_EVEX512.
1262 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1264 * config/i386/i386-builtin.def (BDESC): Add
1265 OPTION_MASK_ISA2_EVEX512.
1267 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1269 * config/i386/i386-builtin.def (BDESC): Add
1270 OPTION_MASK_ISA2_EVEX512.
1271 * config/i386/i386-builtins.cc
1272 (ix86_init_mmx_sse_builtins): Ditto.
1274 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1275 Hu, Lin1 <lin1.hu@intel.com>
1277 * config/i386/avx512fp16intrin.h: Add evex512 target for 512 bit
1280 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1282 * config.gcc: Add avx512bitalgvlintrin.h.
1283 * config/i386/avx5124fmapsintrin.h: Add evex512 target for 512 bit
1285 * config/i386/avx5124vnniwintrin.h: Ditto.
1286 * config/i386/avx512bf16intrin.h: Ditto.
1287 * config/i386/avx512bitalgintrin.h: Add evex512 target for 512 bit
1288 intrins. Split 128/256 bit intrins to avx512bitalgvlintrin.h.
1289 * config/i386/avx512erintrin.h: Add evex512 target for 512 bit
1291 * config/i386/avx512ifmaintrin.h: Ditto
1292 * config/i386/avx512pfintrin.h: Ditto
1293 * config/i386/avx512vbmi2intrin.h: Ditto.
1294 * config/i386/avx512vbmiintrin.h: Ditto.
1295 * config/i386/avx512vnniintrin.h: Ditto.
1296 * config/i386/avx512vp2intersectintrin.h: Ditto.
1297 * config/i386/avx512vpopcntdqintrin.h: Ditto.
1298 * config/i386/gfniintrin.h: Ditto.
1299 * config/i386/immintrin.h: Add avx512bitalgvlintrin.h.
1300 * config/i386/vaesintrin.h: Add evex512 target for 512 bit intrins.
1301 * config/i386/vpclmulqdqintrin.h: Ditto.
1302 * config/i386/avx512bitalgvlintrin.h: New.
1304 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1306 * config/i386/avx512bwintrin.h: Add evex512 target for 512 bit
1309 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1311 * config/i386/avx512dqintrin.h: Add evex512 target for 512 bit
1314 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1316 * config/i386/avx512fintrin.h: Add evex512 target for 512 bit intrins.
1318 2023-10-09 Haochen Jiang <haochen.jiang@intel.com>
1320 * common/config/i386/i386-common.cc
1321 (OPTION_MASK_ISA2_EVEX512_SET): New.
1322 (OPTION_MASK_ISA2_EVEX512_UNSET): Ditto.
1323 (ix86_handle_option): Handle EVEX512.
1324 * config/i386/i386-c.cc
1325 (ix86_target_macros_internal): Handle EVEX512. Add __EVEX256__
1326 when AVX512VL is set.
1327 * config/i386/i386-options.cc: (isa2_opts): Handle EVEX512.
1328 (ix86_valid_target_attribute_inner_p): Ditto.
1329 (ix86_option_override_internal): Set EVEX512 target if it is not
1330 explicitly set when AVX512 is enabled. Disable
1331 AVX512{PF,ER,4VNNIW,4FAMPS} for -mno-evex512.
1332 * config/i386/i386.opt: Add mevex512. Temporaily RejectNegative.
1334 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
1337 * config/rs6000/rs6000.md (lrint<mode>di2): Remove TARGET_FPRND
1338 from insn condition.
1339 (lrint<mode>si2): New insn pattern for 32bit lrint.
1341 2023-10-09 Haochen Gui <guihaoc@gcc.gnu.org>
1344 * config/rs6000/rs6000.cc (rs6000_hard_regno_mode_ok_uncached):
1345 Enable SImode on FP registers for P7.
1346 * config/rs6000/rs6000.md (*movsi_internal1): Add fmr for SImode
1347 move between FP registers. Set attribute isa of stfiwx to "*"
1348 and attribute of stxsiwx to "p7".
1350 2023-10-09 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
1352 * config/s390/s390.md: Make use of new copysign RTL.
1354 2023-10-09 Hongyu Wang <hongyu.wang@intel.com>
1356 * config/i386/sse.md (vec_concatv2di): Replace constraint "m"
1357 with "jm" for alternative 0 and 1 of operand 2.
1358 (sse4_1_<code><mode>3<mask_name>): Replace constraint "Bm" with
1359 "ja" for alternative 0 and 1 of operand2.
1361 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1364 * text-art/table.cc (table::maybe_set_cell_span): New.
1365 (table::add_other_table): New.
1366 * text-art/table.h (class table::cell_placement): Add class table
1368 (table::add_rows): New.
1369 (table::add_row): Reimplement in terms of add_rows.
1370 (table::maybe_set_cell_span): New decl.
1371 (table::add_other_table): New decl.
1372 * text-art/types.h (operator+): New operator for rect + coord.
1374 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1376 * genmatch.cc (main): Update for "m_" prefix of some fields of
1378 * input.cc (make_location): Update for removal of
1379 COMBINE_LOCATION_DATA.
1380 (dump_line_table_statistics): Update for "m_" prefix of some
1381 fields of line_maps.
1382 (location_with_discriminator): Update for removal of
1383 COMBINE_LOCATION_DATA.
1384 (line_table_test::line_table_test): Update for "m_" prefix of some
1385 fields of line_maps.
1386 * toplev.cc (general_init): Likewise.
1387 * tree.cc (set_block): Update for removal of
1388 COMBINE_LOCATION_DATA.
1389 (set_source_range): Likewise.
1391 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1393 * input.cc (make_location): Move implementation to
1394 line_maps::make_location.
1396 2023-10-08 David Malcolm <dmalcolm@redhat.com>
1399 * input.cc (file_cache::add_file): Update leading comment to
1400 clarify that it can fail.
1401 (file_cache::lookup_or_add_file): Likewise.
1402 (file_cache::get_source_file_content): Gracefully handle
1403 lookup_or_add_file failing.
1405 2023-10-08 liuhongt <hongtao.liu@intel.com>
1407 * config/i386/i386.cc (ix86_build_const_vector): Handle V2HF
1409 (ix86_build_signbit_mask): Ditto.
1410 * config/i386/mmx.md (mmxintvecmode): Ditto.
1411 (<code><mode>2): New define_expand.
1412 (*mmx_<code><mode>): New define_insn_and_split.
1413 (*mmx_nabs<mode>2): Ditto.
1414 (*mmx_andnot<mode>3): New define_insn.
1415 (<code><mode>3): Ditto.
1416 (copysign<mode>3): New define_expand.
1417 (xorsign<mode>3): Ditto.
1418 (signbit<mode>2): Ditto.
1420 2023-10-08 liuhongt <hongtao.liu@intel.com>
1422 * config/i386/mmx.md (VHF_32_64): New mode iterator.
1423 (<insn><mode>3): New define_expand, merged from ..
1424 (<insn>v4hf3): .. this and
1425 (<insn>v2hf3): .. this.
1426 (movd_v2hf_to_sse_reg): New define_expand, splitted from ..
1427 (movd_v2hf_to_sse): .. this.
1428 (<code><mode>3): New define_expand.
1430 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1432 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rldic): New function.
1433 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rldic.
1435 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1437 * config/rs6000/rs6000.cc (can_be_built_by_li_lis_and_rldicl): New
1439 (can_be_built_by_li_lis_and_rldicr): New function.
1440 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rldicr and
1441 can_be_built_by_li_lis_and_rldicl.
1443 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1445 * config/rs6000/rs6000.cc (can_be_rotated_to_negative_lis): New
1447 (can_be_built_by_li_and_rotldi): Rename to ...
1448 (can_be_built_by_li_lis_and_rotldi): ... this function.
1449 (rs6000_emit_set_long_const): Call can_be_built_by_li_lis_and_rotldi.
1451 2023-10-08 Jiufu Guo <guojiufu@linux.ibm.com>
1453 * config/rs6000/rs6000.cc (can_be_built_by_li_and_rotldi): New function.
1454 (rs6000_emit_set_long_const): Call can_be_built_by_li_and_rotldi.
1456 2023-10-08 Yanzhang Wang <yanzhang.wang@intel.com>
1458 * config/riscv/linux.h: Pass the static-pie specific options to
1461 2023-10-07 Saurabh Jha <saurabh.jha@arm.com>
1463 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add support for
1465 * config/aarch64/aarch64-tune.md: Regenerated.
1466 * doc/invoke.texi: Add command-line option for cortex-x4 core.
1468 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1469 Hongyu Wang <hongyu.wang@intel.com>
1470 Hongtao Liu <hongtao.liu@intel.com>
1472 * config/i386/constraints.md (jb): New constraint for vsib memory
1473 that does not allow gpr32.
1474 * config/i386/i386.md: (setcc_<mode>_sse): Replace m to jm for avx
1475 alternative and set attr_gpr32 to 0.
1476 (movmsk_df): Split avx/noavx alternatives and replace "r" to "jr" for
1478 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
1479 "m/Bm" to "jm/ja" for avx alternative, set its gpr32 attr to 0.
1480 (*rsqrtsf2_sse): Likewise.
1481 * config/i386/mmx.md (mmx_pmovmskb): Split alternative 1 to
1482 avx/noavx and assign jr/r constraint to dest.
1483 * config/i386/sse.md (<sse>_movmsk<ssemodesuffix><avxsizesuffix>):
1484 Split avx/noavx alternatives and replace "r" to "jr" for avx alternative.
1485 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext): Likewise.
1486 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_lt): Likewise.
1487 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_lt): Likewise.
1488 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_shift): Likewise.
1489 (*<sse>_movmsk<ssemodesuffix><avxsizesuffix>_<u>ext_shift): Likewise.
1490 (<sse2_avx2>_pmovmskb): Likewise.
1491 (*<sse2_avx2>_pmovmskb_zext): Likewise.
1492 (*sse2_pmovmskb_ext): Likewise.
1493 (*<sse2_avx2>_pmovmskb_lt): Likewise.
1494 (*<sse2_avx2>_pmovmskb_zext_lt): Likewise.
1495 (*sse2_pmovmskb_ext_lt): Likewise.
1496 (<sse>_rcp<mode>2): Split avx/noavx alternatives and replace
1497 "m/Bm" to "jm/ja" for avx alternative, set its attr_gpr32 to 0.
1498 (sse_vmrcpv4sf2): Likewise.
1499 (*sse_vmrcpv4sf2): Likewise.
1500 (rsqrt<mode>2): Likewise.
1501 (sse_vmrsqrtv4sf2): Likewise.
1502 (*sse_vmrsqrtv4sf2): Likewise.
1503 (avx_h<insn>v4df3): Likewise.
1504 (sse3_hsubv2df3): Likewise.
1505 (avx_h<insn>v8sf3): Likewise.
1506 (sse3_h<insn>v4sf3): Likewise.
1507 (<sse3>_lddqu<avxsizesuffix>): Likewise.
1508 (avx_cmp<mode>3): Likewise.
1509 (avx_vmcmp<mode>3): Likewise.
1510 (*sse2_gt<mode>3): Likewise.
1511 (sse_ldmxcsr): Likewise.
1512 (sse_stmxcsr): Likewise.
1513 (avx_vtest<ssemodesuffix><avxsizesuffix>): Replace m to jm for
1514 avx alternative and set attr_gpr32 to 0.
1515 (avx2_permv2ti): Likewise.
1516 (*avx_vperm2f128<mode>_full): Likewise.
1517 (*avx_vperm2f128<mode>_nozero): Likewise.
1518 (vec_set_lo_v32qi): Likewise.
1519 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Likewise.
1520 (<avx_avx2>_maskstore<ssemodesuffix><avxsi)zesuffix>: Likewise.
1521 (avx_cmp<mode>3): Likewise.
1522 (avx_vmcmp<mode>3): Likewise.
1523 (*<sse>_maskcmp<mode>3_comm): Likewise.
1524 (*avx2_gathersi<VEC_GATHER_MODE:mode>): Replace Tv to jb and set
1526 (*avx2_gathersi<VEC_GATHER_MODE:mode>_2): Likewise.
1527 (*avx2_gatherdi<VEC_GATHER_MODE:mode>): Likewise.
1528 (*avx2_gatherdi<VEC_GATHER_MODE:mode>_2): Likewise.
1529 (*avx2_gatherdi<VI4F_256:mode>_3): Likewise.
1530 (*avx2_gatherdi<VI4F_256:mode>_4): Likewise.
1531 (avx_vbroadcastf128_<mode>): Restrict non-egpr alternative to
1532 noavx512vl, set its constraint to jm and set attr_gpr32 to 0.
1533 (vec_set_lo_<mode><mask_name>): Likewise.
1534 (vec_set_lo_<mode><mask_name>): Likewise for SF/SI modes.
1535 (vec_set_hi_<mode><mask_name>): Likewise.
1536 (vec_set_hi_<mode><mask_name>): Likewise for SF/SI modes.
1537 (vec_set_hi_<mode>): Likewise.
1538 (vec_set_lo_<mode>): Likewise.
1539 (avx2_set_hi_v32qi): Likewise.
1541 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1542 Hongyu Wang <hongyu.wang@intel.com>
1543 Hongtao Liu <hongtao.liu@intel.com>
1545 * config/i386/i386.md (*movhi_internal): Split out non-gpr
1546 supported pextrw with mem constraint to avx/noavx alternatives,
1547 set jm and attr gpr32 0 to the noavx alternative.
1548 (*mov<mode>_internal): Likewise.
1549 * config/i386/mmx.md (mmx_pshufbv8qi3): Change "r/m/Bm" to
1550 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative.
1551 (mmx_pshufbv4qi3): Likewise.
1552 (*mmx_pinsrd): Likewise.
1553 (*mmx_pinsrb): Likewise.
1554 (*pinsrb): Likewise.
1555 (mmx_pshufbv8qi3): Likewise.
1556 (mmx_pshufbv4qi3): Likewise.
1557 (@sse4_1_insertps_<mode>): Likewise.
1558 (*mmx_pextrw): Split altrenatives and map non-EGPR
1559 constraints, attr_gpr32 and attr_isa to noavx mnemonics.
1560 (*movv2qi_internal): Likewise.
1561 (*pextrw): Likewise.
1562 (*mmx_pextrb): Likewise.
1563 (*mmx_pextrb_zext): Likewise.
1564 (*pextrb): Likewise.
1565 (*pextrb_zext): Likewise.
1566 (vec_extractv2si_1): Likewise.
1567 (vec_extractv2si_1_zext): Likewise.
1568 * config/i386/sse.md: (vi128_h_r): New mode attr for
1569 pinsr{bw}/pextr{bw} with reg operand.
1570 (*abs<mode>2): Split altrenatives and %v in mnemonics, map
1571 non-EGPR constraints, gpr32 and isa attrs to noavx mnemonics.
1572 (*vec_extract<mode>): Likewise.
1573 (*vec_extract<mode>): Likewise for HFBF pattern.
1574 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
1575 (*vec_extractv4si_1): Likewise.
1576 (*vec_extractv4si_zext): Likewise.
1577 (*vec_extractv2di_1): Likewise.
1578 (*vec_concatv2si_sse4_1): Likewise.
1579 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
1580 (vec_concatv2di): Likewise.
1581 (*sse4_1_<code>v2qiv2di2<mask_name>_1): Likewise.
1582 (ssse3_avx2>_pshufb<mode>3<mask_name>): Change "r/m/Bm" to
1583 "jr/jm/ja" and set_attr gpr32 0 for noavx alternative, split
1584 %v for avx/noavx alternatives if necessary.
1585 (*vec_concatv2sf_sse4_1): Likewise.
1586 (*sse4_1_extractps): Likewise.
1587 (vec_set<mode>_0): Likewise for VI4F_128.
1588 (*vec_setv4sf_sse4_1): Likewise.
1589 (@sse4_1_insertps<mode>): Likewise.
1590 (ssse3_pmaddubsw128): Likewise.
1591 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
1592 (<sse4_1_avx2>_packusdw<mask_name>): Likewise.
1593 (<ssse3_avx2>_palignr<mode>): Likewise.
1594 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
1595 (<sse4_1_avx2>_mpsadbw): Likewise.
1596 (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
1597 (*<sse4_1_avx2>_mul<mode>3<mask_name>): Likewise.
1598 (*sse4_1_<code><mode>3<mask_name>): Likewise.
1599 (*<code>v8hi3): Likewise.
1600 (*<code>v16qi3): Likewise.
1601 (*sse4_1_<code>v8qiv8hi2<mask_name>_1): Likewise.
1602 (*sse4_1_zero_extendv8qiv8hi2_3): Likewise.
1603 (*sse4_1_zero_extendv8qiv8hi2_4): Likewise.
1604 (*sse4_1_<code>v4qiv4si2<mask_name>_1): Likewise.
1605 (*sse4_1_<code>v4hiv4si2<mask_name>_1): Likewise.
1606 (*sse4_1_zero_extendv4hiv4si2_3): Likewise.
1607 (*sse4_1_zero_extendv4hiv4si2_4): Likewise.
1608 (*sse4_1_<code>v2hiv2di2<mask_name>_1): Likewise.
1609 (*sse4_1_<code>v2siv2di2<mask_name>_1): Likewise.
1610 (*sse4_1_zero_extendv2siv2di2_3): Likewise.
1611 (*sse4_1_zero_extendv2siv2di2_4): Likewise.
1613 (aesdeclast): Likewise.
1615 (aesenclast): Likewise.
1616 (pclmulqdq): Likewise.
1617 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
1618 (vgf2p8affineqb_<mode><mask_name>): Likewise.
1619 (vgf2p8mulb_<mode><mask_name>): Likewise.
1621 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1622 Hongyu Wang <hongyu.wang@intel.com>
1623 Hongtao Liu <hongtao.liu@intel.com>
1625 * config/i386/i386-protos.h (x86_evex_reg_mentioned_p): New
1627 * config/i386/i386.cc (x86_evex_reg_mentioned_p): New
1629 * config/i386/i386.md (sse4_1_round<mode>2): Set attr gpr32 0
1630 and constraint jm to all non-evex alternatives, adjust
1631 alternative outputs if evex reg is mentioned.
1632 * config/i386/sse.md (<sse4_1>_ptest<mode>): Set attr gpr32 0
1633 and constraint jm/ja to all non-evex alternatives.
1634 (ptesttf2): Likewise.
1635 (<sse4_1>_round<ssemodesuffix><avxsizesuffix): Likewise.
1636 (sse4_1_round<ssescalarmodesuffix>): Likewise.
1637 (sse4_2_pcmpestri): Likewise.
1638 (sse4_2_pcmpestrm): Likewise.
1639 (sse4_2_pcmpestr_cconly): Likewise.
1640 (sse4_2_pcmpistr): Likewise.
1641 (sse4_2_pcmpistri): Likewise.
1642 (sse4_2_pcmpistrm): Likewise.
1643 (sse4_2_pcmpistr_cconly): Likewise.
1645 (aeskeygenassist): Likewise.
1647 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1648 Hongyu Wang <hongyu.wang@intel.com>
1649 Hongtao Liu <hongtao.liu@intel.com>
1651 * config/i386/sse.md (avx2_ph<plusminus_mnemonic>wv16hi3): Set
1652 attr gpr32 0 and constraint jm/ja to all mem alternatives.
1653 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
1654 (ssse3_ph<plusminus_mnemonic>wv4hi3): Likewise.
1655 (avx2_ph<plusminus_mnemonic>dv8si3): Likewise.
1656 (ssse3_ph<plusminus_mnemonic>dv4si3): Likewise.
1657 (ssse3_ph<plusminus_mnemonic>dv2si3): Likewise.
1658 (<ssse3_avx2>_psign<mode>3): Likewise.
1659 (ssse3_psign<mode>3): Likewise.
1660 (<sse4_1>_blend<ssemodesuffix><avxsizesuffix): Likewise.
1661 (<sse4_1>_blendv<ssemodesuffix><avxsizesuffix): Likewise.
1662 (*<sse4_1>_blendv<ssemodesuffix><avxsizesuffix>_lt): Likewise.
1663 (*<sse4_1>_blendv<ssefltmodesuff)ix><avxsizesuffix>_not_ltint: Likewise.
1664 (<sse4_1>_dp<ssemodesuffix><avxsizesuffix>): Likewise.
1665 (<sse4_1_avx2>_mpsadbw): Likewise.
1666 (<sse4_1_avx2>_pblendvb): Likewise.
1667 (*<sse4_1_avx2>_pblendvb_lt): Likewise.
1668 (sse4_1_pblend<ssemodesuffix>): Likewise.
1669 (*avx2_pblend<ssemodesuffix>): Likewise.
1670 (avx2_permv2ti): Likewise.
1671 (*avx_vperm2f128<mode>_nozero): Likewise.
1672 (*avx2_eq<mode>3): Likewise.
1673 (*sse4_1_eqv2di3): Likewise.
1674 (sse4_2_gtv2di3): Likewise.
1675 (avx2_gt<mode>3): Likewise.
1677 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1678 Hongyu Wang <hongyu.wang@intel.com>
1679 Hongtao Liu <hongtao.liu@intel.com>
1681 * config/i386/i386.md (<xsave>): Set attr gpr32 0 and constraint
1683 (<xsave>_rex64): Likewise.
1684 (<xrstor>_rex64): Likewise.
1685 (<xrstor>64): Likewise.
1686 (fxsave64): Likewise.
1687 (fxstore64): Likewise.
1689 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
1690 Kong Lingling <lingling.kong@intel.com>
1691 Hongtao Liu <hongtao.liu@intel.com>
1693 * config/i386/i386.cc (ix86_get_ssemov): Check if egpr is used,
1694 adjust mnemonic for vmovduq/vmovdqa.
1695 * config/i386/sse.md (*<extract_type>_vinsert<shuffletype><extract_suf>_0):
1696 Check if egpr is used, adjust mnemonic for vmovdqu/vmovdqa.
1697 (avx_vec_concat<mode>): Likewise, and separate alternative 0 to
1700 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1701 Hongyu Wang <hongyu.wang@intel.com>
1702 Hongtao Liu <hongtao.liu@intel.com>
1704 * config/i386/i386.cc (map_egpr_constraints): New funciton to
1705 map common constraints to EGPR prohibited constraints.
1706 (ix86_md_asm_adjust): Calls map_egpr_constraints.
1707 * config/i386/i386.opt: Add option mapx-inline-asm-use-gpr32.
1709 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1710 Hongyu Wang <hongyu.wang@intel.com>
1711 Hongtao Liu <hongtao.liu@intel.com>
1713 * config/i386/i386-protos.h (ix86_insn_base_reg_class): New
1715 (ix86_regno_ok_for_insn_base_p): Likewise.
1716 (ix86_insn_index_reg_class): Likewise.
1717 * config/i386/i386.cc (ix86_memory_address_use_extended_reg_class_p):
1718 New helper function to scan the insn.
1719 (ix86_insn_base_reg_class): New function to choose BASE_REG_CLASS.
1720 (ix86_regno_ok_for_insn_base_p): Likewise for base regno.
1721 (ix86_insn_index_reg_class): Likewise for INDEX_REG_CLASS.
1722 * config/i386/i386.h (INSN_BASE_REG_CLASS): Define.
1723 (REGNO_OK_FOR_INSN_BASE_P): Likewise.
1724 (INSN_INDEX_REG_CLASS): Likewise.
1725 (enum reg_class): Add INDEX_GPR16.
1726 (GENERAL_GPR16_REGNO_P): Define.
1727 * config/i386/i386.md (gpr32): New attribute.
1729 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1730 Hongyu Wang <hongyu.wang@intel.com>
1731 Hongtao Liu <hongtao.liu@intel.com>
1733 * config/i386/constraints.md (jr): New register constraint
1734 that prohibits EGPR.
1735 (jR): Constraint that force usage of EGPR.
1736 (jm): New memory constraint that prohibits EGPR.
1737 (ja): Likewise for Bm constraint.
1738 (jb): Likewise for Tv constraint.
1739 (j<): New auto-dec memory constraint that prohibits EGPR.
1740 (j>): Likewise for ">" constraint.
1741 (jo): Likewise for "o" constraint.
1742 (jv): Likewise for "V" constraint.
1743 (jp): Likewise for "p" constraint.
1744 * config/i386/i386.h (enum reg_class): Add new reg class
1747 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1748 Hongyu Wang <hongyu.wang@intel.com>
1749 Hongtao Liu <hongtao.liu@intel.com>
1751 * config/i386/i386-protos.h (x86_extended_rex2reg_mentioned_p):
1752 New function prototype.
1753 * config/i386/i386.cc (regclass_map): Add mapping for 16 new
1755 (debugger64_register_map): Likewise.
1756 (ix86_conditional_register_usage): Clear REX2 register when APX
1758 (ix86_code_end): Add handling for REX2 reg.
1759 (print_reg): Likewise.
1760 (ix86_output_jmp_thunk_or_indirect): Likewise.
1761 (ix86_output_indirect_branch_via_reg): Likewise.
1762 (ix86_attr_length_vex_default): Likewise.
1763 (ix86_emit_save_regs): Adjust to allow saving r31.
1764 (ix86_register_priority): Set REX2 reg priority same as REX.
1765 (x86_extended_reg_mentioned_p): Add check for REX2 regs.
1766 (x86_extended_rex2reg_mentioned_p): New function.
1767 * config/i386/i386.h (CALL_USED_REGISTERS): Add new extended
1769 (REG_ALLOC_ORDER): Likewise.
1770 (FIRST_REX2_INT_REG): Define.
1771 (LAST_REX2_INT_REG): Ditto.
1772 (GENERAL_REGS): Add 16 new registers.
1773 (INT_SSE_REGS): Likewise.
1774 (FLOAT_INT_REGS): Likewise.
1775 (FLOAT_INT_SSE_REGS): Likewise.
1776 (INT_MASK_REGS): Likewise.
1777 (ALL_REGS):Likewise.
1778 (REX2_INT_REG_P): Define.
1779 (REX2_INT_REGNO_P): Ditto.
1780 (GENERAL_REGNO_P): Add REX2_INT_REGNO_P.
1781 (REGNO_OK_FOR_INDEX_P): Ditto.
1782 (REG_OK_FOR_INDEX_NONSTRICT_P): Add new extended registers.
1783 * config/i386/i386.md: Add 16 new integer general
1786 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1787 Hongyu Wang <hongyu.wang@intel.com>
1788 Hongtao Liu <hongtao.liu@intel.com>
1790 * common/config/i386/cpuinfo.h (XSTATE_APX_F): New macro.
1791 (XCR_APX_F_ENABLED_MASK): Likewise.
1792 (get_available_features): Detect APX_F under
1793 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_APX_F_SET): New.
1794 (OPTION_MASK_ISA2_APX_F_UNSET): Likewise.
1795 (ix86_handle_option): Handle -mapxf.
1796 * common/config/i386/i386-cpuinfo.h (FEATURE_APX_F): New.
1797 * common/config/i386/i386-isas.h: Add entry for APX_F.
1798 * config/i386/cpuid.h (bit_APX_F): New.
1799 * config/i386/i386.h (bit_APX_F): (TARGET_APX_EGPR,
1800 TARGET_APX_PUSH2POP2, TARGET_APX_NDD): New define.
1801 * config/i386/i386-opts.h (enum apx_features): New enum.
1802 * config/i386/i386-isa.def (APX_F): New DEF_PTA.
1803 * config/i386/i386-options.cc (ix86_function_specific_save):
1804 Save ix86_apx_features.
1805 (ix86_function_specific_restore): Restore it.
1806 (ix86_valid_target_attribute_inner_p): Add mapxf.
1807 (ix86_option_override_internal): Set ix86_apx_features for PTA
1808 and TARGET_APX_F. Also reports error when APX_F is set but not
1809 having TARGET_64BIT.
1810 * config/i386/i386.opt: (-mapxf): New ISA flag option.
1811 (-mapx=): New enumeration option.
1812 (apx_features): New enum type.
1813 (apx_none): New enum value.
1814 (apx_egpr): Likewise.
1815 (apx_push2pop2): Likewise.
1816 (apx_ndd): Likewise.
1817 (apx_all): Likewise.
1818 * doc/invoke.texi: Document mapxf.
1820 2023-10-07 Hongyu Wang <hongyu.wang@intel.com>
1821 Kong Lingling <lingling.kong@intel.com>
1822 Hongtao Liu <hongtao.liu@intel.com>
1824 * addresses.h (index_reg_class): New wrapper function like
1826 * doc/tm.texi: Document INSN_INDEX_REG_CLASS.
1827 * doc/tm.texi.in: Ditto.
1828 * lra-constraints.cc (index_part_to_reg): Pass index_class.
1829 (process_address_1): Calls index_reg_class with curr_insn and
1830 replace INDEX_REG_CLASS with its return value index_cl.
1831 * reload.cc (find_reloads_address): Likewise.
1832 (find_reloads_address_1): Likewise.
1834 2023-10-07 Kong Lingling <lingling.kong@intel.com>
1835 Hongyu Wang <hongyu.wang@intel.com>
1836 Hongtao Liu <hongtao.liu@intel.com>
1838 * addresses.h (base_reg_class): Add insn argument and new macro
1839 INSN_BASE_REG_CLASS.
1840 (regno_ok_for_base_p_1): Add insn argument and new macro
1841 REGNO_OK_FOR_INSN_BASE_P.
1842 (regno_ok_for_base_p): Add insn argument and parse to ok_for_base_p_1.
1843 * doc/tm.texi: Document INSN_BASE_REG_CLASS and
1844 REGNO_OK_FOR_INSN_BASE_P.
1845 * doc/tm.texi.in: Ditto.
1846 * lra-constraints.cc (process_address_1): Pass insn to
1848 (curr_insn_transform): Ditto.
1849 * reload.cc (find_reloads): Ditto.
1850 (find_reloads_address): Ditto.
1851 (find_reloads_address_1): Ditto.
1852 (find_reloads_subreg_address): Ditto.
1853 * reload1.cc (maybe_fix_stack_asms): Ditto.
1855 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
1858 * config/rs6000/rs6000.md (movsf_from_si): Update to generate mtvsrws
1861 2023-10-07 Jiufu Guo <guojiufu@linux.ibm.com>
1864 * config/rs6000/predicates.md (lowpart_subreg_operator): New
1866 * config/rs6000/rs6000.md (any_rshift): New code_iterator.
1867 (movsf_from_si2): Rename to ...
1868 (movsf_from_si2_<code>): ... this.
1870 2023-10-07 Pan Li <pan2.li@intel.com>
1873 * config/riscv/riscv.cc (riscv_legitimize_address): Ensure
1874 object is a REG before extracting its' REGNO.
1876 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
1878 * config/i386/i386-expand.cc (ix86_split_ashl): Split shifts by
1879 one into add3_cc_overflow_1 followed by add3_carry.
1880 * config/i386/i386.md (@add<mode>3_cc_overflow_1): Renamed from
1881 "*add<mode>3_cc_overflow_1" to provide generator function.
1883 2023-10-06 Roger Sayle <roger@nextmovesoftware.com>
1884 Uros Bizjak <ubizjak@gmail.com>
1886 * config/i386/i386.cc (ix86_avoid_lea_for_addr): Split LEAs used
1887 to perform left shifts into shorter instructions with -Oz.
1889 2023-10-06 Vineet Gupta <vineetg@rivosinc.com>
1891 * config/riscv/riscv.md (mvconst_internal): Add !ira_in_progress.
1893 2023-10-06 Sandra Loosemore <sandra@codesourcery.com>
1895 * doc/extend.texi (Function Attributes): Mention standard attribute
1897 (Variable Attributes): Likewise.
1898 (Type Attributes): Likewise.
1899 (Attribute Syntax): Likewise.
1901 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
1903 * config/gcn/gcn-valu.md (*mov<mode>): Convert to compact syntax.
1904 (mov<mode>_exec): Likewise.
1905 (mov<mode>_sgprbase): Likewise.
1906 * config/gcn/gcn.md (*mov<mode>_insn): Likewise.
1907 (*movti_insn): Likewise.
1909 2023-10-06 Andrew Stubbs <ams@codesourcery.com>
1911 * config/gcn/gcn.cc (print_operand): Adjust xcode type to fix warning.
1913 2023-10-06 Andrew Pinski <pinskia@gmail.com>
1915 PR middle-end/111699
1916 * match.pd ((c ? a : b) op d, (c ? a : b) op (c ? d : e),
1917 (v ? w : 0) ? a : b, c1 ? c2 ? a : b : b): Enable only for GIMPLE.
1919 2023-10-06 Jakub Jelinek <jakub@redhat.com>
1921 * ipa-prop.h (ipa_bits): Remove.
1922 (struct ipa_jump_func): Remove bits member.
1923 (struct ipcp_transformation): Remove bits member, adjust
1925 (ipa_get_ipa_bits_for_value): Remove.
1926 * ipa-prop.cc (struct ipa_bit_ggc_hash_traits): Remove.
1927 (ipa_bits_hash_table): Remove.
1928 (ipa_print_node_jump_functions_for_edge): Don't print bits.
1929 (ipa_get_ipa_bits_for_value): Remove.
1930 (ipa_set_jfunc_bits): Remove.
1931 (ipa_compute_jump_functions_for_edge): For pointers query
1932 pointer alignment before ipa_set_jfunc_vr and update_bitmask
1933 in there. For integral types, just rely on bitmask already
1934 being handled in value ranges.
1935 (ipa_check_create_edge_args): Don't create ipa_bits_hash_table.
1936 (ipcp_transformation_initialize): Neither here.
1937 (ipcp_transformation_t::duplicate): Don't copy bits vector.
1938 (ipa_write_jump_function): Don't stream bits here.
1939 (ipa_read_jump_function): Neither here.
1940 (useful_ipcp_transformation_info_p): Don't test bits vec.
1941 (write_ipcp_transformation_info): Don't stream bits here.
1942 (read_ipcp_transformation_info): Neither here.
1943 (ipcp_get_parm_bits): Get mask and value from m_vr rather
1945 (ipcp_update_bits): Remove.
1946 (ipcp_update_vr): For pointers, set_ptr_info_alignment from
1947 bitmask stored in value range.
1948 (ipcp_transform_function): Don't test bits vector, don't call
1950 * ipa-cp.cc (propagate_bits_across_jump_function): Don't use
1951 jfunc->bits, instead get mask and value from jfunc->m_vr.
1952 (ipcp_store_bits_results): Remove.
1953 (ipcp_store_vr_results): Incorporate parts of
1954 ipcp_store_bits_results here, merge the bitmasks with value
1955 range if both are supplied.
1956 (ipcp_driver): Don't call ipcp_store_bits_results.
1957 * ipa-sra.cc (zap_useless_ipcp_results): Remove *ts->bits
1960 2023-10-06 Pan Li <pan2.li@intel.com>
1962 * config/riscv/autovec.md: Update comments.
1964 2023-10-05 John David Anglin <danglin@gcc.gnu.org>
1966 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Delete.
1968 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1970 * timevar.def (TV_TREE_FAST_VRP): New.
1971 * tree-pass.h (make_pass_fast_vrp): New prototype.
1972 * tree-vrp.cc (class fvrp_folder): New.
1973 (fvrp_folder::fvrp_folder): New.
1974 (fvrp_folder::~fvrp_folder): New.
1975 (fvrp_folder::value_of_expr): New.
1976 (fvrp_folder::value_on_edge): New.
1977 (fvrp_folder::value_of_stmt): New.
1978 (fvrp_folder::pre_fold_bb): New.
1979 (fvrp_folder::post_fold_bb): New.
1980 (fvrp_folder::pre_fold_stmt): New.
1981 (fvrp_folder::fold_stmt): New.
1982 (execute_fast_vrp): New.
1983 (pass_data_fast_vrp): New.
1984 (pass_vrp:execute): Check for fast VRP pass.
1985 (make_pass_fast_vrp): New.
1987 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
1989 * gimple-range.cc (dom_ranger::dom_ranger): New.
1990 (dom_ranger::~dom_ranger): New.
1991 (dom_ranger::range_of_expr): New.
1992 (dom_ranger::edge_range): New.
1993 (dom_ranger::range_on_edge): New.
1994 (dom_ranger::range_in_bb): New.
1995 (dom_ranger::range_of_stmt): New.
1996 (dom_ranger::maybe_push_edge): New.
1997 (dom_ranger::pre_bb): New.
1998 (dom_ranger::post_bb): New.
1999 * gimple-range.h (class dom_ranger): New.
2001 2023-10-05 Andrew MacLeod <amacleod@redhat.com>
2003 * gimple-range-gori.cc (gori_stmt_info::gori_stmt_info): New.
2004 (gori_calc_operands): New.
2005 (gori_on_edge): New.
2006 (gori_name_helper): New.
2007 (gori_name_on_edge): New.
2008 * gimple-range-gori.h (gori_on_edge): New prototype.
2009 (gori_name_on_edge): New prototype.
2011 2023-10-05 Sergei Trofimovich <siarheit@google.com>
2014 PR gcov-profile/111559
2015 * ipa-utils.cc (ipa_merge_profiles): Avoid producing
2016 uninitialized probabilities when merging counters with zero
2019 2023-10-05 Uros Bizjak <ubizjak@gmail.com>
2022 * config/i386/i386-expand.cc (alg_usable_p): Reject libcall
2023 strategy for non-default address spaces.
2024 (decide_alg): Use loop strategy as a fallback strategy for
2025 non-default address spaces.
2027 2023-10-05 Jakub Jelinek <jakub@redhat.com>
2029 * sreal.cc (verify_aritmetics): Rename to ...
2030 (verify_arithmetics): ... this.
2031 (sreal_verify_arithmetics): Adjust caller.
2033 2023-10-05 Martin Jambor <mjambor@suse.cz>
2036 2023-10-03 Martin Jambor <mjambor@suse.cz>
2039 * cgraph.h (cgraph_edge): Add a parameter to
2040 redirect_call_stmt_to_callee.
2041 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
2042 parameter to modify_call.
2043 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
2044 parameter killed_ssas, pass it to padjs->modify_call.
2045 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
2046 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
2047 Instead of substituting uses, invoke purge_transitive_uses. If
2048 hash of killed SSAs has not been provided, create a temporary one
2049 and release SSAs that have been added to it.
2050 * tree-inline.cc (redirect_all_calls): Create
2051 id->killed_new_ssa_names earlier, pass it to edge redirection,
2053 (copy_body): Release SSAs in id->killed_new_ssa_names.
2055 2023-10-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2057 * config/riscv/autovec.md (@vec_series<mode>): Remove @.
2058 (vec_series<mode>): Ditto.
2059 * config/riscv/riscv-v.cc (expand_const_vector): Ditto.
2060 (shuffle_decompress_patterns): Ditto.
2062 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
2064 * config/arc/arc-passes.def: Remove arc_ifcvt pass.
2065 * config/arc/arc-protos.h (arc_ccfsm_branch_deleted_p): Remove.
2066 (arc_ccfsm_record_branch_deleted): Likewise.
2067 (arc_ccfsm_cond_exec_p): Likewise.
2068 (arc_ccfsm): Likewise.
2069 (arc_ccfsm_record_condition): Likewise.
2070 (make_pass_arc_ifcvt): Likewise.
2071 * config/arc/arc.cc (arc_ccfsm): Remove.
2072 (arc_ccfsm_current): Likewise.
2073 (ARC_CCFSM_BRANCH_DELETED_P): Likewise.
2074 (ARC_CCFSM_RECORD_BRANCH_DELETED): Likewise.
2075 (ARC_CCFSM_COND_EXEC_P): Likewise.
2076 (CCFSM_ISCOMPACT): Likewise.
2077 (CCFSM_DBR_ISCOMPACT): Likewise.
2078 (machine_function): Remove ccfsm related fields.
2079 (arc_ifcvt): Remove pass.
2080 (arc_print_operand): Remove `#` punct operand and other ccfsm
2082 (arc_ccfsm_advance): Remove.
2083 (arc_ccfsm_at_label): Likewise.
2084 (arc_ccfsm_record_condition): Likewise.
2085 (arc_ccfsm_post_advance): Likewise.
2086 (arc_ccfsm_branch_deleted_p): Likewise.
2087 (arc_ccfsm_record_branch_deleted): Likewise.
2088 (arc_ccfsm_cond_exec_p): Likewise.
2089 (arc_get_ccfsm_cond): Likewise.
2090 (arc_final_prescan_insn): Remove ccfsm references.
2091 (arc_internal_label): Likewise.
2092 (arc_reorg): Likewise.
2093 (arc_output_libcall): Likewise.
2094 * config/arc/arc.md: Remove ccfsm references and update related
2095 instruction patterns.
2097 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
2099 * config/arc/arc.cc (arc_init): Remove '^' punct char.
2100 (arc_print_operand): Remove related code.
2101 * config/arc/arc.md: Update patterns which uses '%&'.
2103 2023-10-05 Claudiu Zissulescu <claziss@gmail.com>
2105 * config/arc/arc-protos.h (arc_clear_unalign): Remove.
2106 (arc_toggle_unalign): Likewise.
2107 * config/arc/arc.cc (machine_function) Remove unalign.
2108 (arc_init): Remove `&` punct character.
2109 (arc_print_operand): Remove `&` related functions.
2110 (arc_verify_short): Update function's number of parameters.
2111 (output_short_suffix): Update function.
2112 (arc_short_long): Likewise.
2113 (arc_clear_unalign): Remove.
2114 (arc_toggle_unalign): Likewise.
2115 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Remove.
2116 (ASM_OUTPUT_ALIGN): Update.
2117 * config/arc/arc.md: Remove all `%&` references.
2118 * config/arc/arc.opt (mannotate-align): Ignore option.
2119 * doc/invoke.texi (mannotate-align): Update description.
2121 2023-10-05 Richard Biener <rguenther@suse.de>
2123 * tree-vect-slp.cc (vect_build_slp_tree_1): Do not
2124 ask for internal_fn_p (CFN_LAST).
2126 2023-10-05 Richard Biener <rguenther@suse.de>
2128 * tree-ssa-sccvn.cc (rpo_elim::eliminate_avail): Not
2129 visited value numbers are available itself.
2131 2023-10-05 Richard Biener <rguenther@suse.de>
2134 * doc/extend.texi (attribute flatten): Clarify.
2136 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2138 * config/arc/arc-protos.h (emit_shift): Delete prototype.
2139 (arc_pre_reload_split): New function prototype.
2140 * config/arc/arc.cc (emit_shift): Delete function.
2141 (arc_pre_reload_split): New predicate function, copied from i386,
2142 to schedule define_insn_and_split splitters to the split1 pass.
2143 * config/arc/arc.md (ashlsi3): Expand RTL template unconditionally.
2144 (ashrsi3): Likewise.
2145 (lshrsi3): Likewise.
2146 (shift_si3): Move after other shift patterns, and disable when
2147 operands[2] is one (which is handled by its own define_insn).
2148 Use shiftr4_operator, instead of shift4_operator, as this is no
2149 longer used for left shifts.
2150 (shift_si3_loop): Likewise. Additionally remove match_scratch.
2151 (*ashlsi3_nobs): New pre-reload define_insn_and_split.
2152 (*ashrsi3_nobs): Likewise.
2153 (*lshrsi3_nobs): Likewise.
2154 (rotrsi3_cnt1): Rename define_insn from *rotrsi3_cnt1.
2155 (add_shift): Rename define_insn from *add_shift.
2156 * config/arc/predicates.md (shiftl4_operator): Delete.
2157 (shift4_operator): Delete.
2159 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2161 * config/arc/arc.md (ashlsi3_cnt1): Rename define_insn *ashlsi2_cnt1.
2162 Change type attribute to "unary", as this doesn't have operands[2].
2163 Change length attribute to "*,4" to allow compact representation.
2164 (lshrsi3_cnt1): Rename define_insn from *lshrsi3_cnt1. Change
2165 insn type attribute to "unary", as this doesn't have operands[2].
2166 (ashrsi3_cnt1): Rename define_insn from *ashrsi3_cnt1. Change
2167 insn type attribute to "unary", as this doesn't have operands[2].
2169 2023-10-04 Roger Sayle <roger@nextmovesoftware.com>
2171 PR rtl-optimization/110701
2172 * combine.cc (record_dead_and_set_regs_1): Split comment into
2173 pieces placed before the relevant clauses. When the SET_DEST
2174 is a partial_subreg_p, mark the bits outside of the updated
2175 portion of the destination as undefined.
2177 2023-10-04 Kito Cheng <kito.cheng@sifive.com>
2180 * opt-read.awk: Drop multidimensional arrays.
2181 * opth-gen.awk: Ditto.
2183 2023-10-04 Xi Ruoyao <xry111@xry111.site>
2185 * config/loongarch/loongarch.md (UNSPEC_FCOPYSIGN): Delete.
2186 (copysign<mode>3): Use copysign RTL instead of UNSPEC.
2188 2023-10-04 Jakub Jelinek <jakub@redhat.com>
2190 PR middle-end/111369
2191 * match.pd (x == cstN ? cst4 : cst3): Use
2192 build_nonstandard_integer_type only if type1 is BOOLEAN_TYPE.
2193 Fix comment typo. Formatting fix.
2194 (a?~t:t -> (-(a))^t): Always convert to type rather
2195 than using build_nonstandard_integer_type. Perform negation
2196 only if type has precision > 1 and is not signed BOOLEAN_TYPE.
2198 2023-10-04 Jakub Jelinek <jakub@redhat.com>
2200 PR tree-optimization/111668
2201 * match.pd (a ? CST1 : CST2): Handle the a ? -1 : 0 and
2202 a ? 0 : -1 cases before the powerof2cst cases and differentiate
2203 between 1-bit precision types, larger precision boolean types
2204 and other integral types. Fix comment pastos and formatting.
2206 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2208 * tree-ssanames.cc (set_range_info): Use get_ptr_info for
2209 pointers rather than range_info_get_range.
2211 2023-10-03 Martin Jambor <mjambor@suse.cz>
2213 * ipa-modref.h (modref_summary::dump): Make const.
2214 * ipa-modref.cc (modref_summary::dump): Likewise.
2215 (dump_lto_records): Dump to out instead of dump_file.
2217 2023-10-03 Martin Jambor <mjambor@suse.cz>
2220 * ipa-param-manipulation.cc
2221 (ipa_param_body_adjustments::mark_dead_statements): Verify that any
2222 return uses of PARAM will be removed.
2223 (ipa_param_body_adjustments::mark_clobbers_dead): Likewise.
2224 * ipa-sra.cc (isra_param_desc): New fields
2225 remove_only_when_retval_removed and split_only_when_retval_removed.
2226 (struct gensum_param_desc): Likewise. Fix comment long line.
2227 (ipa_sra_function_summaries::duplicate): Copy the new flags.
2228 (dump_gensum_param_descriptor): Dump the new flags.
2229 (dump_isra_param_descriptor): Likewise.
2230 (isra_track_scalar_value_uses): New parameter desc. Set its flag
2231 remove_only_when_retval_removed when encountering a simple return.
2232 (isra_track_scalar_param_local_uses): Replace parameter call_uses_p
2233 with desc. Pass it to isra_track_scalar_value_uses and set its
2235 (ptr_parm_has_nonarg_uses): Accept parameter descriptor as a
2236 parameter. If there is a direct return use, mark any..
2237 (create_parameter_descriptors): Pass the whole parameter descriptor to
2238 isra_track_scalar_param_local_uses and ptr_parm_has_nonarg_uses.
2239 (process_scan_results): Copy the new flags.
2240 (isra_write_node_summary): Stream the new flags.
2241 (isra_read_node_info): Likewise.
2242 (adjust_parameter_descriptions): Check that transformations
2243 requring return removal only happen when return value is removed.
2244 Restructure main loop. Adjust dump message.
2246 2023-10-03 Martin Jambor <mjambor@suse.cz>
2249 * cgraph.h (cgraph_edge): Add a parameter to
2250 redirect_call_stmt_to_callee.
2251 * ipa-param-manipulation.h (ipa_param_adjustments): Add a
2252 parameter to modify_call.
2253 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee): New
2254 parameter killed_ssas, pass it to padjs->modify_call.
2255 * ipa-param-manipulation.cc (purge_transitive_uses): New function.
2256 (ipa_param_adjustments::modify_call): New parameter killed_ssas.
2257 Instead of substituting uses, invoke purge_transitive_uses. If
2258 hash of killed SSAs has not been provided, create a temporary one
2259 and release SSAs that have been added to it.
2260 * tree-inline.cc (redirect_all_calls): Create
2261 id->killed_new_ssa_names earlier, pass it to edge redirection,
2263 (copy_body): Release SSAs in id->killed_new_ssa_names.
2265 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2267 * passes.def (pass_vrp): Pass "final pass" flag as parameter.
2268 * tree-vrp.cc (vrp_pass_num): Remove.
2269 (pass_vrp::my_pass): Remove.
2270 (pass_vrp::pass_vrp): Add warn_p as a parameter.
2271 (pass_vrp::final_p): New.
2272 (pass_vrp::set_pass_param): Set final_p param.
2273 (pass_vrp::execute): Call execute_range_vrp with no conditions.
2274 (make_pass_vrp): Pass additional parameter.
2275 (make_pass_early_vrp): Ditto.
2277 2023-10-03 Andrew MacLeod <amacleod@redhat.com>
2279 * tree-ssanames.cc (set_range_info): Return true only if the
2280 current value changes.
2282 2023-10-03 David Malcolm <dmalcolm@redhat.com>
2284 * diagnostic.cc (diagnostic_set_info_translated): Update for "m_"
2285 prefixes to text_info fields.
2286 (diagnostic_report_diagnostic): Likewise.
2287 (verbatim): Use text_info ctor.
2288 (simple_diagnostic_path::add_event): Likewise.
2289 (simple_diagnostic_path::add_thread_event): Likewise.
2290 * dumpfile.cc (dump_pretty_printer::decode_format): Update for
2291 "m_" prefixes to text_info fields.
2292 (dump_context::dump_printf_va): Use text_info ctor.
2293 * graphviz.cc (graphviz_out::graphviz_out): Use text_info ctor.
2294 (graphviz_out::print): Likewise.
2295 * opt-problem.cc (opt_problem::opt_problem): Likewise.
2296 * pretty-print.cc (pp_format): Update for "m_" prefixes to
2298 (pp_printf): Use text_info ctor.
2299 (pp_verbatim): Likewise.
2300 (assert_pp_format_va): Likewise.
2301 * pretty-print.h (struct text_info): Add ctors. Add "m_" prefix
2303 * text-art/styled-string.cc (styled_string::from_fmt_va): Use
2305 * tree-diagnostic.cc (default_tree_printer): Update for "m_"
2306 prefixes to text_info fields.
2307 * tree-pretty-print.h (pp_ti_abstract_origin): Likewise.
2309 2023-10-03 Roger Sayle <roger@nextmovesoftware.com>
2311 * config/arc/arc.md (CC_ltu): New mode iterator for CC and CC_C.
2312 (scc_ltu_<mode>): New define_insn to handle LTU form of scc_insn.
2313 (*scc_insn): Don't split to a conditional move sequence for LTU.
2315 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
2317 * config/aarch64/aarch64.md (@ccmp<CC_ONLY:mode><GPI:mode>)
2318 (@ccmp<CC_ONLY:mode><GPI:mode>_rev, *call_insn, *call_value_insn)
2319 (*mov<mode>_aarch64, load_pair_sw_<SX:mode><SX2:mode>)
2320 (load_pair_dw_<DX:mode><DX2:mode>)
2321 (store_pair_sw_<SX:mode><SX2:mode>)
2322 (store_pair_dw_<DX:mode><DX2:mode>, *extendsidi2_aarch64)
2323 (*zero_extendsidi2_aarch64, *load_pair_zero_extendsidi2_aarch64)
2324 (*extend<SHORT:mode><GPI:mode>2_aarch64)
2325 (*zero_extend<SHORT:mode><GPI:mode>2_aarch64)
2326 (*extendqihi2_aarch64, *zero_extendqihi2_aarch64)
2327 (*add<mode>3_aarch64, *addsi3_aarch64_uxtw, *add<mode>3_poly_1)
2328 (add<mode>3_compare0, *addsi3_compare0_uxtw)
2329 (*add<mode>3_compareC_cconly, add<mode>3_compareC)
2330 (*add<mode>3_compareV_cconly_imm, add<mode>3_compareV_imm)
2331 (*add<mode>3nr_compare0, subdi3, subv<GPI:mode>_imm)
2332 (*cmpv<GPI:mode>_insn, sub<mode>3_compare1_imm, neg<mode>2)
2333 (cmp<mode>, fcmp<mode>, fcmpe<mode>, *cmov<mode>_insn)
2334 (*cmovsi_insn_uxtw, <optab><mode>3, *<optab>si3_uxtw)
2335 (*and<mode>3_compare0, *andsi3_compare0_uxtw, one_cmpl<mode>2)
2336 (*<NLOGICAL:optab>_one_cmpl<mode>3, *and<mode>3nr_compare0)
2337 (*aarch64_ashl_sisd_or_int_<mode>3)
2338 (*aarch64_lshr_sisd_or_int_<mode>3)
2339 (*aarch64_ashr_sisd_or_int_<mode>3, *ror<mode>3_insn)
2340 (*<optab>si3_insn_uxtw, <optab>_trunc<fcvt_target><GPI:mode>2)
2341 (<optab><fcvt_target><GPF:mode>2)
2342 (<FCVT_F2FIXED:fcvt_fixed_insn><GPF:mode>3)
2343 (<FCVT_FIXED2F:fcvt_fixed_insn><GPI:mode>3)
2344 (*aarch64_<optab><mode>3_cssc, copysign<GPF:mode>3_insn): Update
2346 * config/aarch64/aarch64-sve2.md (@aarch64_scatter_stnt<mode>)
2347 (@aarch64_scatter_stnt_<SVE_FULL_SDI:mode><SVE_PARTIAL_I:mode>)
2348 (*aarch64_mul_unpredicated_<mode>)
2349 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>_2)
2350 (*cond_<sve_int_op><mode>_3, *cond_<sve_int_op><mode>_any)
2351 (*cond_<sve_int_op><mode>_z, @aarch64_pred_<sve_int_op><mode>)
2352 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_3)
2353 (*cond_<sve_int_op><mode>_any, @aarch64_sve_<sve_int_op><mode>)
2354 (@aarch64_sve_<sve_int_op>_lane_<mode>)
2355 (@aarch64_sve_add_mul_lane_<mode>)
2356 (@aarch64_sve_sub_mul_lane_<mode>, @aarch64_sve2_xar<mode>)
2357 (*aarch64_sve2_bcax<mode>, @aarch64_sve2_eor3<mode>)
2358 (*aarch64_sve2_nor<mode>, *aarch64_sve2_nand<mode>)
2359 (*aarch64_sve2_bsl<mode>, *aarch64_sve2_nbsl<mode>)
2360 (*aarch64_sve2_bsl1n<mode>, *aarch64_sve2_bsl2n<mode>)
2361 (*aarch64_sve2_sra<mode>, @aarch64_sve_add_<sve_int_op><mode>)
2362 (*aarch64_sve2_<su>aba<mode>, @aarch64_sve_add_<sve_int_op><mode>)
2363 (@aarch64_sve_add_<sve_int_op>_lane_<mode>)
2364 (@aarch64_sve_qadd_<sve_int_op><mode>)
2365 (@aarch64_sve_qadd_<sve_int_op>_lane_<mode>)
2366 (@aarch64_sve_sub_<sve_int_op><mode>)
2367 (@aarch64_sve_sub_<sve_int_op>_lane_<mode>)
2368 (@aarch64_sve_qsub_<sve_int_op><mode>)
2369 (@aarch64_sve_qsub_<sve_int_op>_lane_<mode>)
2370 (@aarch64_sve_<sve_fp_op><mode>, @aarch64_<sve_fp_op>_lane_<mode>)
2371 (@aarch64_pred_<sve_int_op><mode>)
2372 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_int_op><mode>_2)
2373 (*cond_<sve_int_op><mode>_z, @aarch64_sve_<optab><mode>)
2374 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_<optab><mode>)
2375 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<sve_fp_op><mode>)
2376 (*cond_<sve_fp_op><mode>_any_relaxed)
2377 (*cond_<sve_fp_op><mode>_any_strict)
2378 (@aarch64_pred_<sve_int_op><mode>, *cond_<sve_int_op><mode>)
2379 (@aarch64_pred_<sve_fp_op><mode>, *cond_<sve_fp_op><mode>)
2380 (*cond_<sve_fp_op><mode>_strict): Update to new syntax.
2381 * config/aarch64/aarch64-sve.md (*aarch64_sve_mov<mode>_ldr_str)
2382 (*aarch64_sve_mov<mode>_no_ldr_str, @aarch64_pred_mov<mode>)
2383 (*aarch64_sve_mov<mode>, aarch64_wrffr)
2384 (mask_scatter_store<mode><v_int_container>)
2385 (*mask_scatter_store<mode><v_int_container>_<su>xtw_unpacked)
2386 (*mask_scatter_store<mode><v_int_container>_sxtw)
2387 (*mask_scatter_store<mode><v_int_container>_uxtw)
2388 (@aarch64_scatter_store_trunc<VNx4_NARROW:mode><VNx4_WIDE:mode>)
2389 (@aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>)
2390 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_sxtw)
2391 (*aarch64_scatter_store_trunc<VNx2_NARROW:mode><VNx2_WIDE:mode>_uxtw)
2392 (*vec_duplicate<mode>_reg, vec_shl_insert_<mode>)
2393 (vec_series<mode>, @extract_<last_op>_<mode>)
2394 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
2395 (*cond_<optab><mode>_any, @aarch64_pred_<optab><mode>)
2396 (@aarch64_sve_revbhw_<SVE_ALL:mode><PRED_HSD:mode>)
2397 (@cond_<optab><mode>)
2398 (*<optab><SVE_PARTIAL_I:mode><SVE_HSDI:mode>2)
2399 (@aarch64_pred_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
2400 (@aarch64_cond_sxt<SVE_FULL_HSDI:mode><SVE_PARTIAL_I:mode>)
2401 (*cond_uxt<mode>_2, *cond_uxt<mode>_any, *cnot<mode>)
2402 (*cond_cnot<mode>_2, *cond_cnot<mode>_any)
2403 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
2404 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
2405 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
2406 (*cond_<optab><mode>_2, *cond_<optab><mode>_3)
2407 (*cond_<optab><mode>_any, add<mode>3, sub<mode>3)
2408 (@aarch64_pred_<su>abd<mode>, *aarch64_cond_<su>abd<mode>_2)
2409 (*aarch64_cond_<su>abd<mode>_3, *aarch64_cond_<su>abd<mode>_any)
2410 (@aarch64_sve_<optab><mode>, @aarch64_pred_<optab><mode>)
2411 (*cond_<optab><mode>_2, *cond_<optab><mode>_z)
2412 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2)
2413 (*cond_<optab><mode>_3, *cond_<optab><mode>_any, <optab><mode>3)
2414 (*cond_bic<mode>_2, *cond_bic<mode>_any)
2415 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_const)
2416 (*cond_<optab><mode>_any_const, *cond_<sve_int_op><mode>_m)
2417 (*cond_<sve_int_op><mode>_z, *sdiv_pow2<mode>3)
2418 (*cond_<sve_int_op><mode>_2, *cond_<sve_int_op><mode>_any)
2419 (@aarch64_pred_<optab><mode>, *cond_<optab><mode>_2_relaxed)
2420 (*cond_<optab><mode>_2_strict, *cond_<optab><mode>_any_relaxed)
2421 (*cond_<optab><mode>_any_strict, @aarch64_pred_<optab><mode>)
2422 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2423 (*cond_<optab><mode>_2_const_relaxed)
2424 (*cond_<optab><mode>_2_const_strict)
2425 (*cond_<optab><mode>_3_relaxed, *cond_<optab><mode>_3_strict)
2426 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2427 (*cond_<optab><mode>_any_const_relaxed)
2428 (*cond_<optab><mode>_any_const_strict)
2429 (@aarch64_pred_<optab><mode>, *cond_add<mode>_2_const_relaxed)
2430 (*cond_add<mode>_2_const_strict)
2431 (*cond_add<mode>_any_const_relaxed)
2432 (*cond_add<mode>_any_const_strict, @aarch64_pred_<optab><mode>)
2433 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2434 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2435 (@aarch64_pred_<optab><mode>, *cond_sub<mode>_3_const_relaxed)
2436 (*cond_sub<mode>_3_const_strict, *cond_sub<mode>_const_relaxed)
2437 (*cond_sub<mode>_const_strict, *aarch64_pred_abd<mode>_relaxed)
2438 (*aarch64_pred_abd<mode>_strict)
2439 (*aarch64_cond_abd<mode>_2_relaxed)
2440 (*aarch64_cond_abd<mode>_2_strict)
2441 (*aarch64_cond_abd<mode>_3_relaxed)
2442 (*aarch64_cond_abd<mode>_3_strict)
2443 (*aarch64_cond_abd<mode>_any_relaxed)
2444 (*aarch64_cond_abd<mode>_any_strict, @aarch64_pred_<optab><mode>)
2445 (@aarch64_pred_fma<mode>, *cond_fma<mode>_2, *cond_fma<mode>_4)
2446 (*cond_fma<mode>_any, @aarch64_pred_fnma<mode>)
2447 (*cond_fnma<mode>_2, *cond_fnma<mode>_4, *cond_fnma<mode>_any)
2448 (<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
2449 (@<sur>dot_prod<vsi2qi>, @aarch64_<sur>dot_prod_lane<vsi2qi>)
2450 (@aarch64_sve_add_<optab><vsi2qi>, @aarch64_pred_<optab><mode>)
2451 (*cond_<optab><mode>_2_relaxed, *cond_<optab><mode>_2_strict)
2452 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
2453 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2454 (@aarch64_<optab>_lane_<mode>, @aarch64_pred_<optab><mode>)
2455 (*cond_<optab><mode>_4_relaxed, *cond_<optab><mode>_4_strict)
2456 (*cond_<optab><mode>_any_relaxed, *cond_<optab><mode>_any_strict)
2457 (@aarch64_<optab>_lane_<mode>, @aarch64_sve_tmad<mode>)
2458 (@aarch64_sve_<sve_fp_op>vnx4sf)
2459 (@aarch64_sve_<sve_fp_op>_lanevnx4sf)
2460 (@aarch64_sve_<sve_fp_op><mode>, *vcond_mask_<mode><vpred>)
2461 (@aarch64_sel_dup<mode>, @aarch64_pred_cmp<cmp_op><mode>)
2462 (*cmp<cmp_op><mode>_cc, *cmp<cmp_op><mode>_ptest)
2463 (@aarch64_pred_fcm<cmp_op><mode>, @fold_extract_<last_op>_<mode>)
2464 (@aarch64_fold_extract_vector_<last_op>_<mode>)
2465 (@aarch64_sve_splice<mode>)
2466 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>)
2467 (@aarch64_sve_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
2468 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_relaxed)
2469 (*cond_<optab>_nontrunc<SVE_FULL_F:mode><SVE_FULL_HSDI:mode>_strict)
2470 (*cond_<optab>_trunc<VNx2DF_ONLY:mode><VNx4SI_ONLY:mode>)
2471 (@aarch64_sve_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>)
2472 (@aarch64_sve_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
2473 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_relaxed)
2474 (*cond_<optab>_nonextend<SVE_FULL_HSDI:mode><SVE_FULL_F:mode>_strict)
2475 (*cond_<optab>_extend<VNx4SI_ONLY:mode><VNx2DF_ONLY:mode>)
2476 (@aarch64_sve_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
2477 (*cond_<optab>_trunc<SVE_FULL_SDF:mode><SVE_FULL_HSF:mode>)
2478 (@aarch64_sve_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
2479 (*cond_<optab>_trunc<VNx4SF_ONLY:mode><VNx8BF_ONLY:mode>)
2480 (@aarch64_sve_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
2481 (*cond_<optab>_nontrunc<SVE_FULL_HSF:mode><SVE_FULL_SDF:mode>)
2482 (@aarch64_brk<brk_op>, *aarch64_sve_<inc_dec><mode>_cntp): Update
2484 * config/aarch64/aarch64-simd.md (aarch64_simd_dup<mode>)
2485 (load_pair<DREG:mode><DREG2:mode>)
2486 (vec_store_pair<DREG:mode><DREG2:mode>, aarch64_simd_stp<mode>)
2487 (aarch64_simd_mov_from_<mode>low)
2488 (aarch64_simd_mov_from_<mode>high, and<mode>3<vczle><vczbe>)
2489 (ior<mode>3<vczle><vczbe>, aarch64_simd_ashr<mode><vczle><vczbe>)
2490 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>)
2491 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>)
2492 (aarch64_simd_bsldi_internal, aarch64_simd_bsldi_alt)
2493 (store_pair_lanes<mode>, *aarch64_combine_internal<mode>)
2494 (*aarch64_combine_internal_be<mode>, *aarch64_combinez<mode>)
2495 (*aarch64_combinez_be<mode>)
2496 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_cm<optab>di)
2497 (aarch64_cm<optab><mode><vczle><vczbe>, *aarch64_mov<mode>)
2498 (*aarch64_be_mov<mode>, *aarch64_be_movoi): Update to new syntax.
2500 2023-10-03 Andrea Corallo <andrea.corallo@arm.com>
2502 * gensupport.cc (convert_syntax): Skip spaces before "cons:"
2503 in new compact pattern syntax.
2505 2023-10-03 Richard Sandiford <richard.sandiford@arm.com>
2507 * gensupport.cc (convert_syntax): Updated to support unordered
2508 constraints in compact syntax.
2510 2023-10-02 Michael Meissner <meissner@linux.ibm.com>
2512 * config/rs6000/rs6000.md (UNSPEC_COPYSIGN): Delete.
2513 (copysign<mode>3_fcpsg): Use copysign RTL instead of UNSPEC.
2514 (copysign<mode>3_hard): Likewise.
2515 (copysign<mode>3_soft): Likewise.
2516 * config/rs6000/vector.md (vector_copysign<mode>3): Use copysign RTL
2518 * config/rs6000/vsx.md (vsx_copysign<mode>3): Use copysign RTL instead
2521 2023-10-02 David Malcolm <dmalcolm@redhat.com>
2523 * diagnostic-format-json.cc (toplevel_array): Remove global in
2524 favor of json_output_format::m_top_level_array.
2525 (cur_group): Likewise, for json_output_format::m_cur_group.
2526 (cur_children_array): Likewise, for
2527 json_output_format::m_cur_children_array.
2528 (class json_output_format): New.
2529 (json_begin_diagnostic): Remove, in favor of
2530 json_output_format::on_begin_diagnostic.
2531 (json_end_diagnostic): Convert to...
2532 (json_output_format::on_end_diagnostic): ...this.
2533 (json_begin_group): Remove, in favor of
2534 json_output_format::on_begin_group.
2535 (json_end_group): Remove, in favor of
2536 json_output_format::on_end_group.
2537 (json_flush_to_file): Remove, in favor of
2538 json_output_format::flush_to_file.
2539 (json_stderr_final_cb): Remove, in favor of json_output_format
2541 (json_output_base_file_name): Remove global.
2542 (class json_stderr_output_format): New.
2543 (json_file_final_cb): Remove.
2544 (class json_file_output_format): New.
2545 (json_emit_diagram): Remove.
2546 (diagnostic_output_format_init_json): Update.
2547 (diagnostic_output_format_init_json_file): Update.
2548 * diagnostic-format-sarif.cc (the_builder): Remove this global,
2549 moving to a field of the sarif_output_format.
2550 (sarif_builder::maybe_make_artifact_content_object): Use the
2551 context's m_file_cache.
2552 (get_source_lines): Convert to...
2553 (sarif_builder::get_source_lines): ...this, using context's
2555 (sarif_begin_diagnostic): Remove, in favor of
2556 sarif_output_format::on_begin_diagnostic.
2557 (sarif_end_diagnostic): Remove, in favor of
2558 sarif_output_format::on_end_diagnostic.
2559 (sarif_begin_group): Remove, in favor of
2560 sarif_output_format::on_begin_group.
2561 (sarif_end_group): Remove, in favor of
2562 sarif_output_format::on_end_group.
2563 (sarif_flush_to_file): Delete.
2564 (sarif_stderr_final_cb): Delete.
2565 (sarif_output_base_file_name): Delete.
2566 (sarif_file_final_cb): Delete.
2567 (class sarif_output_format): New.
2568 (sarif_emit_diagram): Delete.
2569 (class sarif_stream_output_format): New.
2570 (class sarif_file_output_format): New.
2571 (diagnostic_output_format_init_sarif): Update.
2572 (diagnostic_output_format_init_sarif_stderr): Update.
2573 (diagnostic_output_format_init_sarif_file): Update.
2574 (diagnostic_output_format_init_sarif_stream): Update.
2575 * diagnostic-show-locus.cc (diagnostic_show_locus): Update.
2576 * diagnostic.cc (default_diagnostic_final_cb): Delete, moving to
2577 diagnostic_text_output_format's dtor.
2578 (diagnostic_initialize): Update, making a new instance of
2579 diagnostic_text_output_format.
2580 (diagnostic_finish): Delete m_output_format, rather than calling
2582 (diagnostic_report_diagnostic): Assert that m_output_format is
2583 non-NULL. Replace call to begin_group_cb with call to
2584 m_output_format->on_begin_group. Replace call to
2585 diagnostic_starter with call to
2586 m_output_format->on_begin_diagnostic. Replace call to
2587 diagnostic_finalizer with call to
2588 m_output_format->on_end_diagnostic.
2589 (diagnostic_emit_diagram): Replace both optional call to
2590 m_diagrams.m_emission_cb and default implementation with call to
2591 m_output_format->on_diagram. Move default implementation to
2592 diagnostic_text_output_format::on_diagram.
2593 (auto_diagnostic_group::~auto_diagnostic_group): Replace call to
2594 end_group_cb with call to m_output_format->on_end_group.
2595 (diagnostic_text_output_format::~diagnostic_text_output_format):
2596 New, based on default_diagnostic_final_cb.
2597 (diagnostic_text_output_format::on_begin_diagnostic): New, based
2598 on code from diagnostic_report_diagnostic.
2599 (diagnostic_text_output_format::on_end_diagnostic): Likewise.
2600 (diagnostic_text_output_format::on_diagram): New, based on code
2601 from diagnostic_emit_diagram.
2602 * diagnostic.h (class diagnostic_output_format): New.
2603 (class diagnostic_text_output_format): New.
2604 (diagnostic_context::begin_diagnostic): Move to...
2605 (diagnostic_context::m_text_callbacks::begin_diagnostic): ...here.
2606 (diagnostic_context::start_span): Move to...
2607 (diagnostic_context::m_text_callbacks::start_span): ...here.
2608 (diagnostic_context::end_diagnostic): Move to...
2609 (diagnostic_context::m_text_callbacks::end_diagnostic): ...here.
2610 (diagnostic_context::begin_group_cb): Remove, in favor of
2611 m_output_format->on_begin_group.
2612 (diagnostic_context::end_group_cb): Remove, in favor of
2613 m_output_format->on_end_group.
2614 (diagnostic_context::final_cb): Remove, in favor of
2615 m_output_format's dtor.
2616 (diagnostic_context::m_output_format): New field.
2617 (diagnostic_context::m_diagrams.m_emission_cb): Remove, in favor
2618 of m_output_format->on_diagram.
2619 (diagnostic_starter): Update.
2620 (diagnostic_finalizer): Update.
2621 (diagnostic_output_format_init_sarif_stream): New.
2622 * input.cc (location_get_source_line): Move implementation apart from
2623 call to diagnostic_file_cache_init to...
2624 (file_cache::get_source_line): ...this new function...
2625 (location_get_source_line): ...and reintroduce, rewritten in terms of
2626 file_cache::get_source_line.
2627 (get_source_file_content): Likewise, refactor into...
2628 (file_cache::get_source_file_content): ...this new function.
2629 * input.h (file_cache::get_source_line): New decl.
2630 (file_cache::get_source_file_content): New decl.
2631 * selftest-diagnostic.cc
2632 (test_diagnostic_context::test_diagnostic_context): Update.
2633 * tree-diagnostic-path.cc (event_range::print): Update for
2634 change to diagnostic_context's start_span callback.
2636 2023-10-02 David Malcolm <dmalcolm@redhat.com>
2638 * diagnostic-show-locus.cc: Update for reorganization of
2639 source-printing fields of diagnostic_context.
2640 * diagnostic.cc (diagnostic_set_caret_max_width): Likewise.
2641 (diagnostic_initialize): Likewise.
2642 * diagnostic.h (diagnostic_context::show_caret): Move to...
2643 (diagnostic_context::m_source_printing::enabled): ...here.
2644 (diagnostic_context::caret_max_width): Move to...
2645 (diagnostic_context::m_source_printing::max_width): ...here.
2646 (diagnostic_context::caret_chars): Move to...
2647 (diagnostic_context::m_source_printing::caret_chars): ...here.
2648 (diagnostic_context::colorize_source_p): Move to...
2649 (diagnostic_context::m_source_printing::colorize_source_p): ...here.
2650 (diagnostic_context::show_labels_p): Move to...
2651 (diagnostic_context::m_source_printing::show_labels_p): ...here.
2652 (diagnostic_context::show_line_numbers_p): Move to...
2653 (diagnostic_context::m_source_printing::show_line_numbers_p): ...here.
2654 (diagnostic_context::min_margin_width): Move to...
2655 (diagnostic_context::m_source_printing::min_margin_width): ...here.
2656 (diagnostic_context::show_ruler_p): Move to...
2657 (diagnostic_context::m_source_printing::show_ruler_p): ...here.
2658 (diagnostic_same_line): Update for above changes.
2659 * opts.cc (common_handle_option): Update for reorganization of
2660 source-printing fields of diagnostic_context.
2661 * selftest-diagnostic.cc
2662 (test_diagnostic_context::test_diagnostic_context): Likewise.
2663 * toplev.cc (general_init): Likewise.
2664 * tree-diagnostic-path.cc (struct event_range): Likewise.
2666 2023-10-02 David Malcolm <dmalcolm@redhat.com>
2668 * diagnostic.cc (diagnostic_initialize): Initialize
2669 set_locations_cb to nullptr.
2671 2023-10-02 Wilco Dijkstra <wilco.dijkstra@arm.com>
2674 * config/arm/constraints.md: Remove Pf constraint.
2675 * config/arm/sync.md (arm_atomic_load<mode>): Add new pattern.
2676 (arm_atomic_load_acquire<mode>): Likewise.
2677 (arm_atomic_store<mode>): Likewise.
2678 (arm_atomic_store_release<mode>): Likewise.
2679 (atomic_load<mode>): Switch patterns to define_expand.
2680 (atomic_store<mode>): Likewise.
2681 (arm_atomic_loaddi2_ldrd): Remove predication.
2682 (arm_load_exclusive<mode>): Likewise.
2683 (arm_load_acquire_exclusive<mode>): Likewise.
2684 (arm_load_exclusivesi): Likewise.
2685 (arm_load_acquire_exclusivesi): Likewise.
2686 (arm_load_exclusivedi): Likewise.
2687 (arm_load_acquire_exclusivedi): Likewise.
2688 (arm_store_exclusive<mode>): Likewise.
2689 (arm_store_release_exclusivedi): Likewise.
2690 (arm_store_release_exclusive<mode>): Likewise.
2691 * config/arm/unspecs.md: Add VUNSPEC_LDR and VUNSPEC_STR.
2693 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2696 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2698 PR tree-optimization/109154
2699 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
2700 (cmp_arg_entry): New.
2701 (predicate_scalar_phi): Use it.
2703 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2705 * config/aarch64/aarch64-simd.md (xorsign<mode>3): Renamed to..
2706 (@xorsign<mode>3): ...This.
2707 * config/aarch64/aarch64.md (xorsign<mode>3): Renamed to...
2708 (@xorsign<mode>3): ..This and emit vectors directly
2709 * config/aarch64/iterators.md (VCONQ): Add SF and DF.
2711 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2713 * emit-rtl.cc (validate_subreg): Relax subreg rule.
2715 2023-10-02 Tamar Christina <tamar.christina@arm.com>
2717 PR tree-optimization/109154
2718 * tree-if-conv.cc (INCLUDE_ALGORITHM): Remove.
2719 (cmp_arg_entry): New.
2720 (predicate_scalar_phi): Use it.
2722 2023-10-02 Richard Sandiford <richard.sandiford@arm.com>
2725 * rtl-tests.cc (const_poly_int_tests<N>::run): Use a local
2727 * simplify-rtx.cc (simplify_const_poly_int_tests<N>::run): Likewise.
2729 2023-10-02 Joern Rennecke <joern.rennecke@embecosm.com>
2730 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2732 * config/riscv/riscv-protos.h (riscv_vector::expand_block_move):
2734 * config/riscv/riscv-v.cc (riscv_vector::expand_block_move):
2736 * config/riscv/riscv.md (cpymemsi): Use riscv_vector::expand_block_move.
2738 (cpymem<P:mode>) .. this.
2740 2023-10-01 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
2742 * combine.cc (simplify_compare_const): Properly handle unsigned
2743 constants while narrowing comparison of memory and constants.
2745 2023-10-01 Feng Wang <wangfeng@eswincomputing.com>
2747 * config/riscv/riscv-opts.h (MASK_ZICSR): Delete.
2748 (MASK_ZIFENCEI): Delete;
2749 (MASK_ZIHINTNTL): Ditto.
2750 (MASK_ZIHINTPAUSE): Ditto.
2751 (TARGET_ZICSR): Ditto.
2752 (TARGET_ZIFENCEI): Ditto.
2753 (TARGET_ZIHINTNTL): Ditto.
2754 (TARGET_ZIHINTPAUSE): Ditto.
2755 (MASK_ZAWRS): Ditto.
2756 (TARGET_ZAWRS): Ditto.
2761 (TARGET_ZBA): Ditto.
2762 (TARGET_ZBB): Ditto.
2763 (TARGET_ZBC): Ditto.
2764 (TARGET_ZBS): Ditto.
2765 (MASK_ZFINX): Ditto.
2766 (MASK_ZDINX): Ditto.
2767 (MASK_ZHINX): Ditto.
2768 (MASK_ZHINXMIN): Ditto.
2769 (TARGET_ZFINX): Ditto.
2770 (TARGET_ZDINX): Ditto.
2771 (TARGET_ZHINX): Ditto.
2772 (TARGET_ZHINXMIN): Ditto.
2780 (MASK_ZKSED): Ditto.
2783 (TARGET_ZBKB): Ditto.
2784 (TARGET_ZBKC): Ditto.
2785 (TARGET_ZBKX): Ditto.
2786 (TARGET_ZKNE): Ditto.
2787 (TARGET_ZKND): Ditto.
2788 (TARGET_ZKNH): Ditto.
2789 (TARGET_ZKR): Ditto.
2790 (TARGET_ZKSED): Ditto.
2791 (TARGET_ZKSH): Ditto.
2792 (TARGET_ZKT): Ditto.
2794 (TARGET_ZTSO): Ditto.
2795 (MASK_VECTOR_ELEN_32): Ditto.
2796 (MASK_VECTOR_ELEN_64): Ditto.
2797 (MASK_VECTOR_ELEN_FP_32): Ditto.
2798 (MASK_VECTOR_ELEN_FP_64): Ditto.
2799 (MASK_VECTOR_ELEN_FP_16): Ditto.
2800 (TARGET_VECTOR_ELEN_32): Ditto.
2801 (TARGET_VECTOR_ELEN_64): Ditto.
2802 (TARGET_VECTOR_ELEN_FP_32): Ditto.
2803 (TARGET_VECTOR_ELEN_FP_64): Ditto.
2804 (TARGET_VECTOR_ELEN_FP_16): Ditto.
2807 (TARGET_ZVBB): Ditto.
2808 (TARGET_ZVBC): Ditto.
2810 (MASK_ZVKNED): Ditto.
2811 (MASK_ZVKNHA): Ditto.
2812 (MASK_ZVKNHB): Ditto.
2813 (MASK_ZVKSED): Ditto.
2814 (MASK_ZVKSH): Ditto.
2816 (MASK_ZVKNC): Ditto.
2817 (MASK_ZVKNG): Ditto.
2819 (MASK_ZVKSC): Ditto.
2820 (MASK_ZVKSG): Ditto.
2822 (TARGET_ZVKG): Ditto.
2823 (TARGET_ZVKNED): Ditto.
2824 (TARGET_ZVKNHA): Ditto.
2825 (TARGET_ZVKNHB): Ditto.
2826 (TARGET_ZVKSED): Ditto.
2827 (TARGET_ZVKSH): Ditto.
2828 (TARGET_ZVKN): Ditto.
2829 (TARGET_ZVKNC): Ditto.
2830 (TARGET_ZVKNG): Ditto.
2831 (TARGET_ZVKS): Ditto.
2832 (TARGET_ZVKSC): Ditto.
2833 (TARGET_ZVKSG): Ditto.
2834 (TARGET_ZVKT): Ditto.
2835 (MASK_ZVL32B): Ditto.
2836 (MASK_ZVL64B): Ditto.
2837 (MASK_ZVL128B): Ditto.
2838 (MASK_ZVL256B): Ditto.
2839 (MASK_ZVL512B): Ditto.
2840 (MASK_ZVL1024B): Ditto.
2841 (MASK_ZVL2048B): Ditto.
2842 (MASK_ZVL4096B): Ditto.
2843 (MASK_ZVL8192B): Ditto.
2844 (MASK_ZVL16384B): Ditto.
2845 (MASK_ZVL32768B): Ditto.
2846 (MASK_ZVL65536B): Ditto.
2847 (TARGET_ZVL32B): Ditto.
2848 (TARGET_ZVL64B): Ditto.
2849 (TARGET_ZVL128B): Ditto.
2850 (TARGET_ZVL256B): Ditto.
2851 (TARGET_ZVL512B): Ditto.
2852 (TARGET_ZVL1024B): Ditto.
2853 (TARGET_ZVL2048B): Ditto.
2854 (TARGET_ZVL4096B): Ditto.
2855 (TARGET_ZVL8192B): Ditto.
2856 (TARGET_ZVL16384B): Ditto.
2857 (TARGET_ZVL32768B): Ditto.
2858 (TARGET_ZVL65536B): Ditto.
2859 (MASK_ZICBOZ): Ditto.
2860 (MASK_ZICBOM): Ditto.
2861 (MASK_ZICBOP): Ditto.
2862 (TARGET_ZICBOZ): Ditto.
2863 (TARGET_ZICBOM): Ditto.
2864 (TARGET_ZICBOP): Ditto.
2865 (MASK_ZICOND): Ditto.
2866 (TARGET_ZICOND): Ditto.
2868 (TARGET_ZFA): Ditto.
2869 (MASK_ZFHMIN): Ditto.
2871 (MASK_ZVFHMIN): Ditto.
2873 (TARGET_ZFHMIN): Ditto.
2874 (TARGET_ZFH): Ditto.
2875 (TARGET_ZVFHMIN): Ditto.
2876 (TARGET_ZVFH): Ditto.
2877 (MASK_ZMMUL): Ditto.
2878 (TARGET_ZMMUL): Ditto.
2886 (TARGET_ZCA): Ditto.
2887 (TARGET_ZCB): Ditto.
2888 (TARGET_ZCE): Ditto.
2889 (TARGET_ZCF): Ditto.
2890 (TARGET_ZCD): Ditto.
2891 (TARGET_ZCMP): Ditto.
2892 (TARGET_ZCMT): Ditto.
2893 (MASK_SVINVAL): Ditto.
2894 (MASK_SVNAPOT): Ditto.
2895 (TARGET_SVINVAL): Ditto.
2896 (TARGET_SVNAPOT): Ditto.
2897 (MASK_XTHEADBA): Ditto.
2898 (MASK_XTHEADBB): Ditto.
2899 (MASK_XTHEADBS): Ditto.
2900 (MASK_XTHEADCMO): Ditto.
2901 (MASK_XTHEADCONDMOV): Ditto.
2902 (MASK_XTHEADFMEMIDX): Ditto.
2903 (MASK_XTHEADFMV): Ditto.
2904 (MASK_XTHEADINT): Ditto.
2905 (MASK_XTHEADMAC): Ditto.
2906 (MASK_XTHEADMEMIDX): Ditto.
2907 (MASK_XTHEADMEMPAIR): Ditto.
2908 (MASK_XTHEADSYNC): Ditto.
2909 (TARGET_XTHEADBA): Ditto.
2910 (TARGET_XTHEADBB): Ditto.
2911 (TARGET_XTHEADBS): Ditto.
2912 (TARGET_XTHEADCMO): Ditto.
2913 (TARGET_XTHEADCONDMOV): Ditto.
2914 (TARGET_XTHEADFMEMIDX): Ditto.
2915 (TARGET_XTHEADFMV): Ditto.
2916 (TARGET_XTHEADINT): Ditto.
2917 (TARGET_XTHEADMAC): Ditto.
2918 (TARGET_XTHEADMEMIDX): Ditto.
2919 (TARGET_XTHEADMEMPAIR): Ditto.
2920 (TARGET_XTHEADSYNC): Ditto.
2921 (MASK_XVENTANACONDOPS): Ditto.
2922 (TARGET_XVENTANACONDOPS): Ditto.
2923 * config/riscv/riscv.opt: Add new Mask defination.
2924 * doc/options.texi: Add explanation for this new usage.
2925 * opt-functions.awk: Add new function to find the index
2926 of target variable from extra_target_vars.
2927 * opt-read.awk: Add new function to store the Mask flags.
2928 * opth-gen.awk: Add new function to output the defination of
2929 Mask Macro and Target Macro.
2931 2023-10-01 Joern Rennecke <joern.rennecke@embecosm.com>
2932 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2933 Juzhe-Zhong <juzhe.zhong@rivai.ai>
2936 * config/riscv/riscv-protos.h (riscv_vector::legitimize_move):
2937 Change second parameter to rtx *.
2938 * config/riscv/riscv-v.cc (risv_vector::legitimize_move): Likewise.
2939 * config/riscv/vector.md: Changed callers of
2940 riscv_vector::legitimize_move.
2941 (*mov<mode>_mem_to_mem): Remove.
2943 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2946 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::vector_infos_manager):
2947 Replace safe_grow with safe_grow_cleared.
2949 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2951 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Fix a pasto
2952 in function comment.
2954 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2956 PR middle-end/111625
2957 PR middle-end/111637
2958 * gimple-lower-bitint.cc (range_to_prec): Use prec or -prec if
2960 (bitint_large_huge::handle_operand_addr): For uninitialized operands
2961 use limb_prec or -limb_prec precision.
2963 2023-09-30 Jakub Jelinek <jakub@redhat.com>
2965 * vec.h (quick_grow): Uncomment static_assert.
2967 2023-09-30 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2969 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): Added type attribute
2971 2023-09-29 Xiao Zeng <zengxiao@eswincomputing.com>
2973 * config/riscv/riscv.cc (riscv_rtx_costs): Better handle costing
2974 SETs when the outer code is INSN.
2976 2023-09-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
2978 * config/riscv/bitmanip.md (*<optab>_not_const<mode>): New split
2981 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
2983 * poly-int.h (poly_int_pod): Delete.
2984 (poly_coeff_traits::init_cast): New type.
2985 (poly_int_full, poly_int_hungry, poly_int_fullness): New structures.
2986 (poly_int): Replace constructors that take 1 and 2 coefficients with
2987 a general one that takes an arbitrary number of coefficients.
2988 Delegate initialization to two new private constructors, one of
2989 which uses the coefficients as-is and one of which adds an extra
2990 zero of the appropriate type (and precision, where applicable).
2991 (gt_ggc_mx, gt_pch_nx): Operate on poly_ints rather than poly_int_pods.
2992 * poly-int-types.h (poly_uint16_pod, poly_int64_pod, poly_uint64_pod)
2993 (poly_offset_int_pod, poly_wide_int_pod, poly_widest_int_pod): Delete.
2994 * gengtype.cc (main): Don't register poly_int64_pod.
2995 * calls.cc (initialize_argument_information): Use poly_int rather
2997 (combine_pending_stack_adjustment_and_call): Likewise.
2998 * config/aarch64/aarch64.cc (pure_scalable_type_info): Likewise.
2999 * data-streamer.h (bp_unpack_poly_value): Likewise.
3000 * dwarf2cfi.cc (struct dw_trace_info): Likewise.
3001 (struct queued_reg_save): Likewise.
3002 * dwarf2out.h (struct dw_cfa_location): Likewise.
3003 * emit-rtl.h (struct incoming_args): Likewise.
3004 (struct rtl_data): Likewise.
3005 * expr.cc (get_bit_range): Likewise.
3006 (get_inner_reference): Likewise.
3007 * expr.h (get_bit_range): Likewise.
3008 * fold-const.cc (split_address_to_core_and_offset): Likewise.
3009 (ptr_difference_const): Likewise.
3010 * fold-const.h (ptr_difference_const): Likewise.
3011 * function.cc (try_fit_stack_local): Likewise.
3012 (instantiate_new_reg): Likewise.
3013 * function.h (struct expr_status): Likewise.
3014 (struct args_size): Likewise.
3015 * genmodes.cc (ZERO_COEFFS): Likewise.
3016 (mode_size_inline): Likewise.
3017 (mode_nunits_inline): Likewise.
3018 (emit_mode_precision): Likewise.
3019 (emit_mode_size): Likewise.
3020 (emit_mode_nunits): Likewise.
3021 * gimple-fold.cc (get_base_constructor): Likewise.
3022 * gimple-ssa-store-merging.cc (struct symbolic_number): Likewise.
3023 * inchash.h (class hash): Likewise.
3024 * ipa-modref-tree.cc (modref_access_node::dump): Likewise.
3025 * ipa-modref.cc (modref_access_analysis::merge_call_side_effects):
3027 * ira-int.h (ira_spilled_reg_stack_slot): Likewise.
3028 * lra-eliminations.cc (self_elim_offsets): Likewise.
3029 * machmode.h (mode_size, mode_precision, mode_nunits): Likewise.
3030 * omp-low.cc (omplow_simd_context): Likewise.
3031 * pretty-print.cc (pp_wide_integer): Likewise.
3032 * pretty-print.h (pp_wide_integer): Likewise.
3033 * reload.cc (struct decomposition): Likewise.
3034 * reload.h (struct reload): Likewise.
3035 * reload1.cc (spill_stack_slot_width): Likewise.
3036 (struct elim_table): Likewise.
3037 (offsets_at): Likewise.
3038 (init_eliminable_invariants): Likewise.
3039 * rtl.h (union rtunion): Likewise.
3040 (poly_int_rtx_p): Likewise.
3041 (strip_offset): Likewise.
3042 (strip_offset_and_add): Likewise.
3043 * rtlanal.cc (strip_offset): Likewise.
3044 * tree-dfa.cc (get_ref_base_and_extent): Likewise.
3045 (get_addr_base_and_unit_offset_1): Likewise.
3046 (get_addr_base_and_unit_offset): Likewise.
3047 * tree-dfa.h (get_ref_base_and_extent): Likewise.
3048 (get_addr_base_and_unit_offset_1): Likewise.
3049 (get_addr_base_and_unit_offset): Likewise.
3050 * tree-ssa-loop-ivopts.cc (struct iv_use): Likewise.
3051 (strip_offset): Likewise.
3052 * tree-ssa-sccvn.h (struct vn_reference_op_struct): Likewise.
3053 * tree.cc (ptrdiff_tree_p): Likewise.
3054 * tree.h (poly_int_tree_p): Likewise.
3055 (ptrdiff_tree_p): Likewise.
3056 (get_inner_reference): Likewise.
3058 2023-09-29 John David Anglin <danglin@gcc.gnu.org>
3060 * config/pa/pa.md (memory_barrier): Revise comment.
3061 (memory_barrier_64, memory_barrier_32): Use ldcw,co on PA 2.0.
3062 * config/pa/pa.opt (coherent-ldcw): Change default to disabled.
3064 2023-09-29 Jakub Jelinek <jakub@redhat.com>
3066 * vec.h (quick_insert, ordered_remove, unordered_remove,
3067 block_remove, qsort, sort, stablesort, quick_grow): Guard
3068 std::is_trivially_{copyable,default_constructible} and
3069 vec_detail::is_trivially_copyable_or_pair static assertions
3070 with GCC_VERSION >= 5000.
3071 (vec_detail::is_trivially_copyable_or_pair): Guard definition
3072 with GCC_VERSION >= 5000.
3074 2023-09-29 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
3076 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): Removed.
3077 (enum aarch64_ldp_stp_policy): Merged enums aarch64_ldp_policy
3078 and aarch64_stp_policy to aarch64_ldp_stp_policy.
3079 (enum aarch64_stp_policy): Removed.
3080 * config/aarch64/aarch64-protos.h (struct tune_params): Removed
3081 aarch64_ldp_policy_model and aarch64_stp_policy_model enum types
3082 and left only the definitions to the aarch64-opts one.
3083 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): Removed.
3084 (aarch64_parse_stp_policy): Removed.
3085 (aarch64_override_options_internal): Removed calls to parsing
3086 functions and added obvious direct assignments.
3087 (aarch64_mem_ok_with_ldpstp_policy_model): Improved
3088 code quality based on the new changes.
3089 * config/aarch64/aarch64.opt: Use single enum type
3090 aarch64_ldp_stp_policy for both ldp and stp options.
3092 2023-09-29 Richard Biener <rguenther@suse.de>
3094 PR tree-optimization/111583
3095 * tree-loop-distribution.cc (find_single_drs): Ensure the
3096 load/store are always executed.
3098 2023-09-29 Jakub Jelinek <jakub@redhat.com>
3100 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Use
3101 quick_grow_cleared method on unprom rather than quick_grow.
3103 2023-09-29 Sergei Trofimovich <siarheit@google.com>
3105 PR middle-end/111505
3106 * ggc-common.cc (ggc_zero_out_root_pointers, ggc_common_finalize):
3107 Add new helper. Use helper instead of memset() to wipe out pointers.
3109 2023-09-29 Richard Sandiford <richard.sandiford@arm.com>
3111 * builtins.h (c_readstr): Take a fixed_size_mode rather than a
3113 * builtins.cc (c_readstr): Likewise. Build a local array of
3114 bytes and use native_decode_rtx to get the rtx image.
3115 (builtin_memcpy_read_str): Simplify accordingly.
3116 (builtin_strncpy_read_str): Likewise.
3117 (builtin_memset_read_str): Likewise.
3118 (builtin_memset_gen_str): Likewise.
3119 * expr.cc (string_cst_read_str): Likewise.
3121 2023-09-29 Jakub Jelinek <jakub@redhat.com>
3123 * tree-ssa-loop-im.cc (tree_ssa_lim_initialize): Use quick_grow_cleared
3124 instead of quick_grow on vec<bitmap_head> members.
3125 * cfganal.cc (control_dependences::control_dependences): Likewise.
3126 * rtl-ssa/blocks.cc (function_info::build_info::build_info): Likewise.
3127 (function_info::place_phis): Use safe_grow_cleared instead of safe_grow
3128 on auto_vec<bitmap_head> vars.
3129 * tree-ssa-live.cc (compute_live_vars): Use quick_grow_cleared instead
3130 of quick_grow on vec<bitmap_head> var.
3132 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
3135 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
3137 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
3140 2023-09-28 Wilco Dijkstra <wilco.dijkstra@arm.com>
3143 * config/aarch64/aarch64.md (aarch64_movmemdi): Add new expander.
3144 (movmemdi): Call aarch64_expand_cpymem_mops for correct expansion.
3145 * config/aarch64/aarch64.cc (aarch64_expand_cpymem_mops): Add support
3147 * config/aarch64/aarch64-protos.h (aarch64_expand_cpymem_mops): Add new
3150 2023-09-28 Pan Li <pan2.li@intel.com>
3153 * config/riscv/autovec.md (<float_cvt><mode><vnnconvert>2):
3155 * config/riscv/vector-iterators.md: New iterator.
3157 2023-09-28 Vladimir N. Makarov <vmakarov@redhat.com>
3159 * rtl.h (lra_in_progress): Change type to bool.
3160 (ira_in_progress): Add new extern.
3161 * ira.cc (ira_in_progress): New global.
3162 (pass_ira::execute): Set up ira_in_progress.
3163 * lra.cc: (lra_in_progress): Change type to bool and initialize.
3164 (lra): Use bool values for lra_in_progress.
3165 * lra-eliminations.cc (init_elim_table): Ditto.
3167 2023-09-28 Richard Biener <rguenther@suse.de>
3170 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
3171 Use a heap allocated worklist for CFG traversal instead of
3174 2023-09-28 Jakub Jelinek <jakub@redhat.com>
3175 Jonathan Wakely <jwakely@redhat.com>
3177 * vec.h: Mention in file comment limited support for non-POD types
3179 (vec_destruct): New function template.
3180 (release): Use it for non-trivially destructible T.
3181 (truncate): Likewise.
3182 (quick_push): Perform a placement new into slot
3183 instead of assignment.
3184 (pop): For non-trivially destructible T return void
3185 rather than T & and destruct the popped element.
3186 (quick_insert, ordered_remove): Note that they aren't suitable
3187 for non-trivially copyable types. Add static_asserts for that.
3188 (block_remove): Assert T is trivially copyable.
3189 (vec_detail::is_trivially_copyable_or_pair): New trait.
3190 (qsort, sort, stablesort): Assert T is trivially copyable or
3191 std::pair with both trivally copyable types.
3192 (quick_grow): Add assert T is trivially default constructible,
3193 for now commented out.
3194 (quick_grow_cleared): Don't call quick_grow, instead inline it
3195 by hand except for the new static_assert.
3196 (gt_ggc_mx): Assert T is trivially destructable.
3197 (auto_vec::operator=): Formatting fixes.
3198 (auto_vec::auto_vec): Likewise.
3199 (vec_safe_grow_cleared): Don't call vec_safe_grow, instead inline
3200 it manually and call quick_grow_cleared method rather than quick_grow.
3201 (safe_grow_cleared): Likewise.
3202 * edit-context.cc (class line_event): Move definition earlier.
3203 * tree-ssa-loop-im.cc (seq_entry::seq_entry): Make default ctor
3205 * ipa-fnsummary.cc (evaluate_properties_for_edge): Use
3206 safe_grow_cleared instead of safe_grow followed by placement new
3207 constructing the elements.
3209 2023-09-28 Richard Sandiford <richard.sandiford@arm.com>
3211 * dwarf2out.cc (mem_loc_descriptor): Remove unused variables.
3212 * tree-affine.cc (expr_to_aff_combination): Likewise.
3214 2023-09-28 Richard Biener <rguenther@suse.de>
3216 PR tree-optimization/111614
3217 * tree-ssa-reassoc.cc (undistribute_bitref_for_vector): Properly
3218 convert the first vector when required.
3220 2023-09-28 xuli <xuli1@eswincomputing.com>
3223 * config/riscv/riscv-v.cc (expand_const_vector): Fix bug.
3224 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix bug.
3226 2023-09-27 Sandra Loosemore <sandra@codesourcery.com>
3228 * gimple.cc (gimple_copy): Add case GIMPLE_OMP_STRUCTURED_BLOCK.
3230 2023-09-27 Iain Sandoe <iain@sandoe.co.uk>
3233 * configure: Regenerate.
3234 * configure.ac: Rename the missing dsymutil case to "DET_UNKNOWN".
3236 2023-09-27 Manos Anagnostakis <manos.anagnostakis@vrull.eu>
3237 Philipp Tomsich <philipp.tomsich@vrull.eu>
3238 Manolis Tsamis <manolis.tsamis@vrull.eu>
3240 * config/aarch64/aarch64-opts.h (enum aarch64_ldp_policy): New
3242 (enum aarch64_stp_policy): New enum type.
3243 * config/aarch64/aarch64-protos.h (struct tune_params): Add
3244 appropriate enums for the policies.
3245 (aarch64_mem_ok_with_ldpstp_policy_model): New declaration.
3246 * config/aarch64/aarch64-tuning-flags.def
3247 (AARCH64_EXTRA_TUNING_OPTION): Remove superseded tuning
3249 * config/aarch64/aarch64.cc (aarch64_parse_ldp_policy): New
3250 function to parse ldp-policy parameter.
3251 (aarch64_parse_stp_policy): New function to parse stp-policy parameter.
3252 (aarch64_override_options_internal): Call parsing functions.
3253 (aarch64_mem_ok_with_ldpstp_policy_model): New function.
3254 (aarch64_operands_ok_for_ldpstp): Add call to
3255 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
3256 check and alignment check and remove superseded ones.
3257 (aarch64_operands_adjust_ok_for_ldpstp): Add call to
3258 aarch64_mem_ok_with_ldpstp_policy_model for parameter-value
3259 check and alignment check and remove superseded ones.
3260 * config/aarch64/aarch64.opt (aarch64-ldp-policy): New param.
3261 (aarch64-stp-policy): New param.
3262 * doc/invoke.texi: Document the parameters accordingly.
3264 2023-09-27 Andre Vieira <andre.simoesdiasvieira@arm.com>
3266 * tree-data-ref.cc (include calls.h): Add new include.
3267 (get_references_in_stmt): Correctly handle IFN_MASK_CALL.
3269 2023-09-27 Richard Biener <rguenther@suse.de>
3271 * match.pd (abs (copysign (x, y)) -> abs (x)): New pattern.
3273 2023-09-27 Jakub Jelinek <jakub@redhat.com>
3276 * system.h (BROKEN_VALUE_INITIALIZATION): Don't define.
3277 * vec.h (vec_default_construct): Remove BROKEN_VALUE_INITIALIZATION
3279 * function.cc (assign_parm_find_data_types): Likewise.
3281 2023-09-27 Pan Li <pan2.li@intel.com>
3283 * config/riscv/autovec.md (roundeven<mode>2): New pattern.
3284 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3285 (enum insn_type): Ditto.
3286 (expand_vec_roundeven): New func decl.
3287 * config/riscv/riscv-v.cc (expand_vec_roundeven): New func impl.
3289 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3292 * dse.cc (find_shift_sequence): Check the mode with access_size exist on the target.
3294 2023-09-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3296 * tree-if-conv.cc (is_cond_scalar_reduction): Fix comments.
3298 2023-09-27 Pan Li <pan2.li@intel.com>
3300 * config/riscv/autovec.md (btrunc<mode>2): New pattern.
3301 * config/riscv/riscv-protos.h (expand_vec_trunc): New func decl.
3302 * config/riscv/riscv-v.cc (emit_vec_cvt_x_f_rtz): New func impl.
3303 (expand_vec_trunc): Ditto.
3305 2023-09-26 Hans-Peter Nilsson <hp@axis.com>
3309 * builtins.cc (expand_builtin) <case BUILT_IN_ATOMIC_TEST_AND_SET>:
3310 Handle failure from expand_builtin_atomic_test_and_set.
3311 * optabs.cc (expand_atomic_test_and_set): When all attempts fail to
3312 generate atomic code through target support, return NULL
3313 instead of emitting non-atomic code. Also, for code handling
3314 targetm.atomic_test_and_set_trueval != 1, gcc_assert result
3315 from calling emit_store_flag_force instead of returning NULL.
3317 2023-09-26 Andrew MacLeod <amacleod@redhat.com>
3319 PR tree-optimization/111599
3320 * value-relation.cc (relation_oracle::valid_equivs): Ensure
3323 2023-09-26 Andrew Pinski <apinski@marvell.com>
3325 PR tree-optimization/106164
3326 PR tree-optimization/111456
3327 * match.pd (`(A ==/!= B) & (A CMP C)`):
3328 Support an optional cast on the second A.
3329 (`(A ==/!= B) | (A CMP C)`): Likewise.
3331 2023-09-26 Andrew Pinski <apinski@marvell.com>
3333 PR tree-optimization/111469
3334 * tree-ssa-phiopt.cc (minmax_replacement): Fix
3335 the assumption for the `non-diamond` handling cases
3338 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3340 * match.pd: Optimize COND_ADD reduction pattern.
3342 2023-09-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3344 PR tree-optimization/111594
3345 PR tree-optimization/110660
3346 * match.pd: Optimize COND_LEN_ADD reduction.
3348 2023-09-26 Pan Li <pan2.li@intel.com>
3350 * config/riscv/autovec.md (round<mode>2): New pattern.
3351 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3352 (enum insn_type): Ditto.
3353 (expand_vec_round): New function decl.
3354 * config/riscv/riscv-v.cc (expand_vec_round): New function impl.
3356 2023-09-26 Iain Sandoe <iain@sandoe.co.uk>
3358 * config/darwin.h (DARWIN_CC1_SPEC): Remove -dynamiclib.
3360 2023-09-26 Tobias Burnus <tobias@codesourcery.com>
3362 PR middle-end/111547
3363 * doc/invoke.texi (-fopenmp): Mention C++11 [[omp::decl(...)]] syntax.
3364 (-fopenmp-simd): Likewise. Clarify 'loop' directive semantic.
3366 2023-09-26 Pan Li <pan2.li@intel.com>
3368 * config/riscv/autovec.md (rint<mode>2): New pattern.
3369 * config/riscv/riscv-protos.h (expand_vec_rint): New function decl.
3370 * config/riscv/riscv-v.cc (expand_vec_rint): New function impl.
3372 2023-09-26 Pan Li <pan2.li@intel.com>
3374 * config/riscv/autovec.md (nearbyint<mode>2): New pattern.
3375 * config/riscv/riscv-protos.h (enum insn_type): New enum.
3376 (expand_vec_nearbyint): New function decl.
3377 * config/riscv/riscv-v.cc (expand_vec_nearbyint): New func impl.
3379 2023-09-26 Pan Li <pan2.li@intel.com>
3381 * config/riscv/riscv-v.cc (gen_ceil_const_fp): Remove.
3382 (get_fp_rounding_coefficient): Rename.
3383 (gen_floor_const_fp): Remove.
3384 (expand_vec_ceil): Take renamed func.
3385 (expand_vec_floor): Ditto.
3387 2023-09-25 Vladimir N. Makarov <vmakarov@redhat.com>
3389 PR middle-end/111497
3390 * lra-constraints.cc (lra_constraints): Copy substituted
3392 * lra.cc (lra): Change comment for calling unshare_all_rtl_again.
3394 2023-09-25 Eric Botcazou <ebotcazou@adacore.com>
3396 * gimple-range-gori.cc (gori_compute::logical_combine): Add missing
3397 return statement in the varying case.
3399 2023-09-25 Xi Ruoyao <xry111@xry111.site>
3401 * doc/invoke.texi: Update -m[no-]explicit-relocs for r14-4160.
3403 2023-09-25 Andrew Pinski <apinski@marvell.com>
3405 PR tree-optimization/110386
3406 * gimple-ssa-backprop.cc (strip_sign_op_1): Remove ABSU_EXPR.
3408 2023-09-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3411 * config/riscv/riscv-vsetvl.cc (earliest_pred_can_be_fused_p): Bugfix
3413 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
3416 * config/rs6000/rs6000.cc (rs6000_update_ipa_fn_target_info): Skip
3419 2023-09-25 Kewen Lin <linkw@linux.ibm.com>
3422 * config/rs6000/rs6000.cc (rs6000_can_inline_p): Adopt
3423 target_option_default_node when the callee has no option
3424 attributes, also simplify the existing code accordingly.
3426 2023-09-25 Guo Jie <guojie@loongson.cn>
3428 * config/loongarch/lasx.md (lasx_vecinit_merge_<LASX:mode>): New
3429 pattern for vector construction.
3430 (vec_set<mode>_internal): Ditto.
3431 (lasx_xvinsgr2vr_<mode256_i_half>_internal): Ditto.
3432 (lasx_xvilvl_<lasxfmt_f>_internal): Ditto.
3433 * config/loongarch/loongarch.cc (loongarch_expand_vector_init):
3434 Optimized the implementation of vector construction.
3435 (loongarch_expand_vector_init_same): New function.
3436 * config/loongarch/lsx.md (lsx_vilvl_<lsxfmt_f>_internal): New
3437 pattern for vector construction.
3438 (lsx_vreplvei_mirror_<lsxfmt_f>): New pattern for vector
3440 (vec_concatv2df): Ditto.
3441 (vec_concatv4sf): Ditto.
3443 2023-09-24 Pan Li <pan2.li@intel.com>
3446 * config/riscv/riscv-v.cc
3447 (expand_vector_init_merge_repeating_sequence): Bugfix
3449 2023-09-24 Andrew Pinski <apinski@marvell.com>
3451 PR tree-optimization/111543
3452 * match.pd (`(X & ~Y) & Y`, `(X | ~Y) | Y`): New patterns.
3454 2023-09-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3456 * config/riscv/autovec-opt.md: Extend VLS modes
3457 * config/riscv/vector-iterators.md: Ditto.
3459 2023-09-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3461 * config/riscv/autovec-opt.md: Add VLS modes for conditional ABS/SQRT.
3463 2023-09-23 Pan Li <pan2.li@intel.com>
3465 * config/riscv/autovec.md (floor<mode>2): New pattern.
3466 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3467 (enum insn_type): Ditto.
3468 (expand_vec_floor): New function decl.
3469 * config/riscv/riscv-v.cc (gen_floor_const_fp): New function impl.
3470 (expand_vec_floor): Ditto.
3472 2023-09-22 Pan Li <pan2.li@intel.com>
3474 * config/riscv/riscv-v.cc (expand_vec_float_cmp_mask): Refactor.
3475 (emit_vec_float_cmp_mask): Rename.
3476 (expand_vec_copysign): Ditto.
3477 (emit_vec_copysign): Ditto.
3478 (emit_vec_abs): New function impl.
3479 (emit_vec_cvt_x_f): Ditto.
3480 (emit_vec_cvt_f_x): Ditto.
3481 (expand_vec_ceil): Ditto.
3483 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3485 * config/riscv/vector-iterators.md: Extend VLS modes.
3487 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3489 * config/riscv/riscv-v.cc (gen_const_vector_dup): Use global expand function.
3490 * config/riscv/vector.md (@vec_duplicate<mode>): Remove @.
3491 (vec_duplicate<mode>): Ditto.
3493 2023-09-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3495 * config/riscv/autovec.md: Add VLS conditional patterns.
3496 * config/riscv/riscv-protos.h (expand_cond_unop): Ditto.
3497 (expand_cond_binop): Ditto.
3498 (expand_cond_ternop): Ditto.
3499 * config/riscv/riscv-v.cc (expand_cond_unop): Ditto.
3500 (expand_cond_binop): Ditto.
3501 (expand_cond_ternop): Ditto.
3503 2023-09-22 xuli <xuli1@eswincomputing.com>
3506 * config/riscv/riscv-v.cc (emit_vlmax_gather_insn): Optimization of vrgather.vv
3507 into vrgatherei16.vv.
3509 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
3511 * config/riscv/autovec-opt.md (*cond_widen_reduc_plus_scal_<mode>):
3512 New combine patterns.
3513 * config/riscv/riscv-protos.h (enum insn_type): New insn_type.
3515 2023-09-22 Lehua Ding <lehua.ding@rivai.ai>
3517 * config/riscv/riscv-protos.h (enum avl_type): New VLS avl_type.
3518 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Move comments.
3520 2023-09-22 Pan Li <pan2.li@intel.com>
3522 * config/riscv/autovec.md (ceil<mode>2): New pattern.
3523 * config/riscv/riscv-protos.h (enum insn_flags): New enum type.
3524 (enum insn_type): Ditto.
3525 (expand_vec_ceil): New function decl.
3526 * config/riscv/riscv-v.cc (gen_ceil_const_fp): New function impl.
3527 (expand_vec_float_cmp_mask): Ditto.
3528 (expand_vec_copysign): Ditto.
3529 (expand_vec_ceil): Ditto.
3530 * config/riscv/vector.md: Add VLS mode support.
3532 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3534 * config/riscv/autovec.md: Extend VLS modes.
3536 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3538 * config/riscv/vector-iterators.md: Extend VLS modes.
3540 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
3541 Robin Dapp <rdapp.gcc@gmail.com>
3543 * config/riscv/riscv-v.cc (emit_vlmax_insn): Adjust comments.
3544 (emit_nonvlmax_insn): Adjust comments.
3545 (emit_vlmax_insn_lra): Adjust comments.
3547 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3549 * config.gcc (*linux*): Set rust target_objs, and
3550 target_has_targetrustm,
3551 * config/t-linux (linux-rust.o): New rule.
3552 * config/linux-rust.cc: New file.
3554 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3556 * config.gcc (i[34567]86-*-mingw* | x86_64-*-mingw*): Set
3557 rust_target_objs and target_has_targetrustm.
3558 * config/t-winnt (winnt-rust.o): New rule.
3559 * config/winnt-rust.cc: New file.
3561 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3563 * config.gcc (*-*-fuchsia): Set tmake_rule, rust_target_objs,
3564 and target_has_targetrustm.
3565 * config/fuchsia-rust.cc: New file.
3566 * config/t-fuchsia: New file.
3568 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3570 * config.gcc (*-*-vxworks*): Set rust_target_objs and
3571 target_has_targetrustm.
3572 * config/t-vxworks (vxworks-rust.o): New rule.
3573 * config/vxworks-rust.cc: New file.
3575 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3577 * config.gcc (*-*-dragonfly*): Set rust_target_objs and
3578 target_has_targetrustm.
3579 * config/t-dragonfly (dragonfly-rust.o): New rule.
3580 * config/dragonfly-rust.cc: New file.
3582 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3584 * config.gcc (*-*-solaris2*): Set rust_target_objs and
3585 target_has_targetrustm.
3586 * config/t-sol2 (sol2-rust.o): New rule.
3587 * config/sol2-rust.cc: New file.
3589 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3591 * config.gcc (*-*-openbsd*): Set rust_target_objs and
3592 target_has_targetrustm.
3593 * config/t-openbsd (openbsd-rust.o): New rule.
3594 * config/openbsd-rust.cc: New file.
3596 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3598 * config.gcc (*-*-netbsd*): Set rust_target_objs and
3599 target_has_targetrustm.
3600 * config/t-netbsd (netbsd-rust.o): New rule.
3601 * config/netbsd-rust.cc: New file.
3603 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3605 * config.gcc (*-*-freebsd*): Set rust_target_objs and
3606 target_has_targetrustm.
3607 * config/t-freebsd (freebsd-rust.o): New rule.
3608 * config/freebsd-rust.cc: New file.
3610 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3612 * config.gcc (*-*-darwin*): Set rust_target_objs and
3613 target_has_targetrustm.
3614 * config/t-darwin (darwin-rust.o): New rule.
3615 * config/darwin-rust.cc: New file.
3617 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3619 * config/i386/t-i386 (i386-rust.o): New rule.
3620 * config/i386/i386-rust.cc: New file.
3621 * config/i386/i386-rust.h: New file.
3623 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3625 * doc/tm.texi: Regenerate.
3626 * doc/tm.texi.in: Document TARGET_RUST_OS_INFO.
3628 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3630 * doc/tm.texi: Regenerate.
3631 * doc/tm.texi.in: Add @node for Rust language and ABI, and document
3632 TARGET_RUST_CPU_INFO.
3634 2023-09-21 Iain Buclaw <ibuclaw@gdcproject.org>
3636 * Makefile.in (tm_rust_file_list, tm_rust_include_list, TM_RUST_H,
3637 RUST_TARGET_DEF, RUST_TARGET_H, RUST_TARGET_OBJS): New variables.
3638 (tm_rust.h, cs-tm_rust.h, default-rust.o,
3639 rust/rust-target-hooks-def.h, s-rust-target-hooks-def-h): New rules.
3640 (s-tm-texi): Also check timestamp on rust-target.def.
3641 (generated_files): Add TM_RUST_H and rust-target-hooks-def.h.
3642 (build/genhooks.o): Also depend on RUST_TARGET_DEF.
3643 * config.gcc (tm_rust_file, rust_target_objs, target_has_targetrustm):
3645 * configure: Regenerate.
3646 * configure.ac (tm_rust_file_list, tm_rust_include_list,
3647 rust_target_objs): Add substitutes.
3648 * doc/tm.texi: Regenerate.
3649 * doc/tm.texi.in (targetrustm): Document.
3650 (target_has_targetrustm): Document.
3651 * genhooks.cc: Include rust/rust-target.def.
3652 * config/default-rust.cc: New file.
3654 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3657 * config/riscv/autovec.md: Enable scratch rtx in ELSE operand.
3658 * config/riscv/predicates.md (autovec_else_operand): New predicate.
3659 * config/riscv/riscv-v.cc (get_else_operand): New function.
3660 (expand_cond_len_unop): Adapt ELSE value.
3661 (expand_cond_len_binop): Ditto.
3662 (expand_cond_len_ternop): Ditto.
3663 * config/riscv/riscv.cc (riscv_preferred_else_value): New function.
3664 (TARGET_PREFERRED_ELSE_VALUE): New targethook.
3666 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3669 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug.
3671 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
3673 PR tree-optimization/111355
3674 * match.pd ((X + C) / N): Update pattern.
3676 2023-09-21 Jiufu Guo <guojiufu@linux.ibm.com>
3678 * match.pd ((t * 2) / 2): Update to use overflow_free_p.
3680 2023-09-21 xuli <xuli1@eswincomputing.com>
3683 * config/riscv/constraints.md (c01): const_int 1.
3687 * config/riscv/predicates.md (vector_eew8_stride_operand): New predicate for stride operand.
3688 (vector_eew16_stride_operand): Ditto.
3689 (vector_eew32_stride_operand): Ditto.
3690 (vector_eew64_stride_operand): Ditto.
3691 * config/riscv/vector-iterators.md: New iterator for stride operand.
3692 * config/riscv/vector.md: Add stride = element width constraint.
3694 2023-09-21 Lehua Ding <lehua.ding@rivai.ai>
3696 * config/riscv/predicates.md (const_1_or_2_operand): Rename.
3697 (const_1_or_4_operand): Ditto.
3698 (vector_gs_scale_operand_16): Ditto.
3699 (vector_gs_scale_operand_32): Ditto.
3700 * config/riscv/vector-iterators.md: Adjust.
3702 2023-09-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3704 * config/riscv/autovec.md: Extend VLS modes.
3705 * config/riscv/vector-iterators.md: Ditto.
3706 * config/riscv/vector.md: Ditto.
3708 2023-09-20 Andrew MacLeod <amacleod@redhat.com>
3710 * gimple-range-cache.cc (ssa_cache::merge_range): Change meaning
3711 of the return value.
3712 (ssa_cache::dump): Don't print GLOBAL RANGE header.
3713 (ssa_lazy_cache::merge_range): Adjust return value meaning.
3714 (ranger_cache::dump): Print GLOBAL RANGE header.
3716 2023-09-20 Aldy Hernandez <aldyh@redhat.com>
3718 * range-op-float.cc (foperator_unordered_ge::fold_range): Remove
3720 (foperator_unordered_gt::fold_range): Same.
3721 (foperator_unordered_lt::fold_range): Same.
3722 (foperator_unordered_le::fold_range): Same.
3724 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3726 * builtins.h (type_to_class): Declare.
3727 * builtins.cc (type_to_class): No longer static. Return
3728 int rather than enum.
3729 * doc/extend.texi (__builtin_classify_type): Document.
3731 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3734 * internal-fn.cc (expand_fn_using_insn): Support undefined rtx value.
3735 * optabs.cc (maybe_legitimize_operand): Ditto.
3736 (can_reuse_operands_p): Ditto.
3737 * optabs.h (enum expand_operand_type): Ditto.
3738 (create_undefined_input_operand): Ditto.
3740 2023-09-20 Tobias Burnus <tobias@codesourcery.com>
3742 * gimplify.cc (gimplify_bind_expr): Call GOMP_alloc/free for
3743 'omp allocate' variables; move stack cleanup after other
3745 (omp_notice_variable): Process original decl when decl
3746 of the value-expression for a 'omp allocate' variable is passed.
3747 * omp-low.cc (scan_omp_1_op): Handle 'omp allocate' variables
3749 2023-09-20 Yanzhang Wang <yanzhang.wang@intel.com>
3751 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
3752 support simplifying vector int not only scalar int.
3754 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3756 * config/riscv/vector-iterators.md: Extend VLS floating-point.
3758 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3760 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Fix bug.
3762 2023-09-20 Iain Sandoe <iain@sandoe.co.uk>
3765 (SUBTARGET_DRIVER_SELF_SPECS): Move handling of 'shared' into the same
3766 specs as 'dynamiclib'. (STARTFILE_SPEC): Handle 'shared'.
3768 2023-09-20 Richard Biener <rguenther@suse.de>
3770 PR tree-optimization/111489
3771 * params.opt (-param uninit-max-chain-len=): Raise default to 8.
3773 2023-09-20 Richard Biener <rguenther@suse.de>
3775 PR tree-optimization/111489
3776 * doc/invoke.texi (--param uninit-max-chain-len): Document.
3777 (--param uninit-max-num-chains): Likewise.
3778 * params.opt (-param=uninit-max-chain-len=): New.
3779 (-param=uninit-max-num-chains=): Likewise.
3780 * gimple-predicate-analysis.cc (MAX_NUM_CHAINS): Define to
3781 param_uninit_max_num_chains.
3782 (MAX_CHAIN_LEN): Define to param_uninit_max_chain_len.
3783 (uninit_analysis::init_use_preds): Avoid VLA.
3784 (uninit_analysis::init_from_phi_def): Likewise.
3785 (compute_control_dep_chain): Avoid using MAX_CHAIN_LEN in
3788 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3790 * match.pd ((x << c) >> c): Use MAX_FIXED_MODE_SIZE instead of
3791 GET_MODE_PRECISION of TImode or DImode depending on whether
3792 TImode is supported scalar mode.
3793 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
3794 * expr.cc (expand_expr_real_1): Likewise.
3795 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt): Likewise.
3796 * ubsan.cc (ubsan_encode_value, ubsan_type_descriptor): Likewise.
3798 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
3800 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move and rename.
3801 (*n<optab><mode>): Ditto.
3802 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): Ditto.
3803 (*<any_shiftrt:optab>trunc<mode>): Ditto.
3804 (*narrow_<any_shiftrt:optab><any_extend:optab><mode>): Ditto.
3805 (*narrow_<any_shiftrt:optab><mode>_scalar): Ditto.
3806 (*single_widen_mult<any_extend:su><mode>): Ditto.
3807 (*single_widen_mul<any_extend:su><mode>): Ditto.
3808 (*single_widen_mult<mode>): Ditto.
3809 (*single_widen_mul<mode>): Ditto.
3810 (*dual_widen_fma<mode>): Ditto.
3811 (*dual_widen_fma<su><mode>): Ditto.
3812 (*single_widen_fma<mode>): Ditto.
3813 (*single_widen_fma<su><mode>): Ditto.
3814 (*dual_fma<mode>): Ditto.
3815 (*single_fma<mode>): Ditto.
3816 (*dual_fnma<mode>): Ditto.
3817 (*dual_widen_fnma<mode>): Ditto.
3818 (*single_fnma<mode>): Ditto.
3819 (*single_widen_fnma<mode>): Ditto.
3820 (*dual_fms<mode>): Ditto.
3821 (*dual_widen_fms<mode>): Ditto.
3822 (*single_fms<mode>): Ditto.
3823 (*single_widen_fms<mode>): Ditto.
3824 (*dual_fnms<mode>): Ditto.
3825 (*dual_widen_fnms<mode>): Ditto.
3826 (*single_fnms<mode>): Ditto.
3827 (*single_widen_fnms<mode>): Ditto.
3829 2023-09-20 Jakub Jelinek <jakub@redhat.com>
3832 * attribs.cc (decl_attributes): Don't warn on omp::directive attribute
3833 on vars or function decls if -fopenmp or -fopenmp-simd.
3835 2023-09-20 Lehua Ding <lehua.ding@rivai.ai>
3838 * config/riscv/autovec-opt.md: Add missed operand.
3840 2023-09-20 Omar Sandoval <osandov@osandov.com>
3843 * dwarf2out.cc (output_macinfo): Don't call optimize_macinfo_range if
3844 dwarf_split_debug_info.
3846 2023-09-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3848 * config/riscv/riscv-v.cc (can_find_related_mode_p): New function.
3849 (vectorize_related_mode): Add VLS related modes.
3850 * config/riscv/vector-iterators.md: Extend VLS modes.
3852 2023-09-20 Surya Kumari Jangala <jskumari@linux.ibm.com>
3854 PR rtl-optimization/110071
3855 * ira-color.cc (improve_allocation): Consider cost of callee
3858 2023-09-20 mengqinggang <mengqinggang@loongson.cn>
3859 Xi Ruoyao <xry111@xry111.site>
3861 * configure: Regenerate.
3862 * configure.ac: Checking assembler for -mno-relax support.
3863 Disable relaxation when probing leb128 support.
3865 2023-09-20 Lulu Cheng <chenglulu@loongson.cn>
3867 * config.in: Regenerate.
3868 * config/loongarch/genopts/loongarch.opt.in: Add compilation option
3869 mrelax. And set the initial value of explicit-relocs according to the
3871 * config/loongarch/gnu-user.h: When compiling with -mno-relax, pass the
3872 --no-relax option to the linker.
3873 * config/loongarch/loongarch-driver.h (ASM_SPEC): When compiling with
3874 -mno-relax, pass the -mno-relax option to the assembler.
3875 * config/loongarch/loongarch-opts.h (HAVE_AS_MRELAX_OPTION): Define macro.
3876 * config/loongarch/loongarch.opt: Regenerate.
3877 * configure: Regenerate.
3878 * configure.ac: Add detection of support for binutils relax function.
3880 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3882 * doc/invoke.texi: Document -fdeps-format=, -fdeps-file=, and
3883 -fdeps-target= flags.
3884 * gcc.cc: add defaults for -fdeps-target= and -fdeps-file= when
3885 only -fdeps-format= is specified.
3886 * json.h: Add a TODO item to refactor out to share with
3889 2023-09-19 Ben Boeckel <ben.boeckel@kitware.com>
3890 Jason Merrill <jason@redhat.com>
3892 * gcc.cc (join_spec_func): Add a spec function to join all
3895 2023-09-19 Patrick O'Neill <patrick@rivosinc.com>
3897 * config/riscv/riscv.cc (riscv_legitimize_const_move): Eliminate
3898 src_op_0 var to avoid rtl check error.
3900 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3902 * range-op-float.cc (frelop_early_resolve): Clean-up and remove
3904 (operator_not_equal::fold_range): Handle VREL_EQ.
3905 (operator_lt::fold_range): Remove special casing for VREL_EQ.
3906 (operator_gt::fold_range): Same.
3907 (foperator_unordered_equal::fold_range): Same.
3909 2023-09-19 Javier Martinez <javier.martinez.bugzilla@gmail.com>
3911 * doc/extend.texi: Document attributes hot, cold on C++ types.
3913 2023-09-19 Pat Haugen <pthaugen@linux.ibm.com>
3915 * config/rs6000/rs6000.cc (rs6000_rtx_costs): Check whether the
3916 modulo instruction is disabled.
3917 * config/rs6000/rs6000.h (RS6000_DISABLE_SCALAR_MODULO): New.
3918 * config/rs6000/rs6000.md (mod<mode>3, *mod<mode>3): Check it.
3919 (define_expand umod<mode>3): New.
3920 (define_insn umod<mode>3): Rename to *umod<mode>3 and check if the modulo
3921 instruction is disabled.
3922 (umodti3, modti3): Check if the modulo instruction is disabled.
3924 2023-09-19 Gaius Mulley <gaiusmod2@gmail.com>
3926 * doc/gm2.texi (fdebug-builtins): Correct description.
3928 2023-09-19 Jeff Law <jlaw@ventanamicro.com>
3930 * config/iq2000/predicates.md (uns_arith_constant): New predicate.
3931 * config/iq2000/iq2000.md (rotrsi3): Use it.
3933 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3935 * range-op-float.cc (operator_lt::op1_range): Remove known_isnan check.
3936 (operator_lt::op2_range): Same.
3937 (operator_le::op1_range): Same.
3938 (operator_le::op2_range): Same.
3939 (operator_gt::op1_range): Same.
3940 (operator_gt::op2_range): Same.
3941 (operator_ge::op1_range): Same.
3942 (operator_ge::op2_range): Same.
3943 (foperator_unordered_lt::op1_range): Same.
3944 (foperator_unordered_lt::op2_range): Same.
3945 (foperator_unordered_le::op1_range): Same.
3946 (foperator_unordered_le::op2_range): Same.
3947 (foperator_unordered_gt::op1_range): Same.
3948 (foperator_unordered_gt::op2_range): Same.
3949 (foperator_unordered_ge::op1_range): Same.
3950 (foperator_unordered_ge::op2_range): Same.
3952 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3954 * value-range.h (frange::update_nan): New.
3956 2023-09-19 Aldy Hernandez <aldyh@redhat.com>
3958 * range-op-float.cc (operator_not_equal::op2_range): New.
3959 * range-op-mixed.h: Add operator_not_equal::op2_range.
3961 2023-09-19 Andrew MacLeod <amacleod@redhat.com>
3963 PR tree-optimization/110080
3964 PR tree-optimization/110249
3965 * tree-vrp.cc (remove_unreachable::final_p): New.
3966 (remove_unreachable::maybe_register): Rename from
3967 maybe_register_block and call early or final routine.
3968 (fully_replaceable): New.
3969 (remove_unreachable::handle_early): New.
3970 (remove_unreachable::remove_and_update_globals): Remove
3971 non-final processing.
3972 (rvrp_folder::rvrp_folder): Add final flag to constructor.
3973 (rvrp_folder::post_fold_bb): Remove unreachable registration.
3974 (rvrp_folder::pre_fold_stmt): Move unreachable processing to here.
3975 (execute_ranger_vrp): Adjust some call parameters.
3977 2023-09-19 Richard Biener <rguenther@suse.de>
3980 * tree-pretty-print.h (op_symbol_code): Add defaulted flags
3982 * tree-pretty-print.cc (op_symbol): Likewise.
3983 (op_symbol_code): Print TDF_GIMPLE variant if requested.
3984 * gimple-pretty-print.cc (dump_binary_rhs): Pass flags to
3986 (dump_gimple_cond): Likewise.
3988 2023-09-19 Thomas Schwinge <thomas@codesourcery.com>
3989 Pan Li <pan2.li@intel.com>
3991 * tree-streamer.h (bp_unpack_machine_mode): If
3992 'ib->file_data->mode_table' not available, apply 1-to-1 mapping.
3994 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
3996 * config/riscv/riscv.cc (riscv_can_change_mode_class): Block unordered VLA and VLS modes.
3998 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4000 * config/riscv/autovec.md: Extend VLS modes.
4001 * config/riscv/vector.md: Ditto.
4003 2023-09-19 Richard Biener <rguenther@suse.de>
4005 PR tree-optimization/111465
4006 * tree-ssa-threadupdate.cc (fwd_jt_path_registry::thread_block_1):
4007 Cancel the path when a EDGE_NO_COPY_SRC_BLOCK became non-empty.
4009 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4011 * config/riscv/autovec.md: Extend VLS floating-point modes.
4012 * config/riscv/vector.md: Ditto.
4014 2023-09-19 Jakub Jelinek <jakub@redhat.com>
4016 * match.pd ((x << c) >> c): Don't call build_nonstandard_integer_type
4017 nor check type_has_mode_precision_p for width larger than [TD]Imode
4019 (a ? CST1 : CST2): Don't use build_nonstandard_type, just convert
4020 to type. Use boolean_true_node instead of
4021 constant_boolean_node (true, boolean_type_node). Formatting fixes.
4023 2023-09-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4025 * config/riscv/autovec.md: Add VLS modes.
4026 * config/riscv/vector.md: Ditto.
4028 2023-09-19 Jakub Jelinek <jakub@redhat.com>
4030 * tree.cc (build_bitint_type): Assert precision is not 0, or
4032 (signed_or_unsigned_type_for): Return INTEGER_TYPE for signed variant
4033 of unsigned _BitInt(1).
4035 2023-09-19 Lehua Ding <lehua.ding@rivai.ai>
4037 * config/riscv/autovec-opt.md (*<optab>_fma<mode>):
4038 Removed old combine patterns.
4039 (*single_<optab>mult_plus<mode>): Ditto.
4040 (*double_<optab>mult_plus<mode>): Ditto.
4041 (*sign_zero_extend_fma): Ditto.
4042 (*zero_sign_extend_fma): Ditto.
4043 (*double_widen_fma<mode>): Ditto.
4044 (*single_widen_fma<mode>): Ditto.
4045 (*double_widen_fnma<mode>): Ditto.
4046 (*single_widen_fnma<mode>): Ditto.
4047 (*double_widen_fms<mode>): Ditto.
4048 (*single_widen_fms<mode>): Ditto.
4049 (*double_widen_fnms<mode>): Ditto.
4050 (*single_widen_fnms<mode>): Ditto.
4051 (*reduc_plus_scal_<mode>): Adjust name.
4052 (*widen_reduc_plus_scal_<mode>): Adjust name.
4053 (*dual_widen_fma<mode>): New combine pattern.
4054 (*dual_widen_fmasu<mode>): Ditto.
4055 (*dual_widen_fmaus<mode>): Ditto.
4056 (*dual_fma<mode>): Ditto.
4057 (*single_fma<mode>): Ditto.
4058 (*dual_fnma<mode>): Ditto.
4059 (*single_fnma<mode>): Ditto.
4060 (*dual_fms<mode>): Ditto.
4061 (*single_fms<mode>): Ditto.
4062 (*dual_fnms<mode>): Ditto.
4063 (*single_fnms<mode>): Ditto.
4064 * config/riscv/autovec.md (fma<mode>4):
4065 Reafctor fma pattern.
4066 (*fma<VI:mode><P:mode>): Removed.
4067 (fnma<mode>4): Reafctor.
4068 (*fnma<VI:mode><P:mode>): Removed.
4069 (*fma<VF:mode><P:mode>): Removed.
4070 (*fnma<VF:mode><P:mode>): Removed.
4071 (fms<mode>4): Reafctor.
4072 (*fms<VF:mode><P:mode>): Removed.
4073 (fnms<mode>4): Reafctor.
4074 (*fnms<VF:mode><P:mode>): Removed.
4075 * config/riscv/riscv-protos.h (prepare_ternary_operands):
4077 * config/riscv/riscv-v.cc (prepare_ternary_operands): Refactor.
4078 * config/riscv/vector.md (*pred_mul_plus<mode>_undef): New pattern.
4079 (*pred_mul_plus<mode>): Removed.
4080 (*pred_mul_plus<mode>_scalar): Removed.
4081 (*pred_mul_plus<mode>_extended_scalar): Removed.
4082 (*pred_minus_mul<mode>_undef): New pattern.
4083 (*pred_minus_mul<mode>): Removed.
4084 (*pred_minus_mul<mode>_scalar): Removed.
4085 (*pred_minus_mul<mode>_extended_scalar): Removed.
4086 (*pred_mul_<optab><mode>_undef): New pattern.
4087 (*pred_mul_<optab><mode>): Removed.
4088 (*pred_mul_<optab><mode>_scalar): Removed.
4089 (*pred_mul_neg_<optab><mode>_undef): New pattern.
4090 (*pred_mul_neg_<optab><mode>): Removed.
4091 (*pred_mul_neg_<optab><mode>_scalar): Removed.
4093 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
4095 * config/riscv/riscv-vector-builtins.cc
4096 (builtin_decl, expand_builtin): Replace SVE with RVV.
4098 2023-09-19 Tsukasa OI <research_trasio@irq.a4lg.com>
4100 * config/riscv/t-riscv: Add dependencies for riscv-builtins.cc,
4101 riscv-cmo.def and riscv-scalar-crypto.def.
4103 2023-09-18 Pan Li <pan2.li@intel.com>
4105 * config/riscv/autovec.md: Extend to vls mode.
4107 2023-09-18 Pan Li <pan2.li@intel.com>
4109 * config/riscv/autovec.md: Bugfix.
4110 * config/riscv/riscv-protos.h (SCALAR_MOVE_MERGED_OP): New enum.
4112 2023-09-18 Andrew Pinski <apinski@marvell.com>
4114 PR tree-optimization/111442
4115 * match.pd (zero_one_valued_p): Have the bit_and match not be
4118 2023-09-18 Andrew Pinski <apinski@marvell.com>
4120 PR tree-optimization/111435
4121 * match.pd (zero_one_valued_p): Don't do recursion
4124 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
4126 * config/darwin-protos.h (enum darwin_external_toolchain): New.
4127 * config/darwin.cc (DSYMUTIL_VERSION): New.
4128 (darwin_override_options): Choose the default debug DWARF version
4129 depending on the configured dsymutil version.
4131 2023-09-18 Iain Sandoe <iain@sandoe.co.uk>
4133 * configure: Regenerate.
4134 * configure.ac: Handle explict disable of stdlib option, set
4135 defaults for Darwin.
4137 2023-09-18 Andrew Pinski <apinski@marvell.com>
4139 PR tree-optimization/111431
4140 * match.pd (`(a == CST) & a`): New pattern.
4142 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4144 * config/riscv/riscv-selftests.cc (run_broadcast_selftests): Adapt selftests.
4145 * config/riscv/vector.md (@vec_duplicate<mode>): Remove.
4147 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
4150 * config/aarch64/aarch64.cc (aarch64_internal_mov_immediate)
4151 Add support for immediates using shifted ORR/BIC.
4152 (aarch64_split_dimode_const_store): Apply if we save one instruction.
4153 * config/aarch64/aarch64.md (<LOGICAL:optab>_<SHIFT:optab><mode>3):
4154 Make pattern global.
4156 2023-09-18 Wilco Dijkstra <wilco.dijkstra@arm.com>
4158 * config/aarch64/aarch64-cores.def (neoverse-n1): Place before ares.
4159 (neoverse-v1): Place before zeus.
4160 (neoverse-v2): Place before demeter.
4161 * config/aarch64/aarch64-tune.md: Regenerate.
4163 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4165 * config/riscv/autovec.md: Add VLS modes.
4166 * config/riscv/vector-iterators.md: Ditto.
4167 * config/riscv/vector.md: Ditto.
4169 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4171 * config/riscv/riscv-vsetvl.cc (vlmul_for_greatest_sew_second_ratio): New function.
4172 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Fix bug.
4174 2023-09-18 Richard Biener <rguenther@suse.de>
4176 PR tree-optimization/111294
4177 * tree-ssa-threadbackward.cc (back_threader_profitability::m_name):
4179 (back_threader::find_paths_to_names): Adjust.
4180 (back_threader::maybe_thread_block): Likewise.
4181 (back_threader_profitability::possibly_profitable_path_p): Remove
4182 code applying extra costs to copies PHIs.
4184 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4186 * config/riscv/autovec.md: Extend VLS modes.
4187 * config/riscv/vector.md: Ditto.
4189 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4191 * config/riscv/vector.md (mov<mode>): New pattern.
4192 (*mov<mode>_mem_to_mem): Ditto.
4193 (*mov<mode>): Ditto.
4194 (@mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
4195 (*mov<VLS_AVL_REG:mode><P:mode>_lra): Ditto.
4196 (*mov<mode>_vls): Ditto.
4197 (movmisalign<mode>): Ditto.
4198 (@vec_duplicate<mode>): Ditto.
4199 * config/riscv/autovec-vls.md: Removed.
4201 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4204 * config/riscv/autovec.md: Add VLS modes.
4206 2023-09-18 Jason Merrill <jason@redhat.com>
4208 * doc/gty.texi: Add discussion of cache vs. deletable.
4210 2023-09-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4212 * config/riscv/autovec-vls.md (<optab><mode>3): Deleted.
4213 (copysign<mode>3): Ditto.
4214 (xorsign<mode>3): Ditto.
4215 (<optab><mode>2): Ditto.
4216 * config/riscv/autovec.md: Extend VLS modes.
4218 2023-09-18 Jiufu Guo <guojiufu@linux.ibm.com>
4220 PR middle-end/111303
4221 * match.pd ((t * 2) / 2): Update pattern.
4223 2023-09-17 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
4225 * config/rs6000/vsx.md (*vctzlsbb_zext_<mode>): New define_insn.
4227 2023-09-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4230 * config/riscv/autovec.md (@vec_extract<mode><vel>): Remove @.
4231 (vec_extract<mode><vel>): Ditto.
4232 * config/riscv/riscv-vsetvl.cc (emit_vsetvl_insn): Fix bug.
4233 (pass_vsetvl::local_eliminate_vsetvl_insn): Fix bug.
4234 * config/riscv/riscv.cc (riscv_legitimize_move): Expand VLS mode to scalar mode move.
4236 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
4238 * config/riscv/crypto.md (riscv_sha256sig0_<mode>,
4239 riscv_sha256sig1_<mode>, riscv_sha256sum0_<mode>,
4240 riscv_sha256sum1_<mode>, riscv_sm3p0_<mode>, riscv_sm3p1_<mode>,
4241 riscv_sm4ed_<mode>, riscv_sm4ks_<mode>): Remove and replace with
4242 new insn/expansions.
4243 (SHA256_OP, SM3_OP, SM4_OP): New iterators.
4244 (sha256_op, sm3_op, sm4_op): New attributes for iteration.
4245 (*riscv_<sha256_op>_si): New raw instruction for RV32.
4246 (*riscv_<sm3_op>_si): Ditto.
4247 (*riscv_<sm4_op>_si): Ditto.
4248 (riscv_<sha256_op>_di_extended): New base instruction for RV64.
4249 (riscv_<sm3_op>_di_extended): Ditto.
4250 (riscv_<sm4_op>_di_extended): Ditto.
4251 (riscv_<sha256_op>_si): New common instruction expansion.
4252 (riscv_<sm3_op>_si): Ditto.
4253 (riscv_<sm4_op>_si): Ditto.
4254 * config/riscv/riscv-builtins.cc: Add availability "crypto_zknh",
4255 "crypto_zksh" and "crypto_zksed". Remove availability
4256 "crypto_zksh{32,64}" and "crypto_zksed{32,64}".
4257 * config/riscv/riscv-ftypes.def: Remove unused function type.
4258 * config/riscv/riscv-scalar-crypto.def: Make SHA-256, SM3 and SM4
4259 intrinsics to operate on uint32_t.
4261 2023-09-16 Tsukasa OI <research_trasio@irq.a4lg.com>
4263 * config/riscv/riscv-builtins.cc (RISCV_ATYPE_UQI): New for
4264 uint8_t. (RISCV_ATYPE_UHI): New for uint16_t.
4265 (RISCV_ATYPE_QI, RISCV_ATYPE_HI, RISCV_ATYPE_SI, RISCV_ATYPE_DI):
4266 Removed as no longer used.
4267 (RISCV_ATYPE_UDI): New for uint64_t.
4268 * config/riscv/riscv-cmo.def: Make types unsigned for not working
4269 "zicbop_cbo_prefetchi" and working bit manipulation clmul builtin
4270 argument/return types.
4271 * config/riscv/riscv-ftypes.def: Make bit manipulation, round
4272 number and shift amount types unsigned.
4273 * config/riscv/riscv-scalar-crypto.def: Ditto.
4275 2023-09-16 Pan Li <pan2.li@intel.com>
4277 * config/riscv/autovec-vls.md (xorsign<mode>3): New pattern.
4279 2023-09-15 Fei Gao <gaofei@eswincomputing.com>
4281 * config/riscv/predicates.md: Restrict predicate
4282 to allow 'reg' only.
4284 2023-09-15 Andrew Pinski <apinski@marvell.com>
4286 * match.pd (zero_one_valued_p): Match a cast from a zero_one_valued_p.
4287 Also match `a & zero_one_valued_p` too.
4289 2023-09-15 Andrew Pinski <apinski@marvell.com>
4291 PR tree-optimization/111414
4292 * match.pd (`(1 >> X) != 0`): Check to see if
4293 the integer_onep was an integral type (not a vector type).
4295 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
4297 * gimple-range-fold.cc (fold_using_range::range_of_phi): Always
4298 run phi analysis, and do it before loop analysis.
4300 2023-09-15 Andrew MacLeod <amacleod@redhat.com>
4302 * gimple-range-fold.cc (fold_using_range::range_of_phi): Fix
4305 2023-09-15 Qing Zhao <qing.zhao@oracle.com>
4307 PR tree-optimization/111407
4308 * tree-ssa-math-opts.cc (convert_mult_to_widen): Avoid the transform
4309 when one of the operands is subject to abnormal coalescing.
4311 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4313 * config/riscv/riscv-protos.h (enum insn_flags): Change name.
4314 (enum insn_type): Ditto.
4315 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): Removed.
4316 (emit_vlmax_insn): Adjust.
4317 (emit_nonvlmax_insn): Adjust.
4318 (emit_vlmax_insn_lra): Adjust.
4320 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4322 * config/riscv/autovec-opt.md: Adjust.
4323 * config/riscv/autovec.md: Ditto.
4324 * config/riscv/riscv-protos.h (enum class): Delete enum reduction_type.
4325 (expand_reduction): Adjust expand_reduction prototype.
4326 * config/riscv/riscv-v.cc (need_mask_operand_p): New helper function.
4327 (expand_reduction): Refactor expand_reduction.
4329 2023-09-15 Richard Sandiford <richard.sandiford@arm.com>
4332 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp): Require
4333 the lower memory access to a mem-pair operand.
4335 2023-09-15 Yang Yujie <yangyujie@loongson.cn>
4337 * config.gcc: Pass the default ABI via TM_MULTILIB_CONFIG.
4338 * config/loongarch/loongarch-driver.h: Invoke MLIB_SELF_SPECS
4339 before the driver canonicalization routines.
4340 * config/loongarch/loongarch.h: Move definitions of CC1_SPEC etc.
4341 to loongarch-driver.h
4342 * config/loongarch/t-linux: Move multilib-related definitions to
4344 * config/loongarch/t-multilib: New file. Inject library build
4345 options obtained from --with-multilib-list.
4346 * config/loongarch/t-loongarch: Same.
4348 2023-09-15 Lehua Ding <lehua.ding@rivai.ai>
4351 * config/riscv/autovec-opt.md (*reduc_plus_scal_<mode>):
4352 New combine pattern.
4353 (*fold_left_widen_plus_<mode>): Ditto.
4354 (*mask_len_fold_left_widen_plus_<mode>): Ditto.
4355 * config/riscv/autovec.md (reduc_plus_scal_<mode>):
4356 Change from define_expand to define_insn_and_split.
4357 (fold_left_plus_<mode>): Ditto.
4358 (mask_len_fold_left_plus_<mode>): Ditto.
4359 * config/riscv/riscv-v.cc (expand_reduction):
4360 Support widen reduction.
4361 * config/riscv/vector-iterators.md (UNSPEC_WREDUC_SUM):
4362 Add new iterators and attrs.
4364 2023-09-14 David Malcolm <dmalcolm@redhat.com>
4366 * diagnostic-event-id.h (diagnostic_thread_id_t): New typedef.
4367 * diagnostic-format-sarif.cc (class sarif_thread_flow): New.
4368 (sarif_thread_flow::sarif_thread_flow): New.
4369 (sarif_builder::make_code_flow_object): Reimplement, creating
4370 per-thread threadFlow objects, populating them with the relevant
4372 (sarif_builder::make_thread_flow_object): Delete, moving the
4373 code into sarif_builder::make_code_flow_object.
4374 (sarif_builder::make_thread_flow_location_object): Add
4375 "path_event_idx" param. Use it to set "executionOrder"
4377 * diagnostic-path.h (diagnostic_event::get_thread_id): New
4379 (class diagnostic_thread): New.
4380 (diagnostic_path::num_threads): New pure-virtual vfunc.
4381 (diagnostic_path::get_thread): New pure-virtual vfunc.
4382 (diagnostic_path::multithreaded_p): New decl.
4383 (simple_diagnostic_event::simple_diagnostic_event): Add optional
4385 (simple_diagnostic_event::get_thread_id): New accessor.
4386 (simple_diagnostic_event::m_thread_id): New.
4387 (class simple_diagnostic_thread): New.
4388 (simple_diagnostic_path::simple_diagnostic_path): Move definition
4390 (simple_diagnostic_path::num_threads): New.
4391 (simple_diagnostic_path::get_thread): New.
4392 (simple_diagnostic_path::add_thread): New.
4393 (simple_diagnostic_path::add_thread_event): New.
4394 (simple_diagnostic_path::m_threads): New.
4395 * diagnostic-show-locus.cc (layout::layout): Add pretty_printer
4396 param for overriding the context's printer.
4397 (diagnostic_show_locus): Likwise.
4398 * diagnostic.cc (simple_diagnostic_path::simple_diagnostic_path):
4399 Move here from diagnostic-path.h. Add main thread.
4400 (simple_diagnostic_path::num_threads): New.
4401 (simple_diagnostic_path::get_thread): New.
4402 (simple_diagnostic_path::add_thread): New.
4403 (simple_diagnostic_path::add_thread_event): New.
4404 (simple_diagnostic_event::simple_diagnostic_event): Add thread_id
4405 param and use it to initialize m_thread_id. Reformat.
4406 * diagnostic.h: Add pretty_printer param for overriding the
4408 * tree-diagnostic-path.cc: Add #define INCLUDE_VECTOR.
4409 (can_consolidate_events): Compare thread ids.
4410 (class per_thread_summary): New.
4411 (event_range::event_range): Add per_thread_summary arg.
4412 (event_range::print): Add "pp" param and use it rather than dc's
4414 (event_range::m_thread_id): New field.
4415 (event_range::m_per_thread_summary): New field.
4416 (path_summary::multithreaded_p): New.
4417 (path_summary::get_events_for_thread_id): New.
4418 (path_summary::m_per_thread_summary): New field.
4419 (path_summary::m_thread_id_to_events): New field.
4420 (path_summary::get_or_create_events_for_thread_id): New.
4421 (path_summary::path_summary): Create per_thread_summary instances
4422 as needed and associate the event_range instances with them.
4423 (base_indent): Move here from print_path_summary_as_text.
4424 (per_frame_indent): Likewise.
4425 (class thread_event_printer): New, adapted from parts of
4426 print_path_summary_as_text.
4427 (print_path_summary_as_text): Make static. Reimplement to
4428 moving most of existing code to class thread_event_printer,
4429 capturing state as per-thread as appropriate.
4430 (default_tree_diagnostic_path_printer): Add missing 'break' on
4433 2023-09-14 David Malcolm <dmalcolm@redhat.com>
4435 * dwarf2cfi.cc (dwarf2cfi_cc_finalize): New.
4436 * dwarf2out.h (dwarf2cfi_cc_finalize): New decl.
4437 * ggc-common.cc (ggc_mark_roots): Multiply by rti->nelt when
4438 clearing the deletable gcc_root_tab_t.
4439 (ggc_common_finalize): New.
4440 * ggc.h (ggc_common_finalize): New decl.
4441 * toplev.cc (toplev::finalize): Call dwarf2cfi_cc_finalize and
4442 ggc_common_finalize.
4444 2023-09-14 Max Filippov <jcmvbkbc@gmail.com>
4446 * config/xtensa/predicates.md (xtensa_cstoresi_operator): Add
4447 unsigned comparisons.
4448 * config/xtensa/xtensa.cc (xtensa_expand_scc): Add code
4449 generation of salt/saltu instructions.
4450 * config/xtensa/xtensa.h (TARGET_SALT): New macro.
4451 * config/xtensa/xtensa.md (salt, saltu): New instruction
4454 2023-09-14 Vladimir N. Makarov <vmakarov@redhat.com>
4456 * ira-costs.cc (find_costs_and_classes): Decrease memory cost
4459 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
4461 * config/riscv/autovec.md: Change rtx code to unspec.
4462 * config/riscv/riscv-protos.h (expand_reduction): Change prototype.
4463 * config/riscv/riscv-v.cc (expand_reduction): Change prototype.
4464 * config/riscv/riscv-vector-builtins-bases.cc (class widen_reducop):
4466 (class widen_freducop): Removed.
4467 * config/riscv/vector-iterators.md (minu): Add reduc unspec, iterators, attrs.
4468 * config/riscv/vector.md (@pred_reduc_<reduc><mode>): Change name.
4469 (@pred_<reduc_op><mode>): New name.
4470 (@pred_widen_reduc_plus<v_su><mode>): Change name.
4471 (@pred_reduc_plus<order><mode>): Change name.
4472 (@pred_widen_reduc_plus<order><mode>): Change name.
4474 2023-09-14 Lehua Ding <lehua.ding@rivai.ai>
4476 * config/riscv/riscv-v.cc (expand_reduction): Adjust call.
4477 * config/riscv/riscv-vector-builtins-bases.cc: Adjust call.
4478 * config/riscv/vector-iterators.md: New iterators and attrs.
4479 * config/riscv/vector.md (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>):
4481 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Removed.
4482 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Removed.
4483 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Removed.
4484 (@pred_reduc_<reduc><mode>): Added.
4485 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): Removed.
4486 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Removed.
4487 (@pred_widen_reduc_plus<v_su><mode>): Added.
4488 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Removed.
4489 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): Removed.
4490 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Removed.
4491 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Removed.
4492 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Removed.
4493 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Removed.
4494 (@pred_reduc_plus<order><mode>): Added.
4495 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Removed.
4496 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Removed.
4497 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Removed.
4498 (@pred_widen_reduc_plus<order><mode>): Added.
4500 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
4502 * config/aarch64/aarch64.cc (aarch64_vector_costs::analyze_loop_info):
4503 Move WHILELO handling to...
4504 (aarch64_vector_costs::finish_cost): ...here. Check whether the
4505 vectorizer has decided to use a predicated loop.
4507 2023-09-14 Andrew Pinski <apinski@marvell.com>
4509 PR tree-optimization/106164
4510 * match.pd (`(X CMP1 CST1) AND/IOR (X CMP2 CST2)`):
4511 Expand to support constants that are off by one.
4513 2023-09-14 Andrew Pinski <apinski@marvell.com>
4515 * genmatch.cc (parser::parse_result): For an else clause
4516 of an if statement inside a switch, error out explictly.
4518 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4520 * config/riscv/autovec-opt.md: Add VLS mask modes.
4521 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Remove @.
4522 (vcond_mask_<mode><vm>): Add VLS mask modes.
4523 * config/riscv/vector.md: Ditto.
4525 2023-09-14 Richard Biener <rguenther@suse.de>
4527 PR tree-optimization/111294
4528 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
4529 operands that eventually become dead and use simple_dce_from_worklist
4530 to remove their definitions if they did so.
4532 2023-09-14 Richard Sandiford <richard.sandiford@arm.com>
4534 * config/aarch64/aarch64-sve.md (@aarch64_vec_duplicate_vq<mode>_le):
4535 Accept all nonimmediate_operands, but keep the existing constraints.
4536 If the instruction is split before RA, load invalid addresses into
4537 a temporary register.
4538 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): Delete.
4540 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4543 * config/riscv/riscv-vsetvl.cc (avl_info::operator==): Fix ICE.
4544 (vector_insn_info::global_merge): Ditto.
4545 (vector_insn_info::get_avl_or_vl_reg): Ditto.
4547 2023-09-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4549 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn): Format it.
4551 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
4553 * config/loongarch/loongarch-def.c: Modify the default value of
4556 2023-09-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
4558 * config/xtensa/xtensa.cc (xtensa_expand_scc):
4559 Revert the changes from the last patch, as the work in the RTL
4560 expansion pass is too far to determine the physical registers.
4561 * config/xtensa/xtensa.md (*eqne_INT_MIN): Ditto.
4562 (eq_zero_NSA, eqne_zero, *eqne_zero_masked_bits): New patterns.
4564 2023-09-14 Lulu Cheng <chenglulu@loongson.cn>
4567 * config/loongarch/loongarch.md: Fix bug of '<optab>di3_fake'.
4569 2023-09-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4571 * config/riscv/autovec.md (vec_extract<mode><vel>): Add VLS modes.
4572 (@vec_extract<mode><vel>): Ditto.
4573 * config/riscv/vector.md: Ditto
4575 2023-09-13 Andrew Pinski <apinski@marvell.com>
4577 * match.pd (`X <= MAX(X, Y)`):
4578 Move before `MIN (X, C1) < C2` pattern.
4580 2023-09-13 Andrew Pinski <apinski@marvell.com>
4582 PR tree-optimization/111364
4583 * match.pd (`MIN (X, Y) == X`): Extend
4584 to min/lt, min/ge, max/gt, max/le.
4586 2023-09-13 Andrew Pinski <apinski@marvell.com>
4588 PR tree-optimization/111345
4589 * match.pd (`Y > (X % Y)`): Merge
4591 (`(X % Y) < Y`): Pattern by adding `:c`
4594 2023-09-13 Richard Biener <rguenther@suse.de>
4596 PR tree-optimization/111387
4597 * tree-vect-slp.cc (vect_get_and_check_slp_defs): Check
4598 EDGE_DFS_BACK when doing BB vectorization.
4599 (vect_slp_function): Use rev_post_order_and_mark_dfs_back_seme
4600 to compute RPO and mark backedges.
4602 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
4604 * config/riscv/autovec-opt.md (*cond_<mulh_table><mode>3_highpart):
4605 New combine pattern.
4606 * config/riscv/autovec.md (smul<mode>3_highpart): Mrege smul and umul.
4607 (<mulh_table><mode>3_highpart): Merged pattern.
4608 (umul<mode>3_highpart): Mrege smul and umul.
4609 * config/riscv/vector-iterators.md (umul): New iterators.
4610 (UNSPEC_VMULHU): New iterators.
4612 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
4614 * config/riscv/autovec-opt.md (*cond_v<any_shiftrt:optab><any_extend:optab>trunc<mode>):
4615 New combine pattern.
4616 (*cond_<any_shiftrt:optab>trunc<mode>): Ditto.
4618 2023-09-13 Lehua Ding <lehua.ding@rivai.ai>
4620 * config/riscv/autovec-opt.md (*copysign<mode>_neg): Move.
4621 (*cond_copysign<mode>): New combine pattern.
4622 * config/riscv/riscv-v.cc (needs_fp_rounding): Extend.
4624 2023-09-13 Richard Biener <rguenther@suse.de>
4626 PR tree-optimization/111397
4627 * tree-ssa-propagate.cc (may_propagate_copy): Change optional
4628 argument to specify whether the PHI destination doesn't flow in
4629 from an abnormal PHI.
4630 (propagate_value): Adjust.
4631 * tree-ssa-forwprop.cc (pass_forwprop::execute): Indicate abnormal
4633 * tree-ssa-sccvn.cc (eliminate_dom_walker::before_dom_children):
4635 (process_bb): Likewise.
4637 2023-09-13 Pan Li <pan2.li@intel.com>
4640 * config/riscv/riscv.cc (riscv_emit_frm_mode_set): Bugfix.
4642 2023-09-13 Jiufu Guo <guojiufu@linux.ibm.com>
4644 PR tree-optimization/111303
4645 * match.pd ((X - N * M) / N): Add undefined_p checking.
4646 ((X + N * M) / N): Likewise.
4647 ((X + C) div_rshift N): Likewise.
4649 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4652 * config/riscv/autovec.md (vcond_mask_<mode><mode>): New pattern.
4654 2023-09-12 Martin Jambor <mjambor@suse.cz>
4656 * dbgcnt.def (form_fma): New.
4657 * tree-ssa-math-opts.cc: Include dbgcnt.h.
4658 (convert_mult_to_fma): Bail out if the debug counter say so.
4660 2023-09-12 Edwin Lu <ewlu@rivosinc.com>
4662 * config/riscv/autovec-opt.md: Update type
4663 * config/riscv/riscv.cc (riscv_sched_variable_issue): Enable assert
4665 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4667 * config/aarch64/aarch64.cc (aarch64_save_regs_above_locals_p):
4669 (aarch64_layout_frame): Use it to decide whether locals should
4670 go above or below the saved registers.
4671 (aarch64_expand_prologue): Update stack layout comment.
4672 Emit a stack tie after the final adjustment.
4674 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4676 * config/aarch64/aarch64.h (aarch64_frame::saved_regs_size)
4677 (aarch64_frame::below_hard_fp_saved_regs_size): Delete.
4678 * config/aarch64/aarch64.cc (aarch64_layout_frame): Update accordingly.
4680 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4682 * config/aarch64/aarch64.h (aarch64_frame::sve_save_and_probe)
4683 (aarch64_frame::hard_fp_save_and_probe): New fields.
4684 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize them.
4685 Rather than asserting that a leaf function saves LR, instead assert
4686 that a leaf function saves something.
4687 (aarch64_get_separate_components): Prevent the chosen probe
4688 registers from being individually shrink-wrapped.
4689 (aarch64_allocate_and_probe_stack_space): Remove workaround for
4690 probe registers that aren't at the bottom of the previous allocation.
4692 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4694 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
4695 Always probe the residual allocation at offset 1024, asserting
4696 that that is in range.
4698 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4700 * config/aarch64/aarch64.cc (aarch64_layout_frame): Ensure that
4701 the LR save slot is in the first 16 bytes of the register save area.
4702 Only form STP/LDP push/pop candidates if both registers are valid.
4703 (aarch64_allocate_and_probe_stack_space): Remove workaround for
4704 when LR was not in the first 16 bytes.
4706 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4708 * config/aarch64/aarch64.cc (aarch64_allocate_and_probe_stack_space):
4709 Don't probe final allocations that are exactly 1KiB in size (after
4710 unprobed space above the final allocation has been deducted).
4712 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4714 * config/aarch64/aarch64.cc (aarch64_layout_frame): Tweak
4715 calculation of initial_adjust for frames in which all saves
4718 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4720 * config/aarch64/aarch64.cc (aarch64_layout_frame): Simplify
4721 the allocation of the top of the frame.
4723 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4725 * config/aarch64/aarch64.h (aarch64_frame): Add comment above
4727 * config/aarch64/aarch64.cc (aarch64_layout_frame): Walk offsets
4728 from the bottom of the frame, rather than the bottom of the saved
4729 register area. Measure reg_offset from the bottom of the frame
4730 rather than the bottom of the saved register area.
4731 (aarch64_save_callee_saves): Update accordingly.
4732 (aarch64_restore_callee_saves): Likewise.
4733 (aarch64_get_separate_components): Likewise.
4734 (aarch64_process_components): Likewise.
4736 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4738 * config/aarch64/aarch64.h (aarch64_frame::frame_size): Tweak comment.
4740 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4742 * config/aarch64/aarch64.h (aarch64_frame::hard_fp_offset): Rename
4744 (aarch64_frame::bytes_above_hard_fp): ...this.
4745 * config/aarch64/aarch64.cc (aarch64_layout_frame)
4746 (aarch64_expand_prologue): Update accordingly.
4747 (aarch64_initial_elimination_offset): Likewise.
4749 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4751 * config/aarch64/aarch64.h (aarch64_frame::locals_offset): Rename to...
4752 (aarch64_frame::bytes_above_locals): ...this.
4753 * config/aarch64/aarch64.cc (aarch64_layout_frame)
4754 (aarch64_initial_elimination_offset): Update accordingly.
4756 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4758 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Move the
4759 calculation of chain_offset into the emit_frame_chain block.
4761 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4763 * config/aarch64/aarch64.h (aarch64_frame::callee_offset): Delete.
4764 * config/aarch64/aarch64.cc (aarch64_layout_frame): Remove
4765 callee_offset handling.
4766 (aarch64_save_callee_saves): Replace the start_offset parameter
4767 with a bytes_below_sp parameter.
4768 (aarch64_restore_callee_saves): Likewise.
4769 (aarch64_expand_prologue): Update accordingly.
4770 (aarch64_expand_epilogue): Likewise.
4772 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4774 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_hard_fp): New
4776 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it.
4777 (aarch64_expand_epilogue): Use it instead of
4778 below_hard_fp_saved_regs_size.
4780 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4782 * config/aarch64/aarch64.h (aarch64_frame::bytes_below_saved_regs): New
4784 * config/aarch64/aarch64.cc (aarch64_layout_frame): Initialize it,
4785 and use it instead of crtl->outgoing_args_size.
4786 (aarch64_get_separate_components): Use bytes_below_saved_regs instead
4787 of outgoing_args_size.
4788 (aarch64_process_components): Likewise.
4790 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4792 * config/aarch64/aarch64.cc (aarch64_layout_frame): Explicitly
4793 allocate the frame in one go if there are no saved registers.
4795 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4797 * config/aarch64/aarch64.cc (aarch64_expand_prologue): Use
4798 chain_offset rather than callee_offset.
4800 2023-09-12 Richard Sandiford <richard.sandiford@arm.com>
4802 * config/aarch64/aarch64.cc (aarch64_save_callee_saves): Use
4803 a local shorthand for cfun->machine->frame.
4804 (aarch64_restore_callee_saves, aarch64_get_separate_components):
4805 (aarch64_process_components): Likewise.
4806 (aarch64_allocate_and_probe_stack_space): Likewise.
4807 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
4808 (aarch64_layout_frame): Use existing shorthand for one more case.
4810 2023-09-12 Andrew Pinski <apinski@marvell.com>
4812 PR tree-optimization/107881
4813 * match.pd (`(a CMP1 b) ^ (a CMP2 b)`): New pattern.
4814 (`(a CMP1 b) == (a CMP2 b)`): New pattern.
4816 2023-09-12 Pan Li <pan2.li@intel.com>
4818 * config/riscv/riscv-vector-costs.h (struct range): Removed.
4820 2023-09-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
4822 * config/riscv/riscv-vector-costs.cc (get_last_live_range): New function.
4823 (compute_nregs_for_mode): Ditto.
4824 (live_range_conflict_p): Ditto.
4825 (max_number_of_live_regs): Ditto.
4826 (compute_lmul): Ditto.
4827 (costs::prefer_new_lmul_p): Ditto.
4828 (costs::better_main_loop_than_p): Ditto.
4829 * config/riscv/riscv-vector-costs.h (struct stmt_point): New struct.
4830 (struct var_live_range): Ditto.
4831 (struct autovec_info): Ditto.
4832 * config/riscv/t-riscv: Update makefile for COST model.
4834 2023-09-12 Jakub Jelinek <jakub@redhat.com>
4836 * fold-const.cc (range_check_type): Handle BITINT_TYPE like
4839 2023-09-12 Jakub Jelinek <jakub@redhat.com>
4841 PR middle-end/111338
4842 * tree-ssa-sccvn.cc (struct vn_walk_cb_data): Add bufsize non-static
4844 (vn_walk_cb_data::push_partial_def): Remove bufsize variable.
4845 (visit_nary_op): Avoid the BIT_AND_EXPR with constant rhs2
4846 optimization if type's precision is too large for
4847 vn_walk_cb_data::bufsize.
4849 2023-09-12 Gaius Mulley <gaiusmod2@gmail.com>
4851 * doc/gm2.texi (Compiler options): Document new option
4854 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4856 * doc/sourcebuild.texi (stack_size): Update.
4858 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
4860 * config/riscv/bitmanip.md (*<optab>_not<mode>): Export INSN name.
4861 (<optab>_not<mode>3): Likewise.
4862 * config/riscv/riscv-protos.h (riscv_expand_strcmp): New
4864 * config/riscv/riscv-string.cc (GEN_EMIT_HELPER3): New helper
4866 (GEN_EMIT_HELPER2): Likewise.
4867 (emit_strcmp_scalar_compare_byte): New function.
4868 (emit_strcmp_scalar_compare_subword): Likewise.
4869 (emit_strcmp_scalar_compare_word): Likewise.
4870 (emit_strcmp_scalar_load_and_compare): Likewise.
4871 (emit_strcmp_scalar_call_to_libc): Likewise.
4872 (emit_strcmp_scalar_result_calculation_nonul): Likewise.
4873 (emit_strcmp_scalar_result_calculation): Likewise.
4874 (riscv_expand_strcmp_scalar): Likewise.
4875 (riscv_expand_strcmp): Likewise.
4876 * config/riscv/riscv.md (*slt<u>_<X:mode><GPR:mode>): Export
4878 (@slt<u>_<X:mode><GPR:mode>3): Likewise.
4879 (cmpstrnsi): Invoke expansion function for str(n)cmp.
4880 (cmpstrsi): Likewise.
4881 * config/riscv/riscv.opt: Add new parameter
4882 '-mstring-compare-inline-limit'.
4883 * doc/invoke.texi: Document new parameter
4884 '-mstring-compare-inline-limit'.
4886 2023-09-12 Christoph Müllner <christoph.muellner@vrull.eu>
4888 * config.gcc: Add new object riscv-string.o.
4890 * config/riscv/riscv-protos.h (riscv_expand_strlen):
4892 * config/riscv/riscv.md (strlen<mode>): New expand INSN.
4893 * config/riscv/riscv.opt: New flag 'minline-strlen'.
4894 * config/riscv/t-riscv: Add new object riscv-string.o.
4895 * config/riscv/thead.md (th_rev<mode>2): Export INSN name.
4896 (th_rev<mode>2): Likewise.
4897 (th_tstnbz<mode>2): New INSN.
4898 * doc/invoke.texi: Document '-minline-strlen'.
4899 * emit-rtl.cc (emit_likely_jump_insn): New helper function.
4900 (emit_unlikely_jump_insn): Likewise.
4901 * rtl.h (emit_likely_jump_insn): New prototype.
4902 (emit_unlikely_jump_insn): Likewise.
4903 * config/riscv/riscv-string.cc: New file.
4905 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4907 * config/nvptx/nvptx.h (TARGET_USE_LOCAL_THUNK_ALIAS_P)
4908 (TARGET_SUPPORTS_ALIASES): Define.
4910 2023-09-12 Thomas Schwinge <thomas@codesourcery.com>
4912 * doc/sourcebuild.texi (check-function-bodies): Update.
4914 2023-09-12 Tobias Burnus <tobias@codesourcery.com>
4916 * gimplify.cc (gimplify_bind_expr): Check for
4917 insertion after variable cleanup. Convert 'omp allocate'
4918 var-decl attribute to GOMP_alloc/GOMP_free calls.
4920 2023-09-12 xuli <xuli1@eswincomputing.com>
4922 * config/riscv/riscv-vector-builtins-bases.cc: remove unused
4923 parameter e and replace NULL_RTX with gcc_unreachable.
4925 2023-09-12 xuli <xuli1@eswincomputing.com>
4927 * config/riscv/riscv-vector-builtins-bases.cc (class vcreate): New class.
4929 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
4930 * config/riscv/riscv-vector-builtins-functions.def (vcreate): Add vcreate support.
4931 * config/riscv/riscv-vector-builtins-shapes.cc (struct vcreate_def): Ditto.
4933 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
4934 * config/riscv/riscv-vector-builtins.cc: Add args type.
4936 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
4938 * config/riscv/riscv.cc
4939 (riscv_avoid_shrink_wrapping_separate): wrap the condition check in
4940 riscv_avoid_shrink_wrapping_separate.
4941 (riscv_avoid_multi_push):avoid multi push if shrink_wrapping_separate
4943 (riscv_get_separate_components):call riscv_avoid_shrink_wrapping_separate
4945 2023-09-12 Fei Gao <gaofei@eswincomputing.com>
4947 * shrink-wrap.cc (try_shrink_wrapping_separate):call
4948 use_shrink_wrapping_separate.
4949 (use_shrink_wrapping_separate): wrap the condition
4950 check in use_shrink_wrapping_separate.
4951 * shrink-wrap.h (use_shrink_wrapping_separate): add to extern
4953 2023-09-11 Andrew Pinski <apinski@marvell.com>
4955 PR tree-optimization/111348
4956 * match.pd (`(a CMP b) ? minmax<a, c> : minmax<b, c>`): Add :c on
4957 the cmp part of the pattern.
4959 2023-09-11 Uros Bizjak <ubizjak@gmail.com>
4962 * config/i386/i386.cc (output_pic_addr_const): Handle CONST_WIDE_INT.
4963 Call output_addr_const for CASE_CONST_SCALAR_INT.
4965 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4967 * config/riscv/thead.md: Update types
4969 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4971 * config/riscv/riscv.md: Update types
4973 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4975 * config/riscv/riscv.md: Add "zicond" type
4976 * config/riscv/zicond.md: Update types
4978 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4980 * config/riscv/riscv.md: Add "pushpop" and "mvpair" types
4981 * config/riscv/zc.md: Update types
4983 2023-09-11 Edwin Lu <ewlu@rivosinc.com>
4985 * config/riscv/autovec-opt.md: Update types
4986 * config/riscv/autovec.md: likewise
4988 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
4990 * config/s390/s390-builtins.def (s390_vec_signed_flt): Fix
4992 (s390_vec_unsigned_flt): Ditto.
4993 (s390_vec_revb_flt): Ditto.
4994 (s390_vec_reve_flt): Ditto.
4995 (s390_vclfnhs): Fix operand flags.
4996 (s390_vclfnls): Ditto.
4997 (s390_vcrnfs): Ditto.
5001 2023-09-11 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
5003 * config/s390/s390-builtins.def (O_U64): New.
5008 (O_M12): Change bit position.
5019 (OB_DEF_VAR): Add operand constraints.
5021 * config/s390/s390.cc (s390_const_operand_ok): Honour 64 bit
5024 2023-09-11 Andrew Pinski <apinski@marvell.com>
5026 PR tree-optimization/111349
5027 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): Add :c on
5028 the cmp part of the pattern.
5030 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5033 * config/riscv/riscv.opt: Set default as scalable vectorization.
5035 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5037 * config/riscv/riscv-protos.h (get_all_predecessors): Remove.
5038 (get_all_successors): Ditto.
5039 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
5040 (get_all_successors): Ditto.
5042 2023-09-11 Jakub Jelinek <jakub@redhat.com>
5044 PR middle-end/111329
5045 * pretty-print.h (pp_wide_int): Rewrite from macro into inline
5046 function. For printing values which don't fit into digit_buffer
5047 use out-of-line function.
5048 * wide-int-print.h (pp_wide_int_large): Declare.
5049 * wide-int-print.cc: Include pretty-print.h.
5050 (pp_wide_int_large): Define.
5052 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5054 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::global_eliminate_vsetvl_insn):
5055 Use dominance analysis.
5056 (pass_vsetvl::init): Ditto.
5057 (pass_vsetvl::done): Ditto.
5059 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5062 * config/riscv/autovec.md: Add VLS modes.
5063 * config/riscv/riscv-protos.h (cmp_lmul_le_one): New function.
5064 (cmp_lmul_gt_one): Ditto.
5065 * config/riscv/riscv-v.cc (cmp_lmul_le_one): Ditto.
5066 (cmp_lmul_gt_one): Ditto.
5067 * config/riscv/riscv.cc (riscv_print_operand): Add VLS modes.
5068 (riscv_vectorize_vec_perm_const): Ditto.
5069 * config/riscv/vector-iterators.md: Ditto.
5070 * config/riscv/vector.md: Ditto.
5072 2023-09-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5074 * config/riscv/autovec-vls.md (*mov<mode>_vls): New pattern.
5075 * config/riscv/vector-iterators.md: New iterator
5077 2023-09-11 Andrew Pinski <apinski@marvell.com>
5079 PR tree-optimization/111346
5080 * match.pd (`X CMP MINMAX`): Add `:c` on the cmp part
5083 2023-09-11 liuhongt <hongtao.liu@intel.com>
5087 * config/i386/sse.md (int_comm): New int_attr.
5088 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>):
5089 Remove % for Complex conjugate operations since they're not
5091 (fma_<complexpairopname>_<mode>_pair): Ditto.
5092 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
5093 (cmul<conj_op><mode>3): Ditto.
5095 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5097 * config/riscv/riscv-v.cc (shuffle_generic_patterns): Expand
5098 fixed-vlmax/vls vector permutation.
5100 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5102 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Avoid unnecessary slideup.
5104 2023-09-10 Andrew Pinski <apinski@marvell.com>
5106 PR tree-optimization/111331
5107 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`):
5108 Fix the LE/GE comparison to the correct value.
5109 * tree-ssa-phiopt.cc (minmax_replacement):
5110 Fix the LE/GE comparison for the
5111 `(a CMP CST1) ? max<a,CST2> : a` optimization.
5113 2023-09-10 Iain Sandoe <iain@sandoe.co.uk>
5115 * config/darwin.cc (darwin_function_section): Place unlikely
5116 executed global init code into the standard cold section.
5118 2023-09-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5121 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::vsetvl_fusion): Add TDF_DETAILS.
5122 (pass_vsetvl::pre_vsetvl): Ditto.
5123 (pass_vsetvl::init): Ditto.
5124 (pass_vsetvl::lazy_vsetvl): Ditto.
5126 2023-09-09 Lulu Cheng <chenglulu@loongson.cn>
5128 * config/loongarch/loongarch.md (mulsidi3_64bit):
5129 Field unsigned extension support.
5130 (<u>muldi3_highpart): Modify template name.
5131 (<u>mulsi3_highpart): Likewise.
5132 (<u>mulsidi3_64bit): Field unsigned extension support.
5133 (<su>muldi3_highpart): Modify muldi3_highpart to
5135 (<su>mulsi3_highpart): Modify mulsi3_highpart to
5138 2023-09-09 Xi Ruoyao <xry111@xry111.site>
5140 * config/loongarch/loongarch.cc (loongarch_block_move_straight):
5141 Check precondition (delta must be a power of 2) and use
5142 popcount_hwi instead of a homebrew loop.
5144 2023-09-09 Xi Ruoyao <xry111@xry111.site>
5146 * config/loongarch/loongarch.h (LARCH_MAX_MOVE_PER_INSN):
5147 Define to the maximum amount of bytes able to be loaded or
5148 stored with one machine instruction.
5149 * config/loongarch/loongarch.cc (loongarch_mode_for_move_size):
5150 New static function.
5151 (loongarch_block_move_straight): Call
5152 loongarch_mode_for_move_size for machine_mode to be moved.
5153 (loongarch_expand_block_move): Use LARCH_MAX_MOVE_PER_INSN
5154 instead of UNITS_PER_WORD.
5156 2023-09-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5158 * config/riscv/vector-iterators.md: Fix floating-point operations predicate.
5160 2023-09-09 Lehua Ding <lehua.ding@rivai.ai>
5162 * fold-const.cc (can_min_p): New function.
5163 (poly_int_binop): Try fold MIN_EXPR.
5165 2023-09-08 Aldy Hernandez <aldyh@redhat.com>
5167 * range-op-float.cc (foperator_ltgt::fold_range): Do not special
5168 case VREL_EQ nor call frelop_early_resolve.
5170 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5172 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
5174 (*extendhi<SUPERQI:mode>2_th_ext): New INSN.
5175 (*extendqi<SUPERQI:mode>2_th_ext): New INSN.
5177 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5179 * config/riscv/thead.md: Use more appropriate mode attributes
5182 2023-09-08 Guo Jie <guojie@loongson.cn>
5184 * common/config/loongarch/loongarch-common.cc:
5185 (default_options loongarch_option_optimization_table):
5186 Default to -fsched-pressure.
5188 2023-09-08 Yang Yujie <yangyujie@loongson.cn>
5190 * config.gcc: remove non-POSIX syntax "<<<".
5192 2023-09-08 Christoph Müllner <christoph.muellner@vrull.eu>
5194 * config/riscv/bitmanip.md (*extend<SHORT:mode><SUPERQI:mode>2_zbb):
5195 Rename postfix to _bitmanip.
5196 (*extend<SHORT:mode><SUPERQI:mode>2_bitmanip): Renamed pattern.
5197 (*zero_extendhi<GPR:mode>2_zbb): Remove duplicated pattern.
5199 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5201 * config/riscv/riscv.cc (riscv_pass_in_vector_p): Only allow RVV type.
5203 2023-09-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5205 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Fix bug.
5207 2023-09-07 liuhongt <hongtao.liu@intel.com>
5209 * config/i386/sse.md
5210 (<avx512>_vpermt2var<mode>3<sd_maskz_name>): New define_insn.
5211 (VHFBF_AVX512VL): New mode iterator.
5212 (VI2HFBF_AVX512VL): New mode iterator.
5214 2023-09-07 Aldy Hernandez <aldyh@redhat.com>
5216 * value-range.h (contains_zero_p): Return false for undefined ranges.
5217 * range-op-float.cc (operator_gt::op1_op2_relation): Adjust for
5218 contains_zero_p change above.
5219 (operator_ge::op1_op2_relation): Same.
5220 (operator_equal::op1_op2_relation): Same.
5221 (operator_not_equal::op1_op2_relation): Same.
5222 (operator_lt::op1_op2_relation): Same.
5223 (operator_le::op1_op2_relation): Same.
5224 (operator_ge::op1_op2_relation): Same.
5225 * range-op.cc (operator_equal::op1_op2_relation): Same.
5226 (operator_not_equal::op1_op2_relation): Same.
5227 (operator_lt::op1_op2_relation): Same.
5228 (operator_le::op1_op2_relation): Same.
5229 (operator_cast::op1_range): Same.
5230 (set_nonzero_range_from_mask): Same.
5231 (operator_bitwise_xor::op1_range): Same.
5232 (operator_addr_expr::fold_range): Same.
5233 (operator_addr_expr::op1_range): Same.
5235 2023-09-07 Andrew MacLeod <amacleod@redhat.com>
5237 PR tree-optimization/110875
5238 * gimple-range.cc (gimple_ranger::prefill_name): Only invoke
5239 cache-prefilling routine when the ssa-name has no global value.
5241 2023-09-07 Vladimir N. Makarov <vmakarov@redhat.com>
5244 * lra-constraints.cc (goal_reuse_alt_p): New global flag.
5245 (process_alt_operands): Set up the flag. Clear flag for chosen
5246 alternative with special memory constraints.
5247 (process_alt_operands): Set up used insn alternative depending on the flag.
5249 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5251 * config/riscv/autovec-vls.md: Add VLS mask modes mov patterns.
5252 * config/riscv/riscv.md: Ditto.
5253 * config/riscv/vector-iterators.md: Ditto.
5254 * config/riscv/vector.md: Ditto.
5256 2023-09-07 David Malcolm <dmalcolm@redhat.com>
5258 * diagnostic-core.h (error_meta): New decl.
5259 * diagnostic.cc (error_meta): New.
5261 2023-09-07 Jakub Jelinek <jakub@redhat.com>
5264 * expr.cc (expand_expr_real_1): Don't call targetm.c.bitint_type_info
5265 inside gcc_assert, as later code relies on it filling info variable.
5266 * gimple-fold.cc (clear_padding_bitint_needs_padding_p,
5267 clear_padding_type): Likewise.
5268 * varasm.cc (output_constant): Likewise.
5269 * fold-const.cc (native_encode_int, native_interpret_int): Likewise.
5270 * stor-layout.cc (finish_bitfield_representative, layout_type):
5272 * gimple-lower-bitint.cc (bitint_precision_kind): Likewise.
5274 2023-09-07 Xi Ruoyao <xry111@xry111.site>
5277 * config/loongarch/loongarch-protos.h
5278 (loongarch_pre_reload_split): Declare new function.
5279 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
5280 * config/loongarch/loongarch.cc
5281 (loongarch_pre_reload_split): Implement.
5282 (loongarch_use_bstrins_for_ior_with_mask): Likewise.
5283 * config/loongarch/predicates.md (ins_zero_bitmask_operand):
5285 * config/loongarch/loongarch.md (bstrins_<mode>_for_mask):
5286 New define_insn_and_split.
5287 (bstrins_<mode>_for_ior_mask): Likewise.
5288 (define_peephole2): Further optimize code sequence produced by
5289 bstrins_<mode>_for_ior_mask if possible.
5291 2023-09-07 Richard Sandiford <richard.sandiford@arm.com>
5293 * lra-eliminations.cc (lra_eliminate_regs_1): Use simplify_gen_binary
5294 rather than gen_rtx_PLUS.
5296 2023-09-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5299 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_earliest_vsetvls): Remove.
5300 (pass_vsetvl::df_post_optimization): Remove incorrect function.
5302 2023-09-07 Tsukasa OI <research_trasio@irq.a4lg.com>
5304 * common/config/riscv/riscv-common.cc (riscv_ext_flag_table):
5305 Parse 'XVentanaCondOps' extension.
5306 * config/riscv/riscv-opts.h (MASK_XVENTANACONDOPS): New.
5307 (TARGET_XVENTANACONDOPS): Ditto.
5308 (TARGET_ZICOND_LIKE): New to represent targets with conditional
5309 moves like 'Zicond'. It includes RV64 + 'XVentanaCondOps'.
5310 * config/riscv/riscv.cc (riscv_rtx_costs): Replace TARGET_ZICOND
5311 with TARGET_ZICOND_LIKE.
5312 (riscv_expand_conditional_move): Ditto.
5313 * config/riscv/riscv.md (mov<mode>cc): Replace TARGET_ZICOND with
5315 * config/riscv/riscv.opt: Add new riscv_xventana_subext.
5316 * config/riscv/zicond.md: Modify description.
5317 (eqz_ventana): New to match corresponding czero instructions.
5318 (nez_ventana): Ditto.
5319 (*czero.<eqz>.<GPR><X>): Emit a 'XVentanaCondOps' instruction if
5320 'Zicond' is not available but 'XVentanaCondOps' + RV64 is.
5321 (*czero.<eqz>.<GPR><X>): Ditto.
5322 (*czero.eqz.<GPR><X>.opt1): Ditto.
5323 (*czero.nez.<GPR><X>.opt2): Ditto.
5325 2023-09-06 Ian Lance Taylor <iant@golang.org>
5328 * godump.cc (go_format_type): Handle BITINT_TYPE.
5330 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5333 * tree.cc (build_one_cst, build_minus_one_cst): Handle BITINT_TYPE
5336 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5339 * gimple-lower-bitint.cc (bitint_large_huge::if_then_else,
5340 bitint_large_huge::if_then_if_then_else): Use make_single_succ_edge
5341 rather than make_edge, initialize bb->count.
5343 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5346 * doc/libgcc.texi (Bit-precise integer arithmetic functions):
5347 Document general rules for _BitInt support library functions
5348 and document __mulbitint3 and __divmodbitint4.
5349 (Conversion functions): Document __fix{s,d,x,t}fbitint,
5350 __floatbitint{s,d,x,t,h,b}f, __bid_fix{s,d,t}dbitint and
5351 __bid_floatbitint{s,d,t}d.
5353 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5356 * glimits.h (BITINT_MAXWIDTH): Define if __BITINT_MAXWIDTH__ is
5359 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5362 * internal-fn.cc (expand_ubsan_result_store): Add LHS, MODE and
5363 DO_ERROR arguments. For non-mode precision BITINT_TYPE results
5364 check if all padding bits up to mode precision are zeros or sign
5365 bit copies and if not, jump to DO_ERROR.
5366 (expand_addsub_overflow, expand_neg_overflow, expand_mul_overflow):
5367 Adjust expand_ubsan_result_store callers.
5368 * ubsan.cc: Include target.h and langhooks.h.
5369 (ubsan_encode_value): Pass BITINT_TYPE values which fit into pointer
5370 size converted to pointer sized integer, pass BITINT_TYPE values
5371 which fit into TImode (if supported) or DImode as those integer types
5372 or otherwise for now punt (pass 0).
5373 (ubsan_type_descriptor): Handle BITINT_TYPE. For pstyle of
5374 UBSAN_PRINT_FORCE_INT use TK_Integer (0x0000) mode with a
5375 TImode/DImode precision rather than TK_Unknown used otherwise for
5376 large/huge BITINT_TYPEs.
5377 (instrument_si_overflow): Instrument BITINT_TYPE operations even when
5378 they don't have mode precision.
5379 * ubsan.h (enum ubsan_print_style): New enumerator.
5381 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5384 * config/i386/i386.cc (classify_argument): Handle BITINT_TYPE.
5385 (ix86_bitint_type_info): New function.
5386 (TARGET_C_BITINT_TYPE_INFO): Redefine.
5388 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5391 * Makefile.in (OBJS): Add gimple-lower-bitint.o.
5392 * passes.def: Add pass_lower_bitint after pass_lower_complex and
5393 pass_lower_bitint_O0 after pass_lower_complex_O0.
5394 * tree-pass.h (PROP_gimple_lbitint): Define.
5395 (make_pass_lower_bitint_O0, make_pass_lower_bitint): Declare.
5396 * gimple-lower-bitint.h: New file.
5397 * tree-ssa-live.h (struct _var_map): Add bitint member.
5398 (init_var_map): Adjust declaration.
5399 (region_contains_p): Handle map->bitint like map->outofssa_p.
5400 * tree-ssa-live.cc (init_var_map): Add BITINT argument, initialize
5401 map->bitint and set map->outofssa_p to false if it is non-NULL.
5402 * tree-ssa-coalesce.cc: Include gimple-lower-bitint.h.
5403 (build_ssa_conflict_graph): Call build_bitint_stmt_ssa_conflicts if
5405 (create_coalesce_list_for_region): For map->bitint ignore SSA_NAMEs
5406 not in that bitmap, and allow res without default def.
5407 (compute_optimized_partition_bases): In map->bitint mode try hard to
5408 coalesce any SSA_NAMEs with the same size.
5409 (coalesce_bitint): New function.
5410 (coalesce_ssa_name): In map->bitint mode, or map->bitmap into
5411 used_in_copies and call coalesce_bitint.
5412 * gimple-lower-bitint.cc: New file.
5414 2023-09-06 Jakub Jelinek <jakub@redhat.com>
5417 * tree.def (BITINT_TYPE): New type.
5418 * tree.h (TREE_CHECK6, TREE_NOT_CHECK6): Define.
5419 (NUMERICAL_TYPE_CHECK, INTEGRAL_TYPE_P): Include
5421 (BITINT_TYPE_P): Define.
5422 (CONSTRUCTOR_BITFIELD_P): Return true even for BLKmode bit-fields if
5423 they have BITINT_TYPE type.
5424 (tree_check6, tree_not_check6): New inline functions.
5425 (any_integral_type_check): Include BITINT_TYPE.
5426 (build_bitint_type): Declare.
5427 * tree.cc (tree_code_size, wide_int_to_tree_1, cache_integer_cst,
5428 build_zero_cst, type_hash_canon_hash, type_cache_hasher::equal,
5429 type_hash_canon): Handle BITINT_TYPE.
5430 (bitint_type_cache): New variable.
5431 (build_bitint_type): New function.
5432 (signed_or_unsigned_type_for, verify_type_variant, verify_type):
5434 (tree_cc_finalize): Free bitint_type_cache.
5435 * builtins.cc (type_to_class): Handle BITINT_TYPE.
5436 (fold_builtin_unordered_cmp): Handle BITINT_TYPE like INTEGER_TYPE.
5437 * cfgexpand.cc (expand_debug_expr): Punt on BLKmode BITINT_TYPE
5439 * convert.cc (convert_to_pointer_1, convert_to_real_1,
5440 convert_to_complex_1): Handle BITINT_TYPE like INTEGER_TYPE.
5441 (convert_to_integer_1): Likewise. For BITINT_TYPE don't check
5442 GET_MODE_PRECISION (TYPE_MODE (type)).
5443 * doc/generic.texi (BITINT_TYPE): Document.
5444 * doc/tm.texi.in (TARGET_C_BITINT_TYPE_INFO): New.
5445 * doc/tm.texi: Regenerated.
5446 * dwarf2out.cc (base_type_die, is_base_type, modified_type_die,
5447 gen_type_die_with_usage): Handle BITINT_TYPE.
5448 (rtl_for_decl_init): Punt on BLKmode BITINT_TYPE INTEGER_CSTs or
5449 handle those which fit into shwi.
5450 * expr.cc (expand_expr_real_1): Define EXTEND_BITINT macro, reduce
5451 to bitfield precision reads from BITINT_TYPE vars, parameters or
5452 memory locations. Expand large/huge BITINT_TYPE INTEGER_CSTs into
5454 * fold-const.cc (fold_convert_loc, make_range_step): Handle
5456 (extract_muldiv_1): For BITINT_TYPE use TYPE_PRECISION rather than
5457 GET_MODE_SIZE (SCALAR_INT_TYPE_MODE).
5458 (native_encode_int, native_interpret_int, native_interpret_expr):
5460 * gimple-expr.cc (useless_type_conversion_p): Make BITINT_TYPE
5461 to some other integral type or vice versa conversions non-useless.
5462 * gimple-fold.cc (gimple_fold_builtin_memset): Punt for BITINT_TYPE.
5463 (clear_padding_unit): Mention in comment that _BitInt types don't need
5465 (clear_padding_bitint_needs_padding_p): New function.
5466 (clear_padding_type_may_have_padding_p): Handle BITINT_TYPE.
5467 (clear_padding_type): Likewise.
5468 * internal-fn.cc (expand_mul_overflow): For unsigned non-mode
5469 precision operands force pos_neg? to 1.
5470 (expand_MULBITINT, expand_DIVMODBITINT, expand_FLOATTOBITINT,
5471 expand_BITINTTOFLOAT): New functions.
5472 * internal-fn.def (MULBITINT, DIVMODBITINT, FLOATTOBITINT,
5473 BITINTTOFLOAT): New internal functions.
5474 * internal-fn.h (expand_MULBITINT, expand_DIVMODBITINT,
5475 expand_FLOATTOBITINT, expand_BITINTTOFLOAT): Declare.
5476 * match.pd (non-equality compare simplifications from fold_binary):
5477 Punt if TYPE_MODE (arg1_type) is BLKmode.
5478 * pretty-print.h (pp_wide_int): Handle printing of large precision
5479 wide_ints which would buffer overflow digit_buffer.
5480 * stor-layout.cc (finish_bitfield_representative): For bit-fields
5481 with BITINT_TYPE, prefer representatives with precisions in
5482 multiple of limb precision.
5483 (layout_type): Handle BITINT_TYPE. Handle COMPLEX_TYPE with BLKmode
5484 element type and assert it is BITINT_TYPE.
5485 * target.def (bitint_type_info): New C target hook.
5486 * target.h (struct bitint_info): New type.
5487 * targhooks.cc (default_bitint_type_info): New function.
5488 * targhooks.h (default_bitint_type_info): Declare.
5489 * tree-pretty-print.cc (dump_generic_node): Handle BITINT_TYPE.
5490 Handle printing large wide_ints which would buffer overflow
5492 * tree-ssa-sccvn.cc: Include target.h.
5493 (eliminate_dom_walker::eliminate_stmt): Punt for large/huge
5495 * tree-switch-conversion.cc (jump_table_cluster::emit): For more than
5496 64-bit BITINT_TYPE subtract low bound from expression and cast to
5497 64-bit integer type both the controlling expression and case labels.
5498 * typeclass.h (enum type_class): Add bitint_type_class enumerator.
5499 * varasm.cc (output_constant): Handle BITINT_TYPE INTEGER_CSTs.
5500 * vr-values.cc (check_for_binary_op_overflow): Use widest2_int rather
5502 (simplify_using_ranges::simplify_internal_call_using_ranges): Use
5503 unsigned_type_for rather than build_nonstandard_integer_type.
5505 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5508 * config/riscv/riscv.cc (riscv_modes_tieable_p): Fix incorrect mode
5509 tieable for RVV modes.
5511 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5514 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Bug fix.
5516 2023-09-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
5518 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Remove TARGET_64BIT
5520 2023-09-06 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
5522 * config/xtensa/xtensa.cc (xtensa_expand_scc):
5523 Add code for particular constants (only 0 and INT_MIN for now)
5524 for EQ/NE boolean evaluation in SImode.
5525 * config/xtensa/xtensa.md (*eqne_INT_MIN): Remove because its
5526 implementation has been integrated into the above.
5528 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5531 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>):
5533 (*pred_widen_mulsu<mode>): Delete.
5534 (*pred_single_widen_mul<mode>): Delete.
5535 (*dual_widen_<any_widen_binop:optab><any_extend:su><mode>):
5536 Add new combine patterns.
5537 (*single_widen_sub<any_extend:su><mode>): Ditto.
5538 (*single_widen_add<any_extend:su><mode>): Ditto.
5539 (*single_widen_mult<any_extend:su><mode>): Ditto.
5540 (*dual_widen_mulsu<mode>): Ditto.
5541 (*dual_widen_mulus<mode>): Ditto.
5542 (*dual_widen_<optab><mode>): Ditto.
5543 (*single_widen_add<mode>): Ditto.
5544 (*single_widen_sub<mode>): Ditto.
5545 (*single_widen_mult<mode>): Ditto.
5546 * config/riscv/autovec.md (<optab><mode>3):
5547 Change define_expand to define_insn_and_split.
5548 (<optab><mode>2): Ditto.
5549 (abs<mode>2): Ditto.
5550 (smul<mode>3_highpart): Ditto.
5551 (umul<mode>3_highpart): Ditto.
5553 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5555 * config/riscv/riscv-protos.h (riscv_declare_function_name): Add protos.
5556 (riscv_asm_output_alias): Ditto.
5557 (riscv_asm_output_external): Ditto.
5558 * config/riscv/riscv.cc (riscv_asm_output_variant_cc):
5559 Output .variant_cc directive for vector function.
5560 (riscv_declare_function_name): Ditto.
5561 (riscv_asm_output_alias): Ditto.
5562 (riscv_asm_output_external): Ditto.
5563 * config/riscv/riscv.h (ASM_DECLARE_FUNCTION_NAME):
5564 Implement ASM_DECLARE_FUNCTION_NAME.
5565 (ASM_OUTPUT_DEF_FROM_DECLS): Implement ASM_OUTPUT_DEF_FROM_DECLS.
5566 (ASM_OUTPUT_EXTERNAL): Implement ASM_OUTPUT_EXTERNAL.
5568 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5570 * config/riscv/riscv-sr.cc (riscv_remove_unneeded_save_restore_calls): Pass riscv_cc.
5571 * config/riscv/riscv.cc (struct riscv_frame_info): Add new fileds.
5572 (riscv_frame_info::reset): Reset new fileds.
5573 (riscv_call_tls_get_addr): Pass riscv_cc.
5574 (riscv_function_arg): Return riscv_cc for call patterm.
5575 (get_riscv_cc): New function return riscv_cc from rtl call_insn.
5576 (riscv_insn_callee_abi): Implement TARGET_INSN_CALLEE_ABI.
5577 (riscv_save_reg_p): Add vector callee-saved check.
5578 (riscv_stack_align): Add vector save area comment.
5579 (riscv_compute_frame_info): Ditto.
5580 (riscv_restore_reg): Update for type change.
5581 (riscv_for_each_saved_v_reg): New function save vector registers.
5582 (riscv_first_stack_step): Handle funciton with vector callee-saved registers.
5583 (riscv_expand_prologue): Ditto.
5584 (riscv_expand_epilogue): Ditto.
5585 (riscv_output_mi_thunk): Pass riscv_cc.
5586 (TARGET_INSN_CALLEE_ABI): Implement TARGET_INSN_CALLEE_ABI.
5587 * config/riscv/riscv.h (get_riscv_cc): Export get_riscv_cc function.
5588 * config/riscv/riscv.md: Add CALLEE_CC operand for call pattern.
5590 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5592 * config/riscv/riscv-protos.h (builtin_type_p): New function for checking vector type.
5593 * config/riscv/riscv-vector-builtins.cc (builtin_type_p): Ditto.
5594 * config/riscv/riscv.cc (struct riscv_arg_info): New fields.
5595 (riscv_init_cumulative_args): Setup variant_cc field.
5596 (riscv_vector_type_p): New function for checking vector type.
5597 (riscv_hard_regno_nregs): Hoist declare.
5598 (riscv_get_vector_arg): Subroutine of riscv_get_arg_info.
5599 (riscv_get_arg_info): Support vector cc.
5600 (riscv_function_arg_advance): Update cum.
5601 (riscv_pass_by_reference): Handle vector args.
5602 (riscv_v_abi): New function return vector abi.
5603 (riscv_return_value_is_vector_type_p): New function for check vector arguments.
5604 (riscv_arguments_is_vector_type_p): New function for check vector returns.
5605 (riscv_fntype_abi): Implement TARGET_FNTYPE_ABI.
5606 (TARGET_FNTYPE_ABI): Implement TARGET_FNTYPE_ABI.
5607 * config/riscv/riscv.h (GCC_RISCV_H): Define macros for vector abi.
5608 (MAX_ARGS_IN_VECTOR_REGISTERS): Ditto.
5609 (MAX_ARGS_IN_MASK_REGISTERS): Ditto.
5610 (V_ARG_FIRST): Ditto.
5611 (V_ARG_LAST): Ditto.
5612 (enum riscv_cc): Define all RISCV_CC variants.
5613 * config/riscv/riscv.opt: Add --param=riscv-vector-abi.
5615 2023-09-06 Lehua Ding <lehua.ding@rivai.ai>
5617 * config/riscv/autovec-opt.md (*cond_<optab><mode>):
5618 Add sqrt + vcond_mask combine pattern.
5619 * config/riscv/autovec.md (<optab><mode>2):
5620 Change define_expand to define_insn_and_split.
5622 2023-09-06 Jason Merrill <jason@redhat.com>
5624 * common.opt: Update -fabi-version=19.
5626 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
5628 * config/riscv/zicond.md: Add closing parent to a comment.
5630 2023-09-06 Tsukasa OI <research_trasio@irq.a4lg.com>
5632 * config/riscv/riscv.cc (riscv_expand_conditional_move): Force
5633 large constant cons/alt into a register.
5635 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
5637 * config/riscv/riscv.cc (riscv_build_integer_1): Don't
5638 require one zero bit in the upper 32 bits for LI+RORI synthesis.
5640 2023-09-05 Jeff Law <jlaw@ventanamicro.com>
5642 * config/riscv/bitmanip.md (bswapsi2): Expose for TARGET_64BIT.
5644 2023-09-05 Andrew Pinski <apinski@marvell.com>
5646 PR tree-optimization/98710
5647 * match.pd (`(x | c) & ~(y | c)`, `(x & c) | ~(y & c)`): New pattern.
5648 (`x & ~(y | x)`, `x | ~(y & x)`): New patterns.
5650 2023-09-05 Andrew Pinski <apinski@marvell.com>
5652 PR tree-optimization/103536
5653 * match.pd (`(x | y) & (x & z)`,
5654 `(x & y) | (x | z)`): New patterns.
5656 2023-09-05 Andrew Pinski <apinski@marvell.com>
5658 PR tree-optimization/107137
5659 * match.pd (`(nop_convert)-(convert)a`): New pattern.
5661 2023-09-05 Andrew Pinski <apinski@marvell.com>
5663 PR tree-optimization/96694
5664 * match.pd (`~MAX(~X, Y)`, `~MIN(~X, Y)`): New patterns.
5666 2023-09-05 Andrew Pinski <apinski@marvell.com>
5668 PR tree-optimization/105832
5669 * match.pd (`(1 >> X) != 0`): New pattern
5671 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
5673 * config/riscv/riscv.md: Update/Add types
5675 2023-09-05 Edwin Lu <ewlu@rivosinc.com>
5677 * config/riscv/pic.md: Update types
5679 2023-09-05 Christoph Müllner <christoph.muellner@vrull.eu>
5681 * config/riscv/riscv.cc (riscv_build_integer_1): Enable constant
5682 synthesis with rotate-right for XTheadBb.
5684 2023-09-05 Vineet Gupta <vineetg@rivosinc.com>
5686 * config/riscv/zicond.md: Fix op2 pattern.
5688 2023-09-05 Szabolcs Nagy <szabolcs.nagy@arm.com>
5690 * config/aarch64/aarch64.h (AARCH64_ISA_RCPC): Remove dup.
5692 2023-09-05 Xi Ruoyao <xry111@xry111.site>
5694 * config/loongarch/loongarch-opts.h (HAVE_AS_EXPLICIT_RELOCS):
5695 Define to 0 if not defined yet.
5697 2023-09-05 Kito Cheng <kito.cheng@sifive.com>
5699 * config/riscv/linux.h (TARGET_ASM_FILE_END): Move ...
5700 * config/riscv/riscv.cc (TARGET_ASM_FILE_END): to here.
5702 2023-09-05 Pan Li <pan2.li@intel.com>
5704 * config/riscv/autovec-vls.md (copysign<mode>3): New pattern.
5705 * config/riscv/vector.md: Extend iterator for VLS.
5707 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5709 * config.gcc: Export the header file lasxintrin.h.
5710 * config/loongarch/loongarch-builtins.cc (enum loongarch_builtin_type):
5711 Add Loongson ASX builtin functions support.
5713 (LASX_BUILTIN): Ditto.
5714 (LASX_NO_TARGET_BUILTIN): Ditto.
5715 (LASX_BUILTIN_TEST_BRANCH): Ditto.
5716 (CODE_FOR_lasx_xvsadd_b): Ditto.
5717 (CODE_FOR_lasx_xvsadd_h): Ditto.
5718 (CODE_FOR_lasx_xvsadd_w): Ditto.
5719 (CODE_FOR_lasx_xvsadd_d): Ditto.
5720 (CODE_FOR_lasx_xvsadd_bu): Ditto.
5721 (CODE_FOR_lasx_xvsadd_hu): Ditto.
5722 (CODE_FOR_lasx_xvsadd_wu): Ditto.
5723 (CODE_FOR_lasx_xvsadd_du): Ditto.
5724 (CODE_FOR_lasx_xvadd_b): Ditto.
5725 (CODE_FOR_lasx_xvadd_h): Ditto.
5726 (CODE_FOR_lasx_xvadd_w): Ditto.
5727 (CODE_FOR_lasx_xvadd_d): Ditto.
5728 (CODE_FOR_lasx_xvaddi_bu): Ditto.
5729 (CODE_FOR_lasx_xvaddi_hu): Ditto.
5730 (CODE_FOR_lasx_xvaddi_wu): Ditto.
5731 (CODE_FOR_lasx_xvaddi_du): Ditto.
5732 (CODE_FOR_lasx_xvand_v): Ditto.
5733 (CODE_FOR_lasx_xvandi_b): Ditto.
5734 (CODE_FOR_lasx_xvbitsel_v): Ditto.
5735 (CODE_FOR_lasx_xvseqi_b): Ditto.
5736 (CODE_FOR_lasx_xvseqi_h): Ditto.
5737 (CODE_FOR_lasx_xvseqi_w): Ditto.
5738 (CODE_FOR_lasx_xvseqi_d): Ditto.
5739 (CODE_FOR_lasx_xvslti_b): Ditto.
5740 (CODE_FOR_lasx_xvslti_h): Ditto.
5741 (CODE_FOR_lasx_xvslti_w): Ditto.
5742 (CODE_FOR_lasx_xvslti_d): Ditto.
5743 (CODE_FOR_lasx_xvslti_bu): Ditto.
5744 (CODE_FOR_lasx_xvslti_hu): Ditto.
5745 (CODE_FOR_lasx_xvslti_wu): Ditto.
5746 (CODE_FOR_lasx_xvslti_du): Ditto.
5747 (CODE_FOR_lasx_xvslei_b): Ditto.
5748 (CODE_FOR_lasx_xvslei_h): Ditto.
5749 (CODE_FOR_lasx_xvslei_w): Ditto.
5750 (CODE_FOR_lasx_xvslei_d): Ditto.
5751 (CODE_FOR_lasx_xvslei_bu): Ditto.
5752 (CODE_FOR_lasx_xvslei_hu): Ditto.
5753 (CODE_FOR_lasx_xvslei_wu): Ditto.
5754 (CODE_FOR_lasx_xvslei_du): Ditto.
5755 (CODE_FOR_lasx_xvdiv_b): Ditto.
5756 (CODE_FOR_lasx_xvdiv_h): Ditto.
5757 (CODE_FOR_lasx_xvdiv_w): Ditto.
5758 (CODE_FOR_lasx_xvdiv_d): Ditto.
5759 (CODE_FOR_lasx_xvdiv_bu): Ditto.
5760 (CODE_FOR_lasx_xvdiv_hu): Ditto.
5761 (CODE_FOR_lasx_xvdiv_wu): Ditto.
5762 (CODE_FOR_lasx_xvdiv_du): Ditto.
5763 (CODE_FOR_lasx_xvfadd_s): Ditto.
5764 (CODE_FOR_lasx_xvfadd_d): Ditto.
5765 (CODE_FOR_lasx_xvftintrz_w_s): Ditto.
5766 (CODE_FOR_lasx_xvftintrz_l_d): Ditto.
5767 (CODE_FOR_lasx_xvftintrz_wu_s): Ditto.
5768 (CODE_FOR_lasx_xvftintrz_lu_d): Ditto.
5769 (CODE_FOR_lasx_xvffint_s_w): Ditto.
5770 (CODE_FOR_lasx_xvffint_d_l): Ditto.
5771 (CODE_FOR_lasx_xvffint_s_wu): Ditto.
5772 (CODE_FOR_lasx_xvffint_d_lu): Ditto.
5773 (CODE_FOR_lasx_xvfsub_s): Ditto.
5774 (CODE_FOR_lasx_xvfsub_d): Ditto.
5775 (CODE_FOR_lasx_xvfmul_s): Ditto.
5776 (CODE_FOR_lasx_xvfmul_d): Ditto.
5777 (CODE_FOR_lasx_xvfdiv_s): Ditto.
5778 (CODE_FOR_lasx_xvfdiv_d): Ditto.
5779 (CODE_FOR_lasx_xvfmax_s): Ditto.
5780 (CODE_FOR_lasx_xvfmax_d): Ditto.
5781 (CODE_FOR_lasx_xvfmin_s): Ditto.
5782 (CODE_FOR_lasx_xvfmin_d): Ditto.
5783 (CODE_FOR_lasx_xvfsqrt_s): Ditto.
5784 (CODE_FOR_lasx_xvfsqrt_d): Ditto.
5785 (CODE_FOR_lasx_xvflogb_s): Ditto.
5786 (CODE_FOR_lasx_xvflogb_d): Ditto.
5787 (CODE_FOR_lasx_xvmax_b): Ditto.
5788 (CODE_FOR_lasx_xvmax_h): Ditto.
5789 (CODE_FOR_lasx_xvmax_w): Ditto.
5790 (CODE_FOR_lasx_xvmax_d): Ditto.
5791 (CODE_FOR_lasx_xvmaxi_b): Ditto.
5792 (CODE_FOR_lasx_xvmaxi_h): Ditto.
5793 (CODE_FOR_lasx_xvmaxi_w): Ditto.
5794 (CODE_FOR_lasx_xvmaxi_d): Ditto.
5795 (CODE_FOR_lasx_xvmax_bu): Ditto.
5796 (CODE_FOR_lasx_xvmax_hu): Ditto.
5797 (CODE_FOR_lasx_xvmax_wu): Ditto.
5798 (CODE_FOR_lasx_xvmax_du): Ditto.
5799 (CODE_FOR_lasx_xvmaxi_bu): Ditto.
5800 (CODE_FOR_lasx_xvmaxi_hu): Ditto.
5801 (CODE_FOR_lasx_xvmaxi_wu): Ditto.
5802 (CODE_FOR_lasx_xvmaxi_du): Ditto.
5803 (CODE_FOR_lasx_xvmin_b): Ditto.
5804 (CODE_FOR_lasx_xvmin_h): Ditto.
5805 (CODE_FOR_lasx_xvmin_w): Ditto.
5806 (CODE_FOR_lasx_xvmin_d): Ditto.
5807 (CODE_FOR_lasx_xvmini_b): Ditto.
5808 (CODE_FOR_lasx_xvmini_h): Ditto.
5809 (CODE_FOR_lasx_xvmini_w): Ditto.
5810 (CODE_FOR_lasx_xvmini_d): Ditto.
5811 (CODE_FOR_lasx_xvmin_bu): Ditto.
5812 (CODE_FOR_lasx_xvmin_hu): Ditto.
5813 (CODE_FOR_lasx_xvmin_wu): Ditto.
5814 (CODE_FOR_lasx_xvmin_du): Ditto.
5815 (CODE_FOR_lasx_xvmini_bu): Ditto.
5816 (CODE_FOR_lasx_xvmini_hu): Ditto.
5817 (CODE_FOR_lasx_xvmini_wu): Ditto.
5818 (CODE_FOR_lasx_xvmini_du): Ditto.
5819 (CODE_FOR_lasx_xvmod_b): Ditto.
5820 (CODE_FOR_lasx_xvmod_h): Ditto.
5821 (CODE_FOR_lasx_xvmod_w): Ditto.
5822 (CODE_FOR_lasx_xvmod_d): Ditto.
5823 (CODE_FOR_lasx_xvmod_bu): Ditto.
5824 (CODE_FOR_lasx_xvmod_hu): Ditto.
5825 (CODE_FOR_lasx_xvmod_wu): Ditto.
5826 (CODE_FOR_lasx_xvmod_du): Ditto.
5827 (CODE_FOR_lasx_xvmul_b): Ditto.
5828 (CODE_FOR_lasx_xvmul_h): Ditto.
5829 (CODE_FOR_lasx_xvmul_w): Ditto.
5830 (CODE_FOR_lasx_xvmul_d): Ditto.
5831 (CODE_FOR_lasx_xvclz_b): Ditto.
5832 (CODE_FOR_lasx_xvclz_h): Ditto.
5833 (CODE_FOR_lasx_xvclz_w): Ditto.
5834 (CODE_FOR_lasx_xvclz_d): Ditto.
5835 (CODE_FOR_lasx_xvnor_v): Ditto.
5836 (CODE_FOR_lasx_xvor_v): Ditto.
5837 (CODE_FOR_lasx_xvori_b): Ditto.
5838 (CODE_FOR_lasx_xvnori_b): Ditto.
5839 (CODE_FOR_lasx_xvpcnt_b): Ditto.
5840 (CODE_FOR_lasx_xvpcnt_h): Ditto.
5841 (CODE_FOR_lasx_xvpcnt_w): Ditto.
5842 (CODE_FOR_lasx_xvpcnt_d): Ditto.
5843 (CODE_FOR_lasx_xvxor_v): Ditto.
5844 (CODE_FOR_lasx_xvxori_b): Ditto.
5845 (CODE_FOR_lasx_xvsll_b): Ditto.
5846 (CODE_FOR_lasx_xvsll_h): Ditto.
5847 (CODE_FOR_lasx_xvsll_w): Ditto.
5848 (CODE_FOR_lasx_xvsll_d): Ditto.
5849 (CODE_FOR_lasx_xvslli_b): Ditto.
5850 (CODE_FOR_lasx_xvslli_h): Ditto.
5851 (CODE_FOR_lasx_xvslli_w): Ditto.
5852 (CODE_FOR_lasx_xvslli_d): Ditto.
5853 (CODE_FOR_lasx_xvsra_b): Ditto.
5854 (CODE_FOR_lasx_xvsra_h): Ditto.
5855 (CODE_FOR_lasx_xvsra_w): Ditto.
5856 (CODE_FOR_lasx_xvsra_d): Ditto.
5857 (CODE_FOR_lasx_xvsrai_b): Ditto.
5858 (CODE_FOR_lasx_xvsrai_h): Ditto.
5859 (CODE_FOR_lasx_xvsrai_w): Ditto.
5860 (CODE_FOR_lasx_xvsrai_d): Ditto.
5861 (CODE_FOR_lasx_xvsrl_b): Ditto.
5862 (CODE_FOR_lasx_xvsrl_h): Ditto.
5863 (CODE_FOR_lasx_xvsrl_w): Ditto.
5864 (CODE_FOR_lasx_xvsrl_d): Ditto.
5865 (CODE_FOR_lasx_xvsrli_b): Ditto.
5866 (CODE_FOR_lasx_xvsrli_h): Ditto.
5867 (CODE_FOR_lasx_xvsrli_w): Ditto.
5868 (CODE_FOR_lasx_xvsrli_d): Ditto.
5869 (CODE_FOR_lasx_xvsub_b): Ditto.
5870 (CODE_FOR_lasx_xvsub_h): Ditto.
5871 (CODE_FOR_lasx_xvsub_w): Ditto.
5872 (CODE_FOR_lasx_xvsub_d): Ditto.
5873 (CODE_FOR_lasx_xvsubi_bu): Ditto.
5874 (CODE_FOR_lasx_xvsubi_hu): Ditto.
5875 (CODE_FOR_lasx_xvsubi_wu): Ditto.
5876 (CODE_FOR_lasx_xvsubi_du): Ditto.
5877 (CODE_FOR_lasx_xvpackod_d): Ditto.
5878 (CODE_FOR_lasx_xvpackev_d): Ditto.
5879 (CODE_FOR_lasx_xvpickod_d): Ditto.
5880 (CODE_FOR_lasx_xvpickev_d): Ditto.
5881 (CODE_FOR_lasx_xvrepli_b): Ditto.
5882 (CODE_FOR_lasx_xvrepli_h): Ditto.
5883 (CODE_FOR_lasx_xvrepli_w): Ditto.
5884 (CODE_FOR_lasx_xvrepli_d): Ditto.
5885 (CODE_FOR_lasx_xvandn_v): Ditto.
5886 (CODE_FOR_lasx_xvorn_v): Ditto.
5887 (CODE_FOR_lasx_xvneg_b): Ditto.
5888 (CODE_FOR_lasx_xvneg_h): Ditto.
5889 (CODE_FOR_lasx_xvneg_w): Ditto.
5890 (CODE_FOR_lasx_xvneg_d): Ditto.
5891 (CODE_FOR_lasx_xvbsrl_v): Ditto.
5892 (CODE_FOR_lasx_xvbsll_v): Ditto.
5893 (CODE_FOR_lasx_xvfmadd_s): Ditto.
5894 (CODE_FOR_lasx_xvfmadd_d): Ditto.
5895 (CODE_FOR_lasx_xvfmsub_s): Ditto.
5896 (CODE_FOR_lasx_xvfmsub_d): Ditto.
5897 (CODE_FOR_lasx_xvfnmadd_s): Ditto.
5898 (CODE_FOR_lasx_xvfnmadd_d): Ditto.
5899 (CODE_FOR_lasx_xvfnmsub_s): Ditto.
5900 (CODE_FOR_lasx_xvfnmsub_d): Ditto.
5901 (CODE_FOR_lasx_xvpermi_q): Ditto.
5902 (CODE_FOR_lasx_xvpermi_d): Ditto.
5903 (CODE_FOR_lasx_xbnz_v): Ditto.
5904 (CODE_FOR_lasx_xbz_v): Ditto.
5905 (CODE_FOR_lasx_xvssub_b): Ditto.
5906 (CODE_FOR_lasx_xvssub_h): Ditto.
5907 (CODE_FOR_lasx_xvssub_w): Ditto.
5908 (CODE_FOR_lasx_xvssub_d): Ditto.
5909 (CODE_FOR_lasx_xvssub_bu): Ditto.
5910 (CODE_FOR_lasx_xvssub_hu): Ditto.
5911 (CODE_FOR_lasx_xvssub_wu): Ditto.
5912 (CODE_FOR_lasx_xvssub_du): Ditto.
5913 (CODE_FOR_lasx_xvabsd_b): Ditto.
5914 (CODE_FOR_lasx_xvabsd_h): Ditto.
5915 (CODE_FOR_lasx_xvabsd_w): Ditto.
5916 (CODE_FOR_lasx_xvabsd_d): Ditto.
5917 (CODE_FOR_lasx_xvabsd_bu): Ditto.
5918 (CODE_FOR_lasx_xvabsd_hu): Ditto.
5919 (CODE_FOR_lasx_xvabsd_wu): Ditto.
5920 (CODE_FOR_lasx_xvabsd_du): Ditto.
5921 (CODE_FOR_lasx_xvavg_b): Ditto.
5922 (CODE_FOR_lasx_xvavg_h): Ditto.
5923 (CODE_FOR_lasx_xvavg_w): Ditto.
5924 (CODE_FOR_lasx_xvavg_d): Ditto.
5925 (CODE_FOR_lasx_xvavg_bu): Ditto.
5926 (CODE_FOR_lasx_xvavg_hu): Ditto.
5927 (CODE_FOR_lasx_xvavg_wu): Ditto.
5928 (CODE_FOR_lasx_xvavg_du): Ditto.
5929 (CODE_FOR_lasx_xvavgr_b): Ditto.
5930 (CODE_FOR_lasx_xvavgr_h): Ditto.
5931 (CODE_FOR_lasx_xvavgr_w): Ditto.
5932 (CODE_FOR_lasx_xvavgr_d): Ditto.
5933 (CODE_FOR_lasx_xvavgr_bu): Ditto.
5934 (CODE_FOR_lasx_xvavgr_hu): Ditto.
5935 (CODE_FOR_lasx_xvavgr_wu): Ditto.
5936 (CODE_FOR_lasx_xvavgr_du): Ditto.
5937 (CODE_FOR_lasx_xvmuh_b): Ditto.
5938 (CODE_FOR_lasx_xvmuh_h): Ditto.
5939 (CODE_FOR_lasx_xvmuh_w): Ditto.
5940 (CODE_FOR_lasx_xvmuh_d): Ditto.
5941 (CODE_FOR_lasx_xvmuh_bu): Ditto.
5942 (CODE_FOR_lasx_xvmuh_hu): Ditto.
5943 (CODE_FOR_lasx_xvmuh_wu): Ditto.
5944 (CODE_FOR_lasx_xvmuh_du): Ditto.
5945 (CODE_FOR_lasx_xvssran_b_h): Ditto.
5946 (CODE_FOR_lasx_xvssran_h_w): Ditto.
5947 (CODE_FOR_lasx_xvssran_w_d): Ditto.
5948 (CODE_FOR_lasx_xvssran_bu_h): Ditto.
5949 (CODE_FOR_lasx_xvssran_hu_w): Ditto.
5950 (CODE_FOR_lasx_xvssran_wu_d): Ditto.
5951 (CODE_FOR_lasx_xvssrarn_b_h): Ditto.
5952 (CODE_FOR_lasx_xvssrarn_h_w): Ditto.
5953 (CODE_FOR_lasx_xvssrarn_w_d): Ditto.
5954 (CODE_FOR_lasx_xvssrarn_bu_h): Ditto.
5955 (CODE_FOR_lasx_xvssrarn_hu_w): Ditto.
5956 (CODE_FOR_lasx_xvssrarn_wu_d): Ditto.
5957 (CODE_FOR_lasx_xvssrln_bu_h): Ditto.
5958 (CODE_FOR_lasx_xvssrln_hu_w): Ditto.
5959 (CODE_FOR_lasx_xvssrln_wu_d): Ditto.
5960 (CODE_FOR_lasx_xvssrlrn_bu_h): Ditto.
5961 (CODE_FOR_lasx_xvssrlrn_hu_w): Ditto.
5962 (CODE_FOR_lasx_xvssrlrn_wu_d): Ditto.
5963 (CODE_FOR_lasx_xvftint_w_s): Ditto.
5964 (CODE_FOR_lasx_xvftint_l_d): Ditto.
5965 (CODE_FOR_lasx_xvftint_wu_s): Ditto.
5966 (CODE_FOR_lasx_xvftint_lu_d): Ditto.
5967 (CODE_FOR_lasx_xvsllwil_h_b): Ditto.
5968 (CODE_FOR_lasx_xvsllwil_w_h): Ditto.
5969 (CODE_FOR_lasx_xvsllwil_d_w): Ditto.
5970 (CODE_FOR_lasx_xvsllwil_hu_bu): Ditto.
5971 (CODE_FOR_lasx_xvsllwil_wu_hu): Ditto.
5972 (CODE_FOR_lasx_xvsllwil_du_wu): Ditto.
5973 (CODE_FOR_lasx_xvsat_b): Ditto.
5974 (CODE_FOR_lasx_xvsat_h): Ditto.
5975 (CODE_FOR_lasx_xvsat_w): Ditto.
5976 (CODE_FOR_lasx_xvsat_d): Ditto.
5977 (CODE_FOR_lasx_xvsat_bu): Ditto.
5978 (CODE_FOR_lasx_xvsat_hu): Ditto.
5979 (CODE_FOR_lasx_xvsat_wu): Ditto.
5980 (CODE_FOR_lasx_xvsat_du): Ditto.
5981 (loongarch_builtin_vectorized_function): Ditto.
5982 (loongarch_expand_builtin_insn): Ditto.
5983 (loongarch_expand_builtin): Ditto.
5984 * config/loongarch/loongarch-ftypes.def (1): Ditto.
5988 * config/loongarch/lasxintrin.h: New file.
5990 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
5992 * config/loongarch/loongarch-modes.def
5993 (VECTOR_MODES): Add Loongson ASX instruction support.
5994 * config/loongarch/loongarch-protos.h (loongarch_split_256bit_move): Ditto.
5995 (loongarch_split_256bit_move_p): Ditto.
5996 (loongarch_expand_vector_group_init): Ditto.
5997 (loongarch_expand_vec_perm_1): Ditto.
5998 * config/loongarch/loongarch.cc (loongarch_symbol_insns): Ditto.
5999 (loongarch_valid_offset_p): Ditto.
6000 (loongarch_address_insns): Ditto.
6001 (loongarch_const_insns): Ditto.
6002 (loongarch_legitimize_move): Ditto.
6003 (loongarch_builtin_vectorization_cost): Ditto.
6004 (loongarch_split_move_p): Ditto.
6005 (loongarch_split_move): Ditto.
6006 (loongarch_output_move_index_float): Ditto.
6007 (loongarch_split_256bit_move_p): Ditto.
6008 (loongarch_split_256bit_move): Ditto.
6009 (loongarch_output_move): Ditto.
6010 (loongarch_print_operand_reloc): Ditto.
6011 (loongarch_print_operand): Ditto.
6012 (loongarch_hard_regno_mode_ok_uncached): Ditto.
6013 (loongarch_hard_regno_nregs): Ditto.
6014 (loongarch_class_max_nregs): Ditto.
6015 (loongarch_can_change_mode_class): Ditto.
6016 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
6017 (loongarch_vector_mode_supported_p): Ditto.
6018 (loongarch_preferred_simd_mode): Ditto.
6019 (loongarch_autovectorize_vector_modes): Ditto.
6020 (loongarch_lsx_output_division): Ditto.
6021 (loongarch_expand_lsx_shuffle): Ditto.
6022 (loongarch_expand_vec_perm): Ditto.
6023 (loongarch_expand_vec_perm_interleave): Ditto.
6024 (loongarch_try_expand_lsx_vshuf_const): Ditto.
6025 (loongarch_expand_vec_perm_even_odd_1): Ditto.
6026 (loongarch_expand_vec_perm_even_odd): Ditto.
6027 (loongarch_expand_vec_perm_1): Ditto.
6028 (loongarch_expand_vec_perm_const_2): Ditto.
6029 (loongarch_is_quad_duplicate): Ditto.
6030 (loongarch_is_double_duplicate): Ditto.
6031 (loongarch_is_odd_extraction): Ditto.
6032 (loongarch_is_even_extraction): Ditto.
6033 (loongarch_is_extraction_permutation): Ditto.
6034 (loongarch_is_center_extraction): Ditto.
6035 (loongarch_is_reversing_permutation): Ditto.
6036 (loongarch_is_di_misalign_extract): Ditto.
6037 (loongarch_is_si_misalign_extract): Ditto.
6038 (loongarch_is_lasx_lowpart_interleave): Ditto.
6039 (loongarch_is_lasx_lowpart_interleave_2): Ditto.
6040 (COMPARE_SELECTOR): Ditto.
6041 (loongarch_is_lasx_lowpart_extract): Ditto.
6042 (loongarch_is_lasx_highpart_interleave): Ditto.
6043 (loongarch_is_lasx_highpart_interleave_2): Ditto.
6044 (loongarch_is_elem_duplicate): Ditto.
6045 (loongarch_is_op_reverse_perm): Ditto.
6046 (loongarch_is_single_op_perm): Ditto.
6047 (loongarch_is_divisible_perm): Ditto.
6048 (loongarch_is_triple_stride_extract): Ditto.
6049 (loongarch_vectorize_vec_perm_const): Ditto.
6050 (loongarch_cpu_sched_reassociation_width): Ditto.
6051 (loongarch_expand_vector_extract): Ditto.
6052 (emit_reduc_half): Ditto.
6053 (loongarch_expand_vec_unpack): Ditto.
6054 (loongarch_expand_vector_group_init): Ditto.
6055 (loongarch_expand_vector_init): Ditto.
6056 (loongarch_expand_lsx_cmp): Ditto.
6057 (loongarch_builtin_support_vector_misalignment): Ditto.
6058 * config/loongarch/loongarch.h (UNITS_PER_LASX_REG): Ditto.
6059 (BITS_PER_LASX_REG): Ditto.
6060 (STRUCTURE_SIZE_BOUNDARY): Ditto.
6061 (LASX_REG_FIRST): Ditto.
6062 (LASX_REG_LAST): Ditto.
6063 (LASX_REG_NUM): Ditto.
6064 (LASX_REG_P): Ditto.
6065 (LASX_REG_RTX_P): Ditto.
6066 (LASX_SUPPORTED_MODE_P): Ditto.
6067 * config/loongarch/loongarch.md: Ditto.
6068 * config/loongarch/lasx.md: New file.
6070 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6072 * config.gcc: Export the header file lsxintrin.h.
6073 * config/loongarch/loongarch-builtins.cc (LARCH_FTYPE_NAME4): Add builtin function support.
6074 (enum loongarch_builtin_type): Ditto.
6076 (LARCH_BUILTIN): Ditto.
6077 (LSX_BUILTIN): Ditto.
6078 (LSX_BUILTIN_TEST_BRANCH): Ditto.
6079 (LSX_NO_TARGET_BUILTIN): Ditto.
6080 (CODE_FOR_lsx_vsadd_b): Ditto.
6081 (CODE_FOR_lsx_vsadd_h): Ditto.
6082 (CODE_FOR_lsx_vsadd_w): Ditto.
6083 (CODE_FOR_lsx_vsadd_d): Ditto.
6084 (CODE_FOR_lsx_vsadd_bu): Ditto.
6085 (CODE_FOR_lsx_vsadd_hu): Ditto.
6086 (CODE_FOR_lsx_vsadd_wu): Ditto.
6087 (CODE_FOR_lsx_vsadd_du): Ditto.
6088 (CODE_FOR_lsx_vadd_b): Ditto.
6089 (CODE_FOR_lsx_vadd_h): Ditto.
6090 (CODE_FOR_lsx_vadd_w): Ditto.
6091 (CODE_FOR_lsx_vadd_d): Ditto.
6092 (CODE_FOR_lsx_vaddi_bu): Ditto.
6093 (CODE_FOR_lsx_vaddi_hu): Ditto.
6094 (CODE_FOR_lsx_vaddi_wu): Ditto.
6095 (CODE_FOR_lsx_vaddi_du): Ditto.
6096 (CODE_FOR_lsx_vand_v): Ditto.
6097 (CODE_FOR_lsx_vandi_b): Ditto.
6098 (CODE_FOR_lsx_bnz_v): Ditto.
6099 (CODE_FOR_lsx_bz_v): Ditto.
6100 (CODE_FOR_lsx_vbitsel_v): Ditto.
6101 (CODE_FOR_lsx_vseqi_b): Ditto.
6102 (CODE_FOR_lsx_vseqi_h): Ditto.
6103 (CODE_FOR_lsx_vseqi_w): Ditto.
6104 (CODE_FOR_lsx_vseqi_d): Ditto.
6105 (CODE_FOR_lsx_vslti_b): Ditto.
6106 (CODE_FOR_lsx_vslti_h): Ditto.
6107 (CODE_FOR_lsx_vslti_w): Ditto.
6108 (CODE_FOR_lsx_vslti_d): Ditto.
6109 (CODE_FOR_lsx_vslti_bu): Ditto.
6110 (CODE_FOR_lsx_vslti_hu): Ditto.
6111 (CODE_FOR_lsx_vslti_wu): Ditto.
6112 (CODE_FOR_lsx_vslti_du): Ditto.
6113 (CODE_FOR_lsx_vslei_b): Ditto.
6114 (CODE_FOR_lsx_vslei_h): Ditto.
6115 (CODE_FOR_lsx_vslei_w): Ditto.
6116 (CODE_FOR_lsx_vslei_d): Ditto.
6117 (CODE_FOR_lsx_vslei_bu): Ditto.
6118 (CODE_FOR_lsx_vslei_hu): Ditto.
6119 (CODE_FOR_lsx_vslei_wu): Ditto.
6120 (CODE_FOR_lsx_vslei_du): Ditto.
6121 (CODE_FOR_lsx_vdiv_b): Ditto.
6122 (CODE_FOR_lsx_vdiv_h): Ditto.
6123 (CODE_FOR_lsx_vdiv_w): Ditto.
6124 (CODE_FOR_lsx_vdiv_d): Ditto.
6125 (CODE_FOR_lsx_vdiv_bu): Ditto.
6126 (CODE_FOR_lsx_vdiv_hu): Ditto.
6127 (CODE_FOR_lsx_vdiv_wu): Ditto.
6128 (CODE_FOR_lsx_vdiv_du): Ditto.
6129 (CODE_FOR_lsx_vfadd_s): Ditto.
6130 (CODE_FOR_lsx_vfadd_d): Ditto.
6131 (CODE_FOR_lsx_vftintrz_w_s): Ditto.
6132 (CODE_FOR_lsx_vftintrz_l_d): Ditto.
6133 (CODE_FOR_lsx_vftintrz_wu_s): Ditto.
6134 (CODE_FOR_lsx_vftintrz_lu_d): Ditto.
6135 (CODE_FOR_lsx_vffint_s_w): Ditto.
6136 (CODE_FOR_lsx_vffint_d_l): Ditto.
6137 (CODE_FOR_lsx_vffint_s_wu): Ditto.
6138 (CODE_FOR_lsx_vffint_d_lu): Ditto.
6139 (CODE_FOR_lsx_vfsub_s): Ditto.
6140 (CODE_FOR_lsx_vfsub_d): Ditto.
6141 (CODE_FOR_lsx_vfmul_s): Ditto.
6142 (CODE_FOR_lsx_vfmul_d): Ditto.
6143 (CODE_FOR_lsx_vfdiv_s): Ditto.
6144 (CODE_FOR_lsx_vfdiv_d): Ditto.
6145 (CODE_FOR_lsx_vfmax_s): Ditto.
6146 (CODE_FOR_lsx_vfmax_d): Ditto.
6147 (CODE_FOR_lsx_vfmin_s): Ditto.
6148 (CODE_FOR_lsx_vfmin_d): Ditto.
6149 (CODE_FOR_lsx_vfsqrt_s): Ditto.
6150 (CODE_FOR_lsx_vfsqrt_d): Ditto.
6151 (CODE_FOR_lsx_vflogb_s): Ditto.
6152 (CODE_FOR_lsx_vflogb_d): Ditto.
6153 (CODE_FOR_lsx_vmax_b): Ditto.
6154 (CODE_FOR_lsx_vmax_h): Ditto.
6155 (CODE_FOR_lsx_vmax_w): Ditto.
6156 (CODE_FOR_lsx_vmax_d): Ditto.
6157 (CODE_FOR_lsx_vmaxi_b): Ditto.
6158 (CODE_FOR_lsx_vmaxi_h): Ditto.
6159 (CODE_FOR_lsx_vmaxi_w): Ditto.
6160 (CODE_FOR_lsx_vmaxi_d): Ditto.
6161 (CODE_FOR_lsx_vmax_bu): Ditto.
6162 (CODE_FOR_lsx_vmax_hu): Ditto.
6163 (CODE_FOR_lsx_vmax_wu): Ditto.
6164 (CODE_FOR_lsx_vmax_du): Ditto.
6165 (CODE_FOR_lsx_vmaxi_bu): Ditto.
6166 (CODE_FOR_lsx_vmaxi_hu): Ditto.
6167 (CODE_FOR_lsx_vmaxi_wu): Ditto.
6168 (CODE_FOR_lsx_vmaxi_du): Ditto.
6169 (CODE_FOR_lsx_vmin_b): Ditto.
6170 (CODE_FOR_lsx_vmin_h): Ditto.
6171 (CODE_FOR_lsx_vmin_w): Ditto.
6172 (CODE_FOR_lsx_vmin_d): Ditto.
6173 (CODE_FOR_lsx_vmini_b): Ditto.
6174 (CODE_FOR_lsx_vmini_h): Ditto.
6175 (CODE_FOR_lsx_vmini_w): Ditto.
6176 (CODE_FOR_lsx_vmini_d): Ditto.
6177 (CODE_FOR_lsx_vmin_bu): Ditto.
6178 (CODE_FOR_lsx_vmin_hu): Ditto.
6179 (CODE_FOR_lsx_vmin_wu): Ditto.
6180 (CODE_FOR_lsx_vmin_du): Ditto.
6181 (CODE_FOR_lsx_vmini_bu): Ditto.
6182 (CODE_FOR_lsx_vmini_hu): Ditto.
6183 (CODE_FOR_lsx_vmini_wu): Ditto.
6184 (CODE_FOR_lsx_vmini_du): Ditto.
6185 (CODE_FOR_lsx_vmod_b): Ditto.
6186 (CODE_FOR_lsx_vmod_h): Ditto.
6187 (CODE_FOR_lsx_vmod_w): Ditto.
6188 (CODE_FOR_lsx_vmod_d): Ditto.
6189 (CODE_FOR_lsx_vmod_bu): Ditto.
6190 (CODE_FOR_lsx_vmod_hu): Ditto.
6191 (CODE_FOR_lsx_vmod_wu): Ditto.
6192 (CODE_FOR_lsx_vmod_du): Ditto.
6193 (CODE_FOR_lsx_vmul_b): Ditto.
6194 (CODE_FOR_lsx_vmul_h): Ditto.
6195 (CODE_FOR_lsx_vmul_w): Ditto.
6196 (CODE_FOR_lsx_vmul_d): Ditto.
6197 (CODE_FOR_lsx_vclz_b): Ditto.
6198 (CODE_FOR_lsx_vclz_h): Ditto.
6199 (CODE_FOR_lsx_vclz_w): Ditto.
6200 (CODE_FOR_lsx_vclz_d): Ditto.
6201 (CODE_FOR_lsx_vnor_v): Ditto.
6202 (CODE_FOR_lsx_vor_v): Ditto.
6203 (CODE_FOR_lsx_vori_b): Ditto.
6204 (CODE_FOR_lsx_vnori_b): Ditto.
6205 (CODE_FOR_lsx_vpcnt_b): Ditto.
6206 (CODE_FOR_lsx_vpcnt_h): Ditto.
6207 (CODE_FOR_lsx_vpcnt_w): Ditto.
6208 (CODE_FOR_lsx_vpcnt_d): Ditto.
6209 (CODE_FOR_lsx_vxor_v): Ditto.
6210 (CODE_FOR_lsx_vxori_b): Ditto.
6211 (CODE_FOR_lsx_vsll_b): Ditto.
6212 (CODE_FOR_lsx_vsll_h): Ditto.
6213 (CODE_FOR_lsx_vsll_w): Ditto.
6214 (CODE_FOR_lsx_vsll_d): Ditto.
6215 (CODE_FOR_lsx_vslli_b): Ditto.
6216 (CODE_FOR_lsx_vslli_h): Ditto.
6217 (CODE_FOR_lsx_vslli_w): Ditto.
6218 (CODE_FOR_lsx_vslli_d): Ditto.
6219 (CODE_FOR_lsx_vsra_b): Ditto.
6220 (CODE_FOR_lsx_vsra_h): Ditto.
6221 (CODE_FOR_lsx_vsra_w): Ditto.
6222 (CODE_FOR_lsx_vsra_d): Ditto.
6223 (CODE_FOR_lsx_vsrai_b): Ditto.
6224 (CODE_FOR_lsx_vsrai_h): Ditto.
6225 (CODE_FOR_lsx_vsrai_w): Ditto.
6226 (CODE_FOR_lsx_vsrai_d): Ditto.
6227 (CODE_FOR_lsx_vsrl_b): Ditto.
6228 (CODE_FOR_lsx_vsrl_h): Ditto.
6229 (CODE_FOR_lsx_vsrl_w): Ditto.
6230 (CODE_FOR_lsx_vsrl_d): Ditto.
6231 (CODE_FOR_lsx_vsrli_b): Ditto.
6232 (CODE_FOR_lsx_vsrli_h): Ditto.
6233 (CODE_FOR_lsx_vsrli_w): Ditto.
6234 (CODE_FOR_lsx_vsrli_d): Ditto.
6235 (CODE_FOR_lsx_vsub_b): Ditto.
6236 (CODE_FOR_lsx_vsub_h): Ditto.
6237 (CODE_FOR_lsx_vsub_w): Ditto.
6238 (CODE_FOR_lsx_vsub_d): Ditto.
6239 (CODE_FOR_lsx_vsubi_bu): Ditto.
6240 (CODE_FOR_lsx_vsubi_hu): Ditto.
6241 (CODE_FOR_lsx_vsubi_wu): Ditto.
6242 (CODE_FOR_lsx_vsubi_du): Ditto.
6243 (CODE_FOR_lsx_vpackod_d): Ditto.
6244 (CODE_FOR_lsx_vpackev_d): Ditto.
6245 (CODE_FOR_lsx_vpickod_d): Ditto.
6246 (CODE_FOR_lsx_vpickev_d): Ditto.
6247 (CODE_FOR_lsx_vrepli_b): Ditto.
6248 (CODE_FOR_lsx_vrepli_h): Ditto.
6249 (CODE_FOR_lsx_vrepli_w): Ditto.
6250 (CODE_FOR_lsx_vrepli_d): Ditto.
6251 (CODE_FOR_lsx_vsat_b): Ditto.
6252 (CODE_FOR_lsx_vsat_h): Ditto.
6253 (CODE_FOR_lsx_vsat_w): Ditto.
6254 (CODE_FOR_lsx_vsat_d): Ditto.
6255 (CODE_FOR_lsx_vsat_bu): Ditto.
6256 (CODE_FOR_lsx_vsat_hu): Ditto.
6257 (CODE_FOR_lsx_vsat_wu): Ditto.
6258 (CODE_FOR_lsx_vsat_du): Ditto.
6259 (CODE_FOR_lsx_vavg_b): Ditto.
6260 (CODE_FOR_lsx_vavg_h): Ditto.
6261 (CODE_FOR_lsx_vavg_w): Ditto.
6262 (CODE_FOR_lsx_vavg_d): Ditto.
6263 (CODE_FOR_lsx_vavg_bu): Ditto.
6264 (CODE_FOR_lsx_vavg_hu): Ditto.
6265 (CODE_FOR_lsx_vavg_wu): Ditto.
6266 (CODE_FOR_lsx_vavg_du): Ditto.
6267 (CODE_FOR_lsx_vavgr_b): Ditto.
6268 (CODE_FOR_lsx_vavgr_h): Ditto.
6269 (CODE_FOR_lsx_vavgr_w): Ditto.
6270 (CODE_FOR_lsx_vavgr_d): Ditto.
6271 (CODE_FOR_lsx_vavgr_bu): Ditto.
6272 (CODE_FOR_lsx_vavgr_hu): Ditto.
6273 (CODE_FOR_lsx_vavgr_wu): Ditto.
6274 (CODE_FOR_lsx_vavgr_du): Ditto.
6275 (CODE_FOR_lsx_vssub_b): Ditto.
6276 (CODE_FOR_lsx_vssub_h): Ditto.
6277 (CODE_FOR_lsx_vssub_w): Ditto.
6278 (CODE_FOR_lsx_vssub_d): Ditto.
6279 (CODE_FOR_lsx_vssub_bu): Ditto.
6280 (CODE_FOR_lsx_vssub_hu): Ditto.
6281 (CODE_FOR_lsx_vssub_wu): Ditto.
6282 (CODE_FOR_lsx_vssub_du): Ditto.
6283 (CODE_FOR_lsx_vabsd_b): Ditto.
6284 (CODE_FOR_lsx_vabsd_h): Ditto.
6285 (CODE_FOR_lsx_vabsd_w): Ditto.
6286 (CODE_FOR_lsx_vabsd_d): Ditto.
6287 (CODE_FOR_lsx_vabsd_bu): Ditto.
6288 (CODE_FOR_lsx_vabsd_hu): Ditto.
6289 (CODE_FOR_lsx_vabsd_wu): Ditto.
6290 (CODE_FOR_lsx_vabsd_du): Ditto.
6291 (CODE_FOR_lsx_vftint_w_s): Ditto.
6292 (CODE_FOR_lsx_vftint_l_d): Ditto.
6293 (CODE_FOR_lsx_vftint_wu_s): Ditto.
6294 (CODE_FOR_lsx_vftint_lu_d): Ditto.
6295 (CODE_FOR_lsx_vandn_v): Ditto.
6296 (CODE_FOR_lsx_vorn_v): Ditto.
6297 (CODE_FOR_lsx_vneg_b): Ditto.
6298 (CODE_FOR_lsx_vneg_h): Ditto.
6299 (CODE_FOR_lsx_vneg_w): Ditto.
6300 (CODE_FOR_lsx_vneg_d): Ditto.
6301 (CODE_FOR_lsx_vshuf4i_d): Ditto.
6302 (CODE_FOR_lsx_vbsrl_v): Ditto.
6303 (CODE_FOR_lsx_vbsll_v): Ditto.
6304 (CODE_FOR_lsx_vfmadd_s): Ditto.
6305 (CODE_FOR_lsx_vfmadd_d): Ditto.
6306 (CODE_FOR_lsx_vfmsub_s): Ditto.
6307 (CODE_FOR_lsx_vfmsub_d): Ditto.
6308 (CODE_FOR_lsx_vfnmadd_s): Ditto.
6309 (CODE_FOR_lsx_vfnmadd_d): Ditto.
6310 (CODE_FOR_lsx_vfnmsub_s): Ditto.
6311 (CODE_FOR_lsx_vfnmsub_d): Ditto.
6312 (CODE_FOR_lsx_vmuh_b): Ditto.
6313 (CODE_FOR_lsx_vmuh_h): Ditto.
6314 (CODE_FOR_lsx_vmuh_w): Ditto.
6315 (CODE_FOR_lsx_vmuh_d): Ditto.
6316 (CODE_FOR_lsx_vmuh_bu): Ditto.
6317 (CODE_FOR_lsx_vmuh_hu): Ditto.
6318 (CODE_FOR_lsx_vmuh_wu): Ditto.
6319 (CODE_FOR_lsx_vmuh_du): Ditto.
6320 (CODE_FOR_lsx_vsllwil_h_b): Ditto.
6321 (CODE_FOR_lsx_vsllwil_w_h): Ditto.
6322 (CODE_FOR_lsx_vsllwil_d_w): Ditto.
6323 (CODE_FOR_lsx_vsllwil_hu_bu): Ditto.
6324 (CODE_FOR_lsx_vsllwil_wu_hu): Ditto.
6325 (CODE_FOR_lsx_vsllwil_du_wu): Ditto.
6326 (CODE_FOR_lsx_vssran_b_h): Ditto.
6327 (CODE_FOR_lsx_vssran_h_w): Ditto.
6328 (CODE_FOR_lsx_vssran_w_d): Ditto.
6329 (CODE_FOR_lsx_vssran_bu_h): Ditto.
6330 (CODE_FOR_lsx_vssran_hu_w): Ditto.
6331 (CODE_FOR_lsx_vssran_wu_d): Ditto.
6332 (CODE_FOR_lsx_vssrarn_b_h): Ditto.
6333 (CODE_FOR_lsx_vssrarn_h_w): Ditto.
6334 (CODE_FOR_lsx_vssrarn_w_d): Ditto.
6335 (CODE_FOR_lsx_vssrarn_bu_h): Ditto.
6336 (CODE_FOR_lsx_vssrarn_hu_w): Ditto.
6337 (CODE_FOR_lsx_vssrarn_wu_d): Ditto.
6338 (CODE_FOR_lsx_vssrln_bu_h): Ditto.
6339 (CODE_FOR_lsx_vssrln_hu_w): Ditto.
6340 (CODE_FOR_lsx_vssrln_wu_d): Ditto.
6341 (CODE_FOR_lsx_vssrlrn_bu_h): Ditto.
6342 (CODE_FOR_lsx_vssrlrn_hu_w): Ditto.
6343 (CODE_FOR_lsx_vssrlrn_wu_d): Ditto.
6344 (loongarch_builtin_vector_type): Ditto.
6345 (loongarch_build_cvpointer_type): Ditto.
6346 (LARCH_ATYPE_CVPOINTER): Ditto.
6347 (LARCH_ATYPE_BOOLEAN): Ditto.
6348 (LARCH_ATYPE_V2SF): Ditto.
6349 (LARCH_ATYPE_V2HI): Ditto.
6350 (LARCH_ATYPE_V2SI): Ditto.
6351 (LARCH_ATYPE_V4QI): Ditto.
6352 (LARCH_ATYPE_V4HI): Ditto.
6353 (LARCH_ATYPE_V8QI): Ditto.
6354 (LARCH_ATYPE_V2DI): Ditto.
6355 (LARCH_ATYPE_V4SI): Ditto.
6356 (LARCH_ATYPE_V8HI): Ditto.
6357 (LARCH_ATYPE_V16QI): Ditto.
6358 (LARCH_ATYPE_V2DF): Ditto.
6359 (LARCH_ATYPE_V4SF): Ditto.
6360 (LARCH_ATYPE_V4DI): Ditto.
6361 (LARCH_ATYPE_V8SI): Ditto.
6362 (LARCH_ATYPE_V16HI): Ditto.
6363 (LARCH_ATYPE_V32QI): Ditto.
6364 (LARCH_ATYPE_V4DF): Ditto.
6365 (LARCH_ATYPE_V8SF): Ditto.
6366 (LARCH_ATYPE_UV2DI): Ditto.
6367 (LARCH_ATYPE_UV4SI): Ditto.
6368 (LARCH_ATYPE_UV8HI): Ditto.
6369 (LARCH_ATYPE_UV16QI): Ditto.
6370 (LARCH_ATYPE_UV4DI): Ditto.
6371 (LARCH_ATYPE_UV8SI): Ditto.
6372 (LARCH_ATYPE_UV16HI): Ditto.
6373 (LARCH_ATYPE_UV32QI): Ditto.
6374 (LARCH_ATYPE_UV2SI): Ditto.
6375 (LARCH_ATYPE_UV4HI): Ditto.
6376 (LARCH_ATYPE_UV8QI): Ditto.
6377 (loongarch_builtin_vectorized_function): Ditto.
6378 (LARCH_GET_BUILTIN): Ditto.
6379 (loongarch_expand_builtin_insn): Ditto.
6380 (loongarch_expand_builtin_lsx_test_branch): Ditto.
6381 (loongarch_expand_builtin): Ditto.
6382 * config/loongarch/loongarch-ftypes.def (1): Ditto.
6386 * config/loongarch/lsxintrin.h: New file.
6388 2023-09-05 Lulu Cheng <chenglulu@loongson.cn>
6390 * config/loongarch/constraints.md (M): Add Loongson LSX base instruction support.
6410 * config/loongarch/genopts/loongarch.opt.in: Ditto.
6411 * config/loongarch/loongarch-builtins.cc (loongarch_gen_const_int_vector): Ditto.
6412 * config/loongarch/loongarch-modes.def (VECTOR_MODES): Ditto.
6413 (VECTOR_MODE): Ditto.
6415 * config/loongarch/loongarch-protos.h (loongarch_split_move_insn_p): Ditto.
6416 (loongarch_split_move_insn): Ditto.
6417 (loongarch_split_128bit_move): Ditto.
6418 (loongarch_split_128bit_move_p): Ditto.
6419 (loongarch_split_lsx_copy_d): Ditto.
6420 (loongarch_split_lsx_insert_d): Ditto.
6421 (loongarch_split_lsx_fill_d): Ditto.
6422 (loongarch_expand_vec_cmp): Ditto.
6423 (loongarch_const_vector_same_val_p): Ditto.
6424 (loongarch_const_vector_same_bytes_p): Ditto.
6425 (loongarch_const_vector_same_int_p): Ditto.
6426 (loongarch_const_vector_shuffle_set_p): Ditto.
6427 (loongarch_const_vector_bitimm_set_p): Ditto.
6428 (loongarch_const_vector_bitimm_clr_p): Ditto.
6429 (loongarch_lsx_vec_parallel_const_half): Ditto.
6430 (loongarch_gen_const_int_vector): Ditto.
6431 (loongarch_lsx_output_division): Ditto.
6432 (loongarch_expand_vector_init): Ditto.
6433 (loongarch_expand_vec_unpack): Ditto.
6434 (loongarch_expand_vec_perm): Ditto.
6435 (loongarch_expand_vector_extract): Ditto.
6436 (loongarch_expand_vector_reduc): Ditto.
6437 (loongarch_ldst_scaled_shift): Ditto.
6438 (loongarch_expand_vec_cond_expr): Ditto.
6439 (loongarch_expand_vec_cond_mask_expr): Ditto.
6440 (loongarch_builtin_vectorized_function): Ditto.
6441 (loongarch_gen_const_int_vector_shuffle): Ditto.
6442 (loongarch_build_signbit_mask): Ditto.
6443 * config/loongarch/loongarch.cc (loongarch_pass_aggregate_num_fpr): Ditto.
6444 (loongarch_setup_incoming_varargs): Ditto.
6445 (loongarch_emit_move): Ditto.
6446 (loongarch_const_vector_bitimm_set_p): Ditto.
6447 (loongarch_const_vector_bitimm_clr_p): Ditto.
6448 (loongarch_const_vector_same_val_p): Ditto.
6449 (loongarch_const_vector_same_bytes_p): Ditto.
6450 (loongarch_const_vector_same_int_p): Ditto.
6451 (loongarch_const_vector_shuffle_set_p): Ditto.
6452 (loongarch_symbol_insns): Ditto.
6453 (loongarch_cannot_force_const_mem): Ditto.
6454 (loongarch_valid_offset_p): Ditto.
6455 (loongarch_valid_index_p): Ditto.
6456 (loongarch_classify_address): Ditto.
6457 (loongarch_address_insns): Ditto.
6458 (loongarch_ldst_scaled_shift): Ditto.
6459 (loongarch_const_insns): Ditto.
6460 (loongarch_split_move_insn_p): Ditto.
6461 (loongarch_subword_at_byte): Ditto.
6462 (loongarch_legitimize_move): Ditto.
6463 (loongarch_builtin_vectorization_cost): Ditto.
6464 (loongarch_split_move_p): Ditto.
6465 (loongarch_split_move): Ditto.
6466 (loongarch_split_move_insn): Ditto.
6467 (loongarch_output_move_index_float): Ditto.
6468 (loongarch_split_128bit_move_p): Ditto.
6469 (loongarch_split_128bit_move): Ditto.
6470 (loongarch_split_lsx_copy_d): Ditto.
6471 (loongarch_split_lsx_insert_d): Ditto.
6472 (loongarch_split_lsx_fill_d): Ditto.
6473 (loongarch_output_move): Ditto.
6474 (loongarch_extend_comparands): Ditto.
6475 (loongarch_print_operand_reloc): Ditto.
6476 (loongarch_print_operand): Ditto.
6477 (loongarch_hard_regno_mode_ok_uncached): Ditto.
6478 (loongarch_hard_regno_call_part_clobbered): Ditto.
6479 (loongarch_hard_regno_nregs): Ditto.
6480 (loongarch_class_max_nregs): Ditto.
6481 (loongarch_can_change_mode_class): Ditto.
6482 (loongarch_mode_ok_for_mov_fmt_p): Ditto.
6483 (loongarch_secondary_reload): Ditto.
6484 (loongarch_vector_mode_supported_p): Ditto.
6485 (loongarch_preferred_simd_mode): Ditto.
6486 (loongarch_autovectorize_vector_modes): Ditto.
6487 (loongarch_lsx_output_division): Ditto.
6488 (loongarch_option_override_internal): Ditto.
6489 (loongarch_hard_regno_caller_save_mode): Ditto.
6490 (MAX_VECT_LEN): Ditto.
6491 (loongarch_spill_class): Ditto.
6492 (struct expand_vec_perm_d): Ditto.
6493 (loongarch_promote_function_mode): Ditto.
6494 (loongarch_expand_vselect): Ditto.
6495 (loongarch_starting_frame_offset): Ditto.
6496 (loongarch_expand_vselect_vconcat): Ditto.
6497 (TARGET_ASM_ALIGNED_DI_OP): Ditto.
6498 (TARGET_OPTION_OVERRIDE): Ditto.
6499 (TARGET_LEGITIMIZE_ADDRESS): Ditto.
6500 (TARGET_ASM_SELECT_RTX_SECTION): Ditto.
6501 (TARGET_ASM_FUNCTION_RODATA_SECTION): Ditto.
6502 (loongarch_expand_lsx_shuffle): Ditto.
6503 (TARGET_SCHED_INIT): Ditto.
6504 (TARGET_SCHED_REORDER): Ditto.
6505 (TARGET_SCHED_REORDER2): Ditto.
6506 (TARGET_SCHED_VARIABLE_ISSUE): Ditto.
6507 (TARGET_SCHED_ADJUST_COST): Ditto.
6508 (TARGET_SCHED_ISSUE_RATE): Ditto.
6509 (TARGET_SCHED_FIRST_CYCLE_MULTIPASS_DFA_LOOKAHEAD): Ditto.
6510 (TARGET_FUNCTION_OK_FOR_SIBCALL): Ditto.
6511 (TARGET_VALID_POINTER_MODE): Ditto.
6512 (TARGET_REGISTER_MOVE_COST): Ditto.
6513 (TARGET_MEMORY_MOVE_COST): Ditto.
6514 (TARGET_RTX_COSTS): Ditto.
6515 (TARGET_ADDRESS_COST): Ditto.
6516 (TARGET_IN_SMALL_DATA_P): Ditto.
6517 (TARGET_PREFERRED_RELOAD_CLASS): Ditto.
6518 (TARGET_ASM_FILE_START_FILE_DIRECTIVE): Ditto.
6519 (TARGET_EXPAND_BUILTIN_VA_START): Ditto.
6520 (loongarch_expand_vec_perm): Ditto.
6521 (TARGET_PROMOTE_FUNCTION_MODE): Ditto.
6522 (TARGET_RETURN_IN_MEMORY): Ditto.
6523 (TARGET_FUNCTION_VALUE): Ditto.
6524 (TARGET_LIBCALL_VALUE): Ditto.
6525 (loongarch_try_expand_lsx_vshuf_const): Ditto.
6526 (TARGET_ASM_OUTPUT_MI_THUNK): Ditto.
6527 (TARGET_ASM_CAN_OUTPUT_MI_THUNK): Ditto.
6528 (TARGET_PRINT_OPERAND): Ditto.
6529 (TARGET_PRINT_OPERAND_ADDRESS): Ditto.
6530 (TARGET_PRINT_OPERAND_PUNCT_VALID_P): Ditto.
6531 (TARGET_SETUP_INCOMING_VARARGS): Ditto.
6532 (TARGET_STRICT_ARGUMENT_NAMING): Ditto.
6533 (TARGET_MUST_PASS_IN_STACK): Ditto.
6534 (TARGET_PASS_BY_REFERENCE): Ditto.
6535 (TARGET_ARG_PARTIAL_BYTES): Ditto.
6536 (TARGET_FUNCTION_ARG): Ditto.
6537 (TARGET_FUNCTION_ARG_ADVANCE): Ditto.
6538 (TARGET_FUNCTION_ARG_BOUNDARY): Ditto.
6539 (TARGET_SCALAR_MODE_SUPPORTED_P): Ditto.
6540 (TARGET_INIT_BUILTINS): Ditto.
6541 (loongarch_expand_vec_perm_const_1): Ditto.
6542 (loongarch_expand_vec_perm_const_2): Ditto.
6543 (loongarch_vectorize_vec_perm_const): Ditto.
6544 (loongarch_cpu_sched_reassociation_width): Ditto.
6545 (loongarch_sched_reassociation_width): Ditto.
6546 (loongarch_expand_vector_extract): Ditto.
6547 (emit_reduc_half): Ditto.
6548 (loongarch_expand_vector_reduc): Ditto.
6549 (loongarch_expand_vec_unpack): Ditto.
6550 (loongarch_lsx_vec_parallel_const_half): Ditto.
6551 (loongarch_constant_elt_p): Ditto.
6552 (loongarch_gen_const_int_vector_shuffle): Ditto.
6553 (loongarch_expand_vector_init): Ditto.
6554 (loongarch_expand_lsx_cmp): Ditto.
6555 (loongarch_expand_vec_cond_expr): Ditto.
6556 (loongarch_expand_vec_cond_mask_expr): Ditto.
6557 (loongarch_expand_vec_cmp): Ditto.
6558 (loongarch_case_values_threshold): Ditto.
6559 (loongarch_build_const_vector): Ditto.
6560 (loongarch_build_signbit_mask): Ditto.
6561 (loongarch_builtin_support_vector_misalignment): Ditto.
6562 (TARGET_ASM_ALIGNED_HI_OP): Ditto.
6563 (TARGET_ASM_ALIGNED_SI_OP): Ditto.
6564 (TARGET_VECTORIZE_BUILTIN_VECTORIZATION_COST): Ditto.
6565 (TARGET_VECTOR_MODE_SUPPORTED_P): Ditto.
6566 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): Ditto.
6567 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Ditto.
6568 (TARGET_VECTORIZE_VEC_PERM_CONST): Ditto.
6569 (TARGET_SCHED_REASSOCIATION_WIDTH): Ditto.
6570 (TARGET_CASE_VALUES_THRESHOLD): Ditto.
6571 (TARGET_HARD_REGNO_CALL_PART_CLOBBERED): Ditto.
6572 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
6573 * config/loongarch/loongarch.h (TARGET_SUPPORTS_WIDE_INT): Ditto.
6574 (UNITS_PER_LSX_REG): Ditto.
6575 (BITS_PER_LSX_REG): Ditto.
6576 (BIGGEST_ALIGNMENT): Ditto.
6577 (LSX_REG_FIRST): Ditto.
6578 (LSX_REG_LAST): Ditto.
6579 (LSX_REG_NUM): Ditto.
6581 (LSX_REG_RTX_P): Ditto.
6582 (IMM13_OPERAND): Ditto.
6583 (LSX_SUPPORTED_MODE_P): Ditto.
6584 * config/loongarch/loongarch.md (unknown,add,sub,not,nor,and,or,xor): Ditto.
6585 (unknown,add,sub,not,nor,and,or,xor,simd_add): Ditto.
6586 (unknown,none,QI,HI,SI,DI,TI,SF,DF,TF,FCC): Ditto.
6593 * config/loongarch/loongarch.opt: Ditto.
6594 * config/loongarch/predicates.md (const_lsx_branch_operand): Ditto.
6595 (const_uimm3_operand): Ditto.
6596 (const_8_to_11_operand): Ditto.
6597 (const_12_to_15_operand): Ditto.
6598 (const_uimm4_operand): Ditto.
6599 (const_uimm6_operand): Ditto.
6600 (const_uimm7_operand): Ditto.
6601 (const_uimm8_operand): Ditto.
6602 (const_imm5_operand): Ditto.
6603 (const_imm10_operand): Ditto.
6604 (const_imm13_operand): Ditto.
6605 (reg_imm10_operand): Ditto.
6606 (aq8b_operand): Ditto.
6607 (aq8h_operand): Ditto.
6608 (aq8w_operand): Ditto.
6609 (aq8d_operand): Ditto.
6610 (aq10b_operand): Ditto.
6611 (aq10h_operand): Ditto.
6612 (aq10w_operand): Ditto.
6613 (aq10d_operand): Ditto.
6614 (aq12b_operand): Ditto.
6615 (aq12h_operand): Ditto.
6616 (aq12w_operand): Ditto.
6617 (aq12d_operand): Ditto.
6618 (const_m1_operand): Ditto.
6619 (reg_or_m1_operand): Ditto.
6620 (const_exp_2_operand): Ditto.
6621 (const_exp_4_operand): Ditto.
6622 (const_exp_8_operand): Ditto.
6623 (const_exp_16_operand): Ditto.
6624 (const_exp_32_operand): Ditto.
6625 (const_0_or_1_operand): Ditto.
6626 (const_0_to_3_operand): Ditto.
6627 (const_0_to_7_operand): Ditto.
6628 (const_2_or_3_operand): Ditto.
6629 (const_4_to_7_operand): Ditto.
6630 (const_8_to_15_operand): Ditto.
6631 (const_16_to_31_operand): Ditto.
6632 (qi_mask_operand): Ditto.
6633 (hi_mask_operand): Ditto.
6634 (si_mask_operand): Ditto.
6636 (db4_operand): Ditto.
6637 (db7_operand): Ditto.
6638 (db8_operand): Ditto.
6639 (ib3_operand): Ditto.
6640 (sb4_operand): Ditto.
6641 (sb5_operand): Ditto.
6642 (sb8_operand): Ditto.
6643 (sd8_operand): Ditto.
6644 (ub4_operand): Ditto.
6645 (ub8_operand): Ditto.
6646 (uh4_operand): Ditto.
6647 (uw4_operand): Ditto.
6648 (uw5_operand): Ditto.
6649 (uw6_operand): Ditto.
6650 (uw8_operand): Ditto.
6651 (addiur2_operand): Ditto.
6652 (addiusp_operand): Ditto.
6653 (andi16_operand): Ditto.
6654 (movep_src_register): Ditto.
6655 (movep_src_operand): Ditto.
6656 (fcc_reload_operand): Ditto.
6657 (muldiv_target_operand): Ditto.
6658 (const_vector_same_val_operand): Ditto.
6659 (const_vector_same_simm5_operand): Ditto.
6660 (const_vector_same_uimm5_operand): Ditto.
6661 (const_vector_same_ximm5_operand): Ditto.
6662 (const_vector_same_uimm6_operand): Ditto.
6663 (par_const_vector_shf_set_operand): Ditto.
6664 (reg_or_vector_same_val_operand): Ditto.
6665 (reg_or_vector_same_simm5_operand): Ditto.
6666 (reg_or_vector_same_uimm5_operand): Ditto.
6667 (reg_or_vector_same_ximm5_operand): Ditto.
6668 (reg_or_vector_same_uimm6_operand): Ditto.
6669 * doc/md.texi: Ditto.
6670 * config/loongarch/lsx.md: New file.
6672 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6674 * config/riscv/riscv-protos.h (lookup_vector_type_attribute): Export global.
6675 (get_all_predecessors): New function.
6676 (get_all_successors): Ditto.
6677 * config/riscv/riscv-v.cc (get_all_predecessors): Ditto.
6678 (get_all_successors): Ditto.
6679 * config/riscv/riscv-vector-builtins.cc (sizeless_type_p): Export global.
6680 * config/riscv/riscv-vsetvl.cc (get_all_predecessors): Remove it.
6682 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
6684 * config/arc/arc-protos.h (arc_output_addsi): Remove declaration.
6685 (split_addsi): Likewise.
6686 * config/arc/arc.cc (arc_print_operand): Add/repurpose 's', 'S',
6687 'N', 'x', and 'J' code letters.
6688 (arc_output_addsi): Make it static.
6689 (split_addsi): Remove it.
6690 * config/arc/arc.h (UNSIGNED_INT*): New defines.
6691 (SINNED_INT*): Likewise.
6692 * config/arc/arc.md (type): Add add, sub, bxor types.
6693 (tst_movb): Change code letter from 's' to 'x'.
6694 (andsi3_i): Likewise.
6695 (addsi3_mixed): Refurbish the pattern.
6696 (call_i): Change code letter from 'S' to 'J'.
6697 * config/arc/arc700.md: Add newly introduced types.
6698 * config/arc/arcHS.md: Likewsie.
6699 * config/arc/arcHS4x.md: Likewise.
6700 * config/arc/constraints.md (Cca, CL2, Csp, C2a): Remove it.
6701 (CM4): Update description.
6702 (CP4, C6u, C6n, CIs, C4p): New constraint.
6704 2023-09-05 Claudiu Zissulescu <claziss@gmail.com>
6706 * common/config/arc/arc-common.cc (arc_option_optimization_table):
6707 Remove mbbit_peephole.
6708 * config/arc/arc.md (UNSPEC_ARC_DIRECT): Remove.
6709 (store_direct): Likewise.
6710 (BBIT peephole2): Likewise.
6711 * config/arc/arc.opt (mbbit-peephole): Ignore option.
6712 * doc/invoke.texi (mbbit-peephole): Update document.
6714 2023-09-05 Jakub Jelinek <jakub@redhat.com>
6716 * tree-ssa-tail-merge.cc (replace_block_by): Fix a comment typo:
6719 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6721 * config/loongarch/loongarch.h (CC1_SPEC): Mark normalized
6722 options passed from driver to gnat1 as explicit for multilib.
6724 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6726 * config.gcc: add loongarch*-elf target.
6727 * config/loongarch/elf.h: New file.
6728 Link against newlib by default.
6730 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6732 * config.gcc: use -mstrict-align for building libraries
6733 if --with-strict-align-lib is given.
6734 * doc/install.texi: likewise.
6736 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6738 * config/loongarch/loongarch-c.cc: Export macros
6739 "__loongarch_{arch,tune}" in the preprocessor.
6741 2023-09-05 Yang Yujie <yangyujie@loongson.cn>
6743 * config.gcc: Make --with-abi= obsolete, decide the default ABI
6744 with target triplet. Allow specifying multilib library build
6745 options with --with-multilib-list and --with-multilib-default.
6746 * config/loongarch/t-linux: Likewise.
6747 * config/loongarch/genopts/loongarch-strings: Likewise.
6748 * config/loongarch/loongarch-str.h: Likewise.
6749 * doc/install.texi: Likewise.
6750 * config/loongarch/genopts/loongarch.opt.in: Introduce
6751 -m[no-]l[a]sx options. Only process -m*-float and
6752 -m[no-]l[a]sx in the GCC driver.
6753 * config/loongarch/loongarch.opt: Likewise.
6754 * config/loongarch/la464.md: Likewise.
6755 * config/loongarch/loongarch-c.cc: Likewise.
6756 * config/loongarch/loongarch-cpu.cc: Likewise.
6757 * config/loongarch/loongarch-cpu.h: Likewise.
6758 * config/loongarch/loongarch-def.c: Likewise.
6759 * config/loongarch/loongarch-def.h: Likewise.
6760 * config/loongarch/loongarch-driver.cc: Likewise.
6761 * config/loongarch/loongarch-driver.h: Likewise.
6762 * config/loongarch/loongarch-opts.cc: Likewise.
6763 * config/loongarch/loongarch-opts.h: Likewise.
6764 * config/loongarch/loongarch.cc: Likewise.
6765 * doc/invoke.texi: Likewise.
6767 2023-09-05 liuhongt <hongtao.liu@intel.com>
6769 * config/i386/sse.md: (V8BFH_128): Renamed to ..
6770 (VHFBF_128): .. this.
6771 (V16BFH_256): Renamed to ..
6772 (VHFBF_256): .. this.
6773 (avx512f_mov<mode>): Extend to V_128.
6774 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_128.
6775 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
6776 (vcvtnee<bf16_ph>2ps_<mode>): Changed to VHFBF_256.
6777 (vcvtneo<bf16_ph>2ps_<mode>): Ditto.
6778 * config/i386/i386-expand.cc (expand_vec_perm_blend):
6779 Canonicalize vec_merge.
6781 2023-09-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6783 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Fix Dynamic status.
6784 * config/riscv/riscv-v.cc (preferred_simd_mode): Ditto.
6785 (autovectorize_vector_modes): Ditto.
6786 (vectorize_related_mode): Ditto.
6788 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6790 * config/rs6000/darwin.h (LIB_SPEC): Include libSystemStubs for
6791 all 32b Darwin PowerPC cases.
6793 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6795 * config/darwin-sections.def (static_init_section): Add the
6796 __TEXT,__StaticInit section.
6797 * config/darwin.cc (darwin_function_section): Use the static init
6798 section for global initializers, to match other platform toolchains.
6800 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6802 * config/darwin-sections.def (darwin_exception_section): Move to
6804 * config/darwin.cc (darwin_emit_except_table_label): Align before
6805 the exception table label.
6806 * config/darwin.h (ASM_PREFERRED_EH_DATA_FORMAT): Use indirect PC-
6807 relative 4byte relocs.
6809 2023-09-04 Iain Sandoe <iain@sandoe.co.uk>
6811 * config/darwin.cc (dump_machopic_symref_flags): New.
6812 (debug_machopic_symref_flags): New.
6814 2023-09-04 Pan Li <pan2.li@intel.com>
6816 * config/riscv/riscv-vector-builtins-types.def
6817 (vfloat16mf4_t): Add FP16 intrinsic def.
6818 (vfloat16mf2_t): Ditto.
6819 (vfloat16m1_t): Ditto.
6820 (vfloat16m2_t): Ditto.
6821 (vfloat16m4_t): Ditto.
6822 (vfloat16m8_t): Ditto.
6824 2023-09-04 Jiufu Guo <guojiufu@linux.ibm.com>
6826 PR tree-optimization/108757
6827 * match.pd ((X - N * M) / N): New pattern.
6828 ((X + N * M) / N): New pattern.
6829 ((X + C) div_rshift N): New pattern.
6831 2023-09-04 Guo Jie <guojie@loongson.cn>
6833 * config/loongarch/loongarch.md: Support 'G' -> 'k' in
6834 movsf_hardfloat and movdf_hardfloat.
6836 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
6838 * config/loongarch/loongarch.cc (loongarch_extend_comparands):
6839 In unsigned QImode test, check for sign extended subreg and/or
6840 constant operands, and do a sign extension in that case.
6841 * config/loongarch/loongarch.md (TARGET_64BIT): Define
6842 template cbranchqi4.
6844 2023-09-04 Lulu Cheng <chenglulu@loongson.cn>
6846 * config/loongarch/loongarch.md: Allows fixed-point values to be loaded
6847 from memory into floating-point registers.
6849 2023-09-03 Pan Li <pan2.li@intel.com>
6851 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
6853 * config/riscv/vector.md: Add VLS modes to vfmax/vfmin.
6855 2023-09-02 Mikael Morin <mikael@gcc.gnu.org>
6857 * tree-diagnostic.cc (tree_diagnostics_defaults): Delete allocated
6858 pointer before overwriting it.
6860 2023-09-02 chenxiaolong <chenxiaolong@loongson.cn>
6862 * config/loongarch/loongarch-builtins.cc (loongarch_init_builtins):
6863 Associate the __float128 type to float128_type_node so that it can
6864 be recognized by the compiler.
6865 * config/loongarch/loongarch-c.cc (loongarch_cpu_cpp_builtins):
6866 Add the flag "FLOAT128_TYPE" to gcc and associate a function
6867 with the suffix "q" to "f128".
6868 * doc/extend.texi:Added support for 128-bit floating-point functions on
6869 the LoongArch architecture.
6871 2023-09-01 Jakub Jelinek <jakub@redhat.com>
6874 * common.opt (fabi-version=): Document version 19.
6875 * doc/invoke.texi (-fabi-version=): Likewise.
6877 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6879 * config/riscv/autovec-opt.md (*cond_<optab><mode><vconvert>):
6880 New combine pattern.
6881 (*cond_<float_cvt><vconvert><mode>): Ditto.
6882 (*cond_<optab><vnconvert><mode>): Ditto.
6883 (*cond_<float_cvt><vnconvert><mode>): Ditto.
6884 (*cond_<optab><mode><vnconvert>): Ditto.
6885 (*cond_<float_cvt><mode><vnconvert>2): Ditto.
6886 * config/riscv/autovec.md (<optab><mode><vconvert>2): Adjust.
6887 (<float_cvt><vconvert><mode>2): Adjust.
6888 (<optab><vnconvert><mode>2): Adjust.
6889 (<float_cvt><vnconvert><mode>2): Adjust.
6890 (<optab><mode><vnconvert>2): Adjust.
6891 (<float_cvt><mode><vnconvert>2): Adjust.
6892 * config/riscv/riscv-v.cc (needs_fp_rounding): Add INT->FP extend.
6894 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6896 * config/riscv/autovec-opt.md (*cond_extend<v_double_trunc><mode>):
6897 New combine pattern.
6898 (*cond_trunc<mode><v_double_trunc>): Ditto.
6899 * config/riscv/autovec.md: Adjust.
6900 * config/riscv/riscv-v.cc (needs_fp_rounding): Add FP extend.
6902 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6904 * config/riscv/autovec-opt.md (*cond_<optab><v_double_trunc><mode>):
6905 New combine pattern.
6906 (*cond_<optab><v_quad_trunc><mode>): Ditto.
6907 (*cond_<optab><v_oct_trunc><mode>): Ditto.
6908 (*cond_trunc<mode><v_double_trunc>): Ditto.
6909 * config/riscv/autovec.md (<optab><v_quad_trunc><mode>2): Adjust.
6910 (<optab><v_oct_trunc><mode>2): Ditto.
6912 2023-09-01 Lehua Ding <lehua.ding@rivai.ai>
6914 * config/riscv/autovec.md: Adjust.
6915 * config/riscv/riscv-protos.h (expand_cond_len_unop): Ditto.
6916 (expand_cond_len_binop): Ditto.
6917 * config/riscv/riscv-v.cc (needs_fp_rounding): Ditto.
6918 (expand_cond_len_op): Ditto.
6919 (expand_cond_len_unop): Ditto.
6920 (expand_cond_len_binop): Ditto.
6921 (expand_cond_len_ternop): Ditto.
6923 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6925 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Enable
6926 VECT_COMPARE_COSTS by default.
6928 2023-09-01 Robin Dapp <rdapp@ventanamicro.com>
6930 * config/riscv/autovec.md (vec_extract<mode>qi): New expander.
6932 2023-09-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
6934 * config/riscv/riscv-opts.h (enum riscv_autovec_lmul_enum): Add
6936 * config/riscv/riscv.opt: Add dynamic compile option.
6938 2023-09-01 Pan Li <pan2.li@intel.com>
6940 * config/riscv/autovec-vls.md (<optab><mode>3): New pattern for
6941 vls floating-point autovec.
6942 * config/riscv/vector-iterators.md: New iterator for
6943 floating-point V and VLS.
6944 * config/riscv/vector.md: Add VLS to floating-point binop.
6946 2023-09-01 Andrew Pinski <apinski@marvell.com>
6948 PR tree-optimization/19832
6949 * match.pd: Add pattern to optimize
6950 `(a != b) ? a OP b : c`.
6952 2023-09-01 Lulu Cheng <chenglulu@loongson.cn>
6953 Guo Jie <guojie@loongson.cn>
6956 * config/loongarch/loongarch.cc (loongarch_emit_stack_tie): Use the
6957 frame_pointer_needed to determine whether to use the $fp register.
6959 2023-08-31 Andrew Pinski <apinski@marvell.com>
6961 PR tree-optimization/110915
6962 * match.pd (min_value, max_value): Extend to vector constants.
6964 2023-08-31 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
6966 * config.in: Regenerate.
6967 * config/darwin-c.cc: Change spelling to macOS.
6968 * config/darwin-driver.cc: Likewise.
6969 * config/darwin.h: Likewise.
6970 * configure.ac: Likewise.
6971 * doc/contrib.texi: Likewise.
6972 * doc/extend.texi: Likewise.
6973 * doc/invoke.texi: Likewise.
6974 * doc/plugins.texi: Likewise.
6975 * doc/tm.texi: Regenerate.
6976 * doc/tm.texi.in: Change spelling to macOS.
6977 * plugin.cc: Likewise.
6979 2023-08-31 Pan Li <pan2.li@intel.com>
6981 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmadd/vfnmacc.
6982 * config/riscv/autovec.md: Ditto.
6984 2023-08-31 Pan Li <pan2.li@intel.com>
6986 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfnmsac/vfnmsub
6987 * config/riscv/autovec.md: Ditto.
6989 2023-08-31 Richard Sandiford <richard.sandiford@arm.com>
6991 * config/aarch64/aarch64.md (untyped_call): Emit a call_value
6992 rather than a call. List each possible destination register
6993 in the call pattern.
6995 2023-08-31 Pan Li <pan2.li@intel.com>
6997 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmsac/vfmsub
6998 * config/riscv/autovec.md: Ditto.
7000 2023-08-31 Pan Li <pan2.li@intel.com>
7001 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7003 * config/riscv/autovec-opt.md: Add FRM_REGNUM to vfmadd/vfmacc.
7004 * config/riscv/autovec.md: Ditto.
7005 * config/riscv/vector-iterators.md: Add UNSPEC_VFFMA.
7007 2023-08-31 Palmer Dabbelt <palmer@rivosinc.com>
7009 * config/riscv/autovec.md (shifts): Use
7010 vector_scalar_shift_operand.
7011 * config/riscv/predicates.md (vector_scalar_shift_operand): New
7014 2023-08-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7016 * config.gcc: Add vector cost model framework for RVV.
7017 * config/riscv/riscv.cc (riscv_vectorize_create_costs): Ditto.
7018 (TARGET_VECTORIZE_CREATE_COSTS): Ditto.
7019 * config/riscv/t-riscv: Ditto.
7020 * config/riscv/riscv-vector-costs.cc: New file.
7021 * config/riscv/riscv-vector-costs.h: New file.
7023 2023-08-31 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
7026 * config/rs6000/mma.md (define_insn_and_split movoo): Disallow
7027 AltiVec address operands.
7028 (define_insn_and_split movxo): Likewise.
7029 * config/rs6000/predicates.md (vsx_quad_dform_memory_operand): Remove
7030 redundant mode size check.
7032 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7034 * config/riscv/riscv-protos.h (IS_AGNOSTIC): Move to here.
7035 * config/riscv/riscv-v.cc (gen_no_side_effects_vsetvl_rtx):
7036 Change to default policy.
7037 * config/riscv/riscv-vector-builtins-bases.cc: Change to default policy.
7038 * config/riscv/riscv-vsetvl.h (IS_AGNOSTIC): Delete.
7039 * config/riscv/riscv.cc (riscv_print_operand): Use IS_AGNOSTIC to test.
7041 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7043 * config/riscv/autovec-opt.md: Adjust.
7044 * config/riscv/autovec-vls.md: Ditto.
7045 * config/riscv/autovec.md: Ditto.
7046 * config/riscv/riscv-protos.h (enum insn_type): Add insn_type.
7047 (enum insn_flags): Add insn flags.
7048 (emit_vlmax_insn): Adjust.
7049 (emit_vlmax_fp_insn): Delete.
7050 (emit_vlmax_ternary_insn): Delete.
7051 (emit_vlmax_fp_ternary_insn): Delete.
7052 (emit_nonvlmax_insn): Adjust.
7053 (emit_vlmax_slide_insn): Delete.
7054 (emit_nonvlmax_slide_tu_insn): Delete.
7055 (emit_vlmax_merge_insn): Delete.
7056 (emit_vlmax_cmp_insn): Delete.
7057 (emit_vlmax_cmp_mu_insn): Delete.
7058 (emit_vlmax_masked_mu_insn): Delete.
7059 (emit_scalar_move_insn): Delete.
7060 (emit_nonvlmax_integer_move_insn): Delete.
7061 (emit_vlmax_insn_lra): Add.
7062 * config/riscv/riscv-v.cc (get_mask_mode_from_insn_flags): New.
7063 (emit_vlmax_insn): Adjust.
7064 (emit_nonvlmax_insn): Adjust.
7065 (emit_vlmax_insn_lra): Add.
7066 (emit_vlmax_fp_insn): Delete.
7067 (emit_vlmax_ternary_insn): Delete.
7068 (emit_vlmax_fp_ternary_insn): Delete.
7069 (emit_vlmax_slide_insn): Delete.
7070 (emit_nonvlmax_slide_tu_insn): Delete.
7071 (emit_nonvlmax_slide_insn): Delete.
7072 (emit_vlmax_merge_insn): Delete.
7073 (emit_vlmax_cmp_insn): Delete.
7074 (emit_vlmax_cmp_mu_insn): Delete.
7075 (emit_vlmax_masked_insn): Delete.
7076 (emit_nonvlmax_masked_insn): Delete.
7077 (emit_vlmax_masked_store_insn): Delete.
7078 (emit_nonvlmax_masked_store_insn): Delete.
7079 (emit_vlmax_masked_mu_insn): Delete.
7080 (emit_vlmax_masked_fp_mu_insn): Delete.
7081 (emit_nonvlmax_tu_insn): Delete.
7082 (emit_nonvlmax_fp_tu_insn): Delete.
7083 (emit_nonvlmax_tumu_insn): Delete.
7084 (emit_nonvlmax_fp_tumu_insn): Delete.
7085 (emit_scalar_move_insn): Delete.
7086 (emit_cpop_insn): Delete.
7087 (emit_vlmax_integer_move_insn): Delete.
7088 (emit_nonvlmax_integer_move_insn): Delete.
7089 (emit_vlmax_gather_insn): Delete.
7090 (emit_vlmax_masked_gather_mu_insn): Delete.
7091 (emit_vlmax_compress_insn): Delete.
7092 (emit_nonvlmax_compress_insn): Delete.
7093 (emit_vlmax_reduction_insn): Delete.
7094 (emit_vlmax_fp_reduction_insn): Delete.
7095 (emit_nonvlmax_fp_reduction_insn): Delete.
7096 (expand_vec_series): Adjust.
7097 (expand_const_vector): Adjust.
7098 (legitimize_move): Adjust.
7099 (sew64_scalar_helper): Adjust.
7100 (expand_tuple_move): Adjust.
7101 (expand_vector_init_insert_elems): Adjust.
7102 (expand_vector_init_merge_repeating_sequence): Adjust.
7103 (expand_vec_cmp): Adjust.
7104 (expand_vec_cmp_float): Adjust.
7105 (expand_vec_perm): Adjust.
7106 (shuffle_merge_patterns): Adjust.
7107 (shuffle_compress_patterns): Adjust.
7108 (shuffle_decompress_patterns): Adjust.
7109 (expand_load_store): Adjust.
7110 (expand_cond_len_op): Adjust.
7111 (expand_cond_len_unop): Adjust.
7112 (expand_cond_len_binop): Adjust.
7113 (expand_gather_scatter): Adjust.
7114 (expand_cond_len_ternop): Adjust.
7115 (expand_reduction): Adjust.
7116 (expand_lanes_load_store): Adjust.
7117 (expand_fold_extract_last): Adjust.
7118 * config/riscv/riscv.cc (vector_zero_call_used_regs): Adjust.
7119 * config/riscv/vector.md: Adjust.
7121 2023-08-31 Haochen Gui <guihaoc@gcc.gnu.org>
7124 * config/rs6000/rs6000-string.cc (expand_block_move): Call vector
7125 load/store with length only on 64-bit Power10.
7127 2023-08-31 Claudiu Zissulescu <claziss@gmail.com>
7129 * config/arc/arc.cc (arc_split_mov_const): Use LSL16 only when
7130 SWAP option is enabled.
7131 * config/arc/arc.md (ashlsi2_cnt16): Likewise.
7133 2023-08-31 Stamatis Markianos-Wright <stam.markianos-wright@arm.com>
7135 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90, vcaddq_rot270):
7136 Use common insn for signed and unsigned front-end definitions.
7137 * config/arm/arm_mve_builtins.def
7138 (vcaddq_rot90_m_u, vcaddq_rot270_m_u): Make common.
7139 (vcaddq_rot90_m_s, vcaddq_rot270_m_s): Remove.
7140 * config/arm/iterators.md (mve_insn): Merge signed and unsigned defs.
7143 (mve_rot): Likewise.
7145 (VxCADDQ_M): Likewise.
7146 * config/arm/unspecs.md (unspec): Likewise.
7147 * config/arm/mve.md: Fix minor typo.
7149 2023-08-31 liuhongt <hongtao.liu@intel.com>
7151 * config/i386/sse.md (<avx512>_blendm<mode>): Merge
7152 VF_AVX512HFBFVL into VI12HFBF_AVX512VL.
7153 (VF_AVX512HFBF16): Renamed to VHFBF.
7154 (VF_AVX512FP16VL): Renamed to VHF_AVX512VL.
7155 (VF_AVX512FP16): Removed.
7156 (div<mode>3): Adjust VF_AVX512FP16VL to VHF_AVX512VL.
7157 (avx512fp16_rcp<mode>2<mask_name>): Ditto.
7158 (rsqrt<mode>2): Ditto.
7159 (<sse>_rsqrt<mode>2<mask_name>): Ditto.
7160 (vcond<mode><code>): Ditto.
7161 (vcond<sseintvecmodelower><mode>): Ditto.
7162 (<avx512>_fmaddc_<mode>_mask1<round_expand_name>): Ditto.
7163 (<avx512>_fmaddc_<mode>_maskz<round_expand_name>): Ditto.
7164 (<avx512>_fcmaddc_<mode>_mask1<round_expand_name>): Ditto.
7165 (<avx512>_fcmaddc_<mode>_maskz<round_expand_name>): Ditto.
7166 (cmla<conj_op><mode>4): Ditto.
7167 (fma_<mode>_fadd_fmul): Ditto.
7168 (fma_<mode>_fadd_fcmul): Ditto.
7169 (fma_<complexopname>_<mode>_fma_zero): Ditto.
7170 (fma_<mode>_fmaddc_bcst): Ditto.
7171 (fma_<mode>_fcmaddc_bcst): Ditto.
7172 (<avx512>_<complexopname>_<mode>_mask<round_name>): Ditto.
7173 (cmul<conj_op><mode>3): Ditto.
7174 (<avx512>_<complexopname>_<mode><maskc_name><round_name>):
7176 (vec_unpacks_lo_<mode>): Ditto.
7177 (vec_unpacks_hi_<mode>): Ditto.
7178 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7179 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
7180 (*vec_extract<mode>_0): Ditto.
7181 (*<avx512>_cmp<mode>3): Extend to V48H_AVX512VL.
7183 2023-08-31 Lehua Ding <lehua.ding@rivai.ai>
7186 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Remove condition.
7188 2023-08-31 Jiufu Guo <guojiufu@linux.ibm.com>
7190 * range-op-mixed.h (operator_plus::overflow_free_p): New declare.
7191 (operator_minus::overflow_free_p): New declare.
7192 (operator_mult::overflow_free_p): New declare.
7193 * range-op.cc (range_op_handler::overflow_free_p): New function.
7194 (range_operator::overflow_free_p): New default function.
7195 (operator_plus::overflow_free_p): New function.
7196 (operator_minus::overflow_free_p): New function.
7197 (operator_mult::overflow_free_p): New function.
7198 * range-op.h (range_op_handler::overflow_free_p): New declare.
7199 (range_operator::overflow_free_p): New declare.
7200 * value-range.cc (irange::nonnegative_p): New function.
7201 (irange::nonpositive_p): New function.
7202 * value-range.h (irange::nonnegative_p): New declare.
7203 (irange::nonpositive_p): New declare.
7205 2023-08-30 Dimitar Dimitrov <dimitar@dinux.eu>
7208 * config/pru/predicates.md (const_0_operand): New predicate.
7209 (pru_cstore_comparison_operator): Ditto.
7210 * config/pru/pru.md (cstore<mode>4): New pattern.
7213 2023-08-30 Richard Biener <rguenther@suse.de>
7215 PR tree-optimization/111228
7216 * match.pd ((vec_perm (vec_perm ..) @5 ..) -> (vec_perm @x @5 ..)):
7217 New simplifications.
7219 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7221 * config/riscv/autovec.md (movmisalign<mode>): Delete.
7223 2023-08-30 Die Li <lidie@eswincomputing.com>
7224 Fei Gao <gaofei@eswincomputing.com>
7226 * config/riscv/peephole.md: New pattern.
7227 * config/riscv/predicates.md (a0a1_reg_operand): New predicate.
7228 (zcmp_mv_sreg_operand): New predicate.
7229 * config/riscv/riscv.md: New predicate.
7230 * config/riscv/zc.md (*mva01s<X:mode>): New pattern.
7231 (*mvsa01<X:mode>): New pattern.
7233 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
7235 * config/riscv/riscv.cc
7236 (riscv_zcmp_can_use_popretz): true if popretz can be used
7237 (riscv_gen_multi_pop_insn): interface to generate cm.pop[ret][z]
7238 (riscv_expand_epilogue): expand cm.pop[ret][z] in epilogue
7239 * config/riscv/riscv.md: define A0_REGNUM
7240 * config/riscv/zc.md
7241 (@gpr_multi_popretz_up_to_ra_<mode>): md for popretz ra
7242 (@gpr_multi_popretz_up_to_s0_<mode>): md for popretz ra, s0
7243 (@gpr_multi_popretz_up_to_s1_<mode>): likewise
7244 (@gpr_multi_popretz_up_to_s2_<mode>): likewise
7245 (@gpr_multi_popretz_up_to_s3_<mode>): likewise
7246 (@gpr_multi_popretz_up_to_s4_<mode>): likewise
7247 (@gpr_multi_popretz_up_to_s5_<mode>): likewise
7248 (@gpr_multi_popretz_up_to_s6_<mode>): likewise
7249 (@gpr_multi_popretz_up_to_s7_<mode>): likewise
7250 (@gpr_multi_popretz_up_to_s8_<mode>): likewise
7251 (@gpr_multi_popretz_up_to_s9_<mode>): likewise
7252 (@gpr_multi_popretz_up_to_s11_<mode>): likewise
7254 2023-08-30 Fei Gao <gaofei@eswincomputing.com>
7256 * config/riscv/iterators.md
7257 (slot0_offset): slot 0 offset in stack GPRs area in bytes
7258 (slot1_offset): slot 1 offset in stack GPRs area in bytes
7259 (slot2_offset): likewise
7260 (slot3_offset): likewise
7261 (slot4_offset): likewise
7262 (slot5_offset): likewise
7263 (slot6_offset): likewise
7264 (slot7_offset): likewise
7265 (slot8_offset): likewise
7266 (slot9_offset): likewise
7267 (slot10_offset): likewise
7268 (slot11_offset): likewise
7269 (slot12_offset): likewise
7270 * config/riscv/predicates.md
7271 (stack_push_up_to_ra_operand): predicates of stack adjust pushing ra
7272 (stack_push_up_to_s0_operand): predicates of stack adjust pushing ra, s0
7273 (stack_push_up_to_s1_operand): likewise
7274 (stack_push_up_to_s2_operand): likewise
7275 (stack_push_up_to_s3_operand): likewise
7276 (stack_push_up_to_s4_operand): likewise
7277 (stack_push_up_to_s5_operand): likewise
7278 (stack_push_up_to_s6_operand): likewise
7279 (stack_push_up_to_s7_operand): likewise
7280 (stack_push_up_to_s8_operand): likewise
7281 (stack_push_up_to_s9_operand): likewise
7282 (stack_push_up_to_s11_operand): likewise
7283 (stack_pop_up_to_ra_operand): predicates of stack adjust poping ra
7284 (stack_pop_up_to_s0_operand): predicates of stack adjust poping ra, s0
7285 (stack_pop_up_to_s1_operand): likewise
7286 (stack_pop_up_to_s2_operand): likewise
7287 (stack_pop_up_to_s3_operand): likewise
7288 (stack_pop_up_to_s4_operand): likewise
7289 (stack_pop_up_to_s5_operand): likewise
7290 (stack_pop_up_to_s6_operand): likewise
7291 (stack_pop_up_to_s7_operand): likewise
7292 (stack_pop_up_to_s8_operand): likewise
7293 (stack_pop_up_to_s9_operand): likewise
7294 (stack_pop_up_to_s11_operand): likewise
7295 * config/riscv/riscv-protos.h
7296 (riscv_zcmp_valid_stack_adj_bytes_p):declaration
7297 * config/riscv/riscv.cc (struct riscv_frame_info): comment change
7298 (riscv_avoid_multi_push): helper function of riscv_use_multi_push
7299 (riscv_use_multi_push): true if multi push is used
7300 (riscv_multi_push_sregs_count): num of sregs in multi-push
7301 (riscv_multi_push_regs_count): num of regs in multi-push
7302 (riscv_16bytes_align): align to 16 bytes
7303 (riscv_stack_align): moved to a better place
7304 (riscv_save_libcall_count): no functional change
7305 (riscv_compute_frame_info): add zcmp frame info
7306 (riscv_for_each_saved_reg): save or restore fprs in specified slot for zcmp
7307 (riscv_adjust_multi_push_cfi_prologue): adjust cfi for cm.push
7308 (riscv_gen_multi_push_pop_insn): gen function for multi push and pop
7309 (get_multi_push_fpr_mask): get mask for the fprs pushed by cm.push
7310 (riscv_expand_prologue): allocate stack by cm.push
7311 (riscv_adjust_multi_pop_cfi_epilogue): adjust cfi for cm.pop[ret]
7312 (riscv_expand_epilogue): allocate stack by cm.pop[ret]
7313 (zcmp_base_adj): calculate stack adjustment base size
7314 (zcmp_additional_adj): calculate stack adjustment additional size
7315 (riscv_zcmp_valid_stack_adj_bytes_p): check if stack adjustment valid
7316 * config/riscv/riscv.h (RETURN_ADDR_MASK): mask of ra
7327 (S10_MASK): likewise
7328 (S11_MASK): likewise
7329 (MULTI_PUSH_GPR_MASK): GPR_MASK that cm.push can cover at most
7330 (ZCMP_MAX_SPIMM): max spimm value
7331 (ZCMP_SP_INC_STEP): zcmp sp increment step
7332 (ZCMP_INVALID_S0S10_SREGS_COUNTS): num of s0-s10
7333 (ZCMP_S0S11_SREGS_COUNTS): num of s0-s11
7334 (ZCMP_MAX_GRP_SLOTS): max slots of pushing and poping in zcmp
7335 (CALLEE_SAVED_FREG_NUMBER): get x of fsx(fs0 ~ fs11)
7336 * config/riscv/riscv.md: include zc.md
7337 * config/riscv/zc.md: New file. machine description for zcmp
7339 2023-08-30 Jakub Jelinek <jakub@redhat.com>
7341 PR tree-optimization/110914
7342 * tree-ssa-strlen.cc (strlen_pass::handle_builtin_memcpy): Don't call
7343 adjust_last_stmt unless len is known constant.
7345 2023-08-30 Jakub Jelinek <jakub@redhat.com>
7347 PR tree-optimization/111015
7348 * gimple-ssa-store-merging.cc
7349 (imm_store_chain_info::output_merged_store): Use wi::mask and
7350 wide_int_to_tree instead of unsigned HOST_WIDE_INT shift and
7351 build_int_cst to build BIT_AND_EXPR mask.
7353 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7355 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Add MASK_LEN_ variant.
7356 (call_may_clobber_ref_p_1): Ditto.
7357 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
7358 (get_alias_ptr_type_for_ptr_address): Ditto.
7360 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7362 * config/riscv/riscv-vsetvl.cc
7363 (vector_insn_info::get_avl_or_vl_reg): Fix bug.
7365 2023-08-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7367 * config/riscv/autovec-vls.md (movmisalign<mode>): New pattern.
7368 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Support
7371 2023-08-29 Philipp Tomsich <philipp.tomsich@vrull.eu>
7373 * config/riscv/zicond.md: New splitters to rewrite single bit
7374 sign extension as the condition to a czero in the desired form.
7376 2023-08-29 David Malcolm <dmalcolm@redhat.com>
7379 * doc/invoke.texi: Add -Wanalyzer-overlapping-buffers.
7381 2023-08-29 David Malcolm <dmalcolm@redhat.com>
7384 * Makefile.in (ANALYZER_OBJS): Add analyzer/ranges.o.
7386 2023-08-29 Jin Ma <jinma@linux.alibaba.com>
7388 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli):
7389 zvfh can generate zfa extended instruction fli.h, just like zfh.
7391 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
7392 Vineet Gupta <vineetg@rivosinc.com>
7394 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins): Generate
7395 __riscv_unaligned_avoid with value 1 or
7396 __riscv_unaligned_slow with value 1 or
7397 __riscv_unaligned_fast with value 1
7398 * config/riscv/riscv.cc (riscv_option_override): Define
7399 riscv_user_wants_strict_align. Set
7400 riscv_user_wants_strict_align to TARGET_STRICT_ALIGN
7401 * config/riscv/riscv.h: Declare riscv_user_wants_strict_align
7403 2023-08-29 Edwin Lu <ewlu@rivosinc.com>
7405 * config/riscv/autovec-vls.md: Update types
7406 * config/riscv/riscv.md: Add vector placeholder type
7407 * config/riscv/vector.md: Update types
7409 2023-08-29 Carl Love <cel@us.ibm.com>
7411 * config/rs6000/dfp.md (UNSPEC_DQUAN): New unspec.
7412 (dfp_dqua_<mode>, dfp_dquai_<mode>): New define_insn.
7413 * config/rs6000/rs6000-builtins.def (__builtin_dfp_dqua,
7414 __builtin_dfp_dquai, __builtin_dfp_dquaq, __builtin_dfp_dquaqi):
7415 New buit-in definitions.
7416 * config/rs6000/rs6000-overload.def (__builtin_dfp_quantize): New
7417 overloaded definition.
7418 * doc/extend.texi: Add documentation for __builtin_dfp_quantize.
7420 2023-08-29 Pan Li <pan2.li@intel.com>
7421 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
7423 * config/riscv/riscv.cc (riscv_legitimize_poly_move): New declaration.
7424 (riscv_legitimize_const_move): Handle ref plus const poly.
7426 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7428 * common/config/riscv/riscv-common.cc
7429 (riscv_implied_info): Add implications from unprivileged extensions.
7430 (riscv_ext_version_table): Add stub support for all unprivileged
7431 extensions supported by Binutils as well as 'Zce', 'Zcmp', 'Zcmt'.
7433 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7435 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7436 Add stub support for all vendor extensions supported by Binutils.
7438 2023-08-29 Tsukasa OI <research_trasio@irq.a4lg.com>
7440 * common/config/riscv/riscv-common.cc
7441 (riscv_implied_info): Add implications from privileged extensions.
7442 (riscv_ext_version_table): Add stub support for all privileged
7443 extensions supported by Binutils.
7445 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
7447 * config/riscv/autovec.md: Adjust
7448 * config/riscv/riscv-protos.h (RVV_VUNDEF): Clean.
7449 (get_vlmax_rtx): Exported.
7450 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Deleted.
7451 (emit_vlmax_masked_gather_mu_insn): Adjust.
7452 (get_vlmax_rtx): New func.
7453 (expand_load_store): Adjust.
7454 (expand_cond_len_unop): Call expand_cond_len_op.
7455 (expand_cond_len_op): New subroutine.
7456 (expand_cond_len_binop): Call expand_cond_len_op.
7457 (expand_cond_len_ternop): Call expand_cond_len_op.
7458 (expand_lanes_load_store): Adjust.
7460 2023-08-29 Jakub Jelinek <jakub@redhat.com>
7463 PR middle-end/111209
7464 * tree-ssa-math-opts.cc (match_uaddc_usubc): Match also
7465 just 2 limb uaddc/usubc with 0 carry-in on lower limb and ignored
7466 carry-out on higher limb. Don't match it though if it could be
7467 matched later on 4 argument addition/subtraction.
7469 2023-08-29 Andrew Pinski <apinski@marvell.com>
7471 PR tree-optimization/111147
7472 * match.pd (`(x | y) & (~x ^ y)`) Use bitwise_inverted_equal_p
7473 instead of matching bit_not.
7475 2023-08-29 Christophe Lyon <christophe.lyon@linaro.org>
7477 * config/arm/arm-mve-builtins.cc (type_suffixes): Add missing
7480 2023-08-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7482 * config/riscv/riscv-vsetvl.cc (vector_insn_info::get_avl_or_vl_reg): New function.
7483 (pass_vsetvl::compute_local_properties): Fix bug.
7484 (pass_vsetvl::commit_vsetvls): Ditto.
7485 * config/riscv/riscv-vsetvl.h: New function.
7487 2023-08-29 Lehua Ding <lehua.ding@rivai.ai>
7490 * config/riscv/predicates.md (vector_const_int_or_double_0_operand):
7492 * config/riscv/riscv-vector-builtins.cc (function_expander::function_expander):
7493 force_reg mem target operand.
7494 * config/riscv/vector.md (@pred_mov<mode>): Wrapper.
7495 (*pred_mov<mode>): Remove imm -> reg pattern.
7496 (*pred_broadcast<mode>_imm): Add imm -> reg pattern.
7498 2023-08-29 Lulu Cheng <chenglulu@loongson.cn>
7500 * common/config/loongarch/loongarch-common.cc:
7501 Enable '-free' on O2 and above.
7502 * doc/invoke.texi: Modify the description information
7503 of the '-free' compilation option and add the LoongArch
7506 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
7508 * doc/extend.texi: Fix the description of __builtin_riscv_pause.
7510 2023-08-28 Tsukasa OI <research_trasio@irq.a4lg.com>
7512 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
7513 Implement the 'Zihintpause' extension, version 2.0.
7514 (riscv_ext_flag_table) Add 'Zihintpause' handling.
7515 * config/riscv/riscv-builtins.cc: Remove availability predicate
7516 "always" and add "hint_pause".
7517 (riscv_builtins) : Add "pause" extension.
7518 * config/riscv/riscv-opts.h (MASK_ZIHINTPAUSE, TARGET_ZIHINTPAUSE): New.
7519 * config/riscv/riscv.md (riscv_pause): Adjust output based on
7522 2023-08-28 Andrew Pinski <apinski@marvell.com>
7524 * match.pd (`(X & ~Y) | (~X & Y)`): Use bitwise_inverted_equal_p
7525 instead of specifically checking for ~X.
7527 2023-08-28 Andrew Pinski <apinski@marvell.com>
7529 PR tree-optimization/111146
7530 * match.pd (`(x | y) & ~x`, `(x & y) | ~x`): Remove
7533 2023-08-28 Andrew Pinski <apinski@marvell.com>
7535 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Add dump information
7536 when resimplify returns true.
7537 (match_simplify_replacement): Print only if accepted the match-and-simplify
7538 result rather than the full sequence.
7540 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7542 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Skip
7544 (pass_vsetvl::compute_probabilities): Fix unitialized probability.
7546 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7548 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::earliest_fusion): Fix bug.
7550 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7552 * config/arm/arm-mve-builtins-base.cc (vmullbq_poly)
7553 (vmulltq_poly): New.
7554 * config/arm/arm-mve-builtins-base.def (vmullbq_poly)
7555 (vmulltq_poly): New.
7556 * config/arm/arm-mve-builtins-base.h (vmullbq_poly)
7557 (vmulltq_poly): New.
7558 * config/arm/arm_mve.h (vmulltq_poly): Remove.
7559 (vmullbq_poly): Remove.
7560 (vmullbq_poly_m): Remove.
7561 (vmulltq_poly_m): Remove.
7562 (vmullbq_poly_x): Remove.
7563 (vmulltq_poly_x): Remove.
7564 (vmulltq_poly_p8): Remove.
7565 (vmullbq_poly_p8): Remove.
7566 (vmulltq_poly_p16): Remove.
7567 (vmullbq_poly_p16): Remove.
7568 (vmullbq_poly_m_p8): Remove.
7569 (vmullbq_poly_m_p16): Remove.
7570 (vmulltq_poly_m_p8): Remove.
7571 (vmulltq_poly_m_p16): Remove.
7572 (vmullbq_poly_x_p8): Remove.
7573 (vmullbq_poly_x_p16): Remove.
7574 (vmulltq_poly_x_p8): Remove.
7575 (vmulltq_poly_x_p16): Remove.
7576 (__arm_vmulltq_poly_p8): Remove.
7577 (__arm_vmullbq_poly_p8): Remove.
7578 (__arm_vmulltq_poly_p16): Remove.
7579 (__arm_vmullbq_poly_p16): Remove.
7580 (__arm_vmullbq_poly_m_p8): Remove.
7581 (__arm_vmullbq_poly_m_p16): Remove.
7582 (__arm_vmulltq_poly_m_p8): Remove.
7583 (__arm_vmulltq_poly_m_p16): Remove.
7584 (__arm_vmullbq_poly_x_p8): Remove.
7585 (__arm_vmullbq_poly_x_p16): Remove.
7586 (__arm_vmulltq_poly_x_p8): Remove.
7587 (__arm_vmulltq_poly_x_p16): Remove.
7588 (__arm_vmulltq_poly): Remove.
7589 (__arm_vmullbq_poly): Remove.
7590 (__arm_vmullbq_poly_m): Remove.
7591 (__arm_vmulltq_poly_m): Remove.
7592 (__arm_vmullbq_poly_x): Remove.
7593 (__arm_vmulltq_poly_x): Remove.
7595 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7597 * config/arm/arm-mve-builtins-functions.h (class
7598 unspec_mve_function_exact_insn_vmull_poly): New.
7600 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7602 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_poly): New.
7603 * config/arm/arm-mve-builtins-shapes.h (binary_widen_poly): New.
7605 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7607 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): Add
7608 support for 'U' and 'p' format specifiers.
7610 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7612 * config/arm/arm-mve-builtins.cc (type_suffixes): Handle poly_p
7614 (TYPES_poly_8_16): New.
7616 * config/arm/arm-mve-builtins.def (p8): New type suffix.
7618 * config/arm/arm-mve-builtins.h (enum type_class_index): Add
7620 (struct type_suffix_info): Add poly_p field.
7622 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7624 * config/arm/arm-mve-builtins-base.cc (vmullbq_int, vmulltq_int):
7626 * config/arm/arm-mve-builtins-base.def (vmullbq_int, vmulltq_int):
7628 * config/arm/arm-mve-builtins-base.h (vmullbq_int, vmulltq_int):
7630 * config/arm/arm_mve.h (vmulltq_int): Remove.
7631 (vmullbq_int): Remove.
7632 (vmullbq_int_m): Remove.
7633 (vmulltq_int_m): Remove.
7634 (vmullbq_int_x): Remove.
7635 (vmulltq_int_x): Remove.
7636 (vmulltq_int_u8): Remove.
7637 (vmullbq_int_u8): Remove.
7638 (vmulltq_int_s8): Remove.
7639 (vmullbq_int_s8): Remove.
7640 (vmulltq_int_u16): Remove.
7641 (vmullbq_int_u16): Remove.
7642 (vmulltq_int_s16): Remove.
7643 (vmullbq_int_s16): Remove.
7644 (vmulltq_int_u32): Remove.
7645 (vmullbq_int_u32): Remove.
7646 (vmulltq_int_s32): Remove.
7647 (vmullbq_int_s32): Remove.
7648 (vmullbq_int_m_s8): Remove.
7649 (vmullbq_int_m_s32): Remove.
7650 (vmullbq_int_m_s16): Remove.
7651 (vmullbq_int_m_u8): Remove.
7652 (vmullbq_int_m_u32): Remove.
7653 (vmullbq_int_m_u16): Remove.
7654 (vmulltq_int_m_s8): Remove.
7655 (vmulltq_int_m_s32): Remove.
7656 (vmulltq_int_m_s16): Remove.
7657 (vmulltq_int_m_u8): Remove.
7658 (vmulltq_int_m_u32): Remove.
7659 (vmulltq_int_m_u16): Remove.
7660 (vmullbq_int_x_s8): Remove.
7661 (vmullbq_int_x_s16): Remove.
7662 (vmullbq_int_x_s32): Remove.
7663 (vmullbq_int_x_u8): Remove.
7664 (vmullbq_int_x_u16): Remove.
7665 (vmullbq_int_x_u32): Remove.
7666 (vmulltq_int_x_s8): Remove.
7667 (vmulltq_int_x_s16): Remove.
7668 (vmulltq_int_x_s32): Remove.
7669 (vmulltq_int_x_u8): Remove.
7670 (vmulltq_int_x_u16): Remove.
7671 (vmulltq_int_x_u32): Remove.
7672 (__arm_vmulltq_int_u8): Remove.
7673 (__arm_vmullbq_int_u8): Remove.
7674 (__arm_vmulltq_int_s8): Remove.
7675 (__arm_vmullbq_int_s8): Remove.
7676 (__arm_vmulltq_int_u16): Remove.
7677 (__arm_vmullbq_int_u16): Remove.
7678 (__arm_vmulltq_int_s16): Remove.
7679 (__arm_vmullbq_int_s16): Remove.
7680 (__arm_vmulltq_int_u32): Remove.
7681 (__arm_vmullbq_int_u32): Remove.
7682 (__arm_vmulltq_int_s32): Remove.
7683 (__arm_vmullbq_int_s32): Remove.
7684 (__arm_vmullbq_int_m_s8): Remove.
7685 (__arm_vmullbq_int_m_s32): Remove.
7686 (__arm_vmullbq_int_m_s16): Remove.
7687 (__arm_vmullbq_int_m_u8): Remove.
7688 (__arm_vmullbq_int_m_u32): Remove.
7689 (__arm_vmullbq_int_m_u16): Remove.
7690 (__arm_vmulltq_int_m_s8): Remove.
7691 (__arm_vmulltq_int_m_s32): Remove.
7692 (__arm_vmulltq_int_m_s16): Remove.
7693 (__arm_vmulltq_int_m_u8): Remove.
7694 (__arm_vmulltq_int_m_u32): Remove.
7695 (__arm_vmulltq_int_m_u16): Remove.
7696 (__arm_vmullbq_int_x_s8): Remove.
7697 (__arm_vmullbq_int_x_s16): Remove.
7698 (__arm_vmullbq_int_x_s32): Remove.
7699 (__arm_vmullbq_int_x_u8): Remove.
7700 (__arm_vmullbq_int_x_u16): Remove.
7701 (__arm_vmullbq_int_x_u32): Remove.
7702 (__arm_vmulltq_int_x_s8): Remove.
7703 (__arm_vmulltq_int_x_s16): Remove.
7704 (__arm_vmulltq_int_x_s32): Remove.
7705 (__arm_vmulltq_int_x_u8): Remove.
7706 (__arm_vmulltq_int_x_u16): Remove.
7707 (__arm_vmulltq_int_x_u32): Remove.
7708 (__arm_vmulltq_int): Remove.
7709 (__arm_vmullbq_int): Remove.
7710 (__arm_vmullbq_int_m): Remove.
7711 (__arm_vmulltq_int_m): Remove.
7712 (__arm_vmullbq_int_x): Remove.
7713 (__arm_vmulltq_int_x): Remove.
7715 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7717 * config/arm/arm-mve-builtins-shapes.cc (binary_widen): New.
7718 * config/arm/arm-mve-builtins-shapes.h (binary_widen): New.
7720 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7722 * config/arm/arm-mve-builtins-functions.h (class
7723 unspec_mve_function_exact_insn_vmull): New.
7725 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7727 * config/arm/iterators.md (mve_insn): Add vmullb, vmullt.
7728 (isu): Add VMULLBQ_INT_S, VMULLBQ_INT_U, VMULLTQ_INT_S,
7730 (supf): Add VMULLBQ_POLY_P, VMULLTQ_POLY_P, VMULLBQ_POLY_M_P,
7732 (VMULLBQ_INT, VMULLTQ_INT, VMULLBQ_INT_M, VMULLTQ_INT_M): Delete.
7733 (VMULLxQ_INT, VMULLxQ_POLY, VMULLxQ_INT_M, VMULLxQ_POLY_M): New.
7734 * config/arm/mve.md (mve_vmullbq_int_<supf><mode>)
7735 (mve_vmulltq_int_<supf><mode>): Merge into ...
7736 (@mve_<mve_insn>q_int_<supf><mode>) ... this.
7737 (mve_vmulltq_poly_p<mode>, mve_vmullbq_poly_p<mode>): Merge into ...
7738 (@mve_<mve_insn>q_poly_<supf><mode>): ... this.
7739 (mve_vmullbq_int_m_<supf><mode>, mve_vmulltq_int_m_<supf><mode>): Merge into ...
7740 (@mve_<mve_insn>q_int_m_<supf><mode>): ... this.
7741 (mve_vmullbq_poly_m_p<mode>, mve_vmulltq_poly_m_p<mode>): Merge into ...
7742 (@mve_<mve_insn>q_poly_m_<supf><mode>): ... this.
7744 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7746 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type):
7749 2023-08-28 Christophe Lyon <christophe.lyon@linaro.org>
7751 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): Fix loop bound.
7752 (binary_acca_int64): Likewise.
7754 2023-08-28 Aldy Hernandez <aldyh@redhat.com>
7756 * range-op-float.cc (fold_range): Handle relations.
7758 2023-08-28 Lulu Cheng <chenglulu@loongson.cn>
7760 * config/loongarch/loongarch.cc (loongarch_expand_conditional_move):
7761 Optimize the function implementation.
7763 2023-08-28 liuhongt <hongtao.liu@intel.com>
7766 * config/i386/sse.md (V48_AVX2): Rename to ..
7767 (V48_128_256): .. this.
7768 (ssefltmodesuffix): Extend to V4SF/V8SF/V2DF/V4DF.
7769 (<avx_avx2>_maskload<ssemodesuffix><avxsizesuffix>): Change
7770 V48_AVX2 to V48_128_256, also generate vmaskmov{ps,pd} for
7771 integral modes when TARGET_AVX2 is not available.
7772 (<avx_avx2>_maskstore<ssemodesuffix><avxsizesuffix>): Ditto.
7773 (maskload<mode><sseintvecmodelower>): Change V48_AVX2 to
7775 (maskstore<mode><sseintvecmodelower>): Ditto.
7777 2023-08-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7779 * config/riscv/riscv-vsetvl.cc (vsetvl_vtype_change_only_p):
7781 (after_or_same_p): Ditto.
7782 (find_reg_killed_by): Delete.
7783 (has_vsetvl_killed_avl_p): Ditto.
7784 (anticipatable_occurrence_p): Refactor.
7785 (any_set_in_bb_p): Delete.
7786 (count_regno_occurrences): Ditto.
7787 (backward_propagate_worthwhile_p): Ditto.
7788 (demands_can_be_fused_p): Ditto.
7789 (earliest_pred_can_be_fused_p): New function.
7790 (vsetvl_dominated_by_p): Ditto.
7791 (vector_insn_info::parse_insn): Refactor.
7792 (vector_insn_info::merge): Refactor.
7793 (vector_insn_info::dump): Refactor.
7794 (vector_infos_manager::vector_infos_manager): Refactor.
7795 (vector_infos_manager::all_empty_predecessor_p): Delete.
7796 (vector_infos_manager::all_same_avl_p): Ditto.
7797 (vector_infos_manager::create_bitmap_vectors): Refactor.
7798 (vector_infos_manager::free_bitmap_vectors): Refactor.
7799 (vector_infos_manager::dump): Refactor.
7800 (pass_vsetvl::update_block_info): New function.
7801 (enum fusion_type): Ditto.
7802 (pass_vsetvl::get_backward_fusion_type): Delete.
7803 (pass_vsetvl::hard_empty_block_p): Ditto.
7804 (pass_vsetvl::backward_demand_fusion): Ditto.
7805 (pass_vsetvl::forward_demand_fusion): Ditto.
7806 (pass_vsetvl::demand_fusion): Ditto.
7807 (pass_vsetvl::cleanup_illegal_dirty_blocks): Ditto.
7808 (pass_vsetvl::compute_local_properties): Ditto.
7809 (pass_vsetvl::earliest_fusion): New function.
7810 (pass_vsetvl::vsetvl_fusion): Ditto.
7811 (pass_vsetvl::commit_vsetvls): Refactor.
7812 (get_first_vsetvl_before_rvv_insns): Ditto.
7813 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
7814 (pass_vsetvl::cleanup_earliest_vsetvls): New function.
7815 (pass_vsetvl::df_post_optimization): Refactor.
7816 (pass_vsetvl::lazy_vsetvl): Ditto.
7817 * config/riscv/riscv-vsetvl.h: Ditto.
7819 2023-08-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
7821 * config/riscv/autovec.md (len_fold_extract_last_<mode>): New pattern.
7822 * config/riscv/riscv-protos.h (enum insn_type): New enum.
7823 (expand_fold_extract_last): New function.
7824 * config/riscv/riscv-v.cc (emit_nonvlmax_slide_insn): Ditto.
7825 (emit_cpop_insn): Ditto.
7826 (emit_nonvlmax_compress_insn): Ditto.
7827 (expand_fold_extract_last): Ditto.
7828 * config/riscv/vector.md: Fix vcpop.m ratio demand.
7830 2023-08-25 Edwin Lu <ewlu@rivosinc.com>
7832 * config/riscv/sync-rvwmo.md: updated types to "multi" or
7833 "atomic" based on number of assembly lines generated
7834 * config/riscv/sync-ztso.md: likewise
7835 * config/riscv/sync.md: likewise
7837 2023-08-25 Jin Ma <jinma@linux.alibaba.com>
7839 * common/config/riscv/riscv-common.cc: Add zfa extension version, which depends on
7841 * config/riscv/constraints.md (zfli): Constrain the floating point number that the
7842 instructions FLI.H/S/D can load.
7843 * config/riscv/iterators.md (ceil): New.
7844 * config/riscv/riscv-opts.h (MASK_ZFA): New.
7846 * config/riscv/riscv-protos.h (riscv_float_const_rtx_index_for_fli): New.
7847 * config/riscv/riscv.cc (riscv_float_const_rtx_index_for_fli): New.
7848 (riscv_cannot_force_const_mem): If instruction FLI.H/S/D can be used, memory is
7850 (riscv_const_insns): Likewise.
7851 (riscv_legitimize_const_move): Likewise.
7852 (riscv_split_64bit_move_p): If instruction FLI.H/S/D can be used, no split is
7854 (riscv_split_doubleword_move): Likewise.
7855 (riscv_output_move): Output the mov instructions in zfa extension.
7856 (riscv_print_operand): Output the floating-point value of the FLI.H/S/D immediate
7858 (riscv_secondary_memory_needed): Likewise.
7859 * config/riscv/riscv.md (fminm<mode>3): New.
7860 (fmaxm<mode>3): New.
7861 (movsidf2_low_rv32): New.
7862 (movsidf2_high_rv32): New.
7863 (movdfsisi3_rv32): New.
7864 (f<quiet_pattern>_quiet<ANYF:mode><X:mode>4_zfa): New.
7865 * config/riscv/riscv.opt: New.
7867 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
7870 * omp-general.cc (omp_runtime_api_procname): New.
7871 (omp_runtime_api_call): Moved here from omp-low.cc, and make
7873 * omp-general.h: Include omp-api.h.
7874 * omp-low.cc (omp_runtime_api_call): Delete this copy.
7876 2023-08-25 Sandra Loosemore <sandra@codesourcery.com>
7878 * doc/generic.texi (OpenMP): Document OMP_STRUCTURED_BLOCK.
7879 * doc/gimple.texi (GIMPLE instruction set): Add
7880 GIMPLE_OMP_STRUCTURED_BLOCK.
7881 (GIMPLE_OMP_STRUCTURED_BLOCK): New subsection.
7882 * gimple-low.cc (lower_stmt): Error on GIMPLE_OMP_STRUCTURED_BLOCK.
7883 * gimple-pretty-print.cc (dump_gimple_omp_block): Handle
7884 GIMPLE_OMP_STRUCTURED_BLOCK.
7885 (pp_gimple_stmt_1): Likewise.
7886 * gimple-walk.cc (walk_gimple_stmt): Likewise.
7887 * gimple.cc (gimple_build_omp_structured_block): New.
7888 * gimple.def (GIMPLE_OMP_STRUCTURED_BLOCK): New.
7889 * gimple.h (gimple_build_omp_structured_block): Declare.
7890 (gimple_has_substatements): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
7891 (CASE_GIMPLE_OMP): Likewise.
7892 * gimplify.cc (is_gimple_stmt): Handle OMP_STRUCTURED_BLOCK.
7893 (gimplify_expr): Likewise.
7894 * omp-expand.cc (GIMPLE_OMP_STRUCTURED_BLOCK): Error on
7895 GIMPLE_OMP_STRUCTURED_BLOCK.
7896 * omp-low.cc (scan_omp_1_stmt): Handle GIMPLE_OMP_STRUCTURED_BLOCK.
7897 (lower_omp_1): Likewise.
7898 (diagnose_sb_1): Likewise.
7899 (diagnose_sb_2): Likewise.
7900 * tree-inline.cc (remap_gimple_stmt): Handle
7901 GIMPLE_OMP_STRUCTURED_BLOCK.
7902 (estimate_num_insns): Likewise.
7903 * tree-nested.cc (convert_nonlocal_reference_stmt): Likewise.
7904 (convert_local_reference_stmt): Likewise.
7905 (convert_gimple_call): Likewise.
7906 * tree-pretty-print.cc (dump_generic_node): Handle
7907 OMP_STRUCTURED_BLOCK.
7908 * tree.def (OMP_STRUCTURED_BLOCK): New.
7909 * tree.h (OMP_STRUCTURED_BLOCK_BODY): New.
7911 2023-08-25 Vineet Gupta <vineetg@rivosinc.com>
7913 * config/riscv/riscv.cc (riscv_rtx_costs): Adjust const_int
7914 cost. Add some comments about different constants handling.
7916 2023-08-25 Andrew Pinski <apinski@marvell.com>
7918 * match.pd (`a ? one_zero : one_zero`): Move
7919 below detection of minmax.
7921 2023-08-25 Andrew Pinski <apinski@marvell.com>
7923 * match.pd (`a | C -> C`): New pattern.
7925 2023-08-25 Uros Bizjak <ubizjak@gmail.com>
7927 * caller-save.cc (new_saved_hard_reg):
7928 Rename TRUE/FALSE to true/false.
7929 (setup_save_areas): Ditto.
7930 * gcc.cc (set_collect_gcc_options): Ditto.
7931 (driver::build_multilib_strings): Ditto.
7932 (print_multilib_info): Ditto.
7933 * genautomata.cc (gen_cpu_unit): Ditto.
7934 (gen_query_cpu_unit): Ditto.
7935 (gen_bypass): Ditto.
7936 (gen_excl_set): Ditto.
7937 (gen_presence_absence_set): Ditto.
7938 (gen_presence_set): Ditto.
7939 (gen_final_presence_set): Ditto.
7940 (gen_absence_set): Ditto.
7941 (gen_final_absence_set): Ditto.
7942 (gen_automaton): Ditto.
7943 (gen_regexp_repeat): Ditto.
7944 (gen_regexp_allof): Ditto.
7945 (gen_regexp_oneof): Ditto.
7946 (gen_regexp_sequence): Ditto.
7947 (process_decls): Ditto.
7948 (reserv_sets_are_intersected): Ditto.
7949 (initiate_excl_sets): Ditto.
7950 (form_reserv_sets_list): Ditto.
7951 (check_presence_pattern_sets): Ditto.
7952 (check_absence_pattern_sets): Ditto.
7953 (check_regexp_units_distribution): Ditto.
7954 (check_unit_distributions_to_automata): Ditto.
7955 (create_ainsns): Ditto.
7956 (output_insn_code_cases): Ditto.
7957 (output_internal_dead_lock_func): Ditto.
7958 (form_important_insn_automata_lists): Ditto.
7959 * gengtype-state.cc (read_state_files_list): Ditto.
7960 * gengtype.cc (main): Ditto.
7961 * gimple-array-bounds.cc (array_bounds_checker::check_array_bounds):
7963 * gimple.cc (gimple_build_call_from_tree): Ditto.
7964 (preprocess_case_label_vec_for_gimple): Ditto.
7965 * gimplify.cc (gimplify_call_expr): Ditto.
7966 * ordered-hash-map-tests.cc (test_map_of_int_to_strings): Ditto.
7968 2023-08-25 Richard Biener <rguenther@suse.de>
7970 PR tree-optimization/111137
7971 * tree-vect-data-refs.cc (vect_slp_analyze_load_dependences):
7972 Properly handle grouped stores from other SLP instances.
7974 2023-08-25 Richard Biener <rguenther@suse.de>
7976 * tree-vect-data-refs.cc (vect_slp_analyze_store_dependences):
7977 Split out from vect_slp_analyze_node_dependences, remove
7979 (vect_slp_analyze_load_dependences): Split out from
7980 vect_slp_analyze_node_dependences, adjust comments. Process
7981 queued stores before any disambiguation.
7982 (vect_slp_analyze_node_dependences): Remove.
7983 (vect_slp_analyze_instance_dependence): Adjust.
7985 2023-08-25 Aldy Hernandez <aldyh@redhat.com>
7987 * range-op-float.cc (frelop_early_resolve): Rewrite for better NAN
7989 (operator_not_equal::fold_range): Adjust for relations.
7990 (operator_lt::fold_range): Same.
7991 (operator_gt::fold_range): Same.
7992 (foperator_unordered_equal::fold_range): Same.
7993 (foperator_unordered_lt::fold_range): Same.
7994 (foperator_unordered_le::fold_range): Same.
7995 (foperator_unordered_gt::fold_range): Same.
7996 (foperator_unordered_ge::fold_range): Same.
7998 2023-08-25 Richard Biener <rguenther@suse.de>
8000 PR tree-optimization/111136
8001 * tree-vect-loop.cc (vect_dissolve_slp_only_groups): For
8002 stores force STMT_VINFO_STRIDED_P and also duplicate that
8005 2023-08-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8007 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_local_properties):
8010 2023-08-25 liuhongt <hongtao.liu@intel.com>
8012 * config/i386/sse.md (vec_set<mode>): Removed.
8013 (V_128H): Merge into ..
8015 (V_256H): Merge into ..
8017 (V_512): Add V32HF, V32BF.
8018 (*ssse3_palignr<mode>_perm): Adjust mode iterator from V_128H
8020 (vcond<mode><sseintvecmodelower>): Removed
8021 (vcondu<mode><sseintvecmodelower>): Removed.
8022 (avx_vbroadcastf128_<mode>): Refator from V_256H to V_256.
8024 2023-08-25 Hongyu Wang <hongyu.wang@intel.com>
8027 * config/i386/sse.md (avx512f_cvtne2ps2bf16_<mode>_maskz):
8028 Adjust paramter order.
8030 2023-08-24 Uros Bizjak <ubizjak@gmail.com>
8033 * config/i386/sse.md (*sse2_movq128_<mode>_1): New insn pattern.
8035 2023-08-24 David Malcolm <dmalcolm@redhat.com>
8038 * doc/invoke.texi (Static Analyzer Options): Add "strcat" to the
8039 list of functions known to the analyzer.
8041 2023-08-24 Richard Biener <rguenther@suse.de>
8043 PR tree-optimization/111123
8044 * tree-ssa-ccp.cc (pass_fold_builtins::execute): Do not
8045 remove indirect clobbers here ...
8046 * tree-outof-ssa.cc (rewrite_out_of_ssa): ... but here.
8047 (remove_indirect_clobbers): New function.
8049 2023-08-24 Jan Hubicka <jh@suse.cz>
8051 * cfg.h (struct control_flow_graph): New field full_profile.
8052 * auto-profile.cc (afdo_annotate_cfg): Set full_profile to true.
8053 * cfg.cc (init_flow): Set full_profile to false.
8054 * graphite.cc (graphite_transform_loops): Set full_profile to false.
8055 * lto-streamer-in.cc (input_cfg): Initialize full_profile flag.
8056 * predict.cc (pass_profile::execute): Set full_profile to true.
8057 * symtab-thunks.cc (expand_thunk): Set full_profile to true.
8058 * tree-cfg.cc (gimple_verify_flow_info): Verify that profile is full
8059 if full_profile is set.
8060 * tree-inline.cc (initialize_cfun): Initialize full_profile.
8061 (expand_call_inline): Combine full_profile.
8063 2023-08-24 Richard Biener <rguenther@suse.de>
8065 * tree-vect-slp.cc (vect_build_slp_tree_1): Rename
8066 load_p to ldst_p, fix mistakes and rely on
8067 STMT_VINFO_DATA_REF.
8069 2023-08-24 Jan Hubicka <jh@suse.cz>
8071 * gimple-harden-conditionals.cc (insert_check_and_trap): Set count
8072 of newly build trap bb.
8074 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8076 * config/riscv/riscv.cc (riscv_preferred_else_value): Remove it since
8077 it forbid COND_LEN_FMS/COND_LEN_FNMS STMT fold.
8078 (TARGET_PREFERRED_ELSE_VALUE): Ditto.
8080 2023-08-24 Robin Dapp <rdapp.gcc@gmail.com>
8082 * common/config/riscv/riscv-common.cc: Add -fsched-pressure.
8083 * config/riscv/riscv.cc (riscv_option_override): Set sched
8086 2023-08-24 Robin Dapp <rdapp@ventanamicro.com>
8088 * config/riscv/riscv.cc (riscv_print_operand): Allow vk operand.
8090 2023-08-24 Richard Biener <rguenther@suse.de>
8092 PR tree-optimization/111125
8093 * tree-vect-slp.cc (vect_slp_function): Split at novector
8094 loop entry, do not push blocks in novector loops.
8096 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
8098 * doc/extend.texi: Document the C [[__extension__ ...]] construct.
8100 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8102 * genmatch.cc (decision_tree::gen): Support
8103 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
8104 * gimple-match-exports.cc (gimple_simplify): Ditto.
8105 (gimple_resimplify6): New function.
8106 (gimple_resimplify7): New function.
8107 (gimple_match_op::resimplify): Support
8108 COND_LEN_FNMA/COND_LEN_FMS/COND_LEN_FNMS gimple fold.
8109 (convert_conditional_op): Ditto.
8110 (build_call_internal): Ditto.
8111 (try_conditional_simplification): Ditto.
8112 (gimple_extract): Ditto.
8113 * gimple-match.h (gimple_match_cond::gimple_match_cond): Ditto.
8114 * internal-fn.cc (CASE): Ditto.
8116 2023-08-24 Richard Biener <rguenther@suse.de>
8118 PR tree-optimization/111115
8119 * tree-vectorizer.h (vect_slp_child_index_for_operand): New.
8120 * tree-vect-data-refs.cc (can_group_stmts_p): Also group
8122 * tree-vect-slp.cc (arg3_arg2_map): New.
8123 (vect_get_operand_map): Handle IFN_MASK_STORE.
8124 (vect_slp_child_index_for_operand): New function.
8125 (vect_build_slp_tree_1): Handle statements with no LHS,
8127 (vect_remove_slp_scalar_calls): Likewise.
8128 * tree-vect-stmts.cc (vect_check_store_rhs): Lookup the
8129 SLP child corresponding to the ifn value index.
8130 (vectorizable_store): Likewise for the mask index. Support
8132 (vectorizable_load): Lookup the SLP child corresponding to the
8135 2023-08-24 Richard Biener <rguenther@suse.de>
8137 PR tree-optimization/111125
8138 * tree-vect-slp.cc (vectorizable_bb_reduc_epilogue): Account
8139 for the remain_defs processing.
8141 2023-08-24 Richard Sandiford <richard.sandiford@arm.com>
8143 * config/aarch64/aarch64.cc: Include ssa.h.
8144 (aarch64_multiply_add_p): Require the second operand of an
8145 Advanced SIMD subtraction to be a multiplication. Assume that
8146 such an operation won't be fused if the second operand is used
8147 multiple times and if the first operand is also a multiplication.
8149 2023-08-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8151 * tree-vect-loop.cc (vectorizable_reduction): Apply
8152 LEN_FOLD_EXTRACT_LAST.
8153 * tree-vect-stmts.cc (vectorizable_condition): Ditto.
8155 2023-08-24 Richard Biener <rguenther@suse.de>
8157 PR tree-optimization/111128
8158 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
8159 Emit external shift operand inline if we promoted it with
8160 another pattern stmt.
8162 2023-08-24 Pan Li <pan2.li@intel.com>
8164 * config/riscv/autovec.md: Fix typo.
8166 2023-08-24 Pan Li <pan2.li@intel.com>
8168 * config/riscv/riscv-vector-builtins-bases.cc
8169 (class binop_frm): Removed.
8170 (class reverse_binop_frm): Ditto.
8171 (class widen_binop_frm): Ditto.
8172 (class vfmacc_frm): Ditto.
8173 (class vfnmacc_frm): Ditto.
8174 (class vfmsac_frm): Ditto.
8175 (class vfnmsac_frm): Ditto.
8176 (class vfmadd_frm): Ditto.
8177 (class vfnmadd_frm): Ditto.
8178 (class vfmsub_frm): Ditto.
8179 (class vfnmsub_frm): Ditto.
8180 (class vfwmacc_frm): Ditto.
8181 (class vfwnmacc_frm): Ditto.
8182 (class vfwmsac_frm): Ditto.
8183 (class vfwnmsac_frm): Ditto.
8184 (class unop_frm): Ditto.
8185 (class vfrec7_frm): Ditto.
8186 (class binop): Add frm_op_type template arg.
8187 (class unop): Ditto.
8188 (class widen_binop): Ditto.
8189 (class widen_binop_fp): Ditto.
8190 (class reverse_binop): Ditto.
8191 (class vfmacc): Ditto.
8192 (class vfnmsac): Ditto.
8193 (class vfmadd): Ditto.
8194 (class vfnmsub): Ditto.
8195 (class vfnmacc): Ditto.
8196 (class vfmsac): Ditto.
8197 (class vfnmadd): Ditto.
8198 (class vfmsub): Ditto.
8199 (class vfwmacc): Ditto.
8200 (class vfwnmacc): Ditto.
8201 (class vfwmsac): Ditto.
8202 (class vfwnmsac): Ditto.
8203 (class float_misc): Ditto.
8205 2023-08-24 Andrew Pinski <apinski@marvell.com>
8207 PR tree-optimization/111109
8208 * match.pd (ior(cond,cond), ior(vec_cond,vec_cond)):
8209 Add check to make sure cmp and icmp are inverse.
8211 2023-08-24 Andrew Pinski <apinski@marvell.com>
8213 PR tree-optimization/95929
8214 * match.pd (convert?(-a)): New pattern
8215 for 1bit integer types.
8217 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8220 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8222 * common/config/i386/cpuinfo.h (get_available_features):
8223 Add avx10_set and version and detect avx10.1.
8224 (cpu_indicator_init): Handle avx10.1-512.
8225 * common/config/i386/i386-common.cc
8226 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
8227 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
8228 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
8229 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
8230 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
8231 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
8233 * common/config/i386/i386-cpuinfo.h (enum processor_features):
8234 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
8235 FEATURE_AVX10_512BIT.
8236 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
8237 AVX10_512BIT, AVX10_1 and AVX10_1_512.
8238 * config/i386/constraints.md (Yk): Add AVX10_1.
8241 * config/i386/cpuid.h (bit_AVX10): New.
8242 (bit_AVX10_256): Ditto.
8243 (bit_AVX10_512): Ditto.
8244 * config/i386/i386-c.cc (ix86_target_macros_internal):
8245 Define AVX10_512BIT and AVX10_1.
8246 * config/i386/i386-isa.def
8247 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
8248 (AVX10_1): Add DEF_PTA(AVX10_1).
8249 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
8250 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
8252 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
8253 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
8254 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
8255 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
8256 (ix86_conditional_register_usage): Ditto.
8257 (ix86_hard_regno_mode_ok): Ditto.
8258 (ix86_rtx_costs): Ditto.
8259 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
8260 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
8262 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
8263 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
8264 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
8267 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8270 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8272 * common/config/i386/i386-common.cc
8273 (ix86_check_avx10): New function to check isa_flags and
8274 isa_flags_explicit to emit warning when AVX10 is enabled
8276 (ix86_check_avx512): New function to check isa_flags and
8277 isa_flags_explicit to emit warning when AVX512 is enabled
8279 (ix86_handle_option): Do not change the flags when warning
8281 * config/i386/driver-i386.cc (host_detect_local_cpu):
8282 Do not append -mno-avx10.1 for -march=native.
8284 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8287 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8289 * common/config/i386/i386-common.cc
8290 (ix86_check_avx10_vector_width): New function to check isa_flags
8291 to emit a warning when there is a conflict in AVX10 options for
8293 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
8294 * config/i386/driver-i386.cc (host_detect_local_cpu):
8295 Do not append -mno-avx10-max-512bit for -march=native.
8297 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8300 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8302 * config/i386/avx512vldqintrin.h: Remove target attribute.
8303 * config/i386/i386-builtin.def (BDESC):
8304 Add OPTION_MASK_ISA2_AVX10_1.
8305 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
8306 * config/i386/i386-expand.cc
8307 (ix86_check_builtin_isa_match): Ditto.
8308 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
8309 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
8310 and avx10_1_or_avx512vl.
8311 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
8312 (VF1_128_256VLDQ_AVX10_1): Ditto.
8313 (VI8_AVX512VLDQ_AVX10_1): Ditto.
8314 (<sse>_andnot<mode>3<mask_name>):
8315 Add TARGET_AVX10_1 and change isa attr from avx512dq to
8316 avx10_1_or_avx512dq.
8317 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
8318 avx512vl to avx10_1_or_avx512vl.
8319 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
8320 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8321 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8323 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
8325 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
8326 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8327 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
8329 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
8330 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
8331 Remove target check.
8332 (avx512dq_mul<mode>3<mask_name>): Ditto.
8333 (*avx512dq_mul<mode>3<mask_name>): Ditto.
8334 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8335 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
8336 Remove target check.
8337 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
8338 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
8339 Remove target check.
8340 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
8341 (mask_avx512vl_condition): Ditto.
8344 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8347 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8349 * config/i386/avx512vldqintrin.h: Remove target attribute.
8350 * config/i386/i386-builtin.def (BDESC):
8351 Add OPTION_MASK_ISA2_AVX10_1.
8352 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
8353 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
8354 (VI48_AVX512VLDQ_AVX10_1): Ditto.
8355 (VF2_AVX512VL): Remove.
8356 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
8358 (*<code><mode>3<mask_name>): Change isa attribute to
8359 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
8360 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
8361 to avx10_1_or_avx512vl.
8362 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
8363 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8364 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
8366 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
8367 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
8368 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
8370 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
8371 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
8372 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
8373 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
8374 (float<floatunssuffix>v4div4sf2<mask_name>):
8376 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8377 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
8378 (float<floatunssuffix>v2div2sf2): Ditto.
8379 (float<floatunssuffix>v2div2sf2_mask): Ditto.
8380 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
8381 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
8382 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
8383 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
8384 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
8385 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
8386 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
8387 Change when constraint is enabled.
8389 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8392 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8394 * config/i386/avx512vldqintrin.h: Remove target attribute.
8395 * config/i386/i386-builtin.def (BDESC):
8396 Add OPTION_MASK_ISA2_AVX10_1.
8397 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
8398 (VFH_AVX512VLDQ_AVX10_1): Ditto.
8399 (VF1_AVX512VLDQ_AVX10_1): Ditto.
8400 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
8401 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8402 (vec_pack<floatprefix>_float_<mode>): Change iterator to
8403 VI8_AVX512VLDQ_AVX10_1. Remove target check.
8404 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
8405 VF1_AVX512VLDQ_AVX10_1. Remove target check.
8406 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8407 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
8408 (avx512vl_vextractf128<mode>): Change iterator to
8409 VI48F_256_DQVL_AVX10_1. Remove target check.
8410 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
8411 (vec_extract_hi_<mode>): Ditto.
8412 (avx512vl_vinsert<mode>): Ditto.
8413 (vec_set_lo_<mode><mask_name>): Ditto.
8414 (vec_set_hi_<mode><mask_name>): Ditto.
8415 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
8416 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
8417 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
8418 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8419 * config/i386/subst.md (mask_avx512dq_condition): Add
8421 (mask_scalar_merge): Ditto.
8423 2023-08-24 Haochen Jiang <haochen.jiang@intel.com>
8426 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
8429 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
8432 2023-08-24 Richard Biener <rguenther@suse.de>
8435 * dwarf2out.cc (prune_unused_types_walk): Handle
8436 DW_TAG_restrict_type, DW_TAG_shared_type, DW_TAG_atomic_type,
8437 DW_TAG_immutable_type, DW_TAG_coarray_type, DW_TAG_unspecified_type
8438 and DW_TAG_dynamic_type as to only output them when referenced.
8440 2023-08-24 liuhongt <hongtao.liu@intel.com>
8442 * config/i386/i386.cc (ix86_invalid_conversion): Adjust GCC
8445 2023-08-24 liuhongt <hongtao.liu@intel.com>
8447 * common/config/i386/i386-common.cc (processor_names): Add new
8448 member graniterapids-s and arrowlake-s.
8449 * config/i386/i386-options.cc (processor_alias_table): Update
8450 table with PROCESSOR_ARROWLAKE_S and
8451 PROCESSOR_GRANITERAPIDS_D.
8452 (m_GRANITERAPID_D): New macro.
8453 (m_ARROWLAKE_S): Ditto.
8454 (m_CORE_AVX512): Add m_GRANITERAPIDS_D.
8455 (processor_cost_table): Add icelake_cost for
8456 PROCESSOR_GRANITERAPIDS_D and alderlake_cost for
8457 PROCESSOR_ARROWLAKE_S.
8458 * config/i386/x86-tune.def: Hanlde m_ARROWLAKE_S same as
8460 * config/i386/i386.h (enum processor_type): Add new member
8461 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S.
8462 * config/i386/i386-c.cc (ix86_target_macros_internal): Handle
8463 PROCESSOR_GRANITERAPIDS_D and PROCESSOR_ARROWLAKE_S
8465 2023-08-23 Jivan Hakobyan <jivanhakobyan9@gmail.com>
8467 * lra-eliminations.cc (eliminate_regs_in_insn): Use equivalences to
8468 to help simplify code further.
8470 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
8472 * gimple-range-fold.cc (fold_using_range::range_of_phi): Tweak output.
8473 * gimple-range-phi.cc (phi_group::phi_group): Remove unused members.
8474 Initialize using a range instead of value and edge.
8475 (phi_group::calculate_using_modifier): Use initializer value and
8476 process for relations after trying for iteration convergence.
8477 (phi_group::refine_using_relation): Use initializer range.
8478 (phi_group::dump): Rework the dump output.
8479 (phi_analyzer::process_phi): Allow multiple constant initilizers.
8480 Dump groups immediately as created.
8481 (phi_analyzer::dump): Tweak output.
8482 * gimple-range-phi.h (phi_group::phi_group): Adjust prototype.
8483 (phi_group::initial_value): Delete.
8484 (phi_group::refine_using_relation): Adjust prototype.
8485 (phi_group::m_initial_value): Delete.
8486 (phi_group::m_initial_edge): Delete.
8487 (phi_group::m_vr): Use int_range_max.
8488 * tree-vrp.cc (execute_ranger_vrp): Don't dump phi groups.
8490 2023-08-23 Andrew MacLeod <amacleod@redhat.com>
8492 * gimple-range-phi.cc (phi_analyzer::operator[]): Return NULL if
8493 no group was created.
8494 (phi_analyzer::process_phi): Do not create groups of one phi node.
8496 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
8498 * target.def (gen_ccmp_first, gen_ccmp_next): Use rtx_code for
8499 CODE, CMP_CODE and BIT_CODE arguments.
8500 * config/aarch64/aarch64.cc (aarch64_gen_ccmp_first): Likewise.
8501 (aarch64_gen_ccmp_next): Likewise.
8502 * doc/tm.texi: Regenerated.
8504 2023-08-23 Richard Earnshaw <rearnsha@arm.com>
8506 * coretypes.h (rtx_code): Add forward declaration.
8507 * rtl.h (rtx_code): Make compatible with forward declaration.
8509 2023-08-23 Uros Bizjak <ubizjak@gmail.com>
8512 * config/i386/i386.md (*concat<any_or_plus:mode><dwi>3_3):
8513 Merge pattern from *concatditi3_3 and *concatsidi3_3 using
8514 DWIH mode iterator. Disable (=&r,m,m) alternative for
8516 (*concat<any_or_plus:mode><dwi>3_3): Disable (=&r,m,m)
8517 alternative for 32-bit targets.
8519 2023-08-23 Zhangjin Liao <liaozhangjin@eswincomputing.com>
8521 * config/riscv/bitmanip.md (*<bitmanip_optab>disi2_sext): Add a more
8522 appropriate type attribute.
8524 2023-08-23 Lehua Ding <lehua.ding@rivai.ai>
8526 * config/riscv/autovec-opt.md (*cond_abs<mode>): New combine pattern.
8527 (*copysign<mode>_neg): Ditto.
8528 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): Adjust.
8529 (<optab><mode>2): Ditto.
8530 (cond_<optab><mode>): New.
8531 (cond_len_<optab><mode>): Ditto.
8532 * config/riscv/riscv-protos.h (enum insn_type): New.
8533 (expand_cond_len_unop): New helper func.
8534 * config/riscv/riscv-v.cc (shuffle_merge_patterns): Adjust.
8535 (expand_cond_len_unop): New helper func.
8537 2023-08-23 Jan Hubicka <jh@suse.cz>
8539 * tree-ssa-loop-ch.cc (enum ch_decision): Fix comment.
8540 (should_duplicate_loop_header_p): Fix return value for static exits.
8541 (ch_base::copy_headers): Improve handling of ch_possible_zero_cost.
8543 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
8545 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
8546 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
8547 and update the final nest accordingly.
8549 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
8551 * tree-vect-stmts.cc (vectorizable_store): Move the handlings on
8552 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
8553 and update the final nest accordingly.
8555 2023-08-23 Kewen Lin <linkw@linux.ibm.com>
8557 * tree-vect-stmts.cc (vectorizable_store): Remove vec oprnds,
8558 adjust vec result_chain, vec_oprnd with auto_vec, and adjust
8559 gvec_oprnds with auto_delete_vec.
8561 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8563 * config/riscv/riscv-vsetvl.cc
8564 (pass_vsetvl::global_eliminate_vsetvl_insn): Fix potential ICE.
8566 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8568 * config/riscv/riscv-vsetvl.cc (ge_sew_ratio_unavailable_p):
8570 * config/riscv/riscv-vsetvl.def (DEF_SEW_LMUL_FUSE_RULE): Ditto.
8572 2023-08-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8574 * config/riscv/vector.md: Add attribute.
8576 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8578 * config/riscv/riscv-vsetvl.cc (change_insn): Clang format.
8579 (vector_infos_manager::all_same_ratio_p): Ditto.
8580 (vector_infos_manager::all_same_avl_p): Ditto.
8581 (pass_vsetvl::refine_vsetvls): Ditto.
8582 (pass_vsetvl::cleanup_vsetvls): Ditto.
8583 (pass_vsetvl::commit_vsetvls): Ditto.
8584 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
8585 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
8586 (pass_vsetvl::compute_probabilities): Ditto.
8588 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8590 * config/riscv/t-riscv: Add riscv-vsetvl.def
8592 2023-08-22 Vineet Gupta <vineetg@rivosinc.com>
8594 * config/riscv/riscv.opt: Add --param names
8595 riscv-autovec-preference and riscv-autovec-lmul
8597 2023-08-22 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
8599 * config/riscv/t-linux: Add MULTIARCH_DIRNAME.
8601 2023-08-22 Tobias Burnus <tobias@codesourcery.com>
8603 * tree-core.h (enum omp_clause_defaultmap_kind): Add
8604 OMP_CLAUSE_DEFAULTMAP_CATEGORY_ALL.
8605 * gimplify.cc (gimplify_scan_omp_clauses): Handle it.
8606 * tree-pretty-print.cc (dump_omp_clause): Likewise.
8608 2023-08-22 Jakub Jelinek <jakub@redhat.com>
8611 * doc/extend.texi (_Float<n>): Drop obsolete sentence that the
8612 types aren't supported in C++.
8614 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8616 * doc/md.texi: Add LEN_FOLD_EXTRACT_LAST pattern.
8617 * internal-fn.cc (fold_len_extract_direct): Ditto.
8618 (expand_fold_len_extract_optab_fn): Ditto.
8619 (direct_fold_len_extract_optab_supported_p): Ditto.
8620 * internal-fn.def (LEN_FOLD_EXTRACT_LAST): Ditto.
8621 * optabs.def (OPTAB_D): Ditto.
8623 2023-08-22 Richard Biener <rguenther@suse.de>
8625 * tree-vect-stmts.cc (vectorizable_store): Do not bump
8626 DR_GROUP_STORE_COUNT here. Remove early out.
8627 (vect_transform_stmt): Only call vectorizable_store on
8628 the last element of an interleaving chain.
8630 2023-08-22 Richard Biener <rguenther@suse.de>
8632 PR tree-optimization/94864
8633 PR tree-optimization/94865
8634 PR tree-optimization/93080
8635 * match.pd (bit_insert @0 (BIT_FIELD_REF @1 ..) ..): New pattern
8636 for vector insertion from vector extraction.
8638 2023-08-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8639 Kewen.Lin <linkw@linux.ibm.com>
8641 * tree-vect-loop.cc (vect_verify_loop_lens): Add exists check.
8642 (vectorizable_live_operation): Add live vectorization for length loop
8645 2023-08-22 David Malcolm <dmalcolm@redhat.com>
8648 * doc/invoke.texi: Remove -Wanalyzer-unterminated-string.
8650 2023-08-22 Pan Li <pan2.li@intel.com>
8652 * config/riscv/riscv-vector-builtins-bases.cc
8653 (vfwredusum_frm_obj): New declaration.
8655 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8656 * config/riscv/riscv-vector-builtins-functions.def
8657 (vfwredusum_frm): New intrinsic function def.
8659 2023-08-21 David Faust <david.faust@oracle.com>
8661 * config/bpf/bpf.md (neg): Second operand must be a register.
8663 2023-08-21 Edwin Lu <ewlu@rivosinc.com>
8665 * config/riscv/bitmanip.md: Added bitmanip type to insns
8666 that are missing types.
8668 2023-08-21 Jeff Law <jlaw@ventanamicro.com>
8670 * config/riscv/sync-ztso.md (atomic_load_ztso<mode>): Avoid extraenous
8673 2023-08-21 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
8675 * config/aarch64/falkor-tag-collision-avoidance.cc (dump_insn_list):
8676 Fix format specifier.
8678 2023-08-21 Aldy Hernandez <aldyh@redhat.com>
8680 * value-range.cc (frange::union_nans): Return false if nothing
8682 (range_tests_floats): New test.
8684 2023-08-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
8686 PR tree-optimization/111048
8687 * fold-const.cc (valid_mask_for_fold_vec_perm_cst_p): Set arg_npatterns
8689 (fold_vec_perm_cst): Remove workaround and again call
8690 valid_mask_fold_vec_perm_cst_p for both VLS and VLA vectors.
8691 (test_fold_vec_perm_cst::test_nunits_min_4): Add test-case.
8693 2023-08-21 Richard Biener <rguenther@suse.de>
8695 PR tree-optimization/111082
8696 * tree-vect-slp.cc (vectorize_slp_instance_root_stmt): Only
8697 pun operations that can overflow.
8699 2023-08-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
8701 * lcm.cc (compute_antinout_edge): Export as global use.
8702 (compute_earliest): Ditto.
8703 (compute_rev_insert_delete): Ditto.
8704 * lcm.h (compute_antinout_edge): Ditto.
8705 (compute_earliest): Ditto.
8707 2023-08-21 Richard Biener <rguenther@suse.de>
8709 PR tree-optimization/111070
8710 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check we have
8711 an SSA name before checking SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
8713 2023-08-21 Andrew Pinski <apinski@marvell.com>
8715 PR tree-optimization/111002
8716 * match.pd (view_convert(vec_cond(a,b,c))): New pattern.
8718 2023-08-21 liuhongt <hongtao.liu@intel.com>
8720 * common/config/i386/cpuinfo.h (get_intel_cpu): Detect
8722 * common/config/i386/i386-common.cc (alias_table): Support
8723 -march=gracemont as an alias of -march=alderlake.
8725 2023-08-20 Uros Bizjak <ubizjak@gmail.com>
8727 * config/i386/i386-expand.cc (ix86_expand_sse_extend): Use ops[1]
8728 instead of src in the call to ix86_expand_sse_cmp.
8729 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Do not
8730 force operands[1] to a register.
8731 (<any_extend:insn>v4hiv4si2): Ditto.
8732 (<any_extend:insn>v2siv2di2): Ditto.
8734 2023-08-20 Andrew Pinski <apinski@marvell.com>
8736 PR tree-optimization/111006
8737 PR tree-optimization/110986
8738 * match.pd: (op(vec_cond(a,b,c))): Handle convert for op.
8740 2023-08-20 Eric Gallager <egallager@gcc.gnu.org>
8743 * Makefile.in: improve error message when /usr/include is
8746 2023-08-19 Tobias Burnus <tobias@codesourcery.com>
8748 PR middle-end/111017
8749 * omp-expand.cc (expand_omp_for_init_vars): Pass after=true
8750 to expand_omp_build_cond for 'factor != 0' condition, resulting
8751 in pre-r12-5295-g47de0b56ee455e code for the gimple insert.
8753 2023-08-19 Guo Jie <guojie@loongson.cn>
8754 Lulu Cheng <chenglulu@loongson.cn>
8756 * config/loongarch/t-loongarch: Add loongarch-driver.h into
8757 TM_H. Add loongarch-def.h and loongarch-tune.h into
8760 2023-08-18 Uros Bizjak <ubizjak@gmail.com>
8763 * config/i386/i386-expand.cc (ix86_split_mmx_punpck):
8764 Also handle V2QImode.
8765 (ix86_expand_sse_extend): New function.
8766 * config/i386/i386-protos.h (ix86_expand_sse_extend): New prototype.
8767 * config/i386/mmx.md (<any_extend:insn>v4qiv4hi2): Enable for
8768 TARGET_SSE2. Expand through ix86_expand_sse_extend for !TARGET_SSE4_1.
8769 (<any_extend:insn>v2hiv2si2): Ditto.
8770 (<any_extend:insn>v2qiv2hi2): Ditto.
8771 * config/i386/sse.md (<any_extend:insn>v8qiv8hi2): Ditto.
8772 (<any_extend:insn>v4hiv4si2): Ditto.
8773 (<any_extend:insn>v2siv2di2): Ditto.
8775 2023-08-18 Aldy Hernandez <aldyh@redhat.com>
8778 * value-range.cc (irange::union_bitmask): Return FALSE if updated
8779 bitmask is semantically equivalent to the original mask.
8780 (irange::intersect_bitmask): Same.
8781 (irange::get_bitmask): Add comment.
8783 2023-08-18 Richard Biener <rguenther@suse.de>
8785 PR tree-optimization/111019
8786 * tree-ssa-loop-im.cc (gather_mem_refs_stmt): When canonicalizing
8787 also scrap base and offset in case the ref is indirect.
8789 2023-08-18 Jose E. Marchesi <jose.marchesi@oracle.com>
8791 * config/bpf/bpf.opt (mframe-limit): Set default to 32767.
8793 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8796 * Makefile.in (TM_P_H): Add $(TREE_H) as dependence.
8798 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8800 * tree-vect-stmts.cc (vect_build_scatter_store_calls): New, factor
8802 (vectorizable_store): ... here.
8804 2023-08-18 Richard Biener <rguenther@suse.de>
8806 PR tree-optimization/111048
8807 * fold-const.cc (fold_vec_perm_cst): Check for non-VLA
8810 2023-08-18 Haochen Jiang <haochen.jiang@intel.com>
8813 * config/i386/avx512vldqintrin.h: Push AVX2 when AVX2 is
8816 2023-08-18 Kewen Lin <linkw@linux.ibm.com>
8818 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
8819 VMAT_GATHER_SCATTER in the final loop nest to its own loop,
8820 and update the final nest accordingly.
8822 2023-08-18 Andrew Pinski <apinski@marvell.com>
8824 * doc/md.texi (Standard patterns): Document cond_neg, cond_one_cmpl,
8825 cond_len_neg and cond_len_one_cmpl.
8827 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8829 * config/riscv/iterators.md (TARGET_HARD_FLOAT || TARGET_ZFINX): New.
8830 * config/riscv/pic.md (*local_pic_load<ANYF:mode>): Change ANYF.
8831 (*local_pic_load<ANYLSF:mode>): To ANYLSF.
8832 (*local_pic_load_32d<ANYF:mode>): Ditto.
8833 (*local_pic_load_32d<ANYLSF:mode>): Ditto.
8834 (*local_pic_store<ANYF:mode>): Ditto.
8835 (*local_pic_store<ANYLSF:mode>): Ditto.
8836 (*local_pic_store_32d<ANYF:mode>): Ditto.
8837 (*local_pic_store_32d<ANYLSF:mode>): Ditto.
8839 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8840 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
8842 * config/riscv/predicates.md (vector_const_0_operand): New.
8843 * config/riscv/vector.md (*pred_broadcast<mode>_zero): Ditto.
8845 2023-08-18 Lehua Ding <lehua.ding@rivai.ai>
8847 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion):
8850 2023-08-17 Andrew MacLeod <amacleod@redhat.com>
8852 PR tree-optimization/111009
8853 * range-op.cc (operator_addr_expr::op1_range): Be more restrictive.
8855 2023-08-17 Vladimir N. Makarov <vmakarov@redhat.com>
8857 * lra-spills.cc (assign_stack_slot_num_and_sort_pseudos): Moving
8858 slots_num initialization from here ...
8859 (lra_spill): ... to here before the 1st call of
8860 assign_stack_slot_num_and_sort_pseudos. Add the 2nd call after
8863 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
8866 * doc/invoke.texi (Option Summary): Mention
8867 -Wcompare-distinct-pointer-types under `Warning Options'.
8868 (Warning Options): Document -Wcompare-distinct-pointer-types.
8870 2023-08-17 Jan-Benedict Glaw <jbglaw@lug-owl.de>
8872 * recog.cc (memory_address_addr_space_p): Mark possibly unused
8875 2023-08-17 Richard Biener <rguenther@suse.de>
8877 PR tree-optimization/111039
8878 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Check for
8879 SSA_NAME_OCCURS_IN_ABNORMAL_PHI.
8881 2023-08-17 Alex Coplan <alex.coplan@arm.com>
8883 * doc/rtl.texi: Fix up sample code for RTL-SSA insn changes.
8885 2023-08-17 Jose E. Marchesi <jose.marchesi@oracle.com>
8888 * config/bpf/bpf.cc (bpf_attribute_table): Add entry for the
8889 `naked' function attribute.
8890 (bpf_warn_func_return): New function.
8891 (TARGET_WARN_FUNC_RETURN): Define.
8892 (bpf_expand_prologue): Add preventive comment.
8893 (bpf_expand_epilogue): Likewise.
8894 * doc/extend.texi (BPF Function Attributes): Document the `naked'
8897 2023-08-17 Richard Biener <rguenther@suse.de>
8899 * tree-vect-slp.cc (vect_slp_check_for_roots): Use
8900 !needs_fold_left_reduction_p to decide whether we can
8901 handle the reduction with association.
8902 (vectorize_slp_instance_root_stmt): For TYPE_OVERFLOW_UNDEFINED
8903 reductions perform all arithmetic in an unsigned type.
8905 2023-08-17 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
8907 * configure.ac (gcc_cv_ld64_version): Allow for dyld in ld -v
8909 * configure: Regenerate.
8911 2023-08-17 Pan Li <pan2.li@intel.com>
8913 * config/riscv/riscv-vector-builtins-bases.cc
8914 (widen_freducop): Add frm_opt_type template arg.
8915 (vfwredosum_frm_obj): New declaration.
8917 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8918 * config/riscv/riscv-vector-builtins-functions.def
8919 (vfwredosum_frm): New intrinsic function def.
8921 2023-08-17 Pan Li <pan2.li@intel.com>
8923 * config/riscv/riscv-vector-builtins-bases.cc
8924 (vfredosum_frm_obj): New declaration.
8926 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8927 * config/riscv/riscv-vector-builtins-functions.def
8928 (vfredosum_frm): New intrinsic function def.
8930 2023-08-17 Pan Li <pan2.li@intel.com>
8932 * config/riscv/riscv-vector-builtins-bases.cc
8933 (class freducop): Add frm_op_type template arg.
8934 (vfredusum_frm_obj): New declaration.
8936 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8937 * config/riscv/riscv-vector-builtins-functions.def
8938 (vfredusum_frm): New intrinsic function def.
8939 * config/riscv/riscv-vector-builtins-shapes.cc
8940 (struct reduc_alu_frm_def): New class for frm shape.
8941 (SHAPE): New declaration.
8942 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8944 2023-08-17 Pan Li <pan2.li@intel.com>
8946 * config/riscv/riscv-vector-builtins-bases.cc
8947 (class vfncvt_f): Add frm_op_type template arg.
8948 (vfncvt_f_frm_obj): New declaration.
8950 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8951 * config/riscv/riscv-vector-builtins-functions.def
8952 (vfncvt_f_frm): New intrinsic function def.
8954 2023-08-17 Pan Li <pan2.li@intel.com>
8956 * config/riscv/riscv-vector-builtins-bases.cc
8957 (vfncvt_xu_frm_obj): New declaration.
8959 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8960 * config/riscv/riscv-vector-builtins-functions.def
8961 (vfncvt_xu_frm): New intrinsic function def.
8963 2023-08-17 Pan Li <pan2.li@intel.com>
8965 * config/riscv/riscv-vector-builtins-bases.cc
8966 (class vfncvt_x): Add frm_op_type template arg.
8967 (BASE): New declaration.
8968 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
8969 * config/riscv/riscv-vector-builtins-functions.def
8970 (vfncvt_x_frm): New intrinsic function def.
8971 * config/riscv/riscv-vector-builtins-shapes.cc
8972 (struct narrow_alu_frm_def): New shape function for frm.
8973 (SHAPE): New declaration.
8974 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
8976 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
8978 * config/i386/avx512vldqintrin.h: Remove target attribute.
8979 * config/i386/i386-builtin.def (BDESC):
8980 Add OPTION_MASK_ISA2_AVX10_1.
8981 * config/i386/sse.md (VF_AVX512VLDQ_AVX10_1): New.
8982 (VFH_AVX512VLDQ_AVX10_1): Ditto.
8983 (VF1_AVX512VLDQ_AVX10_1): Ditto.
8984 (<mask_codefor>reducep<mode><mask_name><round_saeonly_name>):
8985 Change iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
8986 (vec_pack<floatprefix>_float_<mode>): Change iterator to
8987 VI8_AVX512VLDQ_AVX10_1. Remove target check.
8988 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Change iterator to
8989 VF1_AVX512VLDQ_AVX10_1. Remove target check.
8990 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
8991 (VI48F_256_DQVL_AVX10_1): Rename from VI48F_256_DQ.
8992 (avx512vl_vextractf128<mode>): Change iterator to
8993 VI48F_256_DQVL_AVX10_1. Remove target check.
8994 (vec_extract_hi_<mode>_mask): Add TARGET_AVX10_1.
8995 (vec_extract_hi_<mode>): Ditto.
8996 (avx512vl_vinsert<mode>): Ditto.
8997 (vec_set_lo_<mode><mask_name>): Ditto.
8998 (vec_set_hi_<mode><mask_name>): Ditto.
8999 (avx512dq_rangep<mode><mask_name><round_saeonly_name>): Change
9000 iterator to VF_AVX512VLDQ_AVX10_1. Remove target check.
9001 (avx512dq_fpclass<mode><mask_scalar_merge_name>): Change
9002 iterator to VFH_AVX512VLDQ_AVX10_1. Remove target check.
9003 * config/i386/subst.md (mask_avx512dq_condition): Add
9005 (mask_scalar_merge): Ditto.
9007 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9009 * config/i386/avx512vldqintrin.h: Remove target attribute.
9010 * config/i386/i386-builtin.def (BDESC):
9011 Add OPTION_MASK_ISA2_AVX10_1.
9012 * config/i386/i386.cc (standard_sse_constant_opcode): Add TARGET_AVX10_1.
9013 * config/i386/sse.md: (VI48_AVX512VL_AVX10_1): New.
9014 (VI48_AVX512VLDQ_AVX10_1): Ditto.
9015 (VF2_AVX512VL): Remove.
9016 (VI8_256_512VLDQ_AVX10_1): Rename from VI8_256_512.
9018 (*<code><mode>3<mask_name>): Change isa attribute to
9019 avx10_1_or_avx512dq. Add TARGET_AVX10_1.
9020 (<code><mode>3): Add TARGET_AVX10_1. Change isa attr
9021 to avx10_1_or_avx512vl.
9022 (<mask_codefor>avx512dq_cvtps2qq<mode><mask_name><round_name>):
9023 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
9024 (<mask_codefor>avx512dq_cvtps2qqv2di<mask_name>):
9026 (<mask_codefor>avx512dq_cvtps2uqq<mode><mask_name><round_name>):
9027 Change iterator to VI8_256_512VLDQ_AVX10_1. Remove target check.
9028 (<mask_codefor>avx512dq_cvtps2uqqv2di<mask_name>):
9030 (float<floatunssuffix><sseintvecmodelower><mode>2<mask_name><round_name>):
9031 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
9032 (float<floatunssuffix><sselongvecmodelower><mode>2<mask_name><round_name>):
9033 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
9034 (float<floatunssuffix>v4div4sf2<mask_name>):
9036 (avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
9037 (*avx512dq_float<floatunssuffix>v2div2sf2): Ditto.
9038 (float<floatunssuffix>v2div2sf2): Ditto.
9039 (float<floatunssuffix>v2div2sf2_mask): Ditto.
9040 (*float<floatunssuffix>v2div2sf2_mask): Ditto.
9041 (*float<floatunssuffix>v2div2sf2_mask_1): Ditto.
9042 (<avx512>_cvt<ssemodesuffix>2mask<mode>):
9043 Change iterator to VI48_AVX512VLDQ_AVX10_1. Remove target check.
9044 (<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
9045 (*<avx512>_cvtmask2<ssemodesuffix><mode>):
9046 Change iterator to VI48_AVX512VL_AVX10_1. Remove target check.
9047 Change when constraint is enabled.
9049 2023-08-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9052 * config/riscv/riscv-vsetvl.cc (float_insn_valid_sew_p): New function.
9053 (second_sew_less_than_first_sew_p): Fix bug.
9054 (first_sew_less_than_second_sew_p): Ditto.
9056 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9058 * config/i386/avx512vldqintrin.h: Remove target attribute.
9059 * config/i386/i386-builtin.def (BDESC):
9060 Add OPTION_MASK_ISA2_AVX10_1.
9061 * config/i386/i386-builtins.cc (def_builtin): Handle AVX10_1.
9062 * config/i386/i386-expand.cc
9063 (ix86_check_builtin_isa_match): Ditto.
9064 (ix86_expand_sse2_mulvxdi3): Add TARGET_AVX10_1.
9065 * config/i386/i386.md: Add new isa attribute avx10_1_or_avx512dq
9066 and avx10_1_or_avx512vl.
9067 * config/i386/sse.md: (VF2_AVX512VLDQ_AVX10_1): New.
9068 (VF1_128_256VLDQ_AVX10_1): Ditto.
9069 (VI8_AVX512VLDQ_AVX10_1): Ditto.
9070 (<sse>_andnot<mode>3<mask_name>):
9071 Add TARGET_AVX10_1 and change isa attr from avx512dq to
9072 avx10_1_or_avx512dq.
9073 (*andnot<mode>3): Add TARGET_AVX10_1 and change isa attr from
9074 avx512vl to avx10_1_or_avx512vl.
9075 (fix<fixunssuffix>_trunc<mode><sseintvecmodelower>2<mask_name><round_saeonly_name>):
9076 Change iterator to VF2_AVX512VLDQ_AVX10_1. Remove target check.
9077 (fix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
9079 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
9081 (fix<fixunssuffix>_trunc<mode><sselongvecmodelower>2<mask_name><round_saeonly_name>):
9082 Change iterator to VF1_128_256VLDQ_AVX10_1. Remove target check.
9083 (avx512dq_fix<fixunssuffix>_truncv2sfv2di2<mask_name>):
9085 (fix<fixunssuffix>_truncv2sfv2di2): Ditto.
9086 (cond_mul<mode>): Change iterator to VI8_AVX10_1_AVX512DQVL.
9087 Remove target check.
9088 (avx512dq_mul<mode>3<mask_name>): Ditto.
9089 (*avx512dq_mul<mode>3<mask_name>): Ditto.
9090 (VI4F_BRCST32x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
9091 (<mask_codefor>avx512dq_broadcast<mode><mask_name>):
9092 Remove target check.
9093 (VI8F_BRCST64x2): Add TARGET_AVX512DQ and TARGET_AVX10_1.
9094 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1):
9095 Remove target check.
9096 * config/i386/subst.md (mask_mode512bit_condition): Add TARGET_AVX10_1.
9097 (mask_avx512vl_condition): Ditto.
9100 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9102 * common/config/i386/i386-common.cc
9103 (ix86_check_avx10_vector_width): New function to check isa_flags
9104 to emit a warning when there is a conflict in AVX10 options for
9106 (ix86_handle_option): Add check for avx10.1-256 and avx10.1-512.
9107 * config/i386/driver-i386.cc (host_detect_local_cpu):
9108 Do not append -mno-avx10-max-512bit for -march=native.
9110 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9112 * common/config/i386/i386-common.cc
9113 (ix86_check_avx10): New function to check isa_flags and
9114 isa_flags_explicit to emit warning when AVX10 is enabled
9116 (ix86_check_avx512): New function to check isa_flags and
9117 isa_flags_explicit to emit warning when AVX512 is enabled
9119 (ix86_handle_option): Do not change the flags when warning
9121 * config/i386/driver-i386.cc (host_detect_local_cpu):
9122 Do not append -mno-avx10.1 for -march=native.
9124 2023-08-17 Haochen Jiang <haochen.jiang@intel.com>
9126 * common/config/i386/cpuinfo.h (get_available_features):
9127 Add avx10_set and version and detect avx10.1.
9128 (cpu_indicator_init): Handle avx10.1-512.
9129 * common/config/i386/i386-common.cc
9130 (OPTION_MASK_ISA2_AVX10_512BIT_SET): New.
9131 (OPTION_MASK_ISA2_AVX10_1_SET): Ditto.
9132 (OPTION_MASK_ISA2_AVX10_512BIT_UNSET): Ditto.
9133 (OPTION_MASK_ISA2_AVX10_1_UNSET): Ditto.
9134 (OPTION_MASK_ISA2_AVX2_UNSET): Modify for AVX10_1.
9135 (ix86_handle_option): Handle -mavx10.1, -mavx10.1-256 and
9137 * common/config/i386/i386-cpuinfo.h (enum processor_features):
9138 Add FEATURE_AVX10_512BIT, FEATURE_AVX10_1 and
9139 FEATURE_AVX10_512BIT.
9140 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
9141 AVX10_512BIT, AVX10_1 and AVX10_1_512.
9142 * config/i386/constraints.md (Yk): Add AVX10_1.
9145 * config/i386/cpuid.h (bit_AVX10): New.
9146 (bit_AVX10_256): Ditto.
9147 (bit_AVX10_512): Ditto.
9148 * config/i386/i386-c.cc (ix86_target_macros_internal):
9149 Define AVX10_512BIT and AVX10_1.
9150 * config/i386/i386-isa.def
9151 (AVX10_512BIT): Add DEF_PTA(AVX10_512BIT).
9152 (AVX10_1): Add DEF_PTA(AVX10_1).
9153 * config/i386/i386-options.cc (isa2_opts): Add -mavx10.1.
9154 (ix86_valid_target_attribute_inner_p): Handle avx10-512bit, avx10.1
9156 (ix86_option_override_internal): Enable AVX512{F,VL,BW,DQ,CD,BF16,
9157 FP16,VBMI,VBMI2,VNNI,IFMA,BITALG,VPOPCNTDQ} features for avx10.1-512.
9158 (ix86_valid_target_attribute_inner_p): Handle AVX10_1.
9159 * config/i386/i386.cc (ix86_get_ssemov): Add AVX10_1.
9160 (ix86_conditional_register_usage): Ditto.
9161 (ix86_hard_regno_mode_ok): Ditto.
9162 (ix86_rtx_costs): Ditto.
9163 * config/i386/i386.h (VALID_MASK_AVX10_MODE): New macro.
9164 * config/i386/i386.opt: Add option -mavx10.1, -mavx10.1-256 and
9166 * doc/extend.texi: Document avx10.1, avx10.1-256 and avx10.1-512.
9167 * doc/invoke.texi: Document -mavx10.1, -mavx10.1-256 and -mavx10.1-512.
9168 * doc/sourcebuild.texi: Document target avx10.1, avx10.1-256
9171 2023-08-17 Sergei Trofimovich <siarheit@google.com>
9173 * flag-types.h (vrp_mode): Remove unused.
9175 2023-08-17 Yanzhang Wang <yanzhang.wang@intel.com>
9177 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1): Use
9180 2023-08-17 Andrew Pinski <apinski@marvell.com>
9182 * internal-fn.def (COND_NOT): New internal function.
9183 * match.pd (UNCOND_UNARY, COND_UNARY): Add bit_not/not
9185 (`vec (a ? -1 : 0) ^ b`): New pattern to convert
9186 into conditional not.
9187 * optabs.def (cond_one_cmpl): New optab.
9188 (cond_len_one_cmpl): Likewise.
9190 2023-08-16 Surya Kumari Jangala <jskumari@linux.ibm.com>
9192 PR rtl-optimization/110254
9193 * ira-color.cc (improve_allocation): Update array
9194 allocated_hard_reg_p.
9196 2023-08-16 Vladimir N. Makarov <vmakarov@redhat.com>
9198 * lra-int.h (lra_update_fp2sp_elimination): Change the prototype.
9199 * lra-eliminations.cc (spill_pseudos): Record spilled pseudos.
9200 (lra_update_fp2sp_elimination): Ditto.
9201 (update_reg_eliminate): Adjust spill_pseudos call.
9202 * lra-spills.cc (lra_spill): Assign stack slots to pseudos spilled
9203 in lra_update_fp2sp_elimination.
9205 2023-08-16 Richard Ball <richard.ball@arm.com>
9207 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A720 CPU.
9208 * config/aarch64/aarch64-tune.md: Regenerate.
9209 * doc/invoke.texi: Document Cortex-A720 CPU.
9211 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
9213 * config/riscv/autovec.md (<u>avg<v_double_trunc>3_floor):
9215 (<u>avg<v_double_trunc>3_ceil): Ditto.
9216 * config/riscv/vector-iterators.md (ashiftrt): New iterator.
9219 2023-08-16 Robin Dapp <rdapp@ventanamicro.com>
9221 * internal-fn.cc (vec_extract_direct): Change type argument
9223 (expand_vec_extract_optab_fn): Call convert_optab_fn.
9224 (direct_vec_extract_optab_supported_p): Use
9225 convert_optab_supported_p.
9227 2023-08-16 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
9228 Richard Sandiford <richard.sandiford@arm.com>
9230 * fold-const.cc (INCLUDE_ALGORITHM): Add Include.
9231 (valid_mask_for_fold_vec_perm_cst_p): New function.
9232 (fold_vec_perm_cst): Likewise.
9233 (fold_vec_perm): Adjust assert and call fold_vec_perm_cst.
9234 (test_fold_vec_perm_cst): New namespace.
9235 (test_fold_vec_perm_cst::build_vec_cst_rand): New function.
9236 (test_fold_vec_perm_cst::validate_res): Likewise.
9237 (test_fold_vec_perm_cst::validate_res_vls): Likewise.
9238 (test_fold_vec_perm_cst::builder_push_elems): Likewise.
9239 (test_fold_vec_perm_cst::test_vnx4si_v4si): Likewise.
9240 (test_fold_vec_perm_cst::test_v4si_vnx4si): Likewise.
9241 (test_fold_vec_perm_cst::test_all_nunits): Likewise.
9242 (test_fold_vec_perm_cst::test_nunits_min_2): Likewise.
9243 (test_fold_vec_perm_cst::test_nunits_min_4): Likewise.
9244 (test_fold_vec_perm_cst::test_nunits_min_8): Likewise.
9245 (test_fold_vec_perm_cst::test_nunits_max_4): Likewise.
9246 (test_fold_vec_perm_cst::is_simple_vla_size): Likewise.
9247 (test_fold_vec_perm_cst::test): Likewise.
9248 (fold_const_cc_tests): Call test_fold_vec_perm_cst::test.
9250 2023-08-16 Pan Li <pan2.li@intel.com>
9252 * config/riscv/riscv-vector-builtins-bases.cc
9253 (BASE): New declaration.
9254 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9255 * config/riscv/riscv-vector-builtins-functions.def
9256 (vfwcvt_xu_frm): New intrinsic function def.
9258 2023-08-16 Pan Li <pan2.li@intel.com>
9260 * config/riscv/riscv-vector-builtins-bases.cc: Use explicit argument.
9262 2023-08-16 Pan Li <pan2.li@intel.com>
9264 * config/riscv/riscv-vector-builtins-bases.cc
9265 (BASE): New declaration.
9266 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9267 * config/riscv/riscv-vector-builtins-functions.def
9268 (vfwcvt_x_frm): New intrinsic function def.
9270 2023-08-16 Pan Li <pan2.li@intel.com>
9272 * config/riscv/riscv-vector-builtins-bases.cc (BASE): New declaration.
9273 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9274 * config/riscv/riscv-vector-builtins-functions.def
9275 (vfcvt_f_frm): New intrinsic function def.
9277 2023-08-16 Pan Li <pan2.li@intel.com>
9279 * config/riscv/riscv-vector-builtins-bases.cc
9280 (BASE): New declaration.
9281 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9282 * config/riscv/riscv-vector-builtins-functions.def
9283 (vfcvt_xu_frm): New intrinsic function def..
9285 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
9288 * config/rs6000/vsx.md (*vsx_extract_<mode>_store_p9): Skip vector
9289 extract when the element is 7 on BE while 8 on LE for byte or 3 on
9290 BE while 4 on LE for halfword.
9292 2023-08-16 Haochen Gui <guihaoc@gcc.gnu.org>
9295 * config/rs6000/vsx.md (expand vsx_extract_<mode>): Set it only
9297 (vsx_extract_v4si): New expand for V4SI extraction.
9298 (vsx_extract_v4si_w1): New insn pattern for V4SI extraction on
9299 word 1 from BE order.
9300 (*mfvsrwz): New insn pattern for mfvsrwz.
9301 (*vsx_extract_<mode>_di_p9): Assert that it won't be generated on
9302 word 1 from BE order.
9303 (*vsx_extract_si): Remove.
9304 (*vsx_extract_v4si_w023): New insn and split pattern on word 0, 2,
9307 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9309 * config/riscv/autovec.md (vec_mask_len_load_lanes<mode><vsingle>):
9311 (vec_mask_len_store_lanes<mode><vsingle>): Ditto.
9312 * config/riscv/riscv-protos.h (expand_lanes_load_store): New function.
9313 * config/riscv/riscv-v.cc (get_mask_mode): Add tuple mask mode.
9314 (expand_lanes_load_store): New function.
9315 * config/riscv/vector-iterators.md: New iterator.
9317 2023-08-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9319 * internal-fn.cc (internal_load_fn_p): Apply
9320 MASK_LEN_{LOAD_LANES,STORE_LANES} into vectorizer.
9321 (internal_store_fn_p): Ditto.
9322 (internal_fn_len_index): Ditto.
9323 (internal_fn_mask_index): Ditto.
9324 (internal_fn_stored_value_index): Ditto.
9325 * tree-vect-data-refs.cc (vect_store_lanes_supported): Ditto.
9326 (vect_load_lanes_supported): Ditto.
9327 * tree-vect-loop.cc: Ditto.
9328 * tree-vect-slp.cc (vect_slp_prefer_store_lanes_p): Ditto.
9329 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
9330 (get_group_load_store_type): Ditto.
9331 (vectorizable_store): Ditto.
9332 (vectorizable_load): Ditto.
9333 * tree-vectorizer.h (vect_store_lanes_supported): Ditto.
9334 (vect_load_lanes_supported): Ditto.
9336 2023-08-16 Pan Li <pan2.li@intel.com>
9338 * config/riscv/riscv-vector-builtins-bases.cc
9339 (enum frm_op_type): New type for frm.
9340 (BASE): New declaration.
9341 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9342 * config/riscv/riscv-vector-builtins-functions.def
9343 (vfcvt_x_frm): New intrinsic function def.
9345 2023-08-16 liuhongt <hongtao.liu@intel.com>
9347 * config/i386/i386-builtins.cc
9348 (ix86_vectorize_builtin_gather): Adjust for use_gather_8parts.
9349 * config/i386/i386-options.cc (parse_mtune_ctrl_str):
9350 Set/Clear tune features use_{gather,scatter}_{2parts, 4parts,
9351 8parts} for -mtune-crtl={,^}{use_gather,use_scatter}.
9352 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Adjust
9353 for use_scatter_8parts
9354 * config/i386/i386.h (TARGET_USE_GATHER): Rename to ..
9355 (TARGET_USE_GATHER_8PARTS): .. this.
9356 (TARGET_USE_SCATTER): Rename to ..
9357 (TARGET_USE_SCATTER_8PARTS): .. this.
9358 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER): Rename to
9359 (X86_TUNE_USE_GATHER_8PARTS): .. this.
9360 (X86_TUNE_USE_SCATTER): Rename to
9361 (X86_TUNE_USE_SCATTER_8PARTS): .. this.
9362 * config/i386/i386.opt: Add new options mgather, mscatter.
9364 2023-08-16 liuhongt <hongtao.liu@intel.com>
9366 * config/i386/i386-options.cc (m_GDS): New macro.
9367 * config/i386/x86-tune.def (X86_TUNE_USE_GATHER_2PARTS): Don't
9369 (X86_TUNE_USE_GATHER_4PARTS): Ditto.
9370 (X86_TUNE_USE_GATHER): Ditto.
9372 2023-08-16 liuhongt <hongtao.liu@intel.com>
9374 * config/i386/i386.md (movdf_internal): Generate vmovapd instead of
9375 vmovsd when moving DFmode between SSE_REGS.
9376 (movhi_internal): Generate vmovdqa instead of vmovsh when
9377 moving HImode between SSE_REGS.
9378 (mov<mode>_internal): Use vmovaps instead of vmovsh when
9379 moving HF/BFmode between SSE_REGS.
9381 2023-08-15 David Faust <david.faust@oracle.com>
9383 * config/bpf/bpf.md (extendsisi2): Delete useless define_insn.
9385 2023-08-15 David Faust <david.faust@oracle.com>
9388 * config/bpf/bpf.cc (bpf_print_register): Print 'w' registers
9389 for any mode 32-bits or smaller, not just SImode.
9391 2023-08-15 Martin Jambor <mjambor@suse.cz>
9395 * ipa-prop.h (ipcp_get_aggregate_const): Declare.
9396 * ipa-prop.cc (ipcp_get_aggregate_const): New function.
9397 (ipcp_transform_function): Do not deallocate transformation info.
9398 * tree-ssa-sccvn.cc: Include alloc-pool.h, symbol-summary.h and
9400 (vn_reference_lookup_2): When hitting default-def vuse, query
9401 IPA-CP transformation info for any known constants.
9403 2023-08-15 Chung-Lin Tang <cltang@codesourcery.com>
9404 Thomas Schwinge <thomas@codesourcery.com>
9406 * gimplify.cc (oacc_region_type_name): New function.
9407 (oacc_default_clause): If no 'default' clause appears on this
9408 compute construct, see if one appears on a lexically containing
9410 (gimplify_scan_omp_clauses): Upon OMP_CLAUSE_DEFAULT case, set
9411 ctx->oacc_default_clause_ctx to current context.
9413 2023-08-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9416 * config/riscv/predicates.md: Fix predicate.
9418 2023-08-15 Richard Biener <rguenther@suse.de>
9420 * tree-vect-slp.cc (vect_analyze_slp_instance): Remove
9421 slp_inst_kind_ctor handling.
9422 (vect_analyze_slp): Simplify.
9423 (vect_build_slp_instance): Dump when we analyze a CTOR.
9424 (vect_slp_check_for_constructors): Rename to ...
9425 (vect_slp_check_for_roots): ... this. Register a
9426 slp_root for CONSTRUCTORs instead of shoving them to
9427 the set of grouped stores.
9428 (vect_slp_analyze_bb_1): Adjust.
9430 2023-08-15 Richard Biener <rguenther@suse.de>
9432 * tree-vectorizer.h (_slp_instance::remain_stmts): Change
9434 (_slp_instance::remain_defs): ... this.
9435 (SLP_INSTANCE_REMAIN_STMTS): Rename to ...
9436 (SLP_INSTANCE_REMAIN_DEFS): ... this.
9437 (slp_root::remain): New.
9438 (slp_root::slp_root): Adjust.
9439 * tree-vect-slp.cc (vect_free_slp_instance): Adjust.
9440 (vect_build_slp_instance): Get extra remain parameter,
9441 adjust former handling of a cut off stmt.
9442 (vect_analyze_slp_instance): Adjust.
9443 (vect_analyze_slp): Likewise.
9444 (_bb_vec_info::~_bb_vec_info): Likewise.
9445 (vectorizable_bb_reduc_epilogue): Dump something if we fail.
9446 (vect_slp_check_for_constructors): Handle non-internal
9447 defs as remain defs of a reduction.
9448 (vectorize_slp_instance_root_stmt): Adjust.
9450 2023-08-15 Richard Biener <rguenther@suse.de>
9452 * tree-ssa-loop-ivcanon.cc: Include tree-vectorizer.h
9453 (canonicalize_loop_induction_variables): Use find_loop_location.
9455 2023-08-15 Hans-Peter Nilsson <hp@axis.com>
9458 * config/cris/cris-protos.h: Revert recent change.
9459 * config/cris/cris.cc (cris_legitimate_address_p): Remove
9460 code_helper unused parameter.
9461 (cris_legitimate_address_p_hook): New wrapper function.
9462 (TARGET_LEGITIMATE_ADDRESS_P): Change to
9463 cris_legitimate_address_p_hook.
9465 2023-08-15 Richard Biener <rguenther@suse.de>
9467 PR tree-optimization/110963
9468 * tree-ssa-pre.cc (do_pre_regular_insertion): Also insert
9469 a PHI node when the expression is available on all edges
9470 and we insert at most one copy from a constant.
9472 2023-08-15 Richard Biener <rguenther@suse.de>
9474 PR tree-optimization/110991
9475 * tree-ssa-loop-ivcanon.cc (constant_after_peeling): Handle
9476 VIEW_CONVERT_EXPR <op>, handle more simple IV-like SSA cycles
9477 that will end up constant.
9479 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9482 * Makefile.in (RECOG_H): Add $(TREE_H) as dependence.
9484 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9486 * tree-vect-stmts.cc (vectorizable_load): Move the handlings on
9487 VMAT_LOAD_STORE_LANES in the final loop nest to its own loop,
9488 and update the final nest accordingly.
9490 2023-08-15 Kewen Lin <linkw@linux.ibm.com>
9492 * tree-vect-stmts.cc (vectorizable_load): Remove some useless checks
9495 2023-08-15 Pan Li <pan2.li@intel.com>
9497 * mode-switching.cc (create_pre_exit): Add SET insn check.
9499 2023-08-15 Pan Li <pan2.li@intel.com>
9501 * config/riscv/riscv-vector-builtins-bases.cc
9502 (class vfrec7_frm): New class for frm.
9503 (vfrec7_frm_obj): New declaration.
9505 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9506 * config/riscv/riscv-vector-builtins-functions.def
9507 (vfrec7_frm): New intrinsic function definition.
9508 * config/riscv/vector-iterators.md
9509 (VFMISC): Remove VFREC7.
9511 (float_insn_type): Ditto.
9512 (VFMISC_FRM): New int iterator.
9513 (misc_frm_op): New op for frm.
9514 (float_frm_insn_type): New type for frm.
9515 * config/riscv/vector.md (@pred_<misc_frm_op><mode>):
9516 New pattern for misc frm.
9518 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
9520 * lra-constraints.cc (curr_insn_transform): Process output stack
9521 pointer reloads before emitting reload insns.
9523 2023-08-14 benjamin priour <vultkayn@gcc.gnu.org>
9526 * doc/invoke.texi: Add documentation of
9527 fanalyzer-show-events-in-system-headers
9529 2023-08-14 Jan Hubicka <jh@suse.cz>
9531 PR gcov-profile/110988
9532 * tree-cfg.cc (fold_loop_internal_call): Avoid division by zero.
9534 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
9536 * config/riscv/riscv-c.cc (riscv_cpu_cpp_builtins):
9537 Enable compressed builtins when ZC* extensions enabled.
9538 * config/riscv/riscv-shorten-memrefs.cc:
9539 Enable shorten_memrefs pass when ZC* extensions enabled.
9540 * config/riscv/riscv.cc (riscv_compressed_reg_p):
9541 Enable compressible registers when ZC* extensions enabled.
9542 (riscv_rtx_costs): Allow adjusting rtx costs when ZC* extensions enabled.
9543 (riscv_address_cost): Allow adjusting address cost when ZC* extensions enabled.
9544 (riscv_first_stack_step): Allow compression of the register saves
9545 without adding extra instructions.
9546 * config/riscv/riscv.h (FUNCTION_BOUNDARY): Adjusts function boundary
9547 to 16 bits when ZC* extensions enabled.
9549 2023-08-14 Jiawei <jiawei@iscas.ac.cn>
9551 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse): New extensions.
9552 * config/riscv/riscv-opts.h (MASK_ZCA): New mask.
9559 (TARGET_ZCA): New target.
9560 (TARGET_ZCB): Ditto.
9561 (TARGET_ZCE): Ditto.
9562 (TARGET_ZCF): Ditto.
9563 (TARGET_ZCD): Ditto.
9564 (TARGET_ZCMP): Ditto.
9565 (TARGET_ZCMT): Ditto.
9566 * config/riscv/riscv.opt: New target variable.
9568 2023-08-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9571 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
9573 * genrecog.cc (print_nonbool_test): Fix type error of
9574 switch (SUBREG_BYTE (op))'.
9576 2023-08-14 Richard Biener <rguenther@suse.de>
9578 * tree-cfg.cc (print_loop_info): Dump to 'file', not 'dump_file'.
9580 2023-08-14 Pan Li <pan2.li@intel.com>
9582 * config/riscv/riscv-vector-builtins-bases.cc
9583 (class unop_frm): New class for frm.
9584 (vfsqrt_frm_obj): New declaration.
9586 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9587 * config/riscv/riscv-vector-builtins-functions.def
9588 (vfsqrt_frm): New intrinsic function definition.
9590 2023-08-14 Pan Li <pan2.li@intel.com>
9592 * config/riscv/riscv-vector-builtins-bases.cc
9593 (class vfwnmsac_frm): New class for frm.
9594 (vfwnmsac_frm_obj): New declaration.
9596 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9597 * config/riscv/riscv-vector-builtins-functions.def
9598 (vfwnmsac_frm): New intrinsic function definition.
9600 2023-08-14 Pan Li <pan2.li@intel.com>
9602 * config/riscv/riscv-vector-builtins-bases.cc
9603 (class vfwmsac_frm): New class for frm.
9604 (vfwmsac_frm_obj): New declaration.
9606 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9607 * config/riscv/riscv-vector-builtins-functions.def
9608 (vfwmsac_frm): New intrinsic function definition.
9610 2023-08-14 Pan Li <pan2.li@intel.com>
9612 * config/riscv/riscv-vector-builtins-bases.cc
9613 (class vfwnmacc_frm): New class for frm.
9614 (vfwnmacc_frm_obj): New declaration.
9616 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9617 * config/riscv/riscv-vector-builtins-functions.def
9618 (vfwnmacc_frm): New intrinsic function definition.
9620 2023-08-14 Cui, Lili <lili.cui@intel.com>
9622 * common/config/i386/cpuinfo.h (get_intel_cpu): Add model value 0xba
9625 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9627 * config/mmix/predicates.md (mmix_address_operand): Use
9628 lra_in_progress, not reload_in_progress.
9630 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9632 * config/mmix/mmix.cc: Re-enable LRA.
9634 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9636 * config/mmix/predicates.md (frame_pointer_operand): Handle FP+offset
9637 when lra_in_progress.
9639 2023-08-14 Hans-Peter Nilsson <hp@axis.com>
9641 * config/mmix/mmix.cc: Disable LRA for MMIX.
9643 2023-08-14 Pan Li <pan2.li@intel.com>
9645 * config/riscv/riscv-vector-builtins-bases.cc
9646 (class vfwmacc_frm): New class for vfwmacc frm.
9647 (vfwmacc_frm_obj): New declaration.
9649 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9650 * config/riscv/riscv-vector-builtins-functions.def
9651 (vfwmacc_frm): Function definition for vfwmacc.
9652 * config/riscv/riscv-vector-builtins.cc
9653 (function_expander::use_widen_ternop_insn): Add frm support.
9655 2023-08-14 Pan Li <pan2.li@intel.com>
9657 * config/riscv/riscv-vector-builtins-bases.cc
9658 (class vfnmsub_frm): New class for vfnmsub frm.
9659 (vfnmsub_frm): New declaration.
9661 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9662 * config/riscv/riscv-vector-builtins-functions.def
9663 (vfnmsub_frm): New function declaration.
9665 2023-08-14 Vladimir N. Makarov <vmakarov@redhat.com>
9667 * lra-constraints.cc (curr_insn_transform): Set done_p up and
9668 check it on true after processing output stack pointer reload.
9670 2023-08-12 Jakub Jelinek <jakub@redhat.com>
9672 * Makefile.in (USER_H): Add stdckdint.h.
9673 * ginclude/stdckdint.h: New file.
9675 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9678 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): Add TARGET_VETOR.
9680 2023-08-12 Patrick Palka <ppalka@redhat.com>
9682 * tree-pretty-print.cc (dump_generic_node) <case TREE_VEC>:
9683 Delimit output with braces.
9685 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9688 * config/riscv/riscv-v.cc (expand_vec_series): Refactor the expander.
9690 2023-08-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9692 * config/riscv/autovec.md: Add VLS CONST_VECTOR.
9693 * config/riscv/riscv.cc (riscv_const_insns): Ditto.
9694 * config/riscv/vector.md: Ditto.
9696 2023-08-11 David Malcolm <dmalcolm@redhat.com>
9699 * doc/analyzer.texi (__analyzer_get_strlen): New.
9700 * doc/invoke.texi: Add -Wanalyzer-unterminated-string.
9702 2023-08-11 Jeff Law <jlaw@ventanamicro.com>
9704 * config/rx/rx.md (subdi3): Fix test for borrow.
9706 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9708 PR middle-end/110989
9709 * tree-vect-stmts.cc (vectorizable_store): Replace iv_type with sizetype.
9710 (vectorizable_load): Ditto.
9712 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
9714 * config/bpf/bpf.md (allocate_stack): Define.
9715 * config/bpf/bpf.h (FIRST_PSEUDO_REGISTER): Make room for fake
9716 stack pointer register.
9717 (FIXED_REGISTERS): Adjust accordingly.
9718 (CALL_USED_REGISTERS): Likewise.
9719 (REG_CLASS_CONTENTS): Likewise.
9720 (REGISTER_NAMES): Likewise.
9721 * config/bpf/bpf.cc (bpf_compute_frame_layout): Do not reserve
9722 space for callee-saved registers.
9723 (bpf_expand_prologue): Do not save callee-saved registers in xbpf.
9724 (bpf_expand_epilogue): Do not restore callee-saved registers in
9727 2023-08-11 Jose E. Marchesi <jose.marchesi@oracle.com>
9729 * config/bpf/bpf.cc (bpf_function_arg_advance): Do not complain
9730 about too many arguments if function is always inlined.
9732 2023-08-11 Patrick Palka <ppalka@redhat.com>
9734 * tree-pretty-print.cc (dump_generic_node) <case COMPONENT_REF>:
9735 Don't call component_ref_field_offset if the RHS isn't a decl.
9737 2023-08-11 John David Anglin <danglin@gcc.gnu.org>
9740 * gensupport.cc(class conlist): Use strtol instead of std::stoi.
9742 2023-08-11 Vladimir N. Makarov <vmakarov@redhat.com>
9744 * lra-constraints.cc (goal_alt_out_sp_reload_p): New flag.
9745 (process_alt_operands): Set the flag.
9746 (curr_insn_transform): Modify stack pointer offsets if output
9747 stack pointer reload is generated.
9749 2023-08-11 Joseph Myers <joseph@codesourcery.com>
9751 * configure: Regenerate.
9753 2023-08-11 Richard Biener <rguenther@suse.de>
9755 PR tree-optimization/110979
9756 * tree-vect-loop.cc (vectorizable_reduction): For
9757 FOLD_LEFT_REDUCTION without target support make sure
9758 we don't need to honor signed zeros and sign dependent rounding.
9760 2023-08-11 Richard Biener <rguenther@suse.de>
9762 * tree-vect-slp.cc (vect_slp_region): Provide opt-info for all SLP
9763 subgraph entries. Dump the used vector size based on the
9764 SLP subgraph entry root vector type.
9766 2023-08-11 Pan Li <pan2.li@intel.com>
9768 * config/riscv/riscv-vector-builtins-bases.cc
9769 (class vfmsub_frm): New class for vfmsub frm.
9770 (vfmsub_frm): New declaration.
9772 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9773 * config/riscv/riscv-vector-builtins-functions.def
9774 (vfmsub_frm): New function declaration.
9776 2023-08-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9778 * doc/md.texi: Add vec_mask_len_{load_lanes,store_lanes} patterns.
9779 * internal-fn.cc (expand_partial_load_optab_fn): Ditto.
9780 (expand_partial_store_optab_fn): Ditto.
9781 * internal-fn.def (MASK_LEN_LOAD_LANES): Ditto.
9782 (MASK_LEN_STORE_LANES): Ditto.
9783 * optabs.def (OPTAB_CD): Ditto.
9785 2023-08-11 Pan Li <pan2.li@intel.com>
9787 * config/riscv/riscv-vector-builtins-bases.cc
9788 (class vfnmadd_frm): New class for vfnmadd frm.
9789 (vfnmadd_frm): New declaration.
9791 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9792 * config/riscv/riscv-vector-builtins-functions.def
9793 (vfnmadd_frm): New function declaration.
9795 2023-08-11 Drew Ross <drross@redhat.com>
9796 Jakub Jelinek <jakub@redhat.com>
9798 PR tree-optimization/109938
9799 * match.pd (((x ^ y) & z) | x -> (z & y) | x): New simplification.
9801 2023-08-11 Pan Li <pan2.li@intel.com>
9803 * config/riscv/riscv-vector-builtins-bases.cc
9804 (class vfmadd_frm): New class for vfmadd frm.
9805 (vfmadd_frm_obj): New declaration.
9807 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9808 * config/riscv/riscv-vector-builtins-functions.def
9809 (vfmadd_frm): New function definition.
9811 2023-08-11 Pan Li <pan2.li@intel.com>
9813 * config/riscv/riscv-vector-builtins-bases.cc
9814 (class vfnmsac_frm): New class for vfnmsac frm.
9815 (vfnmsac_frm_obj): New declaration.
9817 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9818 * config/riscv/riscv-vector-builtins-functions.def
9819 (vfnmsac_frm): New function definition.
9821 2023-08-11 Jakub Jelinek <jakub@redhat.com>
9823 * doc/extend.texi (Typeof): Document typeof_unqual
9824 and __typeof_unqual__.
9826 2023-08-11 Andrew Pinski <apinski@marvell.com>
9828 PR tree-optimization/110954
9829 * generic-match-head.cc (bitwise_inverted_equal_p): Add
9830 wascmp argument and set it accordingly.
9831 * gimple-match-head.cc (bitwise_inverted_equal_p): Add
9832 wascmp argument to the macro.
9833 (gimple_bitwise_inverted_equal_p): Add
9834 wascmp argument and set it accordingly.
9835 * match.pd (`a & ~a`, `a ^| ~a`): Update call
9836 to bitwise_inverted_equal_p and handle wascmp case.
9837 (`(~x | y) & x`, `(~x | y) & x`, `a?~t:t`): Update
9838 call to bitwise_inverted_equal_p and check to see
9839 if was !wascmp or if precision was 1.
9841 2023-08-11 Martin Uecker <uecker@tugraz.at>
9844 * doc/invoke.texi: Update.
9846 2023-08-11 Pan Li <pan2.li@intel.com>
9848 * config/riscv/riscv-vector-builtins-bases.cc
9849 (class vfmsac_frm): New class for vfmsac frm.
9850 (vfmsac_frm_obj): New declaration.
9852 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9853 * config/riscv/riscv-vector-builtins-functions.def
9854 (vfmsac_frm): New function definition
9856 2023-08-10 Jan Hubicka <jh@suse.cz>
9858 PR middle-end/110923
9859 * tree-ssa-loop-split.cc (split_loop): Watch for division by zero.
9861 2023-08-10 Patrick O'Neill <patrick@rivosinc.com>
9863 * common/config/riscv/riscv-common.cc: Add Ztso and mark Ztso as
9864 dependent on 'a' extension.
9865 * config/riscv/riscv-opts.h (MASK_ZTSO): New mask.
9866 (TARGET_ZTSO): New target.
9867 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_acquire): Add
9869 (riscv_memmodel_needs_amo_release): Add Ztso case.
9870 (riscv_print_operand): Add Ztso case for LR/SC annotations.
9871 * config/riscv/riscv.md: Import sync-rvwmo.md and sync-ztso.md.
9872 * config/riscv/riscv.opt: Add Ztso target variable.
9873 * config/riscv/sync.md (mem_thread_fence_1): Expand to RVWMO or
9875 (atomic_load<mode>): Expand to RVWMO or Ztso specific insn.
9876 (atomic_store<mode>): Expand to RVWMO or Ztso specific insn.
9877 * config/riscv/sync-rvwmo.md: New file. Seperate out RVWMO
9878 specific load/store/fence mappings.
9879 * config/riscv/sync-ztso.md: New file. Seperate out Ztso
9880 specific load/store/fence mappings.
9882 2023-08-10 Jan Hubicka <jh@suse.cz>
9884 * cfgloopmanip.cc (duplicate_loop_body_to_header_edge): Special case loops with
9887 2023-08-10 Jan Hubicka <jh@suse.cz>
9889 * tree-ssa-threadupdate.cc (ssa_fix_duplicate_block_edges): Fix profile update.
9891 2023-08-10 Jan Hubicka <jh@suse.cz>
9893 * profile-count.cc (profile_count::differs_from_p): Fix overflow and
9894 handling of undefined values.
9896 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9899 * tree-ssa-phiopt.cc (single_non_singleton_phi_for_edges): Never
9900 return virtual phis and return NULL if there is a virtual phi
9901 where the arguments from E0 and E1 edges aren't equal.
9903 2023-08-10 Richard Biener <rguenther@suse.de>
9905 * internal-fn.def (VCOND, VCONDU, VCONDEQ, VCOND_MASK,
9906 VEC_SET, VEC_EXTRACT): Make ECF_CONST | ECF_NOTHROW.
9908 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9911 * config/riscv/autovec.md (vec_duplicate<mode>): New pattern.
9913 2023-08-10 Pan Li <pan2.li@intel.com>
9915 * config/riscv/riscv-vector-builtins-bases.cc
9916 (class vfnmacc_frm): New class for vfnmacc.
9917 (vfnmacc_frm_obj): New declaration.
9919 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9920 * config/riscv/riscv-vector-builtins-functions.def
9921 (vfnmacc_frm): New function definition.
9923 2023-08-10 Pan Li <pan2.li@intel.com>
9925 * config/riscv/riscv-vector-builtins-bases.cc
9926 (class vfmacc_frm): New class for vfmacc frm.
9927 (vfmacc_frm_obj): New declaration.
9929 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
9930 * config/riscv/riscv-vector-builtins-functions.def
9931 (vfmacc_frm): New function definition.
9933 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9936 * config/riscv/riscv-v.cc (expand_cond_len_ternop): Add integer ternary.
9938 2023-08-10 Richard Biener <rguenther@suse.de>
9940 * tree-vectorizer.h (vectorizable_live_operation): Remove
9941 gimple_stmt_iterator * argument.
9942 * tree-vect-loop.cc (vectorizable_live_operation): Likewise.
9943 Adjust plumbing around vect_get_loop_mask.
9944 (vect_analyze_loop_operations): Adjust.
9945 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1): Likewise.
9946 (vect_bb_slp_mark_live_stmts): Likewise.
9947 (vect_schedule_slp_node): Likewise.
9948 * tree-vect-stmts.cc (can_vectorize_live_stmts): Likewise.
9949 Remove gimple_stmt_iterator * argument.
9950 (vect_transform_stmt): Adjust.
9952 2023-08-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
9954 * config/riscv/vector-iterators.md: Add missing modes.
9956 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9959 * lto-streamer-in.cc (lto_input_tree_1): Assert TYPE_PRECISION
9960 is up to WIDE_INT_MAX_PRECISION rather than MAX_BITSIZE_MODE_ANY_INT.
9962 2023-08-10 Jakub Jelinek <jakub@redhat.com>
9965 * expr.cc (expand_expr_real_1) <case MEM_REF>: Add an early return for
9966 EXPAND_WRITE or EXPAND_MEMORY modifiers to avoid testing it multiple
9969 2023-08-10 liuhongt <hongtao.liu@intel.com>
9972 * config/i386/mmx.md: (movq_<mode>_to_sse): Also do not
9973 sanitize upper part of V4HFmode register with
9975 (<insn>v4hf3): Enable for ix86_partial_vec_fp_math.
9977 (<insn>v2hf3): Ditto.
9979 (movd_v2hf_to_sse): Do not sanitize upper part of V2HFmode
9980 register with -fno-trapping-math.
9982 2023-08-10 Pan Li <pan2.li@intel.com>
9983 Kito Cheng <kito.cheng@sifive.com>
9985 * config/riscv/riscv-protos.h
9986 (enum floating_point_rounding_mode): Add NONE, DYN_EXIT and DYN_CALL.
9987 (get_frm_mode): New declaration.
9988 * config/riscv/riscv-v.cc (get_frm_mode): New function to get frm mode.
9989 * config/riscv/riscv-vector-builtins.cc
9990 (function_expander::use_ternop_insn): Take care of frm reg.
9991 * config/riscv/riscv.cc (riscv_static_frm_mode_p): Migrate to FRM_XXX.
9992 (riscv_emit_frm_mode_set): Ditto.
9993 (riscv_emit_mode_set): Ditto.
9994 (riscv_frm_adjust_mode_after_call): Ditto.
9995 (riscv_frm_mode_needed): Ditto.
9996 (riscv_frm_mode_after): Ditto.
9997 (riscv_mode_entry): Ditto.
9998 (riscv_mode_exit): Ditto.
9999 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
10000 * config/riscv/vector.md
10001 (rne,rtz,rdn,rup,rmm,dyn,dyn_exit,dyn_call,none): Removed
10002 (symbol_ref): * config/riscv/vector.md: Set frm_mode attr explicitly.
10004 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10006 * config/riscv/riscv-vsetvl.cc (anticipatable_occurrence_p): Fix
10007 incorrect anticipate info.
10009 2023-08-09 Tsukasa OI <research_trasio@irq.a4lg.com>
10011 * common/config/riscv/riscv-common.cc (riscv_ext_version_table):
10012 Remove 'Zve32d' from the version list.
10014 2023-08-09 Jin Ma <jinma@linux.alibaba.com>
10016 * config/riscv/riscv.cc (riscv_sched_variable_issue): New function.
10017 (TARGET_SCHED_VARIABLE_ISSUE): New macro.
10018 Co-authored-by: Philipp Tomsich <philipp.tomsich@vrull.eu>
10019 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10021 2023-08-09 Jivan Hakobyan <jivanhakobyan9@gmail.com>
10023 * config/riscv/riscv.cc (riscv_legitimize_address): Handle folding.
10024 (mem_shadd_or_shadd_rtx_p): New function.
10026 2023-08-09 Andrew Pinski <apinski@marvell.com>
10028 PR tree-optimization/110937
10029 PR tree-optimization/100798
10030 * match.pd (`a ? ~b : b`): Handle this
10033 2023-08-09 Uros Bizjak <ubizjak@gmail.com>
10035 * config/i386/i386.opt (mpartial-vector-fp-math): Add dot.
10037 2023-08-09 Richard Ball <richard.ball@arm.com>
10039 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Add Cortex-A520 CPU.
10040 * config/aarch64/aarch64-tune.md: Regenerate.
10041 * doc/invoke.texi: Document Cortex-A520 CPU.
10043 2023-08-09 Carl Love <cel@us.ibm.com>
10045 * config/rs6000/rs6000-builtins.def (vcmpneb, vcmpneh, vcmpnew):
10046 Move definitions to Altivec stanza.
10047 * config/rs6000/altivec.md (vcmpneb, vcmpneh, vcmpnew): New
10050 2023-08-09 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10053 * config/riscv/riscv-v.cc (expand_const_vector): Add NPATTERNS = 1
10054 stepped vector support.
10056 2023-08-09 liuhongt <hongtao.liu@intel.com>
10058 * common/config/i386/cpuinfo.h (get_available_features):
10059 Rename local variable subleaf_level to max_subleaf_level.
10061 2023-08-09 Richard Biener <rguenther@suse.de>
10063 PR rtl-optimization/110587
10064 * lra-assigns.cc (find_hard_regno_for_1): Re-order checks.
10066 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
10068 PR tree-optimization/110248
10069 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Check if
10070 the given code is for ifn LEN_{LOAD,STORE}, if yes then make it not
10071 legitimate when outer code is PLUS.
10073 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
10075 PR tree-optimization/110248
10076 * recog.cc (memory_address_addr_space_p): Add one more argument ch of
10077 type code_helper and pass it to targetm.addr_space.legitimate_address_p
10078 instead of ERROR_MARK.
10079 (offsettable_address_addr_space_p): Update one function pointer with
10080 one more argument of type code_helper as its assignees
10081 memory_address_addr_space_p and strict_memory_address_addr_space_p
10082 have been adjusted, and adjust some call sites with ERROR_MARK.
10083 * recog.h (tree.h): New include header file for tree_code ERROR_MARK.
10084 (memory_address_addr_space_p): Adjust with one more unnamed argument
10085 of type code_helper with default ERROR_MARK.
10086 (strict_memory_address_addr_space_p): Likewise.
10087 * reload.cc (strict_memory_address_addr_space_p): Add one unnamed
10088 argument of type code_helper.
10089 * tree-ssa-address.cc (valid_mem_ref_p): Add one more argument ch of
10090 type code_helper and pass it to memory_address_addr_space_p.
10091 * tree-ssa-address.h (valid_mem_ref_p): Adjust the declaration with
10092 one more unnamed argument of type code_helper with default value
10094 * tree-ssa-loop-ivopts.cc (get_address_cost): Use ERROR_MARK as code
10095 by default, change it with ifn code for USE_PTR_ADDRESS type use, and
10096 pass it to all valid_mem_ref_p calls.
10098 2023-08-09 Kewen Lin <linkw@linux.ibm.com>
10100 PR tree-optimization/110248
10101 * coretypes.h (class code_helper): Add forward declaration.
10102 * doc/tm.texi: Regenerate.
10103 * lra-constraints.cc (valid_address_p): Call target hook
10104 targetm.addr_space.legitimate_address_p with an extra parameter
10105 ERROR_MARK as its prototype changes.
10106 * recog.cc (memory_address_addr_space_p): Likewise.
10107 * reload.cc (strict_memory_address_addr_space_p): Likewise.
10108 * target.def (legitimate_address_p, addr_space.legitimate_address_p):
10109 Extend with one more argument of type code_helper, update the
10110 documentation accordingly.
10111 * targhooks.cc (default_legitimate_address_p): Adjust for the
10112 new code_helper argument.
10113 (default_addr_space_legitimate_address_p): Likewise.
10114 * targhooks.h (default_legitimate_address_p): Likewise.
10115 (default_addr_space_legitimate_address_p): Likewise.
10116 * config/aarch64/aarch64.cc (aarch64_legitimate_address_hook_p): Adjust
10117 with extra unnamed code_helper argument with default ERROR_MARK.
10118 * config/alpha/alpha.cc (alpha_legitimate_address_p): Likewise.
10119 * config/arc/arc.cc (arc_legitimate_address_p): Likewise.
10120 * config/arm/arm-protos.h (arm_legitimate_address_p): Likewise.
10121 (tree.h): New include for tree_code ERROR_MARK.
10122 * config/arm/arm.cc (arm_legitimate_address_p): Adjust with extra
10123 unnamed code_helper argument with default ERROR_MARK.
10124 * config/avr/avr.cc (avr_addr_space_legitimate_address_p): Likewise.
10125 * config/bfin/bfin.cc (bfin_legitimate_address_p): Likewise.
10126 * config/bpf/bpf.cc (bpf_legitimate_address_p): Likewise.
10127 * config/c6x/c6x.cc (c6x_legitimate_address_p): Likewise.
10128 * config/cris/cris-protos.h (cris_legitimate_address_p): Likewise.
10129 (tree.h): New include for tree_code ERROR_MARK.
10130 * config/cris/cris.cc (cris_legitimate_address_p): Adjust with extra
10131 unnamed code_helper argument with default ERROR_MARK.
10132 * config/csky/csky.cc (csky_legitimate_address_p): Likewise.
10133 * config/epiphany/epiphany.cc (epiphany_legitimate_address_p):
10135 * config/frv/frv.cc (frv_legitimate_address_p): Likewise.
10136 * config/ft32/ft32.cc (ft32_addr_space_legitimate_address_p): Likewise.
10137 * config/gcn/gcn.cc (gcn_addr_space_legitimate_address_p): Likewise.
10138 * config/h8300/h8300.cc (h8300_legitimate_address_p): Likewise.
10139 * config/i386/i386.cc (ix86_legitimate_address_p): Likewise.
10140 * config/ia64/ia64.cc (ia64_legitimate_address_p): Likewise.
10141 * config/iq2000/iq2000.cc (iq2000_legitimate_address_p): Likewise.
10142 * config/lm32/lm32.cc (lm32_legitimate_address_p): Likewise.
10143 * config/loongarch/loongarch.cc (loongarch_legitimate_address_p):
10145 * config/m32c/m32c.cc (m32c_legitimate_address_p): Likewise.
10146 (m32c_addr_space_legitimate_address_p): Likewise.
10147 * config/m32r/m32r.cc (m32r_legitimate_address_p): Likewise.
10148 * config/m68k/m68k.cc (m68k_legitimate_address_p): Likewise.
10149 * config/mcore/mcore.cc (mcore_legitimate_address_p): Likewise.
10150 * config/microblaze/microblaze-protos.h (tree.h): New include for
10151 tree_code ERROR_MARK.
10152 (microblaze_legitimate_address_p): Adjust with extra unnamed
10153 code_helper argument with default ERROR_MARK.
10154 * config/microblaze/microblaze.cc (microblaze_legitimate_address_p):
10156 * config/mips/mips.cc (mips_legitimate_address_p): Likewise.
10157 * config/mmix/mmix.cc (mmix_legitimate_address_p): Likewise.
10158 * config/mn10300/mn10300.cc (mn10300_legitimate_address_p): Likewise.
10159 * config/moxie/moxie.cc (moxie_legitimate_address_p): Likewise.
10160 * config/msp430/msp430.cc (msp430_legitimate_address_p): Likewise.
10161 (msp430_addr_space_legitimate_address_p): Adjust with extra code_helper
10162 argument with default ERROR_MARK and adjust the call to function
10163 msp430_legitimate_address_p.
10164 * config/nds32/nds32.cc (nds32_legitimate_address_p): Adjust with extra
10165 unnamed code_helper argument with default ERROR_MARK.
10166 * config/nios2/nios2.cc (nios2_legitimate_address_p): Likewise.
10167 * config/nvptx/nvptx.cc (nvptx_legitimate_address_p): Likewise.
10168 * config/or1k/or1k.cc (or1k_legitimate_address_p): Likewise.
10169 * config/pa/pa.cc (pa_legitimate_address_p): Likewise.
10170 * config/pdp11/pdp11.cc (pdp11_legitimate_address_p): Likewise.
10171 * config/pru/pru.cc (pru_addr_space_legitimate_address_p): Likewise.
10172 * config/riscv/riscv.cc (riscv_legitimate_address_p): Likewise.
10173 * config/rl78/rl78-protos.h (rl78_as_legitimate_address): Likewise.
10174 (tree.h): New include for tree_code ERROR_MARK.
10175 * config/rl78/rl78.cc (rl78_as_legitimate_address): Adjust with
10176 extra unnamed code_helper argument with default ERROR_MARK.
10177 * config/rs6000/rs6000.cc (rs6000_legitimate_address_p): Likewise.
10178 (rs6000_debug_legitimate_address_p): Adjust with extra code_helper
10179 argument and adjust the call to function rs6000_legitimate_address_p.
10180 * config/rx/rx.cc (rx_is_legitimate_address): Adjust with extra
10181 unnamed code_helper argument with default ERROR_MARK.
10182 * config/s390/s390.cc (s390_legitimate_address_p): Likewise.
10183 * config/sh/sh.cc (sh_legitimate_address_p): Likewise.
10184 * config/sparc/sparc.cc (sparc_legitimate_address_p): Likewise.
10185 * config/v850/v850.cc (v850_legitimate_address_p): Likewise.
10186 * config/vax/vax.cc (vax_legitimate_address_p): Likewise.
10187 * config/visium/visium.cc (visium_legitimate_address_p): Likewise.
10188 * config/xtensa/xtensa.cc (xtensa_legitimate_address_p): Likewise.
10189 * config/stormy16/stormy16-protos.h (xstormy16_legitimate_address_p):
10191 (tree.h): New include for tree_code ERROR_MARK.
10192 * config/stormy16/stormy16.cc (xstormy16_legitimate_address_p):
10193 Adjust with extra unnamed code_helper argument with default
10196 2023-08-09 liuhongt <hongtao.liu@intel.com>
10198 * common/config/i386/cpuinfo.h (get_available_features): Check
10199 EAX for valid subleaf before use CPUID.
10201 2023-08-08 Jeff Law <jlaw@ventanamicro.com>
10203 * config/riscv/riscv.cc (riscv_expand_conditional_move): Use word_mode
10204 for the temporary when canonicalizing the condition.
10206 2023-08-08 Cupertino Miranda <cupertino.miranda@oracle.com>
10208 * config/bpf/core-builtins.cc: Cleaned include headers.
10209 (struct cr_builtins): Added GTY.
10210 (cr_builtins_ref): Created.
10211 (builtins_data) Changed to GC root.
10212 (allocate_builtin_data): Changed.
10213 Included gt-core-builtins.h.
10214 * config/bpf/coreout.cc: (bpf_core_extra) Added GTY.
10215 (bpf_core_extra_ref): Created.
10216 (bpf_comment_info): Changed to GC root.
10217 (bpf_core_reloc_add, output_btfext_header, btf_ext_init): Changed.
10219 2023-08-08 Uros Bizjak <ubizjak@gmail.com>
10222 * config/i386/i386.opt (mpartial-vector-fp-math): New option.
10223 * config/i386/mmx.md (movq_<mode>_to_sse): Do not sanitize
10224 upper part of V2SFmode register with -fno-trapping-math.
10225 (<plusminusmult:insn>v2sf3): Enable for ix86_partial_vec_fp_math.
10227 (<smaxmin:code>v2sf3): Ditto.
10228 (sqrtv2sf2): Ditto.
10229 (*mmx_haddv2sf3_low): Ditto.
10230 (*mmx_hsubv2sf3_low): Ditto.
10231 (vec_addsubv2sf3): Ditto.
10232 (vec_cmpv2sfv2si): Ditto.
10233 (vcond<V2FI:mode>v2sf): Ditto.
10236 (fnmav2sf4): Ditto.
10237 (fnmsv2sf4): Ditto.
10238 (fix_truncv2sfv2si2): Ditto.
10239 (fixuns_truncv2sfv2si2): Ditto.
10240 (floatv2siv2sf2): Ditto.
10241 (floatunsv2siv2sf2): Ditto.
10242 (nearbyintv2sf2): Ditto.
10243 (rintv2sf2): Ditto.
10244 (lrintv2sfv2si2): Ditto.
10245 (ceilv2sf2): Ditto.
10246 (lceilv2sfv2si2): Ditto.
10247 (floorv2sf2): Ditto.
10248 (lfloorv2sfv2si2): Ditto.
10249 (btruncv2sf2): Ditto.
10250 (roundv2sf2): Ditto.
10251 (lroundv2sfv2si2): Ditto.
10252 * doc/invoke.texi (x86 Options): Document
10253 -mpartial-vector-fp-math option.
10255 2023-08-08 Andrew Pinski <apinski@marvell.com>
10257 PR tree-optimization/103281
10258 PR tree-optimization/28794
10259 * vr-values.cc (simplify_using_ranges::simplify_cond_using_ranges_1): Split out
10261 (simplify_using_ranges::simplify_compare_using_ranges_1): Here.
10262 (simplify_using_ranges::simplify_casted_cond): Rename to ...
10263 (simplify_using_ranges::simplify_casted_compare): This
10264 and change arguments to take op0 and op1.
10265 (simplify_using_ranges::simplify_compare_assign_using_ranges_1): New method.
10266 (simplify_using_ranges::simplify): For tcc_comparison assignments call
10267 simplify_compare_assign_using_ranges_1.
10268 * vr-values.h (simplify_using_ranges): Add
10269 new methods, simplify_compare_using_ranges_1 and simplify_compare_assign_using_ranges_1.
10270 Rename simplify_casted_cond and simplify_casted_compare and
10271 update argument types.
10273 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10275 * genmatch.cc: Log line numbers indirectly.
10277 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10279 * genmatch.cc: Make sinfo map ordered.
10280 * Makefile.in: Require the ordered map header for genmatch.o.
10282 2023-08-08 Andrzej Turko <andrzej.turko@gmail.com>
10284 * ordered-hash-map.h: Add get_or_insert.
10285 * ordered-hash-map-tests.cc: Use get_or_insert in tests.
10287 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10289 * config/riscv/autovec.md (cond_<optab><mode>): New pattern.
10290 (cond_len_<optab><mode>): Ditto.
10291 (cond_fma<mode>): Ditto.
10292 (cond_len_fma<mode>): Ditto.
10293 (cond_fnma<mode>): Ditto.
10294 (cond_len_fnma<mode>): Ditto.
10295 (cond_fms<mode>): Ditto.
10296 (cond_len_fms<mode>): Ditto.
10297 (cond_fnms<mode>): Ditto.
10298 (cond_len_fnms<mode>): Ditto.
10299 * config/riscv/riscv-protos.h (riscv_get_v_regno_alignment): Export
10301 (enum insn_type): Add new enum type.
10302 (prepare_ternary_operands): New function.
10303 * config/riscv/riscv-v.cc (emit_vlmax_masked_fp_mu_insn): Ditto.
10304 (emit_nonvlmax_tumu_insn): Ditto.
10305 (emit_nonvlmax_fp_tumu_insn): Ditto.
10306 (expand_cond_len_binop): Add condtional operations.
10307 (expand_cond_len_ternop): Ditto.
10308 (prepare_ternary_operands): New function.
10309 * config/riscv/riscv.cc (riscv_memmodel_needs_amo_release): Export
10310 riscv_get_v_regno_alignment as global scope.
10311 * config/riscv/vector.md: Fix ternary bugs.
10313 2023-08-08 Richard Biener <rguenther@suse.de>
10315 PR tree-optimization/49955
10316 * tree-vectorizer.h (_slp_instance::remain_stmts): New.
10317 (SLP_INSTANCE_REMAIN_STMTS): Likewise.
10318 * tree-vect-slp.cc (vect_free_slp_instance): Release
10319 SLP_INSTANCE_REMAIN_STMTS.
10320 (vect_build_slp_instance): Make the number of lanes of
10321 a BB reduction even.
10322 (vectorize_slp_instance_root_stmt): Handle unvectorized
10323 defs of a BB reduction.
10325 2023-08-08 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
10327 * internal-fn.cc (get_len_internal_fn): New function.
10328 (DEF_INTERNAL_COND_FN): Ditto.
10329 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
10330 * internal-fn.h (get_len_internal_fn): Ditto.
10331 * tree-vect-stmts.cc (vectorizable_call): Add CALL auto-vectorization.
10333 2023-08-08 Richard Biener <rguenther@suse.de>
10335 PR tree-optimization/110924
10336 * tree-ssa-live.h (virtual_operand_live): Update comment.
10337 * tree-ssa-live.cc (virtual_operand_live::get_live_in): Remove
10338 optimization, look at each predecessor.
10339 * tree-ssa-sink.cc (pass_sink_code::execute): Mark backedges.
10341 2023-08-08 yulong <shiyulong@iscas.ac.cn>
10343 * config/riscv/riscv-v.cc (slide1_sew64_helper): Modify.
10345 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10347 * config/riscv/autovec-vls.md (<optab><mode>2): Add VLS neg.
10348 * config/riscv/vector.md: Ditto.
10350 2023-08-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10352 * config/riscv/autovec.md: Add VLS shift.
10354 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10356 * config/riscv/autovec-vls.md (<optab><mode>3): Add VLS modes.
10357 * config/riscv/vector-iterators.md: Ditto.
10358 * config/riscv/vector.md: Ditto.
10360 2023-08-07 Jonathan Wakely <jwakely@redhat.com>
10362 * config/i386/i386.cc (ix86_invalid_conversion): Fix grammar.
10364 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10366 * configure: Regenerate.
10368 2023-08-07 John Ericson <git@JohnEricson.me>
10370 * configure: Regenerate.
10372 2023-08-07 Alan Modra <amodra@gmail.com>
10374 * configure: Regenerate.
10376 2023-08-07 Alexander von Gluck IV <kallisti5@unixzen.com>
10378 * configure: Regenerate.
10380 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10382 * configure: Regenerate.
10384 2023-08-07 Nick Alcock <nick.alcock@oracle.com>
10386 * configure: Regenerate.
10388 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
10390 * configure: Regenerate.
10392 2023-08-07 H.J. Lu <hjl.tools@gmail.com>
10394 * configure: Regenerate.
10396 2023-08-07 Jeff Law <jlaw@ventanamicro.com>
10398 * config/riscv/riscv.cc (riscv_expand_conditional_move): Allow
10399 VOIDmode operands to conditional before canonicalization.
10401 2023-08-07 Manolis Tsamis <manolis.tsamis@vrull.eu>
10403 * regcprop.cc (maybe_copy_reg_attrs): Remove unnecessary function.
10404 (find_oldest_value_reg): Inline stack_pointer_rtx check.
10405 (copyprop_hardreg_forward_1): Inline stack_pointer_rtx check.
10407 2023-08-07 Martin Jambor <mjambor@suse.cz>
10410 * ipa-param-manipulation.h (class ipa_param_body_adjustments): New
10411 members get_ddef_if_exists_and_is_used and mark_clobbers_dead.
10412 * ipa-sra.cc (isra_track_scalar_value_uses): Ignore clobbers.
10413 (ptr_parm_has_nonarg_uses): Likewise.
10414 * ipa-param-manipulation.cc
10415 (ipa_param_body_adjustments::get_ddef_if_exists_and_is_used): New.
10416 (ipa_param_body_adjustments::mark_dead_statements): Move initial
10417 checks to get_ddef_if_exists_and_is_used.
10418 (ipa_param_body_adjustments::mark_clobbers_dead): New.
10419 (ipa_param_body_adjustments::common_initialization): Call
10420 mark_clobbers_dead when splitting.
10422 2023-08-07 Raphael Zinsly <rzinsly@ventanamicro.com>
10424 * config/riscv/riscv.cc (riscv_expand_int_scc): Add invert_ptr
10425 as an argument and pass it to riscv_emit_int_order_test.
10426 (riscv_expand_conditional_move): Handle cases where the condition
10427 is not EQ/NE or the second argument to the conditional is not
10429 * config/riscv/riscv-protos.h (riscv_expand_int_scc): Update prototype.
10430 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10432 2023-08-07 Andrew Pinski <apinski@marvell.com>
10434 PR tree-optimization/109959
10435 * match.pd (`(a > 1) ? 0 : (cast)a`, `(a <= 1) & (cast)a`):
10438 2023-08-07 Richard Biener <rguenther@suse.de>
10440 * tree-ssa-sink.cc (pass_sink_code::execute): Do not
10441 calculate post-dominators. Calculate RPO on the inverted
10442 graph and process blocks in that order.
10444 2023-08-07 liuhongt <hongtao.liu@intel.com>
10447 * config/i386/i386-protos.h
10448 (vpternlog_redundant_operand_mask): Adjust parameter type.
10449 * config/i386/i386.cc (vpternlog_redundant_operand_mask): Use
10450 INTVAL instead of XINT, also adjust parameter type from rtx*
10451 to rtx since the function only needs operands[4] in vpternlog
10453 (substitute_vpternlog_operands): Pass operands[4] instead of
10454 operands to vpternlog_redundant_operand_mask.
10455 * config/i386/sse.md: Ditto.
10457 2023-08-07 Richard Biener <rguenther@suse.de>
10459 * tree-vect-slp.cc (vect_slp_region): Save/restore vect_location
10460 around dumping code.
10462 2023-08-07 liuhongt <hongtao.liu@intel.com>
10465 * config/i386/mmx.md (<insn><mode>3): Changed from define_insn
10466 to define_expand and break into ..
10467 (<insn>v4hf3): .. this.
10468 (divv4hf3): .. this.
10469 (<insn>v2hf3): .. this.
10470 (divv2hf3): .. this.
10471 (movd_v2hf_to_sse): New define_expand.
10472 (movq_<mode>_to_sse): Extend to V4HFmode.
10473 (mmxdoublevecmode): Ditto.
10474 (V2FI_V4HF): New mode iterator.
10475 * config/i386/sse.md (*vec_concatv4sf): Extend to hanlde V8HF
10476 by using mode iterator V4SF_V8HF, renamed to ..
10477 (*vec_concat<mode>): .. this.
10478 (*vec_concatv4sf_0): Extend to handle V8HF by using mode
10479 iterator V4SF_V8HF, renamed to ..
10480 (*vec_concat<mode>_0): .. this.
10481 (*vec_concatv8hf_movss): New define_insn.
10482 (V4SF_V8HF): New mode iterator.
10484 2023-08-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
10486 * tree-vect-patterns.cc (vect_recog_over_widening_pattern): Add op vectype.
10488 2023-08-07 Jan Beulich <jbeulich@suse.com>
10490 * config/i386/mmx.md (*mmx_pinsrd): Drop "prefix_data16".
10491 (*mmx_pinsrb): Likewise.
10492 (*mmx_pextrb): Likewise.
10493 (*mmx_pextrb_zext): Likewise.
10494 (mmx_pshufbv8qi3): Likewise.
10495 (mmx_pshufbv4qi3): Likewise.
10496 (mmx_pswapdv2si2): Likewise.
10497 (*pinsrb): Likewise.
10498 (*pextrb): Likewise.
10499 (*pextrb_zext): Likewise.
10500 * config/i386/sse.md (*sse4_1_mulv2siv2di3<mask_name>): Likewise.
10501 (*sse2_eq<mode>3): Likewise.
10502 (*sse2_gt<mode>3): Likewise.
10503 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
10504 (*vec_extract<mode>): Likewise.
10505 (*vec_extract<PEXTR_MODE12:mode>_zext): Likewise.
10506 (*vec_extractv16qi_zext): Likewise.
10507 (ssse3_ph<plusminus_mnemonic>wv8hi3): Likewise.
10508 (ssse3_pmaddubsw128): Likewise.
10509 (*<ssse3_avx2>_pmulhrsw<mode>3<mask_name>): Likewise.
10510 (<ssse3_avx2>_pshufb<mode>3<mask_name>): Likewise.
10511 (<ssse3_avx2>_psign<mode>3): Likewise.
10512 (<ssse3_avx2>_palignr<mode>): Likewise.
10513 (*abs<mode>2): Likewise.
10514 (sse4_2_pcmpestr): Likewise.
10515 (sse4_2_pcmpestri): Likewise.
10516 (sse4_2_pcmpestrm): Likewise.
10517 (sse4_2_pcmpestr_cconly): Likewise.
10518 (sse4_2_pcmpistr): Likewise.
10519 (sse4_2_pcmpistri): Likewise.
10520 (sse4_2_pcmpistrm): Likewise.
10521 (sse4_2_pcmpistr_cconly): Likewise.
10522 (vgf2p8affineinvqb_<mode><mask_name>): Likewise.
10523 (vgf2p8affineqb_<mode><mask_name>): Likewise.
10524 (vgf2p8mulb_<mode><mask_name>): Likewise.
10525 (*<code>v8hi3 [smaxmin]): Drop "prefix_data16" and
10527 (*<code>v16qi3 [umaxmin]): Likewise.
10529 2023-08-07 Jan Beulich <jbeulich@suse.com>
10531 * config/i386/i386.md (sse4_1_round<mode>2): Make
10532 "length_immediate" uniformly 1.
10533 * config/i386/mmx.md (mmx_pblendvb_v8qi): Likewise.
10534 (mmx_pblendvb_<mode>): Likewise.
10536 2023-08-07 Jan Beulich <jbeulich@suse.com>
10538 * config/i386/sse.md
10539 (<avx512>_<complexopname>_<mode><maskc_name><round_name>): Add
10540 "prefix" attribute.
10541 (avx512fp16_<complexopname>sh_v8hf<mask_scalarc_name><round_scalarcz_name>):
10544 2023-08-07 Jan Beulich <jbeulich@suse.com>
10546 * config/i386/sse.md (xop_phadd<u>bw): Add "prefix",
10547 "prefix_extra", and "mode" attributes.
10548 (xop_phadd<u>bd): Likewise.
10549 (xop_phadd<u>bq): Likewise.
10550 (xop_phadd<u>wd): Likewise.
10551 (xop_phadd<u>wq): Likewise.
10552 (xop_phadd<u>dq): Likewise.
10553 (xop_phsubbw): Likewise.
10554 (xop_phsubwd): Likewise.
10555 (xop_phsubdq): Likewise.
10556 (xop_rotl<mode>3): Add "prefix" and "prefix_extra" attributes.
10557 (xop_rotr<mode>3): Likewise.
10558 (xop_frcz<mode>2): Likewise.
10559 (*xop_vmfrcz<mode>2): Likewise.
10560 (xop_vrotl<mode>3): Add "prefix" attribute. Change
10561 "prefix_extra" to 1.
10562 (xop_sha<mode>3): Likewise.
10563 (xop_shl<mode>3): Likewise.
10565 2023-08-07 Jan Beulich <jbeulich@suse.com>
10567 * config/i386/sse.md
10568 (*<avx512>_eq<mode>3<mask_scalar_merge_name>_1): Drop
10570 (avx512dq_vextract<shuffletype>64x2_1_mask): Likewise.
10571 (*avx512dq_vextract<shuffletype>64x2_1): Likewise.
10572 (avx512f_vextract<shuffletype>32x4_1_mask): Likewise.
10573 (*avx512f_vextract<shuffletype>32x4_1): Likewise.
10574 (vec_extract_lo_<mode>_mask [AVX512 forms]): Likewise.
10575 (vec_extract_lo_<mode> [AVX512 forms]): Likewise.
10576 (vec_extract_hi_<mode>_mask [AVX512 forms]): Likewise.
10577 (vec_extract_hi_<mode> [AVX512 forms]): Likewise.
10578 (@vec_extract_lo_<mode> [AVX512 forms]): Likewise.
10579 (@vec_extract_hi_<mode> [AVX512 forms]): Likewise.
10580 (vec_extract_lo_v64qi): Likewise.
10581 (vec_extract_hi_v64qi): Likewise.
10582 (*vec_widen_umult_even_v16si<mask_name>): Likewise.
10583 (*vec_widen_smult_even_v16si<mask_name>): Likewise.
10584 (*avx512f_<code><mode>3<mask_name>): Likewise.
10585 (*vec_extractv4ti): Likewise.
10586 (avx512bw_<code>v32qiv32hi2<mask_name>): Likewise.
10587 (<mask_codefor>avx512dq_broadcast<mode><mask_name>_1): Likewise.
10588 Add "length_immediate".
10590 2023-08-07 Jan Beulich <jbeulich@suse.com>
10592 * config/i386/i386.md (@rdrand<mode>): Add "prefix_0f". Drop
10594 (@rdseed<mode>): Likewise.
10595 * config/i386/mmx.md (<code><mode>3 [smaxmin and umaxmin cases]):
10596 Adjust "prefix_extra".
10597 * config/i386/sse.md (@vec_set<mode>_0): Likewise.
10598 (*sse4_1_<code><mode>3<mask_name>): Likewise.
10599 (*avx2_eq<mode>3): Likewise.
10600 (avx2_gt<mode>3): Likewise.
10601 (<sse2p4_1>_pinsr<ssemodesuffix>): Likewise.
10602 (*vec_extract<mode>): Likewise.
10603 (<vi8_sse4_1_avx2_avx512>_movntdqa): Likewise.
10605 2023-08-07 Jan Beulich <jbeulich@suse.com>
10607 * config/i386/i386.md (rd<fsgs>base<mode>): Add "prefix_0f" and
10608 "prefix_rep". Drop "prefix_extra".
10609 (wr<fsgs>base<mode>): Likewise.
10610 (ptwrite<mode>): Likewise.
10612 2023-08-07 Jan Beulich <jbeulich@suse.com>
10614 * config/i386/i386.md (isa): Move up.
10615 (length_immediate): Handle "fma4".
10616 (prefix): Handle "ssemuladd".
10617 * config/i386/sse.md (*fma_fmadd_<mode>): Add "prefix" attribute.
10618 (<sd_mask_codefor>fma_fmadd_<mode><sd_maskz_name><round_name>):
10620 (<avx512>_fmadd_<mode>_mask<round_name>): Likewise.
10621 (<avx512>_fmadd_<mode>_mask3<round_name>): Likewise.
10622 (<sd_mask_codefor>fma_fmsub_<mode><sd_maskz_name><round_name>):
10624 (<avx512>_fmsub_<mode>_mask<round_name>): Likewise.
10625 (<avx512>_fmsub_<mode>_mask3<round_name>): Likewise.
10626 (*fma_fnmadd_<mode>): Likewise.
10627 (<sd_mask_codefor>fma_fnmadd_<mode><sd_maskz_name><round_name>):
10629 (<avx512>_fnmadd_<mode>_mask<round_name>): Likewise.
10630 (<avx512>_fnmadd_<mode>_mask3<round_name>): Likewise.
10631 (<sd_mask_codefor>fma_fnmsub_<mode><sd_maskz_name><round_name>):
10633 (<avx512>_fnmsub_<mode>_mask<round_name>): Likewise.
10634 (<avx512>_fnmsub_<mode>_mask3<round_name>): Likewise.
10635 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
10637 (<avx512>_fmaddsub_<mode>_mask<round_name>): Likewise.
10638 (<avx512>_fmaddsub_<mode>_mask3<round_name>): Likewise.
10639 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
10641 (<avx512>_fmsubadd_<mode>_mask<round_name>): Likewise.
10642 (<avx512>_fmsubadd_<mode>_mask3<round_name>): Likewise.
10643 (*fmai_fmadd_<mode>): Likewise.
10644 (*fmai_fmsub_<mode>): Likewise.
10645 (*fmai_fnmadd_<mode><round_name>): Likewise.
10646 (*fmai_fnmsub_<mode><round_name>): Likewise.
10647 (avx512f_vmfmadd_<mode>_mask<round_name>): Likewise.
10648 (avx512f_vmfmadd_<mode>_mask3<round_name>): Likewise.
10649 (avx512f_vmfmadd_<mode>_maskz_1<round_name>): Likewise.
10650 (*avx512f_vmfmsub_<mode>_mask<round_name>): Likewise.
10651 (avx512f_vmfmsub_<mode>_mask3<round_name>): Likewise.
10652 (*avx512f_vmfmsub_<mode>_maskz_1<round_name>): Likewise.
10653 (avx512f_vmfnmadd_<mode>_mask<round_name>): Likewise.
10654 (avx512f_vmfnmadd_<mode>_mask3<round_name>): Likewise.
10655 (avx512f_vmfnmadd_<mode>_maskz_1<round_name>): Likewise.
10656 (*avx512f_vmfnmsub_<mode>_mask<round_name>): Likewise.
10657 (*avx512f_vmfnmsub_<mode>_mask3<round_name>): Likewise.
10658 (*avx512f_vmfnmsub_<mode>_maskz_1<round_name>): Likewise.
10659 (*fma4i_vmfmadd_<mode>): Likewise.
10660 (*fma4i_vmfmsub_<mode>): Likewise.
10661 (*fma4i_vmfnmadd_<mode>): Likewise.
10662 (*fma4i_vmfnmsub_<mode>): Likewise.
10663 (fma_<complexopname>_<mode><sdc_maskz_name><round_name>): Likewise.
10664 (<avx512>_<complexopname>_<mode>_mask<round_name>): Likewise.
10665 (avx512fp16_fma_<complexopname>sh_v8hf<mask_scalarcz_name><round_scalarcz_name>):
10667 (avx512fp16_<complexopname>sh_v8hf_mask<round_name>): Likewise.
10668 (xop_p<macs><ssemodesuffix><ssemodesuffix>): Likewise.
10669 (xop_p<macs>dql): Likewise.
10670 (xop_p<macs>dqh): Likewise.
10671 (xop_p<macs>wd): Likewise.
10672 (xop_p<madcs>wd): Likewise.
10673 (fma_<complexpairopname>_<mode>_pair): Likewise. Add "mode" attribute.
10675 2023-08-07 Jan Beulich <jbeulich@suse.com>
10677 * config/i386/i386.md (length_immediate): Handle "sse4arg".
10678 (prefix): Likewise.
10679 (*xop_pcmov_<mode>): Add "mode" attribute.
10680 * config/i386/mmx.md (*xop_maskcmp<mode>3): Drop "prefix_data16",
10681 "prefix_rep", "prefix_extra", and "length_immediate" attributes.
10682 (*xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
10683 (*xop_pcmov_<mode>): Add "mode" attribute.
10684 * config/i386/sse.md (xop_pcmov_<mode><avxsizesuffix>): Add "mode"
10686 (xop_maskcmp<mode>3): Drop "prefix_data16", "prefix_rep",
10687 "prefix_extra", and "length_immediate" attributes.
10688 (xop_maskcmp_uns<mode>3): Likewise. Switch "type" to "sse4arg".
10689 (xop_maskcmp_uns2<mode>3): Drop "prefix_data16", "prefix_extra",
10690 and "length_immediate" attributes. Switch "type" to "sse4arg".
10691 (xop_pcom_tf<mode>3): Likewise.
10692 (xop_vpermil2<mode>3): Drop "length_immediate" attribute.
10694 2023-08-07 Jan Beulich <jbeulich@suse.com>
10696 * config/i386/i386.md (prefix_extra): Correct comment. Fold
10697 cases yielding 2 into ones yielding 1.
10699 2023-08-07 Jan Hubicka <jh@suse.cz>
10701 PR tree-optimization/106293
10702 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
10703 * tree-vect-loop.cc (vect_transform_loop): Likewise.
10705 2023-08-07 Andrew Pinski <apinski@marvell.com>
10707 PR tree-optimization/96695
10708 * match.pd (min_value, max_value): Extend to
10711 2023-08-06 Jan Hubicka <jh@suse.cz>
10713 * config/i386/cpuid.h (__get_cpuid_count, __get_cpuid_max): Add
10714 __builtin_expect that CPU likely supports cpuid.
10716 2023-08-06 Jan Hubicka <jh@suse.cz>
10718 * tree-loop-distribution.cc (loop_distribution::execute): Disable
10719 distribution for loops with estimated iterations 0.
10721 2023-08-06 Jan Hubicka <jh@suse.cz>
10723 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update of peeled epilogues.
10725 2023-08-04 Xiao Zeng <zengxiao@eswincomputing.com>
10727 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
10728 more Zicond patterns. Fix whitespace typo.
10729 (riscv_rtx_costs): Remove accidental code duplication.
10730 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
10732 2023-08-04 Yan Simonaytes <simonaytes.yan@ispras.ru>
10735 * config/i386/i386-protos.h
10736 (vpternlog_redundant_operand_mask): Declare.
10737 (substitute_vpternlog_operands): Declare.
10738 * config/i386/i386.cc
10739 (vpternlog_redundant_operand_mask): New helper.
10740 (substitute_vpternlog_operands): New function. Use them...
10741 * config/i386/sse.md: ... here in new VPTERNLOG define_splits.
10743 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
10745 * expmed.cc (extract_bit_field_1): Document that an UNSIGNEDP
10746 value of -1 is equivalent to don't care.
10747 (extract_integral_bit_field): Indicate that we don't require
10748 the most significant word to be zero extended, if we're about
10750 (extract_fixed_bit_field_1): Document that an UNSIGNEDP value
10751 of -1 is equivalent to don't care. Don't clear the most
10752 significant bits with AND mask when UNSIGNEDP is -1.
10754 2023-08-04 Roger Sayle <roger@nextmovesoftware.com>
10756 * config/i386/sse.md (define_split): Convert highpart:DF extract
10757 from V2DFmode register into a sse2_storehpd instruction.
10758 (define_split): Likewise, convert lowpart:DF extract from V2DF
10759 register into a sse2_storelpd instruction.
10761 2023-08-04 Qing Zhao <qing.zhao@oracle.com>
10763 * doc/invoke.texi (-Wflex-array-member-not-at-end): Document
10766 2023-08-04 Vladimir N. Makarov <vmakarov@redhat.com>
10768 * lra-lives.cc (process_bb_lives): Check input insn pattern hard regs
10769 against early clobber hard regs.
10771 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10773 * doc/extend.texi: Document it.
10775 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10778 * config/aarch64/aarch64-simd.md (vec_widen_<sur>shiftl_lo_<mode>,
10779 vec_widen_<sur>shiftl_hi_<mode>): Remove.
10780 (aarch64_<sur>shll<mode>_internal): Renamed to...
10781 (aarch64_<su>shll<mode>): .. This.
10782 (aarch64_<sur>shll2<mode>_internal): Renamed to...
10783 (aarch64_<su>shll2<mode>): .. This.
10784 (aarch64_<sur>shll_n<mode>, aarch64_<sur>shll2_n<mode>): Re-use new
10786 * config/aarch64/constraints.md (D2, DL): New.
10787 * config/aarch64/predicates.md (aarch64_simd_shll_imm_vec): New.
10789 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10791 * gensupport.cc (conlist): Support length 0 attribute.
10793 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10795 * config/aarch64/aarch64.cc (aarch64_bool_compound_p): New.
10796 (aarch64_adjust_stmt_cost, aarch64_vector_costs::count_ops): Use it.
10798 2023-08-04 Tamar Christina <tamar.christina@arm.com>
10800 * config/aarch64/aarch64.cc (aarch64_multiply_add_p): Update handling
10802 (aarch64_adjust_stmt_cost): Use it.
10803 (aarch64_vector_costs::count_ops): Likewise.
10804 (aarch64_vector_costs::add_stmt_cost): Pass vinfo to
10805 aarch64_adjust_stmt_cost.
10807 2023-08-04 Richard Biener <rguenther@suse.de>
10809 PR tree-optimization/110838
10810 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
10811 Fix right-shift value sanitizing. Properly emit external
10812 def mangling in the preheader rather than in the pattern
10813 def sequence where it will fail vectorizing.
10815 2023-08-04 Matthew Malcomson <matthew.malcomson@arm.com>
10817 PR middle-end/110316
10819 * timevar.cc (NANOSEC_PER_SEC, TICKS_TO_NANOSEC,
10820 CLOCKS_TO_NANOSEC, nanosec_to_floating_sec, percent_of): New.
10821 (TICKS_TO_MSEC, CLOCKS_TO_MSEC): Remove these macros.
10822 (timer::validate_phases): Use integral arithmetic to check
10824 (timer::print_row, timer::print): Convert from integral
10825 nanoseconds to floating point seconds before printing.
10826 (timer::all_zero): Change limit to nanosec count instead of
10827 fractional count of seconds.
10828 (make_json_for_timevar_time_def): Convert from integral
10829 nanoseconds to floating point seconds before recording.
10830 * timevar.h (struct timevar_time_def): Update all measurements
10831 to use uint64_t nanoseconds rather than seconds stored in a
10834 2023-08-04 Richard Biener <rguenther@suse.de>
10836 PR tree-optimization/110838
10837 * match.pd (([rl]shift @0 out-of-bounds) -> zero): Restrict
10838 the arithmetic right-shift case to non-negative operands.
10840 2023-08-04 Pan Li <pan2.li@intel.com>
10843 2023-08-04 Pan Li <pan2.li@intel.com>
10845 * config/riscv/riscv-vector-builtins-bases.cc
10846 (class vfmacc_frm): New class for vfmacc frm.
10847 (vfmacc_frm_obj): New declaration.
10849 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10850 * config/riscv/riscv-vector-builtins-functions.def
10851 (vfmacc_frm): New function definition.
10852 * config/riscv/riscv-vector-builtins.cc
10853 (function_expander::use_ternop_insn): Add frm operand support.
10854 * config/riscv/vector.md: Add vfmuladd to frm_mode.
10856 2023-08-04 Pan Li <pan2.li@intel.com>
10859 2023-08-04 Pan Li <pan2.li@intel.com>
10861 * config/riscv/riscv-vector-builtins-bases.cc
10862 (class vfnmacc_frm): New class for vfnmacc.
10863 (vfnmacc_frm_obj): New declaration.
10865 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10866 * config/riscv/riscv-vector-builtins-functions.def
10867 (vfnmacc_frm): New function definition.
10869 2023-08-04 Pan Li <pan2.li@intel.com>
10872 2023-08-04 Pan Li <pan2.li@intel.com>
10874 * config/riscv/riscv-vector-builtins-bases.cc
10875 (class vfmsac_frm): New class for vfmsac frm.
10876 (vfmsac_frm_obj): New declaration.
10878 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10879 * config/riscv/riscv-vector-builtins-functions.def
10880 (vfmsac_frm): New function definition.
10882 2023-08-04 Pan Li <pan2.li@intel.com>
10885 2023-08-04 Pan Li <pan2.li@intel.com>
10887 * config/riscv/riscv-vector-builtins-bases.cc
10888 (class vfnmsac_frm): New class for vfnmsac frm.
10889 (vfnmsac_frm_obj): New declaration.
10891 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10892 * config/riscv/riscv-vector-builtins-functions.def
10893 (vfnmsac_frm): New function definition.
10895 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
10897 * config/avr/avr-mcus.def (avr64dd14, avr64dd20, avr64dd28, avr64dd32)
10898 (avr64ea28, avr64ea32, avr64ea48, attiny424, attiny426, attiny427)
10899 (attiny824, attiny826, attiny827, attiny1624, attiny1626, attiny1627)
10900 (attiny3224, attiny3226, attiny3227, avr16dd14, avr16dd20, avr16dd28)
10901 (avr16dd32, avr32dd14, avr32dd20, avr32dd28, avr32dd32)
10902 (attiny102, attiny104): New devices.
10903 * doc/avr-mmcu.texi: Regenerate.
10905 2023-08-04 Georg-Johann Lay <avr@gjlay.de>
10907 * config/avr/avr-mcus.def (avr128d*, avr64d*): Fix their FLASH_SIZE
10908 and PM_OFFSET entries.
10910 2023-08-04 Andrew Pinski <apinski@marvell.com>
10912 PR tree-optimization/110874
10913 * gimple-match-head.cc (gimple_bit_not_with_nop): New declaration.
10914 (gimple_maybe_cmp): Likewise.
10915 (gimple_bitwise_inverted_equal_p): Rewrite to use gimple_bit_not_with_nop
10916 and gimple_maybe_cmp instead of being recursive.
10917 * match.pd (bit_not_with_nop): New match pattern.
10918 (maybe_cmp): Likewise.
10920 2023-08-04 Drew Ross <drross@redhat.com>
10922 PR middle-end/101955
10923 * match.pd ((signed x << c) >> c): New canonicalization.
10925 2023-08-04 Pan Li <pan2.li@intel.com>
10927 * config/riscv/riscv-vector-builtins-bases.cc
10928 (class vfnmsac_frm): New class for vfnmsac frm.
10929 (vfnmsac_frm_obj): New declaration.
10931 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10932 * config/riscv/riscv-vector-builtins-functions.def
10933 (vfnmsac_frm): New function definition.
10935 2023-08-04 Pan Li <pan2.li@intel.com>
10937 * config/riscv/riscv-vector-builtins-bases.cc
10938 (class vfmsac_frm): New class for vfmsac frm.
10939 (vfmsac_frm_obj): New declaration.
10941 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10942 * config/riscv/riscv-vector-builtins-functions.def
10943 (vfmsac_frm): New function definition.
10945 2023-08-04 Pan Li <pan2.li@intel.com>
10947 * config/riscv/riscv-vector-builtins-bases.cc
10948 (class vfnmacc_frm): New class for vfnmacc.
10949 (vfnmacc_frm_obj): New declaration.
10951 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10952 * config/riscv/riscv-vector-builtins-functions.def
10953 (vfnmacc_frm): New function definition.
10955 2023-08-04 Hao Liu <hliu@os.amperecomputing.com>
10958 * config/aarch64/aarch64.cc (aarch64_force_single_cycle): check
10959 STMT_VINFO_REDUC_DEF to avoid failures in info_for_reduction.
10961 2023-08-04 Pan Li <pan2.li@intel.com>
10963 * config/riscv/riscv-vector-builtins-bases.cc
10964 (class vfmacc_frm): New class for vfmacc frm.
10965 (vfmacc_frm_obj): New declaration.
10967 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
10968 * config/riscv/riscv-vector-builtins-functions.def
10969 (vfmacc_frm): New function definition.
10970 * config/riscv/riscv-vector-builtins.cc
10971 (function_expander::use_ternop_insn): Add frm operand support.
10972 * config/riscv/vector.md: Add vfmuladd to frm_mode.
10974 2023-08-04 Pan Li <pan2.li@intel.com>
10976 * config/riscv/riscv-vector-builtins-bases.cc
10977 (vfwmul_frm_obj): New declaration.
10978 (vfwmul_frm): Ditto.
10979 * config/riscv/riscv-vector-builtins-bases.h:
10980 (vfwmul_frm): Ditto.
10981 * config/riscv/riscv-vector-builtins-functions.def
10982 (vfwmul_frm): New function definition.
10983 * config/riscv/vector.md: (frm_mode) Add vfwmul to frm_mode.
10985 2023-08-04 Pan Li <pan2.li@intel.com>
10987 * config/riscv/riscv-vector-builtins-bases.cc
10988 (binop_frm): New declaration.
10989 (reverse_binop_frm): Likewise.
10991 * config/riscv/riscv-vector-builtins-bases.h:
10992 (vfdiv_frm): New extern declaration.
10993 (vfrdiv_frm): Likewise.
10994 * config/riscv/riscv-vector-builtins-functions.def
10995 (vfdiv_frm): New function definition.
10996 (vfrdiv_frm): Likewise.
10997 * config/riscv/vector.md: Add vfdiv to frm_mode.
10999 2023-08-03 Jan Hubicka <jh@suse.cz>
11001 * tree-cfg.cc (print_loop_info): Print entry count.
11003 2023-08-03 Jan Hubicka <jh@suse.cz>
11005 * tree-ssa-loop-split.cc (split_loop): Update estimated iteration counts.
11007 2023-08-03 Jan Hubicka <jh@suse.cz>
11009 PR bootstrap/110857
11010 * cfgloopmanip.cc (scale_loop_profile): (Un)initialize
11011 unadjusted_exit_count.
11013 2023-08-03 Aldy Hernandez <aldyh@redhat.com>
11015 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Read global
11018 2023-08-03 Xiao Zeng <zengxiao@eswincomputing.com>
11020 * config/riscv/riscv.cc (riscv_expand_conditional_move): Recognize
11021 various Zicond patterns.
11022 * config/riscv/riscv.md (mov<mode>cc): Allow TARGET_ZICOND. Use
11023 sfb_alu_operand for both arms of the conditional move.
11024 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
11026 2023-08-03 Cupertino Miranda <cupertino.miranda@oracle.com>
11032 * config.gcc: Added core-builtins.cc and .o files.
11033 * config/bpf/bpf-passes.def: Removed file.
11034 * config/bpf/bpf-protos.h (bpf_add_core_reloc,
11035 bpf_replace_core_move_operands): New prototypes.
11036 * config/bpf/bpf.cc (enum bpf_builtins, is_attr_preserve_access,
11037 maybe_make_core_relo, bpf_core_field_info, bpf_core_compute,
11038 bpf_core_get_index, bpf_core_new_decl, bpf_core_walk,
11039 bpf_is_valid_preserve_field_info_arg, is_attr_preserve_access,
11040 handle_attr_preserve, pass_data_bpf_core_attr, pass_bpf_core_attr):
11042 (def_builtin, bpf_expand_builtin, bpf_resolve_overloaded_builtin): Changed.
11043 * config/bpf/bpf.md (define_expand mov<MM:mode>): Changed.
11044 (mov_reloc_core<mode>): Added.
11045 * config/bpf/core-builtins.cc (struct cr_builtin, enum
11046 cr_decision struct cr_local, struct cr_final, struct
11047 core_builtin_helpers, enum bpf_plugin_states): Added types.
11048 (builtins_data, core_builtin_helpers, core_builtin_type_defs):
11050 (allocate_builtin_data, get_builtin-data, search_builtin_data,
11051 remove_parser_plugin, compare_same_kind, compare_same_ptr_expr,
11052 compare_same_ptr_type, is_attr_preserve_access, core_field_info,
11053 bpf_core_get_index, compute_field_expr,
11054 pack_field_expr_for_access_index, pack_field_expr_for_preserve_field,
11055 process_field_expr, pack_enum_value, process_enum_value, pack_type,
11056 process_type, bpf_require_core_support, make_core_relo, read_kind,
11057 kind_access_index, kind_preserve_field_info, kind_enum_value,
11058 kind_type_id, kind_preserve_type_info, get_core_builtin_fndecl_for_type,
11059 bpf_handle_plugin_finish_type, bpf_init_core_builtins,
11060 construct_builtin_core_reloc, bpf_resolve_overloaded_core_builtin,
11061 bpf_expand_core_builtin, bpf_add_core_reloc,
11062 bpf_replace_core_move_operands): Added functions.
11063 * config/bpf/core-builtins.h (enum bpf_builtins): Added.
11064 (bpf_init_core_builtins, bpf_expand_core_builtin,
11065 bpf_resolve_overloaded_core_builtin): Added functions.
11066 * config/bpf/coreout.cc (struct bpf_core_extra): Added.
11067 (bpf_core_reloc_add, output_asm_btfext_core_reloc): Changed.
11068 * config/bpf/coreout.h (bpf_core_reloc_add) Changed prototype.
11069 * config/bpf/t-bpf: Added core-builtins.o.
11070 * doc/extend.texi: Added documentation for new BPF builtins.
11072 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
11074 * gimple-range-fold.cc (fold_using_range::range_of_range_op): Add
11075 ranges to the call to relation_fold_and_or.
11076 (fold_using_range::relation_fold_and_or): Add op1 and op2 ranges.
11077 (fur_source::register_outgoing_edges): Add op1 and op2 ranges.
11078 * gimple-range-fold.h (relation_fold_and_or): Adjust params.
11079 * gimple-range-gori.cc (gori_compute::compute_operand_range): Add
11080 a varying op1 and op2 to call.
11081 * range-op-float.cc (range_operator::op1_op2_relation): New dafaults.
11082 (operator_equal::op1_op2_relation): New float version.
11083 (operator_not_equal::op1_op2_relation): Ditto.
11084 (operator_lt::op1_op2_relation): Ditto.
11085 (operator_le::op1_op2_relation): Ditto.
11086 (operator_gt::op1_op2_relation): Ditto.
11087 (operator_ge::op1_op2_relation) Ditto.
11088 * range-op-mixed.h (operator_equal::op1_op2_relation): New float
11090 (operator_not_equal::op1_op2_relation): Ditto.
11091 (operator_lt::op1_op2_relation): Ditto.
11092 (operator_le::op1_op2_relation): Ditto.
11093 (operator_gt::op1_op2_relation): Ditto.
11094 (operator_ge::op1_op2_relation): Ditto.
11095 * range-op.cc (range_op_handler::op1_op2_relation): Dispatch new
11097 (range_operator::op1_op2_relation): Add extra params.
11098 (operator_equal::op1_op2_relation): Ditto.
11099 (operator_not_equal::op1_op2_relation): Ditto.
11100 (operator_lt::op1_op2_relation): Ditto.
11101 (operator_le::op1_op2_relation): Ditto.
11102 (operator_gt::op1_op2_relation): Ditto.
11103 (operator_ge::op1_op2_relation): Ditto.
11104 * range-op.h (range_operator): New prototypes.
11105 (range_op_handler): Ditto.
11107 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
11109 * gimple-range-gori.cc (gori_compute::compute_operand1_range):
11110 Use identity relation.
11111 (gori_compute::compute_operand2_range): Ditto.
11112 * value-relation.cc (get_identity_relation): New.
11113 * value-relation.h (get_identity_relation): New prototype.
11115 2023-08-03 Andrew MacLeod <amacleod@redhat.com>
11117 * value-range.h (Value_Range::set_varying): Set the type.
11118 (Value_Range::set_zero): Ditto.
11119 (Value_Range::set_nonzero): Ditto.
11121 2023-08-03 Jeff Law <jeffreyalaw@gmail.com>
11123 * config/riscv/riscv.cc (riscv_rtx_costs): Remove errant hunk from
11126 2023-08-03 Pan Li <pan2.li@intel.com>
11128 * config/riscv/riscv-vector-builtins-bases.cc: Add vfsub.
11130 2023-08-03 Richard Sandiford <richard.sandiford@arm.com>
11132 * poly-int.h (can_div_trunc_p): Succeed for more boundary conditions.
11134 2023-08-03 Richard Biener <rguenther@suse.de>
11136 PR tree-optimization/110838
11137 * tree-vect-patterns.cc (vect_recog_over_widening_pattern):
11138 Adjust the shift operand of RSHIFT_EXPRs.
11140 2023-08-03 Richard Biener <rguenther@suse.de>
11142 PR tree-optimization/110702
11143 * tree-ssa-loop-ivopts.cc (rewrite_use_address): When
11144 we created a NULL pointer based access rewrite that to
11147 2023-08-03 Richard Biener <rguenther@suse.de>
11149 * tree-ssa-sink.cc: Include tree-ssa-live.h.
11150 (pass_sink_code::execute): Instantiate virtual_operand_live
11152 (sink_code_in_bb): Pass down virtual_operand_live.
11153 (statement_sink_location): Get virtual_operand_live and
11154 verify we are not sinking loads across stores by looking up
11155 the live virtual operand at the sink location.
11157 2023-08-03 Richard Biener <rguenther@suse.de>
11159 * tree-ssa-live.h (class virtual_operand_live): New.
11160 * tree-ssa-live.cc (virtual_operand_live::init): New.
11161 (virtual_operand_live::get_live_in): Likewise.
11162 (virtual_operand_live::get_live_out): Likewise.
11164 2023-08-03 Richard Biener <rguenther@suse.de>
11166 * passes.def: Exchange loop splitting and final value
11167 replacement passes.
11169 2023-08-03 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11171 * config/s390/s390.cc (expand_perm_as_a_vlbr_vstbr_candidate):
11172 New function which handles bswap patterns for vec_perm_const.
11173 (vectorize_vec_perm_const_1): Call new function.
11174 * config/s390/vector.md (*bswap<mode>): Fix operands in output
11176 (*vstbr<mode>): New insn.
11178 2023-08-03 Alexandre Oliva <oliva@adacore.com>
11180 * config/vxworks-smp.opt: New. Introduce -msmp.
11181 * config.gcc: Enable it on powerpc* vxworks prior to 7r*.
11182 * config/rs6000/vxworks.h (STARTFILE_PREFIX_SPEC): Choose
11183 lib_smp when -msmp is present in the command line.
11184 * doc/invoke.texi: Document it.
11186 2023-08-03 Yanzhang Wang <yanzhang.wang@intel.com>
11188 * config/riscv/riscv.cc (riscv_save_reg_p): Save ra for leaf
11189 when enabling -mno-omit-leaf-frame-pointer
11190 (riscv_option_override): Override omit-frame-pointer.
11191 (riscv_frame_pointer_required): Save s0 for non-leaf function
11192 (TARGET_FRAME_POINTER_REQUIRED): Override defination
11193 * config/riscv/riscv.opt: Add option support.
11195 2023-08-03 Roger Sayle <roger@nextmovesoftware.com>
11198 * config/i386/i386.md (<any_rotate>ti3): For rotations by 64 bits
11199 place operand in a register before gen_<insn>64ti2_doubleword.
11200 (<any_rotate>di3): Likewise, for rotations by 32 bits, place
11201 operand in a register before gen_<insn>32di2_doubleword.
11202 (<any_rotate>32di2_doubleword): Constrain operand to be in register.
11203 (<any_rotate>64ti2_doubleword): Likewise.
11205 2023-08-03 Pan Li <pan2.li@intel.com>
11207 * config/riscv/riscv-vector-builtins-bases.cc
11208 (vfmul_frm_obj): New declaration.
11210 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
11211 * config/riscv/riscv-vector-builtins-functions.def
11212 (vfmul_frm): New function definition.
11213 * config/riscv/vector.md: Add vfmul to frm_mode.
11215 2023-08-03 Andrew Pinski <apinski@marvell.com>
11217 * match.pd (`~X & X`): Check that the types match.
11218 (`~x | x`, `~x ^ x`): Likewise.
11220 2023-08-03 Pan Li <pan2.li@intel.com>
11222 * config/riscv/riscv-vector-builtins-bases.h: Remove
11223 redudant declaration.
11225 2023-08-03 Pan Li <pan2.li@intel.com>
11227 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add
11229 * config/riscv/riscv-vector-builtins-bases.h: Add declaration.
11230 * config/riscv/riscv-vector-builtins-functions.def (vfwsub_frm):
11231 Add vfwsub function definitions.
11233 2023-08-02 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11235 PR rtl-optimization/110867
11236 * combine.cc (simplify_compare_const): Try the optimization only
11237 in case the constant fits into the comparison mode.
11239 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
11241 * config/riscv/zicond.md: Remove incorrect zicond patterns and
11242 renumber/rename them.
11243 (zero.nez.<GPR:MODE><X:mode>.opt2): Fix output string.
11245 2023-08-02 Richard Biener <rguenther@suse.de>
11247 * tree-phinodes.h (add_phi_node_to_bb): Remove.
11248 * tree-phinodes.cc (add_phi_node_to_bb): Make static.
11250 2023-08-02 Jan Beulich <jbeulich@suse.com>
11252 * config/i386/sse.md (vec_dupv2df<mask_name>): Fold the middle
11253 two of the alternatives.
11255 2023-08-02 Richard Biener <rguenther@suse.de>
11257 PR tree-optimization/92335
11258 * tree-ssa-sink.cc (select_best_block): Before loop
11259 optimizations avoid sinking unconditional loads/stores
11260 in innermost loops to conditional executed places.
11262 2023-08-02 Andrew Pinski <apinski@marvell.com>
11264 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p): Valueize
11265 the comparison operands before comparing them.
11267 2023-08-02 Andrew Pinski <apinski@marvell.com>
11269 * match.pd (`~X & X`, `~X | X`): Move over to
11270 use bitwise_inverted_equal_p, removing :c as bitwise_inverted_equal_p
11271 handles that already.
11272 Remove range test simplifications to true/false as they
11273 are now handled by these patterns.
11275 2023-08-02 Andrew Pinski <apinski@marvell.com>
11277 * tree-ssa-phiopt.cc (match_simplify_replacement): Mark's cond
11278 statement's lhs and rhs to check if trivial dead.
11279 Rename inserted_exprs to exprs_maybe_dce; also move it so
11280 bitmap is not allocated if not needed.
11282 2023-08-02 Pan Li <pan2.li@intel.com>
11284 * config/riscv/riscv-vector-builtins-bases.cc
11285 (class widen_binop_frm): New class for binop frm.
11286 (BASE): Add vfwadd_frm.
11287 * config/riscv/riscv-vector-builtins-bases.h: New declaration.
11288 * config/riscv/riscv-vector-builtins-functions.def
11289 (vfwadd_frm): New function definition.
11290 * config/riscv/riscv-vector-builtins-shapes.cc
11291 (BASE_NAME_MAX_LEN): New macro.
11292 (struct alu_frm_def): Leverage new base class.
11293 (struct build_frm_base): New build base for frm.
11294 (struct widen_alu_frm_def): New struct for widen alu frm.
11295 (SHAPE): Add widen_alu_frm shape.
11296 * config/riscv/riscv-vector-builtins-shapes.h: New declaration.
11297 * config/riscv/vector.md (frm_mode): Add vfwalu type.
11299 2023-08-02 Jan Hubicka <jh@suse.cz>
11301 * cfgloop.h (loop_count_in): Declare.
11302 * cfgloopanal.cc (expected_loop_iterations_by_profile): Use count_in.
11303 (loop_count_in): Move here from ...
11304 * cfgloopmanip.cc (loop_count_in): ... here.
11305 (scale_loop_profile): Improve dumping; cast iteration bound to sreal.
11307 2023-08-02 Jan Hubicka <jh@suse.cz>
11309 * cfg.cc (scale_strictly_dominated_blocks): New function.
11310 * cfg.h (scale_strictly_dominated_blocks): Declare.
11311 * tree-cfg.cc (fold_loop_internal_call): Fixup CFG profile.
11313 2023-08-02 Richard Biener <rguenther@suse.de>
11315 PR rtl-optimization/110587
11316 * lra-spills.cc (return_regno_p): Remove.
11317 (regno_in_use_p): Likewise.
11318 (lra_final_code_change): Do not remove noop moves
11319 between hard registers.
11321 2023-08-02 liuhongt <hongtao.liu@intel.com>
11324 * config/i386/sse.md (vec_fmaddsub<mode>4): Extend to vector
11325 HFmode, use mode iterator VFH instead.
11326 (vec_fmsubadd<mode>4): Ditto.
11327 (<sd_mask_codefor>fma_fmaddsub_<mode><sd_maskz_name><round_name>):
11328 Remove scalar mode from iterator, use VFH_AVX512VL instead.
11329 (<sd_mask_codefor>fma_fmsubadd_<mode><sd_maskz_name><round_name>):
11332 2023-08-02 liuhongt <hongtao.liu@intel.com>
11334 * config/i386/sse.md (*avx2_lddqu_inserti_to_bcasti): New
11335 pre_reload define_insn_and_split.
11337 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
11339 * config/riscv/riscv.cc (riscv_rtx_costs): Add costing for
11340 using Zicond to implement some conditional moves.
11342 2023-08-02 Jeff Law <jlaw@ventanamicro.com>
11344 * config/riscv/zicond.md: Use the X iterator instead of ANYI
11345 on the comparison input operands.
11347 2023-08-02 Xiao Zeng <zengxiao@eswincomputing.com>
11349 * config/riscv/riscv.cc (riscv_rtx_costs, case IF_THEN_ELSE): Add
11351 (case SET): For INSNs that just set a REG, take the cost from the
11353 Co-authored-by: Jeff Law <jlaw@ventanamicro.com>
11355 2023-08-02 Hu, Lin1 <lin1.hu@intel.com>
11357 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_AMX_INT8_SET):
11358 Change OPTION_MASK_ISA2_AMX_TILE to OPTION_MASK_ISA2_AMX_TILE_SET.
11359 (OPTION_MASK_ISA2_AMX_BF16_SET): Ditto
11360 (OPTION_MASK_ISA2_AMX_FP16_SET): Ditto
11361 (OPTION_MASK_ISA2_AMX_COMPLEX_SET): Ditto
11362 (OPTION_MASK_ISA_ABM_SET):
11363 Change OPTION_MASK_ISA_POPCNT to OPTION_MASK_ISA_POPCNT_SET.
11365 2023-08-01 Andreas Krebbel <krebbel@linux.ibm.com>
11367 * config/s390/s390.cc (s390_encode_section_info): Assume external
11368 symbols without explicit alignment to be unaligned if
11369 -munaligned-symbols has been specified.
11370 * config/s390/s390.opt (-munaligned-symbols): New option.
11372 2023-08-01 Richard Ball <richard.ball@arm.com>
11374 * gimple-fold.cc (fold_ctor_reference):
11375 Add support for poly_int.
11377 2023-08-01 Georg-Johann Lay <avr@gjlay.de>
11380 * config/avr/avr.cc (avr_optimize_casesi): Set JUMP_LABEL and
11381 LABEL_NUSES of new conditional branch instruction.
11383 2023-08-01 Jan Hubicka <jh@suse.cz>
11385 * tree-vect-loop-manip.cc (vect_do_peeling): Fix profile update after
11386 constant prologue peeling.
11388 2023-08-01 Christophe Lyon <christophe.lyon@linaro.org>
11390 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Fix spelling.
11392 2023-08-01 Pan Li <pan2.li@intel.com>
11393 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11395 * config/riscv/riscv.cc (DYNAMIC_FRM_RTL): New macro.
11396 (STATIC_FRM_P): Ditto.
11397 (struct mode_switching_info): New struct for mode switching.
11398 (struct machine_function): Add new field mode switching.
11399 (riscv_emit_frm_mode_set): Add DYN_CALL emit.
11400 (riscv_frm_adjust_mode_after_call): New function for call mode.
11401 (riscv_frm_emit_after_call_in_bb_end): New function for emit
11402 insn when call as the end of bb.
11403 (riscv_frm_mode_needed): New function for frm mode needed.
11404 (frm_unknown_dynamic_p): Remove call check.
11405 (riscv_mode_needed): Extrac function for frm.
11406 (riscv_frm_mode_after): Add DYN_CALL after.
11407 (riscv_mode_entry): Remove backup rtl initialization.
11408 * config/riscv/vector.md (frm_mode): Add dyn_call.
11409 (fsrmsi_restore_exit): Rename to _volatile.
11410 (fsrmsi_restore_volatile): Likewise.
11412 2023-08-01 Pan Li <pan2.li@intel.com>
11414 * config/riscv/riscv-vector-builtins-bases.cc
11415 (class reverse_binop_frm): Add new template for reversed frm.
11416 (vfsub_frm_obj): New obj.
11417 (vfrsub_frm_obj): Likewise.
11418 * config/riscv/riscv-vector-builtins-bases.h:
11419 (vfsub_frm): New declaration.
11420 (vfrsub_frm): Likewise.
11421 * config/riscv/riscv-vector-builtins-functions.def
11422 (vfsub_frm): New function define.
11423 (vfrsub_frm): Likewise.
11425 2023-08-01 Andrew Pinski <apinski@marvell.com>
11427 PR tree-optimization/93044
11428 * match.pd (nested int casts): A truncation (to the same size or smaller)
11429 can always remove the inner cast.
11431 2023-07-31 Hamza Mahfooz <someguy@effective-light.com>
11434 * doc/invoke.texi (-Wmissing-variable-declarations): Document
11437 2023-07-31 Andrew Pinski <apinski@marvell.com>
11439 PR tree-optimization/106164
11440 * match.pd (`a != b & a <= b`, `a != b & a >= b`,
11441 `a == b | a < b`, `a == b | a > b`): Handle these cases
11444 2023-07-31 Andrew Pinski <apinski@marvell.com>
11446 PR tree-optimization/106164
11447 * match.pd: Extend the `(X CMP1 CST1) AND/IOR (X CMP2 CST2)`
11448 patterns to support `(X CMP1 Y) AND/IOR (X CMP2 Y)`.
11450 2023-07-31 Andrew Pinski <apinski@marvell.com>
11452 PR tree-optimization/100864
11453 * generic-match-head.cc (bitwise_inverted_equal_p): New function.
11454 * gimple-match-head.cc (bitwise_inverted_equal_p): New macro.
11455 (gimple_bitwise_inverted_equal_p): New function.
11456 * match.pd ((~x | y) & x): Use bitwise_inverted_equal_p
11457 instead of direct matching bit_not.
11459 2023-07-31 Costas Argyris <costas.argyris@gmail.com>
11462 * gcc-ar.cc (main): Expand argv and use
11463 temporary response file to call ar if any
11464 expansions were made.
11466 2023-07-31 Andrew MacLeod <amacleod@redhat.com>
11468 PR tree-optimization/110582
11469 * gimple-range-fold.cc (fur_list::get_operand): Do not use the
11470 range vector for non-ssa names.
11472 2023-07-31 David Malcolm <dmalcolm@redhat.com>
11475 * diagnostic-client-data-hooks.h (class sarif_object): New forward
11477 (diagnostic_client_data_hooks::add_sarif_invocation_properties):
11479 * diagnostic-format-sarif.cc: Include "diagnostic-format-sarif.h".
11480 (class sarif_invocation): Inherit from sarif_object rather than
11482 (class sarif_result): Likewise.
11483 (class sarif_ice_notification): Likewise.
11484 (sarif_object::get_or_create_properties): New.
11485 (sarif_invocation::prepare_to_flush): Add "context" param. Use it
11486 to call the context's add_sarif_invocation_properties hook.
11487 (sarif_builder::flush_to_file): Pass m_context to
11488 sarif_invocation::prepare_to_flush.
11489 * diagnostic-format-sarif.h: New header.
11490 * doc/invoke.texi (Developer Options): Clarify that -ftime-report
11491 writes to stderr. Document that if SARIF diagnostic output is
11492 requested then any timing information is written in JSON form as
11493 part of the SARIF output, rather than to stderr.
11494 * timevar.cc: Include "json.h".
11495 (timer::named_items::m_hash_map): Split out type into...
11496 (timer::named_items::hash_map_t): ...this new typedef.
11497 (timer::named_items::make_json): New function.
11498 (timevar_diff): New function.
11499 (make_json_for_timevar_time_def): New function.
11500 (timer::timevar_def::make_json): New function.
11501 (timer::make_json): New function.
11502 * timevar.h (class json::value): New forward decl.
11503 (timer::make_json): New decl.
11504 (timer::timevar_def::make_json): New decl.
11505 * tree-diagnostic-client-data-hooks.cc: Include
11506 "diagnostic-format-sarif.h" and "timevar.h".
11507 (compiler_data_hooks::add_sarif_invocation_properties): New vfunc
11510 2023-07-31 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
11512 * combine.cc (simplify_compare_const): Narrow comparison of
11513 memory and constant.
11514 (try_combine): Adapt new function signature.
11515 (simplify_comparison): Adapt new function signature.
11517 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
11519 * config/riscv/riscv-v.cc (expand_vec_series): Drop unused
11521 (expand_vector_init_insert_elems): Ditto.
11523 2023-07-31 Hao Liu <hliu@os.amperecomputing.com>
11526 * config/aarch64/aarch64.cc (count_ops): Only '* count' for
11527 single_defuse_cycle while counting reduction_latency.
11529 2023-07-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
11531 * internal-fn.def (DEF_INTERNAL_COND_FN): New macro.
11532 (DEF_INTERNAL_SIGNED_COND_FN): Ditto.
11533 (COND_ADD): Remove.
11538 (COND_RDIV): Ditto.
11541 (COND_FMIN): Ditto.
11542 (COND_FMAX): Ditto.
11550 (COND_FNMA): Ditto.
11551 (COND_FNMS): Ditto.
11553 (COND_LEN_ADD): Ditto.
11554 (COND_LEN_SUB): Ditto.
11555 (COND_LEN_MUL): Ditto.
11556 (COND_LEN_DIV): Ditto.
11557 (COND_LEN_MOD): Ditto.
11558 (COND_LEN_RDIV): Ditto.
11559 (COND_LEN_MIN): Ditto.
11560 (COND_LEN_MAX): Ditto.
11561 (COND_LEN_FMIN): Ditto.
11562 (COND_LEN_FMAX): Ditto.
11563 (COND_LEN_AND): Ditto.
11564 (COND_LEN_IOR): Ditto.
11565 (COND_LEN_XOR): Ditto.
11566 (COND_LEN_SHL): Ditto.
11567 (COND_LEN_SHR): Ditto.
11568 (COND_LEN_FMA): Ditto.
11569 (COND_LEN_FMS): Ditto.
11570 (COND_LEN_FNMA): Ditto.
11571 (COND_LEN_FNMS): Ditto.
11572 (COND_LEN_NEG): Ditto.
11573 (ADD): New macro define.
11594 2023-07-31 Roger Sayle <roger@nextmovesoftware.com>
11597 * config/i386/i386-features.cc (compute_convert_gain): Check
11598 TARGET_AVX512VL (not TARGET_AVX512F) when considering V2DImode
11599 and V4SImode rotates in STV.
11600 (general_scalar_chain::convert_rotate): Likewise.
11602 2023-07-31 Kito Cheng <kito.cheng@sifive.com>
11604 * config/riscv/autovec.md (abs<mode>2): Remove `.require ()`.
11605 * config/riscv/riscv-protos.h (get_mask_mode): Update return
11607 * config/riscv/riscv-v.cc (rvv_builder::rvv_builder): Remove
11609 (emit_vlmax_insn): Ditto.
11610 (emit_vlmax_fp_insn): Ditto.
11611 (emit_vlmax_ternary_insn): Ditto.
11612 (emit_vlmax_fp_ternary_insn): Ditto.
11613 (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
11614 (emit_nonvlmax_insn): Ditto.
11615 (emit_vlmax_slide_insn): Ditto.
11616 (emit_nonvlmax_slide_tu_insn): Ditto.
11617 (emit_vlmax_merge_insn): Ditto.
11618 (emit_vlmax_masked_insn): Ditto.
11619 (emit_nonvlmax_masked_insn): Ditto.
11620 (emit_vlmax_masked_store_insn): Ditto.
11621 (emit_nonvlmax_masked_store_insn): Ditto.
11622 (emit_vlmax_masked_mu_insn): Ditto.
11623 (emit_nonvlmax_tu_insn): Ditto.
11624 (emit_nonvlmax_fp_tu_insn): Ditto.
11625 (emit_scalar_move_insn): Ditto.
11626 (emit_vlmax_compress_insn): Ditto.
11627 (emit_vlmax_reduction_insn): Ditto.
11628 (emit_vlmax_fp_reduction_insn): Ditto.
11629 (emit_nonvlmax_fp_reduction_insn): Ditto.
11630 (expand_vec_series): Ditto.
11631 (expand_vector_init_merge_repeating_sequence): Ditto.
11632 (expand_vec_perm): Ditto.
11633 (shuffle_merge_patterns): Ditto.
11634 (shuffle_compress_patterns): Ditto.
11635 (shuffle_decompress_patterns): Ditto.
11636 (expand_reduction): Ditto.
11637 (get_mask_mode): Update return type.
11638 * config/riscv/riscv.cc (riscv_get_mask_mode): Check vector type
11639 is valid, and use new get_mask_mode interface.
11641 2023-07-31 Pan Li <pan2.li@intel.com>
11643 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_frm_def):
11644 Move rm suffix before mask.
11646 2023-07-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11648 * config/riscv/autovec-vls.md (@vec_duplicate<mode>): New pattern.
11649 * config/riscv/riscv-v.cc (autovectorize_vector_modes): Add VLS autovec
11652 2023-07-29 Roger Sayle <roger@nextmovesoftware.com>
11655 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
11656 (extzv<mode>): Likewise.
11657 (insv<mode>): Likewise.
11658 (*testqi_ext_3): Likewise.
11659 (*btr<mode>_2): Likewise.
11660 (define_split): Likewise.
11661 (*btsq_imm): Likewise.
11662 (*btrq_imm): Likewise.
11663 (*btcq_imm): Likewise.
11664 (define_peephole2 x3): Likewise.
11665 (*bt<mode>): Likewise
11666 (*bt<mode>_mask): New define_insn_and_split.
11667 (*jcc_bt<mode>): Use QImode for offsets.
11668 (*jcc_bt<mode>_1): Delete obsolete pattern.
11669 (*jcc_bt<mode>_mask): Use QImode offsets.
11670 (*jcc_bt<mode>_mask_1): Likewise.
11671 (define_split): Likewise.
11672 (*bt<mode>_setcqi): Likewise.
11673 (*bt<mode>_setncqi): Likewise.
11674 (*bt<mode>_setnc<mode>): Likewise.
11675 (*bt<mode>_setncqi_2): Likewise.
11676 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
11677 (bmi2_bzhi_<mode>3): Use QImode offsets.
11678 (*bmi2_bzhi_<mode>3): Likewise.
11679 (*bmi2_bzhi_<mode>3_1): Likewise.
11680 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
11681 (@tbm_bextri_<mode>): Likewise.
11683 2023-07-29 Jan Hubicka <jh@suse.cz>
11685 * profile-count.cc (profile_probability::sqrt): New member function.
11686 (profile_probability::pow): Likewise.
11687 * profile-count.h: (profile_probability::sqrt): Declare
11688 (profile_probability::pow): Likewise.
11689 * tree-vect-loop-manip.cc (vect_loop_versioning): Fix profile update.
11691 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
11693 * gimple-range-cache.cc (ssa_cache::merge_range): New.
11694 (ssa_lazy_cache::merge_range): New.
11695 * gimple-range-cache.h (class ssa_cache): Adjust protoypes.
11696 (class ssa_lazy_cache): Ditto.
11697 * gimple-range.cc (assume_query::calculate_op): Use merge_range.
11699 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
11701 * tree-ssa-propagate.cc (substitute_and_fold_engine::value_on_edge):
11702 Move from value-query.cc.
11703 (substitute_and_fold_engine::value_of_stmt): Ditto.
11704 (substitute_and_fold_engine::range_of_expr): New.
11705 * tree-ssa-propagate.h (substitute_and_fold_engine): Inherit from
11706 range_query. New prototypes.
11707 * value-query.cc (value_query::value_on_edge): Relocate.
11708 (value_query::value_of_stmt): Ditto.
11709 * value-query.h (class value_query): Remove.
11710 (class range_query): Remove base class. Adjust prototypes.
11712 2023-07-28 Andrew MacLeod <amacleod@redhat.com>
11714 PR tree-optimization/110205
11715 * gimple-range-cache.h (ranger_cache::m_estimate): Delete.
11716 * range-op-mixed.h (operator_bitwise_xor::op1_op2_relation_effect):
11717 Add final override.
11718 * range-op.cc (operator_lshift): Add missing final overrides.
11719 (operator_rshift): Ditto.
11721 2023-07-28 Jose E. Marchesi <jose.marchesi@oracle.com>
11723 * config/bpf/bpf.cc (bpf_option_override): Disable tail-call
11724 optimizations in BPF target.
11726 2023-07-28 Honza <jh@ryzen4.suse.cz>
11728 * cfgloopmanip.cc (loop_count_in): Break out from ...
11729 (loop_exit_for_scaling): Break out from ...
11730 (update_loop_exit_probability_scale_dom_bbs): Break out from ...;
11731 add more sanity check and debug info.
11732 (scale_loop_profile): ... here.
11733 (create_empty_loop_on_edge): Fix whitespac.
11734 * cfgloopmanip.h (update_loop_exit_probability_scale_dom_bbs): Declare.
11735 * loop-unroll.cc (unroll_loop_constant_iterations): Use
11736 update_loop_exit_probability_scale_dom_bbs.
11737 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling): Remove.
11738 (tree_transform_and_unroll_loop): Use
11739 update_loop_exit_probability_scale_dom_bbs.
11740 * tree-ssa-loop-split.cc (split_loop): Use
11741 update_loop_exit_probability_scale_dom_bbs.
11743 2023-07-28 Jan Hubicka <jh@suse.cz>
11745 PR middle-end/77689
11746 * tree-ssa-loop-split.cc: Include value-query.h.
11747 (split_at_bb_p): Analyze cases where EQ/NE can be turned
11748 into LT/LE/GT/GE; return updated guard code.
11749 (split_loop): Use guard code.
11751 2023-07-28 Roger Sayle <roger@nextmovesoftware.com>
11752 Richard Biener <rguenther@suse.de>
11754 PR middle-end/28071
11755 PR rtl-optimization/110587
11756 * expr.cc (emit_group_load_1): Simplify logic for calling
11757 force_reg on ORIG_SRC, to avoid making a copy if the source
11758 is already in a pseudo register.
11760 2023-07-28 Jan Hubicka <jh@suse.cz>
11762 PR middle-end/106923
11763 * tree-ssa-loop-split.cc (connect_loops): Change probability
11764 of the test preconditioning second loop to very_likely.
11765 (fix_loop_bb_probability): Handle correctly case where
11766 on of the arms of the conditional is empty.
11767 (split_loop): Fold the test guarding first condition to
11768 see if it is constant true; Set correct entry block
11769 probabilities of the split loops; determine correct loop
11770 eixt probabilities.
11772 2023-07-28 xuli <xuli1@eswincomputing.com>
11774 * config/riscv/riscv-vector-builtins-bases.cc: remove rounding mode of
11775 vsadd[u] and vssub[u].
11776 * config/riscv/vector.md: Ditto.
11778 2023-07-28 Jan Hubicka <jh@suse.cz>
11780 * tree-ssa-loop-split.cc (split_loop): Also support NE driven
11781 loops when IV test is not overflowing.
11783 2023-07-28 liuhongt <hongtao.liu@intel.com>
11786 * config/i386/sse.md (avx512cd_maskb_vec_dup<mode>): Add
11788 (avx512cd_maskw_vec_dup<mode>): Ditto.
11790 2023-07-27 David Faust <david.faust@oracle.com>
11794 * config/bpf/bpf.opt (msmov): New option.
11795 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
11796 * config/bpf/bpf.md (*extendsidi2): New.
11797 (extendhidi2): New.
11798 (extendqidi2): New.
11799 (extendsisi2): New.
11800 (extendhisi2): New.
11801 (extendqisi2): New.
11802 * doc/invoke.texi (Option Summary): Add -msmov eBPF option.
11803 (eBPF Options): Add -m[no-]smov. Document that -mcpu=v4
11804 also enables -msmov.
11806 2023-07-27 David Faust <david.faust@oracle.com>
11808 * doc/invoke.texi (Option Summary): Remove -mkernel eBPF option.
11809 Add -mbswap and -msdiv eBPF options.
11810 (eBPF Options): Remove -mkernel. Add -mno-{jmpext, jmp32,
11811 alu32, v3-atomics, bswap, sdiv}. Document that -mcpu=v4 also
11814 2023-07-27 David Faust <david.faust@oracle.com>
11816 * config/bpf/bpf.md (add<AM:mode>3): Use %w2 instead of %w1
11817 in pseudo-C dialect output template.
11818 (sub<AM:mode>3): Likewise.
11820 2023-07-27 Jan Hubicka <jh@suse.cz>
11822 * tree-vect-loop.cc (optimize_mask_stores): Make store
11825 2023-07-27 Jan Hubicka <jh@suse.cz>
11827 * cfgloop.h (single_dom_exit): Declare.
11828 * cfgloopmanip.h (update_exit_probability_after_unrolling): Declare.
11829 * cfgrtl.cc (struct cfg_hooks): Fix comment.
11830 * loop-unroll.cc (unroll_loop_constant_iterations): Update exit edge.
11831 * tree-ssa-loop-ivopts.h (single_dom_exit): Do not declare it here.
11832 * tree-ssa-loop-manip.cc (update_exit_probability_after_unrolling):
11834 (tree_transform_and_unroll_loop): ... here;
11836 2023-07-27 Jan Hubicka <jh@suse.cz>
11838 * cfgloopmanip.cc (scale_dominated_blocks_in_loop): Move here from
11839 tree-ssa-loop-manip.cc and avoid recursion.
11840 (scale_loop_profile): Use scale_dominated_blocks_in_loop.
11841 (duplicate_loop_body_to_header_edge): Add DLTHE_FLAG_FLAT_PROFILE
11843 * cfgloopmanip.h (DLTHE_FLAG_FLAT_PROFILE): Define.
11844 (scale_dominated_blocks_in_loop): Declare.
11845 * predict.cc (dump_prediction): Do not ICE on uninitialized probability.
11846 (change_edge_frequency): Remove.
11847 * predict.h (change_edge_frequency): Remove.
11848 * tree-ssa-loop-manip.cc (scale_dominated_blocks_in_loop): Move to
11850 (niter_for_unrolled_loop): Remove.
11851 (tree_transform_and_unroll_loop): Fix profile update.
11853 2023-07-27 Jan Hubicka <jh@suse.cz>
11855 * tree-ssa-loop-im.cc (execute_sm_if_changed): Turn cap probability
11856 to guessed; fix count of new_bb.
11858 2023-07-27 Jan Hubicka <jh@suse.cz>
11860 * profile-count.h (profile_count::apply_probability): Fix
11861 handling of uninitialized probabilities, optimize scaling
11864 2023-07-27 Richard Biener <rguenther@suse.de>
11866 PR tree-optimization/91838
11867 * gimple-match-head.cc: Include attribs.h and asan.h.
11868 * generic-match-head.cc: Likewise.
11869 * match.pd (([rl]shift @0 out-of-bounds) -> zero): New pattern.
11871 2023-07-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
11873 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Add VLS modes.
11874 (ADJUST_ALIGNMENT): Ditto.
11875 (ADJUST_PRECISION): Ditto.
11876 (VLS_MODES): Ditto.
11877 (VECTOR_MODE_WITH_PREFIX): Ditto.
11878 * config/riscv/riscv-opts.h (TARGET_VECTOR_VLS): New macro.
11879 * config/riscv/riscv-protos.h (riscv_v_ext_vls_mode_p): New function.
11880 * config/riscv/riscv-v.cc (INCLUDE_ALGORITHM): Add include.
11881 (legitimize_move): Enable basic VLS modes support.
11882 (get_vlmul): Ditto.
11883 (get_ratio): Ditto.
11884 (get_vector_mode): Ditto.
11885 * config/riscv/riscv-vector-switch.def (VLS_ENTRY): Add vls modes.
11886 * config/riscv/riscv.cc (riscv_v_ext_vls_mode_p): New function.
11887 (VLS_ENTRY): New macro.
11888 (riscv_v_ext_mode_p): Add vls modes.
11889 (riscv_get_v_regno_alignment): New function.
11890 (riscv_print_operand): Add vls modes.
11891 (riscv_hard_regno_nregs): Ditto.
11892 (riscv_hard_regno_mode_ok): Ditto.
11893 (riscv_regmode_natural_size): Ditto.
11894 (riscv_vectorize_preferred_vector_alignment): Ditto.
11895 * config/riscv/riscv.md: Ditto.
11896 * config/riscv/vector-iterators.md: Ditto.
11897 * config/riscv/vector.md: Ditto.
11898 * config/riscv/autovec-vls.md: New file.
11900 2023-07-27 Pan Li <pan2.li@intel.com>
11902 * config/riscv/riscv_vector.h (enum RVV_CSR): Removed.
11903 (vread_csr): Ditto.
11904 (vwrite_csr): Ditto.
11906 2023-07-27 demin.han <demin.han@starfivetech.com>
11908 * config/riscv/autovec.md: Delete which_alternative use in split
11910 2023-07-27 Richard Biener <rguenther@suse.de>
11912 * tree-ssa-sink.cc (sink_code_in_bb): Remove recursion, instead
11914 (pass_sink_code::execute): ... in the caller.
11916 2023-07-27 Kewen Lin <linkw@linux.ibm.com>
11917 Richard Biener <rguenther@suse.de>
11919 PR tree-optimization/110776
11920 * tree-vect-stmts.cc (vectorizable_load): Always cost VMAT_ELEMENTWISE
11923 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
11925 * config/riscv/riscv.md: Include zicond.md
11926 * config/riscv/zicond.md: New file.
11928 2023-07-26 Xiao Zeng <zengxiao@eswincomputing.com>
11930 * common/config/riscv/riscv-common.cc: New extension.
11931 * config/riscv/riscv-opts.h (MASK_ZICOND): New mask.
11932 (TARGET_ZICOND): New target.
11934 2023-07-26 Carl Love <cel@us.ibm.com>
11936 * config/rs6000/rs6000-c.cc (find_instance): Add new parameter that
11937 specifies the number of built-in arguments to check.
11938 (altivec_resolve_overloaded_builtin): Update calls to find_instance
11939 to pass the number of built-in arguments to be checked.
11941 2023-07-26 David Faust <david.faust@oracle.com>
11943 * config/bpf/bpf.opt (mv3-atomics): New option.
11944 * config/bpf/bpf.cc (bpf_option_override): Handle it here.
11945 * config/bpf/bpf.h (enum_reg_class): Add R0 class.
11946 (REG_CLASS_NAMES): Likewise.
11947 (REG_CLASS_CONTENTS): Likewise.
11948 (REGNO_REG_CLASS): Handle R0.
11949 * config/bpf/bpf.md (UNSPEC_XADD): Rename to UNSPEC_AADD.
11950 (UNSPEC_AAND): New unspec.
11951 (UNSPEC_AOR): Likewise.
11952 (UNSPEC_AXOR): Likewise.
11953 (UNSPEC_AFADD): Likewise.
11954 (UNSPEC_AFAND): Likewise.
11955 (UNSPEC_AFOR): Likewise.
11956 (UNSPEC_AFXOR): Likewise.
11957 (UNSPEC_AXCHG): Likewise.
11958 (UNSPEC_ACMPX): Likewise.
11959 (atomic_add<mode>): Use UNSPEC_AADD and atomic type attribute.
11961 * config/bpf/atomic.md: ...Here. New file.
11962 * config/bpf/constraints.md (t): New constraint for R0.
11963 * doc/invoke.texi (eBPF Options): Document -mv3-atomics.
11965 2023-07-26 Matthew Malcomson <matthew.malcomson@arm.com>
11967 * tree-vect-stmts.cc (get_group_load_store_type): Reformat
11970 2023-07-26 Carl Love <cel@us.ibm.com>
11972 * config/rs6000/rs6000-builtins.def: Rename
11973 __builtin_altivec_vreplace_un_uv2di as __builtin_altivec_vreplace_un_udi
11974 __builtin_altivec_vreplace_un_uv4si as __builtin_altivec_vreplace_un_usi
11975 __builtin_altivec_vreplace_un_v2df as __builtin_altivec_vreplace_un_df
11976 __builtin_altivec_vreplace_un_v2di as __builtin_altivec_vreplace_un_di
11977 __builtin_altivec_vreplace_un_v4sf as __builtin_altivec_vreplace_un_sf
11978 __builtin_altivec_vreplace_un_v4si as __builtin_altivec_vreplace_un_si.
11979 Rename VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_UV4SI as
11980 VREPLACE_UN_USI, VREPLACE_UN_V2DF as VREPLACE_UN_DF,
11981 VREPLACE_UN_V2DI as VREPLACE_UN_DI, VREPLACE_UN_V4SF as
11982 VREPLACE_UN_SF, VREPLACE_UN_V4SI as VREPLACE_UN_SI.
11983 Rename vreplace_un_v2di as vreplace_un_di, vreplace_un_v4si as
11984 vreplace_un_si, vreplace_un_v2df as vreplace_un_df,
11985 vreplace_un_v2di as vreplace_un_di, vreplace_un_v4sf as
11986 vreplace_un_sf, vreplace_un_v4si as vreplace_un_si.
11987 * config/rs6000/rs6000-c.cc (find_instance): Add case
11988 RS6000_OVLD_VEC_REPLACE_UN.
11989 * config/rs6000/rs6000-overload.def (__builtin_vec_replace_un):
11990 Fix first argument type. Rename VREPLACE_UN_UV4SI as
11991 VREPLACE_UN_USI, VREPLACE_UN_V4SI as VREPLACE_UN_SI,
11992 VREPLACE_UN_UV2DI as VREPLACE_UN_UDI, VREPLACE_UN_V2DI as
11993 VREPLACE_UN_DI, VREPLACE_UN_V4SF as VREPLACE_UN_SF,
11994 VREPLACE_UN_V2DF as VREPLACE_UN_DF.
11995 * config/rs6000/vsx.md (REPLACE_ELT): Rename the mode_iterator
11996 REPLACE_ELT_V for vector modes.
11997 (REPLACE_ELT): New scalar mode iterator.
11998 (REPLACE_ELT_char): Add scalar attributes.
11999 (vreplace_un_<mode>): Change iterator and mode attribute.
12001 2023-07-26 David Malcolm <dmalcolm@redhat.com>
12004 * Makefile.in (ANALYZER_OBJS): Add analyzer/symbol.o.
12006 2023-07-26 Richard Biener <rguenther@suse.de>
12008 PR tree-optimization/106081
12009 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
12010 Assign layout -1 to splats.
12012 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12014 * range-op-mixed.h (class operator_cast): Add update_bitmask.
12015 * range-op.cc (operator_cast::update_bitmask): New.
12016 (operator_cast::fold_range): Call update_bitmask.
12018 2023-07-26 Li Xu <xuli1@eswincomputing.com>
12020 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Change
12021 scalar type to float16, eliminate warning.
12022 (vfloat16mf4x3_t): Ditto.
12023 (vfloat16mf4x4_t): Ditto.
12024 (vfloat16mf4x5_t): Ditto.
12025 (vfloat16mf4x6_t): Ditto.
12026 (vfloat16mf4x7_t): Ditto.
12027 (vfloat16mf4x8_t): Ditto.
12028 (vfloat16mf2x2_t): Ditto.
12029 (vfloat16mf2x3_t): Ditto.
12030 (vfloat16mf2x4_t): Ditto.
12031 (vfloat16mf2x5_t): Ditto.
12032 (vfloat16mf2x6_t): Ditto.
12033 (vfloat16mf2x7_t): Ditto.
12034 (vfloat16mf2x8_t): Ditto.
12035 (vfloat16m1x2_t): Ditto.
12036 (vfloat16m1x3_t): Ditto.
12037 (vfloat16m1x4_t): Ditto.
12038 (vfloat16m1x5_t): Ditto.
12039 (vfloat16m1x6_t): Ditto.
12040 (vfloat16m1x7_t): Ditto.
12041 (vfloat16m1x8_t): Ditto.
12042 (vfloat16m2x2_t): Ditto.
12043 (vfloat16m2x3_t): Ditto.
12044 (vfloat16m2x4_t): Ditto.
12045 (vfloat16m4x2_t): Ditto.
12046 * config/riscv/vector-iterators.md: add RVVM4x2DF in iterator V4T.
12047 * config/riscv/vector.md: add tuple mode in attr sew.
12049 2023-07-26 Uros Bizjak <ubizjak@gmail.com>
12052 * config/i386/i386.md (plusminusmult): New code iterator.
12053 * config/i386/mmx.md (mmxdoublevecmode): New mode attribute.
12054 (movq_<mode>_to_sse): New expander.
12055 (<plusminusmult:insn>v2sf3): Macroize expander from addv2sf3,
12056 subv2sf3 and mulv2sf3 using plusminusmult code iterator. Rewrite
12057 as a wrapper around V4SFmode operation.
12058 (mmx_addv2sf3): Change operand 1 and operand 2 predicates to
12059 nonimmediate_operand.
12060 (*mmx_addv2sf3): Remove SSE alternatives. Change operand 1 and
12061 operand 2 predicates to nonimmediate_operand.
12062 (mmx_subv2sf3): Change operand 2 predicate to nonimmediate_operand.
12063 (mmx_subrv2sf3): Change operand 1 predicate to nonimmediate_operand.
12064 (*mmx_subv2sf3): Remove SSE alternatives. Change operand 1 and
12065 operand 2 predicates to nonimmediate_operand.
12066 (mmx_mulv2sf3): Change operand 1 and operand 2 predicates to
12067 nonimmediate_operand.
12068 (*mmx_mulv2sf3): Remove SSE alternatives. Change operand 1 and
12069 operand 2 predicates to nonimmediate_operand.
12070 (divv2sf3): Rewrite as a wrapper around V4SFmode operation.
12071 (<smaxmin:code>v2sf3): Ditto.
12072 (mmx_<smaxmin:code>v2sf3): Change operand 1 and operand 2
12073 predicates to nonimmediate_operand.
12074 (*mmx_<smaxmin:code>v2sf3): Remove SSE alternatives. Change
12075 operand 1 and operand 2 predicates to nonimmediate_operand.
12076 (mmx_ieee_<ieee_maxmin>v2sf3): Ditto.
12077 (sqrtv2sf2): Rewrite as a wrapper around V4SFmode operation.
12078 (*mmx_haddv2sf3_low): Ditto.
12079 (*mmx_hsubv2sf3_low): Ditto.
12080 (vec_addsubv2sf3): Ditto.
12081 (*mmx_maskcmpv2sf3_comm): Remove.
12082 (*mmx_maskcmpv2sf3): Remove.
12083 (vec_cmpv2sfv2si): Rewrite as a wrapper around V4SFmode operation.
12084 (vcond<V2FI:mode>v2sf): Ditto.
12087 (fnmav2sf4): Ditto.
12088 (fnmsv2sf4): Ditto.
12089 (fix_truncv2sfv2si2): Ditto.
12090 (fixuns_truncv2sfv2si2): Ditto.
12091 (mmx_fix_truncv2sfv2si2): Remove SSE alternatives.
12092 Change operand 1 predicate to nonimmediate_operand.
12093 (floatv2siv2sf2): Rewrite as a wrapper around V4SFmode operation.
12094 (floatunsv2siv2sf2): Ditto.
12095 (mmx_floatv2siv2sf2): Remove SSE alternatives.
12096 Change operand 1 predicate to nonimmediate_operand.
12097 (nearbyintv2sf2): Rewrite as a wrapper around V4SFmode operation.
12098 (rintv2sf2): Ditto.
12099 (lrintv2sfv2si2): Ditto.
12100 (ceilv2sf2): Ditto.
12101 (lceilv2sfv2si2): Ditto.
12102 (floorv2sf2): Ditto.
12103 (lfloorv2sfv2si2): Ditto.
12104 (btruncv2sf2): Ditto.
12105 (roundv2sf2): Ditto.
12106 (lroundv2sfv2si2): Ditto.
12107 (*mmx_roundv2sf2): Remove.
12109 2023-07-26 Jose E. Marchesi <jose.marchesi@oracle.com>
12111 * config/bpf/bpf.md: Fix neg{SI,DI}2 insn.
12113 2023-07-26 Richard Biener <rguenther@suse.de>
12115 PR tree-optimization/110799
12116 * tree-ssa-pre.cc (compute_avail): More thoroughly match
12117 up TBAA behavior of redundant loads.
12119 2023-07-26 Jakub Jelinek <jakub@redhat.com>
12121 PR tree-optimization/110755
12122 * range-op-float.cc (frange_arithmetic): Change +0 result to -0
12123 for PLUS_EXPR or MINUS_EXPR if -frounding-math, inf is negative and
12124 it is exact op1 + (-op1) or op1 - op1.
12126 2023-07-26 Kewen Lin <linkw@linux.ibm.com>
12129 * config/rs6000/vsx.md (define_insn xxeval): Correct vsx
12130 operands output with "x".
12132 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12134 * range-op.cc (class operator_absu): Add update_bitmask.
12135 (operator_absu::update_bitmask): New.
12137 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12139 * range-op-mixed.h (class operator_abs): Add update_bitmask.
12140 * range-op.cc (operator_abs::update_bitmask): New.
12142 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12144 * range-op-mixed.h (class operator_bitwise_not): Add update_bitmask.
12145 * range-op.cc (operator_bitwise_not::update_bitmask): New.
12147 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12149 * range-op.cc (update_known_bitmask): Handle unary operators.
12151 2023-07-26 Aldy Hernandez <aldyh@redhat.com>
12153 * tree-ssa-ccp.cc (bit_value_unop): Initialize val when appropriate.
12155 2023-07-26 Jin Ma <jinma@linux.alibaba.com>
12157 * config/riscv/riscv.md: Likewise.
12159 2023-07-26 Jan Hubicka <jh@suse.cz>
12161 * profile-count.cc (profile_count::to_sreal_scale): Value is not know
12162 if we divide by zero.
12164 2023-07-25 David Faust <david.faust@oracle.com>
12166 * config/bpf/bpf.cc (bpf_print_operand_address): Don't print
12167 enclosing parentheses for pseudo-C dialect.
12168 * config/bpf/bpf.md (zero_exdendhidi2): Add parentheses around
12169 operands of pseudo-C dialect output templates where needed.
12170 (zero_extendqidi2): Likewise.
12171 (zero_extendsidi2): Likewise.
12172 (*mov<MM:mode>): Likewise.
12174 2023-07-25 Aldy Hernandez <aldyh@redhat.com>
12176 * tree-ssa-ccp.cc (value_mask_to_min_max): Make static.
12177 (bit_value_mult_const): Same.
12178 (get_individual_bits): Same.
12180 2023-07-25 Haochen Gui <guihaoc@gcc.gnu.org>
12183 * config/rs6000/rs6000-builtin.cc (rs6000_gimple_fold_builtin): Gimple
12184 fold RS6000_BIF_XSMINDP and RS6000_BIF_XSMAXDP when fast-math is set.
12185 * config/rs6000/rs6000.md (FMINMAX): New int iterator.
12186 (minmax_op): New int attribute.
12187 (UNSPEC_FMAX, UNSPEC_FMIN): New unspecs.
12188 (f<minmax_op><mode>3): New pattern by UNSPEC_FMAX and UNSPEC_FMIN.
12189 * config/rs6000/rs6000-builtins.def (__builtin_vsx_xsmaxdp): Set
12190 pattern to fmaxdf3.
12191 (__builtin_vsx_xsmindp): Set pattern to fmindf3.
12193 2023-07-24 David Faust <david.faust@oracle.com>
12195 * config/bpf/bpf.md (nop): Add pseudo-c asm dialect template.
12197 2023-07-24 Drew Ross <drross@redhat.com>
12198 Jakub Jelinek <jakub@redhat.com>
12200 PR middle-end/109986
12201 * generic-match-head.cc (bitwise_equal_p): New macro.
12202 * gimple-match-head.cc (bitwise_equal_p): New macro.
12203 (gimple_nop_convert): Declare.
12204 (gimple_bitwise_equal_p): Helper for bitwise_equal_p.
12205 * match.pd ((~X | Y) ^ X -> ~(X & Y)): New simplification.
12207 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
12209 * common/config/riscv/riscv-common.cc (riscv_subset_list::add): Use
12210 single quote rather than backquote in diagnostic.
12212 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12215 * config/bpf/bpf.opt: New command-line option -msdiv.
12216 * config/bpf/bpf.md: Conditionalize sdiv/smod on bpf_has_sdiv.
12217 * config/bpf/bpf.cc (bpf_option_override): Initialize
12219 * doc/invoke.texi (eBPF Options): Document -msdiv.
12221 2023-07-24 Jeff Law <jlaw@ventanamicro.com>
12223 * config/riscv/riscv.cc (riscv_option_override): Spell out
12224 greater than and use cannot in diagnostic string.
12226 2023-07-24 Richard Biener <rguenther@suse.de>
12228 * tree-vectorizer.h (_slp_tree::push_vec_def): Add.
12229 (_slp_tree::vec_stmts): Remove.
12230 (SLP_TREE_VEC_STMTS): Remove.
12231 * tree-vect-slp.cc (_slp_tree::push_vec_def): Define.
12232 (_slp_tree::_slp_tree): Adjust.
12233 (_slp_tree::~_slp_tree): Likewise.
12234 (vect_get_slp_vect_def): Simplify.
12235 (vect_get_slp_defs): Likewise.
12236 (vect_transform_slp_perm_load_1): Adjust.
12237 (vect_add_slp_permutation): Likewise.
12238 (vect_schedule_slp_node): Likewise.
12239 (vectorize_slp_instance_root_stmt): Likewise.
12240 (vect_schedule_scc): Likewise.
12241 * tree-vect-stmts.cc (vectorizable_bswap): Use push_vec_def.
12242 (vectorizable_call): Likewise.
12243 (vectorizable_call): Likewise.
12244 (vect_create_vectorized_demotion_stmts): Likewise.
12245 (vectorizable_conversion): Likewise.
12246 (vectorizable_assignment): Likewise.
12247 (vectorizable_shift): Likewise.
12248 (vectorizable_operation): Likewise.
12249 (vectorizable_load): Likewise.
12250 (vectorizable_condition): Likewise.
12251 (vectorizable_comparison): Likewise.
12252 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Adjust.
12253 (vectorize_fold_left_reduction): Use push_vec_def.
12254 (vect_transform_reduction): Likewise.
12255 (vect_transform_cycle_phi): Likewise.
12256 (vectorizable_lc_phi): Likewise.
12257 (vectorizable_phi): Likewise.
12258 (vectorizable_recurr): Likewise.
12259 (vectorizable_induction): Likewise.
12260 (vectorizable_live_operation): Likewise.
12262 2023-07-24 Richard Biener <rguenther@suse.de>
12264 * tree-ssa-loop.cc: Remove unused tree-vectorizer.h include.
12266 2023-07-24 Richard Biener <rguenther@suse.de>
12268 * config/i386/i386-builtins.cc: Remove tree-vectorizer.h include.
12269 * config/i386/i386-expand.cc: Likewise.
12270 * config/i386/i386-features.cc: Likewise.
12271 * config/i386/i386-options.cc: Likewise.
12273 2023-07-24 Robin Dapp <rdapp@ventanamicro.com>
12275 * tree-vect-stmts.cc (vectorizable_conversion): Handle
12276 more demotion/promotion for modifier == NONE.
12278 2023-07-24 Roger Sayle <roger@nextmovesoftware.com>
12283 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12284 (extzv<mode>): Likewise.
12285 (insv<mode>): Likewise.
12286 (*testqi_ext_3): Likewise.
12287 (*btr<mode>_2): Likewise.
12288 (define_split): Likewise.
12289 (*btsq_imm): Likewise.
12290 (*btrq_imm): Likewise.
12291 (*btcq_imm): Likewise.
12292 (define_peephole2 x3): Likewise.
12293 (*bt<mode>): Likewise
12294 (*bt<mode>_mask): New define_insn_and_split.
12295 (*jcc_bt<mode>): Use QImode for offsets.
12296 (*jcc_bt<mode>_1): Delete obsolete pattern.
12297 (*jcc_bt<mode>_mask): Use QImode offsets.
12298 (*jcc_bt<mode>_mask_1): Likewise.
12299 (define_split): Likewise.
12300 (*bt<mode>_setcqi): Likewise.
12301 (*bt<mode>_setncqi): Likewise.
12302 (*bt<mode>_setnc<mode>): Likewise.
12303 (*bt<mode>_setncqi_2): Likewise.
12304 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12305 (bmi2_bzhi_<mode>3): Use QImode offsets.
12306 (*bmi2_bzhi_<mode>3): Likewise.
12307 (*bmi2_bzhi_<mode>3_1): Likewise.
12308 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12309 (@tbm_bextri_<mode>): Likewise.
12311 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12313 * config/bpf/bpf-opts.h (enum bpf_kernel_version): Remove enum.
12314 * config/bpf/bpf.opt (mkernel): Remove option.
12315 * config/bpf/bpf.cc (bpf_target_macros): Do not define
12316 BPF_KERNEL_VERSION_CODE.
12318 2023-07-24 Jose E. Marchesi <jose.marchesi@oracle.com>
12321 * config/bpf/bpf.opt (mcpu): Add ISA_V4 and make it the default.
12322 (mbswap): New option.
12323 * config/bpf/bpf-opts.h (enum bpf_isa_version): New value ISA_V4.
12324 * config/bpf/bpf.cc (bpf_option_override): Set bpf_has_bswap.
12325 * config/bpf/bpf.md: Use bswap instructions if available for
12326 bswap* insn, and fix constraint.
12327 * doc/invoke.texi (eBPF Options): Document -mcpu=v4 and -mbswap.
12329 2023-07-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12331 * config/riscv/autovec.md (fold_left_plus_<mode>): New pattern.
12332 (mask_len_fold_left_plus_<mode>): Ditto.
12333 * config/riscv/riscv-protos.h (enum insn_type): New enum.
12334 (enum reduction_type): Ditto.
12335 (expand_reduction): Add in-order reduction.
12336 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_reduction_insn): New function.
12337 (expand_reduction): Add in-order reduction.
12339 2023-07-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12341 * tree-vect-loop.cc (get_masked_reduction_fn): Add mask_len_fold_left_plus.
12342 (vectorize_fold_left_reduction): Ditto.
12343 (vectorizable_reduction): Ditto.
12344 (vect_transform_reduction): Ditto.
12346 2023-07-24 Richard Biener <rguenther@suse.de>
12348 PR tree-optimization/110777
12349 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
12350 Avoid propagating abnormals.
12352 2023-07-24 Richard Biener <rguenther@suse.de>
12354 PR tree-optimization/110766
12355 * tree-scalar-evolution.cc
12356 (analyze_and_compute_bitwise_induction_effect): Check the PHI
12357 is defined in the loop header.
12359 2023-07-24 Kewen Lin <linkw@linux.ibm.com>
12361 PR tree-optimization/110740
12362 * tree-vect-loop.cc (vect_analyze_loop_costing): Do not vectorize a
12363 loop with a single scalar iteration.
12365 2023-07-24 Pan Li <pan2.li@intel.com>
12367 * config/riscv/riscv-vector-builtins-shapes.cc
12368 (struct alu_frm_def): Take range check.
12370 2023-07-22 Vineet Gupta <vineetg@rivosinc.com>
12373 * config/riscv/predicates.md (const_0_operand): Add back
12376 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
12378 * config/i386/i386-expand.cc (ix86_expand_move): Disable the
12379 64-bit insertions into TImode optimizations with -O0, unless
12380 the function has the "naked" attribute (for PR target/110533).
12382 2023-07-22 Andrew Pinski <apinski@marvell.com>
12385 * rtl.h (extended_count): Change last argument type
12388 2023-07-22 Roger Sayle <roger@nextmovesoftware.com>
12390 * config/i386/i386.md (extv<mode>): Use QImode for offsets.
12391 (extzv<mode>): Likewise.
12392 (insv<mode>): Likewise.
12393 (*testqi_ext_3): Likewise.
12394 (*btr<mode>_2): Likewise.
12395 (define_split): Likewise.
12396 (*btsq_imm): Likewise.
12397 (*btrq_imm): Likewise.
12398 (*btcq_imm): Likewise.
12399 (define_peephole2 x3): Likewise.
12400 (*bt<mode>): Likewise
12401 (*bt<mode>_mask): New define_insn_and_split.
12402 (*jcc_bt<mode>): Use QImode for offsets.
12403 (*jcc_bt<mode>_1): Delete obsolete pattern.
12404 (*jcc_bt<mode>_mask): Use QImode offsets.
12405 (*jcc_bt<mode>_mask_1): Likewise.
12406 (define_split): Likewise.
12407 (*bt<mode>_setcqi): Likewise.
12408 (*bt<mode>_setncqi): Likewise.
12409 (*bt<mode>_setnc<mode>): Likewise.
12410 (*bt<mode>_setncqi_2): Likewise.
12411 (*bt<mode>_setc<mode>_mask): New define_insn_and_split.
12412 (bmi2_bzhi_<mode>3): Use QImode offsets.
12413 (*bmi2_bzhi_<mode>3): Likewise.
12414 (*bmi2_bzhi_<mode>3_1): Likewise.
12415 (*bmi2_bzhi_<mode>3_1_ccz): Likewise.
12416 (@tbm_bextri_<mode>): Likewise.
12418 2023-07-22 Jeff Law <jlaw@ventanamicro.com>
12420 * config/bfin/bfin.md (ones): Fix length computation.
12422 2023-07-22 Vladimir N. Makarov <vmakarov@redhat.com>
12424 * lra-eliminations.cc (update_reg_eliminate): Fix the assert.
12425 (lra_update_fp2sp_elimination): Use HARD_FRAME_POINTER_REGNUM
12426 instead of FRAME_POINTER_REGNUM to spill pseudos.
12428 2023-07-21 Roger Sayle <roger@nextmovesoftware.com>
12429 Richard Biener <rguenther@suse.de>
12432 * gimplify.cc (gimplify_compound_lval): If the array's type
12433 is error_mark_node then return GS_ERROR.
12435 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
12438 * config/bpf/bpf.opt: Added option -masm=<dialect>.
12439 * config/bpf/bpf-opts.h (enum bpf_asm_dialect): New type.
12440 * config/bpf/bpf.cc (bpf_print_register): New function.
12441 (bpf_print_register): Support pseudo-c syntax for registers.
12442 (bpf_print_operand_address): Likewise.
12443 * config/bpf/bpf.h (ASM_SPEC): handle -msasm.
12444 (ASSEMBLER_DIALECT): Define.
12445 * config/bpf/bpf.md: Added pseudo-c templates.
12446 * doc/invoke.texi (-masm=): New eBPF option item.
12448 2023-07-21 Cupertino Miranda <cupertino.miranda@oracle.com>
12450 * config/bpf/bpf.md: fixed template for neg instruction.
12452 2023-07-21 Jan Hubicka <jh@suse.cz>
12455 * tree-vect-loop.cc (scale_profile_for_vect_loop): Avoid scaling flat
12456 profiles by vectorization factor.
12457 (vect_transform_loop): Check for flat profiles.
12459 2023-07-21 Jan Hubicka <jh@suse.cz>
12461 * cfgloop.h (maybe_flat_loop_profile): Declare
12462 * cfgloopanal.cc (maybe_flat_loop_profile): New function.
12463 * tree-cfg.cc (print_loop_info): Print info about flat profiles.
12465 2023-07-21 Jan Hubicka <jh@suse.cz>
12467 * cfgloop.cc (get_estimated_loop_iterations): Use sreal::to_nearest_int
12468 * cfgloopanal.cc (expected_loop_iterations_unbounded): Likewise.
12469 * predict.cc (estimate_bb_frequencies): Likewise.
12470 * profile.cc (branch_prob): Likewise.
12471 * tree-ssa-loop-niter.cc (estimate_numbers_of_iterations): Likewise
12473 2023-07-21 Iain Sandoe <iain@sandoe.co.uk>
12475 * config.in: Regenerate.
12476 * config/darwin.h (DARWIN_LD_DEMANGLE): New.
12477 (LINK_COMMAND_SPEC_A): Add demangle handling.
12478 * configure: Regenerate.
12479 * configure.ac: Detect linker support for '-demangle'.
12481 2023-07-21 Jan Hubicka <jh@suse.cz>
12483 * sreal.cc (sreal::to_nearest_int): New.
12484 (sreal_verify_basics): Verify also to_nearest_int.
12485 (verify_aritmetics): Likewise.
12486 (sreal_verify_conversions): New.
12487 (sreal_cc_tests): Call sreal_verify_conversions.
12488 * sreal.h: (sreal::to_nearest_int): Declare
12490 2023-07-21 Jan Hubicka <jh@suse.cz>
12492 * tree-ssa-loop-ch.cc (enum ch_decision): New enum.
12493 (should_duplicate_loop_header_p): Return info on profitability.
12494 (do_while_loop_p): Watch for constant conditionals.
12495 (update_profile_after_ch): Do not sanity check that all
12496 static exits are taken.
12497 (ch_base::copy_headers): Run on all loops.
12498 (pass_ch::process_loop_p): Improve heuristics by handling also
12499 do_while loop and duplicating shortest sequence containing all
12502 2023-07-21 Jan Hubicka <jh@suse.cz>
12504 * tree-ssa-loop-niter.cc (finite_loop_p): Reorder to do cheap
12505 tests first; update finite_p flag.
12507 2023-07-21 Jan Hubicka <jh@suse.cz>
12509 * cfgloop.cc (flow_loop_dump): Use print_loop_info.
12510 * cfgloop.h (print_loop_info): Declare.
12511 * tree-cfg.cc (print_loop_info): Break out from ...; add
12512 printing of missing fields and profile
12513 (print_loop): ... here.
12515 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12517 * config/riscv/riscv-v.cc (expand_gather_scatter): Remove redundant variables.
12519 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12521 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Change condition order.
12522 (vectorizable_operation): Ditto.
12524 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12526 * config/riscv/autovec.md: Align order of mask and len.
12527 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
12528 (expand_gather_scatter): Ditto.
12529 * doc/md.texi: Ditto.
12530 * internal-fn.cc (add_len_and_mask_args): Ditto.
12531 (add_mask_and_len_args): Ditto.
12532 (expand_partial_load_optab_fn): Ditto.
12533 (expand_partial_store_optab_fn): Ditto.
12534 (expand_scatter_store_optab_fn): Ditto.
12535 (expand_gather_load_optab_fn): Ditto.
12536 (internal_fn_len_index): Ditto.
12537 (internal_fn_mask_index): Ditto.
12538 (internal_len_load_store_bias): Ditto.
12539 * tree-vect-stmts.cc (vectorizable_store): Ditto.
12540 (vectorizable_load): Ditto.
12542 2023-07-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12544 * config/riscv/autovec.md (len_maskload<mode><vm>): Change LEN_MASK into MASK_LEN.
12545 (mask_len_load<mode><vm>): Ditto.
12546 (len_maskstore<mode><vm>): Ditto.
12547 (mask_len_store<mode><vm>): Ditto.
12548 (len_mask_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
12549 (mask_len_gather_load<RATIO64:mode><RATIO64I:mode>): Ditto.
12550 (len_mask_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
12551 (mask_len_gather_load<RATIO32:mode><RATIO32I:mode>): Ditto.
12552 (len_mask_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
12553 (mask_len_gather_load<RATIO16:mode><RATIO16I:mode>): Ditto.
12554 (len_mask_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
12555 (mask_len_gather_load<RATIO8:mode><RATIO8I:mode>): Ditto.
12556 (len_mask_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
12557 (mask_len_gather_load<RATIO4:mode><RATIO4I:mode>): Ditto.
12558 (len_mask_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
12559 (mask_len_gather_load<RATIO2:mode><RATIO2I:mode>): Ditto.
12560 (len_mask_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
12561 (mask_len_gather_load<RATIO1:mode><RATIO1:mode>): Ditto.
12562 (len_mask_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
12563 (mask_len_scatter_store<RATIO64:mode><RATIO64I:mode>): Ditto.
12564 (len_mask_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
12565 (mask_len_scatter_store<RATIO32:mode><RATIO32I:mode>): Ditto.
12566 (len_mask_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
12567 (mask_len_scatter_store<RATIO16:mode><RATIO16I:mode>): Ditto.
12568 (len_mask_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
12569 (mask_len_scatter_store<RATIO8:mode><RATIO8I:mode>): Ditto.
12570 (len_mask_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
12571 (mask_len_scatter_store<RATIO4:mode><RATIO4I:mode>): Ditto.
12572 (len_mask_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
12573 (mask_len_scatter_store<RATIO2:mode><RATIO2I:mode>): Ditto.
12574 (len_mask_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
12575 (mask_len_scatter_store<RATIO1:mode><RATIO1:mode>): Ditto.
12576 * doc/md.texi: Ditto.
12577 * genopinit.cc (main): Ditto.
12578 (CMP_NAME): Ditto. Ditto.
12579 * gimple-fold.cc (arith_overflowed_p): Ditto.
12580 (gimple_fold_partial_load_store_mem_ref): Ditto.
12581 (gimple_fold_call): Ditto.
12582 * internal-fn.cc (len_maskload_direct): Ditto.
12583 (mask_len_load_direct): Ditto.
12584 (len_maskstore_direct): Ditto.
12585 (mask_len_store_direct): Ditto.
12586 (expand_call_mem_ref): Ditto.
12587 (expand_len_maskload_optab_fn): Ditto.
12588 (expand_mask_len_load_optab_fn): Ditto.
12589 (expand_len_maskstore_optab_fn): Ditto.
12590 (expand_mask_len_store_optab_fn): Ditto.
12591 (direct_len_maskload_optab_supported_p): Ditto.
12592 (direct_mask_len_load_optab_supported_p): Ditto.
12593 (direct_len_maskstore_optab_supported_p): Ditto.
12594 (direct_mask_len_store_optab_supported_p): Ditto.
12595 (internal_load_fn_p): Ditto.
12596 (internal_store_fn_p): Ditto.
12597 (internal_gather_scatter_fn_p): Ditto.
12598 (internal_fn_len_index): Ditto.
12599 (internal_fn_mask_index): Ditto.
12600 (internal_fn_stored_value_index): Ditto.
12601 (internal_len_load_store_bias): Ditto.
12602 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
12603 (MASK_LEN_GATHER_LOAD): Ditto.
12604 (LEN_MASK_LOAD): Ditto.
12605 (MASK_LEN_LOAD): Ditto.
12606 (LEN_MASK_SCATTER_STORE): Ditto.
12607 (MASK_LEN_SCATTER_STORE): Ditto.
12608 (LEN_MASK_STORE): Ditto.
12609 (MASK_LEN_STORE): Ditto.
12610 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
12611 (supports_vec_scatter_store_p): Ditto.
12612 * optabs-tree.cc (target_supports_mask_load_store_p): Ditto.
12613 (target_supports_len_load_store_p): Ditto.
12614 * optabs.def (OPTAB_CD): Ditto.
12615 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Ditto.
12616 (call_may_clobber_ref_p_1): Ditto.
12617 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Ditto.
12618 (dse_optimize_stmt): Ditto.
12619 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn): Ditto.
12620 (get_alias_ptr_type_for_ptr_address): Ditto.
12621 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
12622 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
12623 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
12624 (vect_get_strided_load_store_ops): Ditto.
12625 (vectorizable_store): Ditto.
12626 (vectorizable_load): Ditto.
12628 2023-07-21 Haochen Jiang <haochen.jiang@intel.com>
12630 * config/i386/i386.opt: Fix a typo.
12632 2023-07-21 Richard Biener <rguenther@suse.de>
12634 PR tree-optimization/88540
12635 * tree-ssa-phiopt.cc (minmax_replacement): Do not give up
12636 with NaNs but handle the simple case by if-converting to a
12639 2023-07-21 Andrew Pinski <apinski@marvell.com>
12641 * match.pd (minmax<minmax<a,b>,a>->minmax<a,b>): New
12644 2023-07-21 Richard Biener <rguenther@suse.de>
12646 PR tree-optimization/110742
12647 * tree-vect-slp.cc (vect_optimize_slp_pass::get_result_with_layout):
12648 Do not materialize an edge permutation in an external node with
12650 (vect_slp_analyze_node_operations_1): Guard purely internal
12653 2023-07-21 Jan Hubicka <jh@suse.cz>
12655 * cfgloop.cc: Include sreal.h.
12656 (flow_loop_dump): Dump sreal iteration exsitmate.
12657 (get_estimated_loop_iterations): Update.
12658 * cfgloop.h (expected_loop_iterations_by_profile): Declare.
12659 * cfgloopanal.cc (expected_loop_iterations_by_profile): New function.
12660 (expected_loop_iterations_unbounded): Use new API.
12661 * cfgloopmanip.cc (scale_loop_profile): Use
12662 expected_loop_iterations_by_profile
12663 * predict.cc (pass_profile::execute): Likewise.
12664 * profile.cc (branch_prob): Likewise.
12665 * tree-ssa-loop-niter.cc: Include sreal.h.
12666 (estimate_numbers_of_iterations): Likewise
12668 2023-07-21 Kewen Lin <linkw@linux.ibm.com>
12670 PR tree-optimization/110744
12671 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Correct the index of bias
12672 operand for ifn IFN_LEN_STORE.
12674 2023-07-21 liuhongt <hongtao.liu@intel.com>
12677 * common.opt: (fcf-protection=): Add EnumSet attribute to
12678 support combination of params.
12680 2023-07-21 David Malcolm <dmalcolm@redhat.com>
12682 PR middle-end/110612
12683 * text-art/table.cc (table_geometry::table_geometry): Drop m_table
12685 (table_geometry::table_x_to_canvas_x): Add cast to comparison.
12686 (table_geometry::table_y_to_canvas_y): Likewise.
12687 * text-art/table.h (table_geometry::m_table): Drop unused field.
12688 * text-art/widget.h (wrapper_widget::update_child_alloc_rects):
12691 2023-07-20 Uros Bizjak <ubizjak@gmail.com>
12694 * config/i386/i386-features.cc
12695 (general_scalar_chain::compute_convert_gain): Calculate gain
12696 for extend higpart case.
12697 (general_scalar_chain::convert_op): Handle
12698 ASHIFTRT/ASHIFT combined RTX.
12699 (general_scalar_to_vector_candidate_p): Enable ASHIFTRT for
12700 SImode for SSE2 targets. Handle ASHIFTRT/ASHIFT combined RTX.
12701 * config/i386/i386.md (*extend<dwi>2_doubleword_highpart):
12702 New define_insn_and_split pattern.
12703 (*extendv2di2_highpart_stv): Ditto.
12705 2023-07-20 Vladimir N. Makarov <vmakarov@redhat.com>
12707 * lra-constraints.cc (simplify_operand_subreg): Check frame pointer
12710 2023-07-20 Andrew Pinski <apinski@marvell.com>
12712 * combine.cc (dump_combine_stats): Remove.
12713 (dump_combine_total_stats): Remove.
12714 (total_attempts, total_merges, total_extras,
12715 total_successes): Remove.
12716 (combine_instructions): Don't increment total stats
12717 instead use statistics_counter_event.
12718 * dumpfile.cc (print_combine_total_stats): Remove.
12719 * dumpfile.h (print_combine_total_stats): Remove.
12720 (dump_combine_total_stats): Remove.
12721 * passes.cc (finish_optimization_passes):
12722 Don't call print_combine_total_stats.
12723 * rtl.h (dump_combine_total_stats): Remove.
12724 (dump_combine_stats): Remove.
12726 2023-07-20 Jan Hubicka <jh@suse.cz>
12728 * tree-ssa-loop-ch.cc (should_duplicate_loop_header_p): Use BIT instead of TRUTH
12731 2023-07-20 Martin Jambor <mjambor@suse.cz>
12733 * doc/invoke.texi (analyzer-text-art-string-ellipsis-threshold): New.
12734 (analyzer-text-art-ideal-canvas-width): Likewise.
12735 (analyzer-text-art-string-ellipsis-head-len): Likewise.
12736 (analyzer-text-art-string-ellipsis-tail-len): Likewise.
12738 2023-07-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
12740 * tree-vect-stmts.cc (check_load_store_for_partial_vectors):
12741 Refine code structure.
12743 2023-07-20 Jan Hubicka <jh@suse.cz>
12745 * tree-ssa-loop-ch.cc (edge_range_query): Rename to ...
12746 (get_range_query): ... this one; do
12747 (static_loop_exit): Add query parametr, turn ranger to reference.
12748 (loop_static_stmt_p): New function.
12749 (loop_static_op_p): New function.
12750 (loop_iv_derived_p): Remove.
12751 (loop_combined_static_and_iv_p): New function.
12752 (should_duplicate_loop_header_p): Discover combined onditionals;
12753 do not track iv derived; improve dumps.
12754 (pass_ch::execute): Fix whitespace.
12756 2023-07-20 Richard Biener <rguenther@suse.de>
12758 PR tree-optimization/110204
12759 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_avail):
12760 Look through copies generated by PRE.
12762 2023-07-20 Matthew Malcomson <matthew.malcomson@arm.com>
12764 * tree-vect-stmts.cc (get_group_load_store_type): Account for
12765 `gap` when checking if need to peel twice.
12767 2023-07-20 Francois-Xavier Coudert <fxcoudert@gcc.gnu.org>
12769 PR middle-end/77928
12770 * doc/extend.texi: Document iseqsig builtin.
12771 * builtins.cc (fold_builtin_iseqsig): New function.
12772 (fold_builtin_2): Handle BUILT_IN_ISEQSIG.
12773 (is_inexpensive_builtin): Handle BUILT_IN_ISEQSIG.
12774 * builtins.def (BUILT_IN_ISEQSIG): New built-in.
12776 2023-07-20 Pan Li <pan2.li@intel.com>
12778 * config/riscv/vector.md: Fix incorrect match_operand.
12780 2023-07-20 Roger Sayle <roger@nextmovesoftware.com>
12782 * config/i386/i386-expand.cc (ix86_expand_move): Don't call
12783 force_reg, to use SUBREG rather than create a new pseudo when
12784 inserting DFmode fields into TImode with insvti_{high,low}part.
12785 * config/i386/i386.md (*concat<mode><dwi>3_3): Split into two
12786 define_insn_and_split...
12787 (*concatditi3_3): 64-bit implementation. Provide alternative
12788 that allows register allocation to use SSE registers that is
12789 split into vec_concatv2di after reload.
12790 (*concatsidi3_3): 32-bit implementation.
12792 2023-07-20 Richard Biener <rguenther@suse.de>
12794 PR middle-end/61747
12795 * internal-fn.cc (expand_vec_cond_optab_fn): When the
12796 value operands are equal to the original comparison operands
12797 preserve that equality by re-using the comparison expansion.
12798 * optabs.cc (emit_conditional_move): When the value operands
12799 are equal to the comparison operands and would be forced to
12800 a register by prepare_cmp_insn do so earlier, preserving the
12803 2023-07-20 Pan Li <pan2.li@intel.com>
12805 * config/riscv/vector.md: Align pattern format.
12807 2023-07-20 Haochen Jiang <haochen.jiang@intel.com>
12809 * doc/invoke.texi: Remove AVX512VP2INTERSECT in
12810 Granite Rapids{, D} from documentation.
12812 2023-07-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
12814 * config/riscv/autovec.md
12815 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>):
12816 Refactor RVV machine modes.
12817 (len_mask_gather_load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12818 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12819 (len_mask_gather_load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12820 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12821 (len_mask_gather_load<mode><mode>): Ditto.
12822 (len_mask_gather_load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12823 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12824 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12825 (len_mask_scatter_store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12826 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12827 (len_mask_scatter_store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12828 (len_mask_scatter_store<mode><mode>): Ditto.
12829 (len_mask_scatter_store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12830 * config/riscv/riscv-modes.def (VECTOR_BOOL_MODE): Ditto.
12831 (ADJUST_NUNITS): Ditto.
12832 (ADJUST_ALIGNMENT): Ditto.
12833 (ADJUST_BYTESIZE): Ditto.
12834 (ADJUST_PRECISION): Ditto.
12835 (RVV_MODES): Ditto.
12836 (RVV_WHOLE_MODES): Ditto.
12837 (RVV_FRACT_MODE): Ditto.
12838 (RVV_NF8_MODES): Ditto.
12839 (RVV_NF4_MODES): Ditto.
12840 (VECTOR_MODES_WITH_PREFIX): Ditto.
12841 (VECTOR_MODE_WITH_PREFIX): Ditto.
12842 (RVV_TUPLE_MODES): Ditto.
12843 (RVV_NF2_MODES): Ditto.
12844 (RVV_TUPLE_PARTIAL_MODES): Ditto.
12845 * config/riscv/riscv-v.cc (struct mode_vtype_group): Ditto.
12847 (TUPLE_ENTRY): Ditto.
12848 (get_vlmul): Ditto.
12850 (get_ratio): Ditto.
12851 (preferred_simd_mode): Ditto.
12852 (autovectorize_vector_modes): Ditto.
12853 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
12854 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
12855 (vbool64_t): Ditto.
12856 (vbool32_t): Ditto.
12857 (vbool16_t): Ditto.
12862 (vint8mf8_t): Ditto.
12863 (vuint8mf8_t): Ditto.
12864 (vint8mf4_t): Ditto.
12865 (vuint8mf4_t): Ditto.
12866 (vint8mf2_t): Ditto.
12867 (vuint8mf2_t): Ditto.
12868 (vint8m1_t): Ditto.
12869 (vuint8m1_t): Ditto.
12870 (vint8m2_t): Ditto.
12871 (vuint8m2_t): Ditto.
12872 (vint8m4_t): Ditto.
12873 (vuint8m4_t): Ditto.
12874 (vint8m8_t): Ditto.
12875 (vuint8m8_t): Ditto.
12876 (vint16mf4_t): Ditto.
12877 (vuint16mf4_t): Ditto.
12878 (vint16mf2_t): Ditto.
12879 (vuint16mf2_t): Ditto.
12880 (vint16m1_t): Ditto.
12881 (vuint16m1_t): Ditto.
12882 (vint16m2_t): Ditto.
12883 (vuint16m2_t): Ditto.
12884 (vint16m4_t): Ditto.
12885 (vuint16m4_t): Ditto.
12886 (vint16m8_t): Ditto.
12887 (vuint16m8_t): Ditto.
12888 (vint32mf2_t): Ditto.
12889 (vuint32mf2_t): Ditto.
12890 (vint32m1_t): Ditto.
12891 (vuint32m1_t): Ditto.
12892 (vint32m2_t): Ditto.
12893 (vuint32m2_t): Ditto.
12894 (vint32m4_t): Ditto.
12895 (vuint32m4_t): Ditto.
12896 (vint32m8_t): Ditto.
12897 (vuint32m8_t): Ditto.
12898 (vint64m1_t): Ditto.
12899 (vuint64m1_t): Ditto.
12900 (vint64m2_t): Ditto.
12901 (vuint64m2_t): Ditto.
12902 (vint64m4_t): Ditto.
12903 (vuint64m4_t): Ditto.
12904 (vint64m8_t): Ditto.
12905 (vuint64m8_t): Ditto.
12906 (vfloat16mf4_t): Ditto.
12907 (vfloat16mf2_t): Ditto.
12908 (vfloat16m1_t): Ditto.
12909 (vfloat16m2_t): Ditto.
12910 (vfloat16m4_t): Ditto.
12911 (vfloat16m8_t): Ditto.
12912 (vfloat32mf2_t): Ditto.
12913 (vfloat32m1_t): Ditto.
12914 (vfloat32m2_t): Ditto.
12915 (vfloat32m4_t): Ditto.
12916 (vfloat32m8_t): Ditto.
12917 (vfloat64m1_t): Ditto.
12918 (vfloat64m2_t): Ditto.
12919 (vfloat64m4_t): Ditto.
12920 (vfloat64m8_t): Ditto.
12921 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
12922 (TUPLE_ENTRY): Ditto.
12923 * config/riscv/riscv-vsetvl.cc (change_insn): Ditto.
12924 * config/riscv/riscv.cc (riscv_valid_lo_sum_p): Ditto.
12925 (riscv_v_adjust_nunits): Ditto.
12926 (riscv_v_adjust_bytesize): Ditto.
12927 (riscv_v_adjust_precision): Ditto.
12928 (riscv_convert_vector_bits): Ditto.
12929 * config/riscv/riscv.h (riscv_v_adjust_nunits): Ditto.
12930 * config/riscv/riscv.md: Ditto.
12931 * config/riscv/vector-iterators.md: Ditto.
12932 * config/riscv/vector.md
12933 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
12934 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
12935 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
12936 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
12937 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
12938 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
12939 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
12940 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
12941 (@pred_indexed_<order>load<V1T:mode><VNX1_QHSDI:mode>): Ditto.
12942 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
12943 (@pred_indexed_<order>load<V2T:mode><VNX2_QHSDI:mode>): Ditto.
12944 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
12945 (@pred_indexed_<order>load<V4T:mode><VNX4_QHSDI:mode>): Ditto.
12946 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
12947 (@pred_indexed_<order>load<V8T:mode><VNX8_QHSDI:mode>): Ditto.
12948 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
12949 (@pred_indexed_<order>load<V16T:mode><VNX16_QHSI:mode>): Ditto.
12950 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
12951 (@pred_indexed_<order>load<V32T:mode><VNX32_QHI:mode>): Ditto.
12952 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
12953 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
12954 (@pred_indexed_<order>store<V1T:mode><VNX1_QHSDI:mode>): Ditto.
12955 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
12956 (@pred_indexed_<order>store<V2T:mode><VNX2_QHSDI:mode>): Ditto.
12957 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
12958 (@pred_indexed_<order>store<V4T:mode><VNX4_QHSDI:mode>): Ditto.
12959 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
12960 (@pred_indexed_<order>store<V8T:mode><VNX8_QHSDI:mode>): Ditto.
12961 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
12962 (@pred_indexed_<order>store<V16T:mode><VNX16_QHSI:mode>): Ditto.
12963 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
12964 (@pred_indexed_<order>store<V32T:mode><VNX32_QHI:mode>): Ditto.
12965 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
12967 2023-07-19 Vladimir N. Makarov <vmakarov@redhat.com>
12969 * lra-int.h (lra_update_fp2sp_elimination): New prototype.
12970 (lra_asm_insn_error): New prototype.
12971 * lra-spills.cc (remove_pseudos): Add check for pseudo slot memory
12973 (lra_spill): Call lra_update_fp2sp_elimination.
12974 * lra-eliminations.cc: Remove trailing spaces.
12975 (elimination_fp2sp_occured_p): New static flag.
12976 (lra_eliminate_regs_1): Set the flag up.
12977 (update_reg_eliminate): Modify the assert for stack to frame
12978 pointer elimination.
12979 (lra_update_fp2sp_elimination): New function.
12980 (lra_eliminate): Clear flag elimination_fp2sp_occured_p.
12982 2023-07-19 Andrew Carlotti <andrew.carlotti@arm.com>
12984 * config/aarch64/aarch64.h (TARGET_MEMTAG): Remove armv8.5
12986 * config/aarch64/arm_acle.h: Remove unnecessary armv8.x
12987 dependencies from target pragmas.
12988 * config/aarch64/arm_fp16.h (target): Likewise.
12989 * config/aarch64/arm_neon.h (target): Likewise.
12991 2023-07-19 Andrew Pinski <apinski@marvell.com>
12993 PR tree-optimization/110252
12994 * tree-ssa-phiopt.cc (class auto_flow_sensitive): New class.
12995 (auto_flow_sensitive::auto_flow_sensitive): New constructor.
12996 (auto_flow_sensitive::~auto_flow_sensitive): New deconstructor.
12997 (match_simplify_replacement): Temporarily
12998 remove the flow sensitive info on the two statements that might
13001 2023-07-19 Andrew Pinski <apinski@marvell.com>
13003 * gimple-fold.cc (fosa_unwind): Replace `vrange_storage *`
13004 with flow_sensitive_info_storage.
13005 (follow_outer_ssa_edges): Update how to save off the flow
13007 (maybe_fold_comparisons_from_match_pd): Update restoring
13008 of flow sensitive info.
13009 * tree-ssanames.cc (flow_sensitive_info_storage::save): New method.
13010 (flow_sensitive_info_storage::restore): New method.
13011 (flow_sensitive_info_storage::save_and_clear): New method.
13012 (flow_sensitive_info_storage::clear_storage): New method.
13013 * tree-ssanames.h (class flow_sensitive_info_storage): New class.
13015 2023-07-19 Andrew Pinski <apinski@marvell.com>
13017 PR tree-optimization/110726
13018 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)):
13019 Add checks to make sure the type was one bit precision
13022 2023-07-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13024 * doc/md.texi: Add mask_len_fold_left_plus.
13025 * internal-fn.cc (mask_len_fold_left_direct): Ditto.
13026 (expand_mask_len_fold_left_optab_fn): Ditto.
13027 (direct_mask_len_fold_left_optab_supported_p): Ditto.
13028 * internal-fn.def (MASK_LEN_FOLD_LEFT_PLUS): Ditto.
13029 * optabs.def (OPTAB_D): Ditto.
13031 2023-07-19 Jakub Jelinek <jakub@redhat.com>
13033 * tree-switch-conversion.h (class bit_test_cluster): Fix comment typo.
13035 2023-07-19 Jakub Jelinek <jakub@redhat.com>
13037 PR tree-optimization/110731
13038 * wide-int.cc (wi::divmod_internal): Always unpack dividend and
13039 divisor as UNSIGNED regardless of sgn.
13041 2023-07-19 Lehua Ding <lehua.ding@rivai.ai>
13043 * common/config/riscv/riscv-common.cc (riscv_supported_std_ext): Init.
13044 (standard_extensions_p): Add check.
13045 (riscv_subset_list::add): Just return NULL if it failed before.
13046 (riscv_subset_list::parse_std_ext): Continue parse when find a error
13047 (riscv_subset_list::parse): Just return NULL if it failed before.
13048 * config/riscv/riscv-subset.h (class riscv_subset_list): Add field.
13050 2023-07-19 Jan Beulich <jbeulich@suse.com>
13052 * config/i386/i386-expand.cc (ix86_expand_vector_init_duplicate):
13054 (ix86_expand_vector_extract): Use gen_vec_extract_lo /
13055 gen_vec_extract_hi.
13056 (expand_vec_perm_broadcast_1): Use gen_vec_interleave_high /
13057 gen_vec_interleave_low. Rename local variable.
13059 2023-07-19 Jan Beulich <jbeulich@suse.com>
13061 * config/i386/sse.md (vec_dupv2df<mask_name>): Add new AVX512F
13062 alternative. Move AVX512VL part of condition to new "enabled"
13065 2023-07-19 liuhongt <hongtao.liu@intel.com>
13068 * config/i386/i386-builtins.cc
13069 (ix86_register_float16_builtin_type): Remove TARGET_SSE2.
13070 (ix86_register_bf16_builtin_type): Ditto.
13071 * config/i386/i386-c.cc (ix86_target_macros): When TARGET_SSE2
13072 isn't available, undef the macros which are used to check the
13073 backend support of the _Float16/__bf16 types when building
13074 libstdc++ and libgcc.
13075 * config/i386/i386.cc (construct_container): Issue errors for
13076 HFmode/BFmode when TARGET_SSE2 is not available.
13077 (function_value_32): Ditto.
13078 (ix86_scalar_mode_supported_p): Remove TARGET_SSE2 for HFmode/BFmode.
13079 (ix86_libgcc_floating_mode_supported_p): Ditto.
13080 (ix86_emit_support_tinfos): Adjust codes.
13081 (ix86_invalid_conversion): Return diagnostic message string
13082 when there's conversion from/to BF/HFmode w/o TARGET_SSE2.
13083 (ix86_invalid_unary_op): New function.
13084 (ix86_invalid_binary_op): Ditto.
13085 (TARGET_INVALID_UNARY_OP): Define.
13086 (TARGET_INVALID_BINARY_OP): Define.
13087 * config/i386/immintrin.h [__SSE2__]: Remove for fp16/bf16
13088 related instrinsics header files.
13089 * config/i386/i386.h (VALID_SSE2_TYPE_MODE): New macro.
13091 2023-07-18 Uros Bizjak <ubizjak@gmail.com>
13093 * dwarf2asm.cc: Change FALSE to false.
13094 * dwarf2cfi.cc (execute_dwarf2_frame): Change return type to void.
13095 * dwarf2out.cc (matches_main_base): Change return type from
13096 int to bool. Change "last_match" variable to bool.
13097 (dump_struct_debug): Change return type from int to bool.
13098 Change "matches" and "result" function arguments to bool.
13099 (is_pseudo_reg): Change return type from int to bool.
13100 (is_tagged_type): Ditto.
13101 (same_loc_p): Ditto.
13102 (same_dw_val_p): Change return type from int to bool and adjust
13103 function body accordingly.
13104 (same_attr_p): Ditto.
13105 (same_die_p): Ditto.
13106 (is_type_die): Ditto.
13107 (is_declaration_die): Ditto.
13108 (should_move_die_to_comdat): Ditto.
13109 (is_base_type): Ditto.
13110 (is_based_loc): Ditto.
13111 (local_scope_p): Ditto.
13112 (class_scope_p): Ditto.
13113 (class_or_namespace_scope_p): Ditto.
13114 (is_tagged_type): Ditto.
13115 (is_rust): Use void argument.
13116 (is_nested_in_subprogram): Change return type from int to bool.
13117 (contains_subprogram_definition): Ditto.
13118 (gen_struct_or_union_type_die): Change "nested", "complete"
13119 and "ns_decl" variables to bool.
13120 (is_naming_typedef_decl): Change FALSE to false.
13122 2023-07-18 Jan Hubicka <jh@suse.cz>
13124 * tree-ssa-loop-ch.cc (edge_range_query): Take loop argument; be ready
13125 for queries not in headers.
13126 (static_loop_exit): Add basic blck parameter; update use of
13128 (should_duplicate_loop_header_p): Add ranger and static_exits
13129 parameter. Do not account statements that will be optimized
13130 out after duplicaiton in overall size. Add ranger query to
13132 (update_profile_after_ch): Take static_exits has set instead of
13133 single eliminated_edge.
13134 (ch_base::copy_headers): Do all analysis in the first pass;
13135 remember invariant_exits and static_exits.
13137 2023-07-18 Jason Merrill <jason@redhat.com>
13139 * fold-const.cc (native_interpret_aggregate): Skip empty fields.
13141 2023-07-18 Gaius Mulley <gaiusmod2@gmail.com>
13143 * doc/gm2.texi (Semantic checking): Change example testwithptr
13146 2023-07-18 Richard Biener <rguenther@suse.de>
13148 PR middle-end/105715
13149 * gimple-isel.cc (gimple_expand_vec_exprs): Merge into...
13150 (pass_gimple_isel::execute): ... this. Duplicate
13151 comparison defs of COND_EXPRs.
13153 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13155 * config/riscv/riscv-selftests.cc (run_poly_int_selftests): Add more selftests.
13156 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Dynamic adjust size of VLA vectors.
13157 (riscv_convert_vector_bits): Ditto.
13159 2023-07-18 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13161 * config/riscv/autovec.md (vec_shl_insert_<mode>): New patterns.
13162 * config/riscv/riscv-v.cc (shuffle_compress_patterns): Fix bugs.
13164 2023-07-18 Juergen Christ <jchrist@linux.ibm.com>
13166 * config/s390/vx-builtins.md: New vsel pattern.
13168 2023-07-18 liuhongt <hongtao.liu@intel.com>
13171 * config/i386/sse.md (<mask_codefor>one_cmpl<mode>2<mask_name>):
13172 Remove # from assemble output.
13174 2023-07-18 liuhongt <hongtao.liu@intel.com>
13177 * config/i386/sync.md (cmpccxadd_<mode>): Adjust the pattern
13178 to explicitly set FLAGS_REG like *cmp<mode>_1, also add extra
13179 3 define_peephole2 after the pattern.
13181 2023-07-18 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
13183 * rtl-ssa/internals.inl: Fix when mode1 and mode2 are not ordred.
13185 2023-07-18 Pan Li <pan2.li@intel.com>
13186 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13188 * config/riscv/riscv.cc (struct machine_function): Add new field.
13189 (riscv_static_frm_mode_p): New function.
13190 (riscv_emit_frm_mode_set): New function for emit FRM.
13191 (riscv_emit_mode_set): Extract function for FRM.
13192 (riscv_mode_needed): Fix the TODO.
13193 (riscv_mode_entry): Initial dynamic frm RTL.
13194 (riscv_mode_exit): Return DYN_EXIT.
13195 * config/riscv/riscv.md: Add rdfrm.
13196 * config/riscv/vector-iterators.md (unspecv): Add DYN_EXIT unspecv.
13197 * config/riscv/vector.md (frm_modee): Add new mode dyn_exit.
13199 (fsrmsi_backup): New pattern for swap.
13200 (fsrmsi_restore): New pattern for restore.
13201 (fsrmsi_restore_exit): New pattern for restore exit.
13202 (frrmsi): New pattern for backup.
13204 2023-07-17 Arsen Arsenović <arsen@aarsen.me>
13206 * doc/extend.texi: Add @cindex on __auto_type.
13208 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
13210 * combine-stack-adj.cc (stack_memref_p): Change return type from
13211 int to bool and adjust function body accordingly.
13212 (rest_of_handle_stack_adjustments): Change return type to void.
13214 2023-07-17 Uros Bizjak <ubizjak@gmail.com>
13216 * combine.cc (struct reg_stat_type): Change last_set_invalid to bool.
13217 (cant_combine_insn_p): Change return type from int to bool and adjust
13218 function body accordingly.
13219 (can_combine_p): Ditto.
13220 (combinable_i3pat): Ditto. Change "i1_not_in_src" and "i0_not_in_src"
13221 function arguments from int to bool.
13222 (contains_muldiv): Change return type from int to bool and adjust
13223 function body accordingly.
13224 (try_combine): Ditto. Change "new_direct_jump" pointer function
13225 argument from int to bool. Change "substed_i2", "substed_i1",
13226 "substed_i0", "added_sets_0", "added_sets_1", "added_sets_2",
13227 "i2dest_in_i2src", "i1dest_in_i1src", "i2dest_in_i1src",
13228 "i0dest_in_i0src", "i1dest_in_i0src", "i2dest_in_i0src",
13229 "i2dest_killed", "i1dest_killed", "i0dest_killed", "i1_feeds_i2_n",
13230 "i0_feeds_i2_n", "i0_feeds_i1_n", "i3_subst_into_i2", "have_mult",
13231 "swap_i2i3", "split_i2i3" and "changed_i3_dest" variables
13233 (subst): Change "in_dest", "in_cond" and "unique_copy" function
13234 arguments from int to bool.
13235 (combine_simplify_rtx): Change "in_dest" and "in_cond" function
13236 arguments from int to bool.
13237 (make_extraction): Change "unsignedp", "in_dest" and "in_compare"
13238 function argument from int to bool.
13239 (force_int_to_mode): Change "just_select" function argument
13240 from int to bool. Change "next_select" variable to bool.
13241 (rtx_equal_for_field_assignment_p): Change return type from
13242 int to bool and adjust function body accordingly.
13243 (merge_outer_ops): Ditto. Change "pcomp_p" pointer function
13244 argument from int to bool.
13245 (get_last_value_validate): Change return type from int to bool
13246 and adjust function body accordingly.
13247 (reg_dead_at_p): Ditto.
13248 (reg_bitfield_target_p): Ditto.
13249 (combine_instructions): Ditto. Change "new_direct_jump"
13251 (can_combine_p): Change return type from int to bool
13252 and adjust function body accordingly.
13253 (likely_spilled_retval_p): Ditto.
13254 (can_change_dest_mode): Change "added_sets" function argument
13256 (find_split_point): Change "unsignedp" variable to bool.
13257 (simplify_if_then_else): Change "comparison_p" and "swapped"
13259 (simplify_set): Change "other_changed" variable to bool.
13260 (expand_compound_operation): Change "unsignedp" variable to bool.
13261 (force_to_mode): Change "just_select" function argument
13262 from int to bool. Change "next_select" variable to bool.
13263 (extended_count): Change "unsignedp" function argument to bool.
13264 (simplify_shift_const_1): Change "complement_p" variable to bool.
13265 (simplify_comparison): Change "changed" variable to bool.
13266 (rest_of_handle_combine): Change return type to void.
13268 2023-07-17 Andre Vieira <andre.simoesdiasvieira@arm.com>
13271 * Makefile.in (INTERNAL_FN_H): Add insn-opinit.h.
13273 2023-07-17 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
13275 * ira.cc (setup_reg_class_relations): Continue
13276 if regclass cl3 is hard_reg_set_empty_p.
13278 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13280 * config/riscv/riscv.cc (riscv_option_override): Add sorry check.
13282 2023-07-17 Martin Jambor <mjambor@suse.cz>
13284 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Remove unused variable
13287 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13289 * tree-ssa-ccp.cc (ccp_finalize): Export value/mask known bits.
13291 2023-07-17 Lehua Ding <lehua.ding@rivai.ai>
13294 * common/config/riscv/riscv-common.cc (riscv_subset_list::handle_implied_ext):
13295 recur add all implied extensions.
13296 (riscv_subset_list::check_implied_ext): Add new method.
13297 (riscv_subset_list::parse): Call checker check_implied_ext.
13298 * config/riscv/riscv-subset.h: Add new method.
13300 2023-07-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13302 * config/riscv/autovec.md (reduc_plus_scal_<mode>): New pattern.
13303 (reduc_smax_scal_<mode>): Ditto.
13304 (reduc_umax_scal_<mode>): Ditto.
13305 (reduc_smin_scal_<mode>): Ditto.
13306 (reduc_umin_scal_<mode>): Ditto.
13307 (reduc_and_scal_<mode>): Ditto.
13308 (reduc_ior_scal_<mode>): Ditto.
13309 (reduc_xor_scal_<mode>): Ditto.
13310 * config/riscv/riscv-protos.h (enum insn_type): Add reduction.
13311 (expand_reduction): New function.
13312 * config/riscv/riscv-v.cc (emit_vlmax_reduction_insn): Ditto.
13313 (emit_vlmax_fp_reduction_insn): Ditto.
13314 (get_m1_mode): Ditto.
13315 (expand_cond_len_binop): Fix name.
13316 (expand_reduction): New function
13317 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Fix VSETVL BUG.
13318 (validate_change_or_fail): New function.
13319 (change_insn): Fix VSETVL BUG.
13320 (change_vsetvl_insn): Ditto.
13321 (pass_vsetvl::backward_demand_fusion): Ditto.
13322 (pass_vsetvl::df_post_optimization): Ditto.
13324 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13326 * ipa-prop.cc (ipcp_update_bits): Export value/mask known bits.
13328 2023-07-17 Christoph Müllner <christoph.muellner@vrull.eu>
13330 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p):
13331 Remove parameter name from declaration of unused parameter.
13333 2023-07-17 Kewen Lin <linkw@linux.ibm.com>
13335 PR tree-optimization/110652
13336 * tree-vect-stmts.cc (vectorizable_load): Initialize new_temp as
13339 2023-07-17 Richard Biener <rguenther@suse.de>
13341 PR tree-optimization/110669
13342 * tree-scalar-evolution.cc (analyze_and_compute_bitop_with_inv_effect):
13343 Check we matched a header PHI.
13345 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13347 * tree-ssanames.cc (set_bitmask): New.
13348 * tree-ssanames.h (set_bitmask): New.
13350 2023-07-17 Aldy Hernandez <aldyh@redhat.com>
13352 * value-range.cc (irange_bitmask::verify_mask): Mask need not be
13354 * value-range.h (irange_bitmask::union_): Normalize beforehand.
13355 (irange_bitmask::intersect): Same.
13357 2023-07-17 Andrew Pinski <apinski@marvell.com>
13359 PR tree-optimization/95923
13360 * match.pd ((a|b)&(a==b),a|(a==b),(a&b)|(a==b)): New transformation.
13362 2023-07-17 Roger Sayle <roger@nextmovesoftware.com>
13364 * tree-if-conv.cc (predicate_scalar_phi): Make the arguments
13365 to the std::sort comparison lambda function const.
13367 2023-07-17 Andrew Pinski <apinski@marvell.com>
13369 PR tree-optimization/110666
13370 * match.pd (A NEEQ (A NEEQ CST)): Fix Outer EQ case.
13372 2023-07-17 Mo, Zewei <zewei.mo@intel.com>
13374 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Lunar Lake,
13375 Arrow Lake and Arrow Lake S.
13376 * common/config/i386/i386-common.cc:
13377 (processor_name): Add arrowlake.
13378 (processor_alias_table): Add arrow lake, arrow lake s and lunar
13380 * common/config/i386/i386-cpuinfo.h (enum processor_subtypes):
13381 Add INTEL_COREI7_ARROWLAKE and INTEL_COREI7_ARROWLAKE_S.
13382 * config.gcc: Add -march=arrowlake and -march=arrowlake-s.
13383 * config/i386/driver-i386.cc (host_detect_local_cpu): Handle
13385 * config/i386/i386-c.cc (ix86_target_macros_internal): Add
13387 * config/i386/i386-options.cc (m_ARROWLAKE): New.
13388 (processor_cost_table): Add arrowlake.
13389 * config/i386/i386.h (enum processor_type):
13390 Add PROCESSOR_ARROWLAKE.
13391 * config/i386/x86-tune.def: Add m_ARROWLAKE.
13392 * doc/extend.texi: Add arrowlake and arrowlake-s.
13393 * doc/invoke.texi: Ditto.
13395 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13397 * config/i386/sse.md (VI2_AVX2): Delete V32HI since we actually
13398 have the same iterator. Also renaming all the occurence to
13400 (usdot_prod<mode>): New define_expand.
13401 (udot_prod<mode>): Ditto.
13403 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13405 * common/config/i386/cpuinfo.h (get_available_features):
13407 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM4_SET,
13408 OPTION_MASK_ISA2_SM4_UNSET): New.
13409 (OPTION_MASK_ISA2_AVX_UNSET): Add SM4.
13410 (ix86_handle_option): Handle -msm4.
13411 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13413 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13415 * config.gcc: Add sm4intrin.h.
13416 * config/i386/cpuid.h (bit_SM4): New.
13417 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13418 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13420 * config/i386/i386-isa.def (SM4): Add DEF_PTA(SM4).
13421 * config/i386/i386-options.cc (isa2_opts): Add -msm4.
13422 (ix86_valid_target_attribute_inner_p): Handle sm4.
13423 * config/i386/i386.opt: Add option -msm4.
13424 * config/i386/immintrin.h: Include sm4intrin.h
13425 * config/i386/sse.md (vsm4key4_<mode>): New define insn.
13426 (vsm4rnds4_<mode>): Ditto.
13427 * doc/extend.texi: Document sm4.
13428 * doc/invoke.texi: Document -msm4.
13429 * doc/sourcebuild.texi: Document target sm4.
13430 * config/i386/sm4intrin.h: New file.
13432 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13434 * common/config/i386/cpuinfo.h (get_available_features):
13436 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SHA512_SET,
13437 OPTION_MASK_ISA2_SHA512_UNSET): New.
13438 (OPTION_MASK_ISA2_AVX_UNSET): Add SHA512.
13439 (ix86_handle_option): Handle -msha512.
13440 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13441 Add FEATURE_SHA512.
13442 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13444 * config.gcc: Add sha512intrin.h.
13445 * config/i386/cpuid.h (bit_SHA512): New.
13446 * config/i386/i386-builtin-types.def:
13447 Add DEF_FUNCTION_TYPE (V4DI, V4DI, V4DI, V2DI).
13448 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13449 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13451 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
13452 V4DI_FTYPE_V4DI_V4DI_V2DI and V4DI_FTYPE_V4DI_V2DI.
13453 * config/i386/i386-isa.def (SHA512): Add DEF_PTA(SHA512).
13454 * config/i386/i386-options.cc (isa2_opts): Add -msha512.
13455 (ix86_valid_target_attribute_inner_p): Handle sha512.
13456 * config/i386/i386.opt: Add option -msha512.
13457 * config/i386/immintrin.h: Include sha512intrin.h.
13458 * config/i386/sse.md (vsha512msg1): New define insn.
13459 (vsha512msg2): Ditto.
13460 (vsha512rnds2): Ditto.
13461 * doc/extend.texi: Document sha512.
13462 * doc/invoke.texi: Document -msha512.
13463 * doc/sourcebuild.texi: Document target sha512.
13464 * config/i386/sha512intrin.h: New file.
13466 2023-07-17 Haochen Jiang <haochen.jiang@intel.com>
13468 * common/config/i386/cpuinfo.h (get_available_features):
13470 * common/config/i386/i386-common.cc (OPTION_MASK_ISA2_SM3_SET,
13471 OPTION_MASK_ISA2_SM3_UNSET): New.
13472 (OPTION_MASK_ISA2_AVX_UNSET): Add SM3.
13473 (ix86_handle_option): Handle -msm3.
13474 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13476 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13478 * config.gcc: Add sm3intrin.h
13479 * config/i386/cpuid.h (bit_SM3): New.
13480 * config/i386/i386-builtin-types.def:
13481 Add DEF_FUNCTION_TYPE (V4SI, V4SI, V4SI, V4SI, INT).
13482 * config/i386/i386-builtin.def (BDESC): Add new builtins.
13483 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13485 * config/i386/i386-expand.cc (ix86_expand_args_builtin): Handle
13486 V4SI_FTYPE_V4SI_V4SI_V4SI_INT.
13487 * config/i386/i386-isa.def (SM3): Add DEF_PTA(SM3).
13488 * config/i386/i386-options.cc (isa2_opts): Add -msm3.
13489 (ix86_valid_target_attribute_inner_p): Handle sm3.
13490 * config/i386/i386.opt: Add option -msm3.
13491 * config/i386/immintrin.h: Include sm3intrin.h.
13492 * config/i386/sse.md (vsm3msg1): New define insn.
13494 (vsm3rnds2): Ditto.
13495 * doc/extend.texi: Document sm3.
13496 * doc/invoke.texi: Document -msm3.
13497 * doc/sourcebuild.texi: Document target sm3.
13498 * config/i386/sm3intrin.h: New file.
13500 2023-07-17 Kong Lingling <lingling.kong@intel.com>
13501 Haochen Jiang <haochen.jiang@intel.com>
13503 * common/config/i386/cpuinfo.h (get_available_features): Detect
13505 * common/config/i386/i386-common.cc
13506 (OPTION_MASK_ISA2_AVXVNNIINT16_SET): New.
13507 (OPTION_MASK_ISA2_AVXVNNIINT16_UNSET): Ditto.
13508 (ix86_handle_option): Handle -mavxvnniint16.
13509 * common/config/i386/i386-cpuinfo.h (enum processor_features):
13510 Add FEATURE_AVXVNNIINT16.
13511 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
13513 * config.gcc: Add avxvnniint16.h.
13514 * config/i386/avxvnniint16intrin.h: New file.
13515 * config/i386/cpuid.h (bit_AVXVNNIINT16): New.
13516 * config/i386/i386-builtin.def: Add new builtins.
13517 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
13519 * config/i386/i386-options.cc (isa2_opts): Add -mavxvnniint16.
13520 (ix86_valid_target_attribute_inner_p): Handle avxvnniint16intrin.h.
13521 * config/i386/i386-isa.def: Add DEF_PTA(AVXVNNIINT16).
13522 * config/i386/i386.opt: Add option -mavxvnniint16.
13523 * config/i386/immintrin.h: Include avxvnniint16.h.
13524 * config/i386/sse.md
13525 (vpdp<vpdpwprodtype>_<mode>): New define_insn.
13526 * doc/extend.texi: Document avxvnniint16.
13527 * doc/invoke.texi: Document -mavxvnniint16.
13528 * doc/sourcebuild.texi: Document target avxvnniint16.
13530 2023-07-16 Jan Hubicka <jh@suse.cz>
13532 PR middle-end/110649
13533 * tree-vect-loop.cc (scale_profile_for_vect_loop): Rewrite.
13534 (vect_transform_loop): Move scale_profile_for_vect_loop after
13535 upper bound updates.
13537 2023-07-16 Jan Hubicka <jh@suse.cz>
13539 PR tree-optimization/110649
13540 * tree-vect-loop.cc (optimize_mask_stores): Set correctly
13541 probability of the if-then-else construct.
13543 2023-07-16 Jan Hubicka <jh@suse.cz>
13545 PR middle-end/110649
13546 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Avoid double profile update.
13548 2023-07-15 Andrew Pinski <apinski@marvell.com>
13550 * doc/contrib.texi: Update my entry.
13552 2023-07-15 John David Anglin <danglin@gcc.gnu.org>
13554 * config/pa/pa.md: Define constants R1_REGNUM, R19_REGNUM and
13556 (tgd_load): Restrict to !TARGET_64BIT. Use register constants.
13557 (tld_load): Likewise.
13558 (tgd_load_pic): Change to expander.
13559 (tld_load_pic, tld_offset_load, tp_load): Likewise.
13560 (tie_load_pic, tle_load): Likewise.
13561 (tgd_load_picsi, tgd_load_picdi): New.
13562 (tld_load_picsi, tld_load_picdi): New.
13563 (tld_offset_load<P:mode>): New.
13564 (tp_load<P:mode>): New.
13565 (tie_load_picsi, tie_load_picdi): New.
13566 (tle_load<P:mode>): New.
13568 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13570 * config/arm/arm-mve-builtins-base.cc (vcmlaq, vcmlaq_rot90)
13571 (vcmlaq_rot180, vcmlaq_rot270): New.
13572 * config/arm/arm-mve-builtins-base.def (vcmlaq, vcmlaq_rot90)
13573 (vcmlaq_rot180, vcmlaq_rot270): New.
13574 * config/arm/arm-mve-builtins-base.h: (vcmlaq, vcmlaq_rot90)
13575 (vcmlaq_rot180, vcmlaq_rot270): New.
13576 * config/arm/arm-mve-builtins.cc
13577 (function_instance::has_inactive_argument): Handle vcmlaq,
13578 vcmlaq_rot90, vcmlaq_rot180, vcmlaq_rot270.
13579 * config/arm/arm_mve.h (vcmlaq): Delete.
13580 (vcmlaq_rot180): Delete.
13581 (vcmlaq_rot270): Delete.
13582 (vcmlaq_rot90): Delete.
13583 (vcmlaq_m): Delete.
13584 (vcmlaq_rot180_m): Delete.
13585 (vcmlaq_rot270_m): Delete.
13586 (vcmlaq_rot90_m): Delete.
13587 (vcmlaq_f16): Delete.
13588 (vcmlaq_rot180_f16): Delete.
13589 (vcmlaq_rot270_f16): Delete.
13590 (vcmlaq_rot90_f16): Delete.
13591 (vcmlaq_f32): Delete.
13592 (vcmlaq_rot180_f32): Delete.
13593 (vcmlaq_rot270_f32): Delete.
13594 (vcmlaq_rot90_f32): Delete.
13595 (vcmlaq_m_f32): Delete.
13596 (vcmlaq_m_f16): Delete.
13597 (vcmlaq_rot180_m_f32): Delete.
13598 (vcmlaq_rot180_m_f16): Delete.
13599 (vcmlaq_rot270_m_f32): Delete.
13600 (vcmlaq_rot270_m_f16): Delete.
13601 (vcmlaq_rot90_m_f32): Delete.
13602 (vcmlaq_rot90_m_f16): Delete.
13603 (__arm_vcmlaq_f16): Delete.
13604 (__arm_vcmlaq_rot180_f16): Delete.
13605 (__arm_vcmlaq_rot270_f16): Delete.
13606 (__arm_vcmlaq_rot90_f16): Delete.
13607 (__arm_vcmlaq_f32): Delete.
13608 (__arm_vcmlaq_rot180_f32): Delete.
13609 (__arm_vcmlaq_rot270_f32): Delete.
13610 (__arm_vcmlaq_rot90_f32): Delete.
13611 (__arm_vcmlaq_m_f32): Delete.
13612 (__arm_vcmlaq_m_f16): Delete.
13613 (__arm_vcmlaq_rot180_m_f32): Delete.
13614 (__arm_vcmlaq_rot180_m_f16): Delete.
13615 (__arm_vcmlaq_rot270_m_f32): Delete.
13616 (__arm_vcmlaq_rot270_m_f16): Delete.
13617 (__arm_vcmlaq_rot90_m_f32): Delete.
13618 (__arm_vcmlaq_rot90_m_f16): Delete.
13619 (__arm_vcmlaq): Delete.
13620 (__arm_vcmlaq_rot180): Delete.
13621 (__arm_vcmlaq_rot270): Delete.
13622 (__arm_vcmlaq_rot90): Delete.
13623 (__arm_vcmlaq_m): Delete.
13624 (__arm_vcmlaq_rot180_m): Delete.
13625 (__arm_vcmlaq_rot270_m): Delete.
13626 (__arm_vcmlaq_rot90_m): Delete.
13628 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13630 * config/arm/arm_mve_builtins.def (vcmlaq_rot90_f)
13631 (vcmlaq_rot270_f, vcmlaq_rot180_f, vcmlaq_f): Add "_f" suffix.
13632 * config/arm/iterators.md (MVE_VCMLAQ_M): New.
13633 (mve_insn): Add vcmla.
13634 (rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
13636 (mve_rot): Add VCMLAQ_M_F, VCMLAQ_ROT90_M_F, VCMLAQ_ROT180_M_F,
13638 * config/arm/mve.md (mve_vcmlaq<mve_rot><mode>): Rename into ...
13639 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this.
13640 (mve_vcmlaq_m_f<mode>, mve_vcmlaq_rot180_m_f<mode>)
13641 (mve_vcmlaq_rot270_m_f<mode>, mve_vcmlaq_rot90_m_f<mode>): Merge
13643 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
13645 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13647 * config/arm/arm-mve-builtins-base.cc (vcmulq, vcmulq_rot90)
13648 (vcmulq_rot180, vcmulq_rot270): New.
13649 * config/arm/arm-mve-builtins-base.def (vcmulq, vcmulq_rot90)
13650 (vcmulq_rot180, vcmulq_rot270): New.
13651 * config/arm/arm-mve-builtins-base.h: (vcmulq, vcmulq_rot90)
13652 (vcmulq_rot180, vcmulq_rot270): New.
13653 * config/arm/arm_mve.h (vcmulq_rot90): Delete.
13654 (vcmulq_rot270): Delete.
13655 (vcmulq_rot180): Delete.
13657 (vcmulq_m): Delete.
13658 (vcmulq_rot180_m): Delete.
13659 (vcmulq_rot270_m): Delete.
13660 (vcmulq_rot90_m): Delete.
13661 (vcmulq_x): Delete.
13662 (vcmulq_rot90_x): Delete.
13663 (vcmulq_rot180_x): Delete.
13664 (vcmulq_rot270_x): Delete.
13665 (vcmulq_rot90_f16): Delete.
13666 (vcmulq_rot270_f16): Delete.
13667 (vcmulq_rot180_f16): Delete.
13668 (vcmulq_f16): Delete.
13669 (vcmulq_rot90_f32): Delete.
13670 (vcmulq_rot270_f32): Delete.
13671 (vcmulq_rot180_f32): Delete.
13672 (vcmulq_f32): Delete.
13673 (vcmulq_m_f32): Delete.
13674 (vcmulq_m_f16): Delete.
13675 (vcmulq_rot180_m_f32): Delete.
13676 (vcmulq_rot180_m_f16): Delete.
13677 (vcmulq_rot270_m_f32): Delete.
13678 (vcmulq_rot270_m_f16): Delete.
13679 (vcmulq_rot90_m_f32): Delete.
13680 (vcmulq_rot90_m_f16): Delete.
13681 (vcmulq_x_f16): Delete.
13682 (vcmulq_x_f32): Delete.
13683 (vcmulq_rot90_x_f16): Delete.
13684 (vcmulq_rot90_x_f32): Delete.
13685 (vcmulq_rot180_x_f16): Delete.
13686 (vcmulq_rot180_x_f32): Delete.
13687 (vcmulq_rot270_x_f16): Delete.
13688 (vcmulq_rot270_x_f32): Delete.
13689 (__arm_vcmulq_rot90_f16): Delete.
13690 (__arm_vcmulq_rot270_f16): Delete.
13691 (__arm_vcmulq_rot180_f16): Delete.
13692 (__arm_vcmulq_f16): Delete.
13693 (__arm_vcmulq_rot90_f32): Delete.
13694 (__arm_vcmulq_rot270_f32): Delete.
13695 (__arm_vcmulq_rot180_f32): Delete.
13696 (__arm_vcmulq_f32): Delete.
13697 (__arm_vcmulq_m_f32): Delete.
13698 (__arm_vcmulq_m_f16): Delete.
13699 (__arm_vcmulq_rot180_m_f32): Delete.
13700 (__arm_vcmulq_rot180_m_f16): Delete.
13701 (__arm_vcmulq_rot270_m_f32): Delete.
13702 (__arm_vcmulq_rot270_m_f16): Delete.
13703 (__arm_vcmulq_rot90_m_f32): Delete.
13704 (__arm_vcmulq_rot90_m_f16): Delete.
13705 (__arm_vcmulq_x_f16): Delete.
13706 (__arm_vcmulq_x_f32): Delete.
13707 (__arm_vcmulq_rot90_x_f16): Delete.
13708 (__arm_vcmulq_rot90_x_f32): Delete.
13709 (__arm_vcmulq_rot180_x_f16): Delete.
13710 (__arm_vcmulq_rot180_x_f32): Delete.
13711 (__arm_vcmulq_rot270_x_f16): Delete.
13712 (__arm_vcmulq_rot270_x_f32): Delete.
13713 (__arm_vcmulq_rot90): Delete.
13714 (__arm_vcmulq_rot270): Delete.
13715 (__arm_vcmulq_rot180): Delete.
13716 (__arm_vcmulq): Delete.
13717 (__arm_vcmulq_m): Delete.
13718 (__arm_vcmulq_rot180_m): Delete.
13719 (__arm_vcmulq_rot270_m): Delete.
13720 (__arm_vcmulq_rot90_m): Delete.
13721 (__arm_vcmulq_x): Delete.
13722 (__arm_vcmulq_rot90_x): Delete.
13723 (__arm_vcmulq_rot180_x): Delete.
13724 (__arm_vcmulq_rot270_x): Delete.
13726 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13728 * config/arm/arm_mve_builtins.def (vcmulq_rot90_f)
13729 (vcmulq_rot270_f, vcmulq_rot180_f, vcmulq_f): Add "_f" suffix.
13730 * config/arm/iterators.md (MVE_VCADDQ_VCMULQ)
13731 (MVE_VCADDQ_VCMULQ_M): New.
13732 (mve_insn): Add vcmul.
13733 (rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
13736 (mve_rot): Add VCMULQ_M_F, VCMULQ_ROT90_M_F, VCMULQ_ROT180_M_F,
13738 * config/arm/mve.md (mve_vcmulq<mve_rot><mode>): Merge into
13739 @mve_<mve_insn>q<mve_rot>_f<mode>.
13740 (mve_vcmulq_m_f<mode>, mve_vcmulq_rot180_m_f<mode>)
13741 (mve_vcmulq_rot270_m_f<mode>, mve_vcmulq_rot90_m_f<mode>): Merge
13742 into @mve_<mve_insn>q<mve_rot>_m_f<mode>.
13744 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13746 * config/arm/arm-mve-builtins-base.cc (vcaddq_rot90)
13747 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
13748 * config/arm/arm-mve-builtins-base.def (vcaddq_rot90)
13749 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
13750 * config/arm/arm-mve-builtins-base.h: (vcaddq_rot90)
13751 (vcaddq_rot270, vhcaddq_rot90, vhcaddq_rot270): New.
13752 * config/arm/arm-mve-builtins-functions.h (class
13753 unspec_mve_function_exact_insn_rot): New.
13754 * config/arm/arm_mve.h (vcaddq_rot90): Delete.
13755 (vcaddq_rot270): Delete.
13756 (vhcaddq_rot90): Delete.
13757 (vhcaddq_rot270): Delete.
13758 (vcaddq_rot270_m): Delete.
13759 (vcaddq_rot90_m): Delete.
13760 (vhcaddq_rot270_m): Delete.
13761 (vhcaddq_rot90_m): Delete.
13762 (vcaddq_rot90_x): Delete.
13763 (vcaddq_rot270_x): Delete.
13764 (vhcaddq_rot90_x): Delete.
13765 (vhcaddq_rot270_x): Delete.
13766 (vcaddq_rot90_u8): Delete.
13767 (vcaddq_rot270_u8): Delete.
13768 (vhcaddq_rot90_s8): Delete.
13769 (vhcaddq_rot270_s8): Delete.
13770 (vcaddq_rot90_s8): Delete.
13771 (vcaddq_rot270_s8): Delete.
13772 (vcaddq_rot90_u16): Delete.
13773 (vcaddq_rot270_u16): Delete.
13774 (vhcaddq_rot90_s16): Delete.
13775 (vhcaddq_rot270_s16): Delete.
13776 (vcaddq_rot90_s16): Delete.
13777 (vcaddq_rot270_s16): Delete.
13778 (vcaddq_rot90_u32): Delete.
13779 (vcaddq_rot270_u32): Delete.
13780 (vhcaddq_rot90_s32): Delete.
13781 (vhcaddq_rot270_s32): Delete.
13782 (vcaddq_rot90_s32): Delete.
13783 (vcaddq_rot270_s32): Delete.
13784 (vcaddq_rot90_f16): Delete.
13785 (vcaddq_rot270_f16): Delete.
13786 (vcaddq_rot90_f32): Delete.
13787 (vcaddq_rot270_f32): Delete.
13788 (vcaddq_rot270_m_s8): Delete.
13789 (vcaddq_rot270_m_s32): Delete.
13790 (vcaddq_rot270_m_s16): Delete.
13791 (vcaddq_rot270_m_u8): Delete.
13792 (vcaddq_rot270_m_u32): Delete.
13793 (vcaddq_rot270_m_u16): Delete.
13794 (vcaddq_rot90_m_s8): Delete.
13795 (vcaddq_rot90_m_s32): Delete.
13796 (vcaddq_rot90_m_s16): Delete.
13797 (vcaddq_rot90_m_u8): Delete.
13798 (vcaddq_rot90_m_u32): Delete.
13799 (vcaddq_rot90_m_u16): Delete.
13800 (vhcaddq_rot270_m_s8): Delete.
13801 (vhcaddq_rot270_m_s32): Delete.
13802 (vhcaddq_rot270_m_s16): Delete.
13803 (vhcaddq_rot90_m_s8): Delete.
13804 (vhcaddq_rot90_m_s32): Delete.
13805 (vhcaddq_rot90_m_s16): Delete.
13806 (vcaddq_rot270_m_f32): Delete.
13807 (vcaddq_rot270_m_f16): Delete.
13808 (vcaddq_rot90_m_f32): Delete.
13809 (vcaddq_rot90_m_f16): Delete.
13810 (vcaddq_rot90_x_s8): Delete.
13811 (vcaddq_rot90_x_s16): Delete.
13812 (vcaddq_rot90_x_s32): Delete.
13813 (vcaddq_rot90_x_u8): Delete.
13814 (vcaddq_rot90_x_u16): Delete.
13815 (vcaddq_rot90_x_u32): Delete.
13816 (vcaddq_rot270_x_s8): Delete.
13817 (vcaddq_rot270_x_s16): Delete.
13818 (vcaddq_rot270_x_s32): Delete.
13819 (vcaddq_rot270_x_u8): Delete.
13820 (vcaddq_rot270_x_u16): Delete.
13821 (vcaddq_rot270_x_u32): Delete.
13822 (vhcaddq_rot90_x_s8): Delete.
13823 (vhcaddq_rot90_x_s16): Delete.
13824 (vhcaddq_rot90_x_s32): Delete.
13825 (vhcaddq_rot270_x_s8): Delete.
13826 (vhcaddq_rot270_x_s16): Delete.
13827 (vhcaddq_rot270_x_s32): Delete.
13828 (vcaddq_rot90_x_f16): Delete.
13829 (vcaddq_rot90_x_f32): Delete.
13830 (vcaddq_rot270_x_f16): Delete.
13831 (vcaddq_rot270_x_f32): Delete.
13832 (__arm_vcaddq_rot90_u8): Delete.
13833 (__arm_vcaddq_rot270_u8): Delete.
13834 (__arm_vhcaddq_rot90_s8): Delete.
13835 (__arm_vhcaddq_rot270_s8): Delete.
13836 (__arm_vcaddq_rot90_s8): Delete.
13837 (__arm_vcaddq_rot270_s8): Delete.
13838 (__arm_vcaddq_rot90_u16): Delete.
13839 (__arm_vcaddq_rot270_u16): Delete.
13840 (__arm_vhcaddq_rot90_s16): Delete.
13841 (__arm_vhcaddq_rot270_s16): Delete.
13842 (__arm_vcaddq_rot90_s16): Delete.
13843 (__arm_vcaddq_rot270_s16): Delete.
13844 (__arm_vcaddq_rot90_u32): Delete.
13845 (__arm_vcaddq_rot270_u32): Delete.
13846 (__arm_vhcaddq_rot90_s32): Delete.
13847 (__arm_vhcaddq_rot270_s32): Delete.
13848 (__arm_vcaddq_rot90_s32): Delete.
13849 (__arm_vcaddq_rot270_s32): Delete.
13850 (__arm_vcaddq_rot270_m_s8): Delete.
13851 (__arm_vcaddq_rot270_m_s32): Delete.
13852 (__arm_vcaddq_rot270_m_s16): Delete.
13853 (__arm_vcaddq_rot270_m_u8): Delete.
13854 (__arm_vcaddq_rot270_m_u32): Delete.
13855 (__arm_vcaddq_rot270_m_u16): Delete.
13856 (__arm_vcaddq_rot90_m_s8): Delete.
13857 (__arm_vcaddq_rot90_m_s32): Delete.
13858 (__arm_vcaddq_rot90_m_s16): Delete.
13859 (__arm_vcaddq_rot90_m_u8): Delete.
13860 (__arm_vcaddq_rot90_m_u32): Delete.
13861 (__arm_vcaddq_rot90_m_u16): Delete.
13862 (__arm_vhcaddq_rot270_m_s8): Delete.
13863 (__arm_vhcaddq_rot270_m_s32): Delete.
13864 (__arm_vhcaddq_rot270_m_s16): Delete.
13865 (__arm_vhcaddq_rot90_m_s8): Delete.
13866 (__arm_vhcaddq_rot90_m_s32): Delete.
13867 (__arm_vhcaddq_rot90_m_s16): Delete.
13868 (__arm_vcaddq_rot90_x_s8): Delete.
13869 (__arm_vcaddq_rot90_x_s16): Delete.
13870 (__arm_vcaddq_rot90_x_s32): Delete.
13871 (__arm_vcaddq_rot90_x_u8): Delete.
13872 (__arm_vcaddq_rot90_x_u16): Delete.
13873 (__arm_vcaddq_rot90_x_u32): Delete.
13874 (__arm_vcaddq_rot270_x_s8): Delete.
13875 (__arm_vcaddq_rot270_x_s16): Delete.
13876 (__arm_vcaddq_rot270_x_s32): Delete.
13877 (__arm_vcaddq_rot270_x_u8): Delete.
13878 (__arm_vcaddq_rot270_x_u16): Delete.
13879 (__arm_vcaddq_rot270_x_u32): Delete.
13880 (__arm_vhcaddq_rot90_x_s8): Delete.
13881 (__arm_vhcaddq_rot90_x_s16): Delete.
13882 (__arm_vhcaddq_rot90_x_s32): Delete.
13883 (__arm_vhcaddq_rot270_x_s8): Delete.
13884 (__arm_vhcaddq_rot270_x_s16): Delete.
13885 (__arm_vhcaddq_rot270_x_s32): Delete.
13886 (__arm_vcaddq_rot90_f16): Delete.
13887 (__arm_vcaddq_rot270_f16): Delete.
13888 (__arm_vcaddq_rot90_f32): Delete.
13889 (__arm_vcaddq_rot270_f32): Delete.
13890 (__arm_vcaddq_rot270_m_f32): Delete.
13891 (__arm_vcaddq_rot270_m_f16): Delete.
13892 (__arm_vcaddq_rot90_m_f32): Delete.
13893 (__arm_vcaddq_rot90_m_f16): Delete.
13894 (__arm_vcaddq_rot90_x_f16): Delete.
13895 (__arm_vcaddq_rot90_x_f32): Delete.
13896 (__arm_vcaddq_rot270_x_f16): Delete.
13897 (__arm_vcaddq_rot270_x_f32): Delete.
13898 (__arm_vcaddq_rot90): Delete.
13899 (__arm_vcaddq_rot270): Delete.
13900 (__arm_vhcaddq_rot90): Delete.
13901 (__arm_vhcaddq_rot270): Delete.
13902 (__arm_vcaddq_rot270_m): Delete.
13903 (__arm_vcaddq_rot90_m): Delete.
13904 (__arm_vhcaddq_rot270_m): Delete.
13905 (__arm_vhcaddq_rot90_m): Delete.
13906 (__arm_vcaddq_rot90_x): Delete.
13907 (__arm_vcaddq_rot270_x): Delete.
13908 (__arm_vhcaddq_rot90_x): Delete.
13909 (__arm_vhcaddq_rot270_x): Delete.
13911 2023-07-14 Christophe Lyon <christophe.lyon@linaro.org>
13913 * config/arm/arm_mve_builtins.def (vcaddq_rot90_, vcaddq_rot270_)
13914 (vcaddq_rot90_f, vcaddq_rot90_f): Add "_" or "_f" suffix.
13915 * config/arm/iterators.md (mve_insn): Add vcadd, vhcadd.
13916 (isu): Add UNSPEC_VCADD90, UNSPEC_VCADD270, VCADDQ_ROT270_M_U,
13917 VCADDQ_ROT270_M_S, VCADDQ_ROT90_M_U, VCADDQ_ROT90_M_S,
13918 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S, VHCADDQ_ROT90_S,
13920 (rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S, VCADDQ_ROT90_M_U,
13921 VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S, VCADDQ_ROT270_M_U,
13922 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, VHCADDQ_ROT90_M_S,
13923 VHCADDQ_ROT270_M_S.
13924 (mve_rot): Add VCADDQ_ROT90_M_F, VCADDQ_ROT90_M_S,
13925 VCADDQ_ROT90_M_U, VCADDQ_ROT270_M_F, VCADDQ_ROT270_M_S,
13926 VCADDQ_ROT270_M_U, VHCADDQ_ROT90_S, VHCADDQ_ROT270_S,
13927 VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S.
13928 (supf): Add VHCADDQ_ROT90_M_S, VHCADDQ_ROT270_M_S,
13929 VHCADDQ_ROT90_S, VHCADDQ_ROT270_S, UNSPEC_VCADD90,
13931 (VCADDQ_ROT270_M): Delete.
13932 (VCADDQ_M_F VxCADDQ VxCADDQ_M): New.
13933 (VCADDQ_ROT90_M): Delete.
13934 * config/arm/mve.md (mve_vcaddq<mve_rot><mode>)
13935 (mve_vhcaddq_rot270_s<mode>, mve_vhcaddq_rot90_s<mode>): Merge
13937 (@mve_<mve_insn>q<mve_rot>_<supf><mode>): ... this.
13938 (mve_vcaddq<mve_rot><mode>): Rename into ...
13939 (@mve_<mve_insn>q<mve_rot>_f<mode>): ... this
13940 (mve_vcaddq_rot270_m_<supf><mode>)
13941 (mve_vcaddq_rot90_m_<supf><mode>, mve_vhcaddq_rot270_m_s<mode>)
13942 (mve_vhcaddq_rot90_m_s<mode>): Merge into ...
13943 (@mve_<mve_insn>q<mve_rot>_m_<supf><mode>): ... this.
13944 (mve_vcaddq_rot270_m_f<mode>, mve_vcaddq_rot90_m_f<mode>): Merge
13946 (@mve_<mve_insn>q<mve_rot>_m_f<mode>): ... this.
13948 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
13951 * config/i386/i386.md (*bt<mode>_setcqi): Prefer string form
13952 preparation statement over braces for a single statement.
13953 (*bt<mode>_setncqi): Likewise.
13954 (*bt<mode>_setncqi_2): New define_insn_and_split.
13956 2023-07-14 Roger Sayle <roger@nextmovesoftware.com>
13958 * config/i386/i386-expand.cc (ix86_expand_move): Generalize special
13959 case inserting of 64-bit values into a TImode register, to handle
13960 both DImode and DFmode using either *insvti_lowpart_1
13961 or *isnvti_highpart_1.
13963 2023-07-14 Uros Bizjak <ubizjak@gmail.com>
13966 * fwprop.cc (contains_paradoxical_subreg_p): Move to ...
13967 * rtlanal.cc (contains_paradoxical_subreg_p): ... here.
13968 * rtlanal.h (contains_paradoxical_subreg_p): Add prototype.
13969 * cprop.cc (try_replace_reg): Do not set REG_EQUAL note
13970 when the original source contains a paradoxical subreg.
13972 2023-07-14 Jan Hubicka <jh@suse.cz>
13974 * passes.cc (execute_function_todo): Remove
13975 TODO_rebuild_frequencies
13976 * passes.def: Add rebuild_frequencies pass.
13977 * predict.cc (estimate_bb_frequencies): Drop
13979 (tree_estimate_probability): Update call of
13980 estimate_bb_frequencies.
13981 (rebuild_frequencies): Turn into a pass; verify CFG profile consistency
13982 first and do not rebuild if not necessary.
13983 (class pass_rebuild_frequencies): New.
13984 (make_pass_rebuild_frequencies): New.
13985 * profile-count.h: Add profile_count::very_large_p.
13986 * tree-inline.cc (optimize_inline_calls): Do not return
13987 TODO_rebuild_frequencies
13988 * tree-pass.h (TODO_rebuild_frequencies): Remove.
13989 (make_pass_rebuild_frequencies): Declare.
13991 2023-07-14 Juzhe-Zhong <juzhe.zhong@rivai.ai>
13993 * config/riscv/autovec.md (cond_len_fma<mode>): New pattern.
13994 * config/riscv/riscv-protos.h (enum insn_type): New enum.
13995 (expand_cond_len_ternop): New function.
13996 * config/riscv/riscv-v.cc (emit_nonvlmax_fp_ternary_tu_insn): Ditto.
13997 (expand_cond_len_ternop): Ditto.
13999 2023-07-14 Jose E. Marchesi <jose.marchesi@oracle.com>
14002 * config/bpf/bpf.md: Enable instruction scheduling.
14004 2023-07-14 Tamar Christina <tamar.christina@arm.com>
14006 PR tree-optimization/109154
14007 * tree-if-conv.cc (INCLUDE_ALGORITHM): Include.
14008 (struct bb_predicate): Add no_predicate_stmts.
14009 (set_bb_predicate): Increase predicate count.
14010 (set_bb_predicate_gimplified_stmts): Conditionally initialize
14011 no_predicate_stmts.
14012 (get_bb_num_predicate_stmts): New.
14013 (init_bb_predicate): Initialzie no_predicate_stmts.
14014 (release_bb_predicate): Cleanup no_predicate_stmts.
14015 (insert_gimplified_predicates): Preserve no_predicate_stmts.
14017 2023-07-14 Tamar Christina <tamar.christina@arm.com>
14019 PR tree-optimization/109154
14020 * tree-if-conv.cc (gen_simplified_condition,
14021 gen_phi_nest_statement): New.
14022 (gen_phi_arg_condition, predicate_scalar_phi): Use it.
14024 2023-07-14 Richard Biener <rguenther@suse.de>
14026 * gimple.h (gimple_phi_arg): New const overload.
14027 (gimple_phi_arg_def): Make gimple arg const.
14028 (gimple_phi_arg_def_from_edge): New inline function.
14029 * tree-phinodes.h (gimple_phi_arg_imm_use_ptr_from_edge):
14031 * tree-ssa-operands.h (PHI_ARG_DEF_FROM_EDGE): Direct to
14032 new inline function.
14033 (PHI_ARG_DEF_PTR_FROM_EDGE): Likewise.
14035 2023-07-14 Monk Chiang <monk.chiang@sifive.com>
14037 * common/config/riscv/riscv-common.cc:
14038 (riscv_implied_info): Add zihintntl item.
14039 (riscv_ext_version_table): Ditto.
14040 (riscv_ext_flag_table): Ditto.
14041 * config/riscv/riscv-opts.h (MASK_ZIHINTNTL): New macro.
14042 (TARGET_ZIHINTNTL): Ditto.
14044 2023-07-14 Die Li <lidie@eswincomputing.com>
14046 * config/riscv/riscv.md: Remove redundant portion in and<mode>3.
14048 2023-07-14 Oleg Endo <olegendo@gcc.gnu.org>
14051 * config/sh/sh.md (peephole2): Handle case where eliminated reg is also
14052 used by the address of the following memory operand.
14054 2023-07-13 Mikael Pettersson <mikpelinux@gmail.com>
14057 * config/pdp11/pdp11.cc (pdp11_expand_epilogue): Also
14058 deallocate alloca-only frame.
14060 2023-07-13 Iain Sandoe <iain@sandoe.co.uk>
14063 * config/darwin.h (DARWIN_PLATFORM_ID): New.
14064 (LINK_COMMAND_A): Use DARWIN_PLATFORM_ID to pass OS, OS version
14065 and SDK data to the static linker.
14067 2023-07-13 Carl Love <cel@us.ibm.com>
14069 * config/rs6000/rs6000-builtins.def (__builtin_set_fpscr_rn): Update
14070 built-in definition return type.
14071 * config/rs6000/rs6000-c.cc (rs6000_target_modify_macros): Add check,
14072 define __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
14073 * config/rs6000/rs6000.md (rs6000_set_fpscr_rn): Add return
14074 argument to return FPSCR fields.
14075 * doc/extend.texi (__builtin_set_fpscr_rn): Update description for
14076 the return value. Add description for
14077 __SET_FPSCR_RN_RETURNS_FPSCR__ macro.
14079 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
14082 * config/alpha/alpha.cc (alpha_emit_set_long_const):
14083 Always use DImode when constructing long const.
14085 2023-07-13 Uros Bizjak <ubizjak@gmail.com>
14087 * haifa-sched.cc: Change TRUE/FALSE to true/false.
14089 * lra-assigns.cc: Ditto.
14090 * lra-constraints.cc: Ditto.
14091 * sel-sched.cc: Ditto.
14093 2023-07-13 Andrew Pinski <apinski@marvell.com>
14095 PR tree-optimization/110293
14096 PR tree-optimization/110539
14097 * match.pd: Expand the `x != (typeof x)(x == 0)`
14098 pattern to handle where the inner and outer comparsions
14099 are either `!=` or `==` and handle other constants
14102 2023-07-13 Vladimir N. Makarov <vmakarov@redhat.com>
14104 PR middle-end/109520
14105 * lra-int.h (lra_insn_recog_data): Add member asm_reloads_num.
14106 (lra_asm_insn_error): New prototype.
14107 * lra.cc: Include rtl_error.h.
14108 (lra_set_insn_recog_data): Initialize asm_reloads_num.
14109 (lra_asm_insn_error): New func whose code is taken from ...
14110 * lra-assigns.cc (lra_split_hard_reg_for): ... here. Use lra_asm_insn_error.
14111 * lra-constraints.cc (curr_insn_transform): Check reloads nummber for asm.
14113 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14115 * genmatch.cc (commutative_op): Add COND_LEN_*
14116 * internal-fn.cc (first_commutative_argument): Ditto.
14118 (get_unconditional_internal_fn): Ditto.
14119 (can_interpret_as_conditional_op_p): Ditto.
14120 (internal_fn_len_index): Ditto.
14121 * internal-fn.h (can_interpret_as_conditional_op_p): Ditt.
14122 * tree-ssa-math-opts.cc (convert_mult_to_fma_1): Ditto.
14123 (convert_mult_to_fma): Ditto.
14124 (math_opts_dom_walker::after_dom_children): Ditto.
14126 2023-07-13 Pan Li <pan2.li@intel.com>
14128 * config/riscv/riscv.cc (vxrm_rtx): New static var.
14130 (global_state_unknown_p): Removed.
14131 (riscv_entity_mode_after): Removed.
14132 (asm_insn_p): New function.
14133 (vxrm_unknown_p): New function for fixed-point.
14134 (riscv_vxrm_mode_after): Ditto.
14135 (frm_unknown_dynamic_p): New function for floating-point.
14136 (riscv_frm_mode_after): Ditto.
14137 (riscv_mode_after): Leverage new functions.
14139 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14141 * tree-vect-stmts.cc (vect_model_load_cost): Remove.
14142 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS without
14143 calling vect_model_load_cost.
14145 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14147 * tree-vect-stmts.cc (vect_model_load_cost): Assert this function only
14148 handle memory_access_type VMAT_CONTIGUOUS, remove some
14149 VMAT_CONTIGUOUS_PERMUTE related handlings.
14150 (vectorizable_load): Adjust the cost handling on VMAT_CONTIGUOUS_PERMUTE
14151 without calling vect_model_load_cost.
14153 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14155 * tree-vect-stmts.cc (vect_model_load_cost): Assert it won't get
14156 VMAT_CONTIGUOUS_REVERSE any more.
14157 (vectorizable_load): Adjust the costing handling on
14158 VMAT_CONTIGUOUS_REVERSE without calling vect_model_load_cost.
14160 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14162 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
14163 VMAT_LOAD_STORE_LANES without calling vect_model_load_cost.
14164 (vectorizable_load): Remove VMAT_LOAD_STORE_LANES related handling and
14165 assert it will never get VMAT_LOAD_STORE_LANES.
14167 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14169 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling on
14170 VMAT_GATHER_SCATTER without calling vect_model_load_cost.
14171 (vect_model_load_cost): Adjut the assertion on VMAT_GATHER_SCATTER,
14172 remove VMAT_GATHER_SCATTER related handlings and the related parameter
14175 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14177 * tree-vect-stmts.cc (vectorizable_load): Adjust the cost handling
14178 on VMAT_ELEMENTWISE and VMAT_STRIDED_SLP without calling
14179 vect_model_load_cost.
14180 (vect_model_load_cost): Assert it won't get VMAT_ELEMENTWISE and
14181 VMAT_STRIDED_SLP any more, and remove their related handlings.
14183 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14185 * tree-vect-stmts.cc (hoist_defs_of_uses): Add one argument HOIST_P.
14186 (vectorizable_load): Adjust the handling on VMAT_INVARIANT to respect
14187 hoisting decision and without calling vect_model_load_cost.
14188 (vect_model_load_cost): Assert it won't get VMAT_INVARIANT any more
14189 and remove VMAT_INVARIANT related handlings.
14191 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14193 * tree-vect-stmts.cc (vect_build_gather_load_calls): Add the handlings
14194 on costing with one extra argument cost_vec.
14195 (vectorizable_load): Adjust the call to vect_build_gather_load_calls.
14196 (vect_model_load_cost): Assert it won't get VMAT_GATHER_SCATTER with
14197 gs_info.decl set any more.
14199 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14201 * tree-vect-stmts.cc (vectorizable_load): Move and duplicate the call
14202 to vect_model_load_cost down to some different transform paths
14203 according to the handlings of different vect_memory_access_types.
14205 2023-07-13 Kewen Lin <linkw@linux.ibm.com>
14207 * tree.h (wi::from_mpz): Hide from GENERATOR_FILE.
14209 2023-07-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14211 * config/riscv/autovec.md
14212 (len_mask_gather_load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New pattern.
14213 (len_mask_gather_load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
14214 (len_mask_gather_load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
14215 (len_mask_gather_load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
14216 (len_mask_gather_load<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14217 (len_mask_gather_load<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
14218 (len_mask_gather_load<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
14219 (len_mask_gather_load<mode><mode>): Ditto.
14220 (len_mask_scatter_store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
14221 (len_mask_scatter_store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
14222 (len_mask_scatter_store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
14223 (len_mask_scatter_store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
14224 (len_mask_scatter_store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14225 (len_mask_scatter_store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
14226 (len_mask_scatter_store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
14227 (len_mask_scatter_store<mode><mode>): Ditto.
14228 * config/riscv/predicates.md (const_1_operand): New predicate.
14229 (vector_gs_scale_operand_16): Ditto.
14230 (vector_gs_scale_operand_32): Ditto.
14231 (vector_gs_scale_operand_64): Ditto.
14232 (vector_gs_extension_operand): Ditto.
14233 (vector_gs_scale_operand_16_rv32): Ditto.
14234 (vector_gs_scale_operand_32_rv32): Ditto.
14235 * config/riscv/riscv-protos.h (enum insn_type): Add gather/scatter.
14236 (expand_gather_scatter): New function.
14237 * config/riscv/riscv-v.cc (gen_const_vector_dup): Add gather/scatter.
14238 (emit_vlmax_masked_store_insn): New function.
14239 (emit_nonvlmax_masked_store_insn): Ditto.
14240 (modulo_sel_indices): Ditto.
14241 (expand_vec_perm): Fix SLP for gather/scatter.
14242 (prepare_gather_scatter): New function.
14243 (expand_gather_scatter): Ditto.
14244 * config/riscv/riscv.cc (riscv_legitimize_move): Fix bug of
14245 (subreg:SI (DI CONST_POLY_INT)).
14246 * config/riscv/vector-iterators.md: Add gather/scatter.
14247 * config/riscv/vector.md (vec_duplicate<mode>): Use "@" instead.
14248 (@vec_duplicate<mode>): Ditto.
14249 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>):
14251 (@pred_indexed_<order>store<VNX16_QHSD:mode><VNX16_QHSDI:mode>): Ditto.
14253 2023-07-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
14255 * config/riscv/autovec.md (cond_len_<optab><mode>): New pattern.
14256 * config/riscv/riscv-protos.h (enum insn_type): New enum.
14257 (expand_cond_len_binop): New function.
14258 * config/riscv/riscv-v.cc (emit_nonvlmax_tu_insn): Ditto.
14259 (emit_nonvlmax_fp_tu_insn): Ditto.
14260 (need_fp_rounding_p): Ditto.
14261 (expand_cond_len_binop): Ditto.
14262 * config/riscv/riscv.cc (riscv_preferred_else_value): Ditto.
14263 (TARGET_PREFERRED_ELSE_VALUE): New target hook.
14265 2023-07-12 Jan Hubicka <jh@suse.cz>
14267 * tree-cfg.cc (gimple_duplicate_sese_region): Rename to ...
14268 (gimple_duplicate_seme_region): ... this; break out profile updating
14270 * tree-ssa-loop-ch.cc (update_profile_after_ch): ... here.
14271 (ch_base::copy_headers): Update.
14272 * tree-cfg.h (gimple_duplicate_sese_region): Rename to ...
14273 (gimple_duplicate_seme_region): ... this.
14275 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14277 PR tree-optimization/107043
14278 * range-op.cc (operator_bitwise_and::op1_range): Update bitmask.
14280 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14282 PR tree-optimization/107053
14283 * gimple-range-op.cc (cfn_popcount): Use known set bits.
14285 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
14287 * ira.cc (equiv_init_varies_p): Change return type from int to bool
14288 and adjust function body accordingly.
14289 (equiv_init_movable_p): Ditto.
14290 (memref_used_between_p): Ditto.
14291 * lra-constraints.cc (valid_address_p): Ditto.
14293 2023-07-12 Aldy Hernandez <aldyh@redhat.com>
14295 * range-op.cc (irange_to_masked_value): Remove.
14296 (update_known_bitmask): Update irange value/mask pair instead of
14297 only updating nonzero bits.
14299 2023-07-12 Jan Hubicka <jh@suse.cz>
14301 * tree-cfg.cc (gimple_duplicate_sese_region): Add ORIG_ELIMINATED_EDGES
14302 parameter and rewrite profile updating code to handle edges elimination.
14303 * tree-cfg.h (gimple_duplicate_sese_region): Update prototpe.
14304 * tree-ssa-loop-ch.cc (loop_invariant_op_p): New function.
14305 (loop_iv_derived_p): New function.
14306 (should_duplicate_loop_header_p): Track invariant exit edges; fix handling
14307 of PHIs and propagation of IV derived variables.
14308 (ch_base::copy_headers): Pass around the invariant edges hash set.
14310 2023-07-12 Uros Bizjak <ubizjak@gmail.com>
14312 * ifcvt.cc (cond_exec_changed_p): Change variable to bool.
14313 (last_active_insn): Change "skip_use_p" function argument to bool.
14314 (noce_operand_ok): Change return type from int to bool.
14315 (find_cond_trap): Ditto.
14316 (block_jumps_and_fallthru_p): Change "fallthru_p" and
14317 "jump_p" variables to bool.
14318 (noce_find_if_block): Change return type from int to bool.
14319 (cond_exec_find_if_block): Ditto.
14320 (find_if_case_1): Ditto.
14321 (find_if_case_2): Ditto.
14322 (dead_or_predicable): Ditto. Change "reversep" function arg to bool.
14323 (block_jumps_and_fallthru): Rename from block_jumps_and_fallthru_p.
14324 (cond_exec_process_insns): Change return type from int to bool.
14325 Change "mod_ok" function arg to bool.
14326 (cond_exec_process_if_block): Change return type from int to bool.
14327 Change "do_multiple_p" function arg to bool. Change "then_mod_ok"
14329 (noce_emit_store_flag): Change return type from int to bool.
14330 Change "reversep" function arg to bool. Change "cond_complex"
14332 (noce_try_move): Change return type from int to bool.
14333 (noce_try_ifelse_collapse): Ditto.
14334 (noce_try_store_flag): Ditto. Change "reversep" variable to bool.
14335 (noce_try_addcc): Change return type from int to bool. Change
14336 "subtract" variable to bool.
14337 (noce_try_store_flag_constants): Change return type from int to bool.
14338 (noce_try_store_flag_mask): Ditto. Change "reversep" variable to bool.
14339 (noce_try_cmove): Change return type from int to bool.
14340 (noce_try_cmove_arith): Ditto. Change "is_mem" variable to bool.
14341 (noce_try_minmax): Change return type from int to bool. Change
14342 "unsignedp" variable to bool.
14343 (noce_try_abs): Change return type from int to bool. Change
14344 "negate" variable to bool.
14345 (noce_try_sign_mask): Change return type from int to bool.
14346 (noce_try_move): Ditto.
14347 (noce_try_store_flag_constants): Ditto.
14348 (noce_try_cmove): Ditto.
14349 (noce_try_cmove_arith): Ditto.
14350 (noce_try_minmax): Ditto. Change "unsignedp" variable to bool.
14351 (noce_try_bitop): Change return type from int to bool.
14352 (noce_operand_ok): Ditto.
14353 (noce_convert_multiple_sets): Ditto.
14354 (noce_convert_multiple_sets_1): Ditto.
14355 (noce_process_if_block): Ditto.
14356 (check_cond_move_block): Ditto.
14357 (cond_move_process_if_block): Ditto. Change "success_p"
14359 (rest_of_handle_if_conversion): Change return type to void.
14361 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14363 * internal-fn.cc (FOR_EACH_CODE_MAPPING): Adapt for COND_LEN_* support.
14365 (get_conditional_len_internal_fn): New function.
14366 * internal-fn.h (get_conditional_len_internal_fn): Ditto.
14367 * tree-vect-stmts.cc (vectorizable_operation): Adapt for COND_LEN_*
14370 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14373 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): Typo.
14375 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14378 * config/i386/i386.md (*add<dwi>3_doubleword_concat_zext): New
14379 define_insn_and_split derived from *add<dwi>3_doubleword_concat
14380 and *add<dwi>3_doubleword_zext.
14382 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14385 * config/i386/i386.md (peephole2): Check !reg_mentioned_p when
14386 optimizing rega = 0; rega op= regb for op in [XOR,IOR,PLUS].
14387 (peephole2): Simplify rega = 0; rega op= rega cases.
14389 2023-07-12 Roger Sayle <roger@nextmovesoftware.com>
14391 * config/i386/i386-expand.cc (ix86_expand_int_compare): If
14392 testing a TImode SUBREG of a 128-bit vector register against
14393 zero, use a PTEST instruction instead of first moving it to
14394 a pair of scalar registers.
14396 2023-07-12 Robin Dapp <rdapp@ventanamicro.com>
14398 * genopinit.cc (main): Adjust maximal number of optabs and
14400 * gensupport.cc (find_optab): Shift optab by 20 and mode by
14402 * optabs-query.h (optab_handler): Ditto.
14403 (convert_optab_handler): Ditto.
14405 2023-07-12 Richard Biener <rguenther@suse.de>
14407 PR tree-optimization/110630
14408 * tree-vect-slp.cc (vect_add_slp_permutation): New
14409 offset parameter, honor that for the extract code generation.
14410 (vectorizable_slp_permutation_1): Handle offsetted identities.
14412 2023-07-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14414 * config/riscv/autovec.md (smul<mode>3_highpart): New pattern.
14415 (umul<mode>3_highpart): Ditto.
14417 2023-07-12 Jan Beulich <jbeulich@suse.com>
14419 * config/i386/i386.md (extendbfsf2_1): Add new AVX512F
14420 alternative. Adjust original last alternative's "prefix"
14421 attribute to maybe_evex.
14423 2023-07-12 Jan Beulich <jbeulich@suse.com>
14425 * config/i386/sse.md (vec_dupv4sf): Make first alternative use
14426 vbroadcastss for AVX2. New AVX512F alternative.
14427 (*vec_dupv4si): New AVX2 and AVX512F alternatives using
14428 vpbroadcastd. Replace sselog1 by sseshuf1 in "type" attribute.
14430 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14432 * config/riscv/peephole.md: Remove XThead* peephole passes.
14433 * config/riscv/thead.md: Include thead-peephole.md.
14434 * config/riscv/thead-peephole.md: New file.
14436 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14438 * config/riscv/riscv-protos.h (riscv_regno_ok_for_index_p):
14440 (riscv_index_reg_class): Likewise.
14441 * config/riscv/riscv.cc (riscv_regno_ok_for_index_p): New function.
14442 (riscv_index_reg_class): New function.
14443 * config/riscv/riscv.h (INDEX_REG_CLASS): Call new function
14444 riscv_index_reg_class().
14445 (REGNO_OK_FOR_INDEX_P): Call new function
14446 riscv_regno_ok_for_index_p().
14448 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14450 * config/riscv/riscv-protos.h (enum riscv_address_type):
14451 New location of type definition.
14452 (struct riscv_address_info): Likewise.
14453 * config/riscv/riscv.cc (enum riscv_address_type):
14454 Old location of type definition.
14455 (struct riscv_address_info): Likewise.
14457 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14459 * config/riscv/riscv.h (Xmode): New macro.
14461 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14463 * config/riscv/riscv.cc (riscv_print_operand_address): Use
14464 output_addr_const rather than riscv_print_operand.
14466 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14468 * config/riscv/thead.md: Adjust constraints of th_addsl.
14470 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14472 * config/riscv/thead.cc (th_mempair_operands_p):
14473 Fix documentation of th_mempair_order_operands().
14475 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14477 * config/riscv/thead.cc (th_mempair_save_regs):
14478 Emit REG_FRAME_RELATED_EXPR notes in prologue.
14480 2023-07-12 Christoph Müllner <christoph.muellner@vrull.eu>
14482 * config/riscv/riscv.md: No base-ISA extension splitter for XThead*.
14483 * config/riscv/thead.md (*extend<SHORT:mode><SUPERQI:mode>2_th_ext):
14484 New XThead extension INSN.
14485 (*zero_extendsidi2_th_extu): New XThead extension INSN.
14486 (*zero_extendhi<GPR:mode>2_th_extu): New XThead extension INSN.
14488 2023-07-12 liuhongt <hongtao.liu@intel.com>
14492 * config/i386/predicates.md
14493 (int_float_vector_all_ones_operand): New predicate.
14494 * config/i386/sse.md (*vmov<mode>_constm1_pternlog_false_dep): New
14496 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
14498 (*<avx512>_cvtmask2<ssemodesuffix><mode>_pternlog_false_dep):
14500 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Adjust to
14501 define_insn_and_split to avoid false dependence.
14502 (*<avx512>_cvtmask2<ssemodesuffix><mode>): Ditto.
14503 (<mask_codefor>one_cmpl<mode>2<mask_name>): Adjust constraint
14504 of operands 1 to '0' to avoid false dependence.
14505 (*andnot<mode>3): Ditto.
14506 (iornot<mode>3): Ditto.
14507 (*<nlogic><mode>3): Ditto.
14509 2023-07-12 Mo, Zewei <zewei.mo@intel.com>
14511 * common/config/i386/cpuinfo.h
14512 (get_intel_cpu): Handle Granite Rapids D.
14513 * common/config/i386/i386-common.cc:
14514 (processor_alias_table): Add graniterapids-d.
14515 * common/config/i386/i386-cpuinfo.h
14516 (enum processor_subtypes): Add INTEL_COREI7_GRANITERAPIDS_D.
14517 * config.gcc: Add -march=graniterapids-d.
14518 * config/i386/driver-i386.cc (host_detect_local_cpu):
14519 Handle graniterapids-d.
14520 * config/i386/i386.h: (PTA_GRANITERAPIDS_D): New.
14521 * doc/extend.texi: Add graniterapids-d.
14522 * doc/invoke.texi: Ditto.
14524 2023-07-12 Haochen Jiang <haochen.jiang@intel.com>
14526 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
14527 Add OPTION_MASK_ISA_AVX512VL.
14528 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
14531 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14533 * config/riscv/riscv-protos.h (enum insn_type): Add vcompress optimization.
14534 * config/riscv/riscv-v.cc (emit_vlmax_compress_insn): Ditto.
14535 (shuffle_compress_patterns): Ditto.
14536 (expand_vec_perm_const_1): Ditto.
14538 2023-07-11 Uros Bizjak <ubizjak@gmail.com>
14540 * cfghooks.cc (verify_flow_info): Change "err" variable to bool.
14541 * cfghooks.h (struct cfg_hooks): Change return type of
14542 verify_flow_info from integer to bool.
14543 * cfgrtl.cc (can_delete_note_p): Change return type from int to bool.
14544 (can_delete_label_p): Ditto.
14545 (rtl_verify_flow_info): Change return type from int to bool
14546 and adjust function body accordingly. Change "err" variable to bool.
14547 (rtl_verify_flow_info_1): Ditto.
14548 (free_bb_for_insn): Change return type to void.
14549 (rtl_merge_blocks): Change "b_empty" variable to bool.
14550 (try_redirect_by_replacing_jump): Change "fallthru" variable to bool.
14551 (verify_hot_cold_block_grouping): Change return type from int to bool.
14552 Change "err" variable to bool.
14553 (rtl_verify_edges): Ditto.
14554 (rtl_verify_bb_insns): Ditto.
14555 (rtl_verify_bb_pointers): Ditto.
14556 (rtl_verify_bb_insn_chain): Ditto.
14557 (rtl_verify_fallthru): Ditto.
14558 (rtl_verify_bb_layout): Ditto.
14559 (purge_all_dead_edges): Change "purged" variable to bool.
14560 * cfgrtl.h (free_bb_for_insn): Change return type from int to void.
14561 * postreload-gcse.cc (expr_hasher::equal): Change "equiv_p" to bool.
14562 (load_killed_in_block_p): Change return type from int to bool
14563 and adjust function body accordingly.
14564 (oprs_unchanged_p): Return true/false.
14565 (rest_of_handle_gcse2): Change return type to void.
14566 * tree-cfg.cc (gimple_verify_flow_info): Change return type from
14567 int to bool. Change "err" variable to bool.
14569 2023-07-11 Gaius Mulley <gaiusmod2@gmail.com>
14571 * doc/gm2.texi (-Wuninit-variable-checking=) New item.
14573 2023-07-11 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14575 * doc/md.texi: Add COND_LEN_* operations for loop control with length.
14576 * internal-fn.cc (cond_len_unary_direct): Ditto.
14577 (cond_len_binary_direct): Ditto.
14578 (cond_len_ternary_direct): Ditto.
14579 (expand_cond_len_unary_optab_fn): Ditto.
14580 (expand_cond_len_binary_optab_fn): Ditto.
14581 (expand_cond_len_ternary_optab_fn): Ditto.
14582 (direct_cond_len_unary_optab_supported_p): Ditto.
14583 (direct_cond_len_binary_optab_supported_p): Ditto.
14584 (direct_cond_len_ternary_optab_supported_p): Ditto.
14585 * internal-fn.def (COND_LEN_ADD): Ditto.
14586 (COND_LEN_SUB): Ditto.
14587 (COND_LEN_MUL): Ditto.
14588 (COND_LEN_DIV): Ditto.
14589 (COND_LEN_MOD): Ditto.
14590 (COND_LEN_RDIV): Ditto.
14591 (COND_LEN_MIN): Ditto.
14592 (COND_LEN_MAX): Ditto.
14593 (COND_LEN_FMIN): Ditto.
14594 (COND_LEN_FMAX): Ditto.
14595 (COND_LEN_AND): Ditto.
14596 (COND_LEN_IOR): Ditto.
14597 (COND_LEN_XOR): Ditto.
14598 (COND_LEN_SHL): Ditto.
14599 (COND_LEN_SHR): Ditto.
14600 (COND_LEN_FMA): Ditto.
14601 (COND_LEN_FMS): Ditto.
14602 (COND_LEN_FNMA): Ditto.
14603 (COND_LEN_FNMS): Ditto.
14604 (COND_LEN_NEG): Ditto.
14605 * optabs.def (OPTAB_D): Ditto.
14607 2023-07-11 Richard Biener <rguenther@suse.de>
14609 PR tree-optimization/110614
14610 * tree-vect-data-refs.cc (vect_supportable_dr_alignment):
14611 SLP splats are not suitable for re-align ops.
14613 2023-07-10 Peter Bergner <bergner@linux.ibm.com>
14615 * config/rs6000/predicates.md (quad_memory_operand): Remove redundant
14617 (vsx_quad_dform_memory_operand): Likewise.
14619 2023-07-10 Uros Bizjak <ubizjak@gmail.com>
14621 * reorg.cc (stop_search_p): Change return type from int to bool
14622 and adjust function body accordingly.
14623 (resource_conflicts_p): Ditto.
14624 (insn_references_resource_p): Change return type from int to bool.
14625 (insn_sets_resource_p): Ditto.
14626 (redirect_with_delay_slots_safe_p): Ditto.
14627 (condition_dominates_p): Change return type from int to bool
14628 and adjust function body accordingly.
14629 (redirect_with_delay_list_safe_p): Ditto.
14630 (check_annul_list_true_false): Ditto. Change "annul_true_p"
14631 function argument to bool.
14632 (steal_delay_list_from_target): Change "pannul_p" function
14633 argument to bool pointer. Change "must_annul" and "used_annul"
14634 variables from int to bool.
14635 (steal_delay_list_from_fallthrough): Ditto.
14636 (own_thread_p): Change return type from int to bool and adjust
14637 function body accordingly. Change "allow_fallthrough" function
14639 (reorg_redirect_jump): Change return type from int to bool.
14640 (fill_simple_delay_slots): Change "non_jumps_p" function
14641 argument from int to bool. Change "maybe_never" varible to bool.
14642 (fill_slots_from_thread): Change "likely", "thread_if_true" and
14643 "own_thread" function arguments to bool. Change "lose" and
14644 "must_annul" variables to bool.
14645 (delete_from_delay_slot): Change "had_barrier" variable to bool.
14646 (try_merge_delay_insns): Change "annul_p" variable to bool.
14647 (fill_eager_delay_slots): Change "own_target" and "own_fallthrouhg"
14649 (rest_of_handle_delay_slots): Change return type from int to void
14650 and adjust function body accordingly.
14652 2023-07-10 Kito Cheng <kito.cheng@sifive.com>
14654 * doc/extend.texi (RISC-V Operand Modifiers): New.
14656 2023-07-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
14658 * config/riscv/riscv-vsetvl.cc (add_label_notes): Remove it.
14659 (insert_insn_end_basic_block): Ditto.
14660 (pass_vsetvl::commit_vsetvls): Adapt for new helper function.
14661 * gcse.cc (insert_insn_end_basic_block): Export as global function.
14662 * gcse.h (insert_insn_end_basic_block): Ditto.
14664 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
14667 * config/arm/arm-builtins.cc (arm_init_mve_builtins): Handle LTO.
14668 (arm_builtin_decl): Hahndle MVE builtins.
14669 * config/arm/arm-mve-builtins.cc (builtin_decl): New function.
14670 (add_unique_function): Fix handling of
14671 __ARM_MVE_PRESERVE_USER_NAMESPACE.
14672 (add_overloaded_function): Likewise.
14673 * config/arm/arm-protos.h (builtin_decl): New declaration.
14675 2023-07-10 Christophe Lyon <christophe.lyon@linaro.org>
14677 * doc/sourcebuild.texi (arm_v8_1m_main_cde_mve_fp): Document.
14679 2023-07-10 Xi Ruoyao <xry111@xry111.site>
14681 PR tree-optimization/110557
14682 * tree-vect-patterns.cc (vect_recog_bitfield_ref_pattern):
14683 Ensure the output sign-extended if necessary.
14685 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
14687 * config/i386/i386.md (peephole2): Transform xchg insn with a
14688 REG_UNUSED note to a (simple) move.
14689 (*insvti_lowpart_1): New define_insn_and_split.
14690 (*insvdi_lowpart_1): Likewise.
14692 2023-07-10 Roger Sayle <roger@nextmovesoftware.com>
14694 * config/i386/i386-features.cc (compute_convert_gain): Tweak
14695 gains/costs for ROTATE/ROTATERT by integer constant on AVX512VL.
14696 (general_scalar_chain::convert_rotate): On TARGET_AVX512F generate
14697 avx512vl_rolv2di or avx412vl_rolv4si when appropriate.
14699 2023-07-10 liuhongt <hongtao.liu@intel.com>
14702 * config/i386/i386.md (*ieee_max<mode>3_1): New pre_reload
14703 splitter to detect fp max pattern.
14704 (*ieee_min<mode>3_1): Ditto, but for fp min pattern.
14706 2023-07-09 Jan Hubicka <jh@suse.cz>
14708 * cfg.cc (check_bb_profile): Dump counts with relative frequency.
14709 (dump_edge_info): Likewise.
14710 (dump_bb_info): Likewise.
14711 * profile-count.cc (profile_count::dump): Add comma between quality and
14714 2023-07-08 Jan Hubicka <jh@suse.cz>
14716 PR tree-optimization/110600
14717 * cfgloopmanip.cc (scale_loop_profile): Add mising profile_dump check.
14719 2023-07-08 Jan Hubicka <jh@suse.cz>
14721 PR middle-end/110590
14722 * cfgloopmanip.cc (scale_loop_profile): Avoid scaling exits within
14723 inner loops and be more careful about inconsistent profiles.
14724 (duplicate_loop_body_to_header_edge): Fix profile update when eliminated
14725 exit is followed by other exit.
14727 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
14729 * cprop.cc (reg_available_p): Change return type from int to bool.
14730 (reg_not_set_p): Ditto.
14731 (try_replace_reg): Ditto. Change "success" variable to bool.
14732 (cprop_jump): Change return type from int to void
14733 and adjust function body accordingly.
14734 (constprop_register): Ditto.
14735 (cprop_insn): Ditto. Change "changed" variable to bool.
14736 (local_cprop_pass): Change return type from int to void
14737 and adjust function body accordingly.
14738 (bypass_block): Ditto. Change "change", "may_be_loop_header"
14739 and "removed_p" variables to bool.
14740 (bypass_conditional_jumps): Change return type from int to void
14741 and adjust function body accordingly. Change "changed"
14743 (one_cprop_pass): Ditto.
14745 2023-07-08 Uros Bizjak <ubizjak@gmail.com>
14747 * gcse.cc (expr_equiv_p): Change return type from int to bool.
14748 (oprs_unchanged_p): Change return type from int to void
14749 and adjust function body accordingly.
14750 (oprs_anticipatable_p): Ditto.
14751 (oprs_available_p): Ditto.
14752 (insert_expr_in_table): Ditto. Change "antic_p" and "avail_p"
14753 arguments to bool. Change "found" variable to bool.
14754 (load_killed_in_block_p): Change return type from int to void and
14755 adjust function body accordingly. Change "avail_p" argument to bool.
14756 (pre_expr_reaches_here_p): Change return type from int to void
14757 and adjust function body accordingly.
14758 (pre_delete): Ditto. Change "changed" variable to bool.
14759 (pre_gcse): Change return type from int to void
14760 and adjust function body accordingly. Change "did_insert" and
14761 "changed" variables to bool.
14762 (one_pre_gcse_pass): Change return type from int to void
14763 and adjust function body accordingly. Change "changed" variable
14765 (should_hoist_expr_to_dom): Change return type from int to void
14766 and adjust function body accordingly. Change
14767 "visited_allocated_locally" variable to bool.
14768 (hoist_code): Change return type from int to void and adjust
14769 function body accordingly. Change "changed" variable to bool.
14770 (one_code_hoisting_pass): Ditto.
14771 (pre_edge_insert): Change return type from int to void and adjust
14772 function body accordingly. Change "did_insert" variable to bool.
14773 (pre_expr_reaches_here_p_work): Change return type from int to void
14774 and adjust function body accordingly.
14775 (simple_mem): Ditto.
14776 (want_to_gcse_p): Change return type from int to void
14777 and adjust function body accordingly.
14778 (can_assign_to_reg_without_clobbers_p): Update function body
14779 for bool return type.
14780 (hash_scan_set): Change "antic_p" and "avail_p" variables to bool.
14781 (pre_insert_copies): Change "added_copy" variable to bool.
14783 2023-07-08 Jonathan Wakely <jwakely@redhat.com>
14787 * doc/invoke.texi (Warning Options): Fix typos.
14789 2023-07-07 Jan Hubicka <jh@suse.cz>
14791 * profile-count.cc (profile_count::dump): Add FUN
14792 parameter; print relative frequency.
14793 (profile_count::debug): Update.
14794 * profile-count.h (profile_count::dump): Update
14797 2023-07-07 Roger Sayle <roger@nextmovesoftware.com>
14801 * config/i386/i386-expand.cc (ix86_expand_move): Convert SETs of
14802 TImode destinations from paradoxical SUBREGs (setting the lowpart)
14803 into explicit zero extensions. Use *insvti_highpart_1 instruction
14804 to set the highpart of a TImode destination.
14806 2023-07-07 Jan Hubicka <jh@suse.cz>
14808 * predict.cc (force_edge_cold): Use
14809 set_edge_probability_and_rescale_others; improve dumps.
14811 2023-07-07 Jan Hubicka <jh@suse.cz>
14813 * cfgloopmanip.cc (scale_loop_profile): Fix computation of count_in and scaling blocks
14815 * tree-vect-loop-manip.cc (vect_do_peeling): Scale loop profile of the epilogue if bound
14818 2023-07-07 Juergen Christ <jchrist@linux.ibm.com>
14820 * config/s390/s390.cc (vec_init): Fix default case
14822 2023-07-07 Vladimir N. Makarov <vmakarov@redhat.com>
14824 * lra-assigns.cc (assign_by_spills): Add reload insns involving
14825 reload pseudos with non-refined class to be processed on the next
14827 * lra-constraints.cc (enough_allocatable_hard_regs_p): New func.
14828 (in_class_p): Use it.
14829 (print_curr_insn_alt): New func.
14830 (process_alt_operands): Use it. Improve debug info.
14831 (curr_insn_transform): Use print_curr_insn_alt. Refine reload
14832 pseudo class if it is not refined yet.
14834 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14836 * value-range.cc (irange::get_bitmask_from_range): Return all the
14837 known bits for a singleton.
14838 (irange::set_range_from_bitmask): Set a range of a singleton when
14839 all bits are known.
14841 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14843 * value-range.cc (irange::intersect): Leave normalization to
14846 2023-07-07 Aldy Hernandez <aldyh@redhat.com>
14848 * data-streamer-in.cc (streamer_read_value_range): Adjust for
14850 * data-streamer-out.cc (streamer_write_vrange): Same.
14851 * range-op.cc (operator_cast::fold_range): Same.
14852 * value-range-pretty-print.cc
14853 (vrange_printer::print_irange_bitmasks): Same.
14854 * value-range-storage.cc (irange_storage::write_lengths_address):
14856 (irange_storage::set_irange): Same.
14857 (irange_storage::get_irange): Same.
14858 (irange_storage::size): Same.
14859 (irange_storage::dump): Same.
14860 * value-range-storage.h: Same.
14861 * value-range.cc (debug): New.
14862 (irange_bitmask::dump): New.
14863 (add_vrange): Adjust for value/mask.
14864 (irange::operator=): Same.
14865 (irange::set): Same.
14866 (irange::verify_range): Same.
14867 (irange::operator==): Same.
14868 (irange::contains_p): Same.
14869 (irange::irange_single_pair_union): Same.
14870 (irange::union_): Same.
14871 (irange::intersect): Same.
14872 (irange::invert): Same.
14873 (irange::get_nonzero_bits_from_range): Rename to...
14874 (irange::get_bitmask_from_range): ...this.
14875 (irange::set_range_from_nonzero_bits): Rename to...
14876 (irange::set_range_from_bitmask): ...this.
14877 (irange::set_nonzero_bits): Rename to...
14878 (irange::update_bitmask): ...this.
14879 (irange::get_nonzero_bits): Rename to...
14880 (irange::get_bitmask): ...this.
14881 (irange::intersect_nonzero_bits): Rename to...
14882 (irange::intersect_bitmask): ...this.
14883 (irange::union_nonzero_bits): Rename to...
14884 (irange::union_bitmask): ...this.
14885 (irange_bitmask::verify_mask): New.
14886 * value-range.h (class irange_bitmask): New.
14887 (irange_bitmask::set_unknown): New.
14888 (irange_bitmask::unknown_p): New.
14889 (irange_bitmask::irange_bitmask): New.
14890 (irange_bitmask::get_precision): New.
14891 (irange_bitmask::get_nonzero_bits): New.
14892 (irange_bitmask::set_nonzero_bits): New.
14893 (irange_bitmask::operator==): New.
14894 (irange_bitmask::union_): New.
14895 (irange_bitmask::intersect): New.
14896 (class irange): Friend vrange_printer.
14897 (irange::varying_compatible_p): Adjust for bitmask.
14898 (irange::set_varying): Same.
14899 (irange::set_nonzero): Same.
14901 2023-07-07 Jan Beulich <jbeulich@suse.com>
14903 * config/i386/sse.md (*vec_extractv2ti): Drop g modifiers.
14905 2023-07-07 Jan Beulich <jbeulich@suse.com>
14907 * config/i386/sse.md (@vec_extract_hi_<mode>): Drop last
14908 alternative. Switch new last alternative's "isa" attribute to
14910 (vec_extract_hi_v32qi): Likewise.
14912 2023-07-07 Pan Li <pan2.li@intel.com>
14913 Robin Dapp <rdapp@ventanamicro.com>
14915 * config/riscv/riscv.cc (riscv_emit_mode_set): Avoid emit insn
14917 (riscv_mode_entry): Take FRM_MODE_DYN as entry mode.
14918 (riscv_mode_exit): Likewise for exit mode.
14919 (riscv_mode_needed): Likewise for needed mode.
14920 (riscv_mode_after): Likewise for after mode.
14922 2023-07-07 Pan Li <pan2.li@intel.com>
14924 * config/riscv/vector.md: Fix typo.
14926 2023-07-06 Jan Hubicka <jh@suse.cz>
14928 PR middle-end/25623
14929 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Scale loop frequency to maximal number
14930 of iterations determined.
14931 * tree-ssa-loop-ivcanon.cc (try_unroll_loop_completely): Likewise.
14933 2023-07-06 Jan Hubicka <jh@suse.cz>
14935 * cfgloopmanip.cc (scale_loop_profile): Rewrite exit edge
14936 probability update to be safe on loops with subloops.
14937 Make bound parameter to be iteration bound.
14938 * tree-ssa-loop-ivcanon.cc (try_peel_loop): Update call
14939 of scale_loop_profile.
14940 * tree-vect-loop-manip.cc (vect_do_peeling): Likewise.
14942 2023-07-06 Hao Liu OS <hliu@os.amperecomputing.com>
14944 PR tree-optimization/110449
14945 * tree-vect-loop.cc (vectorizable_induction): use vec_n to replace
14946 vec_loop for the unrolled loop.
14948 2023-07-06 Jan Hubicka <jh@suse.cz>
14950 * cfg.cc (set_edge_probability_and_rescale_others): New function.
14951 (update_bb_profile_for_threading): Use it; simplify the rest.
14952 * cfg.h (set_edge_probability_and_rescale_others): Declare.
14953 * profile-count.h (profile_probability::apply_scale): New.
14955 2023-07-06 Claudiu Zissulescu <claziss@gmail.com>
14957 * doc/extend.texi (ARC Built-in Functions): Update documentation
14958 with missing builtins.
14960 2023-07-06 Richard Biener <rguenther@suse.de>
14962 PR tree-optimization/110556
14963 * tree-ssa-tail-merge.cc (gimple_equal_p): Check
14964 assign code and all operands of non-stores.
14966 2023-07-06 Richard Biener <rguenther@suse.de>
14968 PR tree-optimization/110563
14969 * tree-vectorizer.h (vect_determine_partial_vectors_and_peeling):
14970 Remove second argument.
14971 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
14972 Remove for_epilogue_p argument. Merge assert ...
14973 (vect_analyze_loop_2): ... with check done before determining
14974 partial vectors by moving it after.
14975 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust.
14977 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14979 * ggc-common.cc (gt_pch_note_reorder, gt_pch_save): Tighten up a
14980 few things re 'reorder' option and strings.
14981 * stringpool.cc (gt_pch_p_S): This is now 'gcc_unreachable'.
14983 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14985 * gengtype-parse.cc: Clean up obsolete parametrized structs
14987 * gengtype.cc: Likewise.
14988 * gengtype.h: Likewise.
14990 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14992 * gengtype.cc (struct walk_type_data): Remove 'needs_cast_p'.
14995 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
14997 * gengtype-parse.cc (token_names): Add '"user"'.
14998 * gengtype.h (gty_token): Add 'UNUSED_PARAM_IS' for use with
14999 'FIRST_TOKEN_WITH_VALUE'.
15001 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15003 * doc/gty.texi (GTY Options) <string_length>: Enhance.
15005 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15007 * gengtype.cc (write_root, write_roots): Explicitly reject
15008 'string_length' option.
15009 * doc/gty.texi (GTY Options) <string_length>: Document.
15011 2023-07-06 Thomas Schwinge <thomas@codesourcery.com>
15013 * ggc-internal.h (ggc_pch_count_object, ggc_pch_alloc_object)
15014 (ggc_pch_write_object): Remove 'bool is_string' argument.
15015 * ggc-common.cc: Adjust.
15016 * ggc-page.cc: Likewise.
15018 2023-07-06 Roger Sayle <roger@nextmovesoftware.com>
15020 * dwarf2out.cc (mem_loc_descriptor): Handle COPYSIGN.
15022 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
15024 * doc/extend.texi: Move x86 inlining rule to a new subsubsection
15025 and add description for inling of function with arch and tune
15028 2023-07-06 Richard Biener <rguenther@suse.de>
15030 PR tree-optimization/110515
15031 * tree-ssa-pre.cc (compute_avail): Make code dealing
15032 with hoisting loads with different alias-sets more
15035 2023-07-06 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15037 * tree-vect-stmts.cc (vect_get_strided_load_store_ops): Fix ICE.
15039 2023-07-06 Hongyu Wang <hongyu.wang@intel.com>
15041 * config/i386/i386.cc (ix86_can_inline_p): If callee has
15042 default arch=x86-64 and tune=generic, do not block the
15043 inlining to its caller. Also allow callee with different
15044 arch= to be inlined if it has always_inline attribute and
15045 it's ISA is subset of caller's.
15047 2023-07-06 liuhongt <hongtao.liu@intel.com>
15049 * config/i386/i386.cc (ix86_rtx_costs): Adjust rtx_cost for
15050 DF/SFmode AND/IOR/XOR/ANDN operations.
15052 2023-07-06 Andrew Pinski <apinski@marvell.com>
15054 PR middle-end/110554
15055 * tree-vect-generic.cc (expand_vector_condition): For comparisons,
15056 just build using boolean_type_node instead of the cond_type.
15057 For non-comparisons/non-scalar-bitmask, build a ` != 0` gimple
15058 that will feed into the COND_EXPR.
15060 2023-07-06 liuhongt <hongtao.liu@intel.com>
15063 * config/i386/i386.md (movdf_internal): Disparage slightly for
15064 2 alternatives (r,v) and (v,r) by adding constraint modifier
15067 2023-07-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
15070 * config/rs6000/rs6000.cc (rs6000_expand_vector_extract): Remove redundant
15071 initialization of new_addr.
15073 2023-07-06 Hao Liu <hliu@os.amperecomputing.com>
15075 PR tree-optimization/110474
15076 * tree-vect-loop.cc (vect_analyze_loop_2): unscale the VF by suggested
15077 unroll factor while selecting the epilog vect loop VF.
15079 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15081 * gimple-range-gori.cc (compute_operand_range): Convert to a tail
15084 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15086 * gimple-range-gori.cc (compute_operand_range): After calling
15087 compute_operand2_range, recursively call self if needed.
15088 (compute_operand2_range): Turn into a leaf function.
15089 (gori_compute::compute_operand1_and_operand2_range): Finish
15090 operand2 calculation.
15091 * gimple-range-gori.h (compute_operand2_range): Remove name param.
15093 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15095 * gimple-range-gori.cc (compute_operand_range): After calling
15096 compute_operand1_range, recursively call self if needed.
15097 (compute_operand1_range): Turn into a leaf function.
15098 (gori_compute::compute_operand1_and_operand2_range): Finish
15099 operand1 calculation.
15100 * gimple-range-gori.h (compute_operand1_range): Remove name param.
15102 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15104 * gimple-range-gori.cc (compute_operand_range): Check for
15105 operand interdependence when both op1 and op2 are computed.
15106 (compute_operand1_and_operand2_range): No checks required now.
15108 2023-07-05 Andrew MacLeod <amacleod@redhat.com>
15110 * gimple-range-gori.cc (compute_operand_range): Check for
15111 a relation between op1 and op2 and use that instead.
15112 (compute_operand1_range): Don't look for a relation override.
15113 (compute_operand2_range): Ditto.
15115 2023-07-05 Jonathan Wakely <jwakely@redhat.com>
15117 * doc/contrib.texi (Contributors): Update my entry.
15119 2023-07-05 Filip Kastl <filip.kastl@gmail.com>
15121 * value-prof.cc (gimple_mod_subtract_transform): Correct edge
15124 2023-07-05 Uros Bizjak <ubizjak@gmail.com>
15126 * sched-int.h (struct haifa_sched_info): Change can_schedule_ready_p,
15127 scehdule_more_p and contributes_to_priority indirect frunction
15128 type from int to bool.
15129 (no_real_insns_p): Change return type from int to bool.
15130 (contributes_to_priority): Ditto.
15131 * haifa-sched.cc (no_real_insns_p): Change return type from
15132 int to bool and adjust function body accordingly.
15133 * modulo-sched.cc (try_scheduling_node_in_cycle): Change "success"
15134 variable type from int to bool.
15135 (ps_insn_advance_column): Change return type from int to bool.
15136 (ps_has_conflicts): Ditto. Change "has_conflicts"
15137 variable type from int to bool.
15138 * sched-deps.cc (deps_may_trap_p): Change return type from int to bool.
15139 (conditions_mutex_p): Ditto.
15140 * sched-ebb.cc (schedule_more_p): Ditto.
15141 (ebb_contributes_to_priority): Change return type from
15142 int to bool and adjust function body accordingly.
15143 * sched-rgn.cc (is_cfg_nonregular): Ditto.
15144 (check_live_1): Ditto.
15146 (find_conditional_protection): Ditto.
15147 (is_conditionally_protected): Ditto.
15148 (is_prisky): Ditto.
15149 (is_exception_free): Ditto.
15150 (haifa_find_rgns): Change "unreachable" and "too_large_failure"
15151 variables from int to bool.
15152 (extend_rgns): Change "rescan" variable from int to bool.
15153 (check_live): Change return type from
15154 int to bool and adjust function body accordingly.
15155 (can_schedule_ready_p): Ditto.
15156 (schedule_more_p): Ditto.
15157 (contributes_to_priority): Ditto.
15159 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15161 * doc/md.texi: Document that vec_set and vec_extract must not
15163 * gimple-isel.cc (gimple_expand_vec_set_expr): Rename this...
15164 (gimple_expand_vec_set_extract_expr): ...to this.
15165 (gimple_expand_vec_exprs): Call renamed function.
15166 * internal-fn.cc (vec_extract_direct): Add.
15167 (expand_vec_extract_optab_fn): New function to expand
15169 (direct_vec_extract_optab_supported_p): Add.
15170 * internal-fn.def (VEC_EXTRACT): Add.
15171 * optabs.cc (can_vec_extract_var_idx_p): New function.
15172 * optabs.h (can_vec_extract_var_idx_p): Declare.
15174 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15176 * config/riscv/autovec.md: Add gen_lowpart.
15178 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15180 * config/riscv/autovec.md: Allow register index operand.
15182 2023-07-05 Pan Li <pan2.li@intel.com>
15184 * config/riscv/riscv-vector-builtins.cc
15185 (function_expander::use_exact_insn): Use FRM_DYN instead of const0.
15187 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15189 * config/riscv/autovec.md: Use float_truncate.
15191 2023-07-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15193 * internal-fn.cc (internal_fn_len_index): Apply
15194 LEN_MASK_GATHER_LOAD/SCATTER_STORE into vectorizer.
15195 (internal_fn_mask_index): Ditto.
15196 * optabs-query.cc (supports_vec_gather_load_p): Ditto.
15197 (supports_vec_scatter_store_p): Ditto.
15198 * tree-vect-data-refs.cc (vect_gather_scatter_fn_p): Ditto.
15199 * tree-vect-patterns.cc (vect_recog_gather_scatter_pattern): Ditto.
15200 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
15201 (vect_get_strided_load_store_ops): Ditto.
15202 (vectorizable_store): Ditto.
15203 (vectorizable_load): Ditto.
15205 2023-07-05 Robin Dapp <rdapp@ventanamicro.com>
15206 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15208 * simplify-rtx.cc (native_encode_rtx): Ditto.
15209 (native_decode_vector_rtx): Ditto.
15210 (simplify_const_vector_byte_offset): Ditto.
15211 (simplify_const_vector_subreg): Ditto.
15212 * tree.cc (build_truth_vector_type_for_mode): Ditto.
15213 * varasm.cc (output_constant_pool_2): Ditto.
15215 2023-07-05 YunQiang Su <yunqiang.su@cipunited.com>
15217 * config/mips/mips.cc (mips_expand_block_move): don't expand for
15218 r6 with -mno-unaligned-access option if one or both of src and
15219 dest are unaligned. restruct: return directly if length is not const.
15220 (mips_block_move_straight): emit_move if ISA_HAS_UNALIGNED_ACCESS.
15222 2023-07-05 Jan Beulich <jbeulich@suse.com>
15225 * config/i386/sse.md: New splitters to simplify
15226 not;vec_duplicate as a singular vpternlog.
15227 (one_cmpl<mode>2): Allow broadcast for operand 1.
15228 (<mask_codefor>one_cmpl<mode>2<mask_name>): Likewise.
15230 2023-07-05 Jan Beulich <jbeulich@suse.com>
15233 * config/i386/sse.md: New splitters to simplify
15234 not;vec_duplicate;{ior,xor} as vec_duplicate;{iornot,xnor}.
15236 2023-07-05 Jan Beulich <jbeulich@suse.com>
15239 * config/i386/sse.md: Permit non-immediate operand 1 in AVX2
15240 form of splitter for PR target/100711.
15242 2023-07-05 Richard Biener <rguenther@suse.de>
15244 PR middle-end/110541
15245 * tree.def (VEC_PERM_EXPR): Adjust documentation to reflect
15248 2023-07-05 Jan Beulich <jbeulich@suse.com>
15251 * config/i386/sse.md (*andnot<mode>3): Add new alternatives
15252 for memory form operand 1.
15254 2023-07-05 Jan Beulich <jbeulich@suse.com>
15257 * config/i386/i386.cc (ix86_rtx_costs): Further special-case
15258 bitwise vector operations.
15259 * config/i386/sse.md (*iornot<mode>3): New insn.
15260 (*xnor<mode>3): Likewise.
15261 (*<nlogic><mode>3): Likewise.
15262 (andor): New code iterator.
15263 (nlogic): New code attribute.
15264 (ternlog_nlogic): Likewise.
15266 2023-07-05 Richard Biener <rguenther@suse.de>
15268 * tree-vect-stmts.cc (vect_mark_relevant): Fix typo.
15270 2023-07-05 yulong <shiyulong@iscas.ac.cn>
15272 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
15274 2023-07-05 yulong <shiyulong@iscas.ac.cn>
15276 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
15277 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
15278 (ADJUST_ALIGNMENT): Ditto.
15279 (RVV_TUPLE_PARTIAL_MODES): Ditto.
15280 (ADJUST_NUNITS): Ditto.
15281 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
15283 (vfloat16mf4x3_t): Ditto.
15284 (vfloat16mf4x4_t): Ditto.
15285 (vfloat16mf4x5_t): Ditto.
15286 (vfloat16mf4x6_t): Ditto.
15287 (vfloat16mf4x7_t): Ditto.
15288 (vfloat16mf4x8_t): Ditto.
15289 (vfloat16mf2x2_t): Ditto.
15290 (vfloat16mf2x3_t): Ditto.
15291 (vfloat16mf2x4_t): Ditto.
15292 (vfloat16mf2x5_t): Ditto.
15293 (vfloat16mf2x6_t): Ditto.
15294 (vfloat16mf2x7_t): Ditto.
15295 (vfloat16mf2x8_t): Ditto.
15296 (vfloat16m1x2_t): Ditto.
15297 (vfloat16m1x3_t): Ditto.
15298 (vfloat16m1x4_t): Ditto.
15299 (vfloat16m1x5_t): Ditto.
15300 (vfloat16m1x6_t): Ditto.
15301 (vfloat16m1x7_t): Ditto.
15302 (vfloat16m1x8_t): Ditto.
15303 (vfloat16m2x2_t): Ditto.
15304 (vfloat16m2x3_t): Ditto.
15305 (vfloat16m2x4_t): Ditto.
15306 (vfloat16m4x2_t): Ditto.
15307 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
15308 (vfloat16mf4x3_t): Ditto.
15309 (vfloat16mf4x4_t): Ditto.
15310 (vfloat16mf4x5_t): Ditto.
15311 (vfloat16mf4x6_t): Ditto.
15312 (vfloat16mf4x7_t): Ditto.
15313 (vfloat16mf4x8_t): Ditto.
15314 (vfloat16mf2x2_t): Ditto.
15315 (vfloat16mf2x3_t): Ditto.
15316 (vfloat16mf2x4_t): Ditto.
15317 (vfloat16mf2x5_t): Ditto.
15318 (vfloat16mf2x6_t): Ditto.
15319 (vfloat16mf2x7_t): Ditto.
15320 (vfloat16mf2x8_t): Ditto.
15321 (vfloat16m1x2_t): Ditto.
15322 (vfloat16m1x3_t): Ditto.
15323 (vfloat16m1x4_t): Ditto.
15324 (vfloat16m1x5_t): Ditto.
15325 (vfloat16m1x6_t): Ditto.
15326 (vfloat16m1x7_t): Ditto.
15327 (vfloat16m1x8_t): Ditto.
15328 (vfloat16m2x2_t): Ditto.
15329 (vfloat16m2x3_t): Ditto.
15330 (vfloat16m2x4_t): Ditto.
15331 (vfloat16m4x2_t): Ditto.
15332 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
15333 * config/riscv/riscv.md: New.
15334 * config/riscv/vector-iterators.md: New.
15336 2023-07-04 Andrew Pinski <apinski@marvell.com>
15338 PR tree-optimization/110487
15339 * match.pd (a !=/== CST1 ? CST2 : CST3): Always
15340 build a nonstandard integer and use that.
15342 2023-07-04 Andrew Pinski <apinski@marvell.com>
15344 * match.pd (a?-1:0): Cast type an integer type
15345 rather the type before the negative.
15346 (a?0:-1): Likewise.
15348 2023-07-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15350 * config/xtensa/xtensa.cc (machine_function, xtensa_expand_prologue):
15351 Change to use HARD_REG_BIT and its macros.
15352 * config/xtensa/xtensa.md
15353 (peephole2: regmove elimination during DFmode input reload):
15356 2023-07-04 Richard Biener <rguenther@suse.de>
15358 PR tree-optimization/110491
15359 * tree-ssa-phiopt.cc (match_simplify_replacement): Check
15360 whether the PHI args are possibly undefined before folding
15363 2023-07-04 Pan Li <pan2.li@intel.com>
15364 Thomas Schwinge <thomas@codesourcery.com>
15366 * lto-streamer-in.cc (lto_input_mode_table): Stream in the mode
15367 bits for machine mode table.
15368 * lto-streamer-out.cc (lto_write_mode_table): Stream out the
15369 HOST machine mode bits.
15370 * lto-streamer.h (struct lto_file_decl_data): New fields mode_bits.
15371 * tree-streamer.cc (streamer_mode_table): Take MAX_MACHINE_MODE
15373 * tree-streamer.h (streamer_mode_table): Ditto.
15374 (bp_pack_machine_mode): Take 1 << ceil_log2 (MAX_MACHINE_MODE)
15375 as the packing limit.
15376 (bp_unpack_machine_mode): Ditto with 'file_data->mode_bits'.
15378 2023-07-04 Thomas Schwinge <thomas@codesourcery.com>
15380 * lto-streamer.h (class lto_input_block): Capture
15381 'lto_file_decl_data *file_data' instead of just
15382 'unsigned char *mode_table'.
15383 * ipa-devirt.cc (ipa_odr_read_section): Adjust.
15384 * ipa-fnsummary.cc (inline_read_section): Likewise.
15385 * ipa-icf.cc (sem_item_optimizer::read_section): Likewise.
15386 * ipa-modref.cc (read_section): Likewise.
15387 * ipa-prop.cc (ipa_prop_read_section, read_replacements_section):
15389 * ipa-sra.cc (isra_read_summary_section): Likewise.
15390 * lto-cgraph.cc (input_cgraph_opt_section): Likewise.
15391 * lto-section-in.cc (lto_create_simple_input_block): Likewise.
15392 * lto-streamer-in.cc (lto_read_body_or_constructor)
15393 (lto_input_toplevel_asms): Likewise.
15394 * tree-streamer.h (bp_unpack_machine_mode): Likewise.
15396 2023-07-04 Richard Biener <rguenther@suse.de>
15398 * tree-ssa-phiopt.cc (pass_phiopt::execute): Mark SSA undefs.
15399 (empty_bb_or_one_feeding_into_p): Check for them.
15400 * tree-ssa.h (gimple_uses_undefined_value_p): Remove.
15401 * tree-ssa.cc (gimple_uses_undefined_value_p): Likewise.
15403 2023-07-04 Richard Biener <rguenther@suse.de>
15405 * tree-vect-loop.cc (vect_analyze_loop_costing): Remove
15406 check guarding scalar_niter underflow.
15408 2023-07-04 Hao Liu <hliu@os.amperecomputing.com>
15410 PR tree-optimization/110531
15411 * tree-vect-loop.cc (vect_analyze_loop_1): initialize
15412 slp_done_for_suggested_uf to false.
15414 2023-07-04 Richard Biener <rguenther@suse.de>
15416 PR tree-optimization/110228
15417 * tree-ssa-ifcombine.cc (pass_tree_ifcombine::execute):
15418 Mark SSA may-undefs.
15419 (bb_no_side_effects_p): Check stmt uses for undefs.
15421 2023-07-04 Richard Biener <rguenther@suse.de>
15423 PR tree-optimization/110436
15424 * tree-vect-stmts.cc (vect_mark_relevant): Expand dumping,
15425 force live but not relevant pattern stmts relevant.
15427 2023-07-04 Lili Cui <lili.cui@intel.com>
15429 * config/i386/i386.h: Add PTA_ENQCMD and PTA_UINTR to PTA_SIERRAFOREST.
15430 * doc/invoke.texi: Update new isa to march=sierraforest and grandridge.
15432 2023-07-04 Richard Biener <rguenther@suse.de>
15434 PR middle-end/110495
15435 * tree.h (TREE_OVERFLOW): Do not mention VECTOR_CSTs
15436 since we do not set TREE_OVERFLOW on those since the
15437 introduction of VL vectors.
15438 * match.pd (x +- CST +- CST): For VECTOR_CST do not look
15439 at TREE_OVERFLOW to determine validity of association.
15441 2023-07-04 Richard Biener <rguenther@suse.de>
15443 PR tree-optimization/110310
15444 * tree-vect-loop.cc (vect_determine_partial_vectors_and_peeling):
15445 Move costing part ...
15446 (vect_analyze_loop_costing): ... here. Integrate better
15447 estimate for epilogues from ...
15448 (vect_analyze_loop_2): Call vect_determine_partial_vectors_and_peeling
15449 with actual epilogue status.
15450 * tree-vect-loop-manip.cc (vect_do_peeling): ... here and
15451 avoid cancelling epilogue vectorization.
15452 (vect_update_epilogue_niters): Remove. No longer update
15453 epilogue LOOP_VINFO_NITERS.
15455 2023-07-04 Pan Li <pan2.li@intel.com>
15458 2023-07-03 Pan Li <pan2.li@intel.com>
15460 * config/riscv/vector.md: Fix typo.
15462 2023-07-04 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15464 * doc/md.texi: Add len_mask_gather_load/len_mask_scatter_store.
15465 * internal-fn.cc (expand_scatter_store_optab_fn): Ditto.
15466 (expand_gather_load_optab_fn): Ditto.
15467 (internal_load_fn_p): Ditto.
15468 (internal_store_fn_p): Ditto.
15469 (internal_gather_scatter_fn_p): Ditto.
15470 (internal_fn_len_index): Ditto.
15471 (internal_fn_mask_index): Ditto.
15472 (internal_fn_stored_value_index): Ditto.
15473 * internal-fn.def (LEN_MASK_GATHER_LOAD): Ditto.
15474 (LEN_MASK_SCATTER_STORE): Ditto.
15475 * optabs.def (OPTAB_CD): Ditto.
15477 2023-07-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15479 * config/riscv/riscv-vsetvl.cc
15480 (vector_insn_info::parse_insn): Add early break.
15482 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
15484 * config/cris/cris.md (CRIS_UNSPEC_SWAP_BITS): Remove.
15485 ("cris_swap_bits", "ctzsi2"): Use bitreverse instead.
15487 2023-07-04 Hans-Peter Nilsson <hp@axis.com>
15489 * dwarf2out.cc (mem_loc_descriptor): Handle BITREVERSE.
15491 2023-07-03 Christoph Müllner <christoph.muellner@vrull.eu>
15493 * common/config/riscv/riscv-common.cc: Add support for zvbb,
15494 zvbc, zvkg, zvkned, zvknha, zvknhb, zvksed, zvksh, zvkn,
15495 zvknc, zvkng, zvks, zvksc, zvksg, zvkt and the implied subsets.
15496 * config/riscv/arch-canonicalize: Add canonicalization info for
15497 zvkn, zvknc, zvkng, zvks, zvksc, zvksg.
15498 * config/riscv/riscv-opts.h (MASK_ZVBB): New macro.
15499 (MASK_ZVBC): Likewise.
15500 (TARGET_ZVBB): Likewise.
15501 (TARGET_ZVBC): Likewise.
15502 (MASK_ZVKG): Likewise.
15503 (MASK_ZVKNED): Likewise.
15504 (MASK_ZVKNHA): Likewise.
15505 (MASK_ZVKNHB): Likewise.
15506 (MASK_ZVKSED): Likewise.
15507 (MASK_ZVKSH): Likewise.
15508 (MASK_ZVKN): Likewise.
15509 (MASK_ZVKNC): Likewise.
15510 (MASK_ZVKNG): Likewise.
15511 (MASK_ZVKS): Likewise.
15512 (MASK_ZVKSC): Likewise.
15513 (MASK_ZVKSG): Likewise.
15514 (MASK_ZVKT): Likewise.
15515 (TARGET_ZVKG): Likewise.
15516 (TARGET_ZVKNED): Likewise.
15517 (TARGET_ZVKNHA): Likewise.
15518 (TARGET_ZVKNHB): Likewise.
15519 (TARGET_ZVKSED): Likewise.
15520 (TARGET_ZVKSH): Likewise.
15521 (TARGET_ZVKN): Likewise.
15522 (TARGET_ZVKNC): Likewise.
15523 (TARGET_ZVKNG): Likewise.
15524 (TARGET_ZVKS): Likewise.
15525 (TARGET_ZVKSC): Likewise.
15526 (TARGET_ZVKSG): Likewise.
15527 (TARGET_ZVKT): Likewise.
15528 * config/riscv/riscv.opt: Introduction of riscv_zv{b,k}_subext.
15530 2023-07-03 Andrew Pinski <apinski@marvell.com>
15532 PR middle-end/110510
15533 * except.h (struct eh_landing_pad_d): Add chain_next GTY.
15535 2023-07-03 Iain Sandoe <iain@sandoe.co.uk>
15537 * config/darwin.h: Avoid duplicate multiply_defined specs on
15538 earlier Darwin versions with shared libgcc.
15540 2023-07-03 Uros Bizjak <ubizjak@gmail.com>
15542 * tree.h (tree_int_cst_equal): Change return type from int to bool.
15543 (operand_equal_for_phi_arg_p): Ditto.
15544 (tree_map_base_marked_p): Ditto.
15545 * tree.cc (contains_placeholder_p): Update function body
15546 for bool return type.
15547 (type_cache_hasher::equal): Ditto.
15548 (tree_map_base_hash): Change return type
15549 from int to void and adjust function body accordingly.
15550 (tree_int_cst_equal): Ditto.
15551 (operand_equal_for_phi_arg_p): Ditto.
15552 (get_narrower): Change "first" variable to bool.
15553 (cl_option_hasher::equal): Update function body for bool return type.
15554 * ggc.h (ggc_set_mark): Change return type from int to bool.
15555 (ggc_marked_p): Ditto.
15556 * ggc-page.cc (gt_ggc_mx): Change return type
15557 from int to void and adjust function body accordingly.
15558 (ggc_set_mark): Ditto.
15560 2023-07-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
15562 * config/riscv/autovec.md: Change order of
15563 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15564 * config/riscv/riscv-v.cc (expand_load_store): Ditto.
15565 * doc/md.texi: Ditto.
15566 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Ditto.
15567 * internal-fn.cc (len_maskload_direct): Ditto.
15568 (len_maskstore_direct): Ditto.
15569 (add_len_and_mask_args): New function.
15570 (expand_partial_load_optab_fn): Change order of
15571 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15572 (expand_partial_store_optab_fn): Ditto.
15573 (internal_fn_len_index): New function.
15574 (internal_fn_mask_index): Change order of
15575 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15576 (internal_fn_stored_value_index): Ditto.
15577 (internal_len_load_store_bias): Ditto.
15578 * internal-fn.h (internal_fn_len_index): New function.
15579 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Change order of
15580 LEN_MASK_LOAD/LEN_MASK_STORE/LEN_LOAD/LEN_STORE arguments.
15581 * tree-vect-stmts.cc (vectorizable_store): Ditto.
15582 (vectorizable_load): Ditto.
15584 2023-07-03 Gaius Mulley <gaiusmod2@gmail.com>
15587 * doc/gm2.texi (Semantic checking): Include examples using
15588 -Wuninit-variable-checking.
15590 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15592 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
15593 (*single_widen_fnma<mode>): Ditto.
15594 (*double_widen_fms<mode>): Ditto.
15595 (*single_widen_fms<mode>): Ditto.
15596 (*double_widen_fnms<mode>): Ditto.
15597 (*single_widen_fnms<mode>): Ditto.
15599 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15601 * config/riscv/autovec-opt.md (@pred_single_widen_mul<any_extend:su><mode>): Change "@"
15602 into "*" in pattern name which simplifies build files.
15603 (*pred_single_widen_mul<any_extend:su><mode>): Ditto.
15604 (*pred_single_widen_mul<mode>): New pattern.
15606 2023-07-03 Richard Sandiford <richard.sandiford@arm.com>
15608 * config/aarch64/aarch64-simd.md (vec_extract<mode><Vhalf>): Expect
15609 the index to be 0 or 1.
15611 2023-07-03 Lehua Ding <lehua.ding@rivai.ai>
15614 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15616 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
15617 (*single_widen_fnma<mode>): Ditto.
15618 (*double_widen_fms<mode>): Ditto.
15619 (*single_widen_fms<mode>): Ditto.
15620 (*double_widen_fnms<mode>): Ditto.
15621 (*single_widen_fnms<mode>): Ditto.
15623 2023-07-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
15625 * config/riscv/autovec-opt.md (*double_widen_fnma<mode>): New pattern.
15626 (*single_widen_fnma<mode>): Ditto.
15627 (*double_widen_fms<mode>): Ditto.
15628 (*single_widen_fms<mode>): Ditto.
15629 (*double_widen_fnms<mode>): Ditto.
15630 (*single_widen_fnms<mode>): Ditto.
15632 2023-07-03 Pan Li <pan2.li@intel.com>
15634 * config/riscv/vector.md: Fix typo.
15636 2023-07-03 Richard Biener <rguenther@suse.de>
15638 PR tree-optimization/110506
15639 * tree-vect-patterns.cc (vect_recog_rotate_pattern): Re-order
15640 TYPE_PRECISION access with INTEGRAL_TYPE_P check.
15642 2023-07-03 Richard Biener <rguenther@suse.de>
15644 PR tree-optimization/110506
15645 * tree-ssa-ccp.cc (get_value_for_expr): Check for integral
15646 type before relying on TYPE_PRECISION to produce a nonzero mask.
15648 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15650 * config/mips/mips.md(*and<mode>3_mips16): Generates
15651 ZEB/ZEH instructions.
15653 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15655 * config/mips/mips.cc(mips_9bit_offset_address_p): Restrict the
15656 address register to M16_REGS for MIPS16.
15657 (BUILTIN_AVAIL_MIPS16E2): Defined a new macro.
15658 (AVAIL_MIPS16E2_OR_NON_MIPS16): Same as above.
15659 (AVAIL_NON_MIPS16 (cache..)): Update to
15660 AVAIL_MIPS16E2_OR_NON_MIPS16.
15661 * config/mips/mips.h (ISA_HAS_CACHE): Add clause for ISA_HAS_MIPS16E2.
15662 * config/mips/mips.md (mips_cache): Mark as extended MIPS16.
15664 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15666 * config/mips/mips.h(ISA_HAS_9BIT_DISPLACEMENT): Add clause
15667 for ISA_HAS_MIPS16E2.
15668 (ISA_HAS_SYNC): Same as above.
15669 (ISA_HAS_LL_SC): Same as above.
15671 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15673 * config/mips/mips.cc(mips_expand_ins_as_unaligned_store):
15674 Add logics for generating instruction.
15675 * config/mips/mips.h(ISA_HAS_LWL_LWR): Add clause for ISA_HAS_MIPS16E2.
15676 * config/mips/mips.md(mov_<load>l): Generates instructions.
15677 (mov_<load>r): Same as above.
15678 (mov_<store>l): Adjusted for the conditions above.
15679 (mov_<store>r): Same as above.
15680 (mov_<store>l_mips16e2): Add machine description for `define_insn mov_<store>l_mips16e2`.
15681 (mov_<store>r_mips16e2): Add machine description for `define_insn mov_<store>r_mips16e2`.
15683 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15685 * config/mips/mips.cc(mips_symbol_insns_1): Generates LUI instruction.
15686 (mips_const_insns): Same as above.
15687 (mips_output_move): Same as above.
15688 (mips_output_function_prologue): Same as above.
15689 * config/mips/mips.md: Same as above
15691 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15693 * config/mips/constraints.md(Yz): New constraints for mips16e2.
15694 * config/mips/mips-protos.h(mips_bit_clear_p): Declared new function.
15695 (mips_bit_clear_info): Same as above.
15696 * config/mips/mips.cc(mips_bit_clear_info): New function for
15697 generating instructions.
15698 (mips_bit_clear_p): Same as above.
15699 * config/mips/mips.h(ISA_HAS_EXT_INS): Add clause for ISA_HAS_MIPS16E2.
15700 * config/mips/mips.md(extended_mips16): Generates EXT and INS instructions.
15701 (*and<mode>3): Generates INS instruction.
15702 (*and<mode>3_mips16): Generates EXT, INS and ANDI instructions.
15703 (ior<mode>3): Add logics for ORI instruction.
15704 (*ior<mode>3_mips16_asmacro): Generates ORI instrucion.
15705 (*ior<mode>3_mips16): Add logics for XORI instruction.
15706 (*xor<mode>3_mips16): Generates XORI instrucion.
15707 (*extzv<mode>): Add logics for EXT instruction.
15708 (*insv<mode>): Add logics for INS instruction.
15709 * config/mips/predicates.md(bit_clear_operand): New predicate for
15710 generating bitwise instructions.
15711 (and_reg_operand): Add logics for generating bitwise instructions.
15713 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15715 * config/mips/mips.cc(mips_regno_mode_ok_for_base_p): Generate instructions
15716 that uses global pointer register.
15717 (mips16_unextended_reference_p): Same as above.
15718 (mips_pic_base_register): Same as above.
15719 (mips_init_relocs): Same as above.
15720 * config/mips/mips.h(MIPS16_GP_LOADS): Defined a new macro.
15721 (GLOBAL_POINTER_REGNUM): Moved to machine description `mips.md`.
15722 * config/mips/mips.md(GLOBAL_POINTER_REGNUM): Moved to here from above.
15723 (*lowsi_mips16_gp):New `define_insn *low<mode>_mips16`.
15725 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15727 * config/mips/mips.h(ISA_HAS_CONDMOVE): Add condition for ISA_HAS_MIPS16E2.
15728 * config/mips/mips.md(*mov<GPR:mode>_on_<MOVECC:mode>): Add logics for MOVx insts.
15729 (*mov<GPR:mode>_on_<MOVECC:mode>_mips16e2): Generate MOVx instruction.
15730 (*mov<GPR:mode>_on_<GPR2:mode>_ne): Add logics for MOVx insts.
15731 (*mov<GPR:mode>_on_<GPR2:mode>_ne_mips16e2): Generate MOVx instruction.
15732 * config/mips/predicates.md(reg_or_0_operand_mips16e2): New predicate for MOVx insts.
15734 2023-07-03 Jie Mei <jie.mei@oss.cipunited.com>
15736 * config/mips/mips.cc(mips_file_start): Add mips16e2 info
15738 * config/mips/mips.h(__mips_mips16e2): Defined a new
15740 (ISA_HAS_MIPS16E2): Defined a new macro.
15741 (ASM_SPEC): Pass mmips16e2 to the assembler.
15742 * config/mips/mips.opt: Add -m(no-)mips16e2 option.
15743 * config/mips/predicates.md: Add clause for TARGET_MIPS16E2.
15744 * doc/invoke.texi: Add -m(no-)mips16e2 option..
15746 2023-07-02 Jakub Jelinek <jakub@redhat.com>
15748 PR tree-optimization/110508
15749 * tree-ssa-math-opts.cc (match_uaddc_usubc): Only replace re2 with
15750 REALPART_EXPR opf nlhs if re2 is non-NULL.
15752 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15754 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
15756 * config/xtensa/xtensa.md (*xtensa_clamps):
15757 Add TARGET_MINMAX to the condition.
15759 2023-07-02 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
15761 * config/xtensa/xtensa.md (*eqne_INT_MIN):
15762 Add missing ":SI" to the match_operator.
15764 2023-07-02 Iain Sandoe <iain@sandoe.co.uk>
15767 * config/darwin.opt: Add fconstant-cfstrings alias to
15768 mconstant-cfstrings.
15769 * doc/invoke.texi: Amend invocation descriptions to reflect
15770 that the fconstant-cfstrings is a target-option alias and to
15771 add the missing mconstant-cfstrings option description to the
15774 2023-07-01 Jan Hubicka <jh@suse.cz>
15776 * tree-cfg.cc (gimple_duplicate_sese_region): Add elliminated_edge
15777 parmaeter; update profile.
15778 * tree-cfg.h (gimple_duplicate_sese_region): Update prototype.
15779 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Rename to ...
15780 (static_loop_exit): ... this; return the edge to be elliminated.
15781 (ch_base::copy_headers): Handle profile updating for eliminated exits.
15783 2023-07-01 Roger Sayle <roger@nextmovesoftware.com>
15785 * config/i386/i386-features.cc (compute_convert_gain): Provide
15786 gains/costs for ROTATE and ROTATERT (by an integer constant).
15787 (general_scalar_chain::convert_rotate): New helper function to
15788 convert a DImode or SImode rotation by an integer constant into
15790 (general_scalar_chain::convert_insn): Call the new convert_rotate
15791 for ROTATE and ROTATERT.
15792 (general_scalar_to_vector_candidate_p): Consider ROTATE and
15793 ROTATERT to be candidates if the second operand is an integer
15794 constant, valid for a rotation (or shift) in the given mode.
15795 * config/i386/i386-features.h (general_scalar_chain): Add new
15796 helper method convert_rotate.
15798 2023-07-01 Jan Hubicka <jh@suse.cz>
15800 PR tree-optimization/103680
15801 * cfg.cc (update_bb_profile_for_threading): Fix profile update;
15802 make message clearer.
15804 2023-06-30 Qing Zhao <qing.zhao@oracle.com>
15806 PR tree-optimization/101832
15807 * tree-object-size.cc (addr_object_size): Handle structure/union type
15808 when it has flexible size.
15810 2023-06-30 Eric Botcazou <ebotcazou@adacore.com>
15812 * gimple-fold.cc (fold_array_ctor_reference): Fix head comment.
15813 (fold_nonarray_ctor_reference): Likewise. Specifically deal
15814 with integral bit-fields.
15815 (fold_ctor_reference): Make sure that the constructor uses the
15816 native storage order.
15818 2023-06-30 Jan Hubicka <jh@suse.cz>
15820 PR middle-end/109849
15821 * predict.cc (estimate_bb_frequencies): Turn to static function.
15822 (expr_expected_value_1): Fix handling of binary expressions with
15824 * predict.def (PRED_MALLOC_NONNULL): Move later in the priority queue.
15825 (PRED_BUILTIN_EXPECT_WITH_PROBABILITY): Move to almost top of the priority
15827 * predict.h (estimate_bb_frequencies): No longer declare it.
15829 2023-06-30 Uros Bizjak <ubizjak@gmail.com>
15831 * fold-const.h (multiple_of_p): Change return type from int to bool.
15832 * fold-const.cc (split_tree): Change negl_p, neg_litp_p,
15833 neg_conp_p and neg_var_p variables to bool.
15834 (const_binop): Change sat_p variable to bool.
15835 (merge_ranges): Change no_overlap variable to bool.
15836 (extract_muldiv_1): Change same_p variable to bool.
15837 (tree_swap_operands_p): Update function body for bool return type.
15838 (fold_truth_andor): Change commutative variable to bool.
15839 (multiple_of_p): Change return type
15840 from int to void and adjust function body accordingly.
15841 * optabs.h (expand_twoval_unop): Change return type from int to bool.
15842 (expand_twoval_binop): Ditto.
15843 (can_compare_p): Ditto.
15844 (have_add2_insn): Ditto.
15845 (have_addptr3_insn): Ditto.
15846 (have_sub2_insn): Ditto.
15847 (have_insn_for): Ditto.
15848 * optabs.cc (add_equal_note): Ditto.
15849 (widen_operand): Change no_extend argument from int to bool.
15850 (expand_binop): Ditto.
15851 (expand_twoval_unop): Change return type
15852 from int to void and adjust function body accordingly.
15853 (expand_twoval_binop): Ditto.
15854 (can_compare_p): Ditto.
15855 (have_add2_insn): Ditto.
15856 (have_addptr3_insn): Ditto.
15857 (have_sub2_insn): Ditto.
15858 (have_insn_for): Ditto.
15860 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15862 * config/aarch64/aarch64-simd.md
15863 (vec_widen_<su>abdl_lo_<mode>, vec_widen_<su>abdl_hi_<mode>):
15864 Expansions for abd vec widen optabs.
15865 (aarch64_<su>abdl<mode>_insn): VQW based abdl RTL.
15866 * config/aarch64/iterators.md (USMAX_EXT): Code attributes
15867 that give the appropriate extend RTL for the max RTL.
15869 2023-06-30 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
15871 * internal-fn.def (VEC_WIDEN_ABD): New internal hilo optab.
15872 * optabs.def (vec_widen_sabd_optab,
15873 vec_widen_sabd_hi_optab, vec_widen_sabd_lo_optab,
15874 vec_widen_sabd_odd_even, vec_widen_sabd_even_optab,
15875 vec_widen_uabd_optab,
15876 vec_widen_uabd_hi_optab, vec_widen_uabd_lo_optab,
15877 vec_widen_uabd_odd_even, vec_widen_uabd_even_optab):
15879 * doc/md.texi: Document them.
15880 * tree-vect-patterns.cc (vect_recog_abd_pattern): Update to
15881 to build a VEC_WIDEN_ABD call if the input precision is smaller
15882 than the precision of the output.
15883 (vect_recog_widen_abd_pattern): Should an ABD expression be
15884 found preceeding an extension, replace the two with a
15887 2023-06-30 Pan Li <pan2.li@intel.com>
15889 * config/riscv/vector.md: Refactor the common condition.
15891 2023-06-30 Richard Biener <rguenther@suse.de>
15893 PR tree-optimization/110496
15894 * gimple-ssa-store-merging.cc (find_bswap_or_nop_1): Re-order
15895 verifying and TYPE_PRECISION query for the BIT_FIELD_REF case.
15897 2023-06-30 Richard Biener <rguenther@suse.de>
15899 PR middle-end/110489
15900 * statistics.cc (curr_statistics_hash): Add argument
15901 indicating whether we should allocate the hash.
15902 (statistics_fini_pass): If the hash isn't allocated
15903 only print the summary header.
15905 2023-06-30 Segher Boessenkool <segher@kernel.crashing.org>
15906 Thomas Schwinge <thomas@codesourcery.com>
15908 * config/nvptx/nvptx.cc (TARGET_LRA_P): Remove.
15910 2023-06-30 Jovan Dmitrović <jovan.dmitrovic@syrmia.com>
15913 * config/mips/mips.cc (mips_function_arg_alignment): Returns
15914 the alignment of function argument. In case of typedef type,
15915 it returns the aligment of the aliased type.
15916 (mips_function_arg_boundary): Relocated calculation of the
15917 aligment of function arguments.
15919 2023-06-29 Jan Hubicka <jh@suse.cz>
15921 PR tree-optimization/109849
15922 * ipa-fnsummary.cc (decompose_param_expr): Skip
15923 functions returning its parameter.
15924 (set_cond_stmt_execution_predicate): Return early
15925 if predicate was constructed.
15927 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
15930 * doc/extend.texi: Document GCC extension on a structure containing
15931 a flexible array member to be a member of another structure.
15933 2023-06-29 Qing Zhao <qing.zhao@oracle.com>
15935 * print-tree.cc (print_node): Print new bit type_include_flexarray.
15936 * tree-core.h (struct tree_type_common): Use bit no_named_args_stdarg_p
15937 as type_include_flexarray for RECORD_TYPE or UNION_TYPE.
15938 * tree-streamer-in.cc (unpack_ts_type_common_value_fields): Stream
15939 in bit no_named_args_stdarg_p properly for its corresponding type.
15940 * tree-streamer-out.cc (pack_ts_type_common_value_fields): Stream
15941 out bit no_named_args_stdarg_p properly for its corresponding type.
15942 * tree.h (TYPE_INCLUDES_FLEXARRAY): New macro TYPE_INCLUDES_FLEXARRAY.
15944 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
15946 * tree-vrp.cc (maybe_set_nonzero_bits): Move from here...
15947 * tree-ssa-dom.cc (maybe_set_nonzero_bits): ...to here.
15948 * tree-vrp.h (maybe_set_nonzero_bits): Remove.
15950 2023-06-29 Aldy Hernandez <aldyh@redhat.com>
15952 * value-range.cc (frange::set): Do not call verify_range.
15953 (frange::normalize_kind): Verify range.
15954 (frange::union_nans): Do not call verify_range.
15955 (frange::union_): Same.
15956 (frange::intersect): Same.
15957 (irange::irange_single_pair_union): Call normalize_kind if
15959 (irange::union_): Same.
15960 (irange::intersect): Same.
15961 (irange::set_range_from_nonzero_bits): Verify range.
15962 (irange::set_nonzero_bits): Call normalize_kind if necessary.
15963 (irange::get_nonzero_bits): Tweak comment.
15964 (irange::intersect_nonzero_bits): Call normalize_kind if
15966 (irange::union_nonzero_bits): Same.
15967 * value-range.h (irange::normalize_kind): Verify range.
15969 2023-06-29 Uros Bizjak <ubizjak@gmail.com>
15971 * cselib.h (rtx_equal_for_cselib_1):
15972 Change return type from int to bool.
15973 (references_value_p): Ditto.
15974 (rtx_equal_for_cselib_p): Ditto.
15975 * expr.h (can_store_by_pieces): Ditto.
15976 (try_casesi): Ditto.
15977 (try_tablejump): Ditto.
15978 (safe_from_p): Ditto.
15979 * sbitmap.h (bitmap_equal_p): Ditto.
15980 * cselib.cc (references_value_p): Change return type
15981 from int to void and adjust function body accordingly.
15982 (rtx_equal_for_cselib_1): Ditto.
15983 * expr.cc (is_aligning_offset): Ditto.
15984 (can_store_by_pieces): Ditto.
15985 (mostly_zeros_p): Ditto.
15986 (all_zeros_p): Ditto.
15987 (safe_from_p): Ditto.
15988 (is_aligning_offset): Ditto.
15989 (try_casesi): Ditto.
15990 (try_tablejump): Ditto.
15991 (store_constructor): Change "need_to_clear" and
15992 "const_bounds_p" variables to bool.
15993 * sbitmap.cc (bitmap_equal_p): Change return type from int to bool.
15995 2023-06-29 Robin Dapp <rdapp@ventanamicro.com>
15997 * tree-ssa-math-opts.cc (divmod_candidate_p): Use
16000 2023-06-29 Richard Biener <rguenther@suse.de>
16002 PR tree-optimization/110460
16003 * tree-vect-stmts.cc (get_related_vectype_for_scalar_type):
16004 Only allow integral, pointer and scalar float type scalar_type.
16006 2023-06-29 Lili Cui <lili.cui@intel.com>
16008 PR tree-optimization/110148
16009 * tree-ssa-reassoc.cc (rewrite_expr_tree_parallel): Handle loop-carried
16010 ops in this function.
16012 2023-06-29 Richard Biener <rguenther@suse.de>
16014 PR middle-end/110452
16015 * expr.cc (store_constructor): Handle uniform boolean
16016 vectors with integer mode specially.
16018 2023-06-29 Richard Biener <rguenther@suse.de>
16020 PR middle-end/110461
16021 * match.pd (bitop (convert@2 @0) (convert?@3 @1)): Disable
16024 2023-06-29 Richard Sandiford <richard.sandiford@arm.com>
16026 * vec.h (gt_pch_nx): Add overloads for va_gc_atomic.
16027 (array_slice): Relax va_gc constructor to handle all vectors
16028 with a vl_embed layout.
16030 2023-06-29 Pan Li <pan2.li@intel.com>
16032 * config/riscv/riscv.cc (riscv_emit_mode_set): Add emit for FRM.
16033 (riscv_mode_needed): Likewise.
16034 (riscv_entity_mode_after): Likewise.
16035 (riscv_mode_after): Likewise.
16036 (riscv_mode_entry): Likewise.
16037 (riscv_mode_exit): Likewise.
16038 * config/riscv/riscv.h (NUM_MODES_FOR_MODE_SWITCHING): Add number
16040 * config/riscv/riscv.md: Add FRM register.
16041 * config/riscv/vector-iterators.md: Add FRM type.
16042 * config/riscv/vector.md (frm_mode): Define new attr for FRM mode.
16043 (fsrm): Define new insn for fsrm instruction.
16045 2023-06-29 Pan Li <pan2.li@intel.com>
16047 * config/riscv/riscv-protos.h (enum floating_point_rounding_mode):
16048 Add macro for static frm min and max.
16049 * config/riscv/riscv-vector-builtins-bases.cc
16050 (class binop_frm): New class for floating-point with frm.
16051 (BASE): Add vfadd for frm.
16052 * config/riscv/riscv-vector-builtins-bases.h: Likewise.
16053 * config/riscv/riscv-vector-builtins-functions.def
16054 (vfadd_frm): Likewise.
16055 * config/riscv/riscv-vector-builtins-shapes.cc
16056 (struct alu_frm_def): New struct for alu with frm.
16057 (SHAPE): Add alu with frm.
16058 * config/riscv/riscv-vector-builtins-shapes.h: Likewise.
16059 * config/riscv/riscv-vector-builtins.cc
16060 (function_checker::report_out_of_range_and_not): New function
16061 for report out of range and not val.
16062 (function_checker::require_immediate_range_or): New function
16063 for checking in range or one val.
16064 * config/riscv/riscv-vector-builtins.h: Add function decl.
16066 2023-06-29 Cui, Lili <lili.cui@intel.com>
16068 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove model value 0xa8
16069 from Rocketlake, move model value 0xbf from Alderlake to Raptorlake.
16071 2023-06-28 Hans-Peter Nilsson <hp@axis.com>
16074 * config/cris/cris.cc (cris_postdbr_cmpelim): Don't apply PATTERN
16075 to insn before validating it.
16077 2023-06-28 Jan Hubicka <jh@suse.cz>
16079 PR middle-end/110334
16080 * ipa-fnsummary.h (ipa_fn_summary): Add
16081 safe_to_inline_to_always_inline.
16082 * ipa-inline.cc (can_early_inline_edge_p): ICE
16083 if SSA is not built; do cycle checking for
16084 always_inline functions.
16085 (inline_always_inline_functions): Be recrusive;
16086 watch for cycles; do not updat overall summary.
16087 (early_inliner): Do not give up on always_inlines.
16088 * ipa-utils.cc (ipa_reverse_postorder): Do not skip
16091 2023-06-28 Uros Bizjak <ubizjak@gmail.com>
16093 * output.h (leaf_function_p): Change return type from int to bool.
16094 (final_forward_branch_p): Ditto.
16095 (only_leaf_regs_used): Ditto.
16096 (maybe_assemble_visibility): Ditto.
16097 * varasm.h (supports_one_only): Ditto.
16098 * rtl.h (compute_alignments): Change return type from int to void.
16099 * final.cc (app_on): Change return type from int to bool.
16100 (compute_alignments): Change return type from int to void
16101 and adjust function body accordingly.
16102 (shorten_branches): Change "something_changed" variable
16103 type from int to bool.
16104 (leaf_function_p): Change return type from int to bool
16105 and adjust function body accordingly.
16106 (final_forward_branch_p): Ditto.
16107 (only_leaf_regs_used): Ditto.
16108 * varasm.cc (contains_pointers_p): Change return type from
16109 int to bool and adjust function body accordingly.
16110 (compare_constant): Ditto.
16111 (maybe_assemble_visibility): Ditto.
16112 (supports_one_only): Ditto.
16114 2023-06-28 Manolis Tsamis <manolis.tsamis@vrull.eu>
16117 * regcprop.cc (maybe_mode_change): Check stack_pointer_rtx mode.
16118 (maybe_copy_reg_attrs): New function.
16119 (find_oldest_value_reg): Use maybe_copy_reg_attrs.
16120 (copyprop_hardreg_forward_1): Ditto.
16122 2023-06-28 Richard Biener <rguenther@suse.de>
16124 PR tree-optimization/110434
16125 * tree-nrv.cc (pass_nrv::execute): Remove CLOBBERs of
16126 VAR we replace with <retval>.
16128 2023-06-28 Richard Biener <rguenther@suse.de>
16130 PR tree-optimization/110451
16131 * tree-ssa-loop-im.cc (stmt_cost): [VEC_]COND_EXPR and
16132 tcc_comparison are expensive.
16134 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
16136 * config/i386/i386-expand.cc (ix86_expand_branch): Also use ptest
16137 for TImode comparisons on 32-bit architectures.
16138 * config/i386/i386.md (cbranch<mode>4): Change from SDWIM to
16139 SWIM1248x to exclude/avoid TImode being conditional on -m64.
16140 (cbranchti4): New define_expand for TImode on both TARGET_64BIT
16141 and/or with TARGET_SSE4_1.
16142 * config/i386/predicates.md (ix86_timode_comparison_operator):
16143 New predicate that depends upon TARGET_64BIT.
16144 (ix86_timode_comparison_operand): Likewise.
16146 2023-06-28 Roger Sayle <roger@nextmovesoftware.com>
16149 * config/i386/i386-features.cc (compute_convert_gain): Provide
16150 more accurate gains for conversion of scalar comparisons to
16153 2023-06-28 Richard Biener <rguenther@suse.de>
16155 PR tree-optimization/110443
16156 * tree-vect-slp.cc (vect_build_slp_tree_1): Reject non-grouped
16159 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
16161 * config/rs6000/rs6000.md (peephole2 for compare_and_move): New.
16162 (peephole2 for move_and_compare): New.
16163 (mode_iterator WORD): New. Set the mode to SI/DImode by
16165 (*mov<mode>_internal2): Change the mode iterator from P to WORD.
16166 (split pattern for compare_and_move): Likewise.
16168 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16170 * config/riscv/autovec-opt.md (*double_widen_fma<mode>): New pattern.
16171 (*single_widen_fma<mode>): Ditto.
16173 2023-06-28 Haochen Gui <guihaoc@gcc.gnu.org>
16176 * config/rs6000/altivec.md (*altivec_vupkhs<VU_char>_direct): Rename
16178 (altivec_vupkhs<VU_char>_direct): ...this.
16179 * config/rs6000/predicates.md (vspltisw_vupkhsw_constant_split): New
16180 predicate to test if a constant can be loaded with vspltisw and
16182 (easy_vector_constant): Call vspltisw_vupkhsw_constant_p to Check if
16183 a vector constant can be synthesized with a vspltisw and a vupkhsw.
16184 * config/rs6000/rs6000-protos.h (vspltisw_vupkhsw_constant_p):
16186 * config/rs6000/rs6000.cc (vspltisw_vupkhsw_constant_p): New
16187 function to return true if OP mode is V2DI and can be synthesized
16188 with vupkhsw and vspltisw.
16189 * config/rs6000/vsx.md (*vspltisw_v2di_split): New insn to load up
16190 constants with vspltisw and vupkhsw.
16192 2023-06-28 Jan Hubicka <jh@suse.cz>
16194 PR tree-optimization/110377
16195 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Pass statement to
16197 (ipa_analyze_node): Enable ranger.
16199 2023-06-28 Richard Biener <rguenther@suse.de>
16201 * tree.h (TYPE_PRECISION): Check for non-VECTOR_TYPE.
16202 (TYPE_PRECISION_RAW): Provide raw access to the precision
16204 * tree.cc (verify_type_variant): Compare TYPE_PRECISION_RAW.
16205 (gimple_canonical_types_compatible_p): Likewise.
16206 * tree-streamer-out.cc (pack_ts_type_common_value_fields):
16207 Stream TYPE_PRECISION_RAW.
16208 * tree-streamer-in.cc (unpack_ts_type_common_value_fields):
16210 * lto-streamer-out.cc (hash_tree): Hash TYPE_PRECISION_RAW.
16212 2023-06-28 Alexandre Oliva <oliva@adacore.com>
16214 * doc/extend.texi (zero-call-used-regs): Document leafy and
16216 * flag-types.h (zero_regs_flags): Add LEAFY_MODE, as well as
16217 LEAFY and variants.
16218 * function.cc (gen_call_ued_regs_seq): Set only_used for leaf
16219 functions in leafy mode.
16220 * opts.cc (zero_call_used_regs_opts): Add leafy and variants.
16222 2023-06-28 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16224 * config/riscv/riscv-vector-builtins-bases.cc: Adapt expand.
16225 * config/riscv/vector.md (@pred_single_widen_<plus_minus:optab><mode>):
16227 (@pred_single_widen_add<mode>): New pattern.
16228 (@pred_single_widen_sub<mode>): New pattern.
16230 2023-06-28 liuhongt <hongtao.liu@intel.com>
16232 * config/i386/i386.cc (ix86_invalid_conversion): New function.
16233 (TARGET_INVALID_CONVERSION): Define as
16234 ix86_invalid_conversion.
16236 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16238 * config/riscv/autovec.md (<optab><vnconvert><mode>2): New
16240 (<float_cvt><vnconvert><mode>2): Ditto.
16241 (<optab><mode><vnconvert>2): Ditto.
16242 (<float_cvt><mode><vnconvert>2): Ditto.
16243 * config/riscv/vector-iterators.md: Add vnconvert.
16245 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16247 * config/riscv/autovec.md (extend<v_double_trunc><mode>2): New
16249 (extend<v_quad_trunc><mode>2): Ditto.
16250 (trunc<mode><v_double_trunc>2): Ditto.
16251 (trunc<mode><v_quad_trunc>2): Ditto.
16252 * config/riscv/vector-iterators.md: Add VQEXTF and HF to
16253 V_QUAD_TRUNC and v_quad_trunc.
16255 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16257 * config/riscv/autovec.md (<float_cvt><vconvert><mode>2): New
16260 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16262 * config/riscv/autovec.md (copysign<mode>3): Add expander.
16263 (xorsign<mode>3): Ditto.
16264 * config/riscv/riscv-vector-builtins-bases.cc (class vfsgnjn):
16266 * config/riscv/vector-iterators.md (copysign): Remove ncopysign.
16270 * config/riscv/vector.md (@pred_ncopysign<mode>): Split off.
16271 (@pred_ncopysign<mode>_scalar): Ditto.
16273 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16275 * config/riscv/autovec.md: VF_AUTO -> VF.
16276 * config/riscv/vector-iterators.md: Introduce VF_ZVFHMIN,
16277 VWEXTF_ZVFHMIN and use TARGET_ZVFH in VWCONVERTI, VHF and
16279 * config/riscv/vector.md: Use new iterators.
16281 2023-06-27 Robin Dapp <rdapp@ventanamicro.com>
16283 * match.pd: Use element_mode and check if target supports
16284 operation with new type.
16286 2023-06-27 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16288 * config/aarch64/aarch64-sve-builtins-base.cc
16289 (svdupq_impl::fold_nonconst_dupq): New method.
16290 (svdupq_impl::fold): Call fold_nonconst_dupq.
16292 2023-06-27 Andrew Pinski <apinski@marvell.com>
16294 PR middle-end/110420
16295 PR middle-end/103979
16296 PR middle-end/98619
16297 * gimplify.cc (gimplify_asm_expr): Mark asm with labels as volatile.
16299 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16301 * ipa-cp.cc (decide_whether_version_node): Adjust comment.
16302 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Adjust
16304 (set_switch_stmt_execution_predicate): Same.
16305 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
16307 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16309 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Adjust for use with
16310 ipa_vr instead of value_range.
16313 (ipa_get_value_range): Same.
16314 * value-range.cc (gt_pch_nx): Move to ipa-prop.cc and adjust for
16318 2023-06-27 Aldy Hernandez <aldyh@redhat.com>
16320 * ipa-cp.cc (ipa_vr_operation_and_type_effects): New.
16321 * ipa-prop.cc (ipa_get_value_range): Adjust for ipa_vr.
16322 (ipa_set_jfunc_vr): Take a range.
16323 (ipa_compute_jump_functions_for_edge): Pass range to
16325 (ipa_write_jump_function): Call streamer write helper.
16326 (ipa_read_jump_function): Call streamer read helper.
16327 * ipa-prop.h (class ipa_vr): Change m_vr to an ipa_vr.
16329 2023-06-27 Richard Sandiford <richard.sandiford@arm.com>
16331 * gengtype-parse.cc (consume_until_comma_or_eos): Parse "= { ... }"
16332 as a probable initializer rather than a probable complete statement.
16334 2023-06-27 Richard Biener <rguenther@suse.de>
16336 PR tree-optimization/96208
16337 * tree-vect-slp.cc (vect_build_slp_tree_1): Allow
16338 a non-grouped load if it is the same for all lanes.
16339 (vect_build_slp_tree_2): Handle not grouped loads.
16340 (vect_optimize_slp_pass::remove_redundant_permutations):
16342 (vect_transform_slp_perm_load_1): Likewise.
16343 * tree-vect-stmts.cc (vect_model_load_cost): Likewise.
16344 (get_group_load_store_type): Likewise. Handle
16345 invariant accesses.
16346 (vectorizable_load): Likewise.
16348 2023-06-27 liuhongt <hongtao.liu@intel.com>
16350 PR rtl-optimization/110237
16351 * config/i386/sse.md (<avx512>_store<mode>_mask): Refine with
16353 (maskstore<mode><avx512fmaskmodelower): Ditto.
16354 (*<avx512>_store<mode>_mask): New define_insn, it's renamed
16355 from original <avx512>_store<mode>_mask.
16357 2023-06-27 liuhongt <hongtao.liu@intel.com>
16359 * config/i386/i386-features.cc (pass_insert_vzeroupper:gate):
16360 Move flag_expensive_optimizations && !optimize_size to ..
16361 * config/i386/i386-options.cc (ix86_option_override_internal):
16362 .. this, it makes -mvzeroupper independent of optimization
16363 level, but still keeps the behavior of architecture
16364 tuning(emit_vzeroupper) unchanged.
16366 2023-06-27 liuhongt <hongtao.liu@intel.com>
16369 * config/i386/i386.cc (ix86_avx_u127_mode_needed): Don't emit
16370 vzeroupper for vzeroupper call_insn.
16372 2023-06-27 Andrew Pinski <apinski@marvell.com>
16374 * doc/extend.texi (__builtin_alloca_with_align_and_max): Fix
16377 2023-06-27 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16379 * config/riscv/riscv-v.cc (expand_const_vector): Fix stepped vector
16382 2023-06-26 Andrew Pinski <apinski@marvell.com>
16384 * doc/extend.texi (access attribute): Add
16386 (interrupt/interrupt_handler attribute):
16389 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16391 * config/aarch64/aarch64-simd.md (aarch64_sqrshrun_n<mode>_insn):
16392 Use <DWI> instead of <V2XWIDE>.
16393 (aarch64_sqrshrun_n<mode>): Likewise.
16395 2023-06-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16397 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rsra_rnd_imm_p):
16399 (aarch64_rnd_imm_p): ... This.
16400 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec):
16402 (aarch64_int_rnd_operand): ... This.
16403 (aarch64_simd_rshrn_imm_vec): Delete.
16404 * config/aarch64/aarch64-simd.md (aarch64_<sra_op>rsra_n<mode>_insn):
16405 Adjust for the above.
16406 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): Likewise.
16407 (*aarch64_<shrn_op>rshrn_n<mode>_insn): Likewise.
16408 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
16409 (aarch64_sqrshrun_n<mode>_insn): Likewise.
16410 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): Likewise.
16411 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): Likewise.
16412 (aarch64_sqrshrun2_n<mode>_insn_le): Likewise.
16413 (aarch64_sqrshrun2_n<mode>_insn_be): Likewise.
16414 * config/aarch64/aarch64.cc (aarch64_const_vec_rsra_rnd_imm_p):
16416 (aarch64_rnd_imm_p): ... This.
16418 2023-06-26 Andreas Krebbel <krebbel@linux.ibm.com>
16420 * config/s390/s390.cc (s390_encode_section_info): Set
16421 SYMBOL_FLAG_SET_NOTALIGN2 only if the symbol has explicitely been
16424 2023-06-26 Jan Hubicka <jh@suse.cz>
16426 PR tree-optimization/109849
16427 * tree-ssa-dce.cc (make_forwarders_with_degenerate_phis): Fix profile
16428 count of newly constructed forwarder block.
16430 2023-06-26 Andrew Carlotti <andrew.carlotti@arm.com>
16432 * doc/optinfo.texi: Fix "steam" -> "stream".
16434 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16436 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Add LEN_MASK_STORE and
16438 (dse_optimize_stmt): Add LEN_MASK_STORE.
16440 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16442 * gimple-fold.cc (gimple_fold_partial_load_store_mem_ref): Fix gimple
16443 fold of LOAD/STORE with length.
16445 2023-06-26 Andrew MacLeod <amacleod@redhat.com>
16447 * gimple-range-gori.cc (compute_operand1_and_operand2_range):
16448 Check for interdependence between operands 1 and 2.
16450 2023-06-26 Richard Sandiford <richard.sandiford@arm.com>
16452 * tree-vect-stmts.cc (vectorizable_conversion): Take multi_step_cvt
16453 into account when costing non-widening/truncating conversions.
16455 2023-06-26 Richard Biener <rguenther@suse.de>
16457 PR tree-optimization/110381
16458 * tree-vect-slp.cc (vect_optimize_slp_pass::start_choosing_layouts):
16459 Materialize permutes before fold-left reductions.
16461 2023-06-26 Pan Li <pan2.li@intel.com>
16463 * config/riscv/riscv-vector-builtins-bases.h: Remove duplicated decl.
16465 2023-06-26 Richard Biener <rguenther@suse.de>
16467 * varasm.cc (initializer_constant_valid_p_1): Also
16468 constrain the type of value to be scalar integral
16469 before dispatching to narrowing_initializer_constant_valid_p.
16471 2023-06-26 Richard Biener <rguenther@suse.de>
16473 * tree-ssa-scopedtables.cc (hashable_expr_equal_p):
16474 Use element_precision.
16476 2023-06-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16478 * config/riscv/autovec.md (vcond<V:mode><VI:mode>): Remove redundant
16480 (vcondu<V:mode><VI:mode>): Ditto.
16481 * config/riscv/riscv-protos.h (expand_vcond): Ditto.
16482 * config/riscv/riscv-v.cc (expand_vcond): Ditto.
16484 2023-06-26 Richard Biener <rguenther@suse.de>
16486 PR tree-optimization/110392
16487 * gimple-predicate-analysis.cc (uninit_analysis::is_use_guarded):
16488 Do early exits on true/false predicate only after normalization.
16490 2023-06-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16492 * tree-ssa-sccvn.cc (vn_reference_lookup_3): Change name "len" into
16495 2023-06-26 Roger Sayle <roger@nextmovesoftware.com>
16497 * config/i386/i386.md (peephole2): Simplify zeroing a register
16498 followed by an IOR, XOR or PLUS operation on it, into a move.
16499 (*ashl<dwi>3_doubleword_highpart): New define_insn_and_split to
16500 eliminate (and hide from reload) unnecessary word to doubleword
16501 extensions that are followed by left shifts by sufficiently large,
16502 but valid, bit counts.
16504 2023-06-26 liuhongt <hongtao.liu@intel.com>
16506 PR tree-optimization/110371
16507 PR tree-optimization/110018
16508 * tree-vect-stmts.cc (vectorizable_conversion): Use cvt_op to
16509 save intermediate type operand instead of "subtle" vec_dest
16512 2023-06-26 liuhongt <hongtao.liu@intel.com>
16514 PR tree-optimization/110371
16515 PR tree-optimization/110018
16516 * tree-vect-stmts.cc (vectorizable_conversion): Don't use
16517 intermiediate type for FIX_TRUNC_EXPR when ftrapping-math.
16519 2023-06-26 Hongyu Wang <hongyu.wang@intel.com>
16521 * config/i386/i386-options.cc (ix86_valid_target_attribute_tree):
16522 Override tune_string with arch_string if tune_string is not
16523 explicitly specified.
16525 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16527 * config/riscv/riscv-vsetvl.cc (vector_insn_info::parse_insn): Ehance
16529 * config/riscv/riscv-vsetvl.h: New function.
16531 2023-06-25 Li Xu <xuli1@eswincomputing.com>
16533 * config/riscv/riscv-vector-builtins-bases.cc: change emit_insn to
16536 2023-06-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16538 * config/riscv/autovec.md (len_load_<mode>): Remove.
16539 (len_maskload<mode><vm>): Remove.
16540 (len_store_<mode>): New pattern.
16541 (len_maskstore<mode><vm>): New pattern.
16542 * config/riscv/predicates.md (autovec_length_operand): New predicate.
16543 * config/riscv/riscv-protos.h (enum insn_type): New enum.
16544 (expand_load_store): New function.
16545 * config/riscv/riscv-v.cc (emit_vlmax_masked_insn): Ditto.
16546 (emit_nonvlmax_masked_insn): Ditto.
16547 (expand_load_store): Ditto.
16548 * config/riscv/riscv-vector-builtins.cc
16549 (function_expander::use_contiguous_store_insn): Add avl_type operand
16551 * config/riscv/vector.md: Ditto.
16553 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16555 * internal-fn.cc (expand_partial_store_optab_fn): Fix bug of BIAS
16558 2023-06-25 Pan Li <pan2.li@intel.com>
16560 * config/riscv/vector.md: Revert.
16562 2023-06-25 Pan Li <pan2.li@intel.com>
16564 * config/riscv/genrvv-type-indexer.cc (valid_type): Revert changes.
16565 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): Ditto.
16566 (ADJUST_ALIGNMENT): Ditto.
16567 (RVV_TUPLE_PARTIAL_MODES): Ditto.
16568 (ADJUST_NUNITS): Ditto.
16569 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t): Ditto.
16570 (vfloat16mf4x3_t): Ditto.
16571 (vfloat16mf4x4_t): Ditto.
16572 (vfloat16mf4x5_t): Ditto.
16573 (vfloat16mf4x6_t): Ditto.
16574 (vfloat16mf4x7_t): Ditto.
16575 (vfloat16mf4x8_t): Ditto.
16576 (vfloat16mf2x2_t): Ditto.
16577 (vfloat16mf2x3_t): Ditto.
16578 (vfloat16mf2x4_t): Ditto.
16579 (vfloat16mf2x5_t): Ditto.
16580 (vfloat16mf2x6_t): Ditto.
16581 (vfloat16mf2x7_t): Ditto.
16582 (vfloat16mf2x8_t): Ditto.
16583 (vfloat16m1x2_t): Ditto.
16584 (vfloat16m1x3_t): Ditto.
16585 (vfloat16m1x4_t): Ditto.
16586 (vfloat16m1x5_t): Ditto.
16587 (vfloat16m1x6_t): Ditto.
16588 (vfloat16m1x7_t): Ditto.
16589 (vfloat16m1x8_t): Ditto.
16590 (vfloat16m2x2_t): Ditto.
16591 (vfloat16m2x3_t): Diito.
16592 (vfloat16m2x4_t): Diito.
16593 (vfloat16m4x2_t): Diito.
16594 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): Ditto.
16595 (vfloat16mf4x3_t): Ditto.
16596 (vfloat16mf4x4_t): Ditto.
16597 (vfloat16mf4x5_t): Ditto.
16598 (vfloat16mf4x6_t): Ditto.
16599 (vfloat16mf4x7_t): Ditto.
16600 (vfloat16mf4x8_t): Ditto.
16601 (vfloat16mf2x2_t): Ditto.
16602 (vfloat16mf2x3_t): Ditto.
16603 (vfloat16mf2x4_t): Ditto.
16604 (vfloat16mf2x5_t): Ditto.
16605 (vfloat16mf2x6_t): Ditto.
16606 (vfloat16mf2x7_t): Ditto.
16607 (vfloat16mf2x8_t): Ditto.
16608 (vfloat16m1x2_t): Ditto.
16609 (vfloat16m1x3_t): Ditto.
16610 (vfloat16m1x4_t): Ditto.
16611 (vfloat16m1x5_t): Ditto.
16612 (vfloat16m1x6_t): Ditto.
16613 (vfloat16m1x7_t): Ditto.
16614 (vfloat16m1x8_t): Ditto.
16615 (vfloat16m2x2_t): Ditto.
16616 (vfloat16m2x3_t): Ditto.
16617 (vfloat16m2x4_t): Ditto.
16618 (vfloat16m4x2_t): Ditto.
16619 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
16620 * config/riscv/riscv.md: Ditto.
16621 * config/riscv/vector-iterators.md: Ditto.
16623 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16625 * gimple-fold.cc (arith_overflowed_p): Apply LEN_MASK_{LOAD,STORE}.
16626 (gimple_fold_partial_load_store_mem_ref): Ditto.
16627 (gimple_fold_partial_store): Ditto.
16628 (gimple_fold_call): Ditto.
16630 2023-06-25 liuhongt <hongtao.liu@intel.com>
16633 * config/i386/sse.md (maskload<mode><avx512fmaskmodelower>):
16634 Refine pattern with UNSPEC_MASKLOAD.
16635 (maskload<mode><avx512fmaskmodelower>): Ditto.
16636 (*<avx512>_load<mode>_mask): Extend mode iterator to
16638 (*<avx512>_load<mode>): Ditto.
16640 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16642 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): Add LEN_MASK_STORE.
16644 2023-06-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16646 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): Apply
16647 LEN_MASK_{LOAD,STORE}
16649 2023-06-25 yulong <shiyulong@iscas.ac.cn>
16651 * config/riscv/vector.md: Add float16 attr at sew、vlmul and ratio.
16653 2023-06-24 Roger Sayle <roger@nextmovesoftware.com>
16655 * config/i386/i386.md (*<code>qi_ext<mode>_3): New define_insn.
16657 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16659 * config/riscv/autovec.md (*fma<mode>): set clobber to Pmode in expand stage.
16660 (*fma<VI:mode><P:mode>): Ditto.
16661 (*fnma<mode>): Ditto.
16662 (*fnma<VI:mode><P:mode>): Ditto.
16664 2023-06-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
16666 * config/riscv/autovec.md (fma<mode>4): New pattern.
16667 (*fma<mode>): Ditto.
16668 (fnma<mode>4): Ditto.
16669 (*fnma<mode>): Ditto.
16670 (fms<mode>4): Ditto.
16671 (*fms<mode>): Ditto.
16672 (fnms<mode>4): Ditto.
16673 (*fnms<mode>): Ditto.
16674 * config/riscv/riscv-protos.h (emit_vlmax_fp_ternary_insn):
16676 * config/riscv/riscv-v.cc (emit_vlmax_fp_ternary_insn): Ditto.
16677 * config/riscv/vector.md: Fix attribute bug.
16679 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16681 * tree-ssa-loop-ivopts.cc (get_mem_type_for_internal_fn):
16682 Apply LEN_MASK_{LOAD,STORE}.
16684 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16686 * tree-ssa-loop-ivopts.cc (get_alias_ptr_type_for_ptr_address):
16687 Add LEN_MASK_{LOAD,STORE}.
16689 2023-06-24 David Malcolm <dmalcolm@redhat.com>
16691 * diagnostic-format-sarif.cc: Add #define INCLUDE_VECTOR.
16692 * diagnostic.cc: Likewise.
16693 * text-art/box-drawing.cc: Likewise.
16694 * text-art/canvas.cc: Likewise.
16695 * text-art/ruler.cc: Likewise.
16696 * text-art/selftests.cc: Likewise.
16697 * text-art/selftests.h (text_art::canvas): New forward decl.
16698 * text-art/style.cc: Add #define INCLUDE_VECTOR.
16699 * text-art/styled-string.cc: Likewise.
16700 * text-art/table.cc: Likewise.
16701 * text-art/table.h: Remove #include <vector>.
16702 * text-art/theme.cc: Add #define INCLUDE_VECTOR.
16703 * text-art/types.h: Check that INCLUDE_VECTOR is defined.
16704 Remove #include of <vector> and <string>.
16705 * text-art/widget.cc: Add #define INCLUDE_VECTOR.
16706 * text-art/widget.h: Remove #include <vector>.
16708 2023-06-24 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
16710 * internal-fn.cc (expand_partial_store_optab_fn): Adapt for LEN_MASK_STORE.
16711 (internal_load_fn_p): Add LEN_MASK_LOAD.
16712 (internal_store_fn_p): Add LEN_MASK_STORE.
16713 (internal_fn_mask_index): Add LEN_MASK_{LOAD,STORE}.
16714 (internal_fn_stored_value_index): Add LEN_MASK_STORE.
16715 (internal_len_load_store_bias): Add LEN_MASK_{LOAD,STORE}.
16716 * optabs-tree.cc (can_vec_mask_load_store_p): Adapt for LEN_MASK_{LOAD,STORE}.
16717 (get_len_load_store_mode): Ditto.
16718 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
16719 (get_len_load_store_mode): Ditto.
16720 * tree-vect-stmts.cc (check_load_store_for_partial_vectors): Ditto.
16721 (get_all_ones_mask): New function.
16722 (vectorizable_store): Apply LEN_MASK_{LOAD,STORE} into vectorizer.
16723 (vectorizable_load): Ditto.
16725 2023-06-23 Marek Polacek <polacek@redhat.com>
16727 * doc/cpp.texi (__cplusplus): Document value for -std=c++26 and
16728 -std=gnu++26. Document that for C++23, its value is 202302L.
16729 * doc/invoke.texi: Document -std=c++26 and -std=gnu++26.
16730 * dwarf2out.cc (highest_c_language): Handle GNU C++26.
16731 (gen_compile_unit_die): Likewise.
16733 2023-06-23 Jan Hubicka <jh@suse.cz>
16735 * tree-ssa-phiprop.cc (propagate_with_phi): Compute post dominators on
16737 (pass_phiprop::execute): Do not compute it here; return
16738 update_ssa_only_virtuals if something changed.
16739 (pass_data_phiprop): Remove TODO_update_ssa from todos.
16741 2023-06-23 Michael Meissner <meissner@linux.ibm.com>
16742 Aaron Sawdey <acsawdey@linux.ibm.com>
16745 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): Fix problems that
16746 allowed prefixed lwa to be generated.
16747 * config/rs6000/fusion.md: Regenerate.
16748 * config/rs6000/predicates.md (ds_form_mem_operand): Delete.
16749 * config/rs6000/rs6000.md (prefixed attribute): Add support for load
16750 plus compare immediate fused insns.
16751 (maybe_prefixed): Likewise.
16753 2023-06-23 Roger Sayle <roger@nextmovesoftware.com>
16755 * simplify-rtx.cc (simplify_subreg): Optimize lowpart SUBREGs
16756 of ASHIFT to const0_rtx with sufficiently large shift count.
16757 Optimize highpart SUBREGs of ASHIFT as the shift operand when
16758 the shift count is the correct offset. Optimize SUBREGs of
16759 multi-word logic operations if the SUBREGs of both operands
16762 2023-06-23 Richard Biener <rguenther@suse.de>
16764 * varasm.cc (initializer_constant_valid_p_1): Only
16765 allow conversions between scalar floating point types.
16767 2023-06-23 Richard Biener <rguenther@suse.de>
16769 * tree-vect-stmts.cc (vectorizable_assignment):
16770 Properly handle non-integral operands when analyzing
16773 2023-06-23 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
16775 PR tree-optimization/110280
16776 * match.pd (vec_perm_expr(v, v, mask) -> v): Explicitly build vector
16777 using build_vector_from_val with the element of input operand, and
16778 mask's type if operand and mask's types don't match.
16780 2023-06-23 Richard Biener <rguenther@suse.de>
16782 * fold-const.cc (tree_simple_nonnegative_warnv_p): Guard
16783 the truth_value_p case with !VECTOR_TYPE_P.
16785 2023-06-23 Richard Biener <rguenther@suse.de>
16787 * tree-vect-patterns.cc (vect_look_through_possible_promotion):
16788 Exit early when the type isn't scalar integral.
16790 2023-06-23 Richard Biener <rguenther@suse.de>
16792 * match.pd ((outertype)((innertype0)a+(innertype1)b)
16793 -> ((newtype)a+(newtype)b)): Use element_precision
16796 2023-06-23 Richard Biener <rguenther@suse.de>
16798 * fold-const.cc (fold_binary_loc): Use element_precision
16799 when trying (double)float1 CMP (double)float2 to
16800 float1 CMP float2 simplification.
16801 * match.pd: Likewise.
16803 2023-06-23 Richard Biener <rguenther@suse.de>
16805 * tree-vect-stmts.cc (vectorizable_load): Avoid useless
16806 copies of VMAT_INVARIANT vectorized stmts, fix SLP support.
16808 2023-06-23 Richard Biener <rguenther@suse.de>
16810 * tree-vect-stmts.cc (vector_vector_composition_type):
16811 Handle composition of a vector from a number of elements that
16812 happens to match its number of lanes.
16814 2023-06-22 Marek Polacek <polacek@redhat.com>
16816 * configure.ac (--enable-host-bind-now): New check. Add
16817 -Wl,-z,now to LD_PICFLAG if --enable-host-bind-now.
16818 * configure: Regenerate.
16819 * doc/install.texi: Document --enable-host-bind-now.
16821 2023-06-22 Di Zhao OS <dizhao@os.amperecomputing.com>
16823 * config/aarch64/aarch64.cc: Change fma_reassoc_width for ampere1.
16825 2023-06-22 Richard Biener <rguenther@suse.de>
16827 PR tree-optimization/110332
16828 * tree-ssa-phiprop.cc (propagate_with_phi): Always
16829 check aliasing with edge inserted loads.
16831 2023-06-22 Roger Sayle <roger@nextmovesoftware.com>
16832 Uros Bizjak <ubizjak@gmail.com>
16834 * config/i386/i386-expand.cc (ix86_expand_sse_ptest): Recognize
16835 expansion of ptestc with equal operands as producing const1_rtx.
16836 * config/i386/i386.cc (ix86_rtx_costs): Provide accurate cost
16837 estimates of UNSPEC_PTEST, where the ptest performs the PAND
16838 or PAND of its operands.
16839 * config/i386/sse.md (define_split): Transform CCCmode UNSPEC_PTEST
16840 of reg_equal_p operands into an x86_stc instruction.
16841 (define_split): Split pandn/ptestz/set{n?}e into ptestc/set{n?}c.
16842 (define_split): Similar to above for strict_low_part destinations.
16843 (define_split): Split pandn/ptestz/j{n?}e into ptestc/j{n?}c.
16845 2023-06-22 David Malcolm <dmalcolm@redhat.com>
16848 * Makefile.in (ANALYZER_OBJS): Add analyzer/access-diagram.o.
16849 * doc/invoke.texi (Wanalyzer-out-of-bounds): Add description of
16851 (fanalyzer-debug-text-art): New.
16853 2023-06-22 David Malcolm <dmalcolm@redhat.com>
16855 * Makefile.in (OBJS-libcommon): Add text-art/box-drawing.o,
16856 text-art/canvas.o, text-art/ruler.o, text-art/selftests.o,
16857 text-art/style.o, text-art/styled-string.o, text-art/table.o,
16858 text-art/theme.o, and text-art/widget.o.
16859 * color-macros.h (COLOR_FG_BRIGHT_BLACK): New.
16860 (COLOR_FG_BRIGHT_RED): New.
16861 (COLOR_FG_BRIGHT_GREEN): New.
16862 (COLOR_FG_BRIGHT_YELLOW): New.
16863 (COLOR_FG_BRIGHT_BLUE): New.
16864 (COLOR_FG_BRIGHT_MAGENTA): New.
16865 (COLOR_FG_BRIGHT_CYAN): New.
16866 (COLOR_FG_BRIGHT_WHITE): New.
16867 (COLOR_BG_BRIGHT_BLACK): New.
16868 (COLOR_BG_BRIGHT_RED): New.
16869 (COLOR_BG_BRIGHT_GREEN): New.
16870 (COLOR_BG_BRIGHT_YELLOW): New.
16871 (COLOR_BG_BRIGHT_BLUE): New.
16872 (COLOR_BG_BRIGHT_MAGENTA): New.
16873 (COLOR_BG_BRIGHT_CYAN): New.
16874 (COLOR_BG_BRIGHT_WHITE): New.
16875 * common.opt (fdiagnostics-text-art-charset=): New option.
16876 (diagnostic-text-art.h): New SourceInclude.
16877 (diagnostic_text_art_charset) New Enum and EnumValues.
16878 * configure: Regenerate.
16879 * configure.ac (gccdepdir): Add text-art to loop.
16880 * diagnostic-diagram.h: New file.
16881 * diagnostic-format-json.cc (json_emit_diagram): New.
16882 (diagnostic_output_format_init_json): Wire it up to
16883 context->m_diagrams.m_emission_cb.
16884 * diagnostic-format-sarif.cc: Include "diagnostic-diagram.h" and
16885 "text-art/canvas.h".
16886 (sarif_result::on_nested_diagnostic): Move code to...
16887 (sarif_result::add_related_location): ...this new function.
16888 (sarif_result::on_diagram): New.
16889 (sarif_builder::emit_diagram): New.
16890 (sarif_builder::make_message_object_for_diagram): New.
16891 (sarif_emit_diagram): New.
16892 (diagnostic_output_format_init_sarif): Set
16893 context->m_diagrams.m_emission_cb to sarif_emit_diagram.
16894 * diagnostic-text-art.h: New file.
16895 * diagnostic.cc: Include "diagnostic-text-art.h",
16896 "diagnostic-diagram.h", and "text-art/theme.h".
16897 (diagnostic_initialize): Initialize context->m_diagrams and
16898 call diagnostics_text_art_charset_init.
16899 (diagnostic_finish): Clean up context->m_diagrams.m_theme.
16900 (diagnostic_emit_diagram): New.
16901 (diagnostics_text_art_charset_init): New.
16902 * diagnostic.h (text_art::theme): New forward decl.
16903 (class diagnostic_diagram): Likewise.
16904 (diagnostic_context::m_diagrams): New field.
16905 (diagnostic_emit_diagram): New decl.
16906 * doc/invoke.texi (Diagnostic Message Formatting Options): Add
16907 -fdiagnostics-text-art-charset=.
16908 (-fdiagnostics-plain-output): Add
16909 -fdiagnostics-text-art-charset=none.
16910 * gcc.cc: Include "diagnostic-text-art.h".
16911 (driver_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
16912 * opts-common.cc (decode_cmdline_options_to_array): Add
16913 "-fdiagnostics-text-art-charset=none" to expanded_args for
16914 -fdiagnostics-plain-output.
16915 * opts.cc: Include "diagnostic-text-art.h".
16916 (common_handle_option): Handle OPT_fdiagnostics_text_art_charset_.
16917 * pretty-print.cc (pp_unicode_character): New.
16918 * pretty-print.h (pp_unicode_character): New decl.
16919 * selftest-run-tests.cc: Include "text-art/selftests.h".
16920 (selftest::run_tests): Call text_art_tests.
16921 * text-art/box-drawing-chars.inc: New file, generated by
16922 contrib/unicode/gen-box-drawing-chars.py.
16923 * text-art/box-drawing.cc: New file.
16924 * text-art/box-drawing.h: New file.
16925 * text-art/canvas.cc: New file.
16926 * text-art/canvas.h: New file.
16927 * text-art/ruler.cc: New file.
16928 * text-art/ruler.h: New file.
16929 * text-art/selftests.cc: New file.
16930 * text-art/selftests.h: New file.
16931 * text-art/style.cc: New file.
16932 * text-art/styled-string.cc: New file.
16933 * text-art/table.cc: New file.
16934 * text-art/table.h: New file.
16935 * text-art/theme.cc: New file.
16936 * text-art/theme.h: New file.
16937 * text-art/types.h: New file.
16938 * text-art/widget.cc: New file.
16939 * text-art/widget.h: New file.
16941 2023-06-21 Uros Bizjak <ubizjak@gmail.com>
16943 * function.h (emit_initial_value_sets):
16944 Change return type from int to void.
16945 (aggregate_value_p): Change return type from int to bool.
16946 (prologue_contains): Ditto.
16947 (epilogue_contains): Ditto.
16948 (prologue_epilogue_contains): Ditto.
16949 * function.cc (temp_slot): Make "in_use" variable bool.
16950 (make_slot_available): Update for changed "in_use" variable.
16951 (assign_stack_temp_for_type): Ditto.
16952 (emit_initial_value_sets): Change return type from int to void
16953 and update function body accordingly.
16954 (instantiate_virtual_regs): Ditto.
16955 (rest_of_handle_thread_prologue_and_epilogue): Ditto.
16956 (safe_insn_predicate): Change return type from int to bool.
16957 (aggregate_value_p): Change return type from int to bool
16958 and update function body accordingly.
16959 (prologue_contains): Change return type from int to bool.
16960 (prologue_epilogue_contains): Ditto.
16962 2023-06-21 Alexander Monakov <amonakov@ispras.ru>
16964 * common.opt (fp_contract_mode) [on]: Remove fallback.
16965 * config/sh/sh.md (*fmasf4): Correct flag_fp_contract_mode test.
16966 * doc/invoke.texi (-ffp-contract): Update.
16967 * trans-mem.cc (diagnose_tm_1): Skip internal function calls.
16969 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
16971 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
16972 Add alternatives to prefer to avoid same input and output Z register.
16973 (mask_gather_load<mode><v_int_container>): Likewise.
16974 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
16975 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
16976 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
16977 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
16979 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
16981 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16982 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
16983 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16984 <SVE_2BHSI:mode>_sxtw): Likewise.
16985 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
16986 <SVE_2BHSI:mode>_uxtw): Likewise.
16987 (@aarch64_ldff1_gather<mode>): Likewise.
16988 (@aarch64_ldff1_gather<mode>): Likewise.
16989 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
16990 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
16991 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
16992 <VNx4_NARROW:mode>): Likewise.
16993 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16994 <VNx2_NARROW:mode>): Likewise.
16995 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16996 <VNx2_NARROW:mode>_sxtw): Likewise.
16997 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
16998 <VNx2_NARROW:mode>_uxtw): Likewise.
16999 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17000 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17001 <SVE_PARTIAL_I:mode>): Likewise.
17003 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17005 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17006 Convert to compact alternatives syntax.
17007 (mask_gather_load<mode><v_int_container>): Likewise.
17008 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17009 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17010 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17011 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17013 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17015 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17016 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17017 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17018 <SVE_2BHSI:mode>_sxtw): Likewise.
17019 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17020 <SVE_2BHSI:mode>_uxtw): Likewise.
17021 (@aarch64_ldff1_gather<mode>): Likewise.
17022 (@aarch64_ldff1_gather<mode>): Likewise.
17023 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17024 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17025 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17026 <VNx4_NARROW:mode>): Likewise.
17027 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17028 <VNx2_NARROW:mode>): Likewise.
17029 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17030 <VNx2_NARROW:mode>_sxtw): Likewise.
17031 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17032 <VNx2_NARROW:mode>_uxtw): Likewise.
17033 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17034 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17035 <SVE_PARTIAL_I:mode>): Likewise.
17037 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17040 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17042 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17043 Convert to compact alternatives syntax.
17044 (mask_gather_load<mode><v_int_container>): Likewise.
17045 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17046 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17047 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17048 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17050 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17052 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17053 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17054 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17055 <SVE_2BHSI:mode>_sxtw): Likewise.
17056 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17057 <SVE_2BHSI:mode>_uxtw): Likewise.
17058 (@aarch64_ldff1_gather<mode>): Likewise.
17059 (@aarch64_ldff1_gather<mode>): Likewise.
17060 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17061 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17062 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17063 <VNx4_NARROW:mode>): Likewise.
17064 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17065 <VNx2_NARROW:mode>): Likewise.
17066 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17067 <VNx2_NARROW:mode>_sxtw): Likewise.
17068 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17069 <VNx2_NARROW:mode>_uxtw): Likewise.
17070 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17071 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17072 <SVE_PARTIAL_I:mode>): Likewise.
17074 2023-06-21 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17076 * optabs-query.cc (can_vec_mask_load_store_p): Move to optabs-tree.cc.
17077 (get_len_load_store_mode): Ditto.
17078 * optabs-query.h (can_vec_mask_load_store_p): Move to optabs-tree.h.
17079 (get_len_load_store_mode): Ditto.
17080 * optabs-tree.cc (can_vec_mask_load_store_p): New function.
17081 (get_len_load_store_mode): Ditto.
17082 * optabs-tree.h (can_vec_mask_load_store_p): Ditto.
17083 (get_len_load_store_mode): Ditto.
17084 * tree-if-conv.cc: include optabs-tree instead of optabs-query
17086 2023-06-21 Richard Biener <rguenther@suse.de>
17088 * tree-ssa-loop-ivopts.cc (add_iv_candidate_for_use): Use
17089 split_constant_offset for the POINTER_PLUS_EXPR case.
17091 2023-06-21 Richard Biener <rguenther@suse.de>
17093 * tree-ssa-loop-ivopts.cc (record_group_use): Use
17094 split_constant_offset.
17096 2023-06-21 Richard Biener <rguenther@suse.de>
17098 * tree-loop-distribution.cc (classify_builtin_st): Use
17099 split_constant_offset.
17100 * tree-ssa-loop-ivopts.h (strip_offset): Remove.
17101 * tree-ssa-loop-ivopts.cc (strip_offset): Make static.
17103 2023-06-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17105 * config/aarch64/aarch64-sve.md (mask_gather_load<mode><v_int_container>):
17106 Convert to compact alternatives syntax.
17107 (mask_gather_load<mode><v_int_container>): Likewise.
17108 (*mask_gather_load<mode><v_int_container>_<su>xtw_unpacked): Likewise.
17109 (*mask_gather_load<mode><v_int_container>_sxtw): Likewise.
17110 (*mask_gather_load<mode><v_int_container>_uxtw): Likewise.
17111 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_4HSI:mode><SVE_4BHI:mode>):
17113 (@aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode><SVE_2BHSI:mode>):
17115 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17116 <SVE_2BHSI:mode>_<ANY_EXTEND2:su>xtw_unpacked): Likewise.
17117 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17118 <SVE_2BHSI:mode>_sxtw): Likewise.
17119 (*aarch64_gather_load_<ANY_EXTEND:optab><SVE_2HSDI:mode>
17120 <SVE_2BHSI:mode>_uxtw): Likewise.
17121 (@aarch64_ldff1_gather<mode>): Likewise.
17122 (@aarch64_ldff1_gather<mode>): Likewise.
17123 (*aarch64_ldff1_gather<mode>_sxtw): Likewise.
17124 (*aarch64_ldff1_gather<mode>_uxtw): Likewise.
17125 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx4_WIDE:mode>
17126 <VNx4_NARROW:mode>): Likewise.
17127 (@aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17128 <VNx2_NARROW:mode>): Likewise.
17129 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17130 <VNx2_NARROW:mode>_sxtw): Likewise.
17131 (*aarch64_ldff1_gather_<ANY_EXTEND:optab><VNx2_WIDE:mode>
17132 <VNx2_NARROW:mode>_uxtw): Likewise.
17133 * config/aarch64/aarch64-sve2.md (@aarch64_gather_ldnt<mode>): Likewise.
17134 (@aarch64_gather_ldnt_<ANY_EXTEND:optab><SVE_FULL_SDI:mode>
17135 <SVE_PARTIAL_I:mode>): Likewise.
17137 2023-06-21 Tamar Christina <tamar.christina@arm.com>
17140 * doc/md.texi: Replace backslashchar.
17142 2023-06-21 Richard Biener <rguenther@suse.de>
17144 * config/i386/i386.cc (ix86_vector_costs::finish_cost):
17145 Overload. For masked main loops make sure the vectorization
17146 factor isn't more than double the number of iterations.
17148 2023-06-21 Jan Beulich <jbeulich@suse.com>
17150 * config/i386/i386-expand.cc (ix86_expand_copysign): Request
17151 value duplication by ix86_build_signbit_mask() when AVX512F and
17153 * config/i386/sse.md (*<avx512>_vternlog<mode>_all): Convert to
17154 2-alternative form. Adjust "mode" attribute. Add "enabled"
17156 (*<avx512>_vpternlog<mode>_1): Also permit when TARGET_AVX512F
17157 && !TARGET_PREFER_AVX256.
17158 (*<avx512>_vpternlog<mode>_2): Likewise.
17159 (*<avx512>_vpternlog<mode>_3): Likewise.
17161 2023-06-21 liuhongt <hongtao.liu@intel.com>
17164 * tree-vect-stmts.cc (vectorizable_conversion): Use
17165 intermiediate integer type for float_expr/fix_trunc_expr when
17166 direct optab is not existed.
17168 2023-06-20 Tamar Christina <tamar.christina@arm.com>
17170 PR bootstrap/110324
17171 * gensupport.cc (convert_syntax): Explicitly check for RTX code.
17173 2023-06-20 Richard Sandiford <richard.sandiford@arm.com>
17175 * config/aarch64/aarch64.md (stack_tie): Hard-code the first
17176 register operand to the stack pointer. Require the second register
17177 operand to have the number specified in a separate const_int operand.
17178 * config/aarch64/aarch64.cc (aarch64_emit_stack_tie): New function.
17179 (aarch64_allocate_and_probe_stack_space): Use it.
17180 (aarch64_expand_prologue, aarch64_expand_epilogue): Likewise.
17181 (aarch64_expand_epilogue): Likewise.
17183 2023-06-20 Jakub Jelinek <jakub@redhat.com>
17185 PR middle-end/79173
17186 * tree-ssa-math-opts.cc (match_uaddc_usubc): Remember lhs of
17187 IMAGPART_EXPR of arg2/arg3 and use that as arg3 if it has the right
17190 2023-06-20 Uros Bizjak <ubizjak@gmail.com>
17192 * calls.h (setjmp_call_p): Change return type from int to bool.
17193 * calls.cc (struct arg_data): Change "pass_on_stack" to bool.
17194 (store_one_arg): Change return type from int to bool
17195 and adjust function body accordingly. Change "sibcall_failure"
17197 (finalize_must_preallocate): Ditto. Change *must_preallocate pointer
17198 argument to bool. Change "partial_seen" variable to bool.
17199 (load_register_parameters): Change *sibcall_failure
17200 pointer argument to bool.
17201 (check_sibcall_argument_overlap_1): Change return type from int to bool
17202 and adjust function body accordingly.
17203 (check_sibcall_argument_overlap): Ditto. Change
17204 "mark_stored_args_map" argument to bool.
17205 (emit_call_1): Change "already_popped" variable to bool.
17206 (setjmp_call_p): Change return type from int to bool
17207 and adjust function body accordingly.
17208 (initialize_argument_information): Change *must_preallocate
17209 pointer argument to bool.
17210 (expand_call): Change "pcc_struct_value", "must_preallocate"
17211 and "sibcall_failure" variables to bool.
17212 (emit_library_call_value_1): Change "pcc_struct_value"
17215 2023-06-20 Martin Jambor <mjambor@suse.cz>
17218 * ipa-sra.cc (struct caller_issues): New field there_is_one.
17219 (check_for_caller_issues): Set it.
17220 (check_all_callers_for_issues): Check it.
17222 2023-06-20 Martin Jambor <mjambor@suse.cz>
17224 * ipa-prop.h (ipa_uid_to_idx_map_elt): New type.
17225 (struct ipcp_transformation): Rearrange members according to
17226 C++ class coding convention, add m_uid_to_idx,
17227 get_param_index and maybe_create_parm_idx_map.
17228 * ipa-cp.cc (ipcp_transformation::get_param_index): New function.
17229 (compare_uids): Likewise.
17230 (ipcp_transformation::maype_create_parm_idx_map): Likewise.
17231 * ipa-prop.cc (ipcp_get_parm_bits): Use get_param_index.
17232 (ipcp_update_bits): Accept TS as a parameter, assume it is not NULL.
17233 (ipcp_update_vr): Likewise.
17234 (ipcp_transform_function): Call, maybe_create_parm_idx_map of TS, bail
17235 out quickly if empty, pass it to ipcp_update_bits and ipcp_update_vr.
17237 2023-06-20 Carl Love <cel@us.ibm.com>
17239 * config/rs6000/rs6000-builtin.cc (rs6000_expand_builtin):
17240 Rename CODE_FOR_xsxsigqp_tf to CODE_FOR_xsxsigqp_tf_ti.
17241 Rename CODE_FOR_xsxsigqp_kf to CODE_FOR_xsxsigqp_kf_ti.
17242 Rename CCDE_FOR_xsxexpqp_tf to CODE_FOR_xsxexpqp_tf_di.
17243 Rename CODE_FOR_xsxexpqp_kf to CODE_FOR_xsxexpqp_kf_di.
17244 (CODE_FOR_xsxexpqp_kf_v2di, CODE_FOR_xsxsigqp_kf_v1ti,
17245 CODE_FOR_xsiexpqp_kf_v2di): Add case statements.
17246 * config/rs6000/rs6000-builtins.def
17247 (__builtin_vsx_scalar_extract_exp_to_vec,
17248 __builtin_vsx_scalar_extract_sig_to_vec,
17249 __builtin_vsx_scalar_insert_exp_vqp): Add new builtin definitions.
17250 Rename xsxexpqp_kf, xsxsigqp_kf, xsiexpqp_kf to xsexpqp_kf_di,
17251 xsxsigqp_kf_ti, xsiexpqp_kf_di respectively.
17252 * config/rs6000/rs6000-c.cc (altivec_resolve_overloaded_builtin):
17253 Update case RS6000_OVLD_VEC_VSIE to handle MODE_VECTOR_INT for new
17254 overloaded instance. Update comments.
17255 * config/rs6000/rs6000-overload.def
17256 (__builtin_vec_scalar_insert_exp): Add new overload definition with
17258 (scalar_extract_exp_to_vec, scalar_extract_sig_to_vec): New
17259 overloaded definitions.
17260 * config/rs6000/vsx.md (V2DI_DI): New mode iterator.
17261 (DI_to_TI): New mode attribute.
17262 Rename xsxexpqp_<mode> to sxexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
17263 Rename xsxsigqp_<mode> to xsxsigqp_<IEEE128:mode>_<VEC_TI:mode>.
17264 Rename xsiexpqp_<mode> to xsiexpqp_<IEEE128:mode>_<V2DI_DI:mode>.
17265 * doc/extend.texi (scalar_extract_exp_to_vec,
17266 scalar_extract_sig_to_vec): Add documentation for new builtins.
17267 (scalar_insert_exp): Add new overloaded builtin definition.
17269 2023-06-20 Li Xu <xuli1@eswincomputing.com>
17271 * config/riscv/riscv.cc (riscv_regmode_natural_size): set the natural
17272 size of vector mask mode to one rvv register.
17274 2023-06-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17276 * config/riscv/riscv-v.cc (expand_const_vector): Optimize codegen.
17278 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
17280 * config/riscv/riscv.cc (riscv_arg_has_vector): Add default
17283 2023-06-20 Richard Biener <rguenther@suse.de>
17285 * tree-ssa-dse.cc (dse_classify_store): When we found
17286 no defs and the basic-block with the original definition
17287 ends in __builtin_unreachable[_trap] the store is dead.
17289 2023-06-20 Richard Biener <rguenther@suse.de>
17291 * tree-ssa-phiprop.cc (phiprop_insert_phi): For simple loads
17292 keep the virtual SSA form up-to-date.
17294 2023-06-20 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17296 * config/aarch64/aarch64-simd.md (*aarch64_addp_same_reg<mode>):
17297 New define_insn_and_split.
17299 2023-06-20 Tamar Christina <tamar.christina@arm.com>
17301 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Drop test comment.
17303 2023-06-20 Jan Beulich <jbeulich@suse.com>
17305 * config/i386/sse.md (vec_dupv2di): Correct %vmovddup input
17306 constraint. Add new AVX512F alternative.
17308 2023-06-20 Richard Biener <rguenther@suse.de>
17311 * dwarf2out.cc (process_scope_var): Continue processing
17312 the decl after setting a parent in case the existing DIE
17315 2023-06-20 Lehua Ding <lehua.ding@rivai.ai>
17317 * config/riscv/riscv.cc (riscv_scalable_vector_type_p): Delete.
17318 (riscv_arg_has_vector): Simplify.
17319 (riscv_pass_in_vector_p): Adjust warning message.
17321 2023-06-19 Jin Ma <jinma@linux.alibaba.com>
17323 * config/riscv/riscv.cc (riscv_compute_frame_info): Allocate frame for FCSR.
17324 (riscv_for_each_saved_reg): Save and restore FCSR in interrupt functions.
17325 * config/riscv/riscv.md (riscv_frcsr): New patterns.
17326 (riscv_fscsr): Likewise.
17328 2023-06-19 Toru Kisuki <tkisuki@tachyum.com>
17330 PR rtl-optimization/110305
17331 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17332 Handle HONOR_SNANS for x + 0.0.
17334 2023-06-19 Jan Hubicka <jh@suse.cz>
17336 PR tree-optimization/109811
17337 PR tree-optimization/109849
17338 * passes.def: Add phiprop to early optimization passes.
17339 * tree-ssa-phiprop.cc: Allow clonning.
17341 2023-06-19 Tamar Christina <tamar.christina@arm.com>
17343 * config/aarch64/aarch64.md (arches): Add nosimd.
17344 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Rewrite to
17347 2023-06-19 Tamar Christina <tamar.christina@arm.com>
17348 Omar Tahir <Omar.Tahir2@arm.com>
17350 * gensupport.cc (class conlist, add_constraints, add_attributes,
17351 skip_spaces, expect_char, preprocess_compact_syntax,
17352 parse_section_layout, parse_section, convert_syntax): New.
17353 (process_rtx): Check for conversion.
17354 * genoutput.cc (process_template): Check for unresolved iterators.
17355 (class data): Add compact_syntax_p.
17356 (gen_insn): Use it.
17357 * gensupport.h (compact_syntax): New.
17358 (hash-set.h): Include.
17359 * doc/md.texi: Document it.
17361 2023-06-19 Uros Bizjak <ubizjak@gmail.com>
17363 * recog.h (check_asm_operands): Change return type from int to bool.
17364 (insn_invalid_p): Ditto.
17365 (verify_changes): Ditto.
17366 (apply_change_group): Ditto.
17367 (constrain_operands): Ditto.
17368 (constrain_operands_cached): Ditto.
17369 (validate_replace_rtx_subexp): Ditto.
17370 (validate_replace_rtx): Ditto.
17371 (validate_replace_rtx_part): Ditto.
17372 (validate_replace_rtx_part_nosimplify): Ditto.
17373 (added_clobbers_hard_reg_p): Ditto.
17374 (peep2_regno_dead_p): Ditto.
17375 (peep2_reg_dead_p): Ditto.
17376 (store_data_bypass_p): Ditto.
17377 (if_test_bypass_p): Ditto.
17378 * rtl.h (split_all_insns_noflow): Change
17379 return type from unsigned int to void.
17380 * genemit.cc (output_added_clobbers_hard_reg_p): Change return type
17381 of generated added_clobbers_hard_reg_p from int to bool and adjust
17382 function body accordingly. Change "used" variable type from
17384 * recog.cc (check_asm_operands): Change return type
17385 from int to bool and adjust function body accordingly.
17386 (insn_invalid_p): Ditto. Change "is_asm" variable to bool.
17387 (verify_changes): Change return type from int to bool.
17388 (apply_change_group): Change return type from int to bool
17389 and adjust function body accordingly.
17390 (validate_replace_rtx_subexp): Change return type from int to bool.
17391 (validate_replace_rtx): Ditto.
17392 (validate_replace_rtx_part): Ditto.
17393 (validate_replace_rtx_part_nosimplify): Ditto.
17394 (constrain_operands_cached): Ditto.
17395 (constrain_operands): Ditto. Change "lose" and "win"
17396 variables type from int to bool.
17397 (split_all_insns_noflow): Change return type from unsigned int
17398 to void and adjust function body accordingly.
17399 (peep2_regno_dead_p): Change return type from int to bool.
17400 (peep2_reg_dead_p): Ditto.
17401 (peep2_find_free_register): Change "success"
17402 variable type from int to bool
17403 (store_data_bypass_p_1): Change return type from int to bool.
17404 (store_data_bypass_p): Ditto.
17406 2023-06-19 Li Xu <xuli1@eswincomputing.com>
17408 * config/riscv/vector-iterators.md: zvfh/zvfhmin depends on the
17411 2023-06-19 Pan Li <pan2.li@intel.com>
17414 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
17416 * config/riscv/vector-iterators.md: Remove VWLMUL1, VWLMUL1_ZVE64,
17417 VWLMUL1_ZVE32, VI_ZVE64, VI_ZVE32, VWI, VWI_ZVE64, VWI_ZVE32,
17418 VF_ZVE63 and VF_ZVE32.
17419 * config/riscv/vector.md
17420 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Removed.
17421 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
17422 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>): Ditto.
17423 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
17424 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
17425 (@pred_widen_reduc_plus<v_su><VQI:mode><VHI_LMUL1:mode>): New pattern.
17426 (@pred_widen_reduc_plus<v_su><VHI:mode><VSI_LMUL1:mode>): Ditto.
17427 (@pred_widen_reduc_plus<v_su><VSI:mode><VDI_LMUL1:mode>): Ditto.
17428 (@pred_widen_reduc_plus<order><VHF:mode><VSF_LMUL1:mode>): Ditto.
17429 (@pred_widen_reduc_plus<order><VSF:mode><VDF_LMUL1:mode>): Ditto.
17431 2023-06-19 Pan Li <pan2.li@intel.com>
17434 * config/riscv/riscv-vector-builtins-bases.cc: Adjust expand for
17436 * config/riscv/vector-iterators.md: Add VHF, VSF, VDF,
17437 VHF_LMUL1, VSF_LMUL1, VDF_LMUL1, and remove unused attr.
17438 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): Removed.
17439 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
17440 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
17441 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
17442 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
17443 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
17444 (@pred_reduc_<reduc><VHF:mode><VHF_LMUL1:mode>): New pattern.
17445 (@pred_reduc_<reduc><VSF:mode><VSF_LMUL1:mode>): Ditto.
17446 (@pred_reduc_<reduc><VDF:mode><VDF_LMUL1:mode>): Ditto.
17447 (@pred_reduc_plus<order><VHF:mode><VHF_LMUL1:mode>): Ditto.
17448 (@pred_reduc_plus<order><VSF:mode><VSF_LMUL1:mode>): Ditto.
17449 (@pred_reduc_plus<order><VDF:mode><VDF_LMUL1:mode>): Ditto.
17451 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17453 * config/gcn/gcn.cc (gcn_expand_divmod_libfunc): New function.
17454 (gcn_init_libfuncs): Add div and mod functions for all modes.
17455 Add placeholders for divmod functions.
17456 (TARGET_EXPAND_DIVMOD_LIBFUNC): Define.
17458 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17460 * tree-vect-generic.cc: Include optabs-libfuncs.h.
17461 (get_compute_type): Check optab_libfunc.
17462 * tree-vect-stmts.cc: Include optabs-libfuncs.h.
17463 (vectorizable_operation): Check optab_libfunc.
17465 2023-06-19 Andrew Stubbs <ams@codesourcery.com>
17467 * config/gcn/gcn-protos.h (vgpr_4reg_mode_p): New function.
17468 * config/gcn/gcn-valu.md (V_4REG, V_4REG_ALT): New iterators.
17469 (V_MOV, V_MOV_ALT): Likewise.
17470 (scalar_mode, SCALAR_MODE): Add TImode.
17471 (vnsi, VnSI, vndi, VnDI): Likewise.
17472 (vec_merge, vec_merge_with_clobber, vec_merge_with_vcc): Use V_MOV.
17473 (mov<mode>, mov<mode>_unspec): Use V_MOV.
17474 (*mov<mode>_4reg): New insn.
17475 (mov<mode>_exec): New 4reg variant.
17476 (mov<mode>_sgprbase): Likewise.
17477 (reload_in<mode>, reload_out<mode>): Use V_MOV.
17478 (vec_set<mode>): Likewise.
17479 (vec_duplicate<mode><exec>): New 4reg variant.
17480 (vec_extract<mode><scalar_mode>): Likewise.
17481 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
17482 (vec_extract<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
17483 (vec_extract<V_4REG:mode><V_4REG_ALT:mode>_nop): New 4reg variant.
17484 (fold_extract_last_<mode>): Use V_MOV.
17485 (vec_init<V_ALL:mode><V_ALL_ALT:mode>): Rename to ...
17486 (vec_init<V_MOV:mode><V_MOV_ALT:mode>): ... this, and use V_MOV.
17487 (gather_load<mode><vnsi>, gather<mode>_expr<exec>,
17488 gather<mode>_insn_1offset<exec>, gather<mode>_insn_1offset_ds<exec>,
17489 gather<mode>_insn_2offsets<exec>): Use V_MOV.
17490 (scatter_store<mode><vnsi>, scatter<mode>_expr<exec_scatter>,
17491 scatter<mode>_insn_1offset<exec_scatter>,
17492 scatter<mode>_insn_1offset_ds<exec_scatter>,
17493 scatter<mode>_insn_2offsets<exec_scatter>): Likewise.
17494 (maskload<mode>di, maskstore<mode>di, mask_gather_load<mode><vnsi>,
17495 mask_scatter_store<mode><vnsi>): Likewise.
17496 * config/gcn/gcn.cc (gcn_class_max_nregs): Use vgpr_4reg_mode_p.
17497 (gcn_hard_regno_mode_ok): Likewise.
17498 (GEN_VNM): Add TImode support.
17499 (USE_TI): New macro. Separate TImode operations from non-TImode ones.
17500 (gcn_vector_mode_supported_p): Add V64TImode, V32TImode, V16TImode,
17501 V8TImode, and V2TImode.
17502 (print_operand): Add 'J' and 'K' print codes.
17504 2023-06-19 Richard Biener <rguenther@suse.de>
17506 PR tree-optimization/110298
17507 * tree-ssa-loop-ivcanon.cc (tree_unroll_loops_completely):
17508 Clear number of iterations info before cleaning up the CFG.
17510 2023-06-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17512 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
17513 Simplify vec_concat of lowpart subreg and high part vec_select.
17515 2023-06-19 Tobias Burnus <tobias@codesourcery.com>
17517 * doc/invoke.texi (-foffload-options): Remove '-O3' from the examples.
17519 2023-06-19 Richard Sandiford <richard.sandiford@arm.com>
17521 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
17522 Handle null niters_skip.
17524 2023-06-19 Richard Biener <rguenther@suse.de>
17526 * config/aarch64/aarch64.cc
17527 (aarch64_vector_costs::analyze_loop_vinfo): Fix reference
17528 to LOOP_VINFO_MASKS.
17530 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
17533 * common/config/avr/avr-common.cc: Remove setting
17534 of OPT_fdelete_null_pointer_checks.
17535 * config/avr/avr.cc (avr_option_override): Clear
17536 flag_delete_null_pointer_checks if zero_address_valid.
17537 (avr_addr_space_zero_address_valid): New function.
17538 (TARGET_ADDR_SPACE_ZERO_ADDRESS_VALID): Provide target
17541 2023-06-19 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
17542 Robin Dapp <rdapp.gcc@gmail.com>
17544 * doc/md.texi: Add len_mask{load,store}.
17545 * genopinit.cc (main): Ditto.
17547 * internal-fn.cc (len_maskload_direct): Ditto.
17548 (len_maskstore_direct): Ditto.
17549 (expand_call_mem_ref): Ditto.
17550 (expand_partial_load_optab_fn): Ditto.
17551 (expand_len_maskload_optab_fn): Ditto.
17552 (expand_partial_store_optab_fn): Ditto.
17553 (expand_len_maskstore_optab_fn): Ditto.
17554 (direct_len_maskload_optab_supported_p): Ditto.
17555 (direct_len_maskstore_optab_supported_p): Ditto.
17556 * internal-fn.def (LEN_MASK_LOAD): Ditto.
17557 (LEN_MASK_STORE): Ditto.
17558 * optabs.def (OPTAB_CD): Ditto.
17560 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17562 * config/riscv/autovec.md (<optab><mode>2): Add unop expanders.
17564 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17566 * config/riscv/autovec.md (<optab><mode>3): Implement binop
17568 * config/riscv/riscv-protos.h (emit_vlmax_fp_insn): Declare.
17569 (enum vxrm_field_enum): Rename this...
17570 (enum fixed_point_rounding_mode): ...to this.
17571 (enum frm_field_enum): Rename this...
17572 (enum floating_point_rounding_mode): ...to this.
17573 * config/riscv/riscv-v.cc (emit_vlmax_fp_insn): New function
17574 * config/riscv/riscv.cc (riscv_const_insns): Clarify const
17576 (riscv_libgcc_floating_mode_supported_p): Adjust comment.
17577 (riscv_excess_precision): Do not convert to float for ZVFH.
17578 * config/riscv/vector-iterators.md: Add VF_AUTO iterator.
17580 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17582 * config/riscv/vector-iterators.md: Add VI_QH iterator.
17583 * config/riscv/autovec-opt.md
17584 (@pred_extract_first_sextdi<mode>): New vmv.x.s pattern
17585 that includes sign extension.
17586 (@pred_extract_first_sextsi<mode>): Dito for SImode.
17588 2023-06-19 Robin Dapp <rdapp@ventanamicro.com>
17590 * config/riscv/autovec.md (vec_set<mode>): Implement.
17591 (vec_extract<mode><vel>): Implement.
17592 * config/riscv/riscv-protos.h (enum insn_type): Add slide insn.
17593 (emit_vlmax_slide_insn): Declare.
17594 (emit_nonvlmax_slide_tu_insn): Declare.
17595 (emit_scalar_move_insn): Export.
17596 (emit_nonvlmax_integer_move_insn): Export.
17597 * config/riscv/riscv-v.cc (emit_vlmax_slide_insn): New function.
17598 (emit_nonvlmax_slide_tu_insn): New function.
17599 (emit_vlmax_masked_mu_insn): No change.
17600 (emit_vlmax_integer_move_insn): Export.
17602 2023-06-19 Richard Biener <rguenther@suse.de>
17604 * tree-vectorizer.h (enum vect_partial_vector_style): New.
17605 (_loop_vec_info::partial_vector_style): Likewise.
17606 (LOOP_VINFO_PARTIAL_VECTORS_STYLE): Likewise.
17607 (rgroup_controls::compare_type): Add.
17608 (vec_loop_masks): Change from a typedef to auto_vec<>
17610 * tree-vect-loop-manip.cc (vect_set_loop_condition_partial_vectors):
17611 Adjust. Convert niters_skip to compare_type.
17612 (vect_set_loop_condition_partial_vectors_avx512): New function
17613 implementing the AVX512 partial vector codegen.
17614 (vect_set_loop_condition): Dispatch to the correct
17615 vect_set_loop_condition_partial_vectors_* function based on
17616 LOOP_VINFO_PARTIAL_VECTORS_STYLE.
17617 (vect_prepare_for_masked_peels): Compute LOOP_VINFO_MASK_SKIP_NITERS
17618 in the original niter type.
17619 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Initialize
17620 partial_vector_style.
17621 (can_produce_all_loop_masks_p): Adjust.
17622 (vect_verify_full_masking): Produce the rgroup_controls vector
17623 here. Set LOOP_VINFO_PARTIAL_VECTORS_STYLE on success.
17624 (vect_verify_full_masking_avx512): New function implementing
17625 verification of AVX512 style masking.
17626 (vect_verify_loop_lens): Set LOOP_VINFO_PARTIAL_VECTORS_STYLE.
17627 (vect_analyze_loop_2): Also try AVX512 style masking.
17629 (vect_estimate_min_profitable_iters): Implement AVX512 style
17630 mask producing cost.
17631 (vect_record_loop_mask): Do not build the rgroup_controls
17632 vector here but record masks in a hash-set.
17633 (vect_get_loop_mask): Implement AVX512 style mask query,
17634 complementing the existing while_ult style.
17636 2023-06-19 Richard Biener <rguenther@suse.de>
17638 * tree-vectorizer.h (vect_get_loop_mask): Add loop_vec_info
17640 * tree-vect-loop.cc (vect_get_loop_mask): Likewise.
17641 (vectorize_fold_left_reduction): Adjust.
17642 (vect_transform_reduction): Likewise.
17643 (vectorizable_live_operation): Likewise.
17644 * tree-vect-stmts.cc (vectorizable_call): Likewise.
17645 (vectorizable_operation): Likewise.
17646 (vectorizable_store): Likewise.
17647 (vectorizable_load): Likewise.
17648 (vectorizable_condition): Likewise.
17650 2023-06-19 Senthil Kumar Selvaraj <saaadhu@gcc.gnu.org>
17653 * config/avr/avr.opt (mgas-isr-prologues, mmain-is-OS_task):
17654 Add Optimization option property.
17656 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17658 * config/xtensa/xtensa.cc (xtensa_constantsynth_2insn):
17659 Add new pattern for the abovementioned case.
17661 2023-06-19 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
17663 * config/xtensa/xtensa.cc
17664 (TARGET_MEMORY_MOVE_COST, xtensa_memory_move_cost): Remove.
17666 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
17668 * config/rs6000/rs6000.cc (TARGET_CONST_ANCHOR): New define.
17670 2023-06-19 Jiufu Guo <guojiufu@linux.ibm.com>
17672 * cse.cc (try_const_anchors): Check SCALAR_INT_MODE.
17674 2023-06-19 liuhongt <hongtao.liu@intel.com>
17677 * config/i386/sse.md (<sse2_avx2>_packsswb<mask_name>):
17679 (sse2_packsswb<mask_name>): .. this, ..
17680 (avx2_packsswb<mask_name>): .. this and ..
17681 (avx512bw_packsswb<mask_name>): .. this.
17682 (<sse2_avx2>_packssdw<mask_name>): Substitute with ..
17683 (sse2_packssdw<mask_name>): .. this, ..
17684 (avx2_packssdw<mask_name>): .. this and ..
17685 (avx512bw_packssdw<mask_name>): .. this.
17687 2023-06-19 liuhongt <hongtao.liu@intel.com>
17690 * config/i386/i386-expand.cc (ix86_split_mmx_pack): Use
17691 UNSPEC_US_TRUNCATE instead of original us_truncate for
17693 * config/i386/mmx.md (mmx_pack<s_trunsuffix>swb): Substitute
17695 (mmx_packsswb): .. this and ..
17696 (mmx_packuswb): .. this.
17697 (mmx_packusdw): Use UNSPEC_US_TRUNCATE instead of original
17699 (s_trunsuffix): Removed code iterator.
17700 (any_s_truncate): Ditto.
17701 * config/i386/sse.md (<sse2_avx2>_packuswb<mask_name>): Use
17702 UNSPEC_US_TRUNCATE instead of original us_truncate.
17703 (<sse4_1_avx2>_packusdw<mask_name>): Ditto.
17704 * config/i386/i386.md (UNSPEC_US_TRUNCATE): New unspec_c_enum.
17706 2023-06-18 Pan Li <pan2.li@intel.com>
17708 * config/riscv/riscv-vector-builtins-bases.cc: Fix one typo.
17710 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
17712 * rtl.h (*rtx_equal_p_callback_function):
17713 Change return type from int to bool.
17714 (rtx_equal_p): Ditto.
17715 (*hash_rtx_callback_function): Ditto.
17716 * rtl.cc (rtx_equal_p): Change return type from int to bool
17717 and adjust function body accordingly.
17718 * early-remat.cc (scratch_equal): Ditto.
17719 * sel-sched-ir.cc (skip_unspecs_callback): Ditto.
17720 (hash_with_unspec_callback): Ditto.
17722 2023-06-18 Jeff Law <jlaw@ventanamicro.com>
17724 * config/arc/arc.md (movqi_insn): Allow certain constants to
17725 be stored into memory in the pattern's condition.
17726 (movsf_insn): Similarly.
17728 2023-06-18 Honza <jh@ryzen3.suse.cz>
17730 PR tree-optimization/109849
17731 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Add new parameter
17732 ES; handle ipa_predicate::not_sra_candidate.
17733 (evaluate_properties_for_edge): Pass es to
17734 evaluate_conditions_for_known_args.
17735 (ipa_fn_summary_t::duplicate): Handle sra candidates.
17736 (dump_ipa_call_summary): Dump points_to_possible_sra_candidate.
17737 (load_or_store_of_ptr_parameter): New function.
17738 (points_to_possible_sra_candidate_p): New function.
17739 (analyze_function_body): Initialize points_to_possible_sra_candidate;
17740 determine sra predicates.
17741 (estimate_ipcp_clone_size_and_time): Update call of
17742 evaluate_conditions_for_known_args.
17743 (remap_edge_params): Update points_to_possible_sra_candidate.
17744 (read_ipa_call_summary): Stream points_to_possible_sra_candidate
17745 (write_ipa_call_summary): Likewise.
17746 * ipa-predicate.cc (ipa_predicate::add_clause): Handle not_sra_candidate.
17747 (dump_condition): Dump it.
17748 * ipa-predicate.h (struct inline_param_summary): Add
17749 points_to_possible_sra_candidate.
17751 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
17753 * config/i386/i386-expand.cc (ix86_expand_carry): New helper
17754 function for setting the carry flag.
17755 (ix86_expand_builtin) <handlecarry>: Use it here.
17756 * config/i386/i386-protos.h (ix86_expand_carry): Prototype here.
17757 * config/i386/i386.md (uaddc<mode>5): Use ix86_expand_carry.
17758 (usubc<mode>5): Likewise.
17760 2023-06-18 Roger Sayle <roger@nextmovesoftware.com>
17762 * config/i386/i386.md (*concat<mode><dwi>3_1): Use QImode
17763 for the immediate constant shift count.
17764 (*concat<mode><dwi>3_2): Likewise.
17765 (*concat<mode><dwi>3_3): Likewise.
17766 (*concat<mode><dwi>3_4): Likewise.
17767 (*concat<mode><dwi>3_5): Likewise.
17768 (*concat<mode><dwi>3_6): Likewise.
17770 2023-06-18 Uros Bizjak <ubizjak@gmail.com>
17772 * cse.cc (hash_rtx_cb): Rename to hash_rtx.
17773 (hash_rtx): Remove.
17774 * early-remat.cc (remat_candidate_hasher::equal): Update
17775 to call rtx_equal_p with rtx_equal_p_callback_function argument.
17776 * rtl.cc (rtx_equal_p_cb): Rename to rtx_equal_p.
17777 (rtx_equal_p): Remove.
17778 * rtl.h (rtx_equal_p): Add rtx_equal_p_callback_function
17779 argument with NULL default value.
17780 (rtx_equal_p_cb): Remove function declaration.
17781 (hash_rtx_cb): Ditto.
17782 (hash_rtx): Add hash_rtx_callback_function argument
17783 with NULL default value.
17784 * sel-sched-ir.cc (free_nop_pool): Update function comment.
17785 (skip_unspecs_callback): Ditto.
17786 (vinsn_init): Update to call hash_rtx with
17787 hash_rtx_callback_function argument.
17788 (vinsn_equal_p): Ditto.
17790 2023-06-18 yulong <shiyulong@iscas.ac.cn>
17792 * config/riscv/genrvv-type-indexer.cc (valid_type): Enable FP16 tuple.
17793 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
17794 (ADJUST_ALIGNMENT): Ditto.
17795 (RVV_TUPLE_PARTIAL_MODES): Ditto.
17796 (ADJUST_NUNITS): Ditto.
17797 * config/riscv/riscv-vector-builtins-types.def (vfloat16mf4x2_t):
17799 (vfloat16mf4x3_t): Ditto.
17800 (vfloat16mf4x4_t): Ditto.
17801 (vfloat16mf4x5_t): Ditto.
17802 (vfloat16mf4x6_t): Ditto.
17803 (vfloat16mf4x7_t): Ditto.
17804 (vfloat16mf4x8_t): Ditto.
17805 (vfloat16mf2x2_t): Ditto.
17806 (vfloat16mf2x3_t): Ditto.
17807 (vfloat16mf2x4_t): Ditto.
17808 (vfloat16mf2x5_t): Ditto.
17809 (vfloat16mf2x6_t): Ditto.
17810 (vfloat16mf2x7_t): Ditto.
17811 (vfloat16mf2x8_t): Ditto.
17812 (vfloat16m1x2_t): Ditto.
17813 (vfloat16m1x3_t): Ditto.
17814 (vfloat16m1x4_t): Ditto.
17815 (vfloat16m1x5_t): Ditto.
17816 (vfloat16m1x6_t): Ditto.
17817 (vfloat16m1x7_t): Ditto.
17818 (vfloat16m1x8_t): Ditto.
17819 (vfloat16m2x2_t): Ditto.
17820 (vfloat16m2x3_t): Ditto.
17821 (vfloat16m2x4_t): Ditto.
17822 (vfloat16m4x2_t): Ditto.
17823 * config/riscv/riscv-vector-builtins.def (vfloat16mf4x2_t): New macro.
17824 (vfloat16mf4x3_t): Ditto.
17825 (vfloat16mf4x4_t): Ditto.
17826 (vfloat16mf4x5_t): Ditto.
17827 (vfloat16mf4x6_t): Ditto.
17828 (vfloat16mf4x7_t): Ditto.
17829 (vfloat16mf4x8_t): Ditto.
17830 (vfloat16mf2x2_t): Ditto.
17831 (vfloat16mf2x3_t): Ditto.
17832 (vfloat16mf2x4_t): Ditto.
17833 (vfloat16mf2x5_t): Ditto.
17834 (vfloat16mf2x6_t): Ditto.
17835 (vfloat16mf2x7_t): Ditto.
17836 (vfloat16mf2x8_t): Ditto.
17837 (vfloat16m1x2_t): Ditto.
17838 (vfloat16m1x3_t): Ditto.
17839 (vfloat16m1x4_t): Ditto.
17840 (vfloat16m1x5_t): Ditto.
17841 (vfloat16m1x6_t): Ditto.
17842 (vfloat16m1x7_t): Ditto.
17843 (vfloat16m1x8_t): Ditto.
17844 (vfloat16m2x2_t): Ditto.
17845 (vfloat16m2x3_t): Ditto.
17846 (vfloat16m2x4_t): Ditto.
17847 (vfloat16m4x2_t): Ditto.
17848 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): New.
17849 * config/riscv/riscv.md: New.
17850 * config/riscv/vector-iterators.md: New.
17852 2023-06-17 Roger Sayle <roger@nextmovesoftware.com>
17854 * config/i386/i386-expand.cc (ix86_expand_move): Check that OP1 is
17855 CONST_WIDE_INT_P before calling ix86_convert_wide_int_to_broadcast.
17856 Generalize special case for converting TImode to V1TImode to handle
17857 all 128-bit vector conversions.
17859 2023-06-17 Costas Argyris <costas.argyris@gmail.com>
17861 * gcc-ar.cc (main): Refactor to slightly reduce code
17862 duplication. Avoid unnecessary elements in nargv.
17864 2023-06-16 Pan Li <pan2.li@intel.com>
17867 * config/riscv/riscv-vector-builtins-bases.cc: Add ret_mode for
17868 integer reduction expand.
17869 * config/riscv/vector-iterators.md: Add VQI, VHI, VSI and VDI,
17870 and the LMUL1 attr respectively.
17871 * config/riscv/vector.md
17872 (@pred_reduc_<reduc><mode><vlmul1>): Removed.
17873 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Likewise.
17874 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Likewise.
17875 (@pred_reduc_<reduc><VQI:mode><VQI_LMUL1:mode>): New pattern.
17876 (@pred_reduc_<reduc><VHI:mode><VHI_LMUL1:mode>): Likewise.
17877 (@pred_reduc_<reduc><VSI:mode><VSI_LMUL1:mode>): Likewise.
17878 (@pred_reduc_<reduc><VDI:mode><VDI_LMUL1:mode>): Likewise.
17880 2023-06-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
17883 * config/riscv/riscv-vsetvl.cc (insert_vsetvl): Fix bug.
17885 2023-06-16 Jakub Jelinek <jakub@redhat.com>
17887 PR middle-end/79173
17888 * builtin-types.def (BT_FN_UINT_UINT_UINT_UINT_UINTPTR,
17889 BT_FN_ULONG_ULONG_ULONG_ULONG_ULONGPTR,
17890 BT_FN_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONG_ULONGLONGPTR): New
17892 * builtins.def (BUILT_IN_ADDC, BUILT_IN_ADDCL, BUILT_IN_ADDCLL,
17893 BUILT_IN_SUBC, BUILT_IN_SUBCL, BUILT_IN_SUBCLL): New builtins.
17894 * builtins.cc (fold_builtin_addc_subc): New function.
17895 (fold_builtin_varargs): Handle BUILT_IN_{ADD,SUB}C{,L,LL}.
17896 * doc/extend.texi (__builtin_addc, __builtin_subc): Document.
17898 2023-06-16 Jakub Jelinek <jakub@redhat.com>
17900 PR tree-optimization/110271
17901 * tree-ssa-math-opts.cc (math_opts_dom_walker::after_dom_children)
17902 <case PLUS_EXPR>: Ignore return value from match_arith_overflow,
17903 instead call match_uaddc_usubc only if gsi_stmt (gsi) is still stmt.
17905 2023-06-16 Martin Jambor <mjambor@suse.cz>
17907 * configure: Regenerate.
17909 2023-06-16 Roger Sayle <roger@nextmovesoftware.com>
17910 Uros Bizjak <ubizjak@gmail.com>
17913 * config/i386/i386.md (*add<dwi>3_doubleword_concat): New
17914 define_insn_and_split combine *add<dwi>3_doubleword with
17915 a *concat<mode><dwi>3 for more efficient lowering after reload.
17917 2023-06-16 Vladimir N. Makarov <vmakarov@redhat.com>
17919 * ira-lives.cc: Include except.h.
17920 (process_bb_node_lives): Ignore conflicts from cleanup exceptions
17921 when the pseudo does not live at the exception landing pad.
17923 2023-06-16 Alex Coplan <alex.coplan@arm.com>
17925 * doc/invoke.texi: Document -Welaborated-enum-base.
17927 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17929 * config/aarch64/aarch64-simd-builtins.def (shrn2_n): Rename builtins to...
17930 (ushrn2_n): ... This.
17931 (sqshrn2_n): Rename builtins to...
17932 (ssqshrn2_n): ... This.
17933 (uqshrn2_n): Rename builtins to...
17934 (uqushrn2_n): ... This.
17935 * config/aarch64/arm_neon.h (vqshrn_high_n_s16): Adjust for the above.
17936 (vqshrn_high_n_s32): Likewise.
17937 (vqshrn_high_n_s64): Likewise.
17938 (vqshrn_high_n_u16): Likewise.
17939 (vqshrn_high_n_u32): Likewise.
17940 (vqshrn_high_n_u64): Likewise.
17941 (vshrn_high_n_s16): Likewise.
17942 (vshrn_high_n_s32): Likewise.
17943 (vshrn_high_n_s64): Likewise.
17944 (vshrn_high_n_u16): Likewise.
17945 (vshrn_high_n_u32): Likewise.
17946 (vshrn_high_n_u64): Likewise.
17947 * config/aarch64/aarch64-simd.md (aarch64_<shrn_op>shrn2_n<mode>_insn_le):
17949 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_le): ... This.
17950 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
17951 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): Rename to...
17952 (aarch64_<shrn_op><sra_op>shrn2_n<mode>_insn_be): ... This.
17953 Use SHIFTRT iterator and AARCH64_VALID_SHRN_OP check.
17954 (aarch64_<shrn_op>shrn2_n<mode>): Rename to...
17955 (aarch64_<shrn_op><sra_op>shrn2_n<mode>): ... This.
17956 Update expander for the above.
17958 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
17960 * config/aarch64/aarch64-simd-builtins.def (shrn2): Rename builtins to...
17961 (shrn2_n): ... This.
17962 (rshrn2): Rename builtins to...
17963 (rshrn2_n): ... This.
17964 * config/aarch64/arm_neon.h (vrshrn_high_n_s16): Adjust for the above.
17965 (vrshrn_high_n_s32): Likewise.
17966 (vrshrn_high_n_s64): Likewise.
17967 (vrshrn_high_n_u16): Likewise.
17968 (vrshrn_high_n_u32): Likewise.
17969 (vrshrn_high_n_u64): Likewise.
17970 (vshrn_high_n_s16): Likewise.
17971 (vshrn_high_n_s32): Likewise.
17972 (vshrn_high_n_s64): Likewise.
17973 (vshrn_high_n_u16): Likewise.
17974 (vshrn_high_n_u32): Likewise.
17975 (vshrn_high_n_u64): Likewise.
17976 * config/aarch64/aarch64-simd.md (*aarch64_<srn_op>shrn<mode>2_vect_le):
17978 (*aarch64_<srn_op>shrn<mode>2_vect_be): Likewise.
17979 (aarch64_shrn2<mode>_insn_le): Likewise.
17980 (aarch64_shrn2<mode>_insn_be): Likewise.
17981 (aarch64_shrn2<mode>): Likewise.
17982 (aarch64_rshrn2<mode>_insn_le): Likewise.
17983 (aarch64_rshrn2<mode>_insn_be): Likewise.
17984 (aarch64_rshrn2<mode>): Likewise.
17985 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_le): Likewise.
17986 (aarch64_<shrn_op>shrn2_n<mode>_insn_le): New define_insn.
17987 (aarch64_<sur>q<r>shr<u>n2_n<mode>_insn_be): Delete.
17988 (aarch64_<shrn_op>shrn2_n<mode>_insn_be): New define_insn.
17989 (aarch64_<sur>q<r>shr<u>n2_n<mode>): Delete.
17990 (aarch64_<shrn_op>shrn2_n<mode>): New define_expand.
17991 (aarch64_<shrn_op>rshrn2_n<mode>_insn_le): New define_insn.
17992 (aarch64_<shrn_op>rshrn2_n<mode>_insn_be): New define_insn.
17993 (aarch64_<shrn_op>rshrn2_n<mode>): New define_expand.
17994 (aarch64_sqshrun2_n<mode>_insn_le): New define_insn.
17995 (aarch64_sqshrun2_n<mode>_insn_be): New define_insn.
17996 (aarch64_sqshrun2_n<mode>): New define_expand.
17997 (aarch64_sqrshrun2_n<mode>_insn_le): New define_insn.
17998 (aarch64_sqrshrun2_n<mode>_insn_be): New define_insn.
17999 (aarch64_sqrshrun2_n<mode>): New define_expand.
18000 * config/aarch64/iterators.md (UNSPEC_SQSHRUN, UNSPEC_SQRSHRUN,
18001 UNSPEC_SQSHRN, UNSPEC_UQSHRN, UNSPEC_SQRSHRN, UNSPEC_UQRSHRN):
18002 Delete unspec values.
18003 (VQSHRN_N): Delete int iterator.
18005 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18007 * config/aarch64/aarch64.h (AARCH64_VALID_SHRN_OP): Define.
18008 * config/aarch64/aarch64-simd.md
18009 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): Rename to...
18010 (*aarch64_<shrn_op><shrn_s>shrn_n<mode>_insn<vczle><vczbe>): ... This.
18011 Use SHIFTRT iterator and add AARCH64_VALID_SHRN_OP to condition.
18012 * config/aarch64/iterators.md (shrn_s): New code attribute.
18014 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18016 * config/aarch64/aarch64-simd.md (aarch64_<sur>q<r>shr<u>n_n<mode>):
18018 (aarch64_<shrn_op>shrn_n<mode>): ... This. Reimplement with RTL codes.
18019 (*aarch64_<shrn_op>rshrn_n<mode>_insn): New define_insn.
18020 (aarch64_sqrshrun_n<mode>_insn): Likewise.
18021 (aarch64_sqshrun_n<mode>_insn): Likewise.
18022 (aarch64_<shrn_op>rshrn_n<mode>): New define_expand.
18023 (aarch64_sqshrun_n<mode>): Likewise.
18024 (aarch64_sqrshrun_n<mode>): Likewise.
18025 * config/aarch64/iterators.md (V2XWIDE): Add HI and SI modes.
18027 2023-06-16 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18029 * config/aarch64/aarch64-simd-builtins.def (shrn): Rename builtins to...
18030 (shrn_n): ... This.
18031 (rshrn): Rename builtins to...
18032 (rshrn_n): ... This.
18033 * config/aarch64/arm_neon.h (vshrn_n_s16): Adjust for the above.
18034 (vshrn_n_s32): Likewise.
18035 (vshrn_n_s64): Likewise.
18036 (vshrn_n_u16): Likewise.
18037 (vshrn_n_u32): Likewise.
18038 (vshrn_n_u64): Likewise.
18039 (vrshrn_n_s16): Likewise.
18040 (vrshrn_n_s32): Likewise.
18041 (vrshrn_n_s64): Likewise.
18042 (vrshrn_n_u16): Likewise.
18043 (vrshrn_n_u32): Likewise.
18044 (vrshrn_n_u64): Likewise.
18045 * config/aarch64/aarch64-simd.md
18046 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): Delete.
18047 (aarch64_shrn<mode>): Likewise.
18048 (aarch64_rshrn<mode><vczle><vczbe>_insn): Likewise.
18049 (aarch64_rshrn<mode>): Likewise.
18050 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): Likewise.
18051 (aarch64_<sur>q<r>shr<u>n_n<mode>): Likewise.
18052 (*aarch64_<shrn_op>shrn_n<mode>_insn<vczle><vczbe>): New define_insn.
18053 (*aarch64_<shrn_op>rshrn_n<mode>_insn<vczle><vczbe>): Likewise.
18054 (*aarch64_sqshrun_n<mode>_insn<vczle><vczbe>): Likewise.
18055 (*aarch64_sqrshrun_n<mode>_insn<vczle><vczbe>): Likewise.
18056 (aarch64_<shrn_op>shrn_n<mode>): New define_expand.
18057 (aarch64_<shrn_op>rshrn_n<mode>): Likewise.
18058 (aarch64_sqshrun_n<mode>): Likewise.
18059 (aarch64_sqrshrun_n<mode>): Likewise.
18060 * config/aarch64/iterators.md (ALL_TRUNC): New code iterator.
18061 (TRUNCEXTEND): New code attribute.
18062 (TRUNC_SHIFT): Likewise.
18063 (shrn_op): Likewise.
18064 * config/aarch64/predicates.md (aarch64_simd_umax_quarter_mode):
18067 2023-06-16 Pan Li <pan2.li@intel.com>
18069 * config/riscv/riscv-vsetvl.cc
18070 (pass_vsetvl::global_eliminate_vsetvl_insn): Initialize var by NULL.
18072 2023-06-16 Richard Biener <rguenther@suse.de>
18074 PR tree-optimization/110278
18075 * match.pd (uns < (typeof uns)(uns != 0) -> false): New.
18076 (x != (typeof x)(x == 0) -> true): Likewise.
18078 2023-06-16 Pali Rohár <pali@kernel.org>
18080 * config/i386/mingw-w64.h (CPP_SPEC): Adjust for -mcrtdll=.
18081 (REAL_LIBGCC_SPEC): New define.
18082 * config/i386/mingw.opt: Add mcrtdll=
18083 * config/i386/mingw32.h (CPP_SPEC): Adjust for -mcrtdll=.
18084 (REAL_LIBGCC_SPEC): Adjust for -mcrtdll=.
18085 (STARTFILE_SPEC): Adjust for -mcrtdll=.
18086 * doc/invoke.texi: Add mcrtdll= documentation.
18088 2023-06-16 Simon Dardis <simon.dardis@imgtec.com>
18090 * config/mips/mips.cc (enum mips_code_readable_setting):New enmu.
18091 (mips_handle_code_readable_attr):New static function.
18092 (mips_get_code_readable_attr):New static enum function.
18093 (mips_set_current_function):Set the code_readable mode.
18094 (mips_option_override):Same as above.
18095 * doc/extend.texi:Document code_readable.
18097 2023-06-16 Richard Biener <rguenther@suse.de>
18099 PR tree-optimization/110269
18100 * fold-const.cc (fold_binary_loc): Merge x != 0 folding
18101 with tree_expr_nonzero_p ...
18102 * match.pd (cmp (convert? addr@0) integer_zerop): With this
18105 2023-06-15 Marek Polacek <polacek@redhat.com>
18107 * Makefile.in: Set LD_PICFLAG. Use it. Set enable_host_pie.
18108 Remove NO_PIE_CFLAGS and NO_PIE_FLAG. Pass LD_PICFLAG to
18109 ALL_LINKERFLAGS. Use the "pic" build of libiberty if --enable-host-pie.
18110 * configure.ac (--enable-host-shared): Don't set PICFLAG here.
18111 (--enable-host-pie): New check. Set PICFLAG and LD_PICFLAG after this
18113 * configure: Regenerate.
18114 * doc/install.texi: Document --enable-host-pie.
18116 2023-06-15 Manolis Tsamis <manolis.tsamis@vrull.eu>
18118 * regcprop.cc (maybe_mode_change): Enable stack pointer
18121 2023-06-15 Andrew MacLeod <amacleod@redhat.com>
18123 PR tree-optimization/110266
18124 * gimple-range-fold.cc (adjust_imagpart_expr): Check for integer
18126 (adjust_realpart_expr): Ditto.
18128 2023-06-15 Jan Beulich <jbeulich@suse.com>
18130 * config/i386/sse.md (<avx512>_vec_dup<mode><mask_name>): Use
18133 2023-06-15 Jan Beulich <jbeulich@suse.com>
18135 * config/i386/constraints.md: Mention k and r for B.
18137 2023-06-15 Lulu Cheng <chenglulu@loongson.cn>
18138 Andrew Pinski <apinski@marvell.com>
18141 * config/loongarch/loongarch.md: Modify the register constraints for template
18142 "jumptable" and "indirect_jump" from "r" to "e".
18144 2023-06-15 Xi Ruoyao <xry111@xry111.site>
18146 * config/loongarch/loongarch-tune.h (loongarch_align): New
18148 * config/loongarch/loongarch-def.h (loongarch_cpu_align): New
18150 * config/loongarch/loongarch-def.c (loongarch_cpu_align): Define
18152 * config/loongarch/loongarch.cc
18153 (loongarch_option_override_internal): Set the value of
18154 -falign-functions= if -falign-functions is enabled but no value
18155 is given. Likewise for -falign-labels=.
18157 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18159 PR middle-end/79173
18160 * internal-fn.def (UADDC, USUBC): New internal functions.
18161 * internal-fn.cc (expand_UADDC, expand_USUBC): New functions.
18162 (commutative_ternary_fn_p): Return true also for IFN_UADDC.
18163 * optabs.def (uaddc5_optab, usubc5_optab): New optabs.
18164 * tree-ssa-math-opts.cc (uaddc_cast, uaddc_ne0, uaddc_is_cplxpart,
18165 match_uaddc_usubc): New functions.
18166 (math_opts_dom_walker::after_dom_children): Call match_uaddc_usubc
18167 for PLUS_EXPR, MINUS_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR unless
18168 other optimizations have been successful for those.
18169 * gimple-fold.cc (gimple_fold_call): Handle IFN_UADDC and IFN_USUBC.
18170 * fold-const-call.cc (fold_const_call): Likewise.
18171 * gimple-range-fold.cc (adjust_imagpart_expr): Likewise.
18172 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Likewise.
18173 * doc/md.texi (uaddc<mode>5, usubc<mode>5): Document new named
18175 * config/i386/i386.md (uaddc<mode>5, usubc<mode>5): New
18176 define_expand patterns.
18177 (*setcc_qi_addqi3_cconly_overflow_1_<mode>, *setccc): Split
18178 into NOTE_INSN_DELETED note rather than nop instruction.
18179 (*setcc_qi_negqi_ccc_1_<mode>, *setcc_qi_negqi_ccc_2_<mode>):
18182 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18184 PR middle-end/79173
18185 * config/i386/i386.md (subborrow<mode>): Add alternative with
18186 memory destination and add for it define_peephole2
18187 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer using memory
18188 destination in these patterns.
18190 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18192 PR middle-end/79173
18193 * config/i386/i386.md (*sub<mode>_3, @add<mode>3_carry,
18194 addcarry<mode>, @sub<mode>3_carry, *add<mode>3_cc_overflow_1): Add
18195 define_peephole2 TARGET_READ_MODIFY_WRITE/-Os patterns to prefer
18196 using memory destination in these patterns.
18198 2023-06-15 Jakub Jelinek <jakub@redhat.com>
18200 * gimple-fold.cc (gimple_fold_call): Move handling of arg0
18201 as well as arg1 INTEGER_CSTs for .UBSAN_CHECK_{ADD,SUB,MUL}
18202 and .{ADD,SUB,MUL}_OVERFLOW calls from here...
18203 * fold-const-call.cc (fold_const_call): ... here.
18205 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
18207 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>):
18208 Rename to <su>abd<mode>3.
18209 * config/aarch64/aarch64-sve.md (<su>abd<mode>_3): Rename
18212 2023-06-15 Oluwatamilore Adebayo <oluwatamilore.adebayo@arm.com>
18214 * doc/md.texi (sabd, uabd): Document them.
18215 * internal-fn.def (ABD): Use new optab.
18216 * optabs.def (sabd_optab, uabd_optab): New optabs,
18217 * tree-vect-patterns.cc (vect_recog_absolute_difference):
18218 Recognize the following idiom abs (a - b).
18219 (vect_recog_sad_pattern): Refactor to use
18220 vect_recog_absolute_difference.
18221 (vect_recog_abd_pattern): Use patterns found by
18222 vect_recog_absolute_difference to build a new ABD
18225 2023-06-15 chenxiaolong <chenxl04200420@163.com>
18227 * config/loongarch/loongarch.h (LARCH_CALL_RATIO): Modify the value
18228 of macro LARCH_CALL_RATIO on LoongArch to make it perform optimally.
18230 2023-06-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18232 * config/riscv/riscv-v.cc (shuffle_merge_patterns): New pattern.
18233 (expand_vec_perm_const_1): Add merge optmization.
18235 2023-06-15 Lehua Ding <lehua.ding@rivai.ai>
18238 * config/riscv/riscv.cc (riscv_get_arg_info): Return NULL_RTX for vector mode
18239 (riscv_pass_by_reference): Return true for vector mode
18241 2023-06-15 Pan Li <pan2.li@intel.com>
18243 * config/riscv/autovec-opt.md: Align the predictor sytle.
18244 * config/riscv/autovec.md: Ditto.
18246 2023-06-15 Pan Li <pan2.li@intel.com>
18248 * config/riscv/riscv-v.cc (rvv_builder::get_merge_scalar_mask):
18249 Take elen instead of scalar BITS_PER_WORD.
18250 (expand_vector_init_merge_repeating_sequence): Use inner_bits_size
18251 instead of scaler BITS_PER_WORD.
18253 2023-06-14 Jivan Hakobyan <jivanhakobyan9@gmail.com>
18255 * config/moxie/uclinux.h (MFWRAP_SPEC): Remove
18257 2023-06-14 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18259 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold):
18260 Fix signed comparison warning in loop from npats to enelts.
18262 2023-06-14 Thomas Schwinge <thomas@codesourcery.com>
18264 * gcc.cc (driver_handle_option): Forward host '-lgfortran', '-lm'
18265 to offloading compilation.
18266 * config/gcn/mkoffload.cc (main): Adjust.
18267 * config/nvptx/mkoffload.cc (main): Likewise.
18268 * doc/invoke.texi (foffload-options): Update example.
18270 2023-06-14 liuhongt <hongtao.liu@intel.com>
18273 * config/i386/sse.md (mov<mode>_internal>): Use x instead of v
18274 for alternative 2 since there's no evex version for vpcmpeqd
18277 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
18279 * gcc.cc (LINK_COMMAND_SPEC): Remove mudflap spec handling.
18281 2023-06-13 Jeff Law <jlaw@ventanamicro.com>
18283 * config/sh/divtab.cc: Remove.
18285 2023-06-13 Jakub Jelinek <jakub@redhat.com>
18287 * config/i386/i386.cc (standard_sse_constant_opcode): Remove
18288 superfluous spaces around \t for vpcmpeqd.
18290 2023-06-13 Roger Sayle <roger@nextmovesoftware.com>
18292 * expr.cc (store_constructor) <case VECTOR_TYPE>: Don't bother
18293 clearing vectors with only a single element. Set CLEARED if the
18294 vector was initialized to zero.
18296 2023-06-13 Lehua Ding <lehua.ding@rivai.ai>
18298 * config/riscv/riscv-v.cc (struct mode_vtype_group): Remove duplicate
18301 (TUPLE_ENTRY): Undef.
18303 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18305 * config/riscv/riscv-v.cc (rvv_builder::single_step_npatterns_p): Add comment.
18306 (shuffle_generic_patterns): Ditto.
18307 (expand_vec_perm_const_1): Ditto.
18309 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18311 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): Fix bug.
18312 (shuffle_decompress_patterns): Ditto.
18314 2023-06-13 Richard Biener <rguenther@suse.de>
18316 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Free loop BBs.
18318 2023-06-13 Yanzhang Wang <yanzhang.wang@intel.com>
18319 Kito Cheng <kito.cheng@sifive.com>
18321 * config/riscv/riscv-protos.h (riscv_init_cumulative_args): Set
18322 warning flag if func is not builtin
18323 * config/riscv/riscv.cc
18324 (riscv_scalable_vector_type_p): Determine whether the type is scalable vector.
18325 (riscv_arg_has_vector): Determine whether the arg is vector type.
18326 (riscv_pass_in_vector_p): Check the vector type param is passed by value.
18327 (riscv_init_cumulative_args): The same as header.
18328 (riscv_get_arg_info): Add the checking.
18329 (riscv_function_value): Check the func return and set warning flag
18330 * config/riscv/riscv.h (INIT_CUMULATIVE_ARGS): Add a flag to
18331 determine whether warning psabi or not.
18333 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18335 * config/arm/arm-opts.h (enum arm_tp_type): Remove TP_CP15.
18336 Add TP_TPIDRURW, TP_TPIDRURO, TP_TPIDRPRW values.
18337 * config/arm/arm-protos.h (arm_output_load_tpidr): Declare prototype.
18338 * config/arm/arm.cc (arm_option_reconfigure_globals): Replace TP_CP15
18340 (arm_output_load_tpidr): Define.
18341 * config/arm/arm.h (TARGET_HARD_TP): Define in terms of TARGET_SOFT_TP.
18342 * config/arm/arm.md (load_tp_hard): Call arm_output_load_tpidr to output
18344 (reload_tp_hard): Likewise.
18345 * config/arm/arm.opt (tpidrurw, tpidruro, tpidrprw): New values for
18347 * doc/invoke.texi (Arm Options, mtp): Document new values.
18349 2023-06-13 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18352 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Add
18353 AARCH64_TPIDRRO_EL0 value.
18354 * config/aarch64/aarch64.cc (aarch64_output_load_tp): Define.
18355 * config/aarch64/aarch64.opt (tpidr_el0, tpidr_el1, tpidr_el2,
18356 tpidr_el3, tpidrro_el3): New accepted values to -mtp=.
18357 * doc/invoke.texi (AArch64 Options): Document new -mtp= options.
18359 2023-06-13 Alexandre Oliva <oliva@adacore.com>
18361 * range-op-float.cc (frange_nextafter): Drop inline.
18362 (frelop_early_resolve): Add static.
18363 (frange_float): Likewise.
18365 2023-06-13 Richard Biener <rguenther@suse.de>
18367 PR middle-end/110232
18368 * fold-const.cc (native_interpret_vector): Use TYPE_SIZE_UNIT
18369 to check whether the buffer covers the whole vector.
18371 2023-06-13 Richard Biener <rguenther@suse.de>
18373 * tree-ssa-alias.cc (ref_maybe_used_by_call_p_1): For
18374 .MASK_LOAD and friends set the size of the access to unknown.
18376 2023-06-13 Tejas Belagod <tbelagod@arm.com>
18379 * config/aarch64/aarch64-sve-builtins-base.cc (svlast_impl::fold): Fold sve
18380 calls that have a constant input predicate vector.
18381 (svlast_impl::is_lasta): Query to check if intrinsic is svlasta.
18382 (svlast_impl::is_lastb): Query to check if intrinsic is svlastb.
18383 (svlast_impl::vect_all_same): Check if all vector elements are equal.
18385 2023-06-13 Andi Kleen <ak@linux.intel.com>
18387 * config/i386/gcc-auto-profile: Regenerate.
18389 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18391 * config/riscv/vector-iterators.md: Fix requirement.
18393 2023-06-13 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18395 * config/riscv/riscv-v.cc (emit_vlmax_decompress_insn): New function.
18396 (shuffle_decompress_patterns): New function.
18397 (expand_vec_perm_const_1): Add decompress optimization.
18399 2023-06-12 Jeff Law <jlaw@ventanamicro.com>
18401 PR rtl-optimization/101188
18402 * postreload.cc (reload_cse_move2add_invalidate): New function,
18404 (reload_cse_move2add): Call reload_cse_move2add_invalidate.
18406 2023-06-12 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
18408 * config/aarch64/aarch64.cc (aarch64_expand_vector_init): Tweak condition
18409 if (n_var == n_elts && n_elts <= 16) to allow a single constant,
18410 and if maxv == 1, use constant element for duplicating into register.
18412 2023-06-12 Tobias Burnus <tobias@codesourcery.com>
18414 * gimplify.cc (gimplify_adjust_omp_clauses_1): Use
18415 GOMP_MAP_FORCE_PRESENT for 'present alloc' implicit mapping.
18416 (gimplify_adjust_omp_clauses): Change
18417 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC} to the equivalent
18418 GOMP_MAP_FORCE_PRESENT.
18419 * omp-low.cc (lower_omp_target): Remove handling of no-longer valid
18420 GOMP_MAP_PRESENT_{TO,TOFROM,FROM,ALLOC}; update map kinds used for
18421 to/from clauses with present modifier.
18423 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18425 PR tree-optimization/110205
18426 * range-op-float.cc (range_operator::fold_range): Add default FII
18428 * range-op-mixed.h (class operator_gt): Add missing final overrides.
18429 * range-op.cc (range_op_handler::fold_range): Add RO_FII case.
18430 (operator_lshift ::update_bitmask): Add final override.
18431 (operator_rshift ::update_bitmask): Add final override.
18432 * range-op.h (range_operator::fold_range): Add FII prototype.
18434 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18436 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
18437 Use range_op_handler directly.
18438 * range-op.cc (range_op_handler::range_op_handler): Unsigned
18439 param instead of tree-code.
18440 (ptr_op_widen_plus_signed): Delete.
18441 (ptr_op_widen_plus_unsigned): Delete.
18442 (ptr_op_widen_mult_signed): Delete.
18443 (ptr_op_widen_mult_unsigned): Delete.
18444 (range_op_table::initialize_integral_ops): Add new opcodes.
18445 * range-op.h (range_op_handler): Use unsigned.
18446 (OP_WIDEN_MULT_SIGNED): New.
18447 (OP_WIDEN_MULT_UNSIGNED): New.
18448 (OP_WIDEN_PLUS_SIGNED): New.
18449 (OP_WIDEN_PLUS_UNSIGNED): New.
18450 (RANGE_OP_TABLE_SIZE): New.
18451 (range_op_table::operator []): Use unsigned.
18452 (range_op_table::set): Use unsigned.
18453 (m_range_tree): Make unsigned.
18454 (ptr_op_widen_mult_signed): Remove.
18455 (ptr_op_widen_mult_unsigned): Remove.
18456 (ptr_op_widen_plus_signed): Remove.
18457 (ptr_op_widen_plus_unsigned): Remove.
18459 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18461 * gimple-range-op.cc (gimple_range_op_handler): Set m_operator
18462 manually as there is no access to the default operator.
18463 (cfn_copysign::fold_range): Don't check for validity.
18464 (cfn_ubsan::fold_range): Ditto.
18465 (gimple_range_op_handler::maybe_builtin_call): Don't set to NULL.
18466 * range-op.cc (default_operator): New.
18467 (range_op_handler::range_op_handler): Use default_operator
18469 (range_op_handler::operator bool): Move from header, compare
18470 against default operator.
18471 (range_op_handler::range_op): New.
18472 * range-op.h (range_op_handler::operator bool): Move.
18474 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18476 * range-op.cc (unified_table): Delete.
18477 (range_op_table operator_table): Instantiate.
18478 (range_op_table::range_op_table): Rename from unified_table.
18479 (range_op_handler::range_op_handler): Use range_op_table.
18480 * range-op.h (range_op_table::operator []): Inline.
18481 (range_op_table::set): Inline.
18483 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18485 * gimple-range-gori.cc (gori_compute::condexpr_adjust): Do not
18487 * gimple-range-op.cc (get_code): Rename from get_code_and_type
18489 (gimple_range_op_handler::supported_p): No need for type.
18490 (gimple_range_op_handler::gimple_range_op_handler): Ditto.
18491 (cfn_copysign::fold_range): Ditto.
18492 (cfn_ubsan::fold_range): Ditto.
18493 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Ditto.
18494 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Ditto.
18495 * range-op-float.cc (operator_plus::op1_range): Ditto.
18496 (operator_mult::op1_range): Ditto.
18497 (range_op_float_tests): Ditto.
18498 * range-op.cc (get_op_handler): Remove.
18499 (range_op_handler::set_op_handler): Remove.
18500 (operator_plus::op1_range): No need for type.
18501 (operator_minus::op1_range): Ditto.
18502 (operator_mult::op1_range): Ditto.
18503 (operator_exact_divide::op1_range): Ditto.
18504 (operator_cast::op1_range): Ditto.
18505 (perator_bitwise_not::fold_range): Ditto.
18506 (operator_negate::fold_range): Ditto.
18507 * range-op.h (range_op_handler::range_op_handler): Remove type param.
18508 (range_cast): No need for type.
18509 (range_op_table::operator[]): Check for enum_code >= 0.
18510 * tree-data-ref.cc (compute_distributive_range): No need for type.
18511 * tree-ssa-loop-unswitch.cc (unswitch_predicate): Ditto.
18512 * value-query.cc (range_query::get_tree_range): Ditto.
18513 * value-relation.cc (relation_oracle::validate_relation): Ditto.
18514 * vr-values.cc (range_of_var_in_loop): Ditto.
18515 (simplify_using_ranges::fold_cond_with_ops): Ditto.
18517 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18519 * range-op-mixed.h (operator_max): Remove final.
18520 * range-op-ptr.cc (pointer_table::pointer_table): Remove MAX_EXPR.
18521 (pointer_table::pointer_table): Remove.
18522 (class hybrid_max_operator): New.
18523 (range_op_table::initialize_pointer_ops): Add hybrid_max_operator.
18524 * range-op.cc (pointer_tree_table): Remove.
18525 (unified_table::unified_table): Comment out MAX_EXPR.
18526 (get_op_handler): Remove check of pointer table.
18527 * range-op.h (class pointer_table): Remove.
18529 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18531 * range-op-mixed.h (operator_min): Remove final.
18532 * range-op-ptr.cc (pointer_table::pointer_table): Remove MIN_EXPR.
18533 (class hybrid_min_operator): New.
18534 (range_op_table::initialize_pointer_ops): Add hybrid_min_operator.
18535 * range-op.cc (unified_table::unified_table): Comment out MIN_EXPR.
18537 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18539 * range-op-mixed.h (operator_bitwise_or): Remove final.
18540 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_IOR_EXPR.
18541 (class hybrid_or_operator): New.
18542 (range_op_table::initialize_pointer_ops): Add hybrid_or_operator.
18543 * range-op.cc (unified_table::unified_table): Comment out BIT_IOR_EXPR.
18545 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18547 * range-op-mixed.h (operator_bitwise_and): Remove final.
18548 * range-op-ptr.cc (pointer_table::pointer_table): Remove BIT_AND_EXPR.
18549 (class hybrid_and_operator): New.
18550 (range_op_table::initialize_pointer_ops): Add hybrid_and_operator.
18551 * range-op.cc (unified_table::unified_table): Comment out BIT_AND_EXPR.
18553 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18555 * Makefile.in (OBJS): Add range-op-ptr.o.
18556 * range-op-mixed.h (update_known_bitmask): Move prototype here.
18557 (minus_op1_op2_relation_effect): Move prototype here.
18558 (wi_includes_zero_p): Move function to here.
18559 (wi_zero_p): Ditto.
18560 * range-op.cc (update_known_bitmask): Remove static.
18561 (wi_includes_zero_p): Move to header.
18562 (wi_zero_p): Move to header.
18563 (minus_op1_op2_relation_effect): Remove static.
18564 (operator_pointer_diff): Move class and routines to range-op-ptr.cc.
18565 (pointer_plus_operator): Ditto.
18566 (pointer_min_max_operator): Ditto.
18567 (pointer_and_operator): Ditto.
18568 (pointer_or_operator): Ditto.
18569 (pointer_table): Ditto.
18570 (range_op_table::initialize_pointer_ops): Ditto.
18571 * range-op-ptr.cc: New.
18573 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18575 * range-op-mixed.h (class operator_max): Move from...
18576 * range-op.cc (unified_table::unified_table): Add MAX_EXPR.
18577 (get_op_handler): Remove the integral table.
18578 (class operator_max): Move from here.
18579 (integral_table::integral_table): Delete.
18580 * range-op.h (class integral_table): Delete.
18582 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18584 * range-op-mixed.h (class operator_min): Move from...
18585 * range-op.cc (unified_table::unified_table): Add MIN_EXPR.
18586 (class operator_min): Move from here.
18587 (integral_table::integral_table): Remove MIN_EXPR.
18589 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18591 * range-op-mixed.h (class operator_bitwise_or): Move from...
18592 * range-op.cc (unified_table::unified_table): Add BIT_IOR_EXPR.
18593 (class operator_bitwise_or): Move from here.
18594 (integral_table::integral_table): Remove BIT_IOR_EXPR.
18596 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18598 * range-op-mixed.h (class operator_bitwise_and): Move from...
18599 * range-op.cc (unified_table::unified_table): Add BIT_AND_EXPR.
18600 (get_op_handler): Check for a pointer table entry first.
18601 (class operator_bitwise_and): Move from here.
18602 (integral_table::integral_table): Remove BIT_AND_EXPR.
18604 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18606 * range-op-mixed.h (class operator_bitwise_xor): Move from...
18607 * range-op.cc (unified_table::unified_table): Add BIT_XOR_EXPR.
18608 (class operator_bitwise_xor): Move from here.
18609 (integral_table::integral_table): Remove BIT_XOR_EXPR.
18610 (pointer_table::pointer_table): Remove BIT_XOR_EXPR.
18612 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18614 * range-op-mixed.h (class operator_bitwise_not): Move from...
18615 * range-op.cc (unified_table::unified_table): Add BIT_NOT_EXPR.
18616 (class operator_bitwise_not): Move from here.
18617 (integral_table::integral_table): Remove BIT_NOT_EXPR.
18618 (pointer_table::pointer_table): Remove BIT_NOT_EXPR.
18620 2023-06-12 Andrew MacLeod <amacleod@redhat.com>
18622 * range-op-mixed.h (class operator_addr_expr): Move from...
18623 * range-op.cc (unified_table::unified_table): Add ADDR_EXPR.
18624 (class operator_addr_expr): Move from here.
18625 (integral_table::integral_table): Remove ADDR_EXPR.
18626 (pointer_table::pointer_table): Remove ADDR_EXPR.
18628 2023-06-12 Pan Li <pan2.li@intel.com>
18630 * config/riscv/riscv-vector-builtins-types.def
18631 (vfloat16m1_t): Add type to lmul1 ops.
18632 (vfloat16m2_t): Likewise.
18633 (vfloat16m4_t): Likewise.
18635 2023-06-12 Richard Biener <rguenther@suse.de>
18637 * tree-ssa-alias.cc (call_may_clobber_ref_p_1): For
18638 .MASK_STORE and friend set the size of the access to
18641 2023-06-12 Tamar Christina <tamar.christina@arm.com>
18643 * config.in: Regenerate.
18644 * configure: Regenerate.
18645 * configure.ac: Remove DEFAULT_MATCHPD_PARTITIONS.
18647 2023-06-12 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18649 * config/riscv/autovec-opt.md
18650 (*v<any_shiftrt:optab><any_extend:optab>trunc<mode>): New pattern.
18651 (*<any_shiftrt:optab>trunc<mode>): Ditto.
18652 * config/riscv/autovec.md (<optab><mode>3): Change to
18653 define_insn_and_split.
18654 (v<optab><mode>3): Ditto.
18655 (trunc<mode><v_double_trunc>2): Ditto.
18657 2023-06-12 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
18659 * simplify-rtx.cc (simplify_const_unary_operation):
18660 Handle US_TRUNCATE, SS_TRUNCATE.
18662 2023-06-12 Eric Botcazou <ebotcazou@adacore.com>
18665 * doc/gm2.texi (Standard procedures): Fix Next link.
18667 2023-06-12 Tamar Christina <tamar.christina@arm.com>
18669 * config.in: Regenerate.
18671 2023-06-12 Andre Vieira <andre.simoesdiasvieira@arm.com>
18673 PR middle-end/110142
18674 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Don't pass
18675 subtype to vect_widened_op_tree and remove subtype parameter, also
18676 remove superfluous overloaded function definition.
18677 (vect_recog_widen_plus_pattern): Remove subtype parameter and dont pass
18678 to call to vect_recog_widen_op_pattern.
18679 (vect_recog_widen_minus_pattern): Likewise.
18681 2023-06-12 liuhongt <hongtao.liu@intel.com>
18683 * config/i386/sse.md (vec_pack<floatprefix>_float_<mode>): New expander.
18684 (vec_unpack_<fixprefix>fix_trunc_lo_<mode>): Ditto.
18685 (vec_unpack_<fixprefix>fix_trunc_hi_<mode>): Ditto.
18686 (vec_unpacks_lo_<mode>): Ditto.
18687 (vec_unpacks_hi_<mode>): Ditto.
18688 (sse_movlhps_<mode>): New define_insn.
18689 (ssse3_palignr<mode>_perm): Extend to V_128H.
18690 (V_128H): New mode iterator.
18691 (ssepackPHmode): New mode attribute.
18692 (vunpck_extract_mode): Ditto.
18693 (vpckfloat_concat_mode): Extend to VxSI/VxSF for _Float16.
18694 (vpckfloat_temp_mode): Ditto.
18695 (vpckfloat_op_mode): Ditto.
18696 (vunpckfixt_mode): Extend to VxHF.
18697 (vunpckfixt_model): Ditto.
18698 (vunpckfixt_extract_mode): Ditto.
18700 2023-06-12 Richard Biener <rguenther@suse.de>
18702 PR middle-end/110200
18703 * genmatch.cc (expr::gen_transform): Put braces around
18704 the if arm for the (convert ...) short-cut.
18706 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
18709 * config/rs6000/rs6000-builtins.def (__builtin_pack_vector_int128,
18710 __builtin_unpack_vector_int128): Move from stanza power7 to vsx.
18712 2023-06-12 Kewen Lin <linkw@linux.ibm.com>
18715 * config/rs6000/rs6000.cc (output_toc): Use the mode of the 128-bit
18716 floating constant itself for real_to_target call.
18718 2023-06-12 Pan Li <pan2.li@intel.com>
18720 * config/riscv/riscv-vector-builtins-types.def
18721 (vfloat16mf4_t): Add type to X2/X4/X8/X16/X32 vlmul ext ops.
18722 (vfloat16mf2_t): Ditto.
18723 (vfloat16m1_t): Ditto.
18724 (vfloat16m2_t): Ditto.
18725 (vfloat16m4_t): Ditto.
18727 2023-06-12 David Edelsohn <dje.gcc@gmail.com>
18729 * config/rs6000/rs6000-logue.cc (rs6000_stack_info):
18730 Do not require a stack frame when debugging is enabled for AIX.
18732 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
18734 * config/avr/avr.md (adjust_len) [insv_notbit_0, insv_notbit_7]:
18735 Remove attribute values.
18736 (insv_notbit): New post-reload insn.
18737 (*insv.not-shiftrt_split, *insv.xor1-bit.0_split)
18738 (*insv.not-bit.0_split, *insv.not-bit.7_split)
18739 (*insv.xor-extract_split): Split to insv_notbit.
18740 (*insv.not-shiftrt, *insv.xor1-bit.0, *insv.not-bit.0, *insv.not-bit.7)
18741 (*insv.xor-extract): Remove post-reload insns.
18742 * config/avr/avr.cc (avr_out_insert_notbit) [bitno]: Remove parameter.
18743 (avr_adjust_insn_length): Adjust call of avr_out_insert_notbit.
18744 [ADJUST_LEN_INSV_NOTBIT_0, ADJUST_LEN_INSV_NOTBIT_7]: Remove cases.
18745 * config/avr/avr-protos.h (avr_out_insert_notbit): Adjust prototype.
18747 2023-06-11 Georg-Johann Lay <avr@gjlay.de>
18750 * config/avr/avr.md (adjust_len) [extr, extr_not]: New elements.
18751 (MSB, SIZE): New mode attributes.
18752 (any_shift): New code iterator.
18753 (*lshr<mode>3_split, *lshr<mode>3, lshr<mode>3)
18754 (*lshr<mode>3_const_split): Add constraint alternative for
18755 the case of shift-offset = MSB. Ditch "length" attribute.
18756 (extzv<mode): New. replaces extzv. Adjust following patterns.
18757 Use avr_out_extr, avr_out_extr_not to print asm.
18758 (*extzv.subreg.<mode>, *extzv.<mode>.subreg, *extzv.xor)
18759 (*extzv<mode>.ge, *neg.ashiftrt<mode>.msb, *extzv.io.lsr7): New.
18760 * config/avr/constraints.md (C15, C23, C31, Yil): New
18761 * config/avr/predicates.md (reg_or_low_io_operand)
18762 (const7_operand, reg_or_low_io_operand)
18763 (const15_operand, const_0_to_15_operand)
18764 (const23_operand, const_0_to_23_operand)
18765 (const31_operand, const_0_to_31_operand): New.
18766 * config/avr/avr-protos.h (avr_out_extr, avr_out_extr_not): New.
18767 * config/avr/avr.cc (avr_out_extr, avr_out_extr_not): New funcs.
18768 (lshrqi3_out, lshrhi3_out, lshrpsi3_out, lshrsi3_out): Adjust
18769 MSB case to new insn constraint "r" for operands[1].
18770 (avr_adjust_insn_length) [ADJUST_LEN_EXTR_NOT, ADJUST_LEN_EXTR]:
18771 Handle these cases.
18772 (avr_rtx_costs_1): Adjust cost for a new pattern.
18774 2023-06-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18776 * config/riscv/riscv-vsetvl.cc (available_occurrence_p): Enhance user vsetvl optimization.
18777 (vector_insn_info::parse_insn): Add rtx_insn parse.
18778 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance user vsetvl optimization.
18779 (get_first_vsetvl): New function.
18780 (pass_vsetvl::global_eliminate_vsetvl_insn): Ditto.
18781 (pass_vsetvl::cleanup_insns): Remove it.
18782 (pass_vsetvl::ssa_post_optimization): New function.
18783 (has_no_uses): Ditto.
18784 (pass_vsetvl::propagate_avl): Remove it.
18785 (pass_vsetvl::df_post_optimization): New function.
18786 (pass_vsetvl::lazy_vsetvl): Rework Phase 5 && Phase 6.
18787 * config/riscv/riscv-vsetvl.h: Adapt declaration.
18789 2023-06-10 Aldy Hernandez <aldyh@redhat.com>
18791 * ipa-cp.cc (ipcp_vr_lattice::init): Take type argument.
18792 (ipcp_vr_lattice::print): Call dump method.
18793 (ipcp_vr_lattice::meet_with): Adjust for m_vr being a
18795 (ipcp_vr_lattice::meet_with_1): Make argument a reference.
18796 (ipcp_vr_lattice::set_to_bottom): Set varying for an unsupported
18798 (initialize_node_lattices): Pass type when appropriate.
18799 (ipa_vr_operation_and_type_effects): Make type agnostic.
18800 (ipa_value_range_from_jfunc): Same.
18801 (propagate_vr_across_jump_function): Same.
18802 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
18803 (evaluate_properties_for_edge): Same.
18804 * ipa-prop.cc (ipa_vr::get_vrange): Same.
18805 (ipcp_update_vr): Same.
18806 * ipa-prop.h (ipa_value_range_from_jfunc): Same.
18807 (ipa_range_set_and_normalize): Same.
18809 2023-06-10 Georg-Johann Lay <avr@gjlay.de>
18813 * config/avr/avr-passes.def (avr_pass_ifelse): Insert new pass.
18814 * config/avr/avr.cc (avr_pass_ifelse): New RTL pass.
18815 (avr_pass_data_ifelse): New pass_data for it.
18816 (make_avr_pass_ifelse, avr_redundant_compare, avr_cbranch_cost)
18817 (avr_canonicalize_comparison, avr_out_plus_set_ZN)
18818 (avr_out_cmp_ext): New functions.
18819 (compare_condtition): Make sure REG_CC dies in the branch insn.
18820 (avr_rtx_costs_1): Add computation of cbranch costs.
18821 (avr_adjust_insn_length) [ADJUST_LEN_ADD_SET_ZN, ADJUST_LEN_CMP_ZEXT]:
18822 [ADJUST_LEN_CMP_SEXT]Handle them.
18823 (TARGET_CANONICALIZE_COMPARISON): New define.
18824 (avr_simplify_comparison_p, compare_diff_p, avr_compare_pattern)
18825 (avr_reorg_remove_redundant_compare, avr_reorg): Remove functions.
18826 (TARGET_MACHINE_DEPENDENT_REORG): Remove define.
18827 * config/avr/avr-protos.h (avr_simplify_comparison_p): Remove proto.
18828 (make_avr_pass_ifelse, avr_out_plus_set_ZN, cc_reg_rtx)
18829 (avr_out_cmp_zext): New Protos
18830 * config/avr/avr.md (branch, difficult_branch): Don't split insns.
18831 (*cbranchhi.zero-extend.0", *cbranchhi.zero-extend.1")
18832 (*swapped_tst<mode>, *add.for.eqne.<mode>): New insns.
18833 (*cbranch<mode>4): Rename to cbranch<mode>4_insn.
18834 (define_peephole): Add dead_or_set_regno_p(insn,REG_CC) as needed.
18835 (define_deephole2): Add peep2_regno_dead_p(*,REG_CC) as needed.
18836 Add new RTL peepholes for decrement-and-branch and *swapped_tst<mode>.
18837 Rework signtest-and-branch peepholes for *sbrx_branch<mode>.
18838 (adjust_len) [add_set_ZN, cmp_zext]: New.
18839 (QIPSI): New mode iterator.
18840 (ALLs1, ALLs2, ALLs4, ALLs234): New mode iterators.
18841 (gelt): New code iterator.
18842 (gelt_eqne): New code attribute.
18843 (rvbranch, *rvbranch, difficult_rvbranch, *difficult_rvbranch)
18844 (branch_unspec, *negated_tst<mode>, *reversed_tst<mode>)
18845 (*cmpqi_sign_extend): Remove insns.
18846 (define_c_enum "unspec") [UNSPEC_IDENTITY]: Remove.
18847 * config/avr/avr-dimode.md (cbranch<mode>4): Canonicalize comparisons.
18848 * config/avr/predicates.md (scratch_or_d_register_operand): New.
18849 * config/avr/constraints.md (Yxx): New constraint.
18851 2023-06-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
18853 * config/riscv/autovec.md (select_vl<mode>): New pattern.
18854 * config/riscv/riscv-protos.h (expand_select_vl): New function.
18855 * config/riscv/riscv-v.cc (expand_select_vl): Ditto.
18857 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18859 * range-op-float.cc (foperator_mult_div_base): Delete.
18860 (foperator_mult_div_base::find_range): Make static local function.
18861 (foperator_mult): Remove. Move prototypes to range-op-mixed.h
18862 (operator_mult::op1_range): Rename from foperator_mult.
18863 (operator_mult::op2_range): Ditto.
18864 (operator_mult::rv_fold): Ditto.
18865 (float_table::float_table): Remove MULT_EXPR.
18866 (class foperator_div): Inherit from range_operator.
18867 (float_table::float_table): Delete.
18868 * range-op-mixed.h (class operator_mult): Combined from integer
18870 * range-op.cc (float_tree_table): Delete.
18871 (op_mult): New object.
18872 (unified_table::unified_table): Add MULT_EXPR.
18873 (get_op_handler): Do not check float table any longer.
18874 (class cross_product_operator): Move to range-op-mixed.h.
18875 (class operator_mult): Move to range-op-mixed.h.
18876 (integral_table::integral_table): Remove MULT_EXPR.
18877 (pointer_table::pointer_table): Remove MULT_EXPR.
18878 * range-op.h (float_table): Remove.
18880 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18882 * range-op-float.cc (foperator_negate): Remove. Move prototypes
18883 to range-op-mixed.h
18884 (operator_negate::fold_range): Rename from foperator_negate.
18885 (operator_negate::op1_range): Ditto.
18886 (float_table::float_table): Remove NEGATE_EXPR.
18887 * range-op-mixed.h (class operator_negate): Combined from integer
18889 * range-op.cc (op_negate): New object.
18890 (unified_table::unified_table): Add NEGATE_EXPR.
18891 (class operator_negate): Move to range-op-mixed.h.
18892 (integral_table::integral_table): Remove NEGATE_EXPR.
18893 (pointer_table::pointer_table): Remove NEGATE_EXPR.
18895 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18897 * range-op-float.cc (foperator_minus): Remove. Move prototypes
18898 to range-op-mixed.h
18899 (operator_minus::fold_range): Rename from foperator_minus.
18900 (operator_minus::op1_range): Ditto.
18901 (operator_minus::op2_range): Ditto.
18902 (operator_minus::rv_fold): Ditto.
18903 (float_table::float_table): Remove MINUS_EXPR.
18904 * range-op-mixed.h (class operator_minus): Combined from integer
18906 * range-op.cc (op_minus): New object.
18907 (unified_table::unified_table): Add MINUS_EXPR.
18908 (class operator_minus): Move to range-op-mixed.h.
18909 (integral_table::integral_table): Remove MINUS_EXPR.
18910 (pointer_table::pointer_table): Remove MINUS_EXPR.
18912 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18914 * range-op-float.cc (foperator_abs): Remove. Move prototypes
18915 to range-op-mixed.h
18916 (operator_abs::fold_range): Rename from foperator_abs.
18917 (operator_abs::op1_range): Ditto.
18918 (float_table::float_table): Remove ABS_EXPR.
18919 * range-op-mixed.h (class operator_abs): Combined from integer
18921 * range-op.cc (op_abs): New object.
18922 (unified_table::unified_table): Add ABS_EXPR.
18923 (class operator_abs): Move to range-op-mixed.h.
18924 (integral_table::integral_table): Remove ABS_EXPR.
18925 (pointer_table::pointer_table): Remove ABS_EXPR.
18927 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18929 * range-op-float.cc (foperator_plus): Remove. Move prototypes
18930 to range-op-mixed.h
18931 (operator_plus::fold_range): Rename from foperator_plus.
18932 (operator_plus::op1_range): Ditto.
18933 (operator_plus::op2_range): Ditto.
18934 (operator_plus::rv_fold): Ditto.
18935 (float_table::float_table): Remove PLUS_EXPR.
18936 * range-op-mixed.h (class operator_plus): Combined from integer
18938 * range-op.cc (op_plus): New object.
18939 (unified_table::unified_table): Add PLUS_EXPR.
18940 (class operator_plus): Move to range-op-mixed.h.
18941 (integral_table::integral_table): Remove PLUS_EXPR.
18942 (pointer_table::pointer_table): Remove PLUS_EXPR.
18944 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18946 * range-op-mixed.h (class operator_cast): Combined from integer
18948 * range-op.cc (op_cast): New object.
18949 (unified_table::unified_table): Add op_cast
18950 (class operator_cast): Move to range-op-mixed.h.
18951 (integral_table::integral_table): Remove op_cast
18952 (pointer_table::pointer_table): Remove op_cast.
18954 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18956 * range-op-float.cc (operator_cst::fold_range): New.
18957 * range-op-mixed.h (class operator_cst): Move from integer file.
18958 * range-op.cc (op_cst): New object.
18959 (unified_table::unified_table): Add op_cst. Also use for REAL_CST.
18960 (class operator_cst): Move to range-op-mixed.h.
18961 (integral_table::integral_table): Remove op_cst.
18962 (pointer_table::pointer_table): Remove op_cst.
18964 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18966 * range-op-float.cc (foperator_identity): Remove. Move prototypes
18967 to range-op-mixed.h
18968 (operator_identity::fold_range): Rename from foperator_identity.
18969 (operator_identity::op1_range): Ditto.
18970 (float_table::float_table): Remove fop_identity.
18971 * range-op-mixed.h (class operator_identity): Combined from integer
18973 * range-op.cc (op_identity): New object.
18974 (unified_table::unified_table): Add op_identity.
18975 (class operator_identity): Move to range-op-mixed.h.
18976 (integral_table::integral_table): Remove identity.
18977 (pointer_table::pointer_table): Remove identity.
18979 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18981 * range-op-float.cc (foperator_ge): Remove. Move prototypes
18982 to range-op-mixed.h
18983 (operator_ge::fold_range): Rename from foperator_ge.
18984 (operator_ge::op1_range): Ditto.
18985 (float_table::float_table): Remove GE_EXPR.
18986 * range-op-mixed.h (class operator_ge): Combined from integer
18988 * range-op.cc (op_ge): New object.
18989 (unified_table::unified_table): Add GE_EXPR.
18990 (class operator_ge): Move to range-op-mixed.h.
18991 (ge_op1_op2_relation): Fold into
18992 operator_ge::op1_op2_relation.
18993 (integral_table::integral_table): Remove GE_EXPR.
18994 (pointer_table::pointer_table): Remove GE_EXPR.
18995 * range-op.h (ge_op1_op2_relation): Delete.
18997 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
18999 * range-op-float.cc (foperator_gt): Remove. Move prototypes
19000 to range-op-mixed.h
19001 (operator_gt::fold_range): Rename from foperator_gt.
19002 (operator_gt::op1_range): Ditto.
19003 (float_table::float_table): Remove GT_EXPR.
19004 * range-op-mixed.h (class operator_gt): Combined from integer
19006 * range-op.cc (op_gt): New object.
19007 (unified_table::unified_table): Add GT_EXPR.
19008 (class operator_gt): Move to range-op-mixed.h.
19009 (gt_op1_op2_relation): Fold into
19010 operator_gt::op1_op2_relation.
19011 (integral_table::integral_table): Remove GT_EXPR.
19012 (pointer_table::pointer_table): Remove GT_EXPR.
19013 * range-op.h (gt_op1_op2_relation): Delete.
19015 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19017 * range-op-float.cc (foperator_le): Remove. Move prototypes
19018 to range-op-mixed.h
19019 (operator_le::fold_range): Rename from foperator_le.
19020 (operator_le::op1_range): Ditto.
19021 (float_table::float_table): Remove LE_EXPR.
19022 * range-op-mixed.h (class operator_le): Combined from integer
19024 * range-op.cc (op_le): New object.
19025 (unified_table::unified_table): Add LE_EXPR.
19026 (class operator_le): Move to range-op-mixed.h.
19027 (le_op1_op2_relation): Fold into
19028 operator_le::op1_op2_relation.
19029 (integral_table::integral_table): Remove LE_EXPR.
19030 (pointer_table::pointer_table): Remove LE_EXPR.
19031 * range-op.h (le_op1_op2_relation): Delete.
19033 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19035 * range-op-float.cc (foperator_lt): Remove. Move prototypes
19036 to range-op-mixed.h
19037 (operator_lt::fold_range): Rename from foperator_lt.
19038 (operator_lt::op1_range): Ditto.
19039 (float_table::float_table): Remove LT_EXPR.
19040 * range-op-mixed.h (class operator_lt): Combined from integer
19042 * range-op.cc (op_lt): New object.
19043 (unified_table::unified_table): Add LT_EXPR.
19044 (class operator_lt): Move to range-op-mixed.h.
19045 (lt_op1_op2_relation): Fold into
19046 operator_lt::op1_op2_relation.
19047 (integral_table::integral_table): Remove LT_EXPR.
19048 (pointer_table::pointer_table): Remove LT_EXPR.
19049 * range-op.h (lt_op1_op2_relation): Delete.
19051 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19053 * range-op-float.cc (foperator_not_equal): Remove. Move prototypes
19054 to range-op-mixed.h
19055 (operator_equal::fold_range): Rename from foperator_not_equal.
19056 (operator_equal::op1_range): Ditto.
19057 (float_table::float_table): Remove NE_EXPR.
19058 * range-op-mixed.h (class operator_not_equal): Combined from integer
19060 * range-op.cc (op_equal): New object.
19061 (unified_table::unified_table): Add NE_EXPR.
19062 (class operator_not_equal): Move to range-op-mixed.h.
19063 (not_equal_op1_op2_relation): Fold into
19064 operator_not_equal::op1_op2_relation.
19065 (integral_table::integral_table): Remove NE_EXPR.
19066 (pointer_table::pointer_table): Remove NE_EXPR.
19067 * range-op.h (not_equal_op1_op2_relation): Delete.
19069 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19071 * range-op-float.cc (foperator_equal): Remove. Move prototypes
19072 to range-op-mixed.h
19073 (operator_equal::fold_range): Rename from foperator_equal.
19074 (operator_equal::op1_range): Ditto.
19075 (float_table::float_table): Remove EQ_EXPR.
19076 * range-op-mixed.h (class operator_equal): Combined from integer
19078 * range-op.cc (op_equal): New object.
19079 (unified_table::unified_table): Add EQ_EXPR.
19080 (class operator_equal): Move to range-op-mixed.h.
19081 (equal_op1_op2_relation): Fold into
19082 operator_equal::op1_op2_relation.
19083 (integral_table::integral_table): Remove EQ_EXPR.
19084 (pointer_table::pointer_table): Remove EQ_EXPR.
19085 * range-op.h (equal_op1_op2_relation): Delete.
19087 2023-06-10 Andrew MacLeod <amacleod@redhat.com>
19089 * range-op-float.cc (class float_table): Move to header.
19090 (float_table::float_table): Move float only operators to...
19091 (range_op_table::initialize_float_ops): Here.
19092 * range-op-mixed.h: New.
19093 * range-op.cc (integral_tree_table, pointer_tree_table): Moved
19095 (float_tree_table): Moved from range-op-float.cc.
19096 (unified_tree_table): New.
19097 (unified_table::unified_table): New. Call initialize routines.
19098 (get_op_handler): Check unified table first.
19099 (range_op_handler::range_op_handler): Handle no type constructor.
19100 (integral_table::integral_table): Move integral only operators to...
19101 (range_op_table::initialize_integral_ops): Here.
19102 (pointer_table::pointer_table): Move pointer only operators to...
19103 (range_op_table::initialize_pointer_ops): Here.
19104 * range-op.h (enum bool_range_state): Move to range-op-mixed.h.
19105 (get_bool_state): Ditto.
19106 (empty_range_varying): Ditto.
19107 (relop_early_resolve): Ditto.
19108 (class range_op_table): Add new init methods for range types.
19109 (class integral_table): Move declaration to here.
19110 (class pointer_table): Move declaration to here.
19111 (class float_table): Move declaration to here.
19113 2023-06-09 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
19114 Richard Sandiford <richard.sandiford@arm.com>
19115 Richard Biener <rguenther@suse.de>
19117 * doc/md.texi: Add SELECT_VL support.
19118 * internal-fn.def (SELECT_VL): Ditto.
19119 * optabs.def (OPTAB_D): Ditto.
19120 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Ditto.
19121 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): Ditto.
19122 * tree-vect-stmts.cc (get_select_vl_data_ref_ptr): Ditto.
19123 (vectorizable_store): Ditto.
19124 (vectorizable_load): Ditto.
19125 * tree-vectorizer.h (LOOP_VINFO_USING_SELECT_VL_P): Ditto.
19127 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
19130 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Check param
19133 2023-06-09 Andrew MacLeod <amacleod@redhat.com>
19135 * range-op.cc (range_cast): Move to...
19136 * range-op.h (range_cast): Here and add generic a version.
19138 2023-06-09 Marek Polacek <polacek@redhat.com>
19142 * doc/invoke.texi: Clarify that -Wmissing-field-initializers doesn't
19143 warn about designated initializers in C only.
19145 2023-06-09 Andrew Pinski <apinski@marvell.com>
19147 PR tree-optimization/97711
19148 PR tree-optimization/110155
19149 * match.pd ((zero_one == 0) ? y : z <op> y): Add plus to the op.
19150 ((zero_one != 0) ? z <op> y : y): Likewise.
19152 2023-06-09 Andrew Pinski <apinski@marvell.com>
19154 * match.pd ((zero_one ==/!= 0) ? y : z <op> y): Use
19155 multiply rather than negation/bit_and.
19157 2023-06-09 Andrew Pinski <apinski@marvell.com>
19159 * match.pd (`X & -Y -> X * Y`): Allow for truncation
19160 and the same type for unsigned types.
19162 2023-06-09 Andrew Pinski <apinski@marvell.com>
19164 PR tree-optimization/110165
19165 PR tree-optimization/110166
19166 * match.pd (zero_one_valued_p): Don't accept
19167 signed 1-bit integers.
19169 2023-06-09 Richard Biener <rguenther@suse.de>
19171 * match.pd (two conversions in a row): Use element_precision
19172 to DTRT for VECTOR_TYPE.
19174 2023-06-09 Pan Li <pan2.li@intel.com>
19176 * config/riscv/riscv.md (enabled): Move to another place, and
19177 add fp_vector_disabled to the cond.
19178 (fp_vector_disabled): New attr defined for disabling fp.
19179 * config/riscv/vector-iterators.md: Fix V_WHOLE and V_FRACT.
19181 2023-06-09 Pan Li <pan2.li@intel.com>
19183 * config/riscv/riscv-protos.h (enum frm_field_enum): Adjust
19186 2023-06-09 liuhongt <hongtao.liu@intel.com>
19189 * config/i386/i386.cc (ix86_gimple_fold_builtin): Explicitly
19190 view_convert_expr mask to signed type when folding pblendvb
19193 2023-06-09 liuhongt <hongtao.liu@intel.com>
19196 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
19197 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} into gimple
19198 ABSU_EXPR + VCE, don't fold _mm_abs_{pi8,pi16,pi32} w/o
19200 * config/i386/i386-builtin.def: Replace CODE_FOR_nothing with
19201 real codename for __builtin_ia32_pabs{b,w,d}.
19203 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19205 * gimple-range-op.cc
19206 (gimple_range_op_handler::gimple_range_op_handler): Adjust.
19207 (gimple_range_op_handler::maybe_builtin_call): Adjust.
19208 * gimple-range-op.h (operand1, operand2): Use m_operator.
19209 * range-op.cc (integral_table, pointer_table): Relocate.
19210 (get_op_handler): Rename from get_handler and handle all types.
19211 (range_op_handler::range_op_handler): Relocate.
19212 (range_op_handler::set_op_handler): Relocate and adjust.
19213 (range_op_handler::range_op_handler): Relocate.
19214 (dispatch_trio): New.
19215 (RO_III, RO_IFI, RO_IFF, RO_FFF, RO_FIF, RO_FII): New consts.
19216 (range_op_handler::dispatch_kind): New.
19217 (range_op_handler::fold_range): Relocate and Use new dispatch value.
19218 (range_op_handler::op1_range): Ditto.
19219 (range_op_handler::op2_range): Ditto.
19220 (range_op_handler::lhs_op1_relation): Ditto.
19221 (range_op_handler::lhs_op2_relation): Ditto.
19222 (range_op_handler::op1_op2_relation): Ditto.
19223 (range_op_handler::set_op_handler): Use m_operator member.
19224 * range-op.h (range_op_handler::operator bool): Use m_operator.
19225 (range_op_handler::dispatch_kind): New.
19226 (range_op_handler::m_valid): Delete.
19227 (range_op_handler::m_int): Delete
19228 (range_op_handler::m_float): Delete
19229 (range_op_handler::m_operator): New.
19230 (range_op_table::operator[]): Relocate from .cc file.
19231 (range_op_table::set): Ditto.
19232 * value-range.h (class vrange): Make range_op_handler a friend.
19234 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19236 * gimple-range-op.cc (cfn_constant_float_p): Change base class.
19237 (cfn_pass_through_arg1): Adjust using statemenmt.
19238 (cfn_signbit): Change base class, adjust using statement.
19239 (cfn_copysign): Ditto.
19241 (cfn_sincos): Ditto.
19242 * range-op-float.cc (fold_range): Change class to range_operator.
19246 (lhs_op1_relation): Ditto.
19247 (lhs_op2_relation): Ditto.
19248 (op1_op2_relation): Ditto.
19249 (foperator_*): Ditto.
19250 (class float_table): New. Inherit from range_op_table.
19251 (floating_tree_table) Change to range_op_table pointer.
19252 (class floating_op_table): Delete.
19253 * range-op.cc (operator_equal): Adjust using statement.
19254 (operator_not_equal): Ditto.
19255 (operator_lt, operator_le, operator_gt, operator_ge): Ditto.
19256 (operator_minus, operator_cast): Ditto.
19257 (operator_bitwise_and, pointer_plus_operator): Ditto.
19258 (get_float_handle): Change return type.
19259 * range-op.h (range_operator_float): Delete. Relocate all methods
19260 into class range_operator.
19261 (range_op_handler::m_float): Change type to range_operator.
19262 (floating_op_table): Delete.
19263 (floating_tree_table): Change type.
19265 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19267 * range-op.cc (range_operator::fold_range): Call virtual routine.
19268 (range_operator::update_bitmask): New.
19269 (operator_equal::update_bitmask): New.
19270 (operator_not_equal::update_bitmask): New.
19271 (operator_lt::update_bitmask): New.
19272 (operator_le::update_bitmask): New.
19273 (operator_gt::update_bitmask): New.
19274 (operator_ge::update_bitmask): New.
19275 (operator_ge::update_bitmask): New.
19276 (operator_plus::update_bitmask): New.
19277 (operator_minus::update_bitmask): New.
19278 (operator_pointer_diff::update_bitmask): New.
19279 (operator_min::update_bitmask): New.
19280 (operator_max::update_bitmask): New.
19281 (operator_mult::update_bitmask): New.
19282 (operator_div:operator_div):New.
19283 (operator_div::update_bitmask): New.
19284 (operator_div::m_code): New member.
19285 (operator_exact_divide::operator_exact_divide): New constructor.
19286 (operator_lshift::update_bitmask): New.
19287 (operator_rshift::update_bitmask): New.
19288 (operator_bitwise_and::update_bitmask): New.
19289 (operator_bitwise_or::update_bitmask): New.
19290 (operator_bitwise_xor::update_bitmask): New.
19291 (operator_trunc_mod::update_bitmask): New.
19292 (op_ident, op_unknown, op_ptr_min_max): New.
19293 (op_nop, op_convert): Delete.
19294 (op_ssa, op_paren, op_obj_type): Delete.
19295 (op_realpart, op_imagpart): Delete.
19296 (op_ptr_min, op_ptr_max): Delete.
19297 (pointer_plus_operator:update_bitmask): New.
19298 (range_op_table::set): Do not use m_code.
19299 (integral_table::integral_table): Adjust to single instances.
19300 * range-op.h (range_operator::range_operator): Delete.
19301 (range_operator::m_code): Delete.
19302 (range_operator::update_bitmask): New.
19304 2023-06-08 Andrew MacLeod <amacleod@redhat.com>
19306 * range-op-float.cc (range_operator_float::fold_range): Return
19307 NAN of the result type.
19309 2023-06-08 Jakub Jelinek <jakub@redhat.com>
19311 * optabs.cc (expand_ffs): Add forward declaration.
19312 (expand_doubleword_clz): Rename to ...
19313 (expand_doubleword_clz_ctz_ffs): ... this. Add UNOPTAB argument,
19314 handle also doubleword CTZ and FFS in addition to CLZ.
19315 (expand_unop): Adjust caller. Also call it for doubleword
19316 ctz_optab and ffs_optab.
19318 2023-06-08 Jakub Jelinek <jakub@redhat.com>
19321 * config/i386/i386-expand.cc (ix86_expand_vector_init_general): For
19322 n_words == 2 recurse with mmx_ok as first argument rather than false.
19324 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
19326 * wide-int.cc (wi::bitreverse_large): Use HOST_WIDE_INT_1U to
19327 avoid sign extension/undefined behaviour when setting each bit.
19329 2023-06-07 Roger Sayle <roger@nextmovesoftware.com>
19330 Uros Bizjak <ubizjak@gmail.com>
19332 * config/i386/i386-expand.cc (ix86_expand_builtin) <handlecarry>:
19333 Use new x86_stc instruction when the carry flag must be set.
19334 * config/i386/i386.cc (ix86_cc_mode): Use CCCmode for *x86_cmc.
19335 (ix86_rtx_costs): Provide accurate rtx_costs for *x86_cmc.
19336 * config/i386/i386.h (TARGET_SLOW_STC): New define.
19337 * config/i386/i386.md (UNSPEC_STC): New UNSPEC for stc.
19338 (x86_stc): New define_insn.
19339 (define_peephole2): Convert x86_stc into alternate implementation
19340 on pentium4 without -Os when a QImode register is available.
19341 (*x86_cmc): New define_insn.
19342 (define_peephole2): Convert *x86_cmc into alternate implementation
19343 on pentium4 without -Os when a QImode register is available.
19344 (*setccc): New define_insn_and_split for a no-op CCCmode move.
19345 (*setcc_qi_negqi_ccc_1_<mode>): New define_insn_and_split to
19346 recognize (and eliminate) the carry flag being copied to itself.
19347 (*setcc_qi_negqi_ccc_2_<mode>): Likewise.
19348 * config/i386/x86-tune.def (X86_TUNE_SLOW_STC): New tuning flag.
19350 2023-06-07 Andrew Pinski <apinski@marvell.com>
19352 * match.pd: Fix comment for the
19353 `(zero_one ==/!= 0) ? y : z <op> y` patterns.
19355 2023-06-07 Jeff Law <jlaw@ventanamicro.com>
19356 Jeff Law <jlaw@ventanamicro.com>
19358 * config/riscv/bitmanip.md (rotrdi3, rotrsi3, rotlsi3): New expanders.
19359 (rotrsi3_sext): Expose generator.
19360 (rotlsi3 pattern): Hide generator.
19361 * config/riscv/riscv-protos.h (riscv_emit_binary): New function
19363 * config/riscv/riscv.cc (riscv_emit_binary): Removed static
19364 * config/riscv/riscv.md (addsi3, subsi3, negsi2): Hide generator.
19365 (mulsi3, <optab>si3): Likewise.
19366 (addsi3, subsi3, negsi2, mulsi3, <optab>si3): New expanders.
19367 (addv<mode>4, subv<mode>4, mulv<mode>4): Use riscv_emit_binary.
19368 (<u>mulsidi3): Likewise.
19369 (addsi3_extended, subsi3_extended, negsi2_extended): Expose generator.
19370 (mulsi3_extended, <optab>si3_extended): Likewise.
19371 (splitter for shadd feeding divison): Update RTL pattern to account
19372 for changes in how 32 bit ops are expanded for TARGET_64BIT.
19373 * loop-iv.cc (get_biv_step_1): Process src of extension when it PLUS.
19375 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
19378 * config/riscv/riscv.cc (riscv_print_operand): Calculate
19379 memmodel only when it is valid.
19381 2023-06-07 Dimitar Dimitrov <dimitar@dinux.eu>
19383 * config/riscv/riscv.cc (riscv_const_insns): Recursively call
19384 for constant element of a vector.
19386 2023-06-07 Jakub Jelinek <jakub@redhat.com>
19388 * match.pd (zero_one_valued_p): Don't handle integer_zerop specially,
19389 instead compare tree_nonzero_bits <= 1U rather than just == 1.
19391 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19394 * config/aarch64/aarch64-builtins.cc (aarch64_general_simulate_builtin):
19396 (aarch64_init_ls64_builtins): ... here. Switch to declaring public ACLE
19397 names for builtins.
19398 (aarch64_general_init_builtins): Ensure we invoke the arm_acle.h
19399 setup if in_lto_p, just like we do for SVE.
19400 * config/aarch64/arm_acle.h: (__arm_ld64b): Delete.
19401 (__arm_st64b): Delete.
19402 (__arm_st64bv): Delete.
19403 (__arm_st64bv0): Delete.
19405 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19408 * config/aarch64/aarch64-builtins.cc (aarch64_expand_builtin_ls64):
19409 Use input operand for the destination address.
19410 * config/aarch64/aarch64.md (st64b): Fix constraint on address
19413 2023-06-07 Alex Coplan <alex.coplan@arm.com>
19416 * config/aarch64/aarch64-builtins.cc (aarch64_init_ls64_builtins_types):
19417 Replace eight consecutive spaces with tabs.
19418 (aarch64_init_ls64_builtins): Likewise.
19419 (aarch64_expand_builtin_ls64): Likewise.
19420 * config/aarch64/aarch64.md (ld64b): Likewise.
19423 (st64bv0): Likewise.
19425 2023-06-07 Vladimir N. Makarov <vmakarov@redhat.com>
19427 * ira-costs.cc: (find_costs_and_classes): Constrain classes of pic
19428 offset table pseudo to a general reg subset.
19430 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19432 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode><vczle><vczbe>):
19434 (*aarch64_sqmovun<mode>_insn<vczle><vczbe>): ... This. Reimplement
19436 (aarch64_sqmovun<mode> [SD_HSDI]): Reimplement with RTL codes.
19437 (aarch64_sqxtun2<mode>_le): Likewise.
19438 (aarch64_sqxtun2<mode>_be): Likewise.
19439 (aarch64_sqxtun2<mode>): Adjust for the above.
19440 (aarch64_sqmovun<mode>): New define_expand.
19441 * config/aarch64/iterators.md (UNSPEC_SQXTUN): Delete.
19442 (half_mask): New mode attribute.
19443 * config/aarch64/predicates.md (aarch64_simd_umax_half_mode):
19446 2023-06-07 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19448 * config/aarch64/aarch64-simd.md (aarch64_addp<mode><vczle><vczbe>):
19450 (aarch64_addp<mode>_insn): ... This...
19451 (aarch64_addp<mode><vczle><vczbe>_insn): ... And this.
19452 (aarch64_addp<mode>): New define_expand.
19454 2023-06-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19456 * config/riscv/riscv-protos.h (expand_vec_perm_const): New function.
19457 * config/riscv/riscv-v.cc
19458 (rvv_builder::can_duplicate_repeating_sequence_p): Support POLY
19460 (rvv_builder::single_step_npatterns_p): New function.
19461 (rvv_builder::npatterns_all_equal_p): Ditto.
19462 (const_vec_all_in_range_p): Support POLY handling.
19463 (gen_const_vector_dup): Ditto.
19464 (emit_vlmax_gather_insn): Add vrgatherei16.
19465 (emit_vlmax_masked_gather_mu_insn): Ditto.
19466 (expand_const_vector): Add VLA SLP const vector support.
19467 (expand_vec_perm): Support POLY.
19468 (struct expand_vec_perm_d): New struct.
19469 (shuffle_generic_patterns): New function.
19470 (expand_vec_perm_const_1): Ditto.
19471 (expand_vec_perm_const): Ditto.
19472 * config/riscv/riscv.cc (riscv_vectorize_vec_perm_const): Ditto.
19473 (TARGET_VECTORIZE_VEC_PERM_CONST): New targethook.
19475 2023-06-07 Andrew Pinski <apinski@marvell.com>
19477 PR middle-end/110117
19478 * expr.cc (expand_single_bit_test): Handle
19479 const_int from expand_expr.
19481 2023-06-07 Andrew Pinski <apinski@marvell.com>
19483 * expr.cc (do_store_flag): Rearrange the
19484 TER code so that it overrides the nonzero bits
19485 info if we had `a & POW2`.
19487 2023-06-07 Andrew Pinski <apinski@marvell.com>
19489 PR tree-optimization/110134
19490 * match.pd (-A CMP -B -> B CMP A): Allow EQ/NE for all integer
19492 (-A CMP CST -> B CMP (-CST)): Likewise.
19494 2023-06-07 Andrew Pinski <apinski@marvell.com>
19496 PR tree-optimization/89263
19497 PR tree-optimization/99069
19498 PR tree-optimization/20083
19499 PR tree-optimization/94898
19500 * match.pd: Add patterns to optimize `a ? onezero : onezero` with
19501 one of the operands are constant.
19503 2023-06-07 Andrew Pinski <apinski@marvell.com>
19505 * match.pd (zero_one_valued_p): Match 0 integer constant
19508 2023-06-07 Pan Li <pan2.li@intel.com>
19510 * config/riscv/riscv-vector-builtins-types.def
19511 (vfloat32mf2_t): Take RVV_REQUIRE_ELEN_FP_16 as requirement.
19512 (vfloat32m1_t): Ditto.
19513 (vfloat32m2_t): Ditto.
19514 (vfloat32m4_t): Ditto.
19515 (vfloat32m8_t): Ditto.
19516 (vint16mf4_t): Ditto.
19517 (vint16mf2_t): Ditto.
19518 (vint16m1_t): Ditto.
19519 (vint16m2_t): Ditto.
19520 (vint16m4_t): Ditto.
19521 (vint16m8_t): Ditto.
19522 (vuint16mf4_t): Ditto.
19523 (vuint16mf2_t): Ditto.
19524 (vuint16m1_t): Ditto.
19525 (vuint16m2_t): Ditto.
19526 (vuint16m4_t): Ditto.
19527 (vuint16m8_t): Ditto.
19528 (vint32mf2_t): Ditto.
19529 (vint32m1_t): Ditto.
19530 (vint32m2_t): Ditto.
19531 (vint32m4_t): Ditto.
19532 (vint32m8_t): Ditto.
19533 (vuint32mf2_t): Ditto.
19534 (vuint32m1_t): Ditto.
19535 (vuint32m2_t): Ditto.
19536 (vuint32m4_t): Ditto.
19537 (vuint32m8_t): Ditto.
19539 2023-06-07 Jason Merrill <jason@redhat.com>
19542 * doc/invoke.texi: Document it.
19544 2023-06-06 Roger Sayle <roger@nextmovesoftware.com>
19546 * doc/rtl.texi (bitreverse, copysign): Document new RTX codes.
19547 * rtl.def (BITREVERSE, COPYSIGN): Define new RTX codes.
19548 * simplify-rtx.cc (simplify_unary_operation_1): Optimize
19549 NOT (BITREVERSE x) as BITREVERSE (NOT x).
19550 Optimize POPCOUNT (BITREVERSE x) as POPCOUNT x.
19551 Optimize PARITY (BITREVERSE x) as PARITY x.
19552 Optimize BITREVERSE (BITREVERSE x) as x.
19553 (simplify_const_unary_operation) <case BITREVERSE>: Evaluate
19554 BITREVERSE of a constant integer at compile-time.
19555 (simplify_binary_operation_1) <case COPYSIGN>: Optimize
19556 COPY_SIGN (x, x) as x. Optimize COPYSIGN (x, C) as ABS x
19557 or NEG (ABS x) for constant C. Optimize COPYSIGN (ABS x, y)
19558 and COPYSIGN (NEG x, y) as COPYSIGN (x, y).
19559 Optimize COPYSIGN (x, ABS y) as ABS x.
19560 Optimize COPYSIGN (COPYSIGN (x, y), z) as COPYSIGN (x, z).
19561 Optimize COPYSIGN (x, COPYSIGN (y, z)) as COPYSIGN (x, z).
19562 (simplify_const_binary_operation): Evaluate COPYSIGN of constant
19563 arguments at compile-time.
19565 2023-06-06 Uros Bizjak <ubizjak@gmail.com>
19567 * rtl.h (function_invariant_p): Change return type from int to bool.
19568 * reload1.cc (function_invariant_p): Change return type from
19569 int to bool and adjust function body accordingly.
19571 2023-06-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19573 * config/riscv/autovec-opt.md (*<optab>_fma<mode>): New pattern.
19574 (*single_<optab>mult_plus<mode>): Ditto.
19575 (*double_<optab>mult_plus<mode>): Ditto.
19576 (*sign_zero_extend_fma): Ditto.
19577 (*zero_sign_extend_fma): Ditto.
19578 * config/riscv/riscv-protos.h (enum insn_type): New enum.
19580 2023-06-06 Kwok Cheung Yeung <kcy@codesourcery.com>
19581 Tobias Burnus <tobias@codesourcery.com>
19583 * gimplify.cc (omp_notice_variable): Apply GOVD_MAP_ALLOC_ONLY flag
19584 and defaultmap flags if the defaultmap has GOVD_MAP_FORCE_PRESENT flag
19586 (omp_get_attachment): Handle map clauses with 'present' modifier.
19587 (omp_group_base): Likewise.
19588 (gimplify_scan_omp_clauses): Reorder present maps to come first.
19589 Set GOVD flags for present defaultmaps.
19590 (gimplify_adjust_omp_clauses_1): Set map kind for present defaultmaps.
19591 * omp-low.cc (scan_sharing_clauses): Handle 'always, present' map
19593 (lower_omp_target): Handle map clauses with 'present' modifier.
19594 Handle 'to' and 'from' clauses with 'present'.
19595 * tree-core.h (enum omp_clause_defaultmap_kind): Add
19596 OMP_CLAUSE_DEFAULTMAP_PRESENT defaultmap kind.
19597 * tree-pretty-print.cc (dump_omp_clause): Handle 'map', 'to' and
19598 'from' clauses with 'present' modifier. Handle present defaultmap.
19599 * tree.h (OMP_CLAUSE_MOTION_PRESENT): New #define.
19601 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
19603 * config/rs6000/genfusion.pl: Delete some dead code.
19605 2023-06-06 Segher Boessenkool <segher@kernel.crashing.org>
19607 * config/rs6000/genfusion.pl (gen_ld_cmpi_p10_one): New, rewritten and
19609 (gen_ld_cmpi_p10): ... this.
19611 2023-06-06 Jeevitha Palanisamy <jeevitha@linux.ibm.com>
19614 * config/rs6000/rs6000.cc (vec_const_128bit_to_bytes): Remove
19615 duplicate expression.
19617 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19619 * config/aarch64/aarch64-builtins.cc (aarch64_general_gimple_fold_builtin):
19620 Handle unsigned reduc_plus_scal_ builtins.
19621 * config/aarch64/aarch64-simd-builtins.def (addp): Delete DImode instances.
19622 * config/aarch64/aarch64-simd.md (aarch64_addpdi): Delete.
19623 * config/aarch64/arm_neon.h (vpaddd_s64): Reimplement with
19624 __builtin_aarch64_reduc_plus_scal_v2di.
19625 (vpaddd_u64): Reimplement with __builtin_aarch64_reduc_plus_scal_v2di_uu.
19627 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19629 * config/aarch64/aarch64-simd.md (aarch64_<sur>shr_n<mode>): Delete.
19630 (aarch64_<sra_op>rshr_n<mode><vczle><vczbe>_insn): New define_insn.
19631 (aarch64_<sra_op>rshr_n<mode>): New define_expand.
19633 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19635 * config/aarch64/aarch64-simd.md (aarch64_shrn<mode>_insn_le): Delete.
19636 (aarch64_shrn<mode>_insn_be): Delete.
19637 (*aarch64_<srn_op>shrn<mode>_vect): Rename to...
19638 (*aarch64_<srn_op>shrn<mode><vczle><vczbe>): ... This.
19639 (aarch64_shrn<mode>): Remove reference to the above deleted patterns.
19640 (aarch64_rshrn<mode>_insn_le): Delete.
19641 (aarch64_rshrn<mode>_insn_be): Delete.
19642 (aarch64_rshrn<mode><vczle><vczbe>_insn): New define_insn.
19643 (aarch64_rshrn<mode>): Remove references to the above deleted patterns.
19645 2023-06-06 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
19647 * config/aarch64/aarch64-protos.h (aarch64_parallel_select_half_p):
19649 (aarch64_pars_overlap_p): Likewise.
19650 * config/aarch64/aarch64-simd.md (aarch64_<su>addlv<mode>):
19651 Express in terms of UNSPEC_ADDV.
19652 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): Likewise.
19653 (*aarch64_<su>addlv<mode>_reduction): Define.
19654 (*aarch64_uaddlv<mode>_reduction_2): Likewise.
19655 * config/aarch64/aarch64.cc (aarch64_parallel_select_half_p): Define.
19656 (aarch64_pars_overlap_p): Likewise.
19657 * config/aarch64/iterators.md (UNSPEC_SADDLV, UNSPEC_UADDLV): Delete.
19658 (VQUADW): New mode attribute.
19659 (VWIDE2X_S): Likewise.
19661 (su): Delete handling of UNSPEC_SADDLV, UNSPEC_UADDLV.
19662 * config/aarch64/predicates.md (vect_par_cnst_select_half): Define.
19664 2023-06-06 Richard Biener <rguenther@suse.de>
19666 PR middle-end/110055
19667 * gimplify.cc (gimplify_target_expr): Do not emit
19668 CLOBBERs for variables which have static storage duration
19669 after gimplifying their initializers.
19671 2023-06-06 Richard Biener <rguenther@suse.de>
19673 PR tree-optimization/109143
19674 * tree-ssa-structalias.cc (solution_set_expand): Avoid
19675 one bitmap iteration and optimize bit range setting.
19677 2023-06-06 Hans-Peter Nilsson <hp@axis.com>
19679 PR bootstrap/110120
19680 * postreload.cc (reload_cse_move2add, move2add_use_add2_insn): Use
19681 XVECEXP, not XEXP, to access first item of a PARALLEL.
19683 2023-06-06 Pan Li <pan2.li@intel.com>
19685 * config/riscv/riscv-vector-builtins-types.def
19686 (vfloat16mf4_t): Add vfloat16mf4_t to WF operations.
19687 (vfloat16mf2_t): Likewise.
19688 (vfloat16m1_t): Likewise.
19689 (vfloat16m2_t): Likewise.
19690 (vfloat16m4_t): Likewise.
19691 (vfloat16m8_t): Likewise.
19692 * config/riscv/vector-iterators.md: Add FP=16 to VWF, VWF_ZVE64,
19693 VWLMUL1, VWLMUL1_ZVE64, vwlmul1 and vwlmul1_zve64.
19695 2023-06-06 Fei Gao <gaofei@eswincomputing.com>
19697 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Use Pmode
19698 for cfi reg/mem machmode
19699 (riscv_adjust_libcall_cfi_epilogue): Use Pmode for cfi reg machmode
19701 2023-06-06 Li Xu <xuli1@eswincomputing.com>
19703 * config/riscv/vector-iterators.md:
19704 Fix 'REQUIREMENT' for machine_mode 'MODE'.
19705 * config/riscv/vector.md (@pred_indexed_<order>store<VNX16_QHS:mode>
19706 <VNX16_QHSI:mode>): change VNX16_QHSI to VNX16_QHSDI.
19707 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSDI:mode>): Ditto.
19709 2023-06-06 Pan Li <pan2.li@intel.com>
19711 * config/riscv/vector-iterators.md: Fix typo in mode attr.
19713 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
19714 Joel Hutton <joel.hutton@arm.com>
19716 * doc/generic.texi: Remove old tree codes.
19717 * expr.cc (expand_expr_real_2): Remove old tree code cases.
19718 * gimple-pretty-print.cc (dump_binary_rhs): Likewise.
19719 * optabs-tree.cc (optab_for_tree_code): Likewise.
19720 (supportable_half_widening_operation): Likewise.
19721 * tree-cfg.cc (verify_gimple_assign_binary): Likewise.
19722 * tree-inline.cc (estimate_operator_cost): Likewise.
19723 (op_symbol_code): Likewise.
19724 * tree-vect-data-refs.cc (vect_get_smallest_scalar_type): Likewise.
19725 (vect_analyze_data_ref_accesses): Likewise.
19726 * tree-vect-generic.cc (expand_vector_operations_1): Likewise.
19727 * cfgexpand.cc (expand_debug_expr): Likewise.
19728 * tree-vect-stmts.cc (vectorizable_conversion): Likewise.
19729 (supportable_widening_operation): Likewise.
19730 * gimple-range-op.cc (gimple_range_op_handler::maybe_non_standard):
19732 * optabs.def (vec_widen_ssubl_hi_optab, vec_widen_ssubl_lo_optab,
19733 vec_widen_saddl_hi_optab, vec_widen_saddl_lo_optab,
19734 vec_widen_usubl_hi_optab, vec_widen_usubl_lo_optab,
19735 vec_widen_uaddl_hi_optab, vec_widen_uaddl_lo_optab): Remove optabs.
19736 * tree-pretty-print.cc (dump_generic_node): Remove tree code definition.
19737 * tree.def (WIDEN_PLUS_EXPR, WIDEN_MINUS_EXPR, VEC_WIDEN_PLUS_HI_EXPR,
19738 VEC_WIDEN_PLUS_LO_EXPR, VEC_WIDEN_MINUS_HI_EXPR,
19739 VEC_WIDEN_MINUS_LO_EXPR): Likewise.
19741 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
19742 Joel Hutton <joel.hutton@arm.com>
19743 Tamar Christina <tamar.christina@arm.com>
19745 * config/aarch64/aarch64-simd.md (vec_widen_<su>addl_lo_<mode>): Rename
19747 (vec_widen_<su>add_lo_<mode>): ... to this.
19748 (vec_widen_<su>addl_hi_<mode>): Rename this ...
19749 (vec_widen_<su>add_hi_<mode>): ... to this.
19750 (vec_widen_<su>subl_lo_<mode>): Rename this ...
19751 (vec_widen_<su>sub_lo_<mode>): ... to this.
19752 (vec_widen_<su>subl_hi_<mode>): Rename this ...
19753 (vec_widen_<su>sub_hi_<mode>): ...to this.
19754 * doc/generic.texi: Document new IFN codes.
19755 * internal-fn.cc (lookup_hilo_internal_fn): Add lookup function.
19756 (commutative_binary_fn_p): Add widen_plus fn's.
19757 (widening_fn_p): New function.
19758 (narrowing_fn_p): New function.
19759 (direct_internal_fn_optab): Change visibility.
19760 * internal-fn.def (DEF_INTERNAL_WIDENING_OPTAB_FN): Macro to define an
19761 internal_fn that expands into multiple internal_fns for widening.
19762 (IFN_VEC_WIDEN_PLUS, IFN_VEC_WIDEN_PLUS_HI, IFN_VEC_WIDEN_PLUS_LO,
19763 IFN_VEC_WIDEN_PLUS_EVEN, IFN_VEC_WIDEN_PLUS_ODD,
19764 IFN_VEC_WIDEN_MINUS, IFN_VEC_WIDEN_MINUS_HI,
19765 IFN_VEC_WIDEN_MINUS_LO, IFN_VEC_WIDEN_MINUS_ODD,
19766 IFN_VEC_WIDEN_MINUS_EVEN): Define widening plus,minus functions.
19767 * internal-fn.h (direct_internal_fn_optab): Declare new prototype.
19768 (lookup_hilo_internal_fn): Likewise.
19769 (widening_fn_p): Likewise.
19770 (Narrowing_fn_p): Likewise.
19771 * optabs.cc (commutative_optab_p): Add widening plus optabs.
19772 * optabs.def (OPTAB_D): Define widen add, sub optabs.
19773 * tree-vect-patterns.cc (vect_recog_widen_op_pattern): Support
19774 patterns with a hi/lo or even/odd split.
19775 (vect_recog_sad_pattern): Refactor to use new IFN codes.
19776 (vect_recog_widen_plus_pattern): Likewise.
19777 (vect_recog_widen_minus_pattern): Likewise.
19778 (vect_recog_average_pattern): Likewise.
19779 * tree-vect-stmts.cc (vectorizable_conversion): Add support for
19781 (supportable_widening_operation): Likewise.
19782 * tree.def (WIDEN_SUM_EXPR): Update example to use new IFNs.
19784 2023-06-05 Andre Vieira <andre.simoesdiasvieira@arm.com>
19785 Joel Hutton <joel.hutton@arm.com>
19787 * tree-vect-patterns.cc: Add include for gimple-iterator.
19788 (vect_recog_widen_op_pattern): Refactor to use code_helper.
19789 (vect_gimple_build): New function.
19790 * tree-vect-stmts.cc (simple_integer_narrowing): Refactor to use
19792 (vectorizable_call): Likewise.
19793 (vect_gen_widened_results_half): Likewise.
19794 (vect_create_vectorized_demotion_stmts): Likewise.
19795 (vect_create_vectorized_promotion_stmts): Likewise.
19796 (vect_create_half_widening_stmts): Likewise.
19797 (vectorizable_conversion): Likewise.
19798 (supportable_widening_operation): Likewise.
19799 (supportable_narrowing_operation): Likewise.
19800 * tree-vectorizer.h (supportable_widening_operation): Change
19801 prototype to use code_helper.
19802 (supportable_narrowing_operation): Likewise.
19803 (vect_gimple_build): New function prototype.
19804 * tree.h (code_helper::safe_as_tree_code): New function.
19805 (code_helper::safe_as_fn_code): New function.
19807 2023-06-05 Roger Sayle <roger@nextmovesoftware.com>
19809 * wide-int.cc (wi::bitreverse_large): New function implementing
19810 bit reversal of an integer.
19811 * wide-int.h (wi::bitreverse): New (template) function prototype.
19812 (bitreverse_large): Prototype helper function/implementation.
19813 (wi::bitreverse): New template wrapper around bitreverse_large.
19815 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
19817 * rtl.h (print_rtl_single): Change return type from int to void.
19818 (print_rtl_single_with_indent): Ditto.
19819 * print-rtl.h (class rtx_writer): Ditto. Change m_sawclose to bool.
19820 * print-rtl.cc (rtx_writer::rtx_writer): Update for m_sawclose change.
19821 (rtx_writer::print_rtx_operand_code_0): Ditto.
19822 (rtx_writer::print_rtx_operand_codes_E_and_V): Ditto.
19823 (rtx_writer::print_rtx_operand_code_i): Ditto.
19824 (rtx_writer::print_rtx_operand_code_u): Ditto.
19825 (rtx_writer::print_rtx_operand): Ditto.
19826 (rtx_writer::print_rtx): Ditto.
19827 (rtx_writer::finish_directive): Ditto.
19828 (print_rtl_single): Change return type from int to void
19829 and adjust function body accordingly.
19830 (rtx_writer::print_rtl_single_with_indent): Ditto.
19832 2023-06-05 Uros Bizjak <ubizjak@gmail.com>
19834 * rtl.h (reg_classes_intersect_p): Change return type from int to bool.
19835 (reg_class_subset_p): Ditto.
19836 * reginfo.cc (reg_classes_intersect_p): Ditto.
19837 (reg_class_subset_p): Ditto.
19839 2023-06-05 Pan Li <pan2.li@intel.com>
19841 * config/riscv/riscv-vector-builtins-types.def
19842 (vfloat32mf2_t): New type for DEF_RVV_WEXTF_OPS.
19843 (vfloat32m1_t): Ditto.
19844 (vfloat32m2_t): Ditto.
19845 (vfloat32m4_t): Ditto.
19846 (vfloat32m8_t): Ditto.
19847 (vint16mf4_t): New type for DEF_RVV_CONVERT_I_OPS.
19848 (vint16mf2_t): Ditto.
19849 (vint16m1_t): Ditto.
19850 (vint16m2_t): Ditto.
19851 (vint16m4_t): Ditto.
19852 (vint16m8_t): Ditto.
19853 (vuint16mf4_t): New type for DEF_RVV_CONVERT_U_OPS.
19854 (vuint16mf2_t): Ditto.
19855 (vuint16m1_t): Ditto.
19856 (vuint16m2_t): Ditto.
19857 (vuint16m4_t): Ditto.
19858 (vuint16m8_t): Ditto.
19859 (vint32mf2_t): New type for DEF_RVV_WCONVERT_I_OPS.
19860 (vint32m1_t): Ditto.
19861 (vint32m2_t): Ditto.
19862 (vint32m4_t): Ditto.
19863 (vint32m8_t): Ditto.
19864 (vuint32mf2_t): New type for DEF_RVV_WCONVERT_U_OPS.
19865 (vuint32m1_t): Ditto.
19866 (vuint32m2_t): Ditto.
19867 (vuint32m4_t): Ditto.
19868 (vuint32m8_t): Ditto.
19869 * config/riscv/vector-iterators.md: Add FP=16 support for V,
19870 VWCONVERTI, VCONVERT, VNCONVERT, VMUL1 and vlmul1.
19872 2023-06-05 Andrew Pinski <apinski@marvell.com>
19874 PR bootstrap/110085
19875 * Makefile.in (clean): Remove the removing of
19876 MULTILIB_DIR/MULTILIB_OPTIONS directories.
19878 2023-06-05 YunQiang Su <yunqiang.su@cipunited.com>
19880 * config/mips/mips-protos.h (mips_emit_speculation_barrier): New
19882 * config/mips/mips.cc (speculation_barrier_libfunc): New static
19884 (mips_init_libfuncs): Initialize it.
19885 (mips_emit_speculation_barrier): New function.
19886 * config/mips/mips.md (speculation_barrier): Call
19887 mips_emit_speculation_barrier.
19889 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19891 * config/riscv/riscv-v.cc (class rvv_builder): Reorganize functions.
19892 (rvv_builder::can_duplicate_repeating_sequence_p): Ditto.
19893 (rvv_builder::repeating_sequence_use_merge_profitable_p): Ditto.
19894 (rvv_builder::get_merged_repeating_sequence): Ditto.
19895 (rvv_builder::get_merge_scalar_mask): Ditto.
19896 (emit_scalar_move_insn): Ditto.
19897 (emit_vlmax_integer_move_insn): Ditto.
19898 (emit_nonvlmax_integer_move_insn): Ditto.
19899 (emit_vlmax_gather_insn): Ditto.
19900 (emit_vlmax_masked_gather_mu_insn): Ditto.
19901 (get_repeating_sequence_dup_machine_mode): Ditto.
19903 2023-06-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19905 * config/riscv/autovec.md: Split arguments.
19906 * config/riscv/riscv-protos.h (expand_vec_perm): Ditto.
19907 * config/riscv/riscv-v.cc (expand_vec_perm): Ditto.
19909 2023-06-04 Andrew Pinski <apinski@marvell.com>
19911 * expr.cc (do_store_flag): Improve for single bit testing
19912 not against zero but against that single bit.
19914 2023-06-04 Andrew Pinski <apinski@marvell.com>
19916 * expr.cc (do_store_flag): Extend the one bit checking case
19917 to handle the case where we don't have an and but rather still
19918 one bit is known to be non-zero.
19920 2023-06-04 Jeff Law <jlaw@ventanamicro.com>
19922 * config/h8300/constraints.md (Zz): Make this a normal
19924 * config/h8300/h8300.cc (TARGET_LRA_P): Remove.
19925 * config/h8300/logical.md (H8/SX bit patterns): Remove.
19927 2023-06-04 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
19929 * config/xtensa/xtensa.md (*btrue_INT_MIN, *eqne_INT_MIN):
19930 New insn_and_split patterns.
19932 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19935 * config/riscv/riscv-vector-builtins-bases.cc: Change expand approach.
19936 * config/riscv/vector.md (@vlmul_extx2<mode>): Remove it.
19937 (@vlmul_extx4<mode>): Ditto.
19938 (@vlmul_extx8<mode>): Ditto.
19939 (@vlmul_extx16<mode>): Ditto.
19940 (@vlmul_extx32<mode>): Ditto.
19941 (@vlmul_extx64<mode>): Ditto.
19942 (*vlmul_extx2<mode>): Ditto.
19943 (*vlmul_extx4<mode>): Ditto.
19944 (*vlmul_extx8<mode>): Ditto.
19945 (*vlmul_extx16<mode>): Ditto.
19946 (*vlmul_extx32<mode>): Ditto.
19947 (*vlmul_extx64<mode>): Ditto.
19949 2023-06-04 Pan Li <pan2.li@intel.com>
19951 * config/riscv/riscv-vector-builtins-types.def
19952 (vfloat32mf2_t): Add vfloat32mf2_t type to vfncvt.f.f.w operations.
19953 (vfloat32m1_t): Likewise.
19954 (vfloat32m2_t): Likewise.
19955 (vfloat32m4_t): Likewise.
19956 (vfloat32m8_t): Likewise.
19957 * config/riscv/riscv-vector-builtins.def: Fix typo in comments.
19958 * config/riscv/vector-iterators.md: Add single to half machine
19961 2023-06-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
19963 * config/riscv/autovec-opt.md (*<optab>not<mode>): Move to autovec-opt.md.
19964 (*n<optab><mode>): Ditto.
19965 * config/riscv/autovec.md (*<optab>not<mode>): Ditto.
19966 (*n<optab><mode>): Ditto.
19967 * config/riscv/vector.md: Ditto.
19969 2023-06-04 Roger Sayle <roger@nextmovesoftware.com>
19972 * config/i386/i386-features.cc (scalar_chain::convert_compare):
19973 Update or delete REG_EQUAL notes, converting CONST_INT and
19974 CONST_WIDE_INT immediate operands to a suitable CONST_VECTOR.
19976 2023-06-04 Jason Merrill <jason@redhat.com>
19979 * tree-eh.cc (lower_resx): Pass the exception pointer to the
19981 * except.h: Tweak comment.
19983 2023-06-04 Hans-Peter Nilsson <hp@axis.com>
19985 * postreload.cc (move2add_use_add2_insn): Handle
19986 trivial single_sets. Rename variable PAT to SET.
19987 (move2add_use_add3_insn, reload_cse_move2add): Similar.
19989 2023-06-04 Pan Li <pan2.li@intel.com>
19991 * config/riscv/riscv-vector-builtins-types.def
19992 (vfloat16mf4_t): Add the float16 type to DEF_RVV_F_OPS.
19993 (vfloat16mf2_t): Likewise.
19994 (vfloat16m1_t): Likewise.
19995 (vfloat16m2_t): Likewise.
19996 (vfloat16m4_t): Likewise.
19997 (vfloat16m8_t): Likewise.
19998 * config/riscv/riscv.md: Add vfloat16*_t to attr mode.
19999 * config/riscv/vector-iterators.md: Add vfloat16*_t machine mode
20000 to V, V_WHOLE, V_FRACT, VINDEX, VM, VEL and sew.
20001 * config/riscv/vector.md: Add vfloat16*_t machine mode to sew,
20004 2023-06-03 Fei Gao <gaofei@eswincomputing.com>
20006 * config/riscv/riscv.cc (riscv_expand_epilogue): fix cfi issue with
20009 2023-06-03 Die Li <lidie@eswincomputing.com>
20011 * config/riscv/thead.md (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Delete.
20013 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20015 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
20017 2023-06-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20019 * config/riscv/vector.md: Add vector-opt.md.
20020 * config/riscv/autovec-opt.md: New file.
20022 2023-06-03 liuhongt <hongtao.liu@intel.com>
20024 PR tree-optimization/110067
20025 * gimple-ssa-store-merging.cc (find_bswap_or_nop): Don't try
20026 bswap + rotate when TYPE_PRECISION(n->type) > n->range.
20028 2023-06-03 liuhongt <hongtao.liu@intel.com>
20031 * config/i386/mmx.md (truncv2hiv2qi2): New define_insn.
20032 (truncv2si<mode>2): Ditto.
20034 2023-06-02 Andrew Pinski <apinski@marvell.com>
20036 PR rtl-optimization/102733
20037 * dse.cc (store_info): Add addrspace field.
20038 (record_store): Record the address space
20039 and check to make sure they are the same.
20041 2023-06-02 Andrew Pinski <apinski@marvell.com>
20043 PR rtl-optimization/110042
20044 * ifcvt.cc (bbs_ok_for_cmove_arith): Allow paradoxical subregs.
20045 (bb_valid_for_noce_process_p): Strip the subreg for the SET_DEST.
20047 2023-06-02 Iain Sandoe <iain@sandoe.co.uk>
20050 * config/rs6000/rs6000.cc (darwin_rs6000_special_round_type_align):
20051 Make sure that we do not have a cap on field alignment before altering
20052 the struct layout based on the type alignment of the first entry.
20054 2023-06-02 David Faust <david.faust@oracle.com>
20057 * btfout.cc (btf_absolute_func_id): New function.
20058 (btf_asm_func_type): Call it here. Change index parameter from
20059 size_t to ctf_id_t. Use PRIu64 formatter.
20061 2023-06-02 Alex Coplan <alex.coplan@arm.com>
20063 * btfout.cc (btf_asm_type): Use PRIu64 instead of %lu for uint64_t.
20064 (btf_asm_datasec_type): Likewise.
20066 2023-06-02 Carl Love <cel@us.ibm.com>
20068 * config/rs6000/rs6000-builtins.def (__builtin_altivec_tr_stxvrhx,
20069 __builtin_altivec_tr_stxvrwx): Fix type of third argument.
20071 2023-06-02 Jason Merrill <jason@redhat.com>
20075 * tree.h (DECL_MERGEABLE): New.
20076 * tree-core.h (struct tree_decl_common): Mention it.
20077 * gimplify.cc (gimplify_init_constructor): Check it.
20078 * cgraph.cc (symtab_node::address_can_be_compared_p): Likewise.
20079 * varasm.cc (categorize_decl_for_section): Likewise.
20081 2023-06-02 Uros Bizjak <ubizjak@gmail.com>
20083 * rtl.h (stack_regs_mentioned): Change return type from int to bool.
20084 * reg-stack.cc (struct_block_info_def): Change "done" to bool.
20085 (stack_regs_mentioned_p): Change return type from int to bool
20086 and adjust function body accordingly.
20087 (stack_regs_mentioned): Ditto.
20088 (check_asm_stack_operands): Ditto. Change "malformed_asm"
20090 (move_for_stack_reg): Recode handling of control_flow_insn_deleted.
20091 (swap_rtx_condition_1): Change return type from int to bool
20092 and adjust function body accordingly. Change "r" variable to bool.
20093 (swap_rtx_condition): Change return type from int to bool
20094 and adjust function body accordingly.
20095 (subst_stack_regs_pat): Recode handling of control_flow_insn_deleted.
20096 (subst_stack_regs): Ditto.
20097 (convert_regs_entry): Change return type from int to bool and adjust
20098 function body accordingly. Change "inserted" variable to bool.
20099 (convert_regs_1): Recode handling of control_flow_insn_deleted.
20100 (convert_regs_2): Recode handling of cfg_altered.
20101 (convert_regs): Ditto. Change "inserted" variable to bool.
20103 2023-06-02 Jason Merrill <jason@redhat.com>
20106 * varasm.cc (output_constant) [REAL_TYPE]: Check that sizes match.
20107 (initializer_constant_valid_p_1): Compare float precision.
20109 2023-06-02 Alexander Monakov <amonakov@ispras.ru>
20111 * doc/extend.texi (Vector Extensions): Clarify bitwise shift
20114 2023-06-02 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
20116 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly): Change decrement IV flow.
20117 (vect_set_loop_condition_partial_vectors): Ditto.
20119 2023-06-02 Georg-Johann Lay <avr@gjlay.de>
20122 * config/avr/avr.md: Add an RTL peephole to optimize operations on
20123 non-LD_REGS after a move from LD_REGS.
20124 (piaop): New code iterator.
20126 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
20129 * doc/install.texi: Document (optional) Perl usage for parallel
20130 testing of libgomp.
20132 2023-06-02 Thomas Schwinge <thomas@codesourcery.com>
20135 * doc/install.texi (Perl): Back to requiring "Perl version 5.6.1 (or
20138 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20139 KuanLin Chen <best124612@gmail.com>
20141 * config/riscv/riscv-vector-builtins-bases.cc: Add _mu overloaded intrinsics.
20142 * config/riscv/riscv-vector-builtins-shapes.cc (struct fault_load_def): Ditto.
20144 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20146 * config/riscv/riscv-v.cc (expand_vec_series): Optimize reverse series index vector.
20148 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20150 * config/riscv/predicates.md: Change INTVAL into UINTVAL.
20152 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20154 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_VXRM_ENUM): Add
20156 (DEF_RVV_FRM_ENUM): Ditto.
20158 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20160 * config/riscv/riscv-vector-builtins-bases.cc: Change vwadd.wv/vwsub.wv
20161 intrinsic API expander
20162 * config/riscv/vector.md
20163 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Remove it.
20164 (@pred_single_widen_sub<any_extend:su><mode>): New pattern.
20165 (@pred_single_widen_add<any_extend:su><mode>): New pattern.
20167 2023-06-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20169 * config/riscv/autovec.md (vec_perm<mode>): New pattern.
20170 * config/riscv/predicates.md (vector_perm_operand): New predicate.
20171 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20172 (expand_vec_perm): New function.
20173 * config/riscv/riscv-v.cc (const_vec_all_in_range_p): Ditto.
20174 (gen_const_vector_dup): Ditto.
20175 (emit_vlmax_gather_insn): Ditto.
20176 (emit_vlmax_masked_gather_mu_insn): Ditto.
20177 (expand_vec_perm): Ditto.
20179 2023-06-01 Jason Merrill <jason@redhat.com>
20181 * doc/invoke.texi (-Wpedantic): Improve clarity.
20183 2023-06-01 Uros Bizjak <ubizjak@gmail.com>
20185 * rtl.h (exp_equiv_p): Change return type from int to bool.
20186 * cse.cc (mention_regs): Change return type from int to bool
20187 and adjust function body accordingly.
20188 (exp_equiv_p): Ditto.
20189 (insert_regs): Ditto. Change "modified" function argument to bool
20190 and update usage accordingly.
20191 (record_jump_cond): Remove always zero "reversed_nonequality"
20192 function argument and update usage accordingly.
20193 (fold_rtx): Change "changed" variable to bool.
20194 (record_jump_equiv): Remove unneeded "reversed_nonequality" variable.
20195 (is_dead_reg): Change return type from int to bool.
20197 2023-06-01 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20199 * config/xtensa/xtensa.md (adddi3, subdi3):
20200 New RTL generation patterns implemented according to the instruc-
20201 tion idioms described in the Xtensa ISA reference manual (p. 600).
20203 2023-06-01 Roger Sayle <roger@nextmovesoftware.com>
20204 Uros Bizjak <ubizjak@gmail.com>
20207 * config/i386/i386-builtin.def (__builtin_ia32_ptestz128): Use new
20208 CODE_for_sse4_1_ptestzv2di.
20209 (__builtin_ia32_ptestc128): Use new CODE_for_sse4_1_ptestcv2di.
20210 (__builtin_ia32_ptestz256): Use new CODE_for_avx_ptestzv4di.
20211 (__builtin_ia32_ptestc256): Use new CODE_for_avx_ptestcv4di.
20212 * config/i386/i386-expand.cc (ix86_expand_branch): Use CCZmode
20213 when expanding UNSPEC_PTEST to compare against zero.
20214 * config/i386/i386-features.cc (scalar_chain::convert_compare):
20215 Likewise generate CCZmode UNSPEC_PTESTs when converting comparisons.
20216 (general_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
20217 (timode_scalar_chain::convert_insn): Use CCZmode for COMPARE result.
20218 * config/i386/i386-protos.h (ix86_match_ptest_ccmode): Prototype.
20219 * config/i386/i386.cc (ix86_match_ptest_ccmode): New predicate to
20220 check for suitable matching modes for the UNSPEC_PTEST pattern.
20221 * config/i386/sse.md (define_split): When splitting UNSPEC_MOVMSK
20222 to UNSPEC_PTEST, preserve the FLAG_REG mode as CCZ.
20223 (*<sse4_1>_ptest<mode>): Add asterisk to hide define_insn. Remove
20224 ":CC" mode of FLAGS_REG, instead use ix86_match_ptest_ccmode.
20225 (<sse4_1>_ptestz<mode>): New define_expand to specify CCZ.
20226 (<sse4_1>_ptestc<mode>): New define_expand to specify CCC.
20227 (<sse4_1>_ptest<mode>): A define_expand using CC to preserve the
20229 (*ptest<mode>_and): Specify CCZ to only perform this optimization
20230 when only the Z flag is required.
20232 2023-06-01 Jonathan Wakely <jwakely@redhat.com>
20235 * doc/invoke.texi (x86 Options): Fix description of -m32 option.
20237 2023-06-01 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20239 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>):
20240 Add =r,m and =r,m alternatives.
20241 (load_pair<DREG:mode><DREG2:mode>): Likewise.
20242 (vec_store_pair<DREG:mode><DREG2:mode>): Likewise.
20244 2023-06-01 Pan Li <pan2.li@intel.com>
20246 * common/config/riscv/riscv-common.cc: Add FP_16 mask to zvfhmin
20248 * config/riscv/genrvv-type-indexer.cc (valid_type): Allow FP16.
20249 (main): Disable FP16 tuple.
20250 * config/riscv/riscv-opts.h (MASK_VECTOR_ELEN_FP_16): New macro.
20251 (TARGET_VECTOR_ELEN_FP_16): Ditto.
20252 * config/riscv/riscv-vector-builtins.cc (check_required_extensions):
20254 * config/riscv/riscv-vector-builtins.def (vfloat16mf4_t): New type.
20255 (vfloat16mf2_t): Ditto.
20256 (vfloat16m1_t): Ditto.
20257 (vfloat16m2_t): Ditto.
20258 (vfloat16m4_t): Ditto.
20259 (vfloat16m8_t): Ditto.
20260 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ELEN_FP_16):
20262 * config/riscv/riscv-vector-switch.def (ENTRY): Allow FP16
20263 machine mode based on TARGET_VECTOR_ELEN_FP_16.
20265 2023-06-01 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20267 * config/riscv/riscv-vector-builtins.cc (register_frm): New function.
20268 (DEF_RVV_FRM_ENUM): New macro.
20269 (handle_pragma_vector): Add FRM enum
20270 * config/riscv/riscv-vector-builtins.def (DEF_RVV_FRM_ENUM): New macro.
20277 2023-05-31 Roger Sayle <roger@nextmovesoftware.com>
20278 Richard Sandiford <richard.sandiford@arm.com>
20280 * fold-const-call.cc (fold_const_call_ss) <CFN_BUILT_IN_BSWAP*>:
20281 Update call to wi::bswap.
20282 * simplify-rtx.cc (simplify_const_unary_operation) <case BSWAP>:
20283 Update call to wi::bswap.
20284 * tree-ssa-ccp.cc (evaluate_stmt) <case BUILT_IN_BSWAP*>:
20285 Update calls to wi::bswap.
20286 * wide-int.cc (wide_int_storage::bswap): Remove/rename to...
20287 (wi::bswap_large): New function, with revised API.
20288 * wide-int.h (wi::bswap): New (template) function prototype.
20289 (wide_int_storage::bswap): Remove method.
20290 (sext_large, zext_large): Consistent indentation/line wrapping.
20291 (bswap_large): Prototype helper function containing implementation.
20292 (wi::bswap): New template wrapper around bswap_large.
20294 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20297 * config/aarch64/aarch64-simd.md (<sur>dot_prod<vsi2qi>): Rename to...
20298 (<sur>dot_prod<vsi2qi><vczle><vczbe>): ... This.
20299 (usdot_prod<vsi2qi>): Rename to...
20300 (usdot_prod<vsi2qi><vczle><vczbe>): ... This.
20301 (aarch64_<sur>dot_lane<vsi2qi>): Rename to...
20302 (aarch64_<sur>dot_lane<vsi2qi><vczle><vczbe>): ... This.
20303 (aarch64_<sur>dot_laneq<vsi2qi>): Rename to...
20304 (aarch64_<sur>dot_laneq<vsi2qi><vczle><vczbe>): ... This.
20305 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi>): Rename to...
20306 (aarch64_<DOTPROD_I8MM:sur>dot_lane<VB:isquadop><VS:vsi2qi><vczle><vczbe>):
20309 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20312 * config/aarch64/aarch64-simd.md (aarch64_sq<r>dmulh<mode>): Rename to...
20313 (aarch64_sq<r>dmulh<mode><vczle><vczbe>): ... This.
20314 (aarch64_sq<r>dmulh_n<mode>): Rename to...
20315 (aarch64_sq<r>dmulh_n<mode><vczle><vczbe>): ... This.
20316 (aarch64_sq<r>dmulh_lane<mode>): Rename to...
20317 (aarch64_sq<r>dmulh_lane<mode><vczle><vczbe>): ... This.
20318 (aarch64_sq<r>dmulh_laneq<mode>): Rename to...
20319 (aarch64_sq<r>dmulh_laneq<mode><vczle><vczbe>): ... This.
20320 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode>): Rename to...
20321 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h<mode><vczle><vczbe>): ... This.
20322 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode>): Rename to...
20323 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_lane<mode><vczle><vczbe>): ... This.
20324 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode>): Rename to...
20325 (aarch64_sqrdml<SQRDMLH_AS:rdma_as>h_laneq<mode><vczle><vczbe>): ... This.
20327 2023-05-31 David Faust <david.faust@oracle.com>
20329 * btfout.cc (btf_kind_names): New.
20330 (btf_kind_name): New.
20331 (btf_absolute_var_id): New utility function.
20332 (btf_relative_var_id): Likewise.
20333 (btf_relative_func_id): Likewise.
20334 (btf_absolute_datasec_id): Likewise.
20335 (btf_asm_type_ref): New.
20336 (btf_asm_type): Update asm comments and use btf_asm_type_ref ().
20337 (btf_asm_array): Likewise. Accept ctf_container_ref parameter.
20338 (btf_asm_varent): Likewise.
20339 (btf_asm_func_arg): Likewise.
20340 (btf_asm_datasec_entry): Likewise.
20341 (btf_asm_datasec_type): Likewise.
20342 (btf_asm_func_type): Likewise. Add index parameter.
20343 (btf_asm_enum_const): Likewise.
20344 (btf_asm_sou_member): Likewise.
20345 (output_btf_vars): Update btf_asm_* call accordingly.
20346 (output_asm_btf_sou_fields): Likewise.
20347 (output_asm_btf_enum_list): Likewise.
20348 (output_asm_btf_func_args_list): Likewise.
20349 (output_asm_btf_vlen_bytes): Likewise.
20350 (output_btf_func_types): Add ctf_container_ref parameter.
20351 Pass it to btf_asm_func_type.
20352 (output_btf_datasec_types): Update btf_asm_datsec_type call similarly.
20353 (btf_output): Update output_btf_func_types call similarly.
20355 2023-05-31 David Faust <david.faust@oracle.com>
20357 * btfout.cc (btf_asm_type): Add dedicated cases for BTF_KIND_ARRAY
20358 and BTF_KIND_FWD which do not use the size/type field at all.
20360 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
20362 * rtl.h (subreg_lowpart_p): Change return type from int to bool.
20363 (active_insn_p): Ditto.
20364 (in_sequence_p): Ditto.
20365 (unshare_all_rtl): Change return type from int to void.
20366 * emit-rtl.h (mem_expr_equal_p): Change return type from int to bool.
20367 * emit-rtl.cc (subreg_lowpart_p): Change return type from int to bool
20368 and adjust function body accordingly.
20369 (mem_expr_equal_p): Ditto.
20370 (unshare_all_rtl): Change return type from int to void
20371 and adjust function body accordingly.
20372 (verify_rtx_sharing): Remove unneeded return.
20373 (active_insn_p): Change return type from int to bool
20374 and adjust function body accordingly.
20375 (in_sequence_p): Ditto.
20377 2023-05-31 Uros Bizjak <ubizjak@gmail.com>
20379 * rtl.h (true_dependence): Change return type from int to bool.
20380 (canon_true_dependence): Ditto.
20381 (read_dependence): Ditto.
20382 (anti_dependence): Ditto.
20383 (canon_anti_dependence): Ditto.
20384 (output_dependence): Ditto.
20385 (canon_output_dependence): Ditto.
20386 (may_alias_p): Ditto.
20387 * alias.h (alias_sets_conflict_p): Ditto.
20388 (alias_sets_must_conflict_p): Ditto.
20389 (objects_must_conflict_p): Ditto.
20390 (nonoverlapping_memrefs_p): Ditto.
20391 * alias.cc (rtx_equal_for_memref_p): Remove forward declaration.
20392 (record_set): Ditto.
20393 (base_alias_check): Ditto.
20394 (find_base_value): Ditto.
20395 (mems_in_disjoint_alias_sets_p): Ditto.
20396 (get_alias_set_entry): Ditto.
20397 (decl_for_component_ref): Ditto.
20398 (write_dependence_p): Ditto.
20399 (memory_modified_1): Ditto.
20400 (mems_in_disjoint_alias_set_p): Change return type from int to bool
20401 and adjust function body accordingly.
20402 (alias_sets_conflict_p): Ditto.
20403 (alias_sets_must_conflict_p): Ditto.
20404 (objects_must_conflict_p): Ditto.
20405 (rtx_equal_for_memref_p): Ditto.
20406 (base_alias_check): Ditto.
20407 (read_dependence): Ditto.
20408 (nonoverlapping_memrefs_p): Ditto.
20409 (true_dependence_1): Ditto.
20410 (true_dependence): Ditto.
20411 (canon_true_dependence): Ditto.
20412 (write_dependence_p): Ditto.
20413 (anti_dependence): Ditto.
20414 (canon_anti_dependence): Ditto.
20415 (output_dependence): Ditto.
20416 (canon_output_dependence): Ditto.
20417 (may_alias_p): Ditto.
20418 (init_alias_analysis): Change "changed" variable to bool.
20420 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20422 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): Change
20423 expand into define_insn_and_split.
20425 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20427 * config/riscv/vector.md: Remove FRM.
20429 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20431 * config/riscv/vector.md: Remove FRM.
20433 2023-05-31 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20435 * config/riscv/vector.md: Remove FRM.
20437 2023-05-31 Christophe Lyon <christophe.lyon@linaro.org>
20440 * config/aarch64/aarch64.md (aarch64_rev16si2_alt3): New
20443 2023-05-31 Richard Biener <rguenther@suse.de>
20446 PR tree-optimization/109143
20447 * tree-ssa-structalias.cc (struct topo_info): Remove.
20448 (init_topo_info): Likewise.
20449 (free_topo_info): Likewise.
20450 (compute_topo_order): Simplify API, put the component
20451 with ESCAPED last so it's processed first.
20452 (topo_visit): Adjust.
20453 (solve_graph): Likewise.
20455 2023-05-31 Richard Biener <rguenther@suse.de>
20457 * tree-ssa-structalias.cc (constraint_stats::num_avoided_edges):
20459 (add_graph_edge): Count redundant edges we avoid to create.
20460 (dump_sa_stats): Dump them.
20461 (ipa_pta_execute): Do not dump generating constraints when
20462 we are not dumping them.
20464 2023-05-31 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20466 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<VDMOV:mode>): Rewrite
20467 output template to avoid explicit switch on which_alternative.
20468 (*aarch64_simd_mov<VQMOV:mode>): Likewise.
20469 (and<mode>3): Likewise.
20470 (ior<mode>3): Likewise.
20471 * config/aarch64/aarch64.md (*mov<mode>_aarch64): Likewise.
20473 2023-05-31 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20475 * config/xtensa/predicates.md (xtensa_bit_join_operator):
20477 * config/xtensa/xtensa.md (ior_op): Remove.
20478 (*shlrd_reg): Rename from "*shlrd_reg_<code>", and add the
20479 insn_and_split pattern of the same name to express and capture
20480 the bit-combining operation with both sides swapped.
20481 In addition, replace use of code iterator with new operator
20483 (*shlrd_const, *shlrd_per_byte):
20484 Likewise regarding the code iterator.
20486 2023-05-31 Cui, Lili <lili.cui@intel.com>
20488 PR tree-optimization/110038
20489 * params.opt: Add a limit on tree-reassoc-width.
20490 * tree-ssa-reassoc.cc
20491 (rewrite_expr_tree_parallel): Add width limit.
20493 2023-05-31 Pan Li <pan2.li@intel.com>
20495 * common/config/riscv/riscv-common.cc:
20496 (riscv_implied_info): Add zvfh item.
20497 (riscv_ext_version_table): Ditto.
20498 (riscv_ext_flag_table): Ditto.
20499 * config/riscv/riscv-opts.h (MASK_ZVFH): New macro.
20500 (TARGET_ZVFH): Ditto.
20502 2023-05-30 liuhongt <hongtao.liu@intel.com>
20504 PR tree-optimization/108804
20505 * tree-vect-patterns.cc (vect_get_range_info): Remove static.
20506 * tree-vect-stmts.cc (vect_create_vectorized_demotion_stmts):
20507 Add new parameter narrow_src_p.
20508 (vectorizable_conversion): Enhance NARROW FLOAT_EXPR
20509 vectorization by truncating to lower precision.
20510 * tree-vectorizer.h (vect_get_range_info): New declare.
20512 2023-05-30 Vladimir N. Makarov <vmakarov@redhat.com>
20514 * lra-int.h (lra_update_sp_offset): Add the prototype.
20515 * lra.cc (setup_sp_offset): Change the return type. Use
20516 lra_update_sp_offset.
20517 * lra-eliminations.cc (lra_update_sp_offset): New function.
20518 (lra_process_new_insns): Push the current insn to reprocess if the
20519 input reload changes sp offset.
20521 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
20524 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
20525 Fix misleading identation.
20527 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
20529 * rtl.h (comparison_dominates_p): Change return type from int to bool.
20530 (condjump_p): Ditto.
20531 (any_condjump_p): Ditto.
20532 (any_uncondjump_p): Ditto.
20533 (simplejump_p): Ditto.
20534 (returnjump_p): Ditto.
20535 (eh_returnjump_p): Ditto.
20536 (onlyjump_p): Ditto.
20537 (invert_jump_1): Ditto.
20538 (invert_jump): Ditto.
20539 (rtx_renumbered_equal_p): Ditto.
20540 (redirect_jump_1): Ditto.
20541 (redirect_jump): Ditto.
20542 (condjump_in_parallel_p): Ditto.
20543 * jump.cc (invert_exp_1): Adjust forward declaration.
20544 (comparison_dominates_p): Change return type from int to bool
20545 and adjust function body accordingly.
20546 (simplejump_p): Ditto.
20547 (condjump_p): Ditto.
20548 (condjump_in_parallel_p): Ditto.
20549 (any_uncondjump_p): Ditto.
20550 (any_condjump_p): Ditto.
20551 (returnjump_p): Ditto.
20552 (eh_returnjump_p): Ditto.
20553 (onlyjump_p): Ditto.
20554 (redirect_jump_1): Ditto.
20555 (redirect_jump): Ditto.
20556 (invert_exp_1): Ditto.
20557 (invert_jump_1): Ditto.
20558 (invert_jump): Ditto.
20559 (rtx_renumbered_equal_p): Ditto.
20561 2023-05-30 Andrew Pinski <apinski@marvell.com>
20563 * fold-const.cc (minmax_from_comparison): Add support for NE_EXPR.
20564 * match.pd ((cond (cmp (convert1? x) c1) (convert2? x) c2) pattern):
20565 Add ne as a possible cmp.
20566 ((a CMP b) ? minmax<a, c> : minmax<b, c> pattern): Likewise.
20568 2023-05-30 Andrew Pinski <apinski@marvell.com>
20570 * match.pd (`(a CMP CST1) ? max<a,CST2> : a`): New
20573 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
20575 * simplify-rtx.cc (simplify_binary_operation_1) <AND>: Use wide-int
20576 instead of HWI_COMPUTABLE_MODE_P and UINTVAL in transformation of
20577 (and (extend X) C) as (zero_extend (and X C)), to also optimize
20578 modes wider than HOST_WIDE_INT.
20580 2023-05-30 Roger Sayle <roger@nextmovesoftware.com>
20583 * simplify-rtx.cc (simplify_const_relational_operation): Return
20584 early if we have a MODE_CC comparison that isn't a COMPARE against
20587 2023-05-30 Robin Dapp <rdapp@ventanamicro.com>
20589 * config/riscv/riscv.cc (riscv_const_insns): Allow
20590 const_vec_duplicates.
20592 2023-05-30 liuhongt <hongtao.liu@intel.com>
20594 PR middle-end/108938
20595 * gimple-ssa-store-merging.cc (is_bswap_or_nop_p): New
20596 function, cut from original find_bswap_or_nop function.
20597 (find_bswap_or_nop): Add a new parameter, detect bswap +
20598 rotate and save rotate result in the new parameter.
20599 (bswap_replace): Add a new parameter to indicate rotate and
20600 generate rotate stmt if needed.
20601 (maybe_optimize_vector_constructor): Adjust for new rotate
20602 parameter in the upper 2 functions.
20603 (pass_optimize_bswap::execute): Ditto.
20604 (imm_store_chain_info::output_merged_store): Ditto.
20606 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20608 * config/aarch64/aarch64-simd.md (aarch64_<sur>adalp<mode>): Delete.
20609 (aarch64_<su>adalp<mode>): New define_expand.
20610 (*aarch64_<su>adalp<mode><vczle><vczbe>_insn): New define_insn.
20611 (aarch64_<su>addlp<mode>): Convert to define_expand.
20612 (*aarch64_<su>addlp<mode><vczle><vczbe>_insn): New define_insn.
20613 * config/aarch64/iterators.md (UNSPEC_SADDLP, UNSPEC_UADDLP): Delete.
20615 (USADDLP): Likewise.
20616 * config/aarch64/predicates.md (vect_par_cnst_even_or_odd_half): Define.
20618 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20620 * config/aarch64/aarch64-builtins.cc (VAR1): Move to after inclusion of
20621 aarch64-builtin-iterators.h. Add definition to remap shadd, uhadd,
20622 srhadd, urhadd builtin codes for standard optab ones.
20623 * config/aarch64/aarch64-simd.md (<u>avg<mode>3_floor): Rename to...
20624 (<su_optab>avg<mode>3_floor): ... This. Expand to RTL codes rather than
20626 (<u>avg<mode>3_ceil): Rename to...
20627 (<su_optab>avg<mode>3_ceil): ... This. Expand to RTL codes rather than
20629 (aarch64_<su>hsub<mode>): New define_expand.
20630 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): Split into...
20631 (*aarch64_<su>h<ADDSUB:optab><mode><vczle><vczbe>_insn): ... This...
20632 (*aarch64_<su>rhadd<mode><vczle><vczbe>_insn): ... And this.
20634 2023-05-30 Andreas Schwab <schwab@suse.de>
20637 * config/riscv/riscv.cc (riscv_asan_shadow_offset): Update to
20638 match libsanitizer.
20640 2023-05-30 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
20642 * config/aarch64/aarch64-modes.def (V16HI, V8SI, V4DI, V2TI): New modes.
20643 * config/aarch64/aarch64-protos.h (aarch64_const_vec_rnd_cst_p):
20645 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
20646 * config/aarch64/aarch64-simd.md (*aarch64_simd_sra<mode>): Rename to...
20647 (aarch64_<sra_op>sra_n<mode>_insn): ... This.
20648 (aarch64_<sra_op>rsra_n<mode>_insn): New define_insn.
20649 (aarch64_<sra_op>sra_n<mode>): New define_expand.
20650 (aarch64_<sra_op>rsra_n<mode>): Likewise.
20651 (aarch64_<sur>sra_n<mode>): Rename to...
20652 (aarch64_<sur>sra_ndi): ... This.
20653 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode): Add
20654 any_target_p argument.
20655 (aarch64_extract_vec_duplicate_wide_int): Define.
20656 (aarch64_const_vec_rsra_rnd_imm_p): Likewise.
20657 (aarch64_const_vec_rnd_cst_p): Likewise.
20658 (aarch64_vector_mode_supported_any_target_p): Likewise.
20659 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Likewise.
20660 * config/aarch64/iterators.md (UNSPEC_SRSRA, UNSPEC_URSRA): Delete.
20661 (VSRA): Adjust for the above.
20663 (V2XWIDE): New mode_attr.
20664 (vec_or_offset): Likewise.
20665 (SHIFTEXTEND): Likewise.
20666 * config/aarch64/predicates.md (aarch64_simd_rsra_rnd_imm_vec): New
20668 * doc/tm.texi (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
20669 clarify that it applies to current target options.
20670 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Document.
20671 * doc/tm.texi.in: Regenerate.
20672 * stor-layout.cc (mode_for_vector): Check
20673 vector_mode_supported_any_target_p when iterating through vector modes.
20674 * target.def (TARGET_VECTOR_MODE_SUPPORTED_P): Adjust description to
20675 clarify that it applies to current target options.
20676 (TARGET_VECTOR_MODE_SUPPORTED_ANY_TARGET_P): Define.
20678 2023-05-30 Lili Cui <lili.cui@intel.com>
20680 PR tree-optimization/98350
20681 * tree-ssa-reassoc.cc
20682 (rewrite_expr_tree_parallel): Rewrite this function.
20683 (rank_ops_for_fma): New.
20684 (reassociate_bb): Handle new function.
20686 2023-05-30 Uros Bizjak <ubizjak@gmail.com>
20688 * rtl.h (rtx_addr_can_trap_p): Change return type from int to bool.
20689 (rtx_unstable_p): Ditto.
20690 (reg_mentioned_p): Ditto.
20691 (reg_referenced_p): Ditto.
20692 (reg_used_between_p): Ditto.
20693 (reg_set_between_p): Ditto.
20694 (modified_between_p): Ditto.
20695 (no_labels_between_p): Ditto.
20696 (modified_in_p): Ditto.
20697 (reg_set_p): Ditto.
20698 (multiple_sets): Ditto.
20699 (set_noop_p): Ditto.
20700 (noop_move_p): Ditto.
20701 (reg_overlap_mentioned_p): Ditto.
20702 (dead_or_set_p): Ditto.
20703 (dead_or_set_regno_p): Ditto.
20704 (find_reg_fusage): Ditto.
20705 (find_regno_fusage): Ditto.
20706 (side_effects_p): Ditto.
20707 (volatile_refs_p): Ditto.
20708 (volatile_insn_p): Ditto.
20709 (may_trap_p_1): Ditto.
20710 (may_trap_p): Ditto.
20711 (may_trap_or_fault_p): Ditto.
20712 (computed_jump_p): Ditto.
20713 (auto_inc_p): Ditto.
20714 (loc_mentioned_in_p): Ditto.
20715 * rtlanal.cc (computed_jump_p_1): Adjust forward declaration.
20716 (rtx_unstable_p): Change return type from int to bool
20717 and adjust function body accordingly.
20718 (rtx_addr_can_trap_p): Ditto.
20719 (reg_mentioned_p): Ditto.
20720 (no_labels_between_p): Ditto.
20721 (reg_used_between_p): Ditto.
20722 (reg_referenced_p): Ditto.
20723 (reg_set_between_p): Ditto.
20724 (reg_set_p): Ditto.
20725 (modified_between_p): Ditto.
20726 (modified_in_p): Ditto.
20727 (multiple_sets): Ditto.
20728 (set_noop_p): Ditto.
20729 (noop_move_p): Ditto.
20730 (reg_overlap_mentioned_p): Ditto.
20731 (dead_or_set_p): Ditto.
20732 (dead_or_set_regno_p): Ditto.
20733 (find_reg_fusage): Ditto.
20734 (find_regno_fusage): Ditto.
20735 (remove_node_from_insn_list): Ditto.
20736 (volatile_insn_p): Ditto.
20737 (volatile_refs_p): Ditto.
20738 (side_effects_p): Ditto.
20739 (may_trap_p_1): Ditto.
20740 (may_trap_p): Ditto.
20741 (may_trap_or_fault_p): Ditto.
20742 (computed_jump_p): Ditto.
20743 (auto_inc_p): Ditto.
20744 (loc_mentioned_in_p): Ditto.
20745 * combine.cc (can_combine_p): Update indirect function.
20747 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20749 * config/riscv/autovec.md (<optab><mode><vconvert>2): New pattern.
20750 * config/riscv/iterators.md: New attribute.
20751 * config/riscv/vector-iterators.md: New attribute.
20753 2023-05-30 From: Juzhe-Zhong <juzhe.zhong@rivai.ai>
20755 * config/riscv/riscv.md: Fix signed and unsigned comparison
20758 2023-05-30 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20760 * config/riscv/autovec.md (fnma<mode>4): New pattern.
20761 (*fnma<mode>): Ditto.
20763 2023-05-29 Die Li <lidie@eswincomputing.com>
20765 * config/riscv/riscv.cc (riscv_expand_conditional_move_onesided):
20767 (riscv_expand_conditional_move): Reuse the TARGET_SFB_ALU expand
20768 process for TARGET_XTHEADCONDMOV
20770 2023-05-29 Uros Bizjak <ubizjak@gmail.com>
20773 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also require
20774 TARGET_AVX512BW to generate truncv16hiv16qi2.
20776 2023-05-29 Jivan Hakobyan <jivanhakobyan9@gmail.com>
20778 * config/riscv/riscv.md (and<mode>3): New expander.
20779 (*and<mode>3) New pattern.
20780 * config/riscv/predicates.md (arith_operand_or_mode_mask): New
20783 2023-05-29 Pan Li <pan2.li@intel.com>
20785 * config/riscv/riscv-v.cc (emit_vlmax_insn): Remove unnecessary
20786 comments and rename local variables.
20787 (emit_nonvlmax_insn): Diito.
20788 (emit_vlmax_merge_insn): Ditto.
20789 (emit_vlmax_cmp_insn): Ditto.
20790 (emit_vlmax_cmp_mu_insn): Ditto.
20791 (emit_scalar_move_insn): Ditto.
20793 2023-05-29 Pan Li <pan2.li@intel.com>
20795 * config/riscv/riscv-v.cc (emit_vlmax_insn): Eliminate the
20797 (emit_nonvlmax_insn): Ditto.
20798 (emit_vlmax_merge_insn): Ditto.
20799 (emit_vlmax_cmp_insn): Ditto.
20800 (emit_vlmax_cmp_mu_insn): Ditto.
20801 (expand_vec_series): Ditto.
20803 2023-05-29 Pan Li <pan2.li@intel.com>
20805 * config/riscv/riscv-protos.h (enum insn_type): New type.
20806 * config/riscv/riscv-v.cc (RVV_INSN_OPERANDS_MAX): New macro.
20807 (rvv_builder::can_duplicate_repeating_sequence_p): Align the referenced
20809 (rvv_builder::get_merged_repeating_sequence): Ditto.
20810 (rvv_builder::repeating_sequence_use_merge_profitable_p): New function
20811 to evaluate the optimization cost.
20812 (rvv_builder::get_merge_scalar_mask): New function to get the merge
20814 (emit_scalar_move_insn): New function to emit vmv.s.x.
20815 (emit_vlmax_integer_move_insn): New function to emit vlmax vmv.v.x.
20816 (emit_nonvlmax_integer_move_insn): New function to emit nonvlmax
20818 (get_repeating_sequence_dup_machine_mode): New function to get the dup
20820 (expand_vector_init_merge_repeating_sequence): New function to perform
20822 (expand_vec_init): Add this vector init optimization.
20823 * config/riscv/riscv.h (BITS_PER_WORD): New macro.
20825 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
20827 * tree-ssa-loop-manip.cc (create_iv): Try harder to find a SLOC to
20828 put onto the increment when it is inserted after the position.
20830 2023-05-29 Eric Botcazou <ebotcazou@adacore.com>
20832 * match.pd ((T)P - (T)(P + A) -> -(T) A): Avoid artificial overflow
20835 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20837 * config/riscv/riscv-vsetvl.cc (source_equal_p): Fix ICE.
20839 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20841 * config/riscv/autovec.md (fma<mode>4): New pattern.
20842 (*fma<mode>): Ditto.
20843 * config/riscv/riscv-protos.h (enum insn_type): New enum.
20844 (emit_vlmax_ternary_insn): New function.
20845 * config/riscv/riscv-v.cc (emit_vlmax_ternary_insn): Ditto.
20847 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20849 * config/riscv/vector.md: Fix vimuladd instruction bug.
20851 2023-05-29 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20853 * config/riscv/riscv.cc (global_state_unknown_p): New function.
20854 (riscv_mode_after): Fix incorrect VXM.
20856 2023-05-29 Pan Li <pan2.li@intel.com>
20858 * common/config/riscv/riscv-common.cc:
20859 (riscv_implied_info): Add zvfhmin item.
20860 (riscv_ext_version_table): Ditto.
20861 (riscv_ext_flag_table): Ditto.
20862 * config/riscv/riscv-opts.h (MASK_ZVFHMIN): New macro.
20863 (TARGET_ZFHMIN): Align indent.
20864 (TARGET_ZFH): Ditto.
20865 (TARGET_ZVFHMIN): New macro.
20867 2023-05-27 liuhongt <hongtao.liu@intel.com>
20870 * config/i386/sse.md (*andnot<mode>3): Extend below splitter
20871 to VI_AVX2 to cover more modes.
20873 2023-05-27 liuhongt <hongtao.liu@intel.com>
20875 * config/i386/x86-tune.def (X86_TUNE_AVOID_FALSE_DEP_FOR_BMI):
20876 Remove ATOM and ICELAKE(and later) core processors.
20878 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
20880 * config/riscv/autovec.md (<optab><mode>2): Add vneg/vnot.
20882 * config/riscv/riscv-protos.h (emit_vlmax_masked_mu_insn):
20884 * config/riscv/riscv-v.cc (emit_vlmax_masked_mu_insn): New
20887 2023-05-26 Robin Dapp <rdapp@ventanamicro.com>
20888 Juzhe Zhong <juzhe.zhong@rivai.ai>
20890 * config/riscv/autovec.md (<optab><v_double_trunc><mode>2): New
20892 (<optab><v_quad_trunc><mode>2): Dito.
20893 (<optab><v_oct_trunc><mode>2): Dito.
20894 (trunc<mode><v_double_trunc>2): Dito.
20895 (trunc<mode><v_quad_trunc>2): Dito.
20896 (trunc<mode><v_oct_trunc>2): Dito.
20897 * config/riscv/riscv-protos.h (vectorize_related_mode): Define.
20898 (autovectorize_vector_modes): Define.
20899 * config/riscv/riscv-v.cc (vectorize_related_mode): Implement
20901 (autovectorize_vector_modes): Implement hook.
20902 * config/riscv/riscv.cc (riscv_autovectorize_vector_modes):
20903 Implement target hook.
20904 (riscv_vectorize_related_mode): Implement target hook.
20905 (TARGET_VECTORIZE_AUTOVECTORIZE_VECTOR_MODES): Define.
20906 (TARGET_VECTORIZE_RELATED_MODE): Define.
20907 * config/riscv/vector-iterators.md: Add lowercase versions of
20908 mode_attr iterators.
20910 2023-05-26 Andrew Stubbs <ams@codesourcery.com>
20911 Tobias Burnus <tobias@codesourcery.com>
20913 * config/gcn/gcn-hsa.h (XNACKOPT): New macro.
20914 (ASM_SPEC): Use XNACKOPT.
20915 * config/gcn/gcn-opts.h (enum sram_ecc_type): Rename to ...
20916 (enum hsaco_attr_type): ... this, and generalize the names.
20917 (TARGET_XNACK): New macro.
20918 * config/gcn/gcn.cc (gcn_option_override): Update to sorry for all
20920 (output_file_start): Update xnack handling.
20921 (gcn_hsa_declare_function_name): Use TARGET_XNACK.
20922 * config/gcn/gcn.opt (-mxnack): Add the "on/off/any" syntax.
20923 (sram_ecc_type): Rename to ...
20924 (hsaco_attr_type: ... this.)
20925 * config/gcn/mkoffload.cc (SET_XNACK_ANY): New macro.
20926 (TEST_XNACK): Delete.
20927 (TEST_XNACK_ANY): New macro.
20928 (TEST_XNACK_ON): New macro.
20929 (main): Support the new -mxnack=on/off/any syntax.
20930 * doc/invoke.texi (-mxnack): Update for new syntax.
20932 2023-05-26 Andrew Pinski <apinski@marvell.com>
20934 * genmatch.cc (emit_debug_printf): New function.
20935 (dt_simplify::gen_1): Emit printf into the code
20936 before the `return true` or returning the folded result
20937 instead of emitting it always.
20939 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20941 * config/xtensa/xtensa-protos.h
20942 (xtensa_expand_block_set_unrolled_loop,
20943 xtensa_expand_block_set_small_loop): Remove.
20944 (xtensa_expand_block_set): New prototype.
20945 * config/xtensa/xtensa.cc
20946 (xtensa_expand_block_set_libcall): New subfunction.
20947 (xtensa_expand_block_set_unrolled_loop,
20948 xtensa_expand_block_set_small_loop): Rewrite as subfunctions.
20949 (xtensa_expand_block_set): New function that calls the above
20951 * config/xtensa/xtensa.md (memsetsi): Change to invoke only
20952 xtensa_expand_block_set().
20954 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20956 * config/xtensa/xtensa-protos.h (xtensa_m1_or_1_thru_15):
20958 * config/xtensa/xtensa.cc (xtensa_m1_or_1_thru_15):
20960 * config/xtensa/constraints.md (O):
20961 Change to use the above function.
20962 * config/xtensa/xtensa.md (*subsi3_from_const):
20963 New insn_and_split pattern.
20965 2023-05-26 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
20967 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3):
20968 Retract excessive line folding, and correct the value of
20969 the "length" insn attribute related to TARGET_DENSITY.
20970 (*extzvsi-1bit_addsubx): Ditto.
20972 2023-05-26 Uros Bizjak <ubizjak@gmail.com>
20974 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi):
20975 Do not disable call to ix86_expand_vecop_qihi2.
20977 2023-05-26 liuhongt <hongtao.liu@intel.com>
20981 * ira-costs.cc (scan_one_insn): Only use NO_REGS in cost
20982 calculation when !hard_regno_mode_ok for GENERAL_REGS and
20983 mode, otherwise still use GENERAL_REGS.
20985 2023-05-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
20987 * config/riscv/riscv.cc (vector_zero_call_used_regs): Add
20988 explict VL and drop VL in ops.
20990 2023-05-25 Jin Ma <jinma@linux.alibaba.com>
20992 * sched-deps.cc (sched_macro_fuse_insns): Insns should not be fusion
20993 in different BB blocks.
20995 2023-05-25 Uros Bizjak <ubizjak@gmail.com>
20997 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
20998 Rewrite to expand to 2x-wider (e.g. V16QI -> V16HImode)
20999 instructions when available. Emulate truncation via
21000 ix86_expand_vec_perm_const_1 when native truncate insn
21002 (ix86_expand_vecop_qihi_partial) <case MULT>: Use pmovzx
21003 when available. Trivially rename some variables.
21004 (ix86_expand_vecop_qihi): Unconditionally call ix86_expand_vecop_qihi2.
21005 * config/i386/i386.cc (ix86_multiplication_cost): Rewrite cost
21006 calculation of V*QImode emulations to account for generation of
21007 2x-wider mode instructions.
21008 (ix86_shift_rotate_cost): Update cost calculation of V*QImode
21009 emulations to account for generation of 2x-wider mode instructions.
21011 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
21014 * config/avr/avr.cc (avr_can_inline_p): New static function.
21015 (TARGET_CAN_INLINE_P): Define to that function.
21017 2023-05-25 Georg-Johann Lay <avr@gjlay.de>
21020 * config/avr/avr.md (*movbitqi.0): Rename to *movbit<mode>.0-6.
21021 Handle any bit position and use mode QISI.
21022 * config/avr/avr.cc (avr_rtx_costs_1) [IOR]: Return a cost
21023 of 2 insns for bit-transfer of respective style.
21025 2023-05-25 Christophe Lyon <christophe.lyon@linaro.org>
21027 * config/arm/iterators.md (MVE_6): Remove.
21028 * config/arm/mve.md: Replace MVE_6 with MVE_5.
21030 2023-05-25 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21031 Richard Sandiford <richard.sandiford@arm.com>
21033 * tree-vect-loop-manip.cc (vect_adjust_loop_lens_control): New
21035 (vect_set_loop_controls_directly): Add decrement IV support.
21036 (vect_set_loop_condition_partial_vectors): Ditto.
21037 * tree-vect-loop.cc (_loop_vec_info::_loop_vec_info): New
21039 * tree-vectorizer.h (LOOP_VINFO_USING_DECREMENTING_IV_P): New
21042 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21045 * config/aarch64/aarch64-simd.md (aarch64_fcadd<rot><mode>): Rename to...
21046 (aarch64_fcadd<rot><mode><vczle><vczbe>): ... This.
21047 Fix canonicalization of PLUS operands.
21048 (aarch64_fcmla<rot><mode>): Rename to...
21049 (aarch64_fcmla<rot><mode><vczle><vczbe>): ... This.
21050 Fix canonicalization of PLUS operands.
21051 (aarch64_fcmla_lane<rot><mode>): Rename to...
21052 (aarch64_fcmla_lane<rot><mode><vczle><vczbe>): ... This.
21053 Fix canonicalization of PLUS operands.
21054 (aarch64_fcmla_laneq<rot>v4hf): Rename to...
21055 (aarch64_fcmla_laneq<rot>v4hf<vczle><vczbe>): ... This.
21056 Fix canonicalization of PLUS operands.
21057 (aarch64_fcmlaq_lane<rot><mode>): Fix canonicalization of PLUS operands.
21059 2023-05-25 Chris Sidebottom <chris.sidebottom@arm.com>
21061 * config/arm/arm.md (rbitsi2): Rename to...
21062 (arm_rbit): ... This.
21063 (ctzsi2): Adjust for the above.
21064 (arm_rev16si2): Convert to define_expand.
21065 (arm_rev16si2_alt1): New pattern.
21066 (arm_rev16si2_alt): Rename to...
21067 (*arm_rev16si2_alt2): ... This.
21068 * config/arm/arm_acle.h (__ror, __rorl, __rorll, __clz, __clzl, __clzll,
21069 __cls, __clsl, __clsll, __revsh, __rev, __revl, __revll, __rev16,
21070 __rev16l, __rev16ll, __rbit, __rbitl, __rbitll): Define intrinsics.
21071 * config/arm/arm_acle_builtins.def (rbit, rev16si2): Define builtins.
21073 2023-05-25 Alex Coplan <alex.coplan@arm.com>
21076 * config/arm/arm.md (movdf): Generate temporary pseudo in DImode
21078 * config/arm/vfp.md (no_literal_pool_df_immediate): Rather than punning an
21079 lvalue DFmode pseudo into DImode, use a DImode pseudo and pun it into
21080 DFmode as an rvalue.
21082 2023-05-25 Richard Biener <rguenther@suse.de>
21085 * tree-vect-stmts.cc (vectorizable_condition): For
21086 embedded comparisons also handle the case when the target
21087 only provides vec_cmp and vcond_mask.
21089 2023-05-25 Claudiu Zissulescu <claziss@gmail.com>
21091 * config/arc/arc.cc (arc_call_tls_get_addr): Simplify access using
21094 2023-05-25 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
21096 * config/aarch64/aarch64.cc (scalar_move_insn_p): New function.
21097 (seq_cost_ignoring_scalar_moves): Likewise.
21098 (aarch64_expand_vector_init): Call seq_cost_ignoring_scalar_moves.
21100 2023-05-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21102 * config/aarch64/arm_neon.h (vcage_f64): Reimplement with builtins.
21103 (vcage_f32): Likewise.
21104 (vcages_f32): Likewise.
21105 (vcageq_f32): Likewise.
21106 (vcaged_f64): Likewise.
21107 (vcageq_f64): Likewise.
21108 (vcagts_f32): Likewise.
21109 (vcagt_f32): Likewise.
21110 (vcagt_f64): Likewise.
21111 (vcagtq_f32): Likewise.
21112 (vcagtd_f64): Likewise.
21113 (vcagtq_f64): Likewise.
21114 (vcale_f32): Likewise.
21115 (vcale_f64): Likewise.
21116 (vcaled_f64): Likewise.
21117 (vcales_f32): Likewise.
21118 (vcaleq_f32): Likewise.
21119 (vcaleq_f64): Likewise.
21120 (vcalt_f32): Likewise.
21121 (vcalt_f64): Likewise.
21122 (vcaltd_f64): Likewise.
21123 (vcaltq_f32): Likewise.
21124 (vcaltq_f64): Likewise.
21125 (vcalts_f32): Likewise.
21127 2023-05-25 Hu, Lin1 <lin1.hu@intel.com>
21131 * config/i386/avx512bwintrin.h (_mm512_srli_epi16): Change type from
21132 int to const int or const int to const unsigned int.
21133 (_mm512_mask_srli_epi16): Ditto.
21134 (_mm512_slli_epi16): Ditto.
21135 (_mm512_mask_slli_epi16): Ditto.
21136 (_mm512_maskz_slli_epi16): Ditto.
21137 (_mm512_srai_epi16): Ditto.
21138 (_mm512_mask_srai_epi16): Ditto.
21139 (_mm512_maskz_srai_epi16): Ditto.
21140 * config/i386/avx512fintrin.h (_mm512_slli_epi64): Ditto.
21141 (_mm512_mask_slli_epi64): Ditto.
21142 (_mm512_maskz_slli_epi64): Ditto.
21143 (_mm512_srli_epi64): Ditto.
21144 (_mm512_mask_srli_epi64): Ditto.
21145 (_mm512_maskz_srli_epi64): Ditto.
21146 (_mm512_srai_epi64): Ditto.
21147 (_mm512_mask_srai_epi64): Ditto.
21148 (_mm512_maskz_srai_epi64): Ditto.
21149 (_mm512_slli_epi32): Ditto.
21150 (_mm512_mask_slli_epi32): Ditto.
21151 (_mm512_maskz_slli_epi32): Ditto.
21152 (_mm512_srli_epi32): Ditto.
21153 (_mm512_mask_srli_epi32): Ditto.
21154 (_mm512_maskz_srli_epi32): Ditto.
21155 (_mm512_srai_epi32): Ditto.
21156 (_mm512_mask_srai_epi32): Ditto.
21157 (_mm512_maskz_srai_epi32): Ditto.
21158 * config/i386/avx512vlbwintrin.h (_mm256_mask_srai_epi16): Ditto.
21159 (_mm256_maskz_srai_epi16): Ditto.
21160 (_mm_mask_srai_epi16): Ditto.
21161 (_mm_maskz_srai_epi16): Ditto.
21162 (_mm256_mask_slli_epi16): Ditto.
21163 (_mm256_maskz_slli_epi16): Ditto.
21164 (_mm_mask_slli_epi16): Ditto.
21165 (_mm_maskz_slli_epi16): Ditto.
21166 (_mm_maskz_srli_epi16): Ditto.
21167 * config/i386/avx512vlintrin.h (_mm256_mask_srli_epi32): Ditto.
21168 (_mm256_maskz_srli_epi32): Ditto.
21169 (_mm_mask_srli_epi32): Ditto.
21170 (_mm_maskz_srli_epi32): Ditto.
21171 (_mm256_mask_srli_epi64): Ditto.
21172 (_mm256_maskz_srli_epi64): Ditto.
21173 (_mm_mask_srli_epi64): Ditto.
21174 (_mm_maskz_srli_epi64): Ditto.
21175 (_mm256_mask_srai_epi32): Ditto.
21176 (_mm256_maskz_srai_epi32): Ditto.
21177 (_mm_mask_srai_epi32): Ditto.
21178 (_mm_maskz_srai_epi32): Ditto.
21179 (_mm256_srai_epi64): Ditto.
21180 (_mm256_mask_srai_epi64): Ditto.
21181 (_mm256_maskz_srai_epi64): Ditto.
21182 (_mm_srai_epi64): Ditto.
21183 (_mm_mask_srai_epi64): Ditto.
21184 (_mm_maskz_srai_epi64): Ditto.
21185 (_mm_mask_slli_epi32): Ditto.
21186 (_mm_maskz_slli_epi32): Ditto.
21187 (_mm_mask_slli_epi64): Ditto.
21188 (_mm_maskz_slli_epi64): Ditto.
21189 (_mm256_mask_slli_epi32): Ditto.
21190 (_mm256_maskz_slli_epi32): Ditto.
21191 (_mm256_mask_slli_epi64): Ditto.
21192 (_mm256_maskz_slli_epi64): Ditto.
21194 2023-05-25 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21196 * config/riscv/vector.md: Remove FRM_REGNUM dependency in rtz
21199 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21201 * data-streamer-in.cc (streamer_read_value_range): Handle NANs.
21202 * data-streamer-out.cc (streamer_write_vrange): Same.
21203 * value-range.h (class vrange): Make streamer_write_vrange a friend.
21205 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21207 * value-query.cc (range_query::get_tree_range): Set NAN directly
21209 * value-range.cc (frange::set): Assert that bounds are not NAN.
21211 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21213 * value-range.cc (add_vrange): Handle known NANs.
21215 2023-05-25 Aldy Hernandez <aldyh@redhat.com>
21217 * value-range.h (frange::set_nan): New.
21219 2023-05-25 Alexandre Oliva <oliva@adacore.com>
21222 * emit-rtl.cc (validate_subreg): Reject a SUBREG of a MEM that
21223 requires stricter alignment than MEM's.
21225 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21227 PR tree-optimization/107822
21228 PR tree-optimization/107986
21229 * Makefile.in (OBJS): Add gimple-range-phi.o.
21230 * gimple-range-cache.h (ranger_cache::m_estimate): New
21231 phi_analyzer pointer member.
21232 * gimple-range-fold.cc (fold_using_range::range_of_phi): Use
21233 phi_analyzer if no loop info is available.
21234 * gimple-range-phi.cc: New file.
21235 * gimple-range-phi.h: New file.
21236 * tree-vrp.cc (execute_ranger_vrp): Utililze a phi_analyzer.
21238 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21240 * gimple-range-fold.cc (fur_list::fur_list): Add range_query param
21242 (fold_range): Add range_query parameter.
21243 (fur_relation::fur_relation): New.
21244 (fur_relation::trio): New.
21245 (fur_relation::register_relation): New.
21246 (fold_relations): New.
21247 * gimple-range-fold.h (fold_range): Adjust prototypes.
21248 (fold_relations): New.
21250 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21252 * gimple-range-cache.cc (ssa_cache::range_of_expr): New.
21253 * gimple-range-cache.h (class ssa_cache): Inherit from range_query.
21254 (ranger_cache::const_query): New.
21255 * gimple-range.cc (gimple_ranger::const_query): New.
21256 * gimple-range.h (gimple_ranger::const_query): New prototype.
21258 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21260 * gimple-range-cache.cc (ssa_cache::dump): Use get_range.
21261 (ssa_cache::dump_range_query): Delete.
21262 (ssa_lazy_cache::dump_range_query): Delete.
21263 (ssa_lazy_cache::get_range): Move from header file.
21264 (ssa_lazy_cache::clear_range): ditto.
21265 (ssa_lazy_cache::clear): Ditto.
21266 * gimple-range-cache.h (class ssa_cache): Virtualize.
21267 (class ssa_lazy_cache): Inherit and virtualize.
21269 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
21271 * value-range.h (vrange::kind): Remove.
21273 2023-05-24 Roger Sayle <roger@nextmovesoftware.com>
21275 PR middle-end/109840
21276 * match.pd <popcount optimizations>: Preserve zero-extension when
21277 optimizing popcount((T)bswap(x)) and popcount((T)rotate(x,y)) as
21278 popcount((T)x), so the popcount's argument keeps the same type.
21279 <parity optimizations>: Likewise preserve extensions when
21280 simplifying parity((T)bswap(x)) and parity((T)rotate(x,y)) as
21281 parity((T)x), so that the parity's argument type is the same.
21283 2023-05-24 Aldy Hernandez <aldyh@redhat.com>
21285 * ipa-cp.cc (ipa_value_range_from_jfunc): Use new ipa_vr API.
21286 (ipcp_store_vr_results): Same.
21287 * ipa-prop.cc (ipa_vr::ipa_vr): New.
21288 (ipa_vr::get_vrange): New.
21289 (ipa_vr::set_unknown): New.
21290 (ipa_vr::streamer_read): New.
21291 (ipa_vr::streamer_write): New.
21292 (write_ipcp_transformation_info): Use new ipa_vr API.
21293 (read_ipcp_transformation_info): Same.
21294 (ipa_vr::nonzero_p): Delete.
21295 (ipcp_update_vr): Use new ipa_vr API.
21296 * ipa-prop.h (class ipa_vr): Provide an API and hide internals.
21297 * ipa-sra.cc (zap_useless_ipcp_results): Use new ipa_vr API.
21299 2023-05-24 Jan-Benedict Glaw <jbglaw@lug-owl.de>
21301 * config/mcore/mcore.cc (output_inline_const) Make buffer smaller to
21302 silence overflow warnings later on.
21304 2023-05-24 Uros Bizjak <ubizjak@gmail.com>
21306 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2):
21307 Remove handling of V8QImode.
21308 * config/i386/mmx.md (v<insn>v8qi3): Move from sse.md.
21309 Call ix86_expand_vecop_qihi_partial. Enable for TARGET_MMX_WITH_SSE.
21310 (v<insn>v4qi3): Ditto.
21311 * config/i386/sse.md (v<insn>v8qi3): Remove.
21313 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21316 * config/aarch64/aarch64-simd.md (aarch64_simd_lshr<mode>): Rename to...
21317 (aarch64_simd_lshr<mode><vczle><vczbe>): ... This.
21318 (aarch64_simd_ashr<mode>): Rename to...
21319 (aarch64_simd_ashr<mode><vczle><vczbe>): ... This.
21320 (aarch64_simd_imm_shl<mode>): Rename to...
21321 (aarch64_simd_imm_shl<mode><vczle><vczbe>): ... This.
21322 (aarch64_simd_reg_sshl<mode>): Rename to...
21323 (aarch64_simd_reg_sshl<mode><vczle><vczbe>): ... This.
21324 (aarch64_simd_reg_shl<mode>_unsigned): Rename to...
21325 (aarch64_simd_reg_shl<mode>_unsigned<vczle><vczbe>): ... This.
21326 (aarch64_simd_reg_shl<mode>_signed): Rename to...
21327 (aarch64_simd_reg_shl<mode>_signed<vczle><vczbe>): ... This.
21328 (vec_shr_<mode>): Rename to...
21329 (vec_shr_<mode><vczle><vczbe>): ... This.
21330 (aarch64_<sur>shl<mode>): Rename to...
21331 (aarch64_<sur>shl<mode><vczle><vczbe>): ... This.
21332 (aarch64_<sur>q<r>shl<mode>): Rename to...
21333 (aarch64_<sur>q<r>shl<mode><vczle><vczbe>): ... This.
21335 2023-05-24 Richard Biener <rguenther@suse.de>
21338 * config/i386/i386-expand.cc (ix86_expand_vector_init_general):
21339 Perform final vector composition using
21340 ix86_expand_vector_init_general instead of setting
21341 the highpart and lowpart which causes spilling.
21343 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21345 PR tree-optimization/109695
21346 * gimple-range-cache.cc (ranger_cache::get_global_range): Add
21348 * gimple-range-cache.h (ranger_cache::get_global_range): Ditto.
21349 * gimple-range.cc (gimple_ranger::range_of_stmt): Pass changed
21350 flag to set_global_range.
21351 (gimple_ranger::prefill_stmt_dependencies): Ditto.
21353 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21355 PR tree-optimization/109695
21356 * gimple-range-cache.cc (temporal_cache::temporal_value): Return
21358 (temporal_cache::current_p): Check always_current method.
21359 (temporal_cache::set_always_current): Add param and set value
21361 (temporal_cache::always_current_p): New.
21362 (ranger_cache::get_global_range): Adjust.
21363 (ranger_cache::set_global_range): set always current first.
21365 2023-05-24 Andrew MacLeod <amacleod@redhat.com>
21367 PR tree-optimization/109695
21368 * gimple-range-cache.cc (ranger_cache::get_global_range): Call
21369 fold_range with global query to choose an initial value.
21371 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21373 * config/riscv/riscv-protos.h (enum frm_field_enum): Add FRM_
21376 2023-05-24 Richard Biener <rguenther@suse.de>
21378 PR tree-optimization/109849
21379 * tree-ssa-pre.cc (do_hoist_insertion): Do not intersect
21380 expressions but take the first sets.
21382 2023-05-24 Gaius Mulley <gaiusmod2@gmail.com>
21385 * doc/gm2.texi (High procedure function): New node.
21386 (Using): New menu entry for High procedure function.
21388 2023-05-24 Richard Sandiford <richard.sandiford@arm.com>
21390 PR rtl-optimization/109940
21391 * early-remat.cc (postorder_index): Rename to...
21392 (rpo_index): ...this.
21393 (compare_candidates): Sort by decreasing rpo_index rather than
21394 increasing postorder_index.
21395 (early_remat::sort_candidates): Calculate the forward RPO from
21397 (early_remat::local_phase): Follow forward RPO using DF_FORWARD,
21398 rather than DF_BACKWARD in reverse.
21400 2023-05-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21403 * config/arm/arm-builtins.cc (SAT_BINOP_UNSIGNED_IMM_QUALIFIERS): Use
21404 qualifier_none for the return operand.
21406 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21408 * config/riscv/autovec.md (<optab><mode>3): New pattern.
21409 (one_cmpl<mode>2): Ditto.
21410 (*<optab>not<mode>): Ditto.
21411 (*n<optab><mode>): Ditto.
21412 * config/riscv/riscv-v.cc (expand_vec_cmp_float): Change to
21415 2023-05-24 Kewen Lin <linkw@linux.ibm.com>
21417 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Adjust the
21418 calculation on n_perms by considering nvectors_per_build.
21420 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21421 Richard Sandiford <richard.sandiford@arm.com>
21423 * config/riscv/autovec.md (@vcond_mask_<mode><vm>): New pattern.
21424 (vec_cmp<mode><vm>): New pattern.
21425 (vec_cmpu<mode><vm>): New pattern.
21426 (vcond<V:mode><VI:mode>): New pattern.
21427 (vcondu<V:mode><VI:mode>): New pattern.
21428 * config/riscv/riscv-protos.h (enum insn_type): Add new enum.
21429 (emit_vlmax_merge_insn): New function.
21430 (emit_vlmax_cmp_insn): Ditto.
21431 (emit_vlmax_cmp_mu_insn): Ditto.
21432 (expand_vec_cmp): Ditto.
21433 (expand_vec_cmp_float): Ditto.
21434 (expand_vcond): Ditto.
21435 * config/riscv/riscv-v.cc (emit_vlmax_merge_insn): Ditto.
21436 (emit_vlmax_cmp_insn): Ditto.
21437 (emit_vlmax_cmp_mu_insn): Ditto.
21438 (get_cmp_insn_code): Ditto.
21439 (expand_vec_cmp): Ditto.
21440 (expand_vec_cmp_float): Ditto.
21441 (expand_vcond): Ditto.
21443 2023-05-24 Pan Li <pan2.li@intel.com>
21445 * config/riscv/genrvv-type-indexer.cc (main): Add
21446 unsigned_eew*_lmul1_interpret for indexer.
21447 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21448 Register vuint*m1_t interpret function.
21449 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
21450 New macro for vuint8m1_t.
21451 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21452 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21453 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21454 (vbool1_t): Add to unsigned_eew*_interpret_ops.
21455 (vbool2_t): Likewise.
21456 (vbool4_t): Likewise.
21457 (vbool8_t): Likewise.
21458 (vbool16_t): Likewise.
21459 (vbool32_t): Likewise.
21460 (vbool64_t): Likewise.
21461 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_UNSIGNED_EEW8_LMUL1_INTERPRET_OPS):
21462 New macro for vuint*m1_t.
21463 (DEF_RVV_UNSIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21464 (DEF_RVV_UNSIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21465 (DEF_RVV_UNSIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21466 (required_extensions_p): Add vuint*m1_t interpret case.
21467 * config/riscv/riscv-vector-builtins.def (unsigned_eew8_lmul1_interpret):
21468 Add vuint*m1_t interpret to base type.
21469 (unsigned_eew16_lmul1_interpret): Likewise.
21470 (unsigned_eew32_lmul1_interpret): Likewise.
21471 (unsigned_eew64_lmul1_interpret): Likewise.
21473 2023-05-24 Pan Li <pan2.li@intel.com>
21475 * config/riscv/genrvv-type-indexer.cc (EEW_SIZE_LIST): New macro
21476 for the eew size list.
21477 (LMUL1_LOG2): New macro for the log2 value of lmul=1.
21478 (main): Add signed_eew*_lmul1_interpret for indexer.
21479 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21480 Register vint*m1_t interpret function.
21481 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
21482 New macro for vint8m1_t.
21483 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21484 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21485 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21486 (vbool1_t): Add to signed_eew*_interpret_ops.
21487 (vbool2_t): Likewise.
21488 (vbool4_t): Likewise.
21489 (vbool8_t): Likewise.
21490 (vbool16_t): Likewise.
21491 (vbool32_t): Likewise.
21492 (vbool64_t): Likewise.
21493 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_SIGNED_EEW8_LMUL1_INTERPRET_OPS):
21494 New macro for vint*m1_t.
21495 (DEF_RVV_SIGNED_EEW16_LMUL1_INTERPRET_OPS): Likewise.
21496 (DEF_RVV_SIGNED_EEW32_LMUL1_INTERPRET_OPS): Likewise.
21497 (DEF_RVV_SIGNED_EEW64_LMUL1_INTERPRET_OPS): Likewise.
21498 (required_extensions_p): Add vint8m1_t interpret case.
21499 * config/riscv/riscv-vector-builtins.def (signed_eew8_lmul1_interpret):
21500 Add vint*m1_t interpret to base type.
21501 (signed_eew16_lmul1_interpret): Likewise.
21502 (signed_eew32_lmul1_interpret): Likewise.
21503 (signed_eew64_lmul1_interpret): Likewise.
21505 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21507 * config/riscv/autovec.md: Adjust for new interface.
21508 * config/riscv/riscv-protos.h (emit_vlmax_insn): Add VL operand.
21509 (emit_nonvlmax_insn): Add AVL operand.
21510 * config/riscv/riscv-v.cc (emit_vlmax_insn): Add VL operand.
21511 (emit_nonvlmax_insn): Add AVL operand.
21512 (sew64_scalar_helper): Adjust for new interface.
21513 (expand_tuple_move): Ditto.
21514 * config/riscv/vector.md: Ditto.
21516 2023-05-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21518 * config/riscv/riscv-v.cc (expand_vec_series): Remove magic number.
21519 (expand_const_vector): Ditto.
21520 (legitimize_move): Ditto.
21521 (sew64_scalar_helper): Ditto.
21522 (expand_tuple_move): Ditto.
21523 (expand_vector_init_insert_elems): Ditto.
21524 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
21526 2023-05-24 liuhongt <hongtao.liu@intel.com>
21529 * config/i386/i386.cc (ix86_gimple_fold_builtin): Fold
21530 _mm{,256,512}_abs_{epi8,epi16,epi32,epi64} and
21531 _mm_abs_{pi8,pi16,pi32} into gimple ABS_EXPR.
21532 (ix86_masked_all_ones): Handle 64-bit mask.
21533 * config/i386/i386-builtin.def: Replace icode of related
21534 non-mask simd abs builtins with CODE_FOR_nothing.
21536 2023-05-23 Martin Uecker <uecker@tugraz.at>
21539 * function.cc (gimplify_parm_type): Remove function.
21540 (gimplify_parameters): Call gimplify_type_sizes.
21542 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21544 * config/xtensa/xtensa.md (*addsubx): Rename from '*addx',
21545 and change to also accept '*subx' pattern.
21548 2023-05-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
21550 * config/xtensa/predicates.md (addsub_operator): New.
21551 * config/xtensa/xtensa.md (*extzvsi-1bit_ashlsi3,
21552 *extzvsi-1bit_addsubx): New insn_and_split patterns.
21553 * config/xtensa/xtensa.cc (xtensa_rtx_costs):
21554 Add a special case about ifcvt 'noce_try_cmove()' to handle
21555 constant loads that do not fit into signed 12 bits in the
21556 patterns added above.
21558 2023-05-23 Richard Biener <rguenther@suse.de>
21560 PR tree-optimization/109747
21561 * tree-vect-slp.cc (vect_prologue_cost_for_slp): Pass down
21562 the SLP node only once to the cost hook.
21564 2023-05-23 Georg-Johann Lay <avr@gjlay.de>
21566 * config/avr/avr.cc (avr_insn_cost): New static function.
21567 (TARGET_INSN_COST): Define to that function.
21569 2023-05-23 Richard Biener <rguenther@suse.de>
21572 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
21573 For vector construction or splats apply GPR->XMM move
21574 costing. QImode memory can be handled directly only
21575 with SSE4.1 pinsrb.
21577 2023-05-23 Richard Biener <rguenther@suse.de>
21579 PR tree-optimization/108752
21580 * tree-vect-stmts.cc (vectorizable_operation): For bit
21581 operations with generic word_mode vectors do not cost
21582 an extra stmt. For plus, minus and negate also cost the
21583 constant materialization.
21585 2023-05-23 Uros Bizjak <ubizjak@gmail.com>
21587 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial):
21588 Call ix86_expand_vec_shift_qihi_constant for shifts
21589 with constant count operand.
21590 * config/i386/i386.cc (ix86_shift_rotate_cost):
21591 Handle V4QImode and V8QImode.
21592 * config/i386/mmx.md (<insn>v8qi3): New insn pattern.
21593 (<insn>v4qi3): Ditto.
21595 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21597 * config/riscv/vector.md: Add mode.
21599 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
21601 PR tree-optimization/109934
21602 * value-range.cc (irange::invert): Remove buggy special case.
21604 2023-05-23 Richard Biener <rguenther@suse.de>
21606 * tree-ssa-pre.cc (compute_antic_aux): Dump the correct
21609 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
21612 * config/aarch64/aarch64.cc (aarch64_modes_tieable_p): Allow
21613 subregs between any scalars that are 64 bits or smaller.
21614 * config/aarch64/iterators.md (SUBDI_BITS): New int iterator.
21615 (bits_etype): New int attribute.
21616 * config/aarch64/aarch64.md (*insv_reg<mode>_<SUBDI_BITS>)
21617 (*aarch64_bfi<GPI:mode><ALLX:mode>_<SUBDI_BITS>): New patterns.
21618 (*aarch64_bfidi<ALLX:mode>_subreg_<SUBDI_BITS>): Likewise.
21620 2023-05-23 Richard Sandiford <richard.sandiford@arm.com>
21622 * doc/md.texi: Document that <FOO> can be used to refer to the
21623 numerical value of an int iterator FOO. Tweak other parts of
21624 the int iterator documentation.
21625 * read-rtl.cc (iterator_group::has_self_attr): New field.
21626 (map_attr_string): When has_self_attr is true, make <FOO>
21627 expand to the current value of iterator FOO.
21628 (initialize_iterators): Set has_self_attr for int iterators.
21630 2023-05-23 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21632 * config/riscv/autovec.md: Refactor the framework of RVV auto-vectorization.
21633 * config/riscv/riscv-protos.h (RVV_MISC_OP_NUM): Ditto.
21634 (RVV_UNOP_NUM): New macro.
21635 (RVV_BINOP_NUM): Ditto.
21636 (legitimize_move): Refactor the framework of RVV auto-vectorization.
21637 (emit_vlmax_op): Ditto.
21638 (emit_vlmax_reg_op): Ditto.
21639 (emit_len_op): Ditto.
21640 (emit_len_binop): Ditto.
21641 (emit_vlmax_tany_many): Ditto.
21642 (emit_nonvlmax_tany_many): Ditto.
21643 (sew64_scalar_helper): Ditto.
21644 (expand_tuple_move): Ditto.
21645 * config/riscv/riscv-v.cc (emit_pred_op): Ditto.
21646 (emit_pred_binop): Ditto.
21647 (emit_vlmax_op): Ditto.
21648 (emit_vlmax_tany_many): New function.
21649 (emit_len_op): Remove.
21650 (emit_nonvlmax_tany_many): New function.
21651 (emit_vlmax_reg_op): Remove.
21652 (emit_len_binop): Ditto.
21653 (emit_index_op): Ditto.
21654 (expand_vec_series): Refactor the framework of RVV auto-vectorization.
21655 (expand_const_vector): Ditto.
21656 (legitimize_move): Ditto.
21657 (sew64_scalar_helper): Ditto.
21658 (expand_tuple_move): Ditto.
21659 (expand_vector_init_insert_elems): Ditto.
21660 * config/riscv/riscv.cc (vector_zero_call_used_regs): Ditto.
21661 * config/riscv/vector.md: Ditto.
21663 2023-05-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
21666 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Add predicate
21667 and constraint for operand 0.
21668 (add_vec_concat_subst_be): Likewise.
21670 2023-05-23 Richard Biener <rguenther@suse.de>
21672 PR tree-optimization/109849
21673 * tree-ssa-pre.cc (do_hoist_insertion): Compute ANTIC_OUT
21674 and use that to determine what to hoist.
21676 2023-05-23 Eric Botcazou <ebotcazou@adacore.com>
21678 * fold-const.cc (native_encode_initializer) <CONSTRUCTOR>: Apply the
21679 specific treatment for bit-fields only if they have an integral type
21680 and filter out non-integral bit-fields that do not start and end on
21683 2023-05-23 Aldy Hernandez <aldyh@redhat.com>
21685 PR tree-optimization/109920
21686 * value-range.h (RESIZABLE>::~int_range): Use delete[].
21688 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
21690 * config/i386/i386.cc (ix86_shift_rotate_cost): Correct
21691 calcuation of integer vector mode costs to reflect generated
21692 instruction sequences of different integer vector modes and
21693 different target ABIs. Remove "speed" function argument.
21694 (ix86_rtx_costs): Update call for removed function argument.
21695 (ix86_vector_costs::add_stmt_cost): Ditto.
21697 2023-05-22 Aldy Hernandez <aldyh@redhat.com>
21699 * value-range.h (class Value_Range): Implement set_zero,
21700 set_nonzero, and nonzero_p.
21702 2023-05-22 Uros Bizjak <ubizjak@gmail.com>
21704 * config/i386/i386.cc (ix86_multiplication_cost): Add
21705 the cost of a memory read to the cost of V?QImode sequences.
21707 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21709 * config/riscv/riscv-v.cc: Add "m_" prefix.
21711 2023-05-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
21713 * tree-vect-loop.cc (vect_get_loop_len): Fix issue for
21714 multiple-rgroup of length.
21715 * tree-vect-stmts.cc (vectorizable_store): Ditto.
21716 (vectorizable_load): Ditto.
21717 * tree-vectorizer.h (vect_get_loop_len): Ditto.
21719 2023-05-22 Juzhe-Zhong <juzhe.zhong@rivai.ai>
21721 * config/riscv/riscv.cc (riscv_const_insns): Reorganize the
21724 2023-05-22 Kewen Lin <linkw@linux.ibm.com>
21726 * tree-vect-slp.cc (vect_transform_slp_perm_load_1): Refactor the
21727 handling for the case index == count.
21729 2023-05-21 Georg-Johann Lay <avr@gjlay.de>
21732 * config/avr/avr.cc (avr_fold_builtin) [AVR_BUILTIN_INSERT_BITS]:
21733 Don't fold to XOR / AND / XOR if just one bit is copied to the
21736 2023-05-21 Roger Sayle <roger@nextmovesoftware.com>
21738 * config/nvptx/nvptx.cc (nvptx_expand_brev): Expand target
21739 builtin for bit reversal using brev instruction.
21740 (enum nvptx_builtins): Add NVPTX_BUILTIN_BREV and
21741 NVPTX_BUILTIN_BREVLL.
21742 (nvptx_init_builtins): Define "brev" and "brevll".
21743 (nvptx_expand_builtin): Expand NVPTX_BUILTIN_BREV and
21744 NVPTX_BUILTIN_BREVLL via nvptx_expand_brev function.
21745 * doc/extend.texi (Nvidia PTX Builtin-in Functions): New
21746 section, document __builtin_nvptx_brev{,ll}.
21748 2023-05-21 Jakub Jelinek <jakub@redhat.com>
21750 PR tree-optimization/109505
21751 * match.pd ((x | CST1) & CST2 -> (x & CST2) | (CST1 & CST2),
21752 Combine successive equal operations with constants,
21753 (A +- CST1) +- CST2 -> A + CST3, (CST1 - A) +- CST2 -> CST3 - A,
21754 CST1 - (CST2 - A) -> CST3 + A): Use ! on ops with 2 CONSTANT_CLASS_P
21757 2023-05-21 Andrew Pinski <apinski@marvell.com>
21759 * expr.cc (expand_single_bit_test): Correct bitpos for big-endian.
21761 2023-05-21 Pan Li <pan2.li@intel.com>
21763 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): Add the
21764 rest bool size, aka 2, 4, 8, 16, 32, 64.
21765 * config/riscv/riscv-vector-builtins-functions.def (vreinterpret):
21766 Register vbool[2|4|8|16|32|64] interpret function.
21767 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_BOOL2_INTERPRET_OPS):
21768 New macro for vbool2_t.
21769 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
21770 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
21771 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
21772 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
21773 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
21774 (vint8m1_t): Add the type to bool[2|4|8|16|32|64]_interpret_ops.
21775 (vint16m1_t): Likewise.
21776 (vint32m1_t): Likewise.
21777 (vint64m1_t): Likewise.
21778 (vuint8m1_t): Likewise.
21779 (vuint16m1_t): Likewise.
21780 (vuint32m1_t): Likewise.
21781 (vuint64m1_t): Likewise.
21782 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_BOOL2_INTERPRET_OPS):
21783 New macro for vbool2_t.
21784 (DEF_RVV_BOOL4_INTERPRET_OPS): Likewise.
21785 (DEF_RVV_BOOL8_INTERPRET_OPS): Likewise.
21786 (DEF_RVV_BOOL16_INTERPRET_OPS): Likewise.
21787 (DEF_RVV_BOOL32_INTERPRET_OPS): Likewise.
21788 (DEF_RVV_BOOL64_INTERPRET_OPS): Likewise.
21789 (required_extensions_p): Add vbool[2|4|8|16|32|64] interpret case.
21790 * config/riscv/riscv-vector-builtins.def (bool2_interpret): Add
21791 vbool2_t interprect to base type.
21792 (bool4_interpret): Likewise.
21793 (bool8_interpret): Likewise.
21794 (bool16_interpret): Likewise.
21795 (bool32_interpret): Likewise.
21796 (bool64_interpret): Likewise.
21798 2023-05-21 Andrew Pinski <apinski@marvell.com>
21800 PR middle-end/109919
21801 * expr.cc (expand_single_bit_test): Don't use the
21802 target for expand_expr.
21804 2023-05-20 Gerald Pfeifer <gerald@pfeifer.com>
21806 * doc/install.texi (Specific): Remove de facto empty alpha*-*-*
21809 2023-05-20 Pan Li <pan2.li@intel.com>
21811 * mode-switching.cc (entity_map): Initialize the array to zero.
21814 2023-05-20 Triffid Hunter <triffid.hunter@gmail.com>
21817 * config/avr/avr.md (divmodpsi, udivmodpsi, divmodsi, udivmodsi):
21818 Remove superfluous "parallel" in insn pattern.
21819 ([u]divmod<mode>4): Tidy code. Use gcc_unreachable() instead of
21820 printing error text to assembly.
21822 2023-05-20 Andrew Pinski <apinski@marvell.com>
21824 * expr.cc (fold_single_bit_test): Rename to ...
21825 (expand_single_bit_test): This and expand directly.
21826 (do_store_flag): Update for the rename function.
21828 2023-05-20 Andrew Pinski <apinski@marvell.com>
21830 * expr.cc (fold_single_bit_test): Use BIT_FIELD_REF
21831 instead of shift/and.
21833 2023-05-20 Andrew Pinski <apinski@marvell.com>
21835 * expr.cc (fold_single_bit_test): Add an assert
21836 and simplify based on code being NE_EXPR or EQ_EXPR.
21838 2023-05-20 Andrew Pinski <apinski@marvell.com>
21840 * expr.cc (fold_single_bit_test): Take inner and bitnum
21841 instead of arg0 and arg1. Update the code.
21842 (do_store_flag): Don't create a tree when calling
21843 fold_single_bit_test instead just call it with the bitnum
21844 and the inner tree.
21846 2023-05-20 Andrew Pinski <apinski@marvell.com>
21848 * expr.cc (fold_single_bit_test): Use get_def_for_expr
21849 instead of checking the inner's code.
21851 2023-05-20 Andrew Pinski <apinski@marvell.com>
21853 * expr.cc (fold_single_bit_test_into_sign_test): Inline into ...
21854 (fold_single_bit_test): This and simplify.
21856 2023-05-20 Andrew Pinski <apinski@marvell.com>
21858 * fold-const.cc (fold_single_bit_test_into_sign_test): Move to
21860 (fold_single_bit_test): Likewise.
21861 * expr.cc (fold_single_bit_test_into_sign_test): Move from fold-const.cc
21862 (fold_single_bit_test): Likewise and make static.
21863 * fold-const.h (fold_single_bit_test): Remove declaration.
21865 2023-05-20 Die Li <lidie@eswincomputing.com>
21867 * config/riscv/riscv.cc (riscv_expand_conditional_move): Fix mode
21870 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
21872 * config/riscv/bitmanip.md (branch<X:mode>_bext): New split pattern.
21874 2023-05-20 Raphael Moreira Zinsly <rzinsly@ventanamicro.com>
21877 * config/riscv/bitmanip.md
21878 (<bitmanip_optab>disi2): Match with any_extend.
21879 (<bitmanip_optab>disi2_sext): New pattern to match
21880 with sign extend using an ANDI instruction.
21882 2023-05-19 Nathan Sidwell <nathan@acm.org>
21885 * opts.h (handle_deferred_dump_options): Declare.
21886 * opts-global.cc (handle_common_deferred_options): Do not handle
21888 (handle_deferred_dump_options): New.
21889 * toplev.cc (toplev::main): Call it after plugin init.
21891 2023-05-19 Joern Rennecke <joern.rennecke@embecosm.com>
21893 * config/riscv/constraints.md (DsS, DsD): Restore agreement
21894 with shiftm1 mode attribute.
21896 2023-05-19 Andrew Pinski <apinski@marvell.com>
21899 * gcc.cc (default_compilers["@c-header"]): Add %w
21900 after the --output-pch.
21902 2023-05-19 Vineet Gupta <vineetg@rivosinc.com>
21904 * config/riscv/riscv.cc (riscv_split_integer): if loval is equal
21905 to hival, ASHIFT the corresponding regs.
21907 2023-05-19 Robin Dapp <rdapp@ventanamicro.com>
21909 * config/riscv/riscv.cc (riscv_const_insns): Remove else.
21911 2023-05-19 Jakub Jelinek <jakub@redhat.com>
21913 PR tree-optimization/105776
21914 * tree-ssa-math-opts.cc (arith_overflow_check_p): If cast_stmt is
21915 non-NULL, allow division statement to have a cast as single imm use
21916 rather than comparison/condition.
21917 (match_arith_overflow): In that case remove the cast stmt in addition
21918 to the division statement.
21920 2023-05-19 Jakub Jelinek <jakub@redhat.com>
21922 PR tree-optimization/101856
21923 * tree-ssa-math-opts.cc (match_arith_overflow): Pattern detect
21924 unsigned __builtin_mul_overflow_p even when umulv4_optab doesn't
21925 support it but umul_highpart_optab does.
21927 2023-05-19 Eric Botcazou <ebotcazou@adacore.com>
21929 * varasm.cc (output_constructor_bitfield): Call tree_to_uhwi instead
21930 of tree_to_shwi on array indices. Minor tweaks.
21932 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
21934 * alias.cc (ref_all_alias_ptr_type_p): Use _P() defines from tree.h.
21935 * attribs.cc (diag_attr_exclusions): Ditto.
21936 (decl_attributes): Ditto.
21937 (build_type_attribute_qual_variant): Ditto.
21938 * builtins.cc (fold_builtin_carg): Ditto.
21939 (fold_builtin_next_arg): Ditto.
21940 (do_mpc_arg2): Ditto.
21941 * cfgexpand.cc (expand_return): Ditto.
21942 * cgraph.h (decl_in_symtab_p): Ditto.
21943 (symtab_node::get_create): Ditto.
21944 * dwarf2out.cc (base_type_die): Ditto.
21945 (implicit_ptr_descriptor): Ditto.
21946 (gen_array_type_die): Ditto.
21947 (gen_type_die_with_usage): Ditto.
21948 (optimize_location_into_implicit_ptr): Ditto.
21949 * expr.cc (do_store_flag): Ditto.
21950 * fold-const.cc (negate_expr_p): Ditto.
21951 (fold_negate_expr_1): Ditto.
21952 (fold_convert_const): Ditto.
21953 (fold_convert_loc): Ditto.
21954 (constant_boolean_node): Ditto.
21955 (fold_binary_op_with_conditional_arg): Ditto.
21956 (build_fold_addr_expr_with_type_loc): Ditto.
21957 (fold_comparison): Ditto.
21958 (fold_checksum_tree): Ditto.
21959 (tree_unary_nonnegative_warnv_p): Ditto.
21960 (integer_valued_real_unary_p): Ditto.
21961 (fold_read_from_constant_string): Ditto.
21962 * gcc-rich-location.cc (maybe_range_label_for_tree_type_mismatch::get_text): Ditto.
21963 * gimple-expr.cc (useless_type_conversion_p): Ditto.
21964 (is_gimple_reg): Ditto.
21965 (is_gimple_asm_val): Ditto.
21966 (mark_addressable): Ditto.
21967 * gimple-expr.h (is_gimple_variable): Ditto.
21968 (virtual_operand_p): Ditto.
21969 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores): Ditto.
21970 * gimplify.cc (gimplify_bind_expr): Ditto.
21971 (gimplify_return_expr): Ditto.
21972 (gimple_add_padding_init_for_auto_var): Ditto.
21973 (gimplify_addr_expr): Ditto.
21974 (omp_add_variable): Ditto.
21975 (omp_notice_variable): Ditto.
21976 (omp_get_base_pointer): Ditto.
21977 (omp_strip_components_and_deref): Ditto.
21978 (omp_strip_indirections): Ditto.
21979 (omp_accumulate_sibling_list): Ditto.
21980 (omp_build_struct_sibling_lists): Ditto.
21981 (gimplify_adjust_omp_clauses_1): Ditto.
21982 (gimplify_adjust_omp_clauses): Ditto.
21983 (gimplify_omp_for): Ditto.
21984 (goa_lhs_expr_p): Ditto.
21985 (gimplify_one_sizepos): Ditto.
21986 * graphite-scop-detection.cc (scop_detection::graphite_can_represent_scev): Ditto.
21987 * ipa-devirt.cc (odr_types_equivalent_p): Ditto.
21988 * ipa-prop.cc (ipa_set_jf_constant): Ditto.
21989 (propagate_controlled_uses): Ditto.
21990 * ipa-sra.cc (type_prevails_p): Ditto.
21991 (scan_expr_access): Ditto.
21992 * optabs-tree.cc (optab_for_tree_code): Ditto.
21993 * toplev.cc (wrapup_global_declaration_1): Ditto.
21994 * trans-mem.cc (transaction_invariant_address_p): Ditto.
21995 * tree-cfg.cc (verify_types_in_gimple_reference): Ditto.
21996 (verify_gimple_comparison): Ditto.
21997 (verify_gimple_assign_binary): Ditto.
21998 (verify_gimple_assign_single): Ditto.
21999 * tree-complex.cc (get_component_ssa_name): Ditto.
22000 * tree-emutls.cc (lower_emutls_2): Ditto.
22001 * tree-inline.cc (copy_tree_body_r): Ditto.
22002 (estimate_move_cost): Ditto.
22003 (copy_decl_for_dup_finish): Ditto.
22004 * tree-nested.cc (convert_nonlocal_omp_clauses): Ditto.
22005 (note_nonlocal_vla_type): Ditto.
22006 (convert_local_omp_clauses): Ditto.
22007 (remap_vla_decls): Ditto.
22008 (fixup_vla_decls): Ditto.
22009 * tree-parloops.cc (loop_has_vector_phi_nodes): Ditto.
22010 * tree-pretty-print.cc (print_declaration): Ditto.
22011 (print_call_name): Ditto.
22012 * tree-sra.cc (compare_access_positions): Ditto.
22013 * tree-ssa-alias.cc (compare_type_sizes): Ditto.
22014 * tree-ssa-ccp.cc (get_default_value): Ditto.
22015 * tree-ssa-coalesce.cc (populate_coalesce_list_for_outofssa): Ditto.
22016 * tree-ssa-dom.cc (reduce_vector_comparison_to_scalar_comparison): Ditto.
22017 * tree-ssa-forwprop.cc (can_propagate_from): Ditto.
22018 * tree-ssa-propagate.cc (may_propagate_copy): Ditto.
22019 * tree-ssa-sccvn.cc (fully_constant_vn_reference_p): Ditto.
22020 * tree-ssa-sink.cc (statement_sink_location): Ditto.
22021 * tree-ssa-structalias.cc (type_must_have_pointers): Ditto.
22022 * tree-ssa-ter.cc (find_replaceable_in_bb): Ditto.
22023 * tree-ssa-uninit.cc (warn_uninit): Ditto.
22024 * tree-ssa.cc (maybe_rewrite_mem_ref_base): Ditto.
22025 (non_rewritable_mem_ref_base): Ditto.
22026 * tree-streamer-in.cc (lto_input_ts_type_non_common_tree_pointers): Ditto.
22027 * tree-streamer-out.cc (write_ts_type_non_common_tree_pointers): Ditto.
22028 * tree-vect-generic.cc (do_binop): Ditto.
22030 * tree-vect-stmts.cc (vect_init_vector): Ditto.
22031 * tree-vector-builder.h (tree_vector_builder::note_representative): Ditto.
22032 * tree.cc (sign_mask_for): Ditto.
22033 (verify_type_variant): Ditto.
22034 (gimple_canonical_types_compatible_p): Ditto.
22035 (verify_type): Ditto.
22036 * ubsan.cc (get_ubsan_type_info_for_type): Ditto.
22037 * var-tracking.cc (prepare_call_arguments): Ditto.
22038 (vt_add_function_parameters): Ditto.
22039 * varasm.cc (decode_addr_const): Ditto.
22041 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22043 * omp-low.cc (scan_sharing_clauses): Use _P() defines from tree.h.
22044 (lower_reduction_clauses): Ditto.
22045 (lower_send_clauses): Ditto.
22046 (lower_omp_task_reductions): Ditto.
22047 * omp-oacc-neuter-broadcast.cc (install_var_field): Ditto.
22048 (worker_single_copy): Ditto.
22049 * omp-offload.cc (oacc_rewrite_var_decl): Ditto.
22050 * omp-simd-clone.cc (plausible_type_for_simd_clone): Ditto.
22052 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22054 * lto-streamer-in.cc (lto_input_var_decl_ref): Use _P defines from
22056 (lto_read_body_or_constructor): Ditto.
22057 * lto-streamer-out.cc (tree_is_indexable): Ditto.
22058 (lto_output_var_decl_ref): Ditto.
22059 (DFS::DFS_write_tree_body): Ditto.
22060 (wrap_refs): Ditto.
22061 (write_symbol_extension_info): Ditto.
22063 2023-05-18 Bernhard Reutner-Fischer <aldot@gcc.gnu.org>
22065 * config/aarch64/aarch64.cc (aarch64_short_vector_p): Use _P
22066 defines from tree.h.
22067 (aarch64_mangle_type): Ditto.
22068 * config/alpha/alpha.cc (alpha_in_small_data_p): Ditto.
22069 (alpha_gimplify_va_arg_1): Ditto.
22070 * config/arc/arc.cc (arc_encode_section_info): Ditto.
22071 (arc_is_aux_reg_p): Ditto.
22072 (arc_is_uncached_mem_p): Ditto.
22073 (arc_handle_aux_attribute): Ditto.
22074 * config/arm/arm.cc (arm_handle_isr_attribute): Ditto.
22075 (arm_handle_cmse_nonsecure_call): Ditto.
22076 (arm_set_default_type_attributes): Ditto.
22077 (arm_is_segment_info_known): Ditto.
22078 (arm_mangle_type): Ditto.
22079 * config/arm/unknown-elf.h (IN_NAMED_SECTION_P): Ditto.
22080 * config/avr/avr.cc (avr_lookup_function_attribute1): Ditto.
22081 (avr_decl_absdata_p): Ditto.
22082 (avr_insert_attributes): Ditto.
22083 (avr_section_type_flags): Ditto.
22084 (avr_encode_section_info): Ditto.
22085 * config/bfin/bfin.cc (bfin_handle_l2_attribute): Ditto.
22086 * config/bpf/bpf.cc (bpf_core_compute): Ditto.
22087 * config/c6x/c6x.cc (c6x_in_small_data_p): Ditto.
22088 * config/csky/csky.cc (csky_handle_isr_attribute): Ditto.
22089 (csky_mangle_type): Ditto.
22090 * config/darwin-c.cc (darwin_pragma_unused): Ditto.
22091 * config/darwin.cc (is_objc_metadata): Ditto.
22092 * config/epiphany/epiphany.cc (epiphany_function_ok_for_sibcall): Ditto.
22093 * config/epiphany/epiphany.h (ROUND_TYPE_ALIGN): Ditto.
22094 * config/frv/frv.cc (frv_emit_movsi): Ditto.
22095 * config/gcn/gcn-tree.cc (gcn_lockless_update): Ditto.
22096 * config/gcn/gcn.cc (gcn_asm_output_symbol_ref): Ditto.
22097 * config/h8300/h8300.cc (h8300_encode_section_info): Ditto.
22098 * config/i386/i386-expand.cc: Ditto.
22099 * config/i386/i386.cc (type_natural_mode): Ditto.
22100 (ix86_function_arg): Ditto.
22101 (ix86_data_alignment): Ditto.
22102 (ix86_local_alignment): Ditto.
22103 (ix86_simd_clone_compute_vecsize_and_simdlen): Ditto.
22104 * config/i386/winnt-cxx.cc (i386_pe_type_dllimport_p): Ditto.
22105 (i386_pe_type_dllexport_p): Ditto.
22106 (i386_pe_adjust_class_at_definition): Ditto.
22107 * config/i386/winnt.cc (i386_pe_determine_dllimport_p): Ditto.
22108 (i386_pe_binds_local_p): Ditto.
22109 (i386_pe_section_type_flags): Ditto.
22110 * config/ia64/ia64.cc (ia64_encode_section_info): Ditto.
22111 (ia64_gimplify_va_arg): Ditto.
22112 (ia64_in_small_data_p): Ditto.
22113 * config/iq2000/iq2000.cc (iq2000_function_arg): Ditto.
22114 * config/lm32/lm32.cc (lm32_in_small_data_p): Ditto.
22115 * config/loongarch/loongarch.cc (loongarch_handle_model_attribute): Ditto.
22116 * config/m32c/m32c.cc (m32c_insert_attributes): Ditto.
22117 * config/mcore/mcore.cc (mcore_mark_dllimport): Ditto.
22118 (mcore_encode_section_info): Ditto.
22119 * config/microblaze/microblaze.cc (microblaze_elf_in_small_data_p): Ditto.
22120 * config/mips/mips.cc (mips_output_aligned_decl_common): Ditto.
22121 * config/mmix/mmix.cc (mmix_encode_section_info): Ditto.
22122 * config/nvptx/nvptx.cc (nvptx_encode_section_info): Ditto.
22123 (pass_in_memory): Ditto.
22124 (nvptx_generate_vector_shuffle): Ditto.
22125 (nvptx_lockless_update): Ditto.
22126 * config/pa/pa.cc (pa_function_arg_padding): Ditto.
22127 (pa_function_value): Ditto.
22128 (pa_function_arg): Ditto.
22129 * config/pa/pa.h (IN_NAMED_SECTION_P): Ditto.
22130 (TEXT_SPACE_P): Ditto.
22131 * config/pa/som.h (MAKE_DECL_ONE_ONLY): Ditto.
22132 * config/pdp11/pdp11.cc (pdp11_return_in_memory): Ditto.
22133 * config/riscv/riscv.cc (riscv_in_small_data_p): Ditto.
22134 (riscv_mangle_type): Ditto.
22135 * config/rl78/rl78.cc (rl78_insert_attributes): Ditto.
22136 (rl78_addsi3_internal): Ditto.
22137 * config/rs6000/aix.h (ROUND_TYPE_ALIGN): Ditto.
22138 * config/rs6000/darwin.h (ROUND_TYPE_ALIGN): Ditto.
22139 * config/rs6000/freebsd64.h (ROUND_TYPE_ALIGN): Ditto.
22140 * config/rs6000/linux64.h (ROUND_TYPE_ALIGN): Ditto.
22141 * config/rs6000/rs6000-call.cc (rs6000_function_arg_boundary): Ditto.
22142 (rs6000_function_arg_advance_1): Ditto.
22143 (rs6000_function_arg): Ditto.
22144 (rs6000_pass_by_reference): Ditto.
22145 * config/rs6000/rs6000-logue.cc (rs6000_function_ok_for_sibcall): Ditto.
22146 * config/rs6000/rs6000.cc (rs6000_data_alignment): Ditto.
22147 (rs6000_set_default_type_attributes): Ditto.
22148 (rs6000_elf_in_small_data_p): Ditto.
22149 (IN_NAMED_SECTION): Ditto.
22150 (rs6000_xcoff_encode_section_info): Ditto.
22151 (rs6000_function_value): Ditto.
22152 (invalid_arg_for_unprototyped_fn): Ditto.
22153 * config/s390/s390-c.cc (s390_fn_types_compatible): Ditto.
22154 (s390_vec_n_elem): Ditto.
22155 * config/s390/s390.cc (s390_check_type_for_vector_abi): Ditto.
22156 (s390_function_arg_integer): Ditto.
22157 (s390_return_in_memory): Ditto.
22158 (s390_encode_section_info): Ditto.
22159 * config/sh/sh.cc (sh_gimplify_va_arg_expr): Ditto.
22160 (sh_function_value): Ditto.
22161 * config/sol2.cc (solaris_insert_attributes): Ditto.
22162 * config/sparc/sparc.cc (function_arg_slotno): Ditto.
22163 * config/sparc/sparc.h (ROUND_TYPE_ALIGN): Ditto.
22164 * config/stormy16/stormy16.cc (xstormy16_encode_section_info): Ditto.
22165 (xstormy16_handle_below100_attribute): Ditto.
22166 * config/v850/v850.cc (v850_encode_section_info): Ditto.
22167 (v850_insert_attributes): Ditto.
22168 * config/visium/visium.cc (visium_pass_by_reference): Ditto.
22169 (visium_return_in_memory): Ditto.
22170 * config/xtensa/xtensa.cc (xtensa_multibss_section_type_flags): Ditto.
22172 2023-05-18 Uros Bizjak <ubizjak@gmail.com>
22174 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi_partial): New.
22175 (ix86_expand_vecop_qihi): Add op2vec bool variable.
22176 Do not set REG_EQUAL note.
22177 * config/i386/i386-protos.h (ix86_expand_vecop_qihi_partial):
22179 * config/i386/i386.cc (ix86_multiplication_cost): Handle
22180 V4QImode and V8QImode.
22181 * config/i386/mmx.md (mulv8qi3): New expander.
22183 * config/i386/sse.md (mulv8qi3): Remove.
22185 2023-05-18 Georg-Johann Lay <avr@gjlay.de>
22187 * config/avr/gen-avr-mmcu-specs.cc: Remove stale */ after // comment.
22189 2023-05-18 Jonathan Wakely <jwakely@redhat.com>
22191 PR bootstrap/105831
22192 * config.gcc: Use = operator instead of ==.
22194 2023-05-18 Michael Bäuerle <micha@NetBSD.org>
22196 PR bootstrap/105831
22197 * config/nvptx/gen-opt.sh: Use = operator instead of ==.
22198 * configure.ac: Likewise.
22199 * configure: Regenerate.
22201 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22203 * config/arm/arm_mve.h: (__ARM_mve_typeid): Add more pointer types.
22204 (__ARM_mve_coerce1): Remove.
22205 (__ARM_mve_coerce2): Remove.
22206 (__ARM_mve_coerce3): Remove.
22207 (__ARM_mve_coerce_i_scalar): New.
22208 (__ARM_mve_coerce_s8_ptr): New.
22209 (__ARM_mve_coerce_u8_ptr): New.
22210 (__ARM_mve_coerce_s16_ptr): New.
22211 (__ARM_mve_coerce_u16_ptr): New.
22212 (__ARM_mve_coerce_s32_ptr): New.
22213 (__ARM_mve_coerce_u32_ptr): New.
22214 (__ARM_mve_coerce_s64_ptr): New.
22215 (__ARM_mve_coerce_u64_ptr): New.
22216 (__ARM_mve_coerce_f_scalar): New.
22217 (__ARM_mve_coerce_f16_ptr): New.
22218 (__ARM_mve_coerce_f32_ptr): New.
22219 (__arm_vst4q): Change _coerce_ overloads.
22220 (__arm_vbicq): Change _coerce_ overloads.
22221 (__arm_vld1q): Change _coerce_ overloads.
22222 (__arm_vld1q_z): Change _coerce_ overloads.
22223 (__arm_vld2q): Change _coerce_ overloads.
22224 (__arm_vld4q): Change _coerce_ overloads.
22225 (__arm_vldrhq_gather_offset): Change _coerce_ overloads.
22226 (__arm_vldrhq_gather_offset_z): Change _coerce_ overloads.
22227 (__arm_vldrhq_gather_shifted_offset): Change _coerce_ overloads.
22228 (__arm_vldrhq_gather_shifted_offset_z): Change _coerce_ overloads.
22229 (__arm_vldrwq_gather_offset): Change _coerce_ overloads.
22230 (__arm_vldrwq_gather_offset_z): Change _coerce_ overloads.
22231 (__arm_vldrwq_gather_shifted_offset): Change _coerce_ overloads.
22232 (__arm_vldrwq_gather_shifted_offset_z): Change _coerce_ overloads.
22233 (__arm_vst1q_p): Change _coerce_ overloads.
22234 (__arm_vst2q): Change _coerce_ overloads.
22235 (__arm_vst1q): Change _coerce_ overloads.
22236 (__arm_vstrhq): Change _coerce_ overloads.
22237 (__arm_vstrhq_p): Change _coerce_ overloads.
22238 (__arm_vstrhq_scatter_offset_p): Change _coerce_ overloads.
22239 (__arm_vstrhq_scatter_offset): Change _coerce_ overloads.
22240 (__arm_vstrhq_scatter_shifted_offset_p): Change _coerce_ overloads.
22241 (__arm_vstrhq_scatter_shifted_offset): Change _coerce_ overloads.
22242 (__arm_vstrwq_p): Change _coerce_ overloads.
22243 (__arm_vstrwq): Change _coerce_ overloads.
22244 (__arm_vstrwq_scatter_offset): Change _coerce_ overloads.
22245 (__arm_vstrwq_scatter_offset_p): Change _coerce_ overloads.
22246 (__arm_vstrwq_scatter_shifted_offset): Change _coerce_ overloads.
22247 (__arm_vstrwq_scatter_shifted_offset_p): Change _coerce_ overloads.
22248 (__arm_vsetq_lane): Change _coerce_ overloads.
22249 (__arm_vldrbq_gather_offset): Change _coerce_ overloads.
22250 (__arm_vdwdupq_x_u8): Change _coerce_ overloads.
22251 (__arm_vdwdupq_x_u16): Change _coerce_ overloads.
22252 (__arm_vdwdupq_x_u32): Change _coerce_ overloads.
22253 (__arm_viwdupq_x_u8): Change _coerce_ overloads.
22254 (__arm_viwdupq_x_u16): Change _coerce_ overloads.
22255 (__arm_viwdupq_x_u32): Change _coerce_ overloads.
22256 (__arm_vidupq_x_u8): Change _coerce_ overloads.
22257 (__arm_vddupq_x_u8): Change _coerce_ overloads.
22258 (__arm_vidupq_x_u16): Change _coerce_ overloads.
22259 (__arm_vddupq_x_u16): Change _coerce_ overloads.
22260 (__arm_vidupq_x_u32): Change _coerce_ overloads.
22261 (__arm_vddupq_x_u32): Change _coerce_ overloads.
22262 (__arm_vldrdq_gather_offset): Change _coerce_ overloads.
22263 (__arm_vldrdq_gather_offset_z): Change _coerce_ overloads.
22264 (__arm_vldrdq_gather_shifted_offset): Change _coerce_ overloads.
22265 (__arm_vldrdq_gather_shifted_offset_z): Change _coerce_ overloads.
22266 (__arm_vldrbq_gather_offset_z): Change _coerce_ overloads.
22267 (__arm_vidupq_u16): Change _coerce_ overloads.
22268 (__arm_vidupq_u32): Change _coerce_ overloads.
22269 (__arm_vidupq_u8): Change _coerce_ overloads.
22270 (__arm_vddupq_u16): Change _coerce_ overloads.
22271 (__arm_vddupq_u32): Change _coerce_ overloads.
22272 (__arm_vddupq_u8): Change _coerce_ overloads.
22273 (__arm_viwdupq_m): Change _coerce_ overloads.
22274 (__arm_viwdupq_u16): Change _coerce_ overloads.
22275 (__arm_viwdupq_u32): Change _coerce_ overloads.
22276 (__arm_viwdupq_u8): Change _coerce_ overloads.
22277 (__arm_vdwdupq_m): Change _coerce_ overloads.
22278 (__arm_vdwdupq_u16): Change _coerce_ overloads.
22279 (__arm_vdwdupq_u32): Change _coerce_ overloads.
22280 (__arm_vdwdupq_u8): Change _coerce_ overloads.
22281 (__arm_vstrbq): Change _coerce_ overloads.
22282 (__arm_vstrbq_p): Change _coerce_ overloads.
22283 (__arm_vstrbq_scatter_offset_p): Change _coerce_ overloads.
22284 (__arm_vstrdq_scatter_offset_p): Change _coerce_ overloads.
22285 (__arm_vstrdq_scatter_offset): Change _coerce_ overloads.
22286 (__arm_vstrdq_scatter_shifted_offset_p): Change _coerce_ overloads.
22287 (__arm_vstrdq_scatter_shifted_offset): Change _coerce_ overloads.
22289 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22291 * config/arm/arm_mve.h (__arm_vbicq): Change coerce on
22294 2023-05-18 Stam Markianos-Wright <stam.markianos-wright@arm.com>
22296 * config/arm/arm_mve.h (__arm_vadcq_s32): Fix arithmetic.
22297 (__arm_vadcq_u32): Likewise.
22298 (__arm_vadcq_m_s32): Likewise.
22299 (__arm_vadcq_m_u32): Likewise.
22300 (__arm_vsbcq_s32): Likewise.
22301 (__arm_vsbcq_u32): Likewise.
22302 (__arm_vsbcq_m_s32): Likewise.
22303 (__arm_vsbcq_m_u32): Likewise.
22304 * config/arm/mve.md (get_fpscr_nzcvqc): Make unspec_volatile.
22306 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
22308 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrev64q_f<mode>)
22309 (mve_vrev32q_fv8hf, mve_vcvttq_f32_f16v4sf)
22310 (mve_vcvtbq_f32_f16v4sf, mve_vcvtq_to_f_<supf><mode>)
22311 (mve_vrev64q_<supf><mode>, mve_vcvtq_from_f_<supf><mode>)
22312 (mve_vmovltq_<supf><mode>, mve_vmovlbq_<supf><mode>)
22313 (mve_vcvtpq_<supf><mode>, mve_vcvtnq_<supf><mode>)
22314 (mve_vcvtmq_<supf><mode>, mve_vcvtaq_<supf><mode>)
22315 (mve_vmvnq_n_<supf><mode>, mve_vrev16q_<supf>v16qi)
22316 (mve_vctp<MVE_vctp>q<MVE_vpred>, mve_vbrsrq_n_f<mode>)
22317 (mve_vbrsrq_n_<supf><mode>, mve_vandq_f<mode>, mve_vbicq_f<mode>)
22318 (mve_vctp<MVE_vctp>q_m<MVE_vpred>, mve_vcvtbq_f16_f32v8hf)
22319 (mve_vcvttq_f16_f32v8hf, mve_veorq_f<mode>)
22320 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
22321 (mve_vmlsldavxq_s<mode>, mve_vornq_f<mode>, mve_vorrq_f<mode>)
22322 (mve_vrmlaldavhxq_sv4si, mve_vcvtq_m_to_f_<supf><mode>)
22323 (mve_vshlcq_<supf><mode>, mve_vmvnq_m_<supf><mode>)
22324 (mve_vpselq_<supf><mode>, mve_vcvtbq_m_f16_f32v8hf)
22325 (mve_vcvtbq_m_f32_f16v4sf, mve_vcvttq_m_f16_f32v8hf)
22326 (mve_vcvttq_m_f32_f16v4sf, mve_vmlaldavq_p_<supf><mode>)
22327 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
22328 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>)
22329 (mve_vmvnq_m_n_<supf><mode>, mve_vorrq_m_n_<supf><mode>)
22330 (mve_vpselq_f<mode>, mve_vrev32q_m_fv8hf)
22331 (mve_vrev32q_m_<supf><mode>, mve_vrev64q_m_f<mode>)
22332 (mve_vrmlaldavhaxq_sv4si, mve_vrmlaldavhxq_p_sv4si)
22333 (mve_vrmlsldavhaxq_sv4si, mve_vrmlsldavhq_p_sv4si)
22334 (mve_vrmlsldavhxq_p_sv4si, mve_vrev16q_m_<supf>v16qi)
22335 (mve_vrmlaldavhq_p_<supf>v4si, mve_vrmlsldavhaq_sv4si)
22336 (mve_vandq_m_<supf><mode>, mve_vbicq_m_<supf><mode>)
22337 (mve_veorq_m_<supf><mode>, mve_vornq_m_<supf><mode>)
22338 (mve_vorrq_m_<supf><mode>, mve_vandq_m_f<mode>)
22339 (mve_vbicq_m_f<mode>, mve_veorq_m_f<mode>, mve_vornq_m_f<mode>)
22340 (mve_vorrq_m_f<mode>)
22341 (mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn)
22342 (mve_vstrdq_scatter_shifted_offset_<supf>v2di_insn)
22343 (mve_vstrdq_scatter_base_wb_p_<supf>v2di) : Fix spacing and
22344 capitalization in the emitted asm.
22346 2023-05-18 Andrea Corallo <andrea.corallo@arm.com>
22348 * config/arm/constraints.md (mve_vldrd_immediate): Move it to
22350 (Ri): Move constraint definition from predicates.md.
22351 (Rl): Define new constraint.
22352 * config/arm/mve.md (mve_vstrwq_scatter_base_wb_p_<supf>v4si): Add
22353 missing constraint.
22354 (mve_vstrwq_scatter_base_wb_p_fv4sf): Add missing Up constraint
22355 for op 1, use mve_vstrw_immediate predicate and Rl constraint for
22356 op 2. Fix asm output spacing.
22357 (mve_vstrdq_scatter_base_wb_p_<supf>v2di): Add missing constraint.
22358 * config/arm/predicates.md (Ri) Move constraint to constraints.md
22359 (mve_vldrd_immediate): Move it from
22361 (mve_vstrw_immediate): New predicate.
22363 2023-05-18 Pan Li <pan2.li@intel.com>
22364 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
22365 Kito Cheng <kito.cheng@sifive.com>
22366 Richard Biener <rguenther@suse.de>
22367 Richard Sandiford <richard.sandiford@arm.com>
22369 * combine.cc (struct reg_stat_type): Extend machine_mode to 16 bits.
22370 * cse.cc (struct qty_table_elem): Extend machine_mode to 16 bits
22371 (struct table_elt): Extend machine_mode to 16 bits.
22372 (struct set): Ditto.
22373 * genmodes.cc (emit_mode_wider): Extend type from char to short.
22374 (emit_mode_complex): Ditto.
22375 (emit_mode_inner): Ditto.
22376 (emit_class_narrowest_mode): Ditto.
22377 * genopinit.cc (main): Extend the machine_mode limit.
22378 * ira-int.h (struct ira_allocno): Extend machine_mode to 16 bits and
22379 re-ordered the struct fields for padding.
22380 * machmode.h (MACHINE_MODE_BITSIZE): New macro.
22381 (GET_MODE_2XWIDER_MODE): Extend type from char to short.
22382 (get_mode_alignment): Extend type from char to short.
22383 * ree.cc (struct ext_modified): Extend machine_mode to 16 bits and
22384 removed the ATTRIBUTE_PACKED.
22385 * rtl-ssa/accesses.h: Extend machine_mode to 16 bits, narrow
22386 * rtl-ssa/internals.inl (rtl_ssa::access_info): Adjust the assignment.
22387 m_kind to 2 bits and remove m_spare.
22388 * rtl.h (RTX_CODE_BITSIZE): New macro.
22389 (struct rtx_def): Swap both the bit size and location between the
22390 rtx_code and the machine_mode.
22391 (subreg_shape::unique_id): Extend the machine_mode limit.
22392 * rtlanal.h: Extend machine_mode to 16 bits.
22393 * tree-core.h (struct tree_type_common): Extend machine_mode to 16
22394 bits and re-ordered the struct fields for padding.
22395 (struct tree_decl_common): Extend machine_mode to 16 bits.
22397 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
22399 * genrecog.cc (print_nonbool_test): Fix type error of
22400 switch (SUBREG_BYTE (op))'.
22402 2023-05-17 Jin Ma <jinma@linux.alibaba.com>
22404 * common/config/riscv/riscv-common.cc: Remove
22405 trailing spaces on lines.
22406 * config/riscv/riscv.cc (riscv_legitimize_move): Likewise.
22407 * config/riscv/riscv.h (enum reg_class): Likewise.
22408 * config/riscv/riscv.md: Likewise.
22410 2023-05-17 John David Anglin <danglin@gcc.gnu.org>
22412 * config/pa/pa.md (clear_cache): New.
22414 2023-05-17 Arsen Arsenović <arsen@aarsen.me>
22416 * doc/extend.texi (C++ Concepts) <forall>: Remove extraneous
22417 parenthesis. Fix misnamed index entry.
22418 <concept>: Fix misnamed index entry.
22420 2023-05-17 Jivan Hakobyan <jivanhakobyan9@gmail.com>
22422 * config/riscv/riscv.md (*<optab><GPR:mode>3_mask): New pattern,
22424 (*<optab>si3_mask, *<optab>di3_mask): Here.
22425 (*<optab>si3_mask_1, *<optab>di3_mask_1): And here.
22426 * config/riscv/bitmanip.md (*<bitmanip_optab><GPR:mode>3_mask): New
22428 (*<bitmanip_optab>si3_sext_mask): Likewise.
22429 * config/riscv/iterators.md (shiftm1): Use const_si_mask_operand
22430 and const_di_mask_operand.
22431 (bitmanip_rotate): New iterator.
22432 (bitmanip_optab): Add rotates.
22433 * config/riscv/predicates.md (const_si_mask_operand): Renamed
22434 from const31_operand. Generalize to handle more mask constants.
22435 (const_di_mask_operand): Similarly.
22437 2023-05-17 Jakub Jelinek <jakub@redhat.com>
22440 * config/i386/i386-builtin-types.def (FLOAT128): Use
22441 float128t_type_node rather than float128_type_node.
22443 2023-05-17 Alexander Monakov <amonakov@ispras.ru>
22445 * tree-ssa-math-opts.cc (convert_mult_to_fma): Enable only for
22446 FP_CONTRACT_FAST (no functional change).
22448 2023-05-17 Uros Bizjak <ubizjak@gmail.com>
22450 * config/i386/i386.cc (ix86_multiplication_cost): Correct
22451 calcuation of integer vector mode costs to reflect generated
22452 instruction sequences of different integer vector modes and
22453 different target ABIs.
22455 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22457 * config/riscv/riscv-opts.h (enum riscv_entity): New enum.
22458 * config/riscv/riscv.cc (riscv_emit_mode_set): New function.
22459 (riscv_mode_needed): Ditto.
22460 (riscv_mode_after): Ditto.
22461 (riscv_mode_entry): Ditto.
22462 (riscv_mode_exit): Ditto.
22463 (riscv_mode_priority): Ditto.
22464 (TARGET_MODE_EMIT): New target hook.
22465 (TARGET_MODE_NEEDED): Ditto.
22466 (TARGET_MODE_AFTER): Ditto.
22467 (TARGET_MODE_ENTRY): Ditto.
22468 (TARGET_MODE_EXIT): Ditto.
22469 (TARGET_MODE_PRIORITY): Ditto.
22470 * config/riscv/riscv.h (OPTIMIZE_MODE_SWITCHING): Ditto.
22471 (NUM_MODES_FOR_MODE_SWITCHING): Ditto.
22472 * config/riscv/riscv.md: Add csrwvxrm.
22473 * config/riscv/vector.md (rnu,rne,rdn,rod,none): New attribute.
22474 (vxrmsi): New pattern.
22476 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22478 * config/riscv/riscv-vector-builtins-bases.cc: Introduce rounding mode.
22479 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
22480 (struct narrow_alu_def): Ditto.
22481 * config/riscv/riscv-vector-builtins.cc (function_builder::apply_predication): Ditto.
22482 (function_expander::use_exact_insn): Ditto.
22483 * config/riscv/riscv-vector-builtins.h (function_checker::arg_num): New function.
22484 (function_base::has_rounding_mode_operand_p): New function.
22486 2023-05-17 Andrew Pinski <apinski@marvell.com>
22488 * tree-ssa-forwprop.cc (simplify_builtin_call): Check
22489 against 0 instead of calling integer_zerop.
22491 2023-05-17 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22493 * config/riscv/riscv-vector-builtins.cc (register_vxrm): New function.
22494 (DEF_RVV_VXRM_ENUM): New macro.
22495 (handle_pragma_vector): Add vxrm enum register.
22496 * config/riscv/riscv-vector-builtins.def (DEF_RVV_VXRM_ENUM): New macro.
22502 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22504 * value-range.h (Value_Range::operator=): New.
22506 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22508 * value-range.cc (vrange::operator=): Add a stub to copy
22509 unsupported ranges.
22510 * value-range.h (is_a <unsupported_range>): New.
22511 (Value_Range::operator=): Support copying unsupported ranges.
22513 2023-05-17 Aldy Hernandez <aldyh@redhat.com>
22515 * data-streamer-in.cc (streamer_read_real_value): New.
22516 (streamer_read_value_range): New.
22517 * data-streamer-out.cc (streamer_write_real_value): New.
22518 (streamer_write_vrange): New.
22519 * data-streamer.h (streamer_write_vrange): New.
22520 (streamer_read_value_range): New.
22522 2023-05-17 Jonathan Wakely <jwakely@redhat.com>
22525 * doc/invoke.texi (Code Gen Options): Note that -fshort-enums
22526 is ignored for a fixed underlying type.
22527 (C++ Dialect Options): Likewise for -fstrict-enums.
22529 2023-05-17 Tobias Burnus <tobias@codesourcery.com>
22531 * gimplify.cc (gimplify_scan_omp_clauses): Remove Fortran
22534 2023-05-17 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22536 * config/s390/s390.cc (TARGET_ATOMIC_ALIGN_FOR_MODE):
22538 (s390_atomic_align_for_mode): New.
22540 2023-05-17 Jakub Jelinek <jakub@redhat.com>
22542 * wide-int.cc (wi::from_array): Add missing closing paren in function
22545 2023-05-17 Kewen Lin <linkw@linux.ibm.com>
22547 * tree-vect-loop.cc (vect_analyze_loop_1): Don't retry analysis with
22548 suggested unroll factor once the previous analysis fails.
22550 2023-05-17 Pan Li <pan2.li@intel.com>
22552 * config/riscv/genrvv-type-indexer.cc (BOOL_SIZE_LIST): New
22554 (main): Add bool1 to the type indexer.
22555 * config/riscv/riscv-vector-builtins-functions.def
22556 (vreinterpret): Register vbool1 interpret function.
22557 * config/riscv/riscv-vector-builtins-types.def
22558 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
22559 (vint8m1_t): Add the type to bool1_interpret_ops.
22560 (vint16m1_t): Ditto.
22561 (vint32m1_t): Ditto.
22562 (vint64m1_t): Ditto.
22563 (vuint8m1_t): Ditto.
22564 (vuint16m1_t): Ditto.
22565 (vuint32m1_t): Ditto.
22566 (vuint64m1_t): Ditto.
22567 * config/riscv/riscv-vector-builtins.cc
22568 (DEF_RVV_BOOL1_INTERPRET_OPS): New macro.
22569 (required_extensions_p): Add bool1 interpret case.
22570 * config/riscv/riscv-vector-builtins.def
22571 (bool1_interpret): Add bool1 interpret to base type.
22572 * config/riscv/vector.md (@vreinterpret<mode>): Add new expand
22573 with VB dest for vreinterpret.
22575 2023-05-17 Jiufu Guo <guojiufu@linux.ibm.com>
22578 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Support building
22579 constants through "lis; xoris".
22581 2023-05-16 Ajit Kumar Agarwal <aagarwa1@linux.ibm.com>
22583 * common/config/rs6000/rs6000-common.cc: Add REE pass as a
22584 default rs6000 target pass for O2 and above.
22585 * doc/invoke.texi: Document -free
22587 2023-05-16 Kito Cheng <kito.cheng@sifive.com>
22589 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
22590 Fix wrong select_kind...
22592 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22594 * config/s390/s390-protos.h (s390_expand_setmem): Change
22595 function signature.
22596 * config/s390/s390.cc (s390_expand_setmem): For memset's less
22597 than or equal to 256 byte do not perform a libc call.
22598 * config/s390/s390.md: Change expander into a version which
22601 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22603 * config/s390/s390-protos.h (s390_expand_movmem): New.
22604 * config/s390/s390.cc (s390_expand_movmem): New.
22605 * config/s390/s390.md (movmem<mode>): New.
22609 2023-05-16 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
22611 * config/s390/s390-protos.h (s390_expand_cpymem): Change
22612 function signature.
22613 * config/s390/s390.cc (s390_expand_cpymem): For memcpy's less
22614 than or equal to 256 byte do not perform a libc call.
22615 (s390_expand_insv): Adapt new function signature of
22616 s390_expand_cpymem.
22617 * config/s390/s390.md: Change expander into a version which
22620 2023-05-16 Andrew Pinski <apinski@marvell.com>
22622 PR tree-optimization/109424
22623 * match.pd: Add patterns for min/max of zero_one_valued
22626 2023-05-16 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22628 * config/riscv/riscv-protos.h (enum frm_field_enum): New enum.
22629 * config/riscv/riscv-vector-builtins.cc
22630 (function_expander::use_ternop_insn): Add default rounding mode.
22631 (function_expander::use_widen_ternop_insn): Ditto.
22632 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add FRM REGNUM.
22633 (riscv_hard_regno_mode_ok): Ditto.
22634 (riscv_conditional_register_usage): Ditto.
22635 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
22636 (FRM_REG_P): Ditto.
22637 (RISCV_DWARF_FRM): Ditto.
22638 * config/riscv/riscv.md: Ditto.
22639 * config/riscv/vector-iterators.md: split no frm and has frm operations.
22640 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
22641 (@pred_<optab><mode>): Ditto.
22643 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
22645 PR tree-optimization/109695
22646 * value-range.cc (irange::operator=): Resize range.
22647 (irange::union_): Same.
22648 (irange::intersect): Same.
22649 (irange::invert): Same.
22650 (int_range_max): Default to 3 sub-ranges and resize as needed.
22651 * value-range.h (irange::maybe_resize): New.
22653 (int_range::int_range): Adjust for resizing.
22654 (int_range::operator=): Same.
22656 2023-05-15 Aldy Hernandez <aldyh@redhat.com>
22658 * ipa-cp.cc (ipcp_vr_lattice::meet_with_1): Avoid unnecessary
22660 * value-range.cc (irange::union_nonzero_bits): Return TRUE only
22661 when range changed.
22663 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22665 * config/riscv/riscv-protos.h (enum vxrm_field_enum): New enum.
22666 * config/riscv/riscv-vector-builtins.cc
22667 (function_expander::use_exact_insn): Add default rounding mode operand.
22668 * config/riscv/riscv.cc (riscv_hard_regno_nregs): Add VXRM_REGNUM.
22669 (riscv_hard_regno_mode_ok): Ditto.
22670 (riscv_conditional_register_usage): Ditto.
22671 * config/riscv/riscv.h (DWARF_FRAME_REGNUM): Ditto.
22672 (VXRM_REG_P): Ditto.
22673 (RISCV_DWARF_VXRM): Ditto.
22674 * config/riscv/riscv.md: Ditto.
22675 * config/riscv/vector.md: Ditto
22677 2023-05-15 Pan Li <pan2.li@intel.com>
22679 * optabs.cc (maybe_gen_insn): Add case to generate instruction
22680 that has 11 operands.
22682 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22684 * config/aarch64/aarch64.cc (aarch64_rtx_costs, NEG case): Add costing
22685 logic for vector modes.
22687 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22690 * config/aarch64/aarch64-simd.md (aarch64_cm<optab><mode>): Rename to...
22691 (aarch64_cm<optab><mode><vczle><vczbe>): ... This.
22692 (aarch64_cmtst<mode>): Rename to...
22693 (aarch64_cmtst<mode><vczle><vczbe>): ... This.
22694 (*aarch64_cmtst_same_<mode>): Rename to...
22695 (*aarch64_cmtst_same_<mode><vczle><vczbe>): ... This.
22696 (*aarch64_cmtstdi): Rename to...
22697 (*aarch64_cmtstdi<vczle><vczbe>): ... This.
22698 (aarch64_fac<optab><mode>): Rename to...
22699 (aarch64_fac<optab><mode><vczle><vczbe>): ... This.
22701 2023-05-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
22704 * config/aarch64/aarch64-simd.md (aarch64_s<optab><mode>): Rename to...
22705 (aarch64_s<optab><mode><vczle><vczbe>): ... This.
22707 2023-05-15 Pan Li <pan2.li@intel.com>
22708 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22709 kito-cheng <kito.cheng@sifive.com>
22711 * config/riscv/riscv-v.cc (const_vlmax_p): New function for
22712 deciding the mode is constant or not.
22713 (set_len_and_policy): Optimize VLS-VLMAX code gen to vsetivli.
22715 2023-05-15 Richard Biener <rguenther@suse.de>
22717 PR tree-optimization/109848
22718 * tree-ssa-forwprop.cc (pass_forwprop::execute): Put the
22719 TARGET_MEM_REF address preparation before the store, not
22722 2023-05-15 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22724 * config/riscv/riscv.cc
22725 (riscv_vectorize_preferred_vector_alignment): New function.
22726 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): New target hook.
22728 2023-05-14 Andrew Pinski <apinski@marvell.com>
22730 PR tree-optimization/109829
22731 * match.pd: Add pattern for `signbit(x) !=/== 0 ? x : -x`.
22733 2023-05-14 Uros Bizjak <ubizjak@gmail.com>
22736 * config/i386/i386.cc: Revert the 2023-05-11 change.
22737 (ix86_widen_mult_cost): Return high value instead of
22738 ICEing for unsupported modes.
22740 2023-05-14 Ard Biesheuvel <ardb@kernel.org>
22742 * config/i386/i386.cc (x86_function_profiler): Take
22743 ix86_direct_extern_access into account when generating calls
22746 2023-05-14 Pan Li <pan2.li@intel.com>
22748 * config/riscv/riscv-vector-builtins.cc (required_extensions_p):
22749 Refactor the or pattern to switch cases.
22751 2023-05-13 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
22753 * config/aarch64/aarch64.cc (aarch64_expand_vector_init_fallback): Rename
22754 aarch64_expand_vector_init to this, and remove interleaving case.
22755 Recursively call aarch64_expand_vector_init_fallback, instead of
22756 aarch64_expand_vector_init.
22757 (aarch64_unzip_vector_init): New function.
22758 (aarch64_expand_vector_init): Likewise.
22760 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
22762 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns):
22763 Pull out function call from the gcc_assert.
22765 2023-05-13 Kito Cheng <kito.cheng@sifive.com>
22767 * config/riscv/riscv-vsetvl.cc (vlmul_to_str): New.
22768 (policy_to_str): New.
22769 (vector_insn_info::dump): Use vlmul_to_str and policy_to_str.
22771 2023-05-13 Andrew Pinski <apinski@marvell.com>
22773 PR tree-optimization/109834
22774 * match.pd (popcount(bswap(x))->popcount(x)): Fix up unsigned type checking.
22775 (popcount(rotate(x,y))->popcount(x)): Likewise.
22777 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
22779 * config/i386/i386-expand.cc (ix86_expand_vecop_qihi2): Also
22780 reject ymm instructions for TARGET_PREFER_AVX128. Use generic
22781 gen_extend_insn to generate zero/sign extension instructions.
22783 (ix86_expand_vecop_qihi): Initialize interleave functions
22784 for MULT code only. Fix comments.
22786 2023-05-12 Uros Bizjak <ubizjak@gmail.com>
22789 * config/i386/mmx.md (mulv2si3): Remove expander.
22790 (mulv2si3): Rename insn pattern from *mulv2si.
22792 2023-05-12 Tobias Burnus <tobias@codesourcery.com>
22794 PR libstdc++/109816
22795 * lto-cgraph.cc (output_symtab): Guard lto_output_toplevel_asms by
22796 '!lto_stream_offload_p'.
22798 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
22799 Juzhe-Zhong <juzhe.zhong@rivai.ai>
22802 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vsetvl_at_end): New.
22803 (local_avl_compatible_p): New.
22804 (pass_vsetvl::local_eliminate_vsetvl_insn): Enhance local optimizations
22805 for LCM, rewrite as a backward algorithm.
22806 (pass_vsetvl::cleanup_insns): Use new local_eliminate_vsetvl_insn
22807 interface, handle a BB at once.
22809 2023-05-12 Richard Biener <rguenther@suse.de>
22811 PR tree-optimization/64731
22812 * tree-ssa-forwprop.cc (pass_forwprop::execute): Also
22813 handle TARGET_MEM_REF destinations of stores from vector
22816 2023-05-12 Richard Biener <rguenther@suse.de>
22818 PR tree-optimization/109791
22819 * match.pd (minus (convert ADDR_EXPR@0) (convert (pointer_plus @1 @2))):
22821 (minus (convert (pointer_plus @1 @2)) (convert ADDR_EXPR@0)):
22824 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22826 * config/arm/arm-mve-builtins-base.cc (vsriq): New.
22827 * config/arm/arm-mve-builtins-base.def (vsriq): New.
22828 * config/arm/arm-mve-builtins-base.h (vsriq): New.
22829 * config/arm/arm-mve-builtins.cc
22830 (function_instance::has_inactive_argument): Handle vsriq.
22831 * config/arm/arm_mve.h (vsriq): Remove.
22833 (vsriq_n_u8): Remove.
22834 (vsriq_n_s8): Remove.
22835 (vsriq_n_u16): Remove.
22836 (vsriq_n_s16): Remove.
22837 (vsriq_n_u32): Remove.
22838 (vsriq_n_s32): Remove.
22839 (vsriq_m_n_s8): Remove.
22840 (vsriq_m_n_u8): Remove.
22841 (vsriq_m_n_s16): Remove.
22842 (vsriq_m_n_u16): Remove.
22843 (vsriq_m_n_s32): Remove.
22844 (vsriq_m_n_u32): Remove.
22845 (__arm_vsriq_n_u8): Remove.
22846 (__arm_vsriq_n_s8): Remove.
22847 (__arm_vsriq_n_u16): Remove.
22848 (__arm_vsriq_n_s16): Remove.
22849 (__arm_vsriq_n_u32): Remove.
22850 (__arm_vsriq_n_s32): Remove.
22851 (__arm_vsriq_m_n_s8): Remove.
22852 (__arm_vsriq_m_n_u8): Remove.
22853 (__arm_vsriq_m_n_s16): Remove.
22854 (__arm_vsriq_m_n_u16): Remove.
22855 (__arm_vsriq_m_n_s32): Remove.
22856 (__arm_vsriq_m_n_u32): Remove.
22857 (__arm_vsriq): Remove.
22858 (__arm_vsriq_m): Remove.
22860 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22862 * config/arm/iterators.md (mve_insn): Add vsri.
22863 * config/arm/mve.md (mve_vsriq_n_<supf><mode>): Rename into ...
22864 (@mve_<mve_insn>q_n_<supf><mode>): .,. this.
22865 (mve_vsriq_m_n_<supf><mode>): Rename into ...
22866 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22868 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22870 * config/arm/arm-mve-builtins-shapes.cc (ternary_rshift): New.
22871 * config/arm/arm-mve-builtins-shapes.h (ternary_rshift): New.
22873 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22875 * config/arm/arm-mve-builtins-base.cc (vsliq): New.
22876 * config/arm/arm-mve-builtins-base.def (vsliq): New.
22877 * config/arm/arm-mve-builtins-base.h (vsliq): New.
22878 * config/arm/arm-mve-builtins.cc
22879 (function_instance::has_inactive_argument): Handle vsliq.
22880 * config/arm/arm_mve.h (vsliq): Remove.
22882 (vsliq_n_u8): Remove.
22883 (vsliq_n_s8): Remove.
22884 (vsliq_n_u16): Remove.
22885 (vsliq_n_s16): Remove.
22886 (vsliq_n_u32): Remove.
22887 (vsliq_n_s32): Remove.
22888 (vsliq_m_n_s8): Remove.
22889 (vsliq_m_n_s32): Remove.
22890 (vsliq_m_n_s16): Remove.
22891 (vsliq_m_n_u8): Remove.
22892 (vsliq_m_n_u32): Remove.
22893 (vsliq_m_n_u16): Remove.
22894 (__arm_vsliq_n_u8): Remove.
22895 (__arm_vsliq_n_s8): Remove.
22896 (__arm_vsliq_n_u16): Remove.
22897 (__arm_vsliq_n_s16): Remove.
22898 (__arm_vsliq_n_u32): Remove.
22899 (__arm_vsliq_n_s32): Remove.
22900 (__arm_vsliq_m_n_s8): Remove.
22901 (__arm_vsliq_m_n_s32): Remove.
22902 (__arm_vsliq_m_n_s16): Remove.
22903 (__arm_vsliq_m_n_u8): Remove.
22904 (__arm_vsliq_m_n_u32): Remove.
22905 (__arm_vsliq_m_n_u16): Remove.
22906 (__arm_vsliq): Remove.
22907 (__arm_vsliq_m): Remove.
22909 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22911 * config/arm/iterators.md (mve_insn>): Add vsli.
22912 * config/arm/mve.md (mve_vsliq_n_<supf><mode>): Rename into ...
22913 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
22914 (mve_vsliq_m_n_<supf><mode>): Rename into ...
22915 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
22917 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22919 * config/arm/arm-mve-builtins-shapes.cc (ternary_lshift): New.
22920 * config/arm/arm-mve-builtins-shapes.h (ternary_lshift): New.
22922 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22924 * config/arm/arm-mve-builtins-base.cc (vpselq): New.
22925 * config/arm/arm-mve-builtins-base.def (vpselq): New.
22926 * config/arm/arm-mve-builtins-base.h (vpselq): New.
22927 * config/arm/arm_mve.h (vpselq): Remove.
22928 (vpselq_u8): Remove.
22929 (vpselq_s8): Remove.
22930 (vpselq_u16): Remove.
22931 (vpselq_s16): Remove.
22932 (vpselq_u32): Remove.
22933 (vpselq_s32): Remove.
22934 (vpselq_u64): Remove.
22935 (vpselq_s64): Remove.
22936 (vpselq_f16): Remove.
22937 (vpselq_f32): Remove.
22938 (__arm_vpselq_u8): Remove.
22939 (__arm_vpselq_s8): Remove.
22940 (__arm_vpselq_u16): Remove.
22941 (__arm_vpselq_s16): Remove.
22942 (__arm_vpselq_u32): Remove.
22943 (__arm_vpselq_s32): Remove.
22944 (__arm_vpselq_u64): Remove.
22945 (__arm_vpselq_s64): Remove.
22946 (__arm_vpselq_f16): Remove.
22947 (__arm_vpselq_f32): Remove.
22948 (__arm_vpselq): Remove.
22950 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22952 * config/arm/arm-mve-builtins-shapes.cc (vpsel): New.
22953 * config/arm/arm-mve-builtins-shapes.h (vpsel): New.
22955 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22957 * config/arm/arm.cc (arm_expand_vcond): Use gen_mve_q instead of
22959 * config/arm/iterators.md (MVE_VPSELQ_F): New.
22960 (mve_insn): Add vpsel.
22961 * config/arm/mve.md (@mve_vpselq_<supf><mode>): Rename into ...
22962 (@mve_<mve_insn>q_<supf><mode>): ... this.
22963 (@mve_vpselq_f<mode>): Rename into ...
22964 (@mve_<mve_insn>q_f<mode>): ... this.
22966 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
22968 * config/arm/arm-mve-builtins-base.cc (vfmaq, vfmasq, vfmsq): New.
22969 * config/arm/arm-mve-builtins-base.def (vfmaq, vfmasq, vfmsq): New.
22970 * config/arm/arm-mve-builtins-base.h (vfmaq, vfmasq, vfmsq): New.
22971 * config/arm/arm-mve-builtins.cc
22972 (function_instance::has_inactive_argument): Handle vfmaq, vfmasq,
22974 * config/arm/arm_mve.h (vfmaq): Remove.
22978 (vfmasq_m): Remove.
22980 (vfmaq_f16): Remove.
22981 (vfmaq_n_f16): Remove.
22982 (vfmasq_n_f16): Remove.
22983 (vfmsq_f16): Remove.
22984 (vfmaq_f32): Remove.
22985 (vfmaq_n_f32): Remove.
22986 (vfmasq_n_f32): Remove.
22987 (vfmsq_f32): Remove.
22988 (vfmaq_m_f32): Remove.
22989 (vfmaq_m_f16): Remove.
22990 (vfmaq_m_n_f32): Remove.
22991 (vfmaq_m_n_f16): Remove.
22992 (vfmasq_m_n_f32): Remove.
22993 (vfmasq_m_n_f16): Remove.
22994 (vfmsq_m_f32): Remove.
22995 (vfmsq_m_f16): Remove.
22996 (__arm_vfmaq_f16): Remove.
22997 (__arm_vfmaq_n_f16): Remove.
22998 (__arm_vfmasq_n_f16): Remove.
22999 (__arm_vfmsq_f16): Remove.
23000 (__arm_vfmaq_f32): Remove.
23001 (__arm_vfmaq_n_f32): Remove.
23002 (__arm_vfmasq_n_f32): Remove.
23003 (__arm_vfmsq_f32): Remove.
23004 (__arm_vfmaq_m_f32): Remove.
23005 (__arm_vfmaq_m_f16): Remove.
23006 (__arm_vfmaq_m_n_f32): Remove.
23007 (__arm_vfmaq_m_n_f16): Remove.
23008 (__arm_vfmasq_m_n_f32): Remove.
23009 (__arm_vfmasq_m_n_f16): Remove.
23010 (__arm_vfmsq_m_f32): Remove.
23011 (__arm_vfmsq_m_f16): Remove.
23012 (__arm_vfmaq): Remove.
23013 (__arm_vfmasq): Remove.
23014 (__arm_vfmsq): Remove.
23015 (__arm_vfmaq_m): Remove.
23016 (__arm_vfmasq_m): Remove.
23017 (__arm_vfmsq_m): Remove.
23019 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23021 * config/arm/iterators.md (MVE_FP_M_BINARY): Add VFMAQ_M_F,
23023 (MVE_FP_M_N_BINARY): Add VFMAQ_M_N_F, VFMASQ_M_N_F.
23024 (MVE_VFMxQ_F, MVE_VFMAxQ_N_F): New.
23025 (mve_insn): Add vfma, vfmas, vfms.
23026 * config/arm/mve.md (mve_vfmaq_f<mode>, mve_vfmsq_f<mode>): Merge
23028 (@mve_<mve_insn>q_f<mode>): ... this.
23029 (mve_vfmaq_n_f<mode>, mve_vfmasq_n_f<mode>): Merge into ...
23030 (@mve_<mve_insn>q_n_f<mode>): ... this.
23031 (mve_vfmaq_m_f<mode>, mve_vfmsq_m_f<mode>): Merge into
23032 @mve_<mve_insn>q_m_f<mode>.
23033 (mve_vfmaq_m_n_f<mode>, mve_vfmasq_m_n_f<mode>): Merge into
23034 @mve_<mve_insn>q_m_n_f<mode>.
23036 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23038 * config/arm/arm-mve-builtins-shapes.cc (ternary_opt_n): New.
23039 * config/arm/arm-mve-builtins-shapes.h (ternary_opt_n): New.
23041 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23043 * config/arm/arm-mve-builtins-base.cc
23044 (FUNCTION_WITH_RTX_M_N_NO_F): New.
23046 * config/arm/arm-mve-builtins-base.def (vmvnq): New.
23047 * config/arm/arm-mve-builtins-base.h (vmvnq): New.
23048 * config/arm/arm_mve.h (vmvnq): Remove.
23051 (vmvnq_s8): Remove.
23052 (vmvnq_s16): Remove.
23053 (vmvnq_s32): Remove.
23054 (vmvnq_n_s16): Remove.
23055 (vmvnq_n_s32): Remove.
23056 (vmvnq_u8): Remove.
23057 (vmvnq_u16): Remove.
23058 (vmvnq_u32): Remove.
23059 (vmvnq_n_u16): Remove.
23060 (vmvnq_n_u32): Remove.
23061 (vmvnq_m_u8): Remove.
23062 (vmvnq_m_s8): Remove.
23063 (vmvnq_m_u16): Remove.
23064 (vmvnq_m_s16): Remove.
23065 (vmvnq_m_u32): Remove.
23066 (vmvnq_m_s32): Remove.
23067 (vmvnq_m_n_s16): Remove.
23068 (vmvnq_m_n_u16): Remove.
23069 (vmvnq_m_n_s32): Remove.
23070 (vmvnq_m_n_u32): Remove.
23071 (vmvnq_x_s8): Remove.
23072 (vmvnq_x_s16): Remove.
23073 (vmvnq_x_s32): Remove.
23074 (vmvnq_x_u8): Remove.
23075 (vmvnq_x_u16): Remove.
23076 (vmvnq_x_u32): Remove.
23077 (vmvnq_x_n_s16): Remove.
23078 (vmvnq_x_n_s32): Remove.
23079 (vmvnq_x_n_u16): Remove.
23080 (vmvnq_x_n_u32): Remove.
23081 (__arm_vmvnq_s8): Remove.
23082 (__arm_vmvnq_s16): Remove.
23083 (__arm_vmvnq_s32): Remove.
23084 (__arm_vmvnq_n_s16): Remove.
23085 (__arm_vmvnq_n_s32): Remove.
23086 (__arm_vmvnq_u8): Remove.
23087 (__arm_vmvnq_u16): Remove.
23088 (__arm_vmvnq_u32): Remove.
23089 (__arm_vmvnq_n_u16): Remove.
23090 (__arm_vmvnq_n_u32): Remove.
23091 (__arm_vmvnq_m_u8): Remove.
23092 (__arm_vmvnq_m_s8): Remove.
23093 (__arm_vmvnq_m_u16): Remove.
23094 (__arm_vmvnq_m_s16): Remove.
23095 (__arm_vmvnq_m_u32): Remove.
23096 (__arm_vmvnq_m_s32): Remove.
23097 (__arm_vmvnq_m_n_s16): Remove.
23098 (__arm_vmvnq_m_n_u16): Remove.
23099 (__arm_vmvnq_m_n_s32): Remove.
23100 (__arm_vmvnq_m_n_u32): Remove.
23101 (__arm_vmvnq_x_s8): Remove.
23102 (__arm_vmvnq_x_s16): Remove.
23103 (__arm_vmvnq_x_s32): Remove.
23104 (__arm_vmvnq_x_u8): Remove.
23105 (__arm_vmvnq_x_u16): Remove.
23106 (__arm_vmvnq_x_u32): Remove.
23107 (__arm_vmvnq_x_n_s16): Remove.
23108 (__arm_vmvnq_x_n_s32): Remove.
23109 (__arm_vmvnq_x_n_u16): Remove.
23110 (__arm_vmvnq_x_n_u32): Remove.
23111 (__arm_vmvnq): Remove.
23112 (__arm_vmvnq_m): Remove.
23113 (__arm_vmvnq_x): Remove.
23115 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23117 * config/arm/iterators.md (mve_insn): Add vmvn.
23118 * config/arm/mve.md (mve_vmvnq_n_<supf><mode>): Rename into ...
23119 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23120 (mve_vmvnq_m_<supf><mode>): Rename into ...
23121 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23122 (mve_vmvnq_m_n_<supf><mode>): Rename into ...
23123 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23125 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23127 * config/arm/arm-mve-builtins-shapes.cc (mvn): New.
23128 * config/arm/arm-mve-builtins-shapes.h (mvn): New.
23130 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23132 * config/arm/arm-mve-builtins-base.cc (vbrsrq): New.
23133 * config/arm/arm-mve-builtins-base.def (vbrsrq): New.
23134 * config/arm/arm-mve-builtins-base.h (vbrsrq): New.
23135 * config/arm/arm_mve.h (vbrsrq): Remove.
23136 (vbrsrq_m): Remove.
23137 (vbrsrq_x): Remove.
23138 (vbrsrq_n_f16): Remove.
23139 (vbrsrq_n_f32): Remove.
23140 (vbrsrq_n_u8): Remove.
23141 (vbrsrq_n_s8): Remove.
23142 (vbrsrq_n_u16): Remove.
23143 (vbrsrq_n_s16): Remove.
23144 (vbrsrq_n_u32): Remove.
23145 (vbrsrq_n_s32): Remove.
23146 (vbrsrq_m_n_s8): Remove.
23147 (vbrsrq_m_n_s32): Remove.
23148 (vbrsrq_m_n_s16): Remove.
23149 (vbrsrq_m_n_u8): Remove.
23150 (vbrsrq_m_n_u32): Remove.
23151 (vbrsrq_m_n_u16): Remove.
23152 (vbrsrq_m_n_f32): Remove.
23153 (vbrsrq_m_n_f16): Remove.
23154 (vbrsrq_x_n_s8): Remove.
23155 (vbrsrq_x_n_s16): Remove.
23156 (vbrsrq_x_n_s32): Remove.
23157 (vbrsrq_x_n_u8): Remove.
23158 (vbrsrq_x_n_u16): Remove.
23159 (vbrsrq_x_n_u32): Remove.
23160 (vbrsrq_x_n_f16): Remove.
23161 (vbrsrq_x_n_f32): Remove.
23162 (__arm_vbrsrq_n_u8): Remove.
23163 (__arm_vbrsrq_n_s8): Remove.
23164 (__arm_vbrsrq_n_u16): Remove.
23165 (__arm_vbrsrq_n_s16): Remove.
23166 (__arm_vbrsrq_n_u32): Remove.
23167 (__arm_vbrsrq_n_s32): Remove.
23168 (__arm_vbrsrq_m_n_s8): Remove.
23169 (__arm_vbrsrq_m_n_s32): Remove.
23170 (__arm_vbrsrq_m_n_s16): Remove.
23171 (__arm_vbrsrq_m_n_u8): Remove.
23172 (__arm_vbrsrq_m_n_u32): Remove.
23173 (__arm_vbrsrq_m_n_u16): Remove.
23174 (__arm_vbrsrq_x_n_s8): Remove.
23175 (__arm_vbrsrq_x_n_s16): Remove.
23176 (__arm_vbrsrq_x_n_s32): Remove.
23177 (__arm_vbrsrq_x_n_u8): Remove.
23178 (__arm_vbrsrq_x_n_u16): Remove.
23179 (__arm_vbrsrq_x_n_u32): Remove.
23180 (__arm_vbrsrq_n_f16): Remove.
23181 (__arm_vbrsrq_n_f32): Remove.
23182 (__arm_vbrsrq_m_n_f32): Remove.
23183 (__arm_vbrsrq_m_n_f16): Remove.
23184 (__arm_vbrsrq_x_n_f16): Remove.
23185 (__arm_vbrsrq_x_n_f32): Remove.
23186 (__arm_vbrsrq): Remove.
23187 (__arm_vbrsrq_m): Remove.
23188 (__arm_vbrsrq_x): Remove.
23190 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23192 * config/arm/iterators.md (MVE_VBRSR_M_N_FP, MVE_VBRSR_N_FP): New.
23193 (mve_insn): Add vbrsr.
23194 * config/arm/mve.md (mve_vbrsrq_n_f<mode>): Rename into ...
23195 (@mve_<mve_insn>q_n_f<mode>): ... this.
23196 (mve_vbrsrq_n_<supf><mode>): Rename into ...
23197 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23198 (mve_vbrsrq_m_n_<supf><mode>): Rename into ...
23199 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23200 (mve_vbrsrq_m_n_f<mode>): Rename into ...
23201 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
23203 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23205 * config/arm/arm-mve-builtins-shapes.cc (binary_imm32): New.
23206 * config/arm/arm-mve-builtins-shapes.h (binary_imm32): New.
23208 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23210 * config/arm/arm-mve-builtins-base.cc (vqshluq): New.
23211 * config/arm/arm-mve-builtins-base.def (vqshluq): New.
23212 * config/arm/arm-mve-builtins-base.h (vqshluq): New.
23213 * config/arm/arm_mve.h (vqshluq): Remove.
23214 (vqshluq_m): Remove.
23215 (vqshluq_n_s8): Remove.
23216 (vqshluq_n_s16): Remove.
23217 (vqshluq_n_s32): Remove.
23218 (vqshluq_m_n_s8): Remove.
23219 (vqshluq_m_n_s16): Remove.
23220 (vqshluq_m_n_s32): Remove.
23221 (__arm_vqshluq_n_s8): Remove.
23222 (__arm_vqshluq_n_s16): Remove.
23223 (__arm_vqshluq_n_s32): Remove.
23224 (__arm_vqshluq_m_n_s8): Remove.
23225 (__arm_vqshluq_m_n_s16): Remove.
23226 (__arm_vqshluq_m_n_s32): Remove.
23227 (__arm_vqshluq): Remove.
23228 (__arm_vqshluq_m): Remove.
23230 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23232 * config/arm/iterators.md (mve_insn): Add vqshlu.
23233 (supf): Add VQSHLUQ_M_N_S, VQSHLUQ_N_S.
23234 (VQSHLUQ_M_N, VQSHLUQ_N): New.
23235 * config/arm/mve.md (mve_vqshluq_n_s<mode>): Change name into ...
23236 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23237 (mve_vqshluq_m_n_s<mode>): Change name into ...
23238 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23240 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23242 * config/arm/arm-mve-builtins-shapes.cc
23243 (binary_lshift_unsigned): New.
23244 * config/arm/arm-mve-builtins-shapes.h
23245 (binary_lshift_unsigned): New.
23247 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23249 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhaq)
23250 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23251 * config/arm/arm-mve-builtins-base.def (vrmlaldavhaq)
23252 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23253 * config/arm/arm-mve-builtins-base.h (vrmlaldavhaq)
23254 (vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq): New.
23255 * config/arm/arm-mve-builtins-functions.h: Handle vrmlaldavhaq,
23256 vrmlaldavhaxq, vrmlsldavhaq, vrmlsldavhaxq.
23257 * config/arm/arm_mve.h (vrmlaldavhaq): Remove.
23258 (vrmlaldavhaxq): Remove.
23259 (vrmlsldavhaq): Remove.
23260 (vrmlsldavhaxq): Remove.
23261 (vrmlaldavhaq_p): Remove.
23262 (vrmlaldavhaxq_p): Remove.
23263 (vrmlsldavhaq_p): Remove.
23264 (vrmlsldavhaxq_p): Remove.
23265 (vrmlaldavhaq_s32): Remove.
23266 (vrmlaldavhaq_u32): Remove.
23267 (vrmlaldavhaxq_s32): Remove.
23268 (vrmlsldavhaq_s32): Remove.
23269 (vrmlsldavhaxq_s32): Remove.
23270 (vrmlaldavhaq_p_s32): Remove.
23271 (vrmlaldavhaq_p_u32): Remove.
23272 (vrmlaldavhaxq_p_s32): Remove.
23273 (vrmlsldavhaq_p_s32): Remove.
23274 (vrmlsldavhaxq_p_s32): Remove.
23275 (__arm_vrmlaldavhaq_s32): Remove.
23276 (__arm_vrmlaldavhaq_u32): Remove.
23277 (__arm_vrmlaldavhaxq_s32): Remove.
23278 (__arm_vrmlsldavhaq_s32): Remove.
23279 (__arm_vrmlsldavhaxq_s32): Remove.
23280 (__arm_vrmlaldavhaq_p_s32): Remove.
23281 (__arm_vrmlaldavhaq_p_u32): Remove.
23282 (__arm_vrmlaldavhaxq_p_s32): Remove.
23283 (__arm_vrmlsldavhaq_p_s32): Remove.
23284 (__arm_vrmlsldavhaxq_p_s32): Remove.
23285 (__arm_vrmlaldavhaq): Remove.
23286 (__arm_vrmlaldavhaxq): Remove.
23287 (__arm_vrmlsldavhaq): Remove.
23288 (__arm_vrmlsldavhaxq): Remove.
23289 (__arm_vrmlaldavhaq_p): Remove.
23290 (__arm_vrmlaldavhaxq_p): Remove.
23291 (__arm_vrmlsldavhaq_p): Remove.
23292 (__arm_vrmlsldavhaxq_p): Remove.
23294 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23296 * config/arm/iterators.md (MVE_VRMLxLDAVHAxQ)
23297 (MVE_VRMLxLDAVHAxQ_P): New.
23298 (mve_insn): Add vrmlaldavha, vrmlaldavhax, vrmlsldavha,
23300 (supf): Add VRMLALDAVHAXQ_P_S, VRMLALDAVHAXQ_S, VRMLSLDAVHAQ_P_S,
23301 VRMLSLDAVHAQ_S, VRMLSLDAVHAXQ_P_S, VRMLSLDAVHAXQ_S,
23303 * config/arm/mve.md (mve_vrmlaldavhaq_<supf>v4si)
23304 (mve_vrmlaldavhaxq_sv4si, mve_vrmlsldavhaxq_sv4si)
23305 (mve_vrmlsldavhaq_sv4si): Merge into ...
23306 (@mve_<mve_insn>q_<supf>v4si): ... this.
23307 (mve_vrmlaldavhaq_p_sv4si, mve_vrmlaldavhaq_p_uv4si)
23308 (mve_vrmlaldavhaxq_p_sv4si, mve_vrmlsldavhaq_p_sv4si)
23309 (mve_vrmlsldavhaxq_p_sv4si): Merge into ...
23310 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23312 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23314 * config/arm/arm-mve-builtins-base.cc (vqdmullbq, vqdmulltq): New.
23315 * config/arm/arm-mve-builtins-base.def (vqdmullbq, vqdmulltq):
23317 * config/arm/arm-mve-builtins-base.h (vqdmullbq, vqdmulltq): New.
23318 * config/arm/arm_mve.h (vqdmulltq): Remove.
23319 (vqdmullbq): Remove.
23320 (vqdmullbq_m): Remove.
23321 (vqdmulltq_m): Remove.
23322 (vqdmulltq_s16): Remove.
23323 (vqdmulltq_n_s16): Remove.
23324 (vqdmullbq_s16): Remove.
23325 (vqdmullbq_n_s16): Remove.
23326 (vqdmulltq_s32): Remove.
23327 (vqdmulltq_n_s32): Remove.
23328 (vqdmullbq_s32): Remove.
23329 (vqdmullbq_n_s32): Remove.
23330 (vqdmullbq_m_n_s32): Remove.
23331 (vqdmullbq_m_n_s16): Remove.
23332 (vqdmullbq_m_s32): Remove.
23333 (vqdmullbq_m_s16): Remove.
23334 (vqdmulltq_m_n_s32): Remove.
23335 (vqdmulltq_m_n_s16): Remove.
23336 (vqdmulltq_m_s32): Remove.
23337 (vqdmulltq_m_s16): Remove.
23338 (__arm_vqdmulltq_s16): Remove.
23339 (__arm_vqdmulltq_n_s16): Remove.
23340 (__arm_vqdmullbq_s16): Remove.
23341 (__arm_vqdmullbq_n_s16): Remove.
23342 (__arm_vqdmulltq_s32): Remove.
23343 (__arm_vqdmulltq_n_s32): Remove.
23344 (__arm_vqdmullbq_s32): Remove.
23345 (__arm_vqdmullbq_n_s32): Remove.
23346 (__arm_vqdmullbq_m_n_s32): Remove.
23347 (__arm_vqdmullbq_m_n_s16): Remove.
23348 (__arm_vqdmullbq_m_s32): Remove.
23349 (__arm_vqdmullbq_m_s16): Remove.
23350 (__arm_vqdmulltq_m_n_s32): Remove.
23351 (__arm_vqdmulltq_m_n_s16): Remove.
23352 (__arm_vqdmulltq_m_s32): Remove.
23353 (__arm_vqdmulltq_m_s16): Remove.
23354 (__arm_vqdmulltq): Remove.
23355 (__arm_vqdmullbq): Remove.
23356 (__arm_vqdmullbq_m): Remove.
23357 (__arm_vqdmulltq_m): Remove.
23359 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23361 * config/arm/iterators.md (MVE_VQDMULLxQ, MVE_VQDMULLxQ_M)
23362 (MVE_VQDMULLxQ_M_N, MVE_VQDMULLxQ_N): New.
23363 (mve_insn): Add vqdmullb, vqdmullt.
23364 (supf): Add VQDMULLBQ_S, VQDMULLBQ_M_S, VQDMULLBQ_M_N_S,
23365 VQDMULLBQ_N_S, VQDMULLTQ_S, VQDMULLTQ_M_S, VQDMULLTQ_M_N_S,
23367 * config/arm/mve.md (mve_vqdmullbq_n_s<mode>)
23368 (mve_vqdmulltq_n_s<mode>): Merge into ...
23369 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23370 (mve_vqdmullbq_s<mode>, mve_vqdmulltq_s<mode>): Merge into ...
23371 (@mve_<mve_insn>q_<supf><mode>): ... this.
23372 (mve_vqdmullbq_m_n_s<mode>, mve_vqdmulltq_m_n_s<mode>): Merge into
23374 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
23375 (mve_vqdmullbq_m_s<mode>, mve_vqdmulltq_m_s<mode>): Merge into ...
23376 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
23378 2023-05-12 Christophe Lyon <christophe.lyon@arm.com>
23380 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_opt_n): New.
23381 * config/arm/arm-mve-builtins-shapes.h (binary_widen_opt_n): New.
23383 2023-05-12 Kito Cheng <kito.cheng@sifive.com>
23385 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi):
23386 Drop unused parameter.
23387 (riscv_select_multilib): Ditto.
23388 (riscv_compute_multilib): Update call site of
23389 riscv_select_multilib_by_abi and riscv_select_multilib_by_abi.
23391 2023-05-12 Juzhe Zhong <juzhe.zhong@rivai.ai>
23393 * config/riscv/autovec.md (vec_init<mode><vel>): New pattern.
23394 * config/riscv/riscv-protos.h (expand_vec_init): New function.
23395 * config/riscv/riscv-v.cc (class rvv_builder): New class.
23396 (rvv_builder::can_duplicate_repeating_sequence_p): New function.
23397 (rvv_builder::get_merged_repeating_sequence): Ditto.
23398 (expand_vector_init_insert_elems): Ditto.
23399 (expand_vec_init): Ditto.
23400 * config/riscv/vector-iterators.md: New attribute.
23402 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23404 * config/rs6000/rs6000-builtins.def
23405 (__builtin_vsx_scalar_insert_exp): Replace bif-pattern from xsiexpdp
23407 (__builtin_vsx_scalar_insert_exp_dp): Replace bif-pattern from
23408 xsiexpdpf to xsiexpdpf_di.
23409 * config/rs6000/vsx.md (xsiexpdp): Rename to...
23410 (xsiexpdp_<mode>): ..., set the mode of second operand to GPR and
23411 replace TARGET_64BIT with TARGET_POWERPC64.
23412 (xsiexpdpf): Rename to...
23413 (xsiexpdpf_<mode>): ..., set the mode of second operand to GPR and
23414 replace TARGET_64BIT with TARGET_POWERPC64.
23416 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23418 * config/rs6000/rs6000-builtins.def
23419 (__builtin_vsx_scalar_extract_sig): Set return type to const signed
23421 * config/rs6000/vsx.md (xsxsigdp): Replace TARGET_64BIT with
23424 2023-05-12 Haochen Gui <guihaoc@gcc.gnu.org>
23426 * config/rs6000/rs6000-builtins.def
23427 (__builtin_vsx_scalar_extract_exp): Set return type to const signed
23428 int and set its bif-pattern to xsxexpdp_si, move it from power9-64
23430 * config/rs6000/vsx.md (xsxexpdp): Rename to ...
23431 (xsxexpdp_<mode>): ..., set mode of operand 0 to GPR and remove
23432 TARGET_64BIT check.
23433 * doc/extend.texi (scalar_extract_exp): Remove 64-bit environment
23434 requirement when it has a 64-bit argument.
23436 2023-05-12 Pan Li <pan2.li@intel.com>
23437 Richard Sandiford <richard.sandiford@arm.com>
23438 Richard Biener <rguenther@suse.de>
23439 Jakub Jelinek <jakub@redhat.com>
23441 * mux-utils.h: Add overload operator == and != for pointer_mux.
23442 * var-tracking.cc: Included mux-utils.h for pointer_tmux.
23443 (decl_or_value): Changed from void * to pointer_mux<tree_node, rtx_def>.
23444 (dv_is_decl_p): Reconciled to the new type, aka pointer_mux.
23445 (dv_as_decl): Ditto.
23446 (dv_as_opaque): Removed due to unnecessary.
23447 (struct variable_hasher): Take decl_or_value as compare_type.
23448 (variable_hasher::equal): Diito.
23449 (dv_from_decl): Reconciled to the new type, aka pointer_mux.
23450 (dv_from_value): Ditto.
23451 (attrs_list_member): Ditto.
23452 (vars_copy): Ditto.
23453 (var_reg_decl_set): Ditto.
23454 (var_reg_delete_and_set): Ditto.
23455 (find_loc_in_1pdv): Ditto.
23456 (canonicalize_values_star): Ditto.
23457 (variable_post_merge_new_vals): Ditto.
23458 (dump_onepart_variable_differences): Ditto.
23459 (variable_different_p): Ditto.
23460 (set_slot_part): Ditto.
23461 (clobber_slot_part): Ditto.
23462 (clobber_variable_part): Ditto.
23464 2023-05-11 mtsamis <manolis.tsamis@vrull.eu>
23466 * match.pd: simplify vector shift + bit_and + multiply.
23468 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23470 * config/arm/arm-mve-builtins-base.cc (vmlaq, vmlasq, vqdmlahq)
23471 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23472 * config/arm/arm-mve-builtins-base.def (vmlaq, vmlasq, vqdmlahq)
23473 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23474 * config/arm/arm-mve-builtins-base.h (vmlaq, vmlasq, vqdmlahq)
23475 (vqdmlashq, vqrdmlahq, vqrdmlashq): New.
23476 * config/arm/arm-mve-builtins.cc
23477 (function_instance::has_inactive_argument): Handle vmlaq, vmlasq,
23478 vqdmlahq, vqdmlashq, vqrdmlahq, vqrdmlashq.
23479 * config/arm/arm_mve.h (vqrdmlashq): Remove.
23480 (vqrdmlahq): Remove.
23481 (vqdmlashq): Remove.
23482 (vqdmlahq): Remove.
23486 (vmlasq_m): Remove.
23487 (vqdmlashq_m): Remove.
23488 (vqdmlahq_m): Remove.
23489 (vqrdmlahq_m): Remove.
23490 (vqrdmlashq_m): Remove.
23491 (vmlasq_n_u8): Remove.
23492 (vmlaq_n_u8): Remove.
23493 (vqrdmlashq_n_s8): Remove.
23494 (vqrdmlahq_n_s8): Remove.
23495 (vqdmlahq_n_s8): Remove.
23496 (vqdmlashq_n_s8): Remove.
23497 (vmlasq_n_s8): Remove.
23498 (vmlaq_n_s8): Remove.
23499 (vmlasq_n_u16): Remove.
23500 (vmlaq_n_u16): Remove.
23501 (vqrdmlashq_n_s16): Remove.
23502 (vqrdmlahq_n_s16): Remove.
23503 (vqdmlashq_n_s16): Remove.
23504 (vqdmlahq_n_s16): Remove.
23505 (vmlasq_n_s16): Remove.
23506 (vmlaq_n_s16): Remove.
23507 (vmlasq_n_u32): Remove.
23508 (vmlaq_n_u32): Remove.
23509 (vqrdmlashq_n_s32): Remove.
23510 (vqrdmlahq_n_s32): Remove.
23511 (vqdmlashq_n_s32): Remove.
23512 (vqdmlahq_n_s32): Remove.
23513 (vmlasq_n_s32): Remove.
23514 (vmlaq_n_s32): Remove.
23515 (vmlaq_m_n_s8): Remove.
23516 (vmlaq_m_n_s32): Remove.
23517 (vmlaq_m_n_s16): Remove.
23518 (vmlaq_m_n_u8): Remove.
23519 (vmlaq_m_n_u32): Remove.
23520 (vmlaq_m_n_u16): Remove.
23521 (vmlasq_m_n_s8): Remove.
23522 (vmlasq_m_n_s32): Remove.
23523 (vmlasq_m_n_s16): Remove.
23524 (vmlasq_m_n_u8): Remove.
23525 (vmlasq_m_n_u32): Remove.
23526 (vmlasq_m_n_u16): Remove.
23527 (vqdmlashq_m_n_s8): Remove.
23528 (vqdmlashq_m_n_s32): Remove.
23529 (vqdmlashq_m_n_s16): Remove.
23530 (vqdmlahq_m_n_s8): Remove.
23531 (vqdmlahq_m_n_s32): Remove.
23532 (vqdmlahq_m_n_s16): Remove.
23533 (vqrdmlahq_m_n_s8): Remove.
23534 (vqrdmlahq_m_n_s32): Remove.
23535 (vqrdmlahq_m_n_s16): Remove.
23536 (vqrdmlashq_m_n_s8): Remove.
23537 (vqrdmlashq_m_n_s32): Remove.
23538 (vqrdmlashq_m_n_s16): Remove.
23539 (__arm_vmlasq_n_u8): Remove.
23540 (__arm_vmlaq_n_u8): Remove.
23541 (__arm_vqrdmlashq_n_s8): Remove.
23542 (__arm_vqdmlashq_n_s8): Remove.
23543 (__arm_vqrdmlahq_n_s8): Remove.
23544 (__arm_vqdmlahq_n_s8): Remove.
23545 (__arm_vmlasq_n_s8): Remove.
23546 (__arm_vmlaq_n_s8): Remove.
23547 (__arm_vmlasq_n_u16): Remove.
23548 (__arm_vmlaq_n_u16): Remove.
23549 (__arm_vqrdmlashq_n_s16): Remove.
23550 (__arm_vqdmlashq_n_s16): Remove.
23551 (__arm_vqrdmlahq_n_s16): Remove.
23552 (__arm_vqdmlahq_n_s16): Remove.
23553 (__arm_vmlasq_n_s16): Remove.
23554 (__arm_vmlaq_n_s16): Remove.
23555 (__arm_vmlasq_n_u32): Remove.
23556 (__arm_vmlaq_n_u32): Remove.
23557 (__arm_vqrdmlashq_n_s32): Remove.
23558 (__arm_vqdmlashq_n_s32): Remove.
23559 (__arm_vqrdmlahq_n_s32): Remove.
23560 (__arm_vqdmlahq_n_s32): Remove.
23561 (__arm_vmlasq_n_s32): Remove.
23562 (__arm_vmlaq_n_s32): Remove.
23563 (__arm_vmlaq_m_n_s8): Remove.
23564 (__arm_vmlaq_m_n_s32): Remove.
23565 (__arm_vmlaq_m_n_s16): Remove.
23566 (__arm_vmlaq_m_n_u8): Remove.
23567 (__arm_vmlaq_m_n_u32): Remove.
23568 (__arm_vmlaq_m_n_u16): Remove.
23569 (__arm_vmlasq_m_n_s8): Remove.
23570 (__arm_vmlasq_m_n_s32): Remove.
23571 (__arm_vmlasq_m_n_s16): Remove.
23572 (__arm_vmlasq_m_n_u8): Remove.
23573 (__arm_vmlasq_m_n_u32): Remove.
23574 (__arm_vmlasq_m_n_u16): Remove.
23575 (__arm_vqdmlahq_m_n_s8): Remove.
23576 (__arm_vqdmlahq_m_n_s32): Remove.
23577 (__arm_vqdmlahq_m_n_s16): Remove.
23578 (__arm_vqrdmlahq_m_n_s8): Remove.
23579 (__arm_vqrdmlahq_m_n_s32): Remove.
23580 (__arm_vqrdmlahq_m_n_s16): Remove.
23581 (__arm_vqrdmlashq_m_n_s8): Remove.
23582 (__arm_vqrdmlashq_m_n_s32): Remove.
23583 (__arm_vqrdmlashq_m_n_s16): Remove.
23584 (__arm_vqdmlashq_m_n_s8): Remove.
23585 (__arm_vqdmlashq_m_n_s16): Remove.
23586 (__arm_vqdmlashq_m_n_s32): Remove.
23587 (__arm_vmlasq): Remove.
23588 (__arm_vmlaq): Remove.
23589 (__arm_vqrdmlashq): Remove.
23590 (__arm_vqdmlashq): Remove.
23591 (__arm_vqrdmlahq): Remove.
23592 (__arm_vqdmlahq): Remove.
23593 (__arm_vmlaq_m): Remove.
23594 (__arm_vmlasq_m): Remove.
23595 (__arm_vqdmlahq_m): Remove.
23596 (__arm_vqrdmlahq_m): Remove.
23597 (__arm_vqrdmlashq_m): Remove.
23598 (__arm_vqdmlashq_m): Remove.
23600 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23602 * config/arm/iterators.md (MVE_VMLxQ_N): New.
23603 (mve_insn): Add vmla, vmlas, vqdmlah, vqdmlash, vqrdmlah,
23605 (supf): Add VQDMLAHQ_N_S, VQDMLASHQ_N_S, VQRDMLAHQ_N_S,
23607 * config/arm/mve.md (mve_vmlaq_n_<supf><mode>)
23608 (mve_vmlasq_n_<supf><mode>, mve_vqdmlahq_n_<supf><mode>)
23609 (mve_vqdmlashq_n_<supf><mode>, mve_vqrdmlahq_n_<supf><mode>)
23610 (mve_vqrdmlashq_n_<supf><mode>): Merge into ...
23611 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
23613 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23615 * config/arm/arm-mve-builtins-shapes.cc (ternary_n): New.
23616 * config/arm/arm-mve-builtins-shapes.h (ternary_n): New.
23618 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23620 * config/arm/arm-mve-builtins-base.cc (vqdmladhq, vqdmladhxq)
23621 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
23622 (vqrdmlsdhxq): New.
23623 * config/arm/arm-mve-builtins-base.def (vqdmladhq, vqdmladhxq)
23624 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
23625 (vqrdmlsdhxq): New.
23626 * config/arm/arm-mve-builtins-base.h (vqdmladhq, vqdmladhxq)
23627 (vqdmlsdhq, vqdmlsdhxq, vqrdmladhq, vqrdmladhxq, vqrdmlsdhq)
23628 (vqrdmlsdhxq): New.
23629 * config/arm/arm-mve-builtins.cc
23630 (function_instance::has_inactive_argument): Handle vqrdmladhq,
23631 vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq vqdmladhq, vqdmladhxq,
23632 vqdmlsdhq, vqdmlsdhxq.
23633 * config/arm/arm_mve.h (vqrdmlsdhxq): Remove.
23634 (vqrdmlsdhq): Remove.
23635 (vqrdmladhxq): Remove.
23636 (vqrdmladhq): Remove.
23637 (vqdmlsdhxq): Remove.
23638 (vqdmlsdhq): Remove.
23639 (vqdmladhxq): Remove.
23640 (vqdmladhq): Remove.
23641 (vqdmladhq_m): Remove.
23642 (vqdmladhxq_m): Remove.
23643 (vqdmlsdhq_m): Remove.
23644 (vqdmlsdhxq_m): Remove.
23645 (vqrdmladhq_m): Remove.
23646 (vqrdmladhxq_m): Remove.
23647 (vqrdmlsdhq_m): Remove.
23648 (vqrdmlsdhxq_m): Remove.
23649 (vqrdmlsdhxq_s8): Remove.
23650 (vqrdmlsdhq_s8): Remove.
23651 (vqrdmladhxq_s8): Remove.
23652 (vqrdmladhq_s8): Remove.
23653 (vqdmlsdhxq_s8): Remove.
23654 (vqdmlsdhq_s8): Remove.
23655 (vqdmladhxq_s8): Remove.
23656 (vqdmladhq_s8): Remove.
23657 (vqrdmlsdhxq_s16): Remove.
23658 (vqrdmlsdhq_s16): Remove.
23659 (vqrdmladhxq_s16): Remove.
23660 (vqrdmladhq_s16): Remove.
23661 (vqdmlsdhxq_s16): Remove.
23662 (vqdmlsdhq_s16): Remove.
23663 (vqdmladhxq_s16): Remove.
23664 (vqdmladhq_s16): Remove.
23665 (vqrdmlsdhxq_s32): Remove.
23666 (vqrdmlsdhq_s32): Remove.
23667 (vqrdmladhxq_s32): Remove.
23668 (vqrdmladhq_s32): Remove.
23669 (vqdmlsdhxq_s32): Remove.
23670 (vqdmlsdhq_s32): Remove.
23671 (vqdmladhxq_s32): Remove.
23672 (vqdmladhq_s32): Remove.
23673 (vqdmladhq_m_s8): Remove.
23674 (vqdmladhq_m_s32): Remove.
23675 (vqdmladhq_m_s16): Remove.
23676 (vqdmladhxq_m_s8): Remove.
23677 (vqdmladhxq_m_s32): Remove.
23678 (vqdmladhxq_m_s16): Remove.
23679 (vqdmlsdhq_m_s8): Remove.
23680 (vqdmlsdhq_m_s32): Remove.
23681 (vqdmlsdhq_m_s16): Remove.
23682 (vqdmlsdhxq_m_s8): Remove.
23683 (vqdmlsdhxq_m_s32): Remove.
23684 (vqdmlsdhxq_m_s16): Remove.
23685 (vqrdmladhq_m_s8): Remove.
23686 (vqrdmladhq_m_s32): Remove.
23687 (vqrdmladhq_m_s16): Remove.
23688 (vqrdmladhxq_m_s8): Remove.
23689 (vqrdmladhxq_m_s32): Remove.
23690 (vqrdmladhxq_m_s16): Remove.
23691 (vqrdmlsdhq_m_s8): Remove.
23692 (vqrdmlsdhq_m_s32): Remove.
23693 (vqrdmlsdhq_m_s16): Remove.
23694 (vqrdmlsdhxq_m_s8): Remove.
23695 (vqrdmlsdhxq_m_s32): Remove.
23696 (vqrdmlsdhxq_m_s16): Remove.
23697 (__arm_vqrdmlsdhxq_s8): Remove.
23698 (__arm_vqrdmlsdhq_s8): Remove.
23699 (__arm_vqrdmladhxq_s8): Remove.
23700 (__arm_vqrdmladhq_s8): Remove.
23701 (__arm_vqdmlsdhxq_s8): Remove.
23702 (__arm_vqdmlsdhq_s8): Remove.
23703 (__arm_vqdmladhxq_s8): Remove.
23704 (__arm_vqdmladhq_s8): Remove.
23705 (__arm_vqrdmlsdhxq_s16): Remove.
23706 (__arm_vqrdmlsdhq_s16): Remove.
23707 (__arm_vqrdmladhxq_s16): Remove.
23708 (__arm_vqrdmladhq_s16): Remove.
23709 (__arm_vqdmlsdhxq_s16): Remove.
23710 (__arm_vqdmlsdhq_s16): Remove.
23711 (__arm_vqdmladhxq_s16): Remove.
23712 (__arm_vqdmladhq_s16): Remove.
23713 (__arm_vqrdmlsdhxq_s32): Remove.
23714 (__arm_vqrdmlsdhq_s32): Remove.
23715 (__arm_vqrdmladhxq_s32): Remove.
23716 (__arm_vqrdmladhq_s32): Remove.
23717 (__arm_vqdmlsdhxq_s32): Remove.
23718 (__arm_vqdmlsdhq_s32): Remove.
23719 (__arm_vqdmladhxq_s32): Remove.
23720 (__arm_vqdmladhq_s32): Remove.
23721 (__arm_vqdmladhq_m_s8): Remove.
23722 (__arm_vqdmladhq_m_s32): Remove.
23723 (__arm_vqdmladhq_m_s16): Remove.
23724 (__arm_vqdmladhxq_m_s8): Remove.
23725 (__arm_vqdmladhxq_m_s32): Remove.
23726 (__arm_vqdmladhxq_m_s16): Remove.
23727 (__arm_vqdmlsdhq_m_s8): Remove.
23728 (__arm_vqdmlsdhq_m_s32): Remove.
23729 (__arm_vqdmlsdhq_m_s16): Remove.
23730 (__arm_vqdmlsdhxq_m_s8): Remove.
23731 (__arm_vqdmlsdhxq_m_s32): Remove.
23732 (__arm_vqdmlsdhxq_m_s16): Remove.
23733 (__arm_vqrdmladhq_m_s8): Remove.
23734 (__arm_vqrdmladhq_m_s32): Remove.
23735 (__arm_vqrdmladhq_m_s16): Remove.
23736 (__arm_vqrdmladhxq_m_s8): Remove.
23737 (__arm_vqrdmladhxq_m_s32): Remove.
23738 (__arm_vqrdmladhxq_m_s16): Remove.
23739 (__arm_vqrdmlsdhq_m_s8): Remove.
23740 (__arm_vqrdmlsdhq_m_s32): Remove.
23741 (__arm_vqrdmlsdhq_m_s16): Remove.
23742 (__arm_vqrdmlsdhxq_m_s8): Remove.
23743 (__arm_vqrdmlsdhxq_m_s32): Remove.
23744 (__arm_vqrdmlsdhxq_m_s16): Remove.
23745 (__arm_vqrdmlsdhxq): Remove.
23746 (__arm_vqrdmlsdhq): Remove.
23747 (__arm_vqrdmladhxq): Remove.
23748 (__arm_vqrdmladhq): Remove.
23749 (__arm_vqdmlsdhxq): Remove.
23750 (__arm_vqdmlsdhq): Remove.
23751 (__arm_vqdmladhxq): Remove.
23752 (__arm_vqdmladhq): Remove.
23753 (__arm_vqdmladhq_m): Remove.
23754 (__arm_vqdmladhxq_m): Remove.
23755 (__arm_vqdmlsdhq_m): Remove.
23756 (__arm_vqdmlsdhxq_m): Remove.
23757 (__arm_vqrdmladhq_m): Remove.
23758 (__arm_vqrdmladhxq_m): Remove.
23759 (__arm_vqrdmlsdhq_m): Remove.
23760 (__arm_vqrdmlsdhxq_m): Remove.
23762 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23764 * config/arm/iterators.md (MVE_VQxDMLxDHxQ_S): New.
23765 (mve_insn): Add vqdmladh, vqdmladhx, vqdmlsdh, vqdmlsdhx,
23766 vqrdmladh, vqrdmladhx, vqrdmlsdh, vqrdmlsdhx.
23767 (supf): Add VQDMLADHQ_S, VQDMLADHXQ_S, VQDMLSDHQ_S, VQDMLSDHXQ_S,
23768 VQRDMLADHQ_S,VQRDMLADHXQ_S, VQRDMLSDHQ_S, VQRDMLSDHXQ_S.
23769 * config/arm/mve.md (mve_vqrdmladhq_s<mode>)
23770 (mve_vqrdmladhxq_s<mode>, mve_vqrdmlsdhq_s<mode>)
23771 (mve_vqrdmlsdhxq_s<mode>, mve_vqdmlsdhxq_s<mode>)
23772 (mve_vqdmlsdhq_s<mode>, mve_vqdmladhxq_s<mode>)
23773 (mve_vqdmladhq_s<mode>): Merge into ...
23774 (@mve_<mve_insn>q_<supf><mode>): ... this.
23776 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23778 * config/arm/arm-mve-builtins-shapes.cc (ternary): New.
23779 * config/arm/arm-mve-builtins-shapes.h (ternary): New.
23781 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23783 * config/arm/arm-mve-builtins-base.cc (vmlaldavaq, vmlaldavaxq)
23784 (vmlsldavaq, vmlsldavaxq): New.
23785 * config/arm/arm-mve-builtins-base.def (vmlaldavaq, vmlaldavaxq)
23786 (vmlsldavaq, vmlsldavaxq): New.
23787 * config/arm/arm-mve-builtins-base.h (vmlaldavaq, vmlaldavaxq)
23788 (vmlsldavaq, vmlsldavaxq): New.
23789 * config/arm/arm_mve.h (vmlaldavaq): Remove.
23790 (vmlaldavaxq): Remove.
23791 (vmlsldavaq): Remove.
23792 (vmlsldavaxq): Remove.
23793 (vmlaldavaq_p): Remove.
23794 (vmlaldavaxq_p): Remove.
23795 (vmlsldavaq_p): Remove.
23796 (vmlsldavaxq_p): Remove.
23797 (vmlaldavaq_s16): Remove.
23798 (vmlaldavaxq_s16): Remove.
23799 (vmlsldavaq_s16): Remove.
23800 (vmlsldavaxq_s16): Remove.
23801 (vmlaldavaq_u16): Remove.
23802 (vmlaldavaq_s32): Remove.
23803 (vmlaldavaxq_s32): Remove.
23804 (vmlsldavaq_s32): Remove.
23805 (vmlsldavaxq_s32): Remove.
23806 (vmlaldavaq_u32): Remove.
23807 (vmlaldavaq_p_s32): Remove.
23808 (vmlaldavaq_p_s16): Remove.
23809 (vmlaldavaq_p_u32): Remove.
23810 (vmlaldavaq_p_u16): Remove.
23811 (vmlaldavaxq_p_s32): Remove.
23812 (vmlaldavaxq_p_s16): Remove.
23813 (vmlsldavaq_p_s32): Remove.
23814 (vmlsldavaq_p_s16): Remove.
23815 (vmlsldavaxq_p_s32): Remove.
23816 (vmlsldavaxq_p_s16): Remove.
23817 (__arm_vmlaldavaq_s16): Remove.
23818 (__arm_vmlaldavaxq_s16): Remove.
23819 (__arm_vmlsldavaq_s16): Remove.
23820 (__arm_vmlsldavaxq_s16): Remove.
23821 (__arm_vmlaldavaq_u16): Remove.
23822 (__arm_vmlaldavaq_s32): Remove.
23823 (__arm_vmlaldavaxq_s32): Remove.
23824 (__arm_vmlsldavaq_s32): Remove.
23825 (__arm_vmlsldavaxq_s32): Remove.
23826 (__arm_vmlaldavaq_u32): Remove.
23827 (__arm_vmlaldavaq_p_s32): Remove.
23828 (__arm_vmlaldavaq_p_s16): Remove.
23829 (__arm_vmlaldavaq_p_u32): Remove.
23830 (__arm_vmlaldavaq_p_u16): Remove.
23831 (__arm_vmlaldavaxq_p_s32): Remove.
23832 (__arm_vmlaldavaxq_p_s16): Remove.
23833 (__arm_vmlsldavaq_p_s32): Remove.
23834 (__arm_vmlsldavaq_p_s16): Remove.
23835 (__arm_vmlsldavaxq_p_s32): Remove.
23836 (__arm_vmlsldavaxq_p_s16): Remove.
23837 (__arm_vmlaldavaq): Remove.
23838 (__arm_vmlaldavaxq): Remove.
23839 (__arm_vmlsldavaq): Remove.
23840 (__arm_vmlsldavaxq): Remove.
23841 (__arm_vmlaldavaq_p): Remove.
23842 (__arm_vmlaldavaxq_p): Remove.
23843 (__arm_vmlsldavaq_p): Remove.
23844 (__arm_vmlsldavaxq_p): Remove.
23846 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23848 * config/arm/iterators.md (MVE_VMLxLDAVAxQ, MVE_VMLxLDAVAxQ_P):
23850 (mve_insn): Add vmlaldava, vmlaldavax, vmlsldava, vmlsldavax.
23851 (supf): Add VMLALDAVAXQ_P_S, VMLALDAVAXQ_S, VMLSLDAVAQ_P_S,
23852 VMLSLDAVAQ_S, VMLSLDAVAXQ_P_S, VMLSLDAVAXQ_S.
23853 * config/arm/mve.md (mve_vmlaldavaq_<supf><mode>)
23854 (mve_vmlsldavaq_s<mode>, mve_vmlsldavaxq_s<mode>)
23855 (mve_vmlaldavaxq_s<mode>): Merge into ...
23856 (@mve_<mve_insn>q_<supf><mode>): ... this.
23857 (mve_vmlaldavaq_p_<supf><mode>, mve_vmlaldavaxq_p_<supf><mode>)
23858 (mve_vmlsldavaq_p_s<mode>, mve_vmlsldavaxq_p_s<mode>): Merge into
23860 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
23862 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23864 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int64): New.
23865 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int64): New.
23867 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23869 * config/arm/arm-mve-builtins-base.cc (vrmlaldavhq, vrmlaldavhxq)
23870 (vrmlsldavhq, vrmlsldavhxq): New.
23871 * config/arm/arm-mve-builtins-base.def (vrmlaldavhq, vrmlaldavhxq)
23872 (vrmlsldavhq, vrmlsldavhxq): New.
23873 * config/arm/arm-mve-builtins-base.h (vrmlaldavhq, vrmlaldavhxq)
23874 (vrmlsldavhq, vrmlsldavhxq): New.
23875 * config/arm/arm-mve-builtins-functions.h
23876 (unspec_mve_function_exact_insn_pred_p): Handle vrmlaldavhq,
23877 vrmlaldavhxq, vrmlsldavhq, vrmlsldavhxq.
23878 * config/arm/arm_mve.h (vrmlaldavhq): Remove.
23879 (vrmlsldavhxq): Remove.
23880 (vrmlsldavhq): Remove.
23881 (vrmlaldavhxq): Remove.
23882 (vrmlaldavhq_p): Remove.
23883 (vrmlaldavhxq_p): Remove.
23884 (vrmlsldavhq_p): Remove.
23885 (vrmlsldavhxq_p): Remove.
23886 (vrmlaldavhq_u32): Remove.
23887 (vrmlsldavhxq_s32): Remove.
23888 (vrmlsldavhq_s32): Remove.
23889 (vrmlaldavhxq_s32): Remove.
23890 (vrmlaldavhq_s32): Remove.
23891 (vrmlaldavhq_p_s32): Remove.
23892 (vrmlaldavhxq_p_s32): Remove.
23893 (vrmlsldavhq_p_s32): Remove.
23894 (vrmlsldavhxq_p_s32): Remove.
23895 (vrmlaldavhq_p_u32): Remove.
23896 (__arm_vrmlaldavhq_u32): Remove.
23897 (__arm_vrmlsldavhxq_s32): Remove.
23898 (__arm_vrmlsldavhq_s32): Remove.
23899 (__arm_vrmlaldavhxq_s32): Remove.
23900 (__arm_vrmlaldavhq_s32): Remove.
23901 (__arm_vrmlaldavhq_p_s32): Remove.
23902 (__arm_vrmlaldavhxq_p_s32): Remove.
23903 (__arm_vrmlsldavhq_p_s32): Remove.
23904 (__arm_vrmlsldavhxq_p_s32): Remove.
23905 (__arm_vrmlaldavhq_p_u32): Remove.
23906 (__arm_vrmlaldavhq): Remove.
23907 (__arm_vrmlsldavhxq): Remove.
23908 (__arm_vrmlsldavhq): Remove.
23909 (__arm_vrmlaldavhxq): Remove.
23910 (__arm_vrmlaldavhq_p): Remove.
23911 (__arm_vrmlaldavhxq_p): Remove.
23912 (__arm_vrmlsldavhq_p): Remove.
23913 (__arm_vrmlsldavhxq_p): Remove.
23915 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23917 * config/arm/iterators.md (MVE_VRMLxLDAVxQ, MVE_VRMLxLDAVHxQ_P):
23919 (mve_insn): Add vrmlaldavh, vrmlaldavhx, vrmlsldavh, vrmlsldavhx.
23920 (supf): Add VRMLALDAVHXQ_P_S, VRMLALDAVHXQ_S, VRMLSLDAVHQ_P_S,
23921 VRMLSLDAVHQ_S, VRMLSLDAVHXQ_P_S, VRMLSLDAVHXQ_S.
23922 * config/arm/mve.md (mve_vrmlaldavhxq_sv4si)
23923 (mve_vrmlsldavhq_sv4si, mve_vrmlsldavhxq_sv4si)
23924 (mve_vrmlaldavhq_<supf>v4si): Merge into ...
23925 (@mve_<mve_insn>q_<supf>v4si): ... this.
23926 (mve_vrmlaldavhxq_p_sv4si, mve_vrmlsldavhq_p_sv4si)
23927 (mve_vrmlsldavhxq_p_sv4si, mve_vrmlaldavhq_p_<supf>v4si): Merge
23929 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
23931 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23933 * config/arm/arm-mve-builtins-base.cc (vmlaldavq, vmlaldavxq)
23934 (vmlsldavq, vmlsldavxq): New.
23935 * config/arm/arm-mve-builtins-base.def (vmlaldavq, vmlaldavxq)
23936 (vmlsldavq, vmlsldavxq): New.
23937 * config/arm/arm-mve-builtins-base.h (vmlaldavq, vmlaldavxq)
23938 (vmlsldavq, vmlsldavxq): New.
23939 * config/arm/arm_mve.h (vmlaldavq): Remove.
23940 (vmlsldavxq): Remove.
23941 (vmlsldavq): Remove.
23942 (vmlaldavxq): Remove.
23943 (vmlaldavq_p): Remove.
23944 (vmlaldavxq_p): Remove.
23945 (vmlsldavq_p): Remove.
23946 (vmlsldavxq_p): Remove.
23947 (vmlaldavq_u16): Remove.
23948 (vmlsldavxq_s16): Remove.
23949 (vmlsldavq_s16): Remove.
23950 (vmlaldavxq_s16): Remove.
23951 (vmlaldavq_s16): Remove.
23952 (vmlaldavq_u32): Remove.
23953 (vmlsldavxq_s32): Remove.
23954 (vmlsldavq_s32): Remove.
23955 (vmlaldavxq_s32): Remove.
23956 (vmlaldavq_s32): Remove.
23957 (vmlaldavq_p_s16): Remove.
23958 (vmlaldavxq_p_s16): Remove.
23959 (vmlsldavq_p_s16): Remove.
23960 (vmlsldavxq_p_s16): Remove.
23961 (vmlaldavq_p_u16): Remove.
23962 (vmlaldavq_p_s32): Remove.
23963 (vmlaldavxq_p_s32): Remove.
23964 (vmlsldavq_p_s32): Remove.
23965 (vmlsldavxq_p_s32): Remove.
23966 (vmlaldavq_p_u32): Remove.
23967 (__arm_vmlaldavq_u16): Remove.
23968 (__arm_vmlsldavxq_s16): Remove.
23969 (__arm_vmlsldavq_s16): Remove.
23970 (__arm_vmlaldavxq_s16): Remove.
23971 (__arm_vmlaldavq_s16): Remove.
23972 (__arm_vmlaldavq_u32): Remove.
23973 (__arm_vmlsldavxq_s32): Remove.
23974 (__arm_vmlsldavq_s32): Remove.
23975 (__arm_vmlaldavxq_s32): Remove.
23976 (__arm_vmlaldavq_s32): Remove.
23977 (__arm_vmlaldavq_p_s16): Remove.
23978 (__arm_vmlaldavxq_p_s16): Remove.
23979 (__arm_vmlsldavq_p_s16): Remove.
23980 (__arm_vmlsldavxq_p_s16): Remove.
23981 (__arm_vmlaldavq_p_u16): Remove.
23982 (__arm_vmlaldavq_p_s32): Remove.
23983 (__arm_vmlaldavxq_p_s32): Remove.
23984 (__arm_vmlsldavq_p_s32): Remove.
23985 (__arm_vmlsldavxq_p_s32): Remove.
23986 (__arm_vmlaldavq_p_u32): Remove.
23987 (__arm_vmlaldavq): Remove.
23988 (__arm_vmlsldavxq): Remove.
23989 (__arm_vmlsldavq): Remove.
23990 (__arm_vmlaldavxq): Remove.
23991 (__arm_vmlaldavq_p): Remove.
23992 (__arm_vmlaldavxq_p): Remove.
23993 (__arm_vmlsldavq_p): Remove.
23994 (__arm_vmlsldavxq_p): Remove.
23996 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
23998 * config/arm/iterators.md (MVE_VMLxLDAVxQ, MVE_VMLxLDAVxQ_P): New.
23999 (mve_insn): Add vmlaldav, vmlaldavx, vmlsldav, vmlsldavx.
24000 (supf): Add VMLALDAVXQ_S, VMLSLDAVQ_S, VMLSLDAVXQ_S,
24001 VMLALDAVXQ_P_S, VMLSLDAVQ_P_S, VMLSLDAVXQ_P_S.
24002 * config/arm/mve.md (mve_vmlaldavq_<supf><mode>)
24003 (mve_vmlaldavxq_s<mode>, mve_vmlsldavq_s<mode>)
24004 (mve_vmlsldavxq_s<mode>): Merge into ...
24005 (@mve_<mve_insn>q_<supf><mode>): ... this.
24006 (mve_vmlaldavq_p_<supf><mode>, mve_vmlaldavxq_p_s<mode>)
24007 (mve_vmlsldavq_p_s<mode>, mve_vmlsldavxq_p_s<mode>): Merge into
24009 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24011 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24013 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int64): New.
24014 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int64): New.
24016 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24018 * config/arm/arm-mve-builtins-base.cc (vabavq): New.
24019 * config/arm/arm-mve-builtins-base.def (vabavq): New.
24020 * config/arm/arm-mve-builtins-base.h (vabavq): New.
24021 * config/arm/arm_mve.h (vabavq): Remove.
24022 (vabavq_p): Remove.
24023 (vabavq_s8): Remove.
24024 (vabavq_s16): Remove.
24025 (vabavq_s32): Remove.
24026 (vabavq_u8): Remove.
24027 (vabavq_u16): Remove.
24028 (vabavq_u32): Remove.
24029 (vabavq_p_s8): Remove.
24030 (vabavq_p_u8): Remove.
24031 (vabavq_p_s16): Remove.
24032 (vabavq_p_u16): Remove.
24033 (vabavq_p_s32): Remove.
24034 (vabavq_p_u32): Remove.
24035 (__arm_vabavq_s8): Remove.
24036 (__arm_vabavq_s16): Remove.
24037 (__arm_vabavq_s32): Remove.
24038 (__arm_vabavq_u8): Remove.
24039 (__arm_vabavq_u16): Remove.
24040 (__arm_vabavq_u32): Remove.
24041 (__arm_vabavq_p_s8): Remove.
24042 (__arm_vabavq_p_u8): Remove.
24043 (__arm_vabavq_p_s16): Remove.
24044 (__arm_vabavq_p_u16): Remove.
24045 (__arm_vabavq_p_s32): Remove.
24046 (__arm_vabavq_p_u32): Remove.
24047 (__arm_vabavq): Remove.
24048 (__arm_vabavq_p): Remove.
24050 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24052 * config/arm/iterators.md (mve_insn): Add vabav.
24053 * config/arm/mve.md (mve_vabavq_<supf><mode>): Rename into ...
24054 (@mve_<mve_insn>q_<supf><mode>): ... this,.
24055 (mve_vabavq_p_<supf><mode>): Rename into ...
24056 (@mve_<mve_insn>q_p_<supf><mode>): ... this,.
24058 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24060 * config/arm/arm-mve-builtins-base.cc (vmladavaxq, vmladavaq)
24061 (vmlsdavaq, vmlsdavaxq): New.
24062 * config/arm/arm-mve-builtins-base.def (vmladavaxq, vmladavaq)
24063 (vmlsdavaq, vmlsdavaxq): New.
24064 * config/arm/arm-mve-builtins-base.h (vmladavaxq, vmladavaq)
24065 (vmlsdavaq, vmlsdavaxq): New.
24066 * config/arm/arm_mve.h (vmladavaq): Remove.
24067 (vmlsdavaxq): Remove.
24068 (vmlsdavaq): Remove.
24069 (vmladavaxq): Remove.
24070 (vmladavaq_p): Remove.
24071 (vmladavaxq_p): Remove.
24072 (vmlsdavaq_p): Remove.
24073 (vmlsdavaxq_p): Remove.
24074 (vmladavaq_u8): Remove.
24075 (vmlsdavaxq_s8): Remove.
24076 (vmlsdavaq_s8): Remove.
24077 (vmladavaxq_s8): Remove.
24078 (vmladavaq_s8): Remove.
24079 (vmladavaq_u16): Remove.
24080 (vmlsdavaxq_s16): Remove.
24081 (vmlsdavaq_s16): Remove.
24082 (vmladavaxq_s16): Remove.
24083 (vmladavaq_s16): Remove.
24084 (vmladavaq_u32): Remove.
24085 (vmlsdavaxq_s32): Remove.
24086 (vmlsdavaq_s32): Remove.
24087 (vmladavaxq_s32): Remove.
24088 (vmladavaq_s32): Remove.
24089 (vmladavaq_p_s8): Remove.
24090 (vmladavaq_p_s32): Remove.
24091 (vmladavaq_p_s16): Remove.
24092 (vmladavaq_p_u8): Remove.
24093 (vmladavaq_p_u32): Remove.
24094 (vmladavaq_p_u16): Remove.
24095 (vmladavaxq_p_s8): Remove.
24096 (vmladavaxq_p_s32): Remove.
24097 (vmladavaxq_p_s16): Remove.
24098 (vmlsdavaq_p_s8): Remove.
24099 (vmlsdavaq_p_s32): Remove.
24100 (vmlsdavaq_p_s16): Remove.
24101 (vmlsdavaxq_p_s8): Remove.
24102 (vmlsdavaxq_p_s32): Remove.
24103 (vmlsdavaxq_p_s16): Remove.
24104 (__arm_vmladavaq_u8): Remove.
24105 (__arm_vmlsdavaxq_s8): Remove.
24106 (__arm_vmlsdavaq_s8): Remove.
24107 (__arm_vmladavaxq_s8): Remove.
24108 (__arm_vmladavaq_s8): Remove.
24109 (__arm_vmladavaq_u16): Remove.
24110 (__arm_vmlsdavaxq_s16): Remove.
24111 (__arm_vmlsdavaq_s16): Remove.
24112 (__arm_vmladavaxq_s16): Remove.
24113 (__arm_vmladavaq_s16): Remove.
24114 (__arm_vmladavaq_u32): Remove.
24115 (__arm_vmlsdavaxq_s32): Remove.
24116 (__arm_vmlsdavaq_s32): Remove.
24117 (__arm_vmladavaxq_s32): Remove.
24118 (__arm_vmladavaq_s32): Remove.
24119 (__arm_vmladavaq_p_s8): Remove.
24120 (__arm_vmladavaq_p_s32): Remove.
24121 (__arm_vmladavaq_p_s16): Remove.
24122 (__arm_vmladavaq_p_u8): Remove.
24123 (__arm_vmladavaq_p_u32): Remove.
24124 (__arm_vmladavaq_p_u16): Remove.
24125 (__arm_vmladavaxq_p_s8): Remove.
24126 (__arm_vmladavaxq_p_s32): Remove.
24127 (__arm_vmladavaxq_p_s16): Remove.
24128 (__arm_vmlsdavaq_p_s8): Remove.
24129 (__arm_vmlsdavaq_p_s32): Remove.
24130 (__arm_vmlsdavaq_p_s16): Remove.
24131 (__arm_vmlsdavaxq_p_s8): Remove.
24132 (__arm_vmlsdavaxq_p_s32): Remove.
24133 (__arm_vmlsdavaxq_p_s16): Remove.
24134 (__arm_vmladavaq): Remove.
24135 (__arm_vmlsdavaxq): Remove.
24136 (__arm_vmlsdavaq): Remove.
24137 (__arm_vmladavaxq): Remove.
24138 (__arm_vmladavaq_p): Remove.
24139 (__arm_vmladavaxq_p): Remove.
24140 (__arm_vmlsdavaq_p): Remove.
24141 (__arm_vmlsdavaxq_p): Remove.
24143 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24145 * config/arm/arm-mve-builtins-shapes.cc (binary_acca_int32): New.
24146 * config/arm/arm-mve-builtins-shapes.h (binary_acca_int32): New.
24148 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24150 * config/arm/arm-mve-builtins-base.cc (vmladavq, vmladavxq)
24151 (vmlsdavq, vmlsdavxq): New.
24152 * config/arm/arm-mve-builtins-base.def (vmladavq, vmladavxq)
24153 (vmlsdavq, vmlsdavxq): New.
24154 * config/arm/arm-mve-builtins-base.h (vmladavq, vmladavxq)
24155 (vmlsdavq, vmlsdavxq): New.
24156 * config/arm/arm_mve.h (vmladavq): Remove.
24157 (vmlsdavxq): Remove.
24158 (vmlsdavq): Remove.
24159 (vmladavxq): Remove.
24160 (vmladavq_p): Remove.
24161 (vmlsdavxq_p): Remove.
24162 (vmlsdavq_p): Remove.
24163 (vmladavxq_p): Remove.
24164 (vmladavq_u8): Remove.
24165 (vmlsdavxq_s8): Remove.
24166 (vmlsdavq_s8): Remove.
24167 (vmladavxq_s8): Remove.
24168 (vmladavq_s8): Remove.
24169 (vmladavq_u16): Remove.
24170 (vmlsdavxq_s16): Remove.
24171 (vmlsdavq_s16): Remove.
24172 (vmladavxq_s16): Remove.
24173 (vmladavq_s16): Remove.
24174 (vmladavq_u32): Remove.
24175 (vmlsdavxq_s32): Remove.
24176 (vmlsdavq_s32): Remove.
24177 (vmladavxq_s32): Remove.
24178 (vmladavq_s32): Remove.
24179 (vmladavq_p_u8): Remove.
24180 (vmlsdavxq_p_s8): Remove.
24181 (vmlsdavq_p_s8): Remove.
24182 (vmladavxq_p_s8): Remove.
24183 (vmladavq_p_s8): Remove.
24184 (vmladavq_p_u16): Remove.
24185 (vmlsdavxq_p_s16): Remove.
24186 (vmlsdavq_p_s16): Remove.
24187 (vmladavxq_p_s16): Remove.
24188 (vmladavq_p_s16): Remove.
24189 (vmladavq_p_u32): Remove.
24190 (vmlsdavxq_p_s32): Remove.
24191 (vmlsdavq_p_s32): Remove.
24192 (vmladavxq_p_s32): Remove.
24193 (vmladavq_p_s32): Remove.
24194 (__arm_vmladavq_u8): Remove.
24195 (__arm_vmlsdavxq_s8): Remove.
24196 (__arm_vmlsdavq_s8): Remove.
24197 (__arm_vmladavxq_s8): Remove.
24198 (__arm_vmladavq_s8): Remove.
24199 (__arm_vmladavq_u16): Remove.
24200 (__arm_vmlsdavxq_s16): Remove.
24201 (__arm_vmlsdavq_s16): Remove.
24202 (__arm_vmladavxq_s16): Remove.
24203 (__arm_vmladavq_s16): Remove.
24204 (__arm_vmladavq_u32): Remove.
24205 (__arm_vmlsdavxq_s32): Remove.
24206 (__arm_vmlsdavq_s32): Remove.
24207 (__arm_vmladavxq_s32): Remove.
24208 (__arm_vmladavq_s32): Remove.
24209 (__arm_vmladavq_p_u8): Remove.
24210 (__arm_vmlsdavxq_p_s8): Remove.
24211 (__arm_vmlsdavq_p_s8): Remove.
24212 (__arm_vmladavxq_p_s8): Remove.
24213 (__arm_vmladavq_p_s8): Remove.
24214 (__arm_vmladavq_p_u16): Remove.
24215 (__arm_vmlsdavxq_p_s16): Remove.
24216 (__arm_vmlsdavq_p_s16): Remove.
24217 (__arm_vmladavxq_p_s16): Remove.
24218 (__arm_vmladavq_p_s16): Remove.
24219 (__arm_vmladavq_p_u32): Remove.
24220 (__arm_vmlsdavxq_p_s32): Remove.
24221 (__arm_vmlsdavq_p_s32): Remove.
24222 (__arm_vmladavxq_p_s32): Remove.
24223 (__arm_vmladavq_p_s32): Remove.
24224 (__arm_vmladavq): Remove.
24225 (__arm_vmlsdavxq): Remove.
24226 (__arm_vmlsdavq): Remove.
24227 (__arm_vmladavxq): Remove.
24228 (__arm_vmladavq_p): Remove.
24229 (__arm_vmlsdavxq_p): Remove.
24230 (__arm_vmlsdavq_p): Remove.
24231 (__arm_vmladavxq_p): Remove.
24233 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24235 * config/arm/iterators.md (MVE_VMLxDAVQ, MVE_VMLxDAVQ_P)
24236 (MVE_VMLxDAVAQ, MVE_VMLxDAVAQ_P): New.
24237 (mve_insn): Add vmladava, vmladavax, vmladav, vmladavx, vmlsdava,
24238 vmlsdavax, vmlsdav, vmlsdavx.
24239 (supf): Add VMLADAVAXQ_P_S, VMLADAVAXQ_S, VMLADAVXQ_P_S,
24240 VMLADAVXQ_S, VMLSDAVAQ_P_S, VMLSDAVAQ_S, VMLSDAVAXQ_P_S,
24241 VMLSDAVAXQ_S, VMLSDAVQ_P_S, VMLSDAVQ_S, VMLSDAVXQ_P_S,
24243 * config/arm/mve.md (mve_vmladavq_<supf><mode>)
24244 (mve_vmladavxq_s<mode>, mve_vmlsdavq_s<mode>)
24245 (mve_vmlsdavxq_s<mode>): Merge into ...
24246 (@mve_<mve_insn>q_<supf><mode>): ... this.
24247 (mve_vmlsdavaq_s<mode>, mve_vmladavaxq_s<mode>)
24248 (mve_vmlsdavaxq_s<mode>, mve_vmladavaq_<supf><mode>): Merge into
24250 (@mve_<mve_insn>q_<supf><mode>): ... this.
24251 (mve_vmladavq_p_<supf><mode>, mve_vmladavxq_p_s<mode>)
24252 (mve_vmlsdavq_p_s<mode>, mve_vmlsdavxq_p_s<mode>): Merge into ...
24253 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24254 (mve_vmladavaq_p_<supf><mode>, mve_vmladavaxq_p_s<mode>)
24255 (mve_vmlsdavaq_p_s<mode>, mve_vmlsdavaxq_p_s<mode>): Merge into
24257 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24259 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24261 * config/arm/arm-mve-builtins-shapes.cc (binary_acc_int32): New.
24262 * config/arm/arm-mve-builtins-shapes.h (binary_acc_int32): New.
24264 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24266 * config/arm/arm-mve-builtins-base.cc (vaddlvaq): New.
24267 * config/arm/arm-mve-builtins-base.def (vaddlvaq): New.
24268 * config/arm/arm-mve-builtins-base.h (vaddlvaq): New.
24269 * config/arm/arm_mve.h (vaddlvaq): Remove.
24270 (vaddlvaq_p): Remove.
24271 (vaddlvaq_u32): Remove.
24272 (vaddlvaq_s32): Remove.
24273 (vaddlvaq_p_s32): Remove.
24274 (vaddlvaq_p_u32): Remove.
24275 (__arm_vaddlvaq_u32): Remove.
24276 (__arm_vaddlvaq_s32): Remove.
24277 (__arm_vaddlvaq_p_s32): Remove.
24278 (__arm_vaddlvaq_p_u32): Remove.
24279 (__arm_vaddlvaq): Remove.
24280 (__arm_vaddlvaq_p): Remove.
24282 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24284 * config/arm/arm-mve-builtins-shapes.cc (unary_widen_acc): New.
24285 * config/arm/arm-mve-builtins-shapes.h (unary_widen_acc): New.
24287 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24289 * config/arm/iterators.md (mve_insn): Add vaddlva.
24290 * config/arm/mve.md (mve_vaddlvaq_<supf>v4si): Rename into ...
24291 (@mve_<mve_insn>q_<supf>v4si): ... this.
24292 (mve_vaddlvaq_p_<supf>v4si): Rename into ...
24293 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24295 2023-05-11 Uros Bizjak <ubizjak@gmail.com>
24298 * config/i386/i386.cc (ix86_widen_mult_cost):
24299 Handle V4HImode and V2SImode.
24301 2023-05-11 Andrew Pinski <apinski@marvell.com>
24303 * tree-ssa-dce.cc (simple_dce_from_worklist): For ssa names
24304 defined by a phi node with more than one uses, allow for the
24305 only uses are in that same defining statement.
24307 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24309 * config/riscv/riscv.cc (riscv_const_insns): Add permissible
24312 2023-05-11 Pan Li <pan2.li@intel.com>
24314 * config/riscv/vector.md: Add comments for simplifying to vmset.
24316 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24318 * config/riscv/autovec.md (<optab><mode>3): Add scalar shift
24320 (v<optab><mode>3): Add vector shift pattern.
24321 * config/riscv/vector-iterators.md: New iterator.
24323 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24325 * config/riscv/autovec.md: Use renamed functions.
24326 * config/riscv/riscv-protos.h (emit_vlmax_op): Rename.
24327 (emit_vlmax_reg_op): To this.
24328 (emit_nonvlmax_op): Rename.
24329 (emit_len_op): To this.
24330 (emit_nonvlmax_binop): Rename.
24331 (emit_len_binop): To this.
24332 * config/riscv/riscv-v.cc (emit_pred_op): Add default parameter.
24333 (emit_pred_binop): Remove vlmax_p.
24334 (emit_vlmax_op): Rename.
24335 (emit_vlmax_reg_op): To this.
24336 (emit_nonvlmax_op): Rename.
24337 (emit_len_op): To this.
24338 (emit_nonvlmax_binop): Rename.
24339 (emit_len_binop): To this.
24340 (sew64_scalar_helper): Use renamed functions.
24341 (expand_tuple_move): Use renamed functions.
24342 * config/riscv/riscv.cc (vector_zero_call_used_regs): Use
24344 * config/riscv/vector.md: Use renamed functions.
24346 2023-05-11 Robin Dapp <rdapp@ventanamicro.com>
24347 Michael Collison <collison@rivosinc.com>
24349 * config/riscv/autovec.md (<optab><mode>3): Add integer binops.
24350 * config/riscv/riscv-protos.h (emit_nonvlmax_binop): Declare.
24351 * config/riscv/riscv-v.cc (emit_pred_op): New function.
24352 (set_expander_dest_and_mask): New function.
24353 (emit_pred_binop): New function.
24354 (emit_nonvlmax_binop): New function.
24356 2023-05-11 Pan Li <pan2.li@intel.com>
24358 * cfgloopmanip.cc (create_empty_loop_on_edge): Add PLUS_EXPR.
24359 * gimple-loop-interchange.cc
24360 (tree_loop_interchange::map_inductions_to_loop): Ditto.
24361 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Ditto.
24362 * tree-ssa-loop-ivopts.cc (create_new_iv): Ditto.
24363 * tree-ssa-loop-manip.cc (create_iv): Ditto.
24364 (tree_transform_and_unroll_loop): Ditto.
24365 (canonicalize_loop_ivs): Ditto.
24366 * tree-ssa-loop-manip.h (create_iv): Ditto.
24367 * tree-vect-data-refs.cc (vect_create_data_ref_ptr): Ditto.
24368 * tree-vect-loop-manip.cc (vect_set_loop_controls_directly):
24370 (vect_set_loop_condition_normal): Ditto.
24371 * tree-vect-loop.cc (vect_create_epilog_for_reduction): Ditto.
24372 * tree-vect-stmts.cc (vectorizable_store): Ditto.
24373 (vectorizable_load): Ditto.
24375 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24377 * config/arm/arm-mve-builtins-base.cc (vmovlbq, vmovltq): New.
24378 * config/arm/arm-mve-builtins-base.def (vmovlbq, vmovltq): New.
24379 * config/arm/arm-mve-builtins-base.h (vmovlbq, vmovltq): New.
24380 * config/arm/arm_mve.h (vmovlbq): Remove.
24382 (vmovlbq_m): Remove.
24383 (vmovltq_m): Remove.
24384 (vmovlbq_x): Remove.
24385 (vmovltq_x): Remove.
24386 (vmovlbq_s8): Remove.
24387 (vmovlbq_s16): Remove.
24388 (vmovltq_s8): Remove.
24389 (vmovltq_s16): Remove.
24390 (vmovltq_u8): Remove.
24391 (vmovltq_u16): Remove.
24392 (vmovlbq_u8): Remove.
24393 (vmovlbq_u16): Remove.
24394 (vmovlbq_m_s8): Remove.
24395 (vmovltq_m_s8): Remove.
24396 (vmovlbq_m_u8): Remove.
24397 (vmovltq_m_u8): Remove.
24398 (vmovlbq_m_s16): Remove.
24399 (vmovltq_m_s16): Remove.
24400 (vmovlbq_m_u16): Remove.
24401 (vmovltq_m_u16): Remove.
24402 (vmovlbq_x_s8): Remove.
24403 (vmovlbq_x_s16): Remove.
24404 (vmovlbq_x_u8): Remove.
24405 (vmovlbq_x_u16): Remove.
24406 (vmovltq_x_s8): Remove.
24407 (vmovltq_x_s16): Remove.
24408 (vmovltq_x_u8): Remove.
24409 (vmovltq_x_u16): Remove.
24410 (__arm_vmovlbq_s8): Remove.
24411 (__arm_vmovlbq_s16): Remove.
24412 (__arm_vmovltq_s8): Remove.
24413 (__arm_vmovltq_s16): Remove.
24414 (__arm_vmovltq_u8): Remove.
24415 (__arm_vmovltq_u16): Remove.
24416 (__arm_vmovlbq_u8): Remove.
24417 (__arm_vmovlbq_u16): Remove.
24418 (__arm_vmovlbq_m_s8): Remove.
24419 (__arm_vmovltq_m_s8): Remove.
24420 (__arm_vmovlbq_m_u8): Remove.
24421 (__arm_vmovltq_m_u8): Remove.
24422 (__arm_vmovlbq_m_s16): Remove.
24423 (__arm_vmovltq_m_s16): Remove.
24424 (__arm_vmovlbq_m_u16): Remove.
24425 (__arm_vmovltq_m_u16): Remove.
24426 (__arm_vmovlbq_x_s8): Remove.
24427 (__arm_vmovlbq_x_s16): Remove.
24428 (__arm_vmovlbq_x_u8): Remove.
24429 (__arm_vmovlbq_x_u16): Remove.
24430 (__arm_vmovltq_x_s8): Remove.
24431 (__arm_vmovltq_x_s16): Remove.
24432 (__arm_vmovltq_x_u8): Remove.
24433 (__arm_vmovltq_x_u16): Remove.
24434 (__arm_vmovlbq): Remove.
24435 (__arm_vmovltq): Remove.
24436 (__arm_vmovlbq_m): Remove.
24437 (__arm_vmovltq_m): Remove.
24438 (__arm_vmovlbq_x): Remove.
24439 (__arm_vmovltq_x): Remove.
24441 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24443 * config/arm/arm-mve-builtins-shapes.cc (unary_widen): New.
24444 * config/arm/arm-mve-builtins-shapes.h (unary_widen): New.
24446 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24448 * config/arm/iterators.md (mve_insn): Add vmovlb, vmovlt.
24449 (VMOVLBQ, VMOVLTQ): Merge into ...
24450 (VMOVLxQ): ... this.
24451 (VMOVLTQ_M, VMOVLBQ_M): Merge into ...
24452 (VMOVLxQ_M): ... this.
24453 * config/arm/mve.md (mve_vmovltq_<supf><mode>)
24454 (mve_vmovlbq_<supf><mode>): Merge into ...
24455 (@mve_<mve_insn>q_<supf><mode>): ... this.
24456 (mve_vmovlbq_m_<supf><mode>, mve_vmovltq_m_<supf><mode>): Merge
24458 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
24460 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24462 * config/arm/arm-mve-builtins-base.cc (vaddlvq): New.
24463 * config/arm/arm-mve-builtins-base.def (vaddlvq): New.
24464 * config/arm/arm-mve-builtins-base.h (vaddlvq): New.
24465 * config/arm/arm-mve-builtins-functions.h
24466 (unspec_mve_function_exact_insn_pred_p): Handle vaddlvq.
24467 * config/arm/arm_mve.h (vaddlvq): Remove.
24468 (vaddlvq_p): Remove.
24469 (vaddlvq_s32): Remove.
24470 (vaddlvq_u32): Remove.
24471 (vaddlvq_p_s32): Remove.
24472 (vaddlvq_p_u32): Remove.
24473 (__arm_vaddlvq_s32): Remove.
24474 (__arm_vaddlvq_u32): Remove.
24475 (__arm_vaddlvq_p_s32): Remove.
24476 (__arm_vaddlvq_p_u32): Remove.
24477 (__arm_vaddlvq): Remove.
24478 (__arm_vaddlvq_p): Remove.
24480 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24482 * config/arm/iterators.md (mve_insn): Add vaddlv.
24483 * config/arm/mve.md (mve_vaddlvq_<supf>v4si): Rename into ...
24484 (@mve_<mve_insn>q_<supf>v4si): ... this.
24485 (mve_vaddlvq_p_<supf>v4si): Rename into ...
24486 (@mve_<mve_insn>q_p_<supf>v4si): ... this.
24488 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24490 * config/arm/arm-mve-builtins-shapes.cc (unary_acc): New.
24491 * config/arm/arm-mve-builtins-shapes.h (unary_acc): New.
24493 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24495 * config/arm/arm-mve-builtins-base.cc (vaddvaq): New.
24496 * config/arm/arm-mve-builtins-base.def (vaddvaq): New.
24497 * config/arm/arm-mve-builtins-base.h (vaddvaq): New.
24498 * config/arm/arm_mve.h (vaddvaq): Remove.
24499 (vaddvaq_p): Remove.
24500 (vaddvaq_u8): Remove.
24501 (vaddvaq_s8): Remove.
24502 (vaddvaq_u16): Remove.
24503 (vaddvaq_s16): Remove.
24504 (vaddvaq_u32): Remove.
24505 (vaddvaq_s32): Remove.
24506 (vaddvaq_p_u8): Remove.
24507 (vaddvaq_p_s8): Remove.
24508 (vaddvaq_p_u16): Remove.
24509 (vaddvaq_p_s16): Remove.
24510 (vaddvaq_p_u32): Remove.
24511 (vaddvaq_p_s32): Remove.
24512 (__arm_vaddvaq_u8): Remove.
24513 (__arm_vaddvaq_s8): Remove.
24514 (__arm_vaddvaq_u16): Remove.
24515 (__arm_vaddvaq_s16): Remove.
24516 (__arm_vaddvaq_u32): Remove.
24517 (__arm_vaddvaq_s32): Remove.
24518 (__arm_vaddvaq_p_u8): Remove.
24519 (__arm_vaddvaq_p_s8): Remove.
24520 (__arm_vaddvaq_p_u16): Remove.
24521 (__arm_vaddvaq_p_s16): Remove.
24522 (__arm_vaddvaq_p_u32): Remove.
24523 (__arm_vaddvaq_p_s32): Remove.
24524 (__arm_vaddvaq): Remove.
24525 (__arm_vaddvaq_p): Remove.
24527 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24529 * config/arm/arm-mve-builtins-shapes.cc (unary_int32_acc): New.
24530 * config/arm/arm-mve-builtins-shapes.h (unary_int32_acc): New.
24532 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24534 * config/arm/iterators.md (mve_insn): Add vaddva.
24535 * config/arm/mve.md (mve_vaddvaq_<supf><mode>): Rename into ...
24536 (@mve_<mve_insn>q_<supf><mode>): ... this.
24537 (mve_vaddvaq_p_<supf><mode>): Rename into ...
24538 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24540 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24542 * config/arm/arm-mve-builtins-base.cc (vaddvq): New.
24543 * config/arm/arm-mve-builtins-base.def (vaddvq): New.
24544 * config/arm/arm-mve-builtins-base.h (vaddvq): New.
24545 * config/arm/arm_mve.h (vaddvq): Remove.
24546 (vaddvq_p): Remove.
24547 (vaddvq_s8): Remove.
24548 (vaddvq_s16): Remove.
24549 (vaddvq_s32): Remove.
24550 (vaddvq_u8): Remove.
24551 (vaddvq_u16): Remove.
24552 (vaddvq_u32): Remove.
24553 (vaddvq_p_u8): Remove.
24554 (vaddvq_p_s8): Remove.
24555 (vaddvq_p_u16): Remove.
24556 (vaddvq_p_s16): Remove.
24557 (vaddvq_p_u32): Remove.
24558 (vaddvq_p_s32): Remove.
24559 (__arm_vaddvq_s8): Remove.
24560 (__arm_vaddvq_s16): Remove.
24561 (__arm_vaddvq_s32): Remove.
24562 (__arm_vaddvq_u8): Remove.
24563 (__arm_vaddvq_u16): Remove.
24564 (__arm_vaddvq_u32): Remove.
24565 (__arm_vaddvq_p_u8): Remove.
24566 (__arm_vaddvq_p_s8): Remove.
24567 (__arm_vaddvq_p_u16): Remove.
24568 (__arm_vaddvq_p_s16): Remove.
24569 (__arm_vaddvq_p_u32): Remove.
24570 (__arm_vaddvq_p_s32): Remove.
24571 (__arm_vaddvq): Remove.
24572 (__arm_vaddvq_p): Remove.
24574 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24576 * config/arm/arm-mve-builtins-shapes.cc (unary_int32): New.
24577 * config/arm/arm-mve-builtins-shapes.h (unary_int32): New.
24579 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24581 * config/arm/iterators.md (mve_insn): Add vaddv.
24582 * config/arm/mve.md (@mve_vaddvq_<supf><mode>): Rename into ...
24583 (@mve_<mve_insn>q_<supf><mode>): ... this.
24584 (mve_vaddvq_p_<supf><mode>): Rename into ...
24585 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
24586 * config/arm/vec-common.md: Use gen_mve_q instead of
24589 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24591 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N): New.
24593 * config/arm/arm-mve-builtins-base.def (vdupq): New.
24594 * config/arm/arm-mve-builtins-base.h: (vdupq): New.
24595 * config/arm/arm_mve.h (vdupq_n): Remove.
24597 (vdupq_n_f16): Remove.
24598 (vdupq_n_f32): Remove.
24599 (vdupq_n_s8): Remove.
24600 (vdupq_n_s16): Remove.
24601 (vdupq_n_s32): Remove.
24602 (vdupq_n_u8): Remove.
24603 (vdupq_n_u16): Remove.
24604 (vdupq_n_u32): Remove.
24605 (vdupq_m_n_u8): Remove.
24606 (vdupq_m_n_s8): Remove.
24607 (vdupq_m_n_u16): Remove.
24608 (vdupq_m_n_s16): Remove.
24609 (vdupq_m_n_u32): Remove.
24610 (vdupq_m_n_s32): Remove.
24611 (vdupq_m_n_f16): Remove.
24612 (vdupq_m_n_f32): Remove.
24613 (vdupq_x_n_s8): Remove.
24614 (vdupq_x_n_s16): Remove.
24615 (vdupq_x_n_s32): Remove.
24616 (vdupq_x_n_u8): Remove.
24617 (vdupq_x_n_u16): Remove.
24618 (vdupq_x_n_u32): Remove.
24619 (vdupq_x_n_f16): Remove.
24620 (vdupq_x_n_f32): Remove.
24621 (__arm_vdupq_n_s8): Remove.
24622 (__arm_vdupq_n_s16): Remove.
24623 (__arm_vdupq_n_s32): Remove.
24624 (__arm_vdupq_n_u8): Remove.
24625 (__arm_vdupq_n_u16): Remove.
24626 (__arm_vdupq_n_u32): Remove.
24627 (__arm_vdupq_m_n_u8): Remove.
24628 (__arm_vdupq_m_n_s8): Remove.
24629 (__arm_vdupq_m_n_u16): Remove.
24630 (__arm_vdupq_m_n_s16): Remove.
24631 (__arm_vdupq_m_n_u32): Remove.
24632 (__arm_vdupq_m_n_s32): Remove.
24633 (__arm_vdupq_x_n_s8): Remove.
24634 (__arm_vdupq_x_n_s16): Remove.
24635 (__arm_vdupq_x_n_s32): Remove.
24636 (__arm_vdupq_x_n_u8): Remove.
24637 (__arm_vdupq_x_n_u16): Remove.
24638 (__arm_vdupq_x_n_u32): Remove.
24639 (__arm_vdupq_n_f16): Remove.
24640 (__arm_vdupq_n_f32): Remove.
24641 (__arm_vdupq_m_n_f16): Remove.
24642 (__arm_vdupq_m_n_f32): Remove.
24643 (__arm_vdupq_x_n_f16): Remove.
24644 (__arm_vdupq_x_n_f32): Remove.
24645 (__arm_vdupq_n): Remove.
24646 (__arm_vdupq_m): Remove.
24648 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24650 * config/arm/arm-mve-builtins-shapes.cc (unary_n): New.
24651 * config/arm/arm-mve-builtins-shapes.h (unary_n): New.
24653 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24655 * config/arm/iterators.md (MVE_FP_M_N_VDUPQ_ONLY)
24656 (MVE_FP_N_VDUPQ_ONLY): New.
24657 (mve_insn): Add vdupq.
24658 * config/arm/mve.md (mve_vdupq_n_f<mode>): Rename into ...
24659 (@mve_<mve_insn>q_n_f<mode>): ... this.
24660 (mve_vdupq_n_<supf><mode>): Rename into ...
24661 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
24662 (mve_vdupq_m_n_<supf><mode>): Rename into ...
24663 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
24664 (mve_vdupq_m_n_f<mode>): Rename into ...
24665 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
24667 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24669 * config/arm/arm-mve-builtins-base.cc (vrev16q, vrev32q, vrev64q):
24671 * config/arm/arm-mve-builtins-base.def (vrev16q, vrev32q)
24673 * config/arm/arm-mve-builtins-base.h (vrev16q, vrev32q)
24675 * config/arm/arm_mve.h (vrev16q): Remove.
24678 (vrev64q_m): Remove.
24679 (vrev16q_m): Remove.
24680 (vrev32q_m): Remove.
24681 (vrev16q_x): Remove.
24682 (vrev32q_x): Remove.
24683 (vrev64q_x): Remove.
24684 (vrev64q_f16): Remove.
24685 (vrev64q_f32): Remove.
24686 (vrev32q_f16): Remove.
24687 (vrev16q_s8): Remove.
24688 (vrev32q_s8): Remove.
24689 (vrev32q_s16): Remove.
24690 (vrev64q_s8): Remove.
24691 (vrev64q_s16): Remove.
24692 (vrev64q_s32): Remove.
24693 (vrev64q_u8): Remove.
24694 (vrev64q_u16): Remove.
24695 (vrev64q_u32): Remove.
24696 (vrev32q_u8): Remove.
24697 (vrev32q_u16): Remove.
24698 (vrev16q_u8): Remove.
24699 (vrev64q_m_u8): Remove.
24700 (vrev64q_m_s8): Remove.
24701 (vrev64q_m_u16): Remove.
24702 (vrev64q_m_s16): Remove.
24703 (vrev64q_m_u32): Remove.
24704 (vrev64q_m_s32): Remove.
24705 (vrev16q_m_s8): Remove.
24706 (vrev32q_m_f16): Remove.
24707 (vrev16q_m_u8): Remove.
24708 (vrev32q_m_s8): Remove.
24709 (vrev64q_m_f16): Remove.
24710 (vrev32q_m_u8): Remove.
24711 (vrev32q_m_s16): Remove.
24712 (vrev64q_m_f32): Remove.
24713 (vrev32q_m_u16): Remove.
24714 (vrev16q_x_s8): Remove.
24715 (vrev16q_x_u8): Remove.
24716 (vrev32q_x_s8): Remove.
24717 (vrev32q_x_s16): Remove.
24718 (vrev32q_x_u8): Remove.
24719 (vrev32q_x_u16): Remove.
24720 (vrev64q_x_s8): Remove.
24721 (vrev64q_x_s16): Remove.
24722 (vrev64q_x_s32): Remove.
24723 (vrev64q_x_u8): Remove.
24724 (vrev64q_x_u16): Remove.
24725 (vrev64q_x_u32): Remove.
24726 (vrev32q_x_f16): Remove.
24727 (vrev64q_x_f16): Remove.
24728 (vrev64q_x_f32): Remove.
24729 (__arm_vrev16q_s8): Remove.
24730 (__arm_vrev32q_s8): Remove.
24731 (__arm_vrev32q_s16): Remove.
24732 (__arm_vrev64q_s8): Remove.
24733 (__arm_vrev64q_s16): Remove.
24734 (__arm_vrev64q_s32): Remove.
24735 (__arm_vrev64q_u8): Remove.
24736 (__arm_vrev64q_u16): Remove.
24737 (__arm_vrev64q_u32): Remove.
24738 (__arm_vrev32q_u8): Remove.
24739 (__arm_vrev32q_u16): Remove.
24740 (__arm_vrev16q_u8): Remove.
24741 (__arm_vrev64q_m_u8): Remove.
24742 (__arm_vrev64q_m_s8): Remove.
24743 (__arm_vrev64q_m_u16): Remove.
24744 (__arm_vrev64q_m_s16): Remove.
24745 (__arm_vrev64q_m_u32): Remove.
24746 (__arm_vrev64q_m_s32): Remove.
24747 (__arm_vrev16q_m_s8): Remove.
24748 (__arm_vrev16q_m_u8): Remove.
24749 (__arm_vrev32q_m_s8): Remove.
24750 (__arm_vrev32q_m_u8): Remove.
24751 (__arm_vrev32q_m_s16): Remove.
24752 (__arm_vrev32q_m_u16): Remove.
24753 (__arm_vrev16q_x_s8): Remove.
24754 (__arm_vrev16q_x_u8): Remove.
24755 (__arm_vrev32q_x_s8): Remove.
24756 (__arm_vrev32q_x_s16): Remove.
24757 (__arm_vrev32q_x_u8): Remove.
24758 (__arm_vrev32q_x_u16): Remove.
24759 (__arm_vrev64q_x_s8): Remove.
24760 (__arm_vrev64q_x_s16): Remove.
24761 (__arm_vrev64q_x_s32): Remove.
24762 (__arm_vrev64q_x_u8): Remove.
24763 (__arm_vrev64q_x_u16): Remove.
24764 (__arm_vrev64q_x_u32): Remove.
24765 (__arm_vrev64q_f16): Remove.
24766 (__arm_vrev64q_f32): Remove.
24767 (__arm_vrev32q_f16): Remove.
24768 (__arm_vrev32q_m_f16): Remove.
24769 (__arm_vrev64q_m_f16): Remove.
24770 (__arm_vrev64q_m_f32): Remove.
24771 (__arm_vrev32q_x_f16): Remove.
24772 (__arm_vrev64q_x_f16): Remove.
24773 (__arm_vrev64q_x_f32): Remove.
24774 (__arm_vrev16q): Remove.
24775 (__arm_vrev32q): Remove.
24776 (__arm_vrev64q): Remove.
24777 (__arm_vrev64q_m): Remove.
24778 (__arm_vrev16q_m): Remove.
24779 (__arm_vrev32q_m): Remove.
24780 (__arm_vrev16q_x): Remove.
24781 (__arm_vrev32q_x): Remove.
24782 (__arm_vrev64q_x): Remove.
24784 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24786 * config/arm/iterators.md (MVE_V8HF, MVE_V16QI)
24787 (MVE_FP_VREV64Q_ONLY, MVE_FP_M_VREV64Q_ONLY, MVE_FP_VREV32Q_ONLY)
24788 (MVE_FP_M_VREV32Q_ONLY): New iterators.
24789 (mve_insn): Add vrev16q, vrev32q, vrev64q.
24790 * config/arm/mve.md (mve_vrev64q_f<mode>): Rename into ...
24791 (@mve_<mve_insn>q_f<mode>): ... this
24792 (mve_vrev32q_fv8hf): Rename into @mve_<mve_insn>q_f<mode>.
24793 (mve_vrev64q_<supf><mode>): Rename into ...
24794 (@mve_<mve_insn>q_<supf><mode>): ... this.
24795 (mve_vrev32q_<supf><mode>): Rename into
24796 @mve_<mve_insn>q_<supf><mode>.
24797 (mve_vrev16q_<supf>v16qi): Rename into
24798 @mve_<mve_insn>q_<supf><mode>.
24799 (mve_vrev64q_m_<supf><mode>): Rename into
24800 @mve_<mve_insn>q_m_<supf><mode>.
24801 (mve_vrev32q_m_fv8hf): Rename into @mve_<mve_insn>q_m_f<mode>.
24802 (mve_vrev32q_m_<supf><mode>): Rename into
24803 @mve_<mve_insn>q_m_<supf><mode>.
24804 (mve_vrev64q_m_f<mode>): Rename into @mve_<mve_insn>q_m_f<mode>.
24805 (mve_vrev16q_m_<supf>v16qi): Rename into
24806 @mve_<mve_insn>q_m_<supf><mode>.
24808 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
24810 * config/arm/arm-mve-builtins-base.cc (vcmpeqq, vcmpneq, vcmpgeq)
24811 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24812 * config/arm/arm-mve-builtins-base.def (vcmpeqq, vcmpneq, vcmpgeq)
24813 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24814 * config/arm/arm-mve-builtins-base.h (vcmpeqq, vcmpneq, vcmpgeq)
24815 (vcmpgtq, vcmpleq, vcmpltq, vcmpcsq, vcmphiq): New.
24816 * config/arm/arm-mve-builtins-functions.h (class
24817 unspec_based_mve_function_exact_insn_vcmp): New.
24818 * config/arm/arm-mve-builtins.cc
24819 (function_instance::has_inactive_argument): Handle vcmp.
24820 * config/arm/arm_mve.h (vcmpneq): Remove.
24828 (vcmpneq_m): Remove.
24829 (vcmphiq_m): Remove.
24830 (vcmpeqq_m): Remove.
24831 (vcmpcsq_m): Remove.
24832 (vcmpcsq_m_n): Remove.
24833 (vcmpltq_m): Remove.
24834 (vcmpleq_m): Remove.
24835 (vcmpgtq_m): Remove.
24836 (vcmpgeq_m): Remove.
24837 (vcmpneq_s8): Remove.
24838 (vcmpneq_s16): Remove.
24839 (vcmpneq_s32): Remove.
24840 (vcmpneq_u8): Remove.
24841 (vcmpneq_u16): Remove.
24842 (vcmpneq_u32): Remove.
24843 (vcmpneq_n_u8): Remove.
24844 (vcmphiq_u8): Remove.
24845 (vcmphiq_n_u8): Remove.
24846 (vcmpeqq_u8): Remove.
24847 (vcmpeqq_n_u8): Remove.
24848 (vcmpcsq_u8): Remove.
24849 (vcmpcsq_n_u8): Remove.
24850 (vcmpneq_n_s8): Remove.
24851 (vcmpltq_s8): Remove.
24852 (vcmpltq_n_s8): Remove.
24853 (vcmpleq_s8): Remove.
24854 (vcmpleq_n_s8): Remove.
24855 (vcmpgtq_s8): Remove.
24856 (vcmpgtq_n_s8): Remove.
24857 (vcmpgeq_s8): Remove.
24858 (vcmpgeq_n_s8): Remove.
24859 (vcmpeqq_s8): Remove.
24860 (vcmpeqq_n_s8): Remove.
24861 (vcmpneq_n_u16): Remove.
24862 (vcmphiq_u16): Remove.
24863 (vcmphiq_n_u16): Remove.
24864 (vcmpeqq_u16): Remove.
24865 (vcmpeqq_n_u16): Remove.
24866 (vcmpcsq_u16): Remove.
24867 (vcmpcsq_n_u16): Remove.
24868 (vcmpneq_n_s16): Remove.
24869 (vcmpltq_s16): Remove.
24870 (vcmpltq_n_s16): Remove.
24871 (vcmpleq_s16): Remove.
24872 (vcmpleq_n_s16): Remove.
24873 (vcmpgtq_s16): Remove.
24874 (vcmpgtq_n_s16): Remove.
24875 (vcmpgeq_s16): Remove.
24876 (vcmpgeq_n_s16): Remove.
24877 (vcmpeqq_s16): Remove.
24878 (vcmpeqq_n_s16): Remove.
24879 (vcmpneq_n_u32): Remove.
24880 (vcmphiq_u32): Remove.
24881 (vcmphiq_n_u32): Remove.
24882 (vcmpeqq_u32): Remove.
24883 (vcmpeqq_n_u32): Remove.
24884 (vcmpcsq_u32): Remove.
24885 (vcmpcsq_n_u32): Remove.
24886 (vcmpneq_n_s32): Remove.
24887 (vcmpltq_s32): Remove.
24888 (vcmpltq_n_s32): Remove.
24889 (vcmpleq_s32): Remove.
24890 (vcmpleq_n_s32): Remove.
24891 (vcmpgtq_s32): Remove.
24892 (vcmpgtq_n_s32): Remove.
24893 (vcmpgeq_s32): Remove.
24894 (vcmpgeq_n_s32): Remove.
24895 (vcmpeqq_s32): Remove.
24896 (vcmpeqq_n_s32): Remove.
24897 (vcmpneq_n_f16): Remove.
24898 (vcmpneq_f16): Remove.
24899 (vcmpltq_n_f16): Remove.
24900 (vcmpltq_f16): Remove.
24901 (vcmpleq_n_f16): Remove.
24902 (vcmpleq_f16): Remove.
24903 (vcmpgtq_n_f16): Remove.
24904 (vcmpgtq_f16): Remove.
24905 (vcmpgeq_n_f16): Remove.
24906 (vcmpgeq_f16): Remove.
24907 (vcmpeqq_n_f16): Remove.
24908 (vcmpeqq_f16): Remove.
24909 (vcmpneq_n_f32): Remove.
24910 (vcmpneq_f32): Remove.
24911 (vcmpltq_n_f32): Remove.
24912 (vcmpltq_f32): Remove.
24913 (vcmpleq_n_f32): Remove.
24914 (vcmpleq_f32): Remove.
24915 (vcmpgtq_n_f32): Remove.
24916 (vcmpgtq_f32): Remove.
24917 (vcmpgeq_n_f32): Remove.
24918 (vcmpgeq_f32): Remove.
24919 (vcmpeqq_n_f32): Remove.
24920 (vcmpeqq_f32): Remove.
24921 (vcmpeqq_m_f16): Remove.
24922 (vcmpeqq_m_f32): Remove.
24923 (vcmpneq_m_u8): Remove.
24924 (vcmpneq_m_n_u8): Remove.
24925 (vcmphiq_m_u8): Remove.
24926 (vcmphiq_m_n_u8): Remove.
24927 (vcmpeqq_m_u8): Remove.
24928 (vcmpeqq_m_n_u8): Remove.
24929 (vcmpcsq_m_u8): Remove.
24930 (vcmpcsq_m_n_u8): Remove.
24931 (vcmpneq_m_s8): Remove.
24932 (vcmpneq_m_n_s8): Remove.
24933 (vcmpltq_m_s8): Remove.
24934 (vcmpltq_m_n_s8): Remove.
24935 (vcmpleq_m_s8): Remove.
24936 (vcmpleq_m_n_s8): Remove.
24937 (vcmpgtq_m_s8): Remove.
24938 (vcmpgtq_m_n_s8): Remove.
24939 (vcmpgeq_m_s8): Remove.
24940 (vcmpgeq_m_n_s8): Remove.
24941 (vcmpeqq_m_s8): Remove.
24942 (vcmpeqq_m_n_s8): Remove.
24943 (vcmpneq_m_u16): Remove.
24944 (vcmpneq_m_n_u16): Remove.
24945 (vcmphiq_m_u16): Remove.
24946 (vcmphiq_m_n_u16): Remove.
24947 (vcmpeqq_m_u16): Remove.
24948 (vcmpeqq_m_n_u16): Remove.
24949 (vcmpcsq_m_u16): Remove.
24950 (vcmpcsq_m_n_u16): Remove.
24951 (vcmpneq_m_s16): Remove.
24952 (vcmpneq_m_n_s16): Remove.
24953 (vcmpltq_m_s16): Remove.
24954 (vcmpltq_m_n_s16): Remove.
24955 (vcmpleq_m_s16): Remove.
24956 (vcmpleq_m_n_s16): Remove.
24957 (vcmpgtq_m_s16): Remove.
24958 (vcmpgtq_m_n_s16): Remove.
24959 (vcmpgeq_m_s16): Remove.
24960 (vcmpgeq_m_n_s16): Remove.
24961 (vcmpeqq_m_s16): Remove.
24962 (vcmpeqq_m_n_s16): Remove.
24963 (vcmpneq_m_u32): Remove.
24964 (vcmpneq_m_n_u32): Remove.
24965 (vcmphiq_m_u32): Remove.
24966 (vcmphiq_m_n_u32): Remove.
24967 (vcmpeqq_m_u32): Remove.
24968 (vcmpeqq_m_n_u32): Remove.
24969 (vcmpcsq_m_u32): Remove.
24970 (vcmpcsq_m_n_u32): Remove.
24971 (vcmpneq_m_s32): Remove.
24972 (vcmpneq_m_n_s32): Remove.
24973 (vcmpltq_m_s32): Remove.
24974 (vcmpltq_m_n_s32): Remove.
24975 (vcmpleq_m_s32): Remove.
24976 (vcmpleq_m_n_s32): Remove.
24977 (vcmpgtq_m_s32): Remove.
24978 (vcmpgtq_m_n_s32): Remove.
24979 (vcmpgeq_m_s32): Remove.
24980 (vcmpgeq_m_n_s32): Remove.
24981 (vcmpeqq_m_s32): Remove.
24982 (vcmpeqq_m_n_s32): Remove.
24983 (vcmpeqq_m_n_f16): Remove.
24984 (vcmpgeq_m_f16): Remove.
24985 (vcmpgeq_m_n_f16): Remove.
24986 (vcmpgtq_m_f16): Remove.
24987 (vcmpgtq_m_n_f16): Remove.
24988 (vcmpleq_m_f16): Remove.
24989 (vcmpleq_m_n_f16): Remove.
24990 (vcmpltq_m_f16): Remove.
24991 (vcmpltq_m_n_f16): Remove.
24992 (vcmpneq_m_f16): Remove.
24993 (vcmpneq_m_n_f16): Remove.
24994 (vcmpeqq_m_n_f32): Remove.
24995 (vcmpgeq_m_f32): Remove.
24996 (vcmpgeq_m_n_f32): Remove.
24997 (vcmpgtq_m_f32): Remove.
24998 (vcmpgtq_m_n_f32): Remove.
24999 (vcmpleq_m_f32): Remove.
25000 (vcmpleq_m_n_f32): Remove.
25001 (vcmpltq_m_f32): Remove.
25002 (vcmpltq_m_n_f32): Remove.
25003 (vcmpneq_m_f32): Remove.
25004 (vcmpneq_m_n_f32): Remove.
25005 (__arm_vcmpneq_s8): Remove.
25006 (__arm_vcmpneq_s16): Remove.
25007 (__arm_vcmpneq_s32): Remove.
25008 (__arm_vcmpneq_u8): Remove.
25009 (__arm_vcmpneq_u16): Remove.
25010 (__arm_vcmpneq_u32): Remove.
25011 (__arm_vcmpneq_n_u8): Remove.
25012 (__arm_vcmphiq_u8): Remove.
25013 (__arm_vcmphiq_n_u8): Remove.
25014 (__arm_vcmpeqq_u8): Remove.
25015 (__arm_vcmpeqq_n_u8): Remove.
25016 (__arm_vcmpcsq_u8): Remove.
25017 (__arm_vcmpcsq_n_u8): Remove.
25018 (__arm_vcmpneq_n_s8): Remove.
25019 (__arm_vcmpltq_s8): Remove.
25020 (__arm_vcmpltq_n_s8): Remove.
25021 (__arm_vcmpleq_s8): Remove.
25022 (__arm_vcmpleq_n_s8): Remove.
25023 (__arm_vcmpgtq_s8): Remove.
25024 (__arm_vcmpgtq_n_s8): Remove.
25025 (__arm_vcmpgeq_s8): Remove.
25026 (__arm_vcmpgeq_n_s8): Remove.
25027 (__arm_vcmpeqq_s8): Remove.
25028 (__arm_vcmpeqq_n_s8): Remove.
25029 (__arm_vcmpneq_n_u16): Remove.
25030 (__arm_vcmphiq_u16): Remove.
25031 (__arm_vcmphiq_n_u16): Remove.
25032 (__arm_vcmpeqq_u16): Remove.
25033 (__arm_vcmpeqq_n_u16): Remove.
25034 (__arm_vcmpcsq_u16): Remove.
25035 (__arm_vcmpcsq_n_u16): Remove.
25036 (__arm_vcmpneq_n_s16): Remove.
25037 (__arm_vcmpltq_s16): Remove.
25038 (__arm_vcmpltq_n_s16): Remove.
25039 (__arm_vcmpleq_s16): Remove.
25040 (__arm_vcmpleq_n_s16): Remove.
25041 (__arm_vcmpgtq_s16): Remove.
25042 (__arm_vcmpgtq_n_s16): Remove.
25043 (__arm_vcmpgeq_s16): Remove.
25044 (__arm_vcmpgeq_n_s16): Remove.
25045 (__arm_vcmpeqq_s16): Remove.
25046 (__arm_vcmpeqq_n_s16): Remove.
25047 (__arm_vcmpneq_n_u32): Remove.
25048 (__arm_vcmphiq_u32): Remove.
25049 (__arm_vcmphiq_n_u32): Remove.
25050 (__arm_vcmpeqq_u32): Remove.
25051 (__arm_vcmpeqq_n_u32): Remove.
25052 (__arm_vcmpcsq_u32): Remove.
25053 (__arm_vcmpcsq_n_u32): Remove.
25054 (__arm_vcmpneq_n_s32): Remove.
25055 (__arm_vcmpltq_s32): Remove.
25056 (__arm_vcmpltq_n_s32): Remove.
25057 (__arm_vcmpleq_s32): Remove.
25058 (__arm_vcmpleq_n_s32): Remove.
25059 (__arm_vcmpgtq_s32): Remove.
25060 (__arm_vcmpgtq_n_s32): Remove.
25061 (__arm_vcmpgeq_s32): Remove.
25062 (__arm_vcmpgeq_n_s32): Remove.
25063 (__arm_vcmpeqq_s32): Remove.
25064 (__arm_vcmpeqq_n_s32): Remove.
25065 (__arm_vcmpneq_m_u8): Remove.
25066 (__arm_vcmpneq_m_n_u8): Remove.
25067 (__arm_vcmphiq_m_u8): Remove.
25068 (__arm_vcmphiq_m_n_u8): Remove.
25069 (__arm_vcmpeqq_m_u8): Remove.
25070 (__arm_vcmpeqq_m_n_u8): Remove.
25071 (__arm_vcmpcsq_m_u8): Remove.
25072 (__arm_vcmpcsq_m_n_u8): Remove.
25073 (__arm_vcmpneq_m_s8): Remove.
25074 (__arm_vcmpneq_m_n_s8): Remove.
25075 (__arm_vcmpltq_m_s8): Remove.
25076 (__arm_vcmpltq_m_n_s8): Remove.
25077 (__arm_vcmpleq_m_s8): Remove.
25078 (__arm_vcmpleq_m_n_s8): Remove.
25079 (__arm_vcmpgtq_m_s8): Remove.
25080 (__arm_vcmpgtq_m_n_s8): Remove.
25081 (__arm_vcmpgeq_m_s8): Remove.
25082 (__arm_vcmpgeq_m_n_s8): Remove.
25083 (__arm_vcmpeqq_m_s8): Remove.
25084 (__arm_vcmpeqq_m_n_s8): Remove.
25085 (__arm_vcmpneq_m_u16): Remove.
25086 (__arm_vcmpneq_m_n_u16): Remove.
25087 (__arm_vcmphiq_m_u16): Remove.
25088 (__arm_vcmphiq_m_n_u16): Remove.
25089 (__arm_vcmpeqq_m_u16): Remove.
25090 (__arm_vcmpeqq_m_n_u16): Remove.
25091 (__arm_vcmpcsq_m_u16): Remove.
25092 (__arm_vcmpcsq_m_n_u16): Remove.
25093 (__arm_vcmpneq_m_s16): Remove.
25094 (__arm_vcmpneq_m_n_s16): Remove.
25095 (__arm_vcmpltq_m_s16): Remove.
25096 (__arm_vcmpltq_m_n_s16): Remove.
25097 (__arm_vcmpleq_m_s16): Remove.
25098 (__arm_vcmpleq_m_n_s16): Remove.
25099 (__arm_vcmpgtq_m_s16): Remove.
25100 (__arm_vcmpgtq_m_n_s16): Remove.
25101 (__arm_vcmpgeq_m_s16): Remove.
25102 (__arm_vcmpgeq_m_n_s16): Remove.
25103 (__arm_vcmpeqq_m_s16): Remove.
25104 (__arm_vcmpeqq_m_n_s16): Remove.
25105 (__arm_vcmpneq_m_u32): Remove.
25106 (__arm_vcmpneq_m_n_u32): Remove.
25107 (__arm_vcmphiq_m_u32): Remove.
25108 (__arm_vcmphiq_m_n_u32): Remove.
25109 (__arm_vcmpeqq_m_u32): Remove.
25110 (__arm_vcmpeqq_m_n_u32): Remove.
25111 (__arm_vcmpcsq_m_u32): Remove.
25112 (__arm_vcmpcsq_m_n_u32): Remove.
25113 (__arm_vcmpneq_m_s32): Remove.
25114 (__arm_vcmpneq_m_n_s32): Remove.
25115 (__arm_vcmpltq_m_s32): Remove.
25116 (__arm_vcmpltq_m_n_s32): Remove.
25117 (__arm_vcmpleq_m_s32): Remove.
25118 (__arm_vcmpleq_m_n_s32): Remove.
25119 (__arm_vcmpgtq_m_s32): Remove.
25120 (__arm_vcmpgtq_m_n_s32): Remove.
25121 (__arm_vcmpgeq_m_s32): Remove.
25122 (__arm_vcmpgeq_m_n_s32): Remove.
25123 (__arm_vcmpeqq_m_s32): Remove.
25124 (__arm_vcmpeqq_m_n_s32): Remove.
25125 (__arm_vcmpneq_n_f16): Remove.
25126 (__arm_vcmpneq_f16): Remove.
25127 (__arm_vcmpltq_n_f16): Remove.
25128 (__arm_vcmpltq_f16): Remove.
25129 (__arm_vcmpleq_n_f16): Remove.
25130 (__arm_vcmpleq_f16): Remove.
25131 (__arm_vcmpgtq_n_f16): Remove.
25132 (__arm_vcmpgtq_f16): Remove.
25133 (__arm_vcmpgeq_n_f16): Remove.
25134 (__arm_vcmpgeq_f16): Remove.
25135 (__arm_vcmpeqq_n_f16): Remove.
25136 (__arm_vcmpeqq_f16): Remove.
25137 (__arm_vcmpneq_n_f32): Remove.
25138 (__arm_vcmpneq_f32): Remove.
25139 (__arm_vcmpltq_n_f32): Remove.
25140 (__arm_vcmpltq_f32): Remove.
25141 (__arm_vcmpleq_n_f32): Remove.
25142 (__arm_vcmpleq_f32): Remove.
25143 (__arm_vcmpgtq_n_f32): Remove.
25144 (__arm_vcmpgtq_f32): Remove.
25145 (__arm_vcmpgeq_n_f32): Remove.
25146 (__arm_vcmpgeq_f32): Remove.
25147 (__arm_vcmpeqq_n_f32): Remove.
25148 (__arm_vcmpeqq_f32): Remove.
25149 (__arm_vcmpeqq_m_f16): Remove.
25150 (__arm_vcmpeqq_m_f32): Remove.
25151 (__arm_vcmpeqq_m_n_f16): Remove.
25152 (__arm_vcmpgeq_m_f16): Remove.
25153 (__arm_vcmpgeq_m_n_f16): Remove.
25154 (__arm_vcmpgtq_m_f16): Remove.
25155 (__arm_vcmpgtq_m_n_f16): Remove.
25156 (__arm_vcmpleq_m_f16): Remove.
25157 (__arm_vcmpleq_m_n_f16): Remove.
25158 (__arm_vcmpltq_m_f16): Remove.
25159 (__arm_vcmpltq_m_n_f16): Remove.
25160 (__arm_vcmpneq_m_f16): Remove.
25161 (__arm_vcmpneq_m_n_f16): Remove.
25162 (__arm_vcmpeqq_m_n_f32): Remove.
25163 (__arm_vcmpgeq_m_f32): Remove.
25164 (__arm_vcmpgeq_m_n_f32): Remove.
25165 (__arm_vcmpgtq_m_f32): Remove.
25166 (__arm_vcmpgtq_m_n_f32): Remove.
25167 (__arm_vcmpleq_m_f32): Remove.
25168 (__arm_vcmpleq_m_n_f32): Remove.
25169 (__arm_vcmpltq_m_f32): Remove.
25170 (__arm_vcmpltq_m_n_f32): Remove.
25171 (__arm_vcmpneq_m_f32): Remove.
25172 (__arm_vcmpneq_m_n_f32): Remove.
25173 (__arm_vcmpneq): Remove.
25174 (__arm_vcmphiq): Remove.
25175 (__arm_vcmpeqq): Remove.
25176 (__arm_vcmpcsq): Remove.
25177 (__arm_vcmpltq): Remove.
25178 (__arm_vcmpleq): Remove.
25179 (__arm_vcmpgtq): Remove.
25180 (__arm_vcmpgeq): Remove.
25181 (__arm_vcmpneq_m): Remove.
25182 (__arm_vcmphiq_m): Remove.
25183 (__arm_vcmpeqq_m): Remove.
25184 (__arm_vcmpcsq_m): Remove.
25185 (__arm_vcmpltq_m): Remove.
25186 (__arm_vcmpleq_m): Remove.
25187 (__arm_vcmpgtq_m): Remove.
25188 (__arm_vcmpgeq_m): Remove.
25190 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25192 * config/arm/arm-mve-builtins-shapes.cc (cmp): New.
25193 * config/arm/arm-mve-builtins-shapes.h (cmp): New.
25195 2023-05-11 Christophe Lyon <christophe.lyon@arm.com>
25197 * config/arm/iterators.md (MVE_CMP_M, MVE_CMP_M_F, MVE_CMP_M_N)
25198 (MVE_CMP_M_N_F, mve_cmp_op1): New.
25201 * config/arm/mve.md (mve_vcmp<mve_cmp_op>q_n_<mode>): Rename into ...
25202 (@mve_vcmp<mve_cmp_op>q_n_<mode>): ... this.
25203 (mve_vcmpeqq_m_f<mode>, mve_vcmpgeq_m_f<mode>)
25204 (mve_vcmpgtq_m_f<mode>, mve_vcmpleq_m_f<mode>)
25205 (mve_vcmpltq_m_f<mode>, mve_vcmpneq_m_f<mode>): Merge into ...
25206 (@mve_vcmp<mve_cmp_op1>q_m_f<mode>): ... this.
25207 (mve_vcmpcsq_m_u<mode>, mve_vcmpeqq_m_<supf><mode>)
25208 (mve_vcmpgeq_m_s<mode>, mve_vcmpgtq_m_s<mode>)
25209 (mve_vcmphiq_m_u<mode>, mve_vcmpleq_m_s<mode>)
25210 (mve_vcmpltq_m_s<mode>, mve_vcmpneq_m_<supf><mode>): Merge into
25212 (@mve_vcmp<mve_cmp_op1>q_m_<supf><mode>): ... this.
25213 (mve_vcmpcsq_m_n_u<mode>, mve_vcmpeqq_m_n_<supf><mode>)
25214 (mve_vcmpgeq_m_n_s<mode>, mve_vcmpgtq_m_n_s<mode>)
25215 (mve_vcmphiq_m_n_u<mode>, mve_vcmpleq_m_n_s<mode>)
25216 (mve_vcmpltq_m_n_s<mode>, mve_vcmpneq_m_n_<supf><mode>): Merge
25218 (@mve_vcmp<mve_cmp_op1>q_m_n_<supf><mode>): ... this.
25219 (mve_vcmpeqq_m_n_f<mode>, mve_vcmpgeq_m_n_f<mode>)
25220 (mve_vcmpgtq_m_n_f<mode>, mve_vcmpleq_m_n_f<mode>)
25221 (mve_vcmpltq_m_n_f<mode>, mve_vcmpneq_m_n_f<mode>): Merge into ...
25222 (@mve_vcmp<mve_cmp_op1>q_m_n_f<mode>): ... this.
25224 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
25226 * match.pd <popcount optimizations>: Simplify popcount(X|Y) +
25227 popcount(X&Y) as popcount(X)+popcount(Y). Likewise, simplify
25228 popcount(X)+popcount(Y)-popcount(X&Y) as popcount(X|Y), and
25231 2023-05-11 Roger Sayle <roger@nextmovesoftware.com>
25233 * match.pd <popcount optimizations>: Simplify popcount(bswap(x))
25234 as popcount(x). Simplify popcount(rotate(x,y)) as popcount(x).
25235 <parity optimizations>: Simplify parity(bswap(x)) as parity(x).
25236 Simplify parity(rotate(x,y)) as parity(x).
25238 2023-05-11 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25240 * config/riscv/autovec.md (@vec_series<mode>): New pattern
25241 * config/riscv/riscv-protos.h (expand_vec_series): New function.
25242 * config/riscv/riscv-v.cc (emit_binop): Ditto.
25243 (emit_index_op): Ditto.
25244 (expand_vec_series): Ditto.
25245 (expand_const_vector): Add series vector handling.
25246 * config/riscv/riscv.cc (riscv_const_insns): Enable series vector for testing.
25248 2023-05-10 Roger Sayle <roger@nextmovesoftware.com>
25250 * config/i386/i386.md (*concat<mode><dwi>3_1): Use preferred
25251 [(const_int 0)] idiom, instead of [(clobber (const_int 0))].
25252 (*concat<mode><dwi>3_2): Likewise.
25253 (*concat<mode><dwi>3_3): Likewise.
25254 (*concat<mode><dwi>3_4): Likewise.
25255 (*concat<mode><dwi>3_5): Likewise.
25256 (*concat<mode><dwi>3_6): Likewise.
25257 (*concat<mode><dwi>3_7): Likewise.
25259 2023-05-10 Uros Bizjak <ubizjak@gmail.com>
25262 * config/i386/mmx.md (sse4_1_<code>v2qiv2si2): New insn pattern.
25263 (<insn>v4qiv4hi2): New expander.
25264 (<insn>v2hiv2si2): Ditto.
25265 (<insn>v2qiv2si2): Ditto.
25266 (<insn>v2qiv2hi2): Ditto.
25268 2023-05-10 Jeff Law <jlaw@ventanamicro>
25270 * config/h8300/constraints.md (Q): Make this a special memory
25274 2023-05-10 Jakub Jelinek <jakub@redhat.com>
25277 * ipa-prop.cc (ipa_get_callee_param_type): Don't return TREE_VALUE (t)
25278 if t is void_list_node.
25280 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25282 * config/aarch64/aarch64-simd.md (aarch64_sqmovun<mode>_insn_le): Delete.
25283 (aarch64_sqmovun<mode>_insn_be): Delete.
25284 (aarch64_sqmovun<mode><vczle><vczbe>): New define_insn.
25285 (aarch64_sqmovun<mode>): Delete expander.
25287 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25290 * config/aarch64/aarch64-simd.md (aarch64_<PERMUTE:perm_insn><mode>):
25292 (aarch64_<PERMUTE:perm_insn><mode><vczle><vczbe>): ... This.
25293 (aarch64_rev<REVERSE:rev_op><mode>): Rename to...
25294 (aarch64_rev<REVERSE:rev_op><mode><vczle><vczbe>): ... This.
25296 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25299 * config/aarch64/aarch64-simd.md (aarch64_<su_optab>q<addsub><mode>):
25301 (aarch64_<su_optab>q<addsub><mode><vczle><vczbe>): ... This.
25302 (aarch64_<sur>qadd<mode>): Rename to...
25303 (aarch64_<sur>qadd<mode><vczle><vczbe>): ... This.
25305 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25307 * config/aarch64/aarch64-simd.md
25308 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_le): Delete.
25309 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn_be): Delete.
25310 (aarch64_<sur>q<r>shr<u>n_n<mode>_insn<vczle><vczbe>): New define_insn.
25311 (aarch64_<sur>q<r>shr<u>n_n<mode>): Simplify expander.
25313 2023-05-10 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
25316 * config/aarch64/aarch64-simd.md (aarch64_xtn<mode>_insn_le): Delete.
25317 (aarch64_xtn<mode>_insn_be): Likewise.
25318 (trunc<mode><Vnarrowq>2): Rename to...
25319 (trunc<mode><Vnarrowq>2<vczle><vczbe>): ... This.
25320 (aarch64_xtn<mode>): Move under the above. Just emit the truncate RTL.
25321 (aarch64_<su>qmovn<mode>): Likewise.
25322 (aarch64_<su>qmovn<mode><vczle><vczbe>): New define_insn.
25323 (aarch64_<su>qmovn<mode>_insn_le): Delete.
25324 (aarch64_<su>qmovn<mode>_insn_be): Likewise.
25326 2023-05-10 Li Xu <xuli1@eswincomputing.com>
25328 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): For vfmv.f.s/vmv.x.s
25329 intruction replace null avl with (const_int 0).
25331 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25333 * config/riscv/riscv.cc (riscv_support_vector_misalignment): Fix
25336 2023-05-10 Juzhe-Zhong <juzhe.zhong@rivai.ai>
25339 * config/riscv/riscv-vsetvl.cc (avl_source_has_vsetvl_p): New function.
25340 (source_equal_p): Fix dead loop in vsetvl avl checking.
25342 2023-05-10 Hans-Peter Nilsson <hp@axis.com>
25344 * config/cris/cris.cc (cris_postdbr_cmpelim): Correct mode
25345 of modeadjusted_dccr.
25347 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25349 * config/arm/arm-mve-builtins-base.cc (vmaxaq, vminaq): New.
25350 * config/arm/arm-mve-builtins-base.def (vmaxaq, vminaq): New.
25351 * config/arm/arm-mve-builtins-base.h (vmaxaq, vminaq): New.
25352 * config/arm/arm-mve-builtins.cc
25353 (function_instance::has_inactive_argument): Handle vmaxaq and
25355 * config/arm/arm_mve.h (vminaq): Remove.
25357 (vminaq_m): Remove.
25358 (vmaxaq_m): Remove.
25359 (vminaq_s8): Remove.
25360 (vmaxaq_s8): Remove.
25361 (vminaq_s16): Remove.
25362 (vmaxaq_s16): Remove.
25363 (vminaq_s32): Remove.
25364 (vmaxaq_s32): Remove.
25365 (vminaq_m_s8): Remove.
25366 (vmaxaq_m_s8): Remove.
25367 (vminaq_m_s16): Remove.
25368 (vmaxaq_m_s16): Remove.
25369 (vminaq_m_s32): Remove.
25370 (vmaxaq_m_s32): Remove.
25371 (__arm_vminaq_s8): Remove.
25372 (__arm_vmaxaq_s8): Remove.
25373 (__arm_vminaq_s16): Remove.
25374 (__arm_vmaxaq_s16): Remove.
25375 (__arm_vminaq_s32): Remove.
25376 (__arm_vmaxaq_s32): Remove.
25377 (__arm_vminaq_m_s8): Remove.
25378 (__arm_vmaxaq_m_s8): Remove.
25379 (__arm_vminaq_m_s16): Remove.
25380 (__arm_vmaxaq_m_s16): Remove.
25381 (__arm_vminaq_m_s32): Remove.
25382 (__arm_vmaxaq_m_s32): Remove.
25383 (__arm_vminaq): Remove.
25384 (__arm_vmaxaq): Remove.
25385 (__arm_vminaq_m): Remove.
25386 (__arm_vmaxaq_m): Remove.
25388 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25390 * config/arm/iterators.md (MVE_VMAXAVMINAQ, MVE_VMAXAVMINAQ_M):
25392 (mve_insn): Add vmaxa, vmina.
25393 (supf): Add VMAXAQ_S, VMAXAQ_M_S, VMINAQ_S, VMINAQ_M_S.
25394 * config/arm/mve.md (mve_vmaxaq_s<mode>, mve_vminaq_s<mode>):
25396 (@mve_<mve_insn>q_<supf><mode>): ... this.
25397 (mve_vmaxaq_m_s<mode>, mve_vminaq_m_s<mode>): Merge into ...
25398 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25400 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25402 * config/arm/arm-mve-builtins-shapes.cc (binary_maxamina): New.
25403 * config/arm/arm-mve-builtins-shapes.h (binary_maxamina): New.
25405 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25407 * config/arm/arm-mve-builtins-base.cc (vmaxnmaq, vminnmaq): New.
25408 * config/arm/arm-mve-builtins-base.def (vmaxnmaq, vminnmaq): New.
25409 * config/arm/arm-mve-builtins-base.h (vmaxnmaq, vminnmaq): New.
25410 * config/arm/arm-mve-builtins.cc
25411 (function_instance::has_inactive_argument): Handle vmaxnmaq and
25413 * config/arm/arm_mve.h (vminnmaq): Remove.
25414 (vmaxnmaq): Remove.
25415 (vmaxnmaq_m): Remove.
25416 (vminnmaq_m): Remove.
25417 (vminnmaq_f16): Remove.
25418 (vmaxnmaq_f16): Remove.
25419 (vminnmaq_f32): Remove.
25420 (vmaxnmaq_f32): Remove.
25421 (vmaxnmaq_m_f16): Remove.
25422 (vminnmaq_m_f16): Remove.
25423 (vmaxnmaq_m_f32): Remove.
25424 (vminnmaq_m_f32): Remove.
25425 (__arm_vminnmaq_f16): Remove.
25426 (__arm_vmaxnmaq_f16): Remove.
25427 (__arm_vminnmaq_f32): Remove.
25428 (__arm_vmaxnmaq_f32): Remove.
25429 (__arm_vmaxnmaq_m_f16): Remove.
25430 (__arm_vminnmaq_m_f16): Remove.
25431 (__arm_vmaxnmaq_m_f32): Remove.
25432 (__arm_vminnmaq_m_f32): Remove.
25433 (__arm_vminnmaq): Remove.
25434 (__arm_vmaxnmaq): Remove.
25435 (__arm_vmaxnmaq_m): Remove.
25436 (__arm_vminnmaq_m): Remove.
25438 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25440 * config/arm/iterators.md (MVE_VMAXNMA_VMINNMAQ)
25441 (MVE_VMAXNMA_VMINNMAQ_M): New.
25442 (mve_insn): Add vmaxnma, vminnma.
25443 * config/arm/mve.md (mve_vmaxnmaq_f<mode>, mve_vminnmaq_f<mode>):
25445 (@mve_<mve_insn>q_f<mode>): ... this.
25446 (mve_vmaxnmaq_m_f<mode>, mve_vminnmaq_m_f<mode>): Merge into ...
25447 (@mve_<mve_insn>q_m_f<mode>): ... this.
25449 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25451 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_F): New.
25452 (vmaxnmavq, vmaxnmvq, vminnmavq, vminnmvq): New.
25453 * config/arm/arm-mve-builtins-base.def (vmaxnmavq, vmaxnmvq)
25454 (vminnmavq, vminnmvq): New.
25455 * config/arm/arm-mve-builtins-base.h (vmaxnmavq, vmaxnmvq)
25456 (vminnmavq, vminnmvq): New.
25457 * config/arm/arm_mve.h (vminnmvq): Remove.
25458 (vminnmavq): Remove.
25459 (vmaxnmvq): Remove.
25460 (vmaxnmavq): Remove.
25461 (vmaxnmavq_p): Remove.
25462 (vmaxnmvq_p): Remove.
25463 (vminnmavq_p): Remove.
25464 (vminnmvq_p): Remove.
25465 (vminnmvq_f16): Remove.
25466 (vminnmavq_f16): Remove.
25467 (vmaxnmvq_f16): Remove.
25468 (vmaxnmavq_f16): Remove.
25469 (vminnmvq_f32): Remove.
25470 (vminnmavq_f32): Remove.
25471 (vmaxnmvq_f32): Remove.
25472 (vmaxnmavq_f32): Remove.
25473 (vmaxnmavq_p_f16): Remove.
25474 (vmaxnmvq_p_f16): Remove.
25475 (vminnmavq_p_f16): Remove.
25476 (vminnmvq_p_f16): Remove.
25477 (vmaxnmavq_p_f32): Remove.
25478 (vmaxnmvq_p_f32): Remove.
25479 (vminnmavq_p_f32): Remove.
25480 (vminnmvq_p_f32): Remove.
25481 (__arm_vminnmvq_f16): Remove.
25482 (__arm_vminnmavq_f16): Remove.
25483 (__arm_vmaxnmvq_f16): Remove.
25484 (__arm_vmaxnmavq_f16): Remove.
25485 (__arm_vminnmvq_f32): Remove.
25486 (__arm_vminnmavq_f32): Remove.
25487 (__arm_vmaxnmvq_f32): Remove.
25488 (__arm_vmaxnmavq_f32): Remove.
25489 (__arm_vmaxnmavq_p_f16): Remove.
25490 (__arm_vmaxnmvq_p_f16): Remove.
25491 (__arm_vminnmavq_p_f16): Remove.
25492 (__arm_vminnmvq_p_f16): Remove.
25493 (__arm_vmaxnmavq_p_f32): Remove.
25494 (__arm_vmaxnmvq_p_f32): Remove.
25495 (__arm_vminnmavq_p_f32): Remove.
25496 (__arm_vminnmvq_p_f32): Remove.
25497 (__arm_vminnmvq): Remove.
25498 (__arm_vminnmavq): Remove.
25499 (__arm_vmaxnmvq): Remove.
25500 (__arm_vmaxnmavq): Remove.
25501 (__arm_vmaxnmavq_p): Remove.
25502 (__arm_vmaxnmvq_p): Remove.
25503 (__arm_vminnmavq_p): Remove.
25504 (__arm_vminnmvq_p): Remove.
25505 (__arm_vmaxnmavq_m): Remove.
25506 (__arm_vmaxnmvq_m): Remove.
25508 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25510 * config/arm/arm-mve-builtins-functions.h
25511 (unspec_mve_function_exact_insn_pred_p): Use code_for_mve_q_p_f.
25513 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25515 * config/arm/iterators.md (MVE_VMAXNMxV_MINNMxVQ)
25516 (MVE_VMAXNMxV_MINNMxVQ_P): New.
25517 (mve_insn): Add vmaxnmav, vmaxnmv, vminnmav, vminnmv.
25518 * config/arm/mve.md (mve_vmaxnmavq_f<mode>, mve_vmaxnmvq_f<mode>)
25519 (mve_vminnmavq_f<mode>, mve_vminnmvq_f<mode>): Merge into ...
25520 (@mve_<mve_insn>q_f<mode>): ... this.
25521 (mve_vmaxnmavq_p_f<mode>, mve_vmaxnmvq_p_f<mode>)
25522 (mve_vminnmavq_p_f<mode>, mve_vminnmvq_p_f<mode>): Merge into ...
25523 (@mve_<mve_insn>q_p_f<mode>): ... this.
25525 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25527 * config/arm/arm-mve-builtins-base.cc (vmaxnmq, vminnmq): New.
25528 * config/arm/arm-mve-builtins-base.def (vmaxnmq, vminnmq): New.
25529 * config/arm/arm-mve-builtins-base.h (vmaxnmq, vminnmq): New.
25530 * config/arm/arm_mve.h (vminnmq): Remove.
25532 (vmaxnmq_m): Remove.
25533 (vminnmq_m): Remove.
25534 (vminnmq_x): Remove.
25535 (vmaxnmq_x): Remove.
25536 (vminnmq_f16): Remove.
25537 (vmaxnmq_f16): Remove.
25538 (vminnmq_f32): Remove.
25539 (vmaxnmq_f32): Remove.
25540 (vmaxnmq_m_f32): Remove.
25541 (vmaxnmq_m_f16): Remove.
25542 (vminnmq_m_f32): Remove.
25543 (vminnmq_m_f16): Remove.
25544 (vminnmq_x_f16): Remove.
25545 (vminnmq_x_f32): Remove.
25546 (vmaxnmq_x_f16): Remove.
25547 (vmaxnmq_x_f32): Remove.
25548 (__arm_vminnmq_f16): Remove.
25549 (__arm_vmaxnmq_f16): Remove.
25550 (__arm_vminnmq_f32): Remove.
25551 (__arm_vmaxnmq_f32): Remove.
25552 (__arm_vmaxnmq_m_f32): Remove.
25553 (__arm_vmaxnmq_m_f16): Remove.
25554 (__arm_vminnmq_m_f32): Remove.
25555 (__arm_vminnmq_m_f16): Remove.
25556 (__arm_vminnmq_x_f16): Remove.
25557 (__arm_vminnmq_x_f32): Remove.
25558 (__arm_vmaxnmq_x_f16): Remove.
25559 (__arm_vmaxnmq_x_f32): Remove.
25560 (__arm_vminnmq): Remove.
25561 (__arm_vmaxnmq): Remove.
25562 (__arm_vmaxnmq_m): Remove.
25563 (__arm_vminnmq_m): Remove.
25564 (__arm_vminnmq_x): Remove.
25565 (__arm_vmaxnmq_x): Remove.
25567 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25569 * config/arm/iterators.md (MAX_MIN_F): New.
25570 (MVE_FP_M_BINARY): Add VMAXNMQ_M_F, VMINNMQ_M_F.
25571 (mve_insn): Add vmaxnm, vminnm.
25572 (max_min_f_str): New.
25573 * config/arm/mve.md (mve_vmaxnmq_f<mode>, mve_vminnmq_f<mode>):
25575 (@mve_<max_min_f_str>q_f<mode>): ... this.
25576 (mve_vmaxnmq_m_f<mode>, mve_vminnmq_m_f<mode>): Merge into ...
25577 (@mve_<mve_insn>q_m_f<mode>): ... this.
25579 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25581 * config/arm/vec-common.md (smin<mode>3): Use VDQWH iterator.
25582 (smax<mode>3): Likewise.
25584 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25586 * config/arm/arm-mve-builtins-base.cc (FUNCTION_PRED_P_S_U)
25587 (FUNCTION_PRED_P_S): New.
25588 (vmaxavq, vminavq, vmaxvq, vminvq): New.
25589 * config/arm/arm-mve-builtins-base.def (vmaxavq, vminavq, vmaxvq)
25591 * config/arm/arm-mve-builtins-base.h (vmaxavq, vminavq, vmaxvq)
25593 * config/arm/arm_mve.h (vminvq): Remove.
25595 (vminvq_p): Remove.
25596 (vmaxvq_p): Remove.
25597 (vminvq_u8): Remove.
25598 (vmaxvq_u8): Remove.
25599 (vminvq_s8): Remove.
25600 (vmaxvq_s8): Remove.
25601 (vminvq_u16): Remove.
25602 (vmaxvq_u16): Remove.
25603 (vminvq_s16): Remove.
25604 (vmaxvq_s16): Remove.
25605 (vminvq_u32): Remove.
25606 (vmaxvq_u32): Remove.
25607 (vminvq_s32): Remove.
25608 (vmaxvq_s32): Remove.
25609 (vminvq_p_u8): Remove.
25610 (vmaxvq_p_u8): Remove.
25611 (vminvq_p_s8): Remove.
25612 (vmaxvq_p_s8): Remove.
25613 (vminvq_p_u16): Remove.
25614 (vmaxvq_p_u16): Remove.
25615 (vminvq_p_s16): Remove.
25616 (vmaxvq_p_s16): Remove.
25617 (vminvq_p_u32): Remove.
25618 (vmaxvq_p_u32): Remove.
25619 (vminvq_p_s32): Remove.
25620 (vmaxvq_p_s32): Remove.
25621 (__arm_vminvq_u8): Remove.
25622 (__arm_vmaxvq_u8): Remove.
25623 (__arm_vminvq_s8): Remove.
25624 (__arm_vmaxvq_s8): Remove.
25625 (__arm_vminvq_u16): Remove.
25626 (__arm_vmaxvq_u16): Remove.
25627 (__arm_vminvq_s16): Remove.
25628 (__arm_vmaxvq_s16): Remove.
25629 (__arm_vminvq_u32): Remove.
25630 (__arm_vmaxvq_u32): Remove.
25631 (__arm_vminvq_s32): Remove.
25632 (__arm_vmaxvq_s32): Remove.
25633 (__arm_vminvq_p_u8): Remove.
25634 (__arm_vmaxvq_p_u8): Remove.
25635 (__arm_vminvq_p_s8): Remove.
25636 (__arm_vmaxvq_p_s8): Remove.
25637 (__arm_vminvq_p_u16): Remove.
25638 (__arm_vmaxvq_p_u16): Remove.
25639 (__arm_vminvq_p_s16): Remove.
25640 (__arm_vmaxvq_p_s16): Remove.
25641 (__arm_vminvq_p_u32): Remove.
25642 (__arm_vmaxvq_p_u32): Remove.
25643 (__arm_vminvq_p_s32): Remove.
25644 (__arm_vmaxvq_p_s32): Remove.
25645 (__arm_vminvq): Remove.
25646 (__arm_vmaxvq): Remove.
25647 (__arm_vminvq_p): Remove.
25648 (__arm_vmaxvq_p): Remove.
25651 (vminavq_p): Remove.
25652 (vmaxavq_p): Remove.
25653 (vminavq_s8): Remove.
25654 (vmaxavq_s8): Remove.
25655 (vminavq_s16): Remove.
25656 (vmaxavq_s16): Remove.
25657 (vminavq_s32): Remove.
25658 (vmaxavq_s32): Remove.
25659 (vminavq_p_s8): Remove.
25660 (vmaxavq_p_s8): Remove.
25661 (vminavq_p_s16): Remove.
25662 (vmaxavq_p_s16): Remove.
25663 (vminavq_p_s32): Remove.
25664 (vmaxavq_p_s32): Remove.
25665 (__arm_vminavq_s8): Remove.
25666 (__arm_vmaxavq_s8): Remove.
25667 (__arm_vminavq_s16): Remove.
25668 (__arm_vmaxavq_s16): Remove.
25669 (__arm_vminavq_s32): Remove.
25670 (__arm_vmaxavq_s32): Remove.
25671 (__arm_vminavq_p_s8): Remove.
25672 (__arm_vmaxavq_p_s8): Remove.
25673 (__arm_vminavq_p_s16): Remove.
25674 (__arm_vmaxavq_p_s16): Remove.
25675 (__arm_vminavq_p_s32): Remove.
25676 (__arm_vmaxavq_p_s32): Remove.
25677 (__arm_vminavq): Remove.
25678 (__arm_vmaxavq): Remove.
25679 (__arm_vminavq_p): Remove.
25680 (__arm_vmaxavq_p): Remove.
25682 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25684 * config/arm/iterators.md (MVE_VMAXVQ_VMINVQ, MVE_VMAXVQ_VMINVQ_P): New.
25685 (mve_insn): Add vmaxav, vmaxv, vminav, vminv.
25686 (supf): Add VMAXAVQ_S, VMAXAVQ_P_S, VMINAVQ_S, VMINAVQ_P_S.
25687 * config/arm/mve.md (mve_vmaxavq_s<mode>, mve_vmaxvq_<supf><mode>)
25688 (mve_vminavq_s<mode>, mve_vminvq_<supf><mode>): Merge into ...
25689 (@mve_<mve_insn>q_<supf><mode>): ... this.
25690 (mve_vmaxavq_p_s<mode>, mve_vmaxvq_p_<supf><mode>)
25691 (mve_vminavq_p_s<mode>, mve_vminvq_p_<supf><mode>): Merge into ...
25692 (@mve_<mve_insn>q_p_<supf><mode>): ... this.
25694 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25696 * config/arm/arm-mve-builtins-functions.h (class
25697 unspec_mve_function_exact_insn_pred_p): New.
25699 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25701 * config/arm/arm-mve-builtins-shapes.cc (binary_maxavminav): New.
25702 * config/arm/arm-mve-builtins-shapes.h (binary_maxavminav): New.
25704 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25706 * config/arm/arm-mve-builtins-shapes.cc (binary_maxvminv): New.
25707 * config/arm/arm-mve-builtins-shapes.h (binary_maxvminv): New.
25709 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
25711 * config/aarch64/aarch64-protos.h (aarch64_adjust_reg_alloc_order):
25713 * config/aarch64/aarch64.h (REG_ALLOC_ORDER): Define.
25714 (ADJUST_REG_ALLOC_ORDER): Likewise.
25715 * config/aarch64/aarch64.cc (aarch64_adjust_reg_alloc_order): New
25717 * config/aarch64/aarch64-sve.md (*vcond_mask_<mode><vpred>): Use
25718 Upa rather than Upl for unpredicated movprfx alternatives.
25720 2023-05-09 Jeff Law <jlaw@ventanamicro>
25722 * config/h8300/testcompare.md: Add peephole2 which uses a memory
25723 load to set flags, thus eliminating a compare against zero.
25725 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25727 * config/arm/arm-mve-builtins-base.cc (vshllbq, vshlltq): New.
25728 * config/arm/arm-mve-builtins-base.def (vshllbq, vshlltq): New.
25729 * config/arm/arm-mve-builtins-base.h (vshllbq, vshlltq): New.
25730 * config/arm/arm_mve.h (vshlltq): Remove.
25732 (vshllbq_m): Remove.
25733 (vshlltq_m): Remove.
25734 (vshllbq_x): Remove.
25735 (vshlltq_x): Remove.
25736 (vshlltq_n_u8): Remove.
25737 (vshllbq_n_u8): Remove.
25738 (vshlltq_n_s8): Remove.
25739 (vshllbq_n_s8): Remove.
25740 (vshlltq_n_u16): Remove.
25741 (vshllbq_n_u16): Remove.
25742 (vshlltq_n_s16): Remove.
25743 (vshllbq_n_s16): Remove.
25744 (vshllbq_m_n_s8): Remove.
25745 (vshllbq_m_n_s16): Remove.
25746 (vshllbq_m_n_u8): Remove.
25747 (vshllbq_m_n_u16): Remove.
25748 (vshlltq_m_n_s8): Remove.
25749 (vshlltq_m_n_s16): Remove.
25750 (vshlltq_m_n_u8): Remove.
25751 (vshlltq_m_n_u16): Remove.
25752 (vshllbq_x_n_s8): Remove.
25753 (vshllbq_x_n_s16): Remove.
25754 (vshllbq_x_n_u8): Remove.
25755 (vshllbq_x_n_u16): Remove.
25756 (vshlltq_x_n_s8): Remove.
25757 (vshlltq_x_n_s16): Remove.
25758 (vshlltq_x_n_u8): Remove.
25759 (vshlltq_x_n_u16): Remove.
25760 (__arm_vshlltq_n_u8): Remove.
25761 (__arm_vshllbq_n_u8): Remove.
25762 (__arm_vshlltq_n_s8): Remove.
25763 (__arm_vshllbq_n_s8): Remove.
25764 (__arm_vshlltq_n_u16): Remove.
25765 (__arm_vshllbq_n_u16): Remove.
25766 (__arm_vshlltq_n_s16): Remove.
25767 (__arm_vshllbq_n_s16): Remove.
25768 (__arm_vshllbq_m_n_s8): Remove.
25769 (__arm_vshllbq_m_n_s16): Remove.
25770 (__arm_vshllbq_m_n_u8): Remove.
25771 (__arm_vshllbq_m_n_u16): Remove.
25772 (__arm_vshlltq_m_n_s8): Remove.
25773 (__arm_vshlltq_m_n_s16): Remove.
25774 (__arm_vshlltq_m_n_u8): Remove.
25775 (__arm_vshlltq_m_n_u16): Remove.
25776 (__arm_vshllbq_x_n_s8): Remove.
25777 (__arm_vshllbq_x_n_s16): Remove.
25778 (__arm_vshllbq_x_n_u8): Remove.
25779 (__arm_vshllbq_x_n_u16): Remove.
25780 (__arm_vshlltq_x_n_s8): Remove.
25781 (__arm_vshlltq_x_n_s16): Remove.
25782 (__arm_vshlltq_x_n_u8): Remove.
25783 (__arm_vshlltq_x_n_u16): Remove.
25784 (__arm_vshlltq): Remove.
25785 (__arm_vshllbq): Remove.
25786 (__arm_vshllbq_m): Remove.
25787 (__arm_vshlltq_m): Remove.
25788 (__arm_vshllbq_x): Remove.
25789 (__arm_vshlltq_x): Remove.
25791 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25793 * config/arm/iterators.md (mve_insn): Add vshllb, vshllt.
25794 (VSHLLBQ_N, VSHLLTQ_N): Remove.
25796 (VSHLLBQ_M_N, VSHLLTQ_M_N): Remove.
25797 (VSHLLxQ_M_N): New.
25798 * config/arm/mve.md (mve_vshllbq_n_<supf><mode>)
25799 (mve_vshlltq_n_<supf><mode>): Merge into ...
25800 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
25801 (mve_vshllbq_m_n_<supf><mode>, mve_vshlltq_m_n_<supf><mode>):
25803 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
25805 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25807 * config/arm/arm-mve-builtins-shapes.cc (binary_widen_n): New.
25808 * config/arm/arm-mve-builtins-shapes.h (binary_widen_n): New.
25810 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25812 * config/arm/arm-mve-builtins-base.cc (vmovnbq, vmovntq, vqmovnbq)
25813 (vqmovntq, vqmovunbq, vqmovuntq): New.
25814 * config/arm/arm-mve-builtins-base.def (vmovnbq, vmovntq)
25815 (vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq): New.
25816 * config/arm/arm-mve-builtins-base.h (vmovnbq, vmovntq, vqmovnbq)
25817 (vqmovntq, vqmovunbq, vqmovuntq): New.
25818 * config/arm/arm-mve-builtins.cc
25819 (function_instance::has_inactive_argument): Handle vmovnbq,
25820 vmovntq, vqmovnbq, vqmovntq, vqmovunbq, vqmovuntq.
25821 * config/arm/arm_mve.h (vqmovntq): Remove.
25822 (vqmovnbq): Remove.
25823 (vqmovnbq_m): Remove.
25824 (vqmovntq_m): Remove.
25825 (vqmovntq_u16): Remove.
25826 (vqmovnbq_u16): Remove.
25827 (vqmovntq_s16): Remove.
25828 (vqmovnbq_s16): Remove.
25829 (vqmovntq_u32): Remove.
25830 (vqmovnbq_u32): Remove.
25831 (vqmovntq_s32): Remove.
25832 (vqmovnbq_s32): Remove.
25833 (vqmovnbq_m_s16): Remove.
25834 (vqmovntq_m_s16): Remove.
25835 (vqmovnbq_m_u16): Remove.
25836 (vqmovntq_m_u16): Remove.
25837 (vqmovnbq_m_s32): Remove.
25838 (vqmovntq_m_s32): Remove.
25839 (vqmovnbq_m_u32): Remove.
25840 (vqmovntq_m_u32): Remove.
25841 (__arm_vqmovntq_u16): Remove.
25842 (__arm_vqmovnbq_u16): Remove.
25843 (__arm_vqmovntq_s16): Remove.
25844 (__arm_vqmovnbq_s16): Remove.
25845 (__arm_vqmovntq_u32): Remove.
25846 (__arm_vqmovnbq_u32): Remove.
25847 (__arm_vqmovntq_s32): Remove.
25848 (__arm_vqmovnbq_s32): Remove.
25849 (__arm_vqmovnbq_m_s16): Remove.
25850 (__arm_vqmovntq_m_s16): Remove.
25851 (__arm_vqmovnbq_m_u16): Remove.
25852 (__arm_vqmovntq_m_u16): Remove.
25853 (__arm_vqmovnbq_m_s32): Remove.
25854 (__arm_vqmovntq_m_s32): Remove.
25855 (__arm_vqmovnbq_m_u32): Remove.
25856 (__arm_vqmovntq_m_u32): Remove.
25857 (__arm_vqmovntq): Remove.
25858 (__arm_vqmovnbq): Remove.
25859 (__arm_vqmovnbq_m): Remove.
25860 (__arm_vqmovntq_m): Remove.
25863 (vmovnbq_m): Remove.
25864 (vmovntq_m): Remove.
25865 (vmovntq_u16): Remove.
25866 (vmovnbq_u16): Remove.
25867 (vmovntq_s16): Remove.
25868 (vmovnbq_s16): Remove.
25869 (vmovntq_u32): Remove.
25870 (vmovnbq_u32): Remove.
25871 (vmovntq_s32): Remove.
25872 (vmovnbq_s32): Remove.
25873 (vmovnbq_m_s16): Remove.
25874 (vmovntq_m_s16): Remove.
25875 (vmovnbq_m_u16): Remove.
25876 (vmovntq_m_u16): Remove.
25877 (vmovnbq_m_s32): Remove.
25878 (vmovntq_m_s32): Remove.
25879 (vmovnbq_m_u32): Remove.
25880 (vmovntq_m_u32): Remove.
25881 (__arm_vmovntq_u16): Remove.
25882 (__arm_vmovnbq_u16): Remove.
25883 (__arm_vmovntq_s16): Remove.
25884 (__arm_vmovnbq_s16): Remove.
25885 (__arm_vmovntq_u32): Remove.
25886 (__arm_vmovnbq_u32): Remove.
25887 (__arm_vmovntq_s32): Remove.
25888 (__arm_vmovnbq_s32): Remove.
25889 (__arm_vmovnbq_m_s16): Remove.
25890 (__arm_vmovntq_m_s16): Remove.
25891 (__arm_vmovnbq_m_u16): Remove.
25892 (__arm_vmovntq_m_u16): Remove.
25893 (__arm_vmovnbq_m_s32): Remove.
25894 (__arm_vmovntq_m_s32): Remove.
25895 (__arm_vmovnbq_m_u32): Remove.
25896 (__arm_vmovntq_m_u32): Remove.
25897 (__arm_vmovntq): Remove.
25898 (__arm_vmovnbq): Remove.
25899 (__arm_vmovnbq_m): Remove.
25900 (__arm_vmovntq_m): Remove.
25901 (vqmovuntq): Remove.
25902 (vqmovunbq): Remove.
25903 (vqmovunbq_m): Remove.
25904 (vqmovuntq_m): Remove.
25905 (vqmovuntq_s16): Remove.
25906 (vqmovunbq_s16): Remove.
25907 (vqmovuntq_s32): Remove.
25908 (vqmovunbq_s32): Remove.
25909 (vqmovunbq_m_s16): Remove.
25910 (vqmovuntq_m_s16): Remove.
25911 (vqmovunbq_m_s32): Remove.
25912 (vqmovuntq_m_s32): Remove.
25913 (__arm_vqmovuntq_s16): Remove.
25914 (__arm_vqmovunbq_s16): Remove.
25915 (__arm_vqmovuntq_s32): Remove.
25916 (__arm_vqmovunbq_s32): Remove.
25917 (__arm_vqmovunbq_m_s16): Remove.
25918 (__arm_vqmovuntq_m_s16): Remove.
25919 (__arm_vqmovunbq_m_s32): Remove.
25920 (__arm_vqmovuntq_m_s32): Remove.
25921 (__arm_vqmovuntq): Remove.
25922 (__arm_vqmovunbq): Remove.
25923 (__arm_vqmovunbq_m): Remove.
25924 (__arm_vqmovuntq_m): Remove.
25926 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25928 * config/arm/iterators.md (MVE_MOVN, MVE_MOVN_M): New.
25929 (mve_insn): Add vmovnb, vmovnt, vqmovnb, vqmovnt, vqmovunb,
25932 (supf): Add VQMOVUNBQ_M_S, VQMOVUNBQ_S, VQMOVUNTQ_M_S,
25934 * config/arm/mve.md (mve_vmovnbq_<supf><mode>)
25935 (mve_vmovntq_<supf><mode>, mve_vqmovnbq_<supf><mode>)
25936 (mve_vqmovntq_<supf><mode>, mve_vqmovunbq_s<mode>)
25937 (mve_vqmovuntq_s<mode>): Merge into ...
25938 (@mve_<mve_insn>q_<supf><mode>): ... this.
25939 (mve_vmovnbq_m_<supf><mode>, mve_vmovntq_m_<supf><mode>)
25940 (mve_vqmovnbq_m_<supf><mode>, mve_vqmovntq_m_<supf><mode>)
25941 (mve_vqmovunbq_m_s<mode>, mve_vqmovuntq_m_s<mode>): Merge into ...
25942 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
25944 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25946 * config/arm/arm-mve-builtins-shapes.cc (binary_move_narrow): New.
25947 (binary_move_narrow_unsigned): New.
25948 * config/arm/arm-mve-builtins-shapes.h (binary_move_narrow): New.
25949 (binary_move_narrow_unsigned): New.
25951 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
25953 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_F): New.
25954 (vrndaq, vrndmq, vrndnq, vrndpq, vrndq, vrndxq): New.
25955 * config/arm/arm-mve-builtins-base.def (vrndaq, vrndmq, vrndnq)
25956 (vrndpq, vrndq, vrndxq): New.
25957 * config/arm/arm-mve-builtins-base.h (vrndaq, vrndmq, vrndnq)
25958 (vrndpq, vrndq, vrndxq): New.
25959 * config/arm/arm_mve.h (vrndxq): Remove.
25965 (vrndaq_m): Remove.
25966 (vrndmq_m): Remove.
25967 (vrndnq_m): Remove.
25968 (vrndpq_m): Remove.
25970 (vrndxq_m): Remove.
25972 (vrndnq_x): Remove.
25973 (vrndmq_x): Remove.
25974 (vrndpq_x): Remove.
25975 (vrndaq_x): Remove.
25976 (vrndxq_x): Remove.
25977 (vrndxq_f16): Remove.
25978 (vrndxq_f32): Remove.
25979 (vrndq_f16): Remove.
25980 (vrndq_f32): Remove.
25981 (vrndpq_f16): Remove.
25982 (vrndpq_f32): Remove.
25983 (vrndnq_f16): Remove.
25984 (vrndnq_f32): Remove.
25985 (vrndmq_f16): Remove.
25986 (vrndmq_f32): Remove.
25987 (vrndaq_f16): Remove.
25988 (vrndaq_f32): Remove.
25989 (vrndaq_m_f16): Remove.
25990 (vrndmq_m_f16): Remove.
25991 (vrndnq_m_f16): Remove.
25992 (vrndpq_m_f16): Remove.
25993 (vrndq_m_f16): Remove.
25994 (vrndxq_m_f16): Remove.
25995 (vrndaq_m_f32): Remove.
25996 (vrndmq_m_f32): Remove.
25997 (vrndnq_m_f32): Remove.
25998 (vrndpq_m_f32): Remove.
25999 (vrndq_m_f32): Remove.
26000 (vrndxq_m_f32): Remove.
26001 (vrndq_x_f16): Remove.
26002 (vrndq_x_f32): Remove.
26003 (vrndnq_x_f16): Remove.
26004 (vrndnq_x_f32): Remove.
26005 (vrndmq_x_f16): Remove.
26006 (vrndmq_x_f32): Remove.
26007 (vrndpq_x_f16): Remove.
26008 (vrndpq_x_f32): Remove.
26009 (vrndaq_x_f16): Remove.
26010 (vrndaq_x_f32): Remove.
26011 (vrndxq_x_f16): Remove.
26012 (vrndxq_x_f32): Remove.
26013 (__arm_vrndxq_f16): Remove.
26014 (__arm_vrndxq_f32): Remove.
26015 (__arm_vrndq_f16): Remove.
26016 (__arm_vrndq_f32): Remove.
26017 (__arm_vrndpq_f16): Remove.
26018 (__arm_vrndpq_f32): Remove.
26019 (__arm_vrndnq_f16): Remove.
26020 (__arm_vrndnq_f32): Remove.
26021 (__arm_vrndmq_f16): Remove.
26022 (__arm_vrndmq_f32): Remove.
26023 (__arm_vrndaq_f16): Remove.
26024 (__arm_vrndaq_f32): Remove.
26025 (__arm_vrndaq_m_f16): Remove.
26026 (__arm_vrndmq_m_f16): Remove.
26027 (__arm_vrndnq_m_f16): Remove.
26028 (__arm_vrndpq_m_f16): Remove.
26029 (__arm_vrndq_m_f16): Remove.
26030 (__arm_vrndxq_m_f16): Remove.
26031 (__arm_vrndaq_m_f32): Remove.
26032 (__arm_vrndmq_m_f32): Remove.
26033 (__arm_vrndnq_m_f32): Remove.
26034 (__arm_vrndpq_m_f32): Remove.
26035 (__arm_vrndq_m_f32): Remove.
26036 (__arm_vrndxq_m_f32): Remove.
26037 (__arm_vrndq_x_f16): Remove.
26038 (__arm_vrndq_x_f32): Remove.
26039 (__arm_vrndnq_x_f16): Remove.
26040 (__arm_vrndnq_x_f32): Remove.
26041 (__arm_vrndmq_x_f16): Remove.
26042 (__arm_vrndmq_x_f32): Remove.
26043 (__arm_vrndpq_x_f16): Remove.
26044 (__arm_vrndpq_x_f32): Remove.
26045 (__arm_vrndaq_x_f16): Remove.
26046 (__arm_vrndaq_x_f32): Remove.
26047 (__arm_vrndxq_x_f16): Remove.
26048 (__arm_vrndxq_x_f32): Remove.
26049 (__arm_vrndxq): Remove.
26050 (__arm_vrndq): Remove.
26051 (__arm_vrndpq): Remove.
26052 (__arm_vrndnq): Remove.
26053 (__arm_vrndmq): Remove.
26054 (__arm_vrndaq): Remove.
26055 (__arm_vrndaq_m): Remove.
26056 (__arm_vrndmq_m): Remove.
26057 (__arm_vrndnq_m): Remove.
26058 (__arm_vrndpq_m): Remove.
26059 (__arm_vrndq_m): Remove.
26060 (__arm_vrndxq_m): Remove.
26061 (__arm_vrndq_x): Remove.
26062 (__arm_vrndnq_x): Remove.
26063 (__arm_vrndmq_x): Remove.
26064 (__arm_vrndpq_x): Remove.
26065 (__arm_vrndaq_x): Remove.
26066 (__arm_vrndxq_x): Remove.
26068 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26070 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N_NO_U_F): New.
26071 (vabsq, vnegq, vclsq, vclzq, vqabsq, vqnegq): New.
26072 * config/arm/arm-mve-builtins-base.def (vabsq, vnegq, vclsq)
26073 (vclzq, vqabsq, vqnegq): New.
26074 * config/arm/arm-mve-builtins-base.h (vabsq, vnegq, vclsq, vclzq)
26075 (vqabsq, vqnegq): New.
26076 * config/arm/arm_mve.h (vabsq): Remove.
26079 (vabsq_f16): Remove.
26080 (vabsq_f32): Remove.
26081 (vabsq_s8): Remove.
26082 (vabsq_s16): Remove.
26083 (vabsq_s32): Remove.
26084 (vabsq_m_s8): Remove.
26085 (vabsq_m_s16): Remove.
26086 (vabsq_m_s32): Remove.
26087 (vabsq_m_f16): Remove.
26088 (vabsq_m_f32): Remove.
26089 (vabsq_x_s8): Remove.
26090 (vabsq_x_s16): Remove.
26091 (vabsq_x_s32): Remove.
26092 (vabsq_x_f16): Remove.
26093 (vabsq_x_f32): Remove.
26094 (__arm_vabsq_s8): Remove.
26095 (__arm_vabsq_s16): Remove.
26096 (__arm_vabsq_s32): Remove.
26097 (__arm_vabsq_m_s8): Remove.
26098 (__arm_vabsq_m_s16): Remove.
26099 (__arm_vabsq_m_s32): Remove.
26100 (__arm_vabsq_x_s8): Remove.
26101 (__arm_vabsq_x_s16): Remove.
26102 (__arm_vabsq_x_s32): Remove.
26103 (__arm_vabsq_f16): Remove.
26104 (__arm_vabsq_f32): Remove.
26105 (__arm_vabsq_m_f16): Remove.
26106 (__arm_vabsq_m_f32): Remove.
26107 (__arm_vabsq_x_f16): Remove.
26108 (__arm_vabsq_x_f32): Remove.
26109 (__arm_vabsq): Remove.
26110 (__arm_vabsq_m): Remove.
26111 (__arm_vabsq_x): Remove.
26115 (vnegq_f16): Remove.
26116 (vnegq_f32): Remove.
26117 (vnegq_s8): Remove.
26118 (vnegq_s16): Remove.
26119 (vnegq_s32): Remove.
26120 (vnegq_m_s8): Remove.
26121 (vnegq_m_s16): Remove.
26122 (vnegq_m_s32): Remove.
26123 (vnegq_m_f16): Remove.
26124 (vnegq_m_f32): Remove.
26125 (vnegq_x_s8): Remove.
26126 (vnegq_x_s16): Remove.
26127 (vnegq_x_s32): Remove.
26128 (vnegq_x_f16): Remove.
26129 (vnegq_x_f32): Remove.
26130 (__arm_vnegq_s8): Remove.
26131 (__arm_vnegq_s16): Remove.
26132 (__arm_vnegq_s32): Remove.
26133 (__arm_vnegq_m_s8): Remove.
26134 (__arm_vnegq_m_s16): Remove.
26135 (__arm_vnegq_m_s32): Remove.
26136 (__arm_vnegq_x_s8): Remove.
26137 (__arm_vnegq_x_s16): Remove.
26138 (__arm_vnegq_x_s32): Remove.
26139 (__arm_vnegq_f16): Remove.
26140 (__arm_vnegq_f32): Remove.
26141 (__arm_vnegq_m_f16): Remove.
26142 (__arm_vnegq_m_f32): Remove.
26143 (__arm_vnegq_x_f16): Remove.
26144 (__arm_vnegq_x_f32): Remove.
26145 (__arm_vnegq): Remove.
26146 (__arm_vnegq_m): Remove.
26147 (__arm_vnegq_x): Remove.
26151 (vclsq_s8): Remove.
26152 (vclsq_s16): Remove.
26153 (vclsq_s32): Remove.
26154 (vclsq_m_s8): Remove.
26155 (vclsq_m_s16): Remove.
26156 (vclsq_m_s32): Remove.
26157 (vclsq_x_s8): Remove.
26158 (vclsq_x_s16): Remove.
26159 (vclsq_x_s32): Remove.
26160 (__arm_vclsq_s8): Remove.
26161 (__arm_vclsq_s16): Remove.
26162 (__arm_vclsq_s32): Remove.
26163 (__arm_vclsq_m_s8): Remove.
26164 (__arm_vclsq_m_s16): Remove.
26165 (__arm_vclsq_m_s32): Remove.
26166 (__arm_vclsq_x_s8): Remove.
26167 (__arm_vclsq_x_s16): Remove.
26168 (__arm_vclsq_x_s32): Remove.
26169 (__arm_vclsq): Remove.
26170 (__arm_vclsq_m): Remove.
26171 (__arm_vclsq_x): Remove.
26175 (vclzq_s8): Remove.
26176 (vclzq_s16): Remove.
26177 (vclzq_s32): Remove.
26178 (vclzq_u8): Remove.
26179 (vclzq_u16): Remove.
26180 (vclzq_u32): Remove.
26181 (vclzq_m_u8): Remove.
26182 (vclzq_m_s8): Remove.
26183 (vclzq_m_u16): Remove.
26184 (vclzq_m_s16): Remove.
26185 (vclzq_m_u32): Remove.
26186 (vclzq_m_s32): Remove.
26187 (vclzq_x_s8): Remove.
26188 (vclzq_x_s16): Remove.
26189 (vclzq_x_s32): Remove.
26190 (vclzq_x_u8): Remove.
26191 (vclzq_x_u16): Remove.
26192 (vclzq_x_u32): Remove.
26193 (__arm_vclzq_s8): Remove.
26194 (__arm_vclzq_s16): Remove.
26195 (__arm_vclzq_s32): Remove.
26196 (__arm_vclzq_u8): Remove.
26197 (__arm_vclzq_u16): Remove.
26198 (__arm_vclzq_u32): Remove.
26199 (__arm_vclzq_m_u8): Remove.
26200 (__arm_vclzq_m_s8): Remove.
26201 (__arm_vclzq_m_u16): Remove.
26202 (__arm_vclzq_m_s16): Remove.
26203 (__arm_vclzq_m_u32): Remove.
26204 (__arm_vclzq_m_s32): Remove.
26205 (__arm_vclzq_x_s8): Remove.
26206 (__arm_vclzq_x_s16): Remove.
26207 (__arm_vclzq_x_s32): Remove.
26208 (__arm_vclzq_x_u8): Remove.
26209 (__arm_vclzq_x_u16): Remove.
26210 (__arm_vclzq_x_u32): Remove.
26211 (__arm_vclzq): Remove.
26212 (__arm_vclzq_m): Remove.
26213 (__arm_vclzq_x): Remove.
26216 (vqnegq_m): Remove.
26217 (vqabsq_m): Remove.
26218 (vqabsq_s8): Remove.
26219 (vqabsq_s16): Remove.
26220 (vqabsq_s32): Remove.
26221 (vqnegq_s8): Remove.
26222 (vqnegq_s16): Remove.
26223 (vqnegq_s32): Remove.
26224 (vqnegq_m_s8): Remove.
26225 (vqabsq_m_s8): Remove.
26226 (vqnegq_m_s16): Remove.
26227 (vqabsq_m_s16): Remove.
26228 (vqnegq_m_s32): Remove.
26229 (vqabsq_m_s32): Remove.
26230 (__arm_vqabsq_s8): Remove.
26231 (__arm_vqabsq_s16): Remove.
26232 (__arm_vqabsq_s32): Remove.
26233 (__arm_vqnegq_s8): Remove.
26234 (__arm_vqnegq_s16): Remove.
26235 (__arm_vqnegq_s32): Remove.
26236 (__arm_vqnegq_m_s8): Remove.
26237 (__arm_vqabsq_m_s8): Remove.
26238 (__arm_vqnegq_m_s16): Remove.
26239 (__arm_vqabsq_m_s16): Remove.
26240 (__arm_vqnegq_m_s32): Remove.
26241 (__arm_vqabsq_m_s32): Remove.
26242 (__arm_vqabsq): Remove.
26243 (__arm_vqnegq): Remove.
26244 (__arm_vqnegq_m): Remove.
26245 (__arm_vqabsq_m): Remove.
26247 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26249 * config/arm/iterators.md (MVE_INT_M_UNARY, MVE_INT_UNARY)
26250 (MVE_FP_UNARY, MVE_FP_M_UNARY): New.
26251 (mve_insn): Add vabs, vcls, vclz, vneg, vqabs, vqneg, vrnda,
26252 vrndm, vrndn, vrndp, vrnd, vrndx.
26253 (isu): Add VABSQ_M_S, VCLSQ_M_S, VCLZQ_M_S, VCLZQ_M_U, VNEGQ_M_S,
26254 VQABSQ_M_S, VQNEGQ_M_S.
26256 * config/arm/mve.md (mve_vrndq_m_f<mode>, mve_vrndxq_f<mode>)
26257 (mve_vrndq_f<mode>, mve_vrndpq_f<mode>, mve_vrndnq_f<mode>)
26258 (mve_vrndmq_f<mode>, mve_vrndaq_f<mode>): Merge into ...
26259 (@mve_<mve_insn>q_f<mode>): ... this.
26260 (mve_vnegq_f<mode>, mve_vabsq_f<mode>): Merge into ...
26261 (mve_v<absneg_str>q_f<mode>): ... this.
26262 (mve_vnegq_s<mode>, mve_vabsq_s<mode>): Merge into ...
26263 (mve_v<absneg_str>q_s<mode>): ... this.
26264 (mve_vclsq_s<mode>, mve_vqnegq_s<mode>, mve_vqabsq_s<mode>): Merge into ...
26265 (@mve_<mve_insn>q_<supf><mode>): ... this.
26266 (mve_vabsq_m_s<mode>, mve_vclsq_m_s<mode>)
26267 (mve_vclzq_m_<supf><mode>, mve_vnegq_m_s<mode>)
26268 (mve_vqabsq_m_s<mode>, mve_vqnegq_m_s<mode>): Merge into ...
26269 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
26270 (mve_vabsq_m_f<mode>, mve_vnegq_m_f<mode>, mve_vrndaq_m_f<mode>)
26271 (mve_vrndmq_m_f<mode>, mve_vrndnq_m_f<mode>, mve_vrndpq_m_f<mode>)
26272 (mve_vrndxq_m_f<mode>): Merge into ...
26273 (@mve_<mve_insn>q_m_f<mode>): ... this.
26275 2023-05-09 Christophe Lyon <christophe.lyon@arm.com>
26277 * config/arm/arm-mve-builtins-shapes.cc (unary): New.
26278 * config/arm/arm-mve-builtins-shapes.h (unary): New.
26280 2023-05-09 Jakub Jelinek <jakub@redhat.com>
26282 * mux-utils.h: Fix comment typo, avoides -> avoids.
26284 2023-05-09 Jakub Jelinek <jakub@redhat.com>
26286 PR tree-optimization/109778
26287 * wide-int.h (wi::lrotate, wi::rrotate): Call wi::lrshift on
26288 wi::zext (x, width) rather than x if width != precision, rather
26289 than using wi::zext (right, width) after the shift.
26290 * tree-ssa-ccp.cc (bit_value_binop): Call wi::ext on the results
26291 of wi::lrotate or wi::rrotate.
26293 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26295 * genmatch.cc (get_out_file): Make static and rename to ...
26296 (choose_output): ... this. Reimplement. Update all uses ...
26297 (decision_tree::gen): ... here and ...
26300 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26302 * genmatch.cc (showUsage): Reimplement as ...
26303 (usage): ...this. Adjust all uses.
26304 (main): Print usage when no arguments. Add missing 'return 1'.
26306 2023-05-09 Alexander Monakov <amonakov@ispras.ru>
26308 * genmatch.cc (header_file): Make static.
26309 (emit_func): Rename to...
26310 (fp_decl): ... this. Adjust all uses.
26311 (fp_decl_done): New function. Use it...
26312 (decision_tree::gen): ... here and...
26313 (write_predicate): ... here.
26316 2023-05-09 Richard Sandiford <richard.sandiford@arm.com>
26318 * ira-conflicts.cc (can_use_same_reg_p): Skip over non-matching
26321 2023-05-08 Roger Sayle <roger@nextmovesoftware.com>
26322 Uros Bizjak <ubizjak@gmail.com>
26324 * config/i386/i386.md (any_or_plus): Move definition earlier.
26325 (*insvti_highpart_1): New define_insn_and_split to overwrite
26326 (insv) the highpart of a TImode register/memory.
26328 2023-05-08 Eugene Rozenfeld <erozen@microsoft.com>
26330 * auto-profile.cc (auto_profile): Check todo from early_inline
26331 to see if cleanup_tree_vfg needs to be called.
26332 (early_inline): Return todo from early_inliner.
26334 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
26336 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::get_vector_info):
26338 (pass_vsetvl::get_block_info): New.
26339 (pass_vsetvl::update_vector_info): New.
26340 (pass_vsetvl::simple_vsetvl): Use get_vector_info.
26341 (pass_vsetvl::compute_local_backward_infos): Ditto.
26342 (pass_vsetvl::transfer_before): Ditto.
26343 (pass_vsetvl::transfer_after): Ditto.
26344 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
26345 (pass_vsetvl::local_eliminate_vsetvl_insn): Ditto.
26346 (pass_vsetvl::cleanup_insns): Ditto.
26347 (pass_vsetvl::compute_local_backward_infos): Use
26348 update_vector_info.
26350 2023-05-08 Jeff Law <jlaw@ventanamicro>
26352 * config/stormy16/stormy16.md (zero_extendhisi2): Fix length.
26354 2023-05-08 Richard Biener <rguenther@suse.de>
26355 Michael Meissner <meissner@linux.ibm.com>
26357 PR middle-end/108623
26358 * tree-core.h (tree_type_common): Bump up precision field to 16 bits.
26359 Align bit fields > 1 bit to at least an 8-bit boundary.
26361 2023-05-08 Andrew Pinski <apinski@marvell.com>
26363 PR tree-optimization/109424
26364 PR tree-optimization/59424
26365 * tree-ssa-phiopt.cc (factor_out_conditional_conversion): Rename to ...
26366 (factor_out_conditional_operation): This and add support for all unary
26368 (pass_phiopt::execute): Update call to factor_out_conditional_conversion
26369 to call factor_out_conditional_operation instead.
26371 2023-05-08 Andrew Pinski <apinski@marvell.com>
26373 * tree-ssa-phiopt.cc (pass_phiopt::execute): Loop
26374 over factor_out_conditional_conversion.
26376 2023-05-08 Andrew Pinski <apinski@marvell.com>
26378 PR tree-optimization/49959
26379 PR tree-optimization/103771
26380 * tree-ssa-phiopt.cc (pass_phiopt::execute): Support
26381 Diamond shapped bb form for factor_out_conditional_conversion.
26383 2023-05-08 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26385 * config/riscv/autovec.md (movmisalign<mode>): New pattern.
26386 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): Delete.
26387 (riscv_vector_get_mask_mode): Ditto.
26388 (get_mask_policy_no_pred): Ditto.
26389 (get_tail_policy_no_pred): Ditto.
26390 (get_mask_mode): New function.
26391 * config/riscv/riscv-v.cc (get_mask_policy_no_pred): Delete.
26392 (get_tail_policy_no_pred): Ditto.
26393 (riscv_vector_mask_mode_p): Ditto.
26394 (riscv_vector_get_mask_mode): Ditto.
26395 (get_mask_mode): New function.
26396 * config/riscv/riscv-vector-builtins.cc (use_real_merge_p): Remove
26398 (get_tail_policy_for_pred): Ditto.
26399 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred): Ditto.
26400 (get_mask_policy_for_pred): Ditto
26401 * config/riscv/riscv.cc (riscv_get_mask_mode): Refine codes.
26403 2023-05-08 Kito Cheng <kito.cheng@sifive.com>
26405 * common/config/riscv/riscv-common.cc (riscv_select_multilib_by_abi): New.
26406 (riscv_select_multilib): New.
26407 (riscv_compute_multilib): Extract logic to riscv_select_multilib and
26408 also handle select_by_abi.
26409 * config/riscv/elf.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Change it
26410 to select_by_abi_arch_cmodel from 1.
26411 * config/riscv/linux.h (RISCV_USE_CUSTOMISED_MULTI_LIB): Define.
26412 * config/riscv/riscv-opts.h (enum riscv_multilib_select_kind): New.
26414 2023-05-08 Alexander Monakov <amonakov@ispras.ru>
26416 * Makefile.in: (gimple-match-head.o-warn): Remove.
26417 (GIMPLE_MATCH_PD_SEQ_SRC): Do not depend on
26418 gimple-match-exports.cc.
26419 (gimple-match-auto.h): Only depend on s-gimple-match.
26420 (generic-match-auto.h): Likewise.
26422 2023-05-08 Andrew Pinski <apinski@marvell.com>
26424 PR tree-optimization/109691
26425 * tree-ssa-dce.cc (simple_dce_from_worklist): Add need_eh_cleanup
26427 If the removed statement can throw, have need_eh_cleanup
26428 include the bb of that statement.
26429 * tree-ssa-dce.h (simple_dce_from_worklist): Update declaration.
26430 * tree-ssa-propagate.cc (struct prop_stats_d): Remove
26432 (substitute_and_fold_dom_walker::substitute_and_fold_dom_walker):
26433 Initialize dceworklist instead of stmts_to_remove.
26434 (substitute_and_fold_dom_walker::~substitute_and_fold_dom_walker):
26435 Destore dceworklist instead of stmts_to_remove.
26436 (substitute_and_fold_dom_walker::before_dom_children):
26437 Set dceworklist instead of adding to stmts_to_remove.
26438 (substitute_and_fold_engine::substitute_and_fold):
26439 Call simple_dce_from_worklist instead of poping
26441 Don't update the stat on removal statements.
26443 2023-05-07 Andrew Pinski <apinski@marvell.com>
26446 * config/aarch64/aarch64-builtins.cc (aarch64_simd_switcher::aarch64_simd_switcher):
26447 Change argument type to aarch64_feature_flags.
26448 * config/aarch64/aarch64-protos.h (aarch64_simd_switcher): Change
26449 constructor argument type to aarch64_feature_flags.
26450 Change m_old_asm_isa_flags to be aarch64_feature_flags.
26452 2023-05-07 Jiufu Guo <guojiufu@linux.ibm.com>
26454 * config/rs6000/rs6000.cc (rs6000_emit_set_long_const): Generate
26455 more parallel code if can_create_pseudo_p.
26457 2023-05-07 Roger Sayle <roger@nextmovesoftware.com>
26460 * lower-subreg.cc (resolve_simple_move): Don't emit a clobber
26461 immediately before moving a multi-word register by parts.
26463 2023-05-06 Jeff Law <jlaw@ventanamicro>
26465 * config/riscv/riscv-v.cc (riscv_vector_preferred_simd_mode): Delete.
26467 2023-05-06 Michael Collison <collison@rivosinc.com>
26469 * tree-vect-slp.cc (can_duplicate_and_interleave_p):
26470 Check that GET_MODE_NUNITS is a multiple of 2.
26472 2023-05-06 Michael Collison <collison@rivosinc.com>
26474 * config/riscv/riscv.cc
26475 (riscv_estimated_poly_value): Implement
26476 TARGET_ESTIMATED_POLY_VALUE.
26477 (riscv_preferred_simd_mode): Implement
26478 TARGET_VECTORIZE_PREFERRED_SIMD_MODE.
26479 (riscv_get_mask_mode): Implement TARGET_VECTORIZE_GET_MASK_MODE.
26480 (riscv_empty_mask_is_expensive): Implement
26481 TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE.
26482 (riscv_vectorize_create_costs): Implement
26483 TARGET_VECTORIZE_CREATE_COSTS.
26484 (riscv_support_vector_misalignment): Implement
26485 TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT.
26486 (TARGET_ESTIMATED_POLY_VALUE): Register target macro.
26487 (TARGET_VECTORIZE_GET_MASK_MODE): Ditto.
26488 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Ditto.
26489 (TARGET_VECTORIZE_SUPPORT_VECTOR_MISALIGNMENT): Ditto.
26491 2023-05-06 Jeff Law <jlaw@ventanamicro>
26493 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Remove
26494 duplicate definition.
26496 2023-05-06 Michael Collison <collison@rivosinc.com>
26498 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): New function.
26499 (riscv_vector_preferred_simd_mode): Ditto.
26500 (get_mask_policy_no_pred): Ditto.
26501 (get_tail_policy_no_pred): Ditto.
26502 (riscv_vector_mask_mode_p): Ditto.
26503 (riscv_vector_get_mask_mode): Ditto.
26505 2023-05-06 Michael Collison <collison@rivosinc.com>
26507 * config/riscv/riscv-vector-builtins.cc (get_tail_policy_for_pred):
26508 Remove static declaration to to make externally visible.
26509 (get_mask_policy_for_pred): Ditto.
26510 * config/riscv/riscv-vector-builtins.h (get_tail_policy_for_pred):
26511 New external declaration.
26512 (get_mask_policy_for_pred): Ditto.
26514 2023-05-06 Michael Collison <collison@rivosinc.com>
26516 * config/riscv/riscv-protos.h (riscv_vector_mask_mode_p): New.
26517 (riscv_vector_get_mask_mode): Ditto.
26518 (get_mask_policy_no_pred): Ditto.
26519 (get_tail_policy_no_pred): Ditto.
26521 2023-05-06 Xi Ruoyao <xry111@xry111.site>
26523 * config/loongarch/loongarch.h (struct machine_function): Add
26524 reg_is_wrapped_separately array for register wrapping
26526 * config/loongarch/loongarch.cc
26527 (loongarch_get_separate_components): New function.
26528 (loongarch_components_for_bb): Likewise.
26529 (loongarch_disqualify_components): Likewise.
26530 (loongarch_process_components): Likewise.
26531 (loongarch_emit_prologue_components): Likewise.
26532 (loongarch_emit_epilogue_components): Likewise.
26533 (loongarch_set_handled_components): Likewise.
26534 (TARGET_SHRINK_WRAP_GET_SEPARATE_COMPONENTS): Define.
26535 (TARGET_SHRINK_WRAP_COMPONENTS_FOR_BB): Likewise.
26536 (TARGET_SHRINK_WRAP_DISQUALIFY_COMPONENTS): Likewise.
26537 (TARGET_SHRINK_WRAP_EMIT_PROLOGUE_COMPONENTS): Likewise.
26538 (TARGET_SHRINK_WRAP_EMIT_EPILOGUE_COMPONENTS): Likewise.
26539 (TARGET_SHRINK_WRAP_SET_HANDLED_COMPONENTS): Likewise.
26540 (loongarch_for_each_saved_reg): Skip registers that are wrapped
26543 2023-05-06 Xi Ruoyao <xry111@xry111.site>
26546 * Makefile.in (s-macro_list): Pass -nostdinc to
26549 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26551 * config/riscv/riscv-protos.h (preferred_simd_mode): New function.
26552 * config/riscv/riscv-v.cc (autovec_use_vlmax_p): Ditto.
26553 (preferred_simd_mode): Ditto.
26554 * config/riscv/riscv.cc (riscv_get_arg_info): Handle RVV type in function arg.
26555 (riscv_convert_vector_bits): Adjust for RVV auto-vectorization.
26556 (riscv_preferred_simd_mode): New function.
26557 (TARGET_VECTORIZE_PREFERRED_SIMD_MODE): New target hook support.
26558 * config/riscv/vector.md: Add autovec.md.
26559 * config/riscv/autovec.md: New file.
26561 2023-05-06 Jakub Jelinek <jakub@redhat.com>
26563 * real.h (dconst_pi): Define.
26564 (dconst_e_ptr): Formatting fix.
26565 (dconst_pi_ptr): Declare.
26566 * real.cc (dconst_pi_ptr): New function.
26567 * gimple-range-op.cc (cfn_sincos::fold_range): Intersect the generic
26568 boundaries range with range computed from sin/cos of the particular
26569 bounds if the argument range is shorter than 2*pi.
26570 (cfn_sincos::op1_range): Take bulps into account when determining
26571 which result ranges are always invalid or behave like known NAN.
26573 2023-05-06 Aldy Hernandez <aldyh@redhat.com>
26575 * gimple-range-cache.cc (sbr_sparse_bitmap::set_bb_range): Do not
26576 pass type to vrange_storage::equal_p.
26577 * value-range-storage.cc (vrange_storage::equal_p): Remove type.
26578 (irange_storage::equal_p): Same.
26579 (frange_storage::equal_p): Same.
26580 * value-range-storage.h (class frange_storage): Same.
26582 2023-05-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
26585 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): Remove it.
26586 (pass_vsetvl::local_eliminate_vsetvl_insn): New function.
26588 2023-05-06 liuhongt <hongtao.liu@intel.com>
26590 * combine.cc (maybe_swap_commutative_operands): Canonicalize
26591 vec_merge when mask is constant.
26592 * doc/md.texi: Document vec_merge canonicalization.
26594 2023-05-06 Jakub Jelinek <jakub@redhat.com>
26596 * value-range.h (frange_arithmetic): Declare.
26597 * range-op-float.cc (frange_arithmetic): No longer static.
26598 * gimple-range-op.cc (frange_mpfr_arg1): New function.
26599 (cfn_sqrt::fold_range): Intersect the generic boundaries range
26600 with range computed from sqrt of the particular bounds.
26601 (cfn_sqrt::op1_range): Intersect the generic boundaries range
26602 with range computed from squared particular bounds.
26604 2023-05-06 Jakub Jelinek <jakub@redhat.com>
26606 * Makefile.in (check_p_numbers): Rename to one_to_9999, move
26607 earlier with helper variables also renamed.
26608 (MATCH_SPLUT_SEQ): Use $(wordlist 1,$(NUM_MATCH_SPLITS),$(one_to_9999))
26609 instead of $(shell seq 1 $(NUM_MATCH_SPLITS)).
26610 (check_p_subdirs): Use $(one_to_9999) instead of $(check_p_numbers).
26612 2023-05-06 Hans-Peter Nilsson <hp@axis.com>
26614 * config/cris/cris.md (splitop): Add PLUS.
26615 * config/cris/cris.cc (cris_split_constant): Also handle
26616 PLUS when a split into two insns may be useful.
26618 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
26620 * config/cris/cris.md (movandsplit1): New define_peephole2.
26622 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
26624 * config/cris/cris.md (lsrandsplit1): New define_peephole2.
26626 2023-05-05 Hans-Peter Nilsson <hp@axis.com>
26628 * doc/md.texi (define_peephole2): Document order of scanning.
26630 2023-05-05 Pan Li <pan2.li@intel.com>
26631 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
26633 * config/riscv/vector.md: Allow const as the operand of RVV
26634 indexed load/store.
26636 2023-05-05 Pan Li <pan2.li@intel.com>
26638 * config/riscv/riscv.h (VECTOR_STORE_FLAG_VALUE): Add new macro
26639 consumed by simplify_rtx.
26641 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26643 * config/arm/arm-mve-builtins-base.cc (vrshrq, vshrq): New.
26644 * config/arm/arm-mve-builtins-base.def (vrshrq, vshrq): New.
26645 * config/arm/arm-mve-builtins-base.h (vrshrq, vshrq): New.
26646 * config/arm/arm_mve.h (vshrq): Remove.
26648 (vrshrq_m): Remove.
26650 (vrshrq_x): Remove.
26652 (vshrq_n_s8): Remove.
26653 (vshrq_n_s16): Remove.
26654 (vshrq_n_s32): Remove.
26655 (vshrq_n_u8): Remove.
26656 (vshrq_n_u16): Remove.
26657 (vshrq_n_u32): Remove.
26658 (vrshrq_n_u8): Remove.
26659 (vrshrq_n_s8): Remove.
26660 (vrshrq_n_u16): Remove.
26661 (vrshrq_n_s16): Remove.
26662 (vrshrq_n_u32): Remove.
26663 (vrshrq_n_s32): Remove.
26664 (vrshrq_m_n_s8): Remove.
26665 (vrshrq_m_n_s32): Remove.
26666 (vrshrq_m_n_s16): Remove.
26667 (vrshrq_m_n_u8): Remove.
26668 (vrshrq_m_n_u32): Remove.
26669 (vrshrq_m_n_u16): Remove.
26670 (vshrq_m_n_s8): Remove.
26671 (vshrq_m_n_s32): Remove.
26672 (vshrq_m_n_s16): Remove.
26673 (vshrq_m_n_u8): Remove.
26674 (vshrq_m_n_u32): Remove.
26675 (vshrq_m_n_u16): Remove.
26676 (vrshrq_x_n_s8): Remove.
26677 (vrshrq_x_n_s16): Remove.
26678 (vrshrq_x_n_s32): Remove.
26679 (vrshrq_x_n_u8): Remove.
26680 (vrshrq_x_n_u16): Remove.
26681 (vrshrq_x_n_u32): Remove.
26682 (vshrq_x_n_s8): Remove.
26683 (vshrq_x_n_s16): Remove.
26684 (vshrq_x_n_s32): Remove.
26685 (vshrq_x_n_u8): Remove.
26686 (vshrq_x_n_u16): Remove.
26687 (vshrq_x_n_u32): Remove.
26688 (__arm_vshrq_n_s8): Remove.
26689 (__arm_vshrq_n_s16): Remove.
26690 (__arm_vshrq_n_s32): Remove.
26691 (__arm_vshrq_n_u8): Remove.
26692 (__arm_vshrq_n_u16): Remove.
26693 (__arm_vshrq_n_u32): Remove.
26694 (__arm_vrshrq_n_u8): Remove.
26695 (__arm_vrshrq_n_s8): Remove.
26696 (__arm_vrshrq_n_u16): Remove.
26697 (__arm_vrshrq_n_s16): Remove.
26698 (__arm_vrshrq_n_u32): Remove.
26699 (__arm_vrshrq_n_s32): Remove.
26700 (__arm_vrshrq_m_n_s8): Remove.
26701 (__arm_vrshrq_m_n_s32): Remove.
26702 (__arm_vrshrq_m_n_s16): Remove.
26703 (__arm_vrshrq_m_n_u8): Remove.
26704 (__arm_vrshrq_m_n_u32): Remove.
26705 (__arm_vrshrq_m_n_u16): Remove.
26706 (__arm_vshrq_m_n_s8): Remove.
26707 (__arm_vshrq_m_n_s32): Remove.
26708 (__arm_vshrq_m_n_s16): Remove.
26709 (__arm_vshrq_m_n_u8): Remove.
26710 (__arm_vshrq_m_n_u32): Remove.
26711 (__arm_vshrq_m_n_u16): Remove.
26712 (__arm_vrshrq_x_n_s8): Remove.
26713 (__arm_vrshrq_x_n_s16): Remove.
26714 (__arm_vrshrq_x_n_s32): Remove.
26715 (__arm_vrshrq_x_n_u8): Remove.
26716 (__arm_vrshrq_x_n_u16): Remove.
26717 (__arm_vrshrq_x_n_u32): Remove.
26718 (__arm_vshrq_x_n_s8): Remove.
26719 (__arm_vshrq_x_n_s16): Remove.
26720 (__arm_vshrq_x_n_s32): Remove.
26721 (__arm_vshrq_x_n_u8): Remove.
26722 (__arm_vshrq_x_n_u16): Remove.
26723 (__arm_vshrq_x_n_u32): Remove.
26724 (__arm_vshrq): Remove.
26725 (__arm_vrshrq): Remove.
26726 (__arm_vrshrq_m): Remove.
26727 (__arm_vshrq_m): Remove.
26728 (__arm_vrshrq_x): Remove.
26729 (__arm_vshrq_x): Remove.
26731 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26733 * config/arm/iterators.md (MVE_VSHRQ_M_N, MVE_VSHRQ_N): New.
26734 (mve_insn): Add vrshr, vshr.
26735 * config/arm/mve.md (mve_vshrq_n_<supf><mode>)
26736 (mve_vrshrq_n_<supf><mode>): Merge into ...
26737 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
26738 (mve_vrshrq_m_n_<supf><mode>, mve_vshrq_m_n_<supf><mode>): Merge
26740 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
26742 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26744 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift): New.
26745 * config/arm/arm-mve-builtins-shapes.h (binary_rshift): New.
26747 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26749 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_U_F): New.
26750 (vqshrunbq, vqshruntq, vqrshrunbq, vqrshruntq): New.
26751 * config/arm/arm-mve-builtins-base.def (vqshrunbq, vqshruntq)
26752 (vqrshrunbq, vqrshruntq): New.
26753 * config/arm/arm-mve-builtins-base.h (vqshrunbq, vqshruntq)
26754 (vqrshrunbq, vqrshruntq): New.
26755 * config/arm/arm-mve-builtins.cc
26756 (function_instance::has_inactive_argument): Handle vqshrunbq,
26757 vqshruntq, vqrshrunbq, vqrshruntq.
26758 * config/arm/arm_mve.h (vqrshrunbq): Remove.
26759 (vqrshruntq): Remove.
26760 (vqrshrunbq_m): Remove.
26761 (vqrshruntq_m): Remove.
26762 (vqrshrunbq_n_s16): Remove.
26763 (vqrshrunbq_n_s32): Remove.
26764 (vqrshruntq_n_s16): Remove.
26765 (vqrshruntq_n_s32): Remove.
26766 (vqrshrunbq_m_n_s32): Remove.
26767 (vqrshrunbq_m_n_s16): Remove.
26768 (vqrshruntq_m_n_s32): Remove.
26769 (vqrshruntq_m_n_s16): Remove.
26770 (__arm_vqrshrunbq_n_s16): Remove.
26771 (__arm_vqrshrunbq_n_s32): Remove.
26772 (__arm_vqrshruntq_n_s16): Remove.
26773 (__arm_vqrshruntq_n_s32): Remove.
26774 (__arm_vqrshrunbq_m_n_s32): Remove.
26775 (__arm_vqrshrunbq_m_n_s16): Remove.
26776 (__arm_vqrshruntq_m_n_s32): Remove.
26777 (__arm_vqrshruntq_m_n_s16): Remove.
26778 (__arm_vqrshrunbq): Remove.
26779 (__arm_vqrshruntq): Remove.
26780 (__arm_vqrshrunbq_m): Remove.
26781 (__arm_vqrshruntq_m): Remove.
26782 (vqshrunbq): Remove.
26783 (vqshruntq): Remove.
26784 (vqshrunbq_m): Remove.
26785 (vqshruntq_m): Remove.
26786 (vqshrunbq_n_s16): Remove.
26787 (vqshruntq_n_s16): Remove.
26788 (vqshrunbq_n_s32): Remove.
26789 (vqshruntq_n_s32): Remove.
26790 (vqshrunbq_m_n_s32): Remove.
26791 (vqshrunbq_m_n_s16): Remove.
26792 (vqshruntq_m_n_s32): Remove.
26793 (vqshruntq_m_n_s16): Remove.
26794 (__arm_vqshrunbq_n_s16): Remove.
26795 (__arm_vqshruntq_n_s16): Remove.
26796 (__arm_vqshrunbq_n_s32): Remove.
26797 (__arm_vqshruntq_n_s32): Remove.
26798 (__arm_vqshrunbq_m_n_s32): Remove.
26799 (__arm_vqshrunbq_m_n_s16): Remove.
26800 (__arm_vqshruntq_m_n_s32): Remove.
26801 (__arm_vqshruntq_m_n_s16): Remove.
26802 (__arm_vqshrunbq): Remove.
26803 (__arm_vqshruntq): Remove.
26804 (__arm_vqshrunbq_m): Remove.
26805 (__arm_vqshruntq_m): Remove.
26807 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26809 * config/arm/iterators.md (MVE_SHRN_N): Add VQRSHRUNBQ,
26810 VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
26811 (MVE_SHRN_M_N): Likewise.
26812 (mve_insn): Add vqrshrunb, vqrshrunt, vqshrunb, vqshrunt.
26813 (isu): Add VQRSHRUNBQ, VQRSHRUNTQ, VQSHRUNBQ, VQSHRUNTQ.
26815 * config/arm/mve.md (mve_vqrshrunbq_n_s<mode>): Remove.
26816 (mve_vqrshruntq_n_s<mode>): Remove.
26817 (mve_vqshrunbq_n_s<mode>): Remove.
26818 (mve_vqshruntq_n_s<mode>): Remove.
26819 (mve_vqrshrunbq_m_n_s<mode>): Remove.
26820 (mve_vqrshruntq_m_n_s<mode>): Remove.
26821 (mve_vqshrunbq_m_n_s<mode>): Remove.
26822 (mve_vqshruntq_m_n_s<mode>): Remove.
26824 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26826 * config/arm/arm-mve-builtins-shapes.cc
26827 (binary_rshift_narrow_unsigned): New.
26828 * config/arm/arm-mve-builtins-shapes.h
26829 (binary_rshift_narrow_unsigned): New.
26831 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
26833 * config/arm/arm-mve-builtins-base.cc (FUNCTION_ONLY_N_NO_F): New.
26834 (vshrnbq, vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq)
26835 (vqrshrnbq, vqrshrntq): New.
26836 * config/arm/arm-mve-builtins-base.def (vshrnbq, vshrntq)
26837 (vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq):
26839 * config/arm/arm-mve-builtins-base.h (vshrnbq, vshrntq, vrshrnbq)
26840 (vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq, vqrshrntq): New.
26841 * config/arm/arm-mve-builtins.cc
26842 (function_instance::has_inactive_argument): Handle vshrnbq,
26843 vshrntq, vrshrnbq, vrshrntq, vqshrnbq, vqshrntq, vqrshrnbq,
26845 * config/arm/arm_mve.h (vshrnbq): Remove.
26847 (vshrnbq_m): Remove.
26848 (vshrntq_m): Remove.
26849 (vshrnbq_n_s16): Remove.
26850 (vshrntq_n_s16): Remove.
26851 (vshrnbq_n_u16): Remove.
26852 (vshrntq_n_u16): Remove.
26853 (vshrnbq_n_s32): Remove.
26854 (vshrntq_n_s32): Remove.
26855 (vshrnbq_n_u32): Remove.
26856 (vshrntq_n_u32): Remove.
26857 (vshrnbq_m_n_s32): Remove.
26858 (vshrnbq_m_n_s16): Remove.
26859 (vshrnbq_m_n_u32): Remove.
26860 (vshrnbq_m_n_u16): Remove.
26861 (vshrntq_m_n_s32): Remove.
26862 (vshrntq_m_n_s16): Remove.
26863 (vshrntq_m_n_u32): Remove.
26864 (vshrntq_m_n_u16): Remove.
26865 (__arm_vshrnbq_n_s16): Remove.
26866 (__arm_vshrntq_n_s16): Remove.
26867 (__arm_vshrnbq_n_u16): Remove.
26868 (__arm_vshrntq_n_u16): Remove.
26869 (__arm_vshrnbq_n_s32): Remove.
26870 (__arm_vshrntq_n_s32): Remove.
26871 (__arm_vshrnbq_n_u32): Remove.
26872 (__arm_vshrntq_n_u32): Remove.
26873 (__arm_vshrnbq_m_n_s32): Remove.
26874 (__arm_vshrnbq_m_n_s16): Remove.
26875 (__arm_vshrnbq_m_n_u32): Remove.
26876 (__arm_vshrnbq_m_n_u16): Remove.
26877 (__arm_vshrntq_m_n_s32): Remove.
26878 (__arm_vshrntq_m_n_s16): Remove.
26879 (__arm_vshrntq_m_n_u32): Remove.
26880 (__arm_vshrntq_m_n_u16): Remove.
26881 (__arm_vshrnbq): Remove.
26882 (__arm_vshrntq): Remove.
26883 (__arm_vshrnbq_m): Remove.
26884 (__arm_vshrntq_m): Remove.
26885 (vrshrnbq): Remove.
26886 (vrshrntq): Remove.
26887 (vrshrnbq_m): Remove.
26888 (vrshrntq_m): Remove.
26889 (vrshrnbq_n_s16): Remove.
26890 (vrshrntq_n_s16): Remove.
26891 (vrshrnbq_n_u16): Remove.
26892 (vrshrntq_n_u16): Remove.
26893 (vrshrnbq_n_s32): Remove.
26894 (vrshrntq_n_s32): Remove.
26895 (vrshrnbq_n_u32): Remove.
26896 (vrshrntq_n_u32): Remove.
26897 (vrshrnbq_m_n_s32): Remove.
26898 (vrshrnbq_m_n_s16): Remove.
26899 (vrshrnbq_m_n_u32): Remove.
26900 (vrshrnbq_m_n_u16): Remove.
26901 (vrshrntq_m_n_s32): Remove.
26902 (vrshrntq_m_n_s16): Remove.
26903 (vrshrntq_m_n_u32): Remove.
26904 (vrshrntq_m_n_u16): Remove.
26905 (__arm_vrshrnbq_n_s16): Remove.
26906 (__arm_vrshrntq_n_s16): Remove.
26907 (__arm_vrshrnbq_n_u16): Remove.
26908 (__arm_vrshrntq_n_u16): Remove.
26909 (__arm_vrshrnbq_n_s32): Remove.
26910 (__arm_vrshrntq_n_s32): Remove.
26911 (__arm_vrshrnbq_n_u32): Remove.
26912 (__arm_vrshrntq_n_u32): Remove.
26913 (__arm_vrshrnbq_m_n_s32): Remove.
26914 (__arm_vrshrnbq_m_n_s16): Remove.
26915 (__arm_vrshrnbq_m_n_u32): Remove.
26916 (__arm_vrshrnbq_m_n_u16): Remove.
26917 (__arm_vrshrntq_m_n_s32): Remove.
26918 (__arm_vrshrntq_m_n_s16): Remove.
26919 (__arm_vrshrntq_m_n_u32): Remove.
26920 (__arm_vrshrntq_m_n_u16): Remove.
26921 (__arm_vrshrnbq): Remove.
26922 (__arm_vrshrntq): Remove.
26923 (__arm_vrshrnbq_m): Remove.
26924 (__arm_vrshrntq_m): Remove.
26925 (vqshrnbq): Remove.
26926 (vqshrntq): Remove.
26927 (vqshrnbq_m): Remove.
26928 (vqshrntq_m): Remove.
26929 (vqshrnbq_n_s16): Remove.
26930 (vqshrntq_n_s16): Remove.
26931 (vqshrnbq_n_u16): Remove.
26932 (vqshrntq_n_u16): Remove.
26933 (vqshrnbq_n_s32): Remove.
26934 (vqshrntq_n_s32): Remove.
26935 (vqshrnbq_n_u32): Remove.
26936 (vqshrntq_n_u32): Remove.
26937 (vqshrnbq_m_n_s32): Remove.
26938 (vqshrnbq_m_n_s16): Remove.
26939 (vqshrnbq_m_n_u32): Remove.
26940 (vqshrnbq_m_n_u16): Remove.
26941 (vqshrntq_m_n_s32): Remove.
26942 (vqshrntq_m_n_s16): Remove.
26943 (vqshrntq_m_n_u32): Remove.
26944 (vqshrntq_m_n_u16): Remove.
26945 (__arm_vqshrnbq_n_s16): Remove.
26946 (__arm_vqshrntq_n_s16): Remove.
26947 (__arm_vqshrnbq_n_u16): Remove.
26948 (__arm_vqshrntq_n_u16): Remove.
26949 (__arm_vqshrnbq_n_s32): Remove.
26950 (__arm_vqshrntq_n_s32): Remove.
26951 (__arm_vqshrnbq_n_u32): Remove.
26952 (__arm_vqshrntq_n_u32): Remove.
26953 (__arm_vqshrnbq_m_n_s32): Remove.
26954 (__arm_vqshrnbq_m_n_s16): Remove.
26955 (__arm_vqshrnbq_m_n_u32): Remove.
26956 (__arm_vqshrnbq_m_n_u16): Remove.
26957 (__arm_vqshrntq_m_n_s32): Remove.
26958 (__arm_vqshrntq_m_n_s16): Remove.
26959 (__arm_vqshrntq_m_n_u32): Remove.
26960 (__arm_vqshrntq_m_n_u16): Remove.
26961 (__arm_vqshrnbq): Remove.
26962 (__arm_vqshrntq): Remove.
26963 (__arm_vqshrnbq_m): Remove.
26964 (__arm_vqshrntq_m): Remove.
26965 (vqrshrnbq): Remove.
26966 (vqrshrntq): Remove.
26967 (vqrshrnbq_m): Remove.
26968 (vqrshrntq_m): Remove.
26969 (vqrshrnbq_n_s16): Remove.
26970 (vqrshrnbq_n_u16): Remove.
26971 (vqrshrnbq_n_s32): Remove.
26972 (vqrshrnbq_n_u32): Remove.
26973 (vqrshrntq_n_s16): Remove.
26974 (vqrshrntq_n_u16): Remove.
26975 (vqrshrntq_n_s32): Remove.
26976 (vqrshrntq_n_u32): Remove.
26977 (vqrshrnbq_m_n_s32): Remove.
26978 (vqrshrnbq_m_n_s16): Remove.
26979 (vqrshrnbq_m_n_u32): Remove.
26980 (vqrshrnbq_m_n_u16): Remove.
26981 (vqrshrntq_m_n_s32): Remove.
26982 (vqrshrntq_m_n_s16): Remove.
26983 (vqrshrntq_m_n_u32): Remove.
26984 (vqrshrntq_m_n_u16): Remove.
26985 (__arm_vqrshrnbq_n_s16): Remove.
26986 (__arm_vqrshrnbq_n_u16): Remove.
26987 (__arm_vqrshrnbq_n_s32): Remove.
26988 (__arm_vqrshrnbq_n_u32): Remove.
26989 (__arm_vqrshrntq_n_s16): Remove.
26990 (__arm_vqrshrntq_n_u16): Remove.
26991 (__arm_vqrshrntq_n_s32): Remove.
26992 (__arm_vqrshrntq_n_u32): Remove.
26993 (__arm_vqrshrnbq_m_n_s32): Remove.
26994 (__arm_vqrshrnbq_m_n_s16): Remove.
26995 (__arm_vqrshrnbq_m_n_u32): Remove.
26996 (__arm_vqrshrnbq_m_n_u16): Remove.
26997 (__arm_vqrshrntq_m_n_s32): Remove.
26998 (__arm_vqrshrntq_m_n_s16): Remove.
26999 (__arm_vqrshrntq_m_n_u32): Remove.
27000 (__arm_vqrshrntq_m_n_u16): Remove.
27001 (__arm_vqrshrnbq): Remove.
27002 (__arm_vqrshrntq): Remove.
27003 (__arm_vqrshrnbq_m): Remove.
27004 (__arm_vqrshrntq_m): Remove.
27006 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27008 * config/arm/iterators.md (MVE_SHRN_N, MVE_SHRN_M_N): New.
27009 (mve_insn): Add vqrshrnb, vqrshrnt, vqshrnb, vqshrnt, vrshrnb,
27010 vrshrnt, vshrnb, vshrnt.
27012 * config/arm/mve.md (mve_vqrshrnbq_n_<supf><mode>)
27013 (mve_vqrshrntq_n_<supf><mode>, mve_vqshrnbq_n_<supf><mode>)
27014 (mve_vqshrntq_n_<supf><mode>, mve_vrshrnbq_n_<supf><mode>)
27015 (mve_vrshrntq_n_<supf><mode>, mve_vshrnbq_n_<supf><mode>)
27016 (mve_vshrntq_n_<supf><mode>): Merge into ...
27017 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27018 (mve_vqrshrnbq_m_n_<supf><mode>, mve_vqrshrntq_m_n_<supf><mode>)
27019 (mve_vqshrnbq_m_n_<supf><mode>, mve_vqshrntq_m_n_<supf><mode>)
27020 (mve_vrshrnbq_m_n_<supf><mode>, mve_vrshrntq_m_n_<supf><mode>)
27021 (mve_vshrnbq_m_n_<supf><mode>, mve_vshrntq_m_n_<supf><mode>):
27023 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27025 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27027 * config/arm/arm-mve-builtins-shapes.cc (binary_rshift_narrow):
27029 * config/arm/arm-mve-builtins-shapes.h (binary_rshift_narrow): New.
27031 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27033 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_NO_F): New.
27034 (vmaxq, vminq): New.
27035 * config/arm/arm-mve-builtins-base.def (vmaxq, vminq): New.
27036 * config/arm/arm-mve-builtins-base.h (vmaxq, vminq): New.
27037 * config/arm/arm_mve.h (vminq): Remove.
27043 (vminq_u8): Remove.
27044 (vmaxq_u8): Remove.
27045 (vminq_s8): Remove.
27046 (vmaxq_s8): Remove.
27047 (vminq_u16): Remove.
27048 (vmaxq_u16): Remove.
27049 (vminq_s16): Remove.
27050 (vmaxq_s16): Remove.
27051 (vminq_u32): Remove.
27052 (vmaxq_u32): Remove.
27053 (vminq_s32): Remove.
27054 (vmaxq_s32): Remove.
27055 (vmaxq_m_s8): Remove.
27056 (vmaxq_m_s32): Remove.
27057 (vmaxq_m_s16): Remove.
27058 (vmaxq_m_u8): Remove.
27059 (vmaxq_m_u32): Remove.
27060 (vmaxq_m_u16): Remove.
27061 (vminq_m_s8): Remove.
27062 (vminq_m_s32): Remove.
27063 (vminq_m_s16): Remove.
27064 (vminq_m_u8): Remove.
27065 (vminq_m_u32): Remove.
27066 (vminq_m_u16): Remove.
27067 (vminq_x_s8): Remove.
27068 (vminq_x_s16): Remove.
27069 (vminq_x_s32): Remove.
27070 (vminq_x_u8): Remove.
27071 (vminq_x_u16): Remove.
27072 (vminq_x_u32): Remove.
27073 (vmaxq_x_s8): Remove.
27074 (vmaxq_x_s16): Remove.
27075 (vmaxq_x_s32): Remove.
27076 (vmaxq_x_u8): Remove.
27077 (vmaxq_x_u16): Remove.
27078 (vmaxq_x_u32): Remove.
27079 (__arm_vminq_u8): Remove.
27080 (__arm_vmaxq_u8): Remove.
27081 (__arm_vminq_s8): Remove.
27082 (__arm_vmaxq_s8): Remove.
27083 (__arm_vminq_u16): Remove.
27084 (__arm_vmaxq_u16): Remove.
27085 (__arm_vminq_s16): Remove.
27086 (__arm_vmaxq_s16): Remove.
27087 (__arm_vminq_u32): Remove.
27088 (__arm_vmaxq_u32): Remove.
27089 (__arm_vminq_s32): Remove.
27090 (__arm_vmaxq_s32): Remove.
27091 (__arm_vmaxq_m_s8): Remove.
27092 (__arm_vmaxq_m_s32): Remove.
27093 (__arm_vmaxq_m_s16): Remove.
27094 (__arm_vmaxq_m_u8): Remove.
27095 (__arm_vmaxq_m_u32): Remove.
27096 (__arm_vmaxq_m_u16): Remove.
27097 (__arm_vminq_m_s8): Remove.
27098 (__arm_vminq_m_s32): Remove.
27099 (__arm_vminq_m_s16): Remove.
27100 (__arm_vminq_m_u8): Remove.
27101 (__arm_vminq_m_u32): Remove.
27102 (__arm_vminq_m_u16): Remove.
27103 (__arm_vminq_x_s8): Remove.
27104 (__arm_vminq_x_s16): Remove.
27105 (__arm_vminq_x_s32): Remove.
27106 (__arm_vminq_x_u8): Remove.
27107 (__arm_vminq_x_u16): Remove.
27108 (__arm_vminq_x_u32): Remove.
27109 (__arm_vmaxq_x_s8): Remove.
27110 (__arm_vmaxq_x_s16): Remove.
27111 (__arm_vmaxq_x_s32): Remove.
27112 (__arm_vmaxq_x_u8): Remove.
27113 (__arm_vmaxq_x_u16): Remove.
27114 (__arm_vmaxq_x_u32): Remove.
27115 (__arm_vminq): Remove.
27116 (__arm_vmaxq): Remove.
27117 (__arm_vmaxq_m): Remove.
27118 (__arm_vminq_m): Remove.
27119 (__arm_vminq_x): Remove.
27120 (__arm_vmaxq_x): Remove.
27122 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27124 * config/arm/iterators.md (MAX_MIN_SU): New.
27125 (max_min_su_str): New.
27126 (max_min_supf): New.
27127 * config/arm/mve.md (mve_vmaxq_s<mode>, mve_vmaxq_u<mode>)
27128 (mve_vminq_s<mode>, mve_vminq_u<mode>): Merge into ...
27129 (mve_<max_min_su_str>q_<max_min_supf><mode>): ... this.
27131 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27133 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_R): New.
27134 (vqshlq, vshlq): New.
27135 * config/arm/arm-mve-builtins-base.def (vqshlq, vshlq): New.
27136 * config/arm/arm-mve-builtins-base.h (vqshlq, vshlq): New.
27137 * config/arm/arm_mve.h (vshlq): Remove.
27140 (vshlq_m_r): Remove.
27142 (vshlq_m_n): Remove.
27144 (vshlq_x_n): Remove.
27145 (vshlq_s8): Remove.
27146 (vshlq_s16): Remove.
27147 (vshlq_s32): Remove.
27148 (vshlq_u8): Remove.
27149 (vshlq_u16): Remove.
27150 (vshlq_u32): Remove.
27151 (vshlq_r_u8): Remove.
27152 (vshlq_n_u8): Remove.
27153 (vshlq_r_s8): Remove.
27154 (vshlq_n_s8): Remove.
27155 (vshlq_r_u16): Remove.
27156 (vshlq_n_u16): Remove.
27157 (vshlq_r_s16): Remove.
27158 (vshlq_n_s16): Remove.
27159 (vshlq_r_u32): Remove.
27160 (vshlq_n_u32): Remove.
27161 (vshlq_r_s32): Remove.
27162 (vshlq_n_s32): Remove.
27163 (vshlq_m_r_u8): Remove.
27164 (vshlq_m_r_s8): Remove.
27165 (vshlq_m_r_u16): Remove.
27166 (vshlq_m_r_s16): Remove.
27167 (vshlq_m_r_u32): Remove.
27168 (vshlq_m_r_s32): Remove.
27169 (vshlq_m_u8): Remove.
27170 (vshlq_m_s8): Remove.
27171 (vshlq_m_u16): Remove.
27172 (vshlq_m_s16): Remove.
27173 (vshlq_m_u32): Remove.
27174 (vshlq_m_s32): Remove.
27175 (vshlq_m_n_s8): Remove.
27176 (vshlq_m_n_s32): Remove.
27177 (vshlq_m_n_s16): Remove.
27178 (vshlq_m_n_u8): Remove.
27179 (vshlq_m_n_u32): Remove.
27180 (vshlq_m_n_u16): Remove.
27181 (vshlq_x_s8): Remove.
27182 (vshlq_x_s16): Remove.
27183 (vshlq_x_s32): Remove.
27184 (vshlq_x_u8): Remove.
27185 (vshlq_x_u16): Remove.
27186 (vshlq_x_u32): Remove.
27187 (vshlq_x_n_s8): Remove.
27188 (vshlq_x_n_s16): Remove.
27189 (vshlq_x_n_s32): Remove.
27190 (vshlq_x_n_u8): Remove.
27191 (vshlq_x_n_u16): Remove.
27192 (vshlq_x_n_u32): Remove.
27193 (__arm_vshlq_s8): Remove.
27194 (__arm_vshlq_s16): Remove.
27195 (__arm_vshlq_s32): Remove.
27196 (__arm_vshlq_u8): Remove.
27197 (__arm_vshlq_u16): Remove.
27198 (__arm_vshlq_u32): Remove.
27199 (__arm_vshlq_r_u8): Remove.
27200 (__arm_vshlq_n_u8): Remove.
27201 (__arm_vshlq_r_s8): Remove.
27202 (__arm_vshlq_n_s8): Remove.
27203 (__arm_vshlq_r_u16): Remove.
27204 (__arm_vshlq_n_u16): Remove.
27205 (__arm_vshlq_r_s16): Remove.
27206 (__arm_vshlq_n_s16): Remove.
27207 (__arm_vshlq_r_u32): Remove.
27208 (__arm_vshlq_n_u32): Remove.
27209 (__arm_vshlq_r_s32): Remove.
27210 (__arm_vshlq_n_s32): Remove.
27211 (__arm_vshlq_m_r_u8): Remove.
27212 (__arm_vshlq_m_r_s8): Remove.
27213 (__arm_vshlq_m_r_u16): Remove.
27214 (__arm_vshlq_m_r_s16): Remove.
27215 (__arm_vshlq_m_r_u32): Remove.
27216 (__arm_vshlq_m_r_s32): Remove.
27217 (__arm_vshlq_m_u8): Remove.
27218 (__arm_vshlq_m_s8): Remove.
27219 (__arm_vshlq_m_u16): Remove.
27220 (__arm_vshlq_m_s16): Remove.
27221 (__arm_vshlq_m_u32): Remove.
27222 (__arm_vshlq_m_s32): Remove.
27223 (__arm_vshlq_m_n_s8): Remove.
27224 (__arm_vshlq_m_n_s32): Remove.
27225 (__arm_vshlq_m_n_s16): Remove.
27226 (__arm_vshlq_m_n_u8): Remove.
27227 (__arm_vshlq_m_n_u32): Remove.
27228 (__arm_vshlq_m_n_u16): Remove.
27229 (__arm_vshlq_x_s8): Remove.
27230 (__arm_vshlq_x_s16): Remove.
27231 (__arm_vshlq_x_s32): Remove.
27232 (__arm_vshlq_x_u8): Remove.
27233 (__arm_vshlq_x_u16): Remove.
27234 (__arm_vshlq_x_u32): Remove.
27235 (__arm_vshlq_x_n_s8): Remove.
27236 (__arm_vshlq_x_n_s16): Remove.
27237 (__arm_vshlq_x_n_s32): Remove.
27238 (__arm_vshlq_x_n_u8): Remove.
27239 (__arm_vshlq_x_n_u16): Remove.
27240 (__arm_vshlq_x_n_u32): Remove.
27241 (__arm_vshlq): Remove.
27242 (__arm_vshlq_r): Remove.
27243 (__arm_vshlq_n): Remove.
27244 (__arm_vshlq_m_r): Remove.
27245 (__arm_vshlq_m): Remove.
27246 (__arm_vshlq_m_n): Remove.
27247 (__arm_vshlq_x): Remove.
27248 (__arm_vshlq_x_n): Remove.
27250 (vqshlq_r): Remove.
27251 (vqshlq_n): Remove.
27252 (vqshlq_m_r): Remove.
27253 (vqshlq_m_n): Remove.
27254 (vqshlq_m): Remove.
27255 (vqshlq_u8): Remove.
27256 (vqshlq_r_u8): Remove.
27257 (vqshlq_n_u8): Remove.
27258 (vqshlq_s8): Remove.
27259 (vqshlq_r_s8): Remove.
27260 (vqshlq_n_s8): Remove.
27261 (vqshlq_u16): Remove.
27262 (vqshlq_r_u16): Remove.
27263 (vqshlq_n_u16): Remove.
27264 (vqshlq_s16): Remove.
27265 (vqshlq_r_s16): Remove.
27266 (vqshlq_n_s16): Remove.
27267 (vqshlq_u32): Remove.
27268 (vqshlq_r_u32): Remove.
27269 (vqshlq_n_u32): Remove.
27270 (vqshlq_s32): Remove.
27271 (vqshlq_r_s32): Remove.
27272 (vqshlq_n_s32): Remove.
27273 (vqshlq_m_r_u8): Remove.
27274 (vqshlq_m_r_s8): Remove.
27275 (vqshlq_m_r_u16): Remove.
27276 (vqshlq_m_r_s16): Remove.
27277 (vqshlq_m_r_u32): Remove.
27278 (vqshlq_m_r_s32): Remove.
27279 (vqshlq_m_n_s8): Remove.
27280 (vqshlq_m_n_s32): Remove.
27281 (vqshlq_m_n_s16): Remove.
27282 (vqshlq_m_n_u8): Remove.
27283 (vqshlq_m_n_u32): Remove.
27284 (vqshlq_m_n_u16): Remove.
27285 (vqshlq_m_s8): Remove.
27286 (vqshlq_m_s32): Remove.
27287 (vqshlq_m_s16): Remove.
27288 (vqshlq_m_u8): Remove.
27289 (vqshlq_m_u32): Remove.
27290 (vqshlq_m_u16): Remove.
27291 (__arm_vqshlq_u8): Remove.
27292 (__arm_vqshlq_r_u8): Remove.
27293 (__arm_vqshlq_n_u8): Remove.
27294 (__arm_vqshlq_s8): Remove.
27295 (__arm_vqshlq_r_s8): Remove.
27296 (__arm_vqshlq_n_s8): Remove.
27297 (__arm_vqshlq_u16): Remove.
27298 (__arm_vqshlq_r_u16): Remove.
27299 (__arm_vqshlq_n_u16): Remove.
27300 (__arm_vqshlq_s16): Remove.
27301 (__arm_vqshlq_r_s16): Remove.
27302 (__arm_vqshlq_n_s16): Remove.
27303 (__arm_vqshlq_u32): Remove.
27304 (__arm_vqshlq_r_u32): Remove.
27305 (__arm_vqshlq_n_u32): Remove.
27306 (__arm_vqshlq_s32): Remove.
27307 (__arm_vqshlq_r_s32): Remove.
27308 (__arm_vqshlq_n_s32): Remove.
27309 (__arm_vqshlq_m_r_u8): Remove.
27310 (__arm_vqshlq_m_r_s8): Remove.
27311 (__arm_vqshlq_m_r_u16): Remove.
27312 (__arm_vqshlq_m_r_s16): Remove.
27313 (__arm_vqshlq_m_r_u32): Remove.
27314 (__arm_vqshlq_m_r_s32): Remove.
27315 (__arm_vqshlq_m_n_s8): Remove.
27316 (__arm_vqshlq_m_n_s32): Remove.
27317 (__arm_vqshlq_m_n_s16): Remove.
27318 (__arm_vqshlq_m_n_u8): Remove.
27319 (__arm_vqshlq_m_n_u32): Remove.
27320 (__arm_vqshlq_m_n_u16): Remove.
27321 (__arm_vqshlq_m_s8): Remove.
27322 (__arm_vqshlq_m_s32): Remove.
27323 (__arm_vqshlq_m_s16): Remove.
27324 (__arm_vqshlq_m_u8): Remove.
27325 (__arm_vqshlq_m_u32): Remove.
27326 (__arm_vqshlq_m_u16): Remove.
27327 (__arm_vqshlq): Remove.
27328 (__arm_vqshlq_r): Remove.
27329 (__arm_vqshlq_n): Remove.
27330 (__arm_vqshlq_m_r): Remove.
27331 (__arm_vqshlq_m_n): Remove.
27332 (__arm_vqshlq_m): Remove.
27334 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27336 * config/arm/arm-mve-builtins-functions.h (class
27337 unspec_mve_function_exact_insn_vshl): New.
27339 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27341 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift_r): New.
27342 * config/arm/arm-mve-builtins-shapes.h (binary_lshift_r): New.
27344 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27346 * config/arm/arm-mve-builtins.cc (has_inactive_argument)
27347 (finish_opt_n_resolution): Handle MODE_r.
27348 * config/arm/arm-mve-builtins.def (r): New mode.
27350 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27352 * config/arm/arm-mve-builtins-shapes.cc (binary_lshift): New.
27353 * config/arm/arm-mve-builtins-shapes.h (binary_lshift): New.
27355 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27357 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_N): New.
27359 * config/arm/arm-mve-builtins-base.def (vabdq): New.
27360 * config/arm/arm-mve-builtins-base.h (vabdq): New.
27361 * config/arm/arm_mve.h (vabdq): Remove.
27364 (vabdq_u8): Remove.
27365 (vabdq_s8): Remove.
27366 (vabdq_u16): Remove.
27367 (vabdq_s16): Remove.
27368 (vabdq_u32): Remove.
27369 (vabdq_s32): Remove.
27370 (vabdq_f16): Remove.
27371 (vabdq_f32): Remove.
27372 (vabdq_m_s8): Remove.
27373 (vabdq_m_s32): Remove.
27374 (vabdq_m_s16): Remove.
27375 (vabdq_m_u8): Remove.
27376 (vabdq_m_u32): Remove.
27377 (vabdq_m_u16): Remove.
27378 (vabdq_m_f32): Remove.
27379 (vabdq_m_f16): Remove.
27380 (vabdq_x_s8): Remove.
27381 (vabdq_x_s16): Remove.
27382 (vabdq_x_s32): Remove.
27383 (vabdq_x_u8): Remove.
27384 (vabdq_x_u16): Remove.
27385 (vabdq_x_u32): Remove.
27386 (vabdq_x_f16): Remove.
27387 (vabdq_x_f32): Remove.
27388 (__arm_vabdq_u8): Remove.
27389 (__arm_vabdq_s8): Remove.
27390 (__arm_vabdq_u16): Remove.
27391 (__arm_vabdq_s16): Remove.
27392 (__arm_vabdq_u32): Remove.
27393 (__arm_vabdq_s32): Remove.
27394 (__arm_vabdq_m_s8): Remove.
27395 (__arm_vabdq_m_s32): Remove.
27396 (__arm_vabdq_m_s16): Remove.
27397 (__arm_vabdq_m_u8): Remove.
27398 (__arm_vabdq_m_u32): Remove.
27399 (__arm_vabdq_m_u16): Remove.
27400 (__arm_vabdq_x_s8): Remove.
27401 (__arm_vabdq_x_s16): Remove.
27402 (__arm_vabdq_x_s32): Remove.
27403 (__arm_vabdq_x_u8): Remove.
27404 (__arm_vabdq_x_u16): Remove.
27405 (__arm_vabdq_x_u32): Remove.
27406 (__arm_vabdq_f16): Remove.
27407 (__arm_vabdq_f32): Remove.
27408 (__arm_vabdq_m_f32): Remove.
27409 (__arm_vabdq_m_f16): Remove.
27410 (__arm_vabdq_x_f16): Remove.
27411 (__arm_vabdq_x_f32): Remove.
27412 (__arm_vabdq): Remove.
27413 (__arm_vabdq_m): Remove.
27414 (__arm_vabdq_x): Remove.
27416 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27418 * config/arm/iterators.md (MVE_FP_M_BINARY): Add vabdq.
27419 (MVE_FP_VABDQ_ONLY): New.
27420 (mve_insn): Add vabd.
27421 * config/arm/mve.md (mve_vabdq_f<mode>): Move into ...
27422 (@mve_<mve_insn>q_f<mode>): ... this.
27423 (mve_vabdq_m_f<mode>): Remove.
27425 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27427 * config/arm/arm-mve-builtins-base.cc (vqrdmulhq): New.
27428 * config/arm/arm-mve-builtins-base.def (vqrdmulhq): New.
27429 * config/arm/arm-mve-builtins-base.h (vqrdmulhq): New.
27430 * config/arm/arm_mve.h (vqrdmulhq): Remove.
27431 (vqrdmulhq_m): Remove.
27432 (vqrdmulhq_s8): Remove.
27433 (vqrdmulhq_n_s8): Remove.
27434 (vqrdmulhq_s16): Remove.
27435 (vqrdmulhq_n_s16): Remove.
27436 (vqrdmulhq_s32): Remove.
27437 (vqrdmulhq_n_s32): Remove.
27438 (vqrdmulhq_m_n_s8): Remove.
27439 (vqrdmulhq_m_n_s32): Remove.
27440 (vqrdmulhq_m_n_s16): Remove.
27441 (vqrdmulhq_m_s8): Remove.
27442 (vqrdmulhq_m_s32): Remove.
27443 (vqrdmulhq_m_s16): Remove.
27444 (__arm_vqrdmulhq_s8): Remove.
27445 (__arm_vqrdmulhq_n_s8): Remove.
27446 (__arm_vqrdmulhq_s16): Remove.
27447 (__arm_vqrdmulhq_n_s16): Remove.
27448 (__arm_vqrdmulhq_s32): Remove.
27449 (__arm_vqrdmulhq_n_s32): Remove.
27450 (__arm_vqrdmulhq_m_n_s8): Remove.
27451 (__arm_vqrdmulhq_m_n_s32): Remove.
27452 (__arm_vqrdmulhq_m_n_s16): Remove.
27453 (__arm_vqrdmulhq_m_s8): Remove.
27454 (__arm_vqrdmulhq_m_s32): Remove.
27455 (__arm_vqrdmulhq_m_s16): Remove.
27456 (__arm_vqrdmulhq): Remove.
27457 (__arm_vqrdmulhq_m): Remove.
27459 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27461 * config/arm/iterators.md (MVE_SHIFT_M_R, MVE_SHIFT_M_N)
27462 (MVE_SHIFT_N, MVE_SHIFT_R): New.
27463 (mve_insn): Add vqshl, vshl.
27464 * config/arm/mve.md (mve_vqshlq_n_<supf><mode>)
27465 (mve_vshlq_n_<supf><mode>): Merge into ...
27466 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27467 (mve_vqshlq_r_<supf><mode>, mve_vshlq_r_<supf><mode>): Merge into
27469 (@mve_<mve_insn>q_r_<supf><mode>): ... this.
27470 (mve_vqshlq_m_r_<supf><mode>, mve_vshlq_m_r_<supf><mode>): Merge
27472 (@mve_<mve_insn>q_m_r_<supf><mode>): ... this.
27473 (mve_vqshlq_m_n_<supf><mode>, mve_vshlq_m_n_<supf><mode>): Merge
27475 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27476 * config/arm/vec-common.md (mve_vshlq_<supf><mode>): Transform
27478 (@mve_<mve_insn>q_<supf><mode>): ... this.
27480 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27482 * config/arm/arm-mve-builtins-base.cc (vqrshlq, vrshlq): New.
27483 * config/arm/arm-mve-builtins-base.def (vqrshlq, vrshlq): New.
27484 * config/arm/arm-mve-builtins-base.h (vqrshlq, vrshlq): New.
27485 * config/arm/arm-mve-builtins.cc (has_inactive_argument): Handle
27487 * config/arm/arm_mve.h (vrshlq): Remove.
27488 (vrshlq_m_n): Remove.
27489 (vrshlq_m): Remove.
27490 (vrshlq_x): Remove.
27491 (vrshlq_u8): Remove.
27492 (vrshlq_n_u8): Remove.
27493 (vrshlq_s8): Remove.
27494 (vrshlq_n_s8): Remove.
27495 (vrshlq_u16): Remove.
27496 (vrshlq_n_u16): Remove.
27497 (vrshlq_s16): Remove.
27498 (vrshlq_n_s16): Remove.
27499 (vrshlq_u32): Remove.
27500 (vrshlq_n_u32): Remove.
27501 (vrshlq_s32): Remove.
27502 (vrshlq_n_s32): Remove.
27503 (vrshlq_m_n_u8): Remove.
27504 (vrshlq_m_n_s8): Remove.
27505 (vrshlq_m_n_u16): Remove.
27506 (vrshlq_m_n_s16): Remove.
27507 (vrshlq_m_n_u32): Remove.
27508 (vrshlq_m_n_s32): Remove.
27509 (vrshlq_m_s8): Remove.
27510 (vrshlq_m_s32): Remove.
27511 (vrshlq_m_s16): Remove.
27512 (vrshlq_m_u8): Remove.
27513 (vrshlq_m_u32): Remove.
27514 (vrshlq_m_u16): Remove.
27515 (vrshlq_x_s8): Remove.
27516 (vrshlq_x_s16): Remove.
27517 (vrshlq_x_s32): Remove.
27518 (vrshlq_x_u8): Remove.
27519 (vrshlq_x_u16): Remove.
27520 (vrshlq_x_u32): Remove.
27521 (__arm_vrshlq_u8): Remove.
27522 (__arm_vrshlq_n_u8): Remove.
27523 (__arm_vrshlq_s8): Remove.
27524 (__arm_vrshlq_n_s8): Remove.
27525 (__arm_vrshlq_u16): Remove.
27526 (__arm_vrshlq_n_u16): Remove.
27527 (__arm_vrshlq_s16): Remove.
27528 (__arm_vrshlq_n_s16): Remove.
27529 (__arm_vrshlq_u32): Remove.
27530 (__arm_vrshlq_n_u32): Remove.
27531 (__arm_vrshlq_s32): Remove.
27532 (__arm_vrshlq_n_s32): Remove.
27533 (__arm_vrshlq_m_n_u8): Remove.
27534 (__arm_vrshlq_m_n_s8): Remove.
27535 (__arm_vrshlq_m_n_u16): Remove.
27536 (__arm_vrshlq_m_n_s16): Remove.
27537 (__arm_vrshlq_m_n_u32): Remove.
27538 (__arm_vrshlq_m_n_s32): Remove.
27539 (__arm_vrshlq_m_s8): Remove.
27540 (__arm_vrshlq_m_s32): Remove.
27541 (__arm_vrshlq_m_s16): Remove.
27542 (__arm_vrshlq_m_u8): Remove.
27543 (__arm_vrshlq_m_u32): Remove.
27544 (__arm_vrshlq_m_u16): Remove.
27545 (__arm_vrshlq_x_s8): Remove.
27546 (__arm_vrshlq_x_s16): Remove.
27547 (__arm_vrshlq_x_s32): Remove.
27548 (__arm_vrshlq_x_u8): Remove.
27549 (__arm_vrshlq_x_u16): Remove.
27550 (__arm_vrshlq_x_u32): Remove.
27551 (__arm_vrshlq): Remove.
27552 (__arm_vrshlq_m_n): Remove.
27553 (__arm_vrshlq_m): Remove.
27554 (__arm_vrshlq_x): Remove.
27556 (vqrshlq_m_n): Remove.
27557 (vqrshlq_m): Remove.
27558 (vqrshlq_u8): Remove.
27559 (vqrshlq_n_u8): Remove.
27560 (vqrshlq_s8): Remove.
27561 (vqrshlq_n_s8): Remove.
27562 (vqrshlq_u16): Remove.
27563 (vqrshlq_n_u16): Remove.
27564 (vqrshlq_s16): Remove.
27565 (vqrshlq_n_s16): Remove.
27566 (vqrshlq_u32): Remove.
27567 (vqrshlq_n_u32): Remove.
27568 (vqrshlq_s32): Remove.
27569 (vqrshlq_n_s32): Remove.
27570 (vqrshlq_m_n_u8): Remove.
27571 (vqrshlq_m_n_s8): Remove.
27572 (vqrshlq_m_n_u16): Remove.
27573 (vqrshlq_m_n_s16): Remove.
27574 (vqrshlq_m_n_u32): Remove.
27575 (vqrshlq_m_n_s32): Remove.
27576 (vqrshlq_m_s8): Remove.
27577 (vqrshlq_m_s32): Remove.
27578 (vqrshlq_m_s16): Remove.
27579 (vqrshlq_m_u8): Remove.
27580 (vqrshlq_m_u32): Remove.
27581 (vqrshlq_m_u16): Remove.
27582 (__arm_vqrshlq_u8): Remove.
27583 (__arm_vqrshlq_n_u8): Remove.
27584 (__arm_vqrshlq_s8): Remove.
27585 (__arm_vqrshlq_n_s8): Remove.
27586 (__arm_vqrshlq_u16): Remove.
27587 (__arm_vqrshlq_n_u16): Remove.
27588 (__arm_vqrshlq_s16): Remove.
27589 (__arm_vqrshlq_n_s16): Remove.
27590 (__arm_vqrshlq_u32): Remove.
27591 (__arm_vqrshlq_n_u32): Remove.
27592 (__arm_vqrshlq_s32): Remove.
27593 (__arm_vqrshlq_n_s32): Remove.
27594 (__arm_vqrshlq_m_n_u8): Remove.
27595 (__arm_vqrshlq_m_n_s8): Remove.
27596 (__arm_vqrshlq_m_n_u16): Remove.
27597 (__arm_vqrshlq_m_n_s16): Remove.
27598 (__arm_vqrshlq_m_n_u32): Remove.
27599 (__arm_vqrshlq_m_n_s32): Remove.
27600 (__arm_vqrshlq_m_s8): Remove.
27601 (__arm_vqrshlq_m_s32): Remove.
27602 (__arm_vqrshlq_m_s16): Remove.
27603 (__arm_vqrshlq_m_u8): Remove.
27604 (__arm_vqrshlq_m_u32): Remove.
27605 (__arm_vqrshlq_m_u16): Remove.
27606 (__arm_vqrshlq): Remove.
27607 (__arm_vqrshlq_m_n): Remove.
27608 (__arm_vqrshlq_m): Remove.
27610 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27612 * config/arm/iterators.md (MVE_RSHIFT_M_N, MVE_RSHIFT_N): New.
27613 (mve_insn): Add vqrshl, vrshl.
27614 * config/arm/mve.md (mve_vqrshlq_n_<supf><mode>)
27615 (mve_vrshlq_n_<supf><mode>): Merge into ...
27616 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
27617 (mve_vqrshlq_m_n_<supf><mode>, mve_vrshlq_m_n_<supf><mode>): Merge
27619 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
27621 2023-05-05 Christophe Lyon <christophe.lyon@arm.com>
27623 * config/arm/arm-mve-builtins-shapes.cc (binary_round_lshift): New.
27624 * config/arm/arm-mve-builtins-shapes.h (binary_round_lshift): New.
27626 2023-05-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
27629 * config/riscv/riscv-vsetvl.cc (avl_info::multiple_source_equal_p): Add
27630 denegrate PHI optmization.
27632 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
27634 * config/i386/predicates.md (register_no_SP_operand):
27635 Rename from index_register_operand.
27636 (call_register_operand): Update for rename.
27637 * config/i386/i386.md (*lea<mode>_general_[1234]): Update for rename.
27639 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27642 * Makefile.in (NUM_MATCH_SPLITS, MATCH_SPLITS_SEQ,
27643 GIMPLE_MATCH_PD_SEQ_SRC, GIMPLE_MATCH_PD_SEQ_O,
27644 GENERIC_MATCH_PD_SEQ_SRC, GENERIC_MATCH_PD_SEQ_O): New.
27645 (OBJS, MOSTLYCLEANFILES, .PRECIOUS): Use them.
27646 (s-match): Split into s-generic-match and s-gimple-match.
27647 * configure.ac (with-matchpd-partitions,
27648 DEFAULT_MATCHPD_PARTITIONS): New.
27649 * configure: Regenerate.
27651 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27654 * genmatch.cc (emit_func, SIZED_BASED_CHUNKS, get_out_file): New.
27655 (decision_tree::gen): Accept list of files instead of single and update
27656 to write function definition to header and main file.
27657 (write_predicate): Likewise.
27658 (write_header): Emit pragmas and new includes.
27659 (main): Create file buffers and cleanup.
27660 (showUsage, write_header_includes): New.
27662 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27665 * Makefile.in (OBJS): Add gimple-match-exports.o.
27666 * genmatch.cc (decision_tree::gen): Export gimple_gimplify helpers.
27667 * gimple-match-head.cc (gimple_simplify, gimple_resimplify1,
27668 gimple_resimplify2, gimple_resimplify3, gimple_resimplify4,
27669 gimple_resimplify5, constant_for_folding, convert_conditional_op,
27670 maybe_resimplify_conditional_op, gimple_match_op::resimplify,
27671 maybe_build_generic_op, build_call_internal, maybe_push_res_to_seq,
27672 do_valueize, try_conditional_simplification, gimple_extract,
27673 gimple_extract_op, canonicalize_code, commutative_binary_op_p,
27674 commutative_ternary_op_p, first_commutative_argument,
27675 associative_binary_op_p, directly_supported_p,
27676 get_conditional_internal_fn): Moved to gimple-match-exports.cc
27677 * gimple-match-exports.cc: New file.
27679 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27682 * genmatch.cc (decision_tree::gen, write_predicate): Generate new
27684 (dt_simplify::gen_1): Use it.
27686 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27689 * genmatch.cc (output_line_directive): Only emit commented directive
27692 2023-05-05 Tamar Christina <tamar.christina@arm.com>
27695 * genmatch.cc (dt_simplify::gen_1): Only emit labels if used.
27697 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
27699 * config/gcn/gcn.cc (gcn_vectorize_builtin_vectorized_function): Remove
27700 unused in_mode/in_n variables.
27702 2023-05-05 Richard Biener <rguenther@suse.de>
27704 PR tree-optimization/109735
27705 * tree-vect-stmts.cc (vectorizable_operation): Perform
27706 conversion for POINTER_DIFF_EXPR unconditionally.
27708 2023-05-05 Uros Bizjak <ubizjak@gmail.com>
27710 * config/i386/mmx.md (mulv2si3): New expander.
27711 (*mulv2si3): New insn pattern.
27713 2023-05-05 Tobias Burnus <tobias@codesourcery.com>
27714 Thomas Schwinge <thomas@codesourcery.com>
27717 * config/nvptx/mkoffload.cc (process): Emit dummy procedure
27718 alongside reverse-offload function table to prevent NULL values
27719 of the function addresses.
27721 2023-05-05 Jakub Jelinek <jakub@redhat.com>
27723 * builtins.cc (do_mpfr_ckconv, do_mpc_ckconv): Fix comment typo,
27725 * fold-const-call.cc (do_mpfr_ckconv, do_mpc_ckconv): Likewise.
27727 2023-05-05 Andrew Pinski <apinski@marvell.com>
27729 PR tree-optimization/109732
27730 * tree-ssa-phiopt.cc (match_simplify_replacement): Fix the selection
27731 of the argtrue/argfalse.
27733 2023-05-05 Andrew Pinski <apinski@marvell.com>
27735 PR tree-optimization/109722
27736 * match.pd: Extend the `ABS<a> == 0` pattern
27737 to cover `ABSU<a> == 0` too.
27739 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
27742 * config/i386/predicates.md (index_reg_operand): New predicate.
27743 * config/i386/i386.md (ashift to lea spliter): Use
27744 general_reg_operand and index_reg_operand predicates.
27746 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27748 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn2<mode>_insn_le):
27749 Rename and reimplement with RTL codes to...
27750 (aarch64_<optab>hn2<mode>_insn_le): .. This.
27751 (aarch64_r<optab>hn2<mode>_insn_le): New pattern.
27752 (aarch64_<sur><addsub>hn2<mode>_insn_be): Rename and reimplement with RTL
27754 (aarch64_<optab>hn2<mode>_insn_be): ... This.
27755 (aarch64_r<optab>hn2<mode>_insn_be): New pattern.
27756 (aarch64_<sur><addsub>hn2<mode>): Rename and adjust expander to...
27757 (aarch64_<optab>hn2<mode>): ... This.
27758 (aarch64_r<optab>hn2<mode>): New expander.
27759 * config/aarch64/iterators.md (UNSPEC_ADDHN, UNSPEC_RADDHN,
27760 UNSPEC_SUBHN, UNSPEC_RSUBHN): Delete unspecs.
27761 (ADDSUBHN): Delete.
27762 (sur): Remove handling of the above.
27763 (addsub): Likewise.
27765 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27767 * config/aarch64/aarch64-simd.md (aarch64_<sur><addsub>hn<mode>_insn_le):
27769 (aarch64_<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
27770 (aarch64_<sur><addsub>hn<mode>_insn_be): Delete.
27771 (aarch64_r<optab>hn<mode>_insn<vczle><vczbe>): New define_insn.
27772 (aarch64_<sur><addsub>hn<mode>): Delete.
27773 (aarch64_<optab>hn<mode>): New define_expand.
27774 (aarch64_r<optab>hn<mode>): Likewise.
27775 * config/aarch64/predicates.md (aarch64_simd_raddsubhn_imm_vec):
27778 2023-05-04 Andrew Pinski <apinski@marvell.com>
27780 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Handle
27781 diamond form bb with forwarder only empty blocks better.
27783 2023-05-04 Andrew Pinski <apinski@marvell.com>
27785 * tree-ssa-threadupdate.cc (copy_phi_arg_into_existing_phi): Move to ...
27786 * tree-cfg.cc (copy_phi_arg_into_existing_phi): Here and remove static.
27787 (gimple_duplicate_sese_tail): Use copy_phi_arg_into_existing_phi instead
27788 of an inline version of it.
27789 * tree-cfgcleanup.cc (remove_forwarder_block): Likewise.
27790 * tree-cfg.h (copy_phi_arg_into_existing_phi): New declaration.
27792 2023-05-04 Andrew Pinski <apinski@marvell.com>
27794 * tree-ssa-phiopt.cc (replace_phi_edge_with_variable): Change
27795 the default argument value for dce_ssa_names to nullptr.
27796 Check to make sure dce_ssa_names is a non-nullptr before
27797 calling simple_dce_from_worklist.
27799 2023-05-04 Uros Bizjak <ubizjak@gmail.com>
27801 * config/i386/predicates.md (index_register_operand): Reject
27802 arg_pointer_rtx, frame_pointer_rtx, stack_pointer_rtx and
27803 VIRTUAL_REGISTER_P operands. Allow subregs of memory before reload.
27804 (call_register_no_elim_operand): Rewrite as ...
27805 (call_register_operand): ... this.
27806 (call_insn_operand): Use call_register_operand predicate.
27808 2023-05-04 Richard Biener <rguenther@suse.de>
27810 PR tree-optimization/109721
27811 * tree-vect-stmts.cc (vectorizable_operation): Make sure
27812 to test word_mode for all !target_support_p operations.
27814 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27817 * config/aarch64/aarch64-simd.md (aarch64_<su>aba<mode>): Rename to...
27818 (aarch64_<su>aba<mode><vczle><vczbe>): ... This.
27819 (aarch64_mla<mode>): Rename to...
27820 (aarch64_mla<mode><vczle><vczbe>): ... This.
27821 (*aarch64_mla_elt<mode>): Rename to...
27822 (*aarch64_mla_elt<mode><vczle><vczbe>): ... This.
27823 (*aarch64_mla_elt_<vswap_width_name><mode>): Rename to...
27824 (*aarch64_mla_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27825 (aarch64_mla_n<mode>): Rename to...
27826 (aarch64_mla_n<mode><vczle><vczbe>): ... This.
27827 (aarch64_mls<mode>): Rename to...
27828 (aarch64_mls<mode><vczle><vczbe>): ... This.
27829 (*aarch64_mls_elt<mode>): Rename to...
27830 (*aarch64_mls_elt<mode><vczle><vczbe>): ... This.
27831 (*aarch64_mls_elt_<vswap_width_name><mode>): Rename to...
27832 (*aarch64_mls_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27833 (aarch64_mls_n<mode>): Rename to...
27834 (aarch64_mls_n<mode><vczle><vczbe>): ... This.
27835 (fma<mode>4): Rename to...
27836 (fma<mode>4<vczle><vczbe>): ... This.
27837 (*aarch64_fma4_elt<mode>): Rename to...
27838 (*aarch64_fma4_elt<mode><vczle><vczbe>): ... This.
27839 (*aarch64_fma4_elt_<vswap_width_name><mode>): Rename to...
27840 (*aarch64_fma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27841 (*aarch64_fma4_elt_from_dup<mode>): Rename to...
27842 (*aarch64_fma4_elt_from_dup<mode><vczle><vczbe>): ... This.
27843 (fnma<mode>4): Rename to...
27844 (fnma<mode>4<vczle><vczbe>): ... This.
27845 (*aarch64_fnma4_elt<mode>): Rename to...
27846 (*aarch64_fnma4_elt<mode><vczle><vczbe>): ... This.
27847 (*aarch64_fnma4_elt_<vswap_width_name><mode>): Rename to...
27848 (*aarch64_fnma4_elt_<vswap_width_name><mode><vczle><vczbe>): ... This.
27849 (*aarch64_fnma4_elt_from_dup<mode>): Rename to...
27850 (*aarch64_fnma4_elt_from_dup<mode><vczle><vczbe>): ... This.
27851 (aarch64_simd_bsl<mode>_internal): Rename to...
27852 (aarch64_simd_bsl<mode>_internal<vczle><vczbe>): ... This.
27853 (*aarch64_simd_bsl<mode>_alt): Rename to...
27854 (*aarch64_simd_bsl<mode>_alt<vczle><vczbe>): ... This.
27856 2023-05-04 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
27859 * config/aarch64/aarch64-simd.md (aarch64_<su>abd<mode>): Rename to...
27860 (aarch64_<su>abd<mode><vczle><vczbe>): ... This.
27861 (fabd<mode>3): Rename to...
27862 (fabd<mode>3<vczle><vczbe>): ... This.
27863 (aarch64_<optab>p<mode>): Rename to...
27864 (aarch64_<optab>p<mode><vczle><vczbe>): ... This.
27865 (aarch64_faddp<mode>): Rename to...
27866 (aarch64_faddp<mode><vczle><vczbe>): ... This.
27868 2023-05-04 Martin Liska <mliska@suse.cz>
27870 * gcov.cc (GCOV_JSON_FORMAT_VERSION): New definition.
27871 (print_version): Use it.
27872 (generate_results): Likewise.
27874 2023-05-04 Richard Biener <rguenther@suse.de>
27876 * tree-cfg.h (last_stmt): Rename to ...
27877 (last_nondebug_stmt): ... this.
27878 * tree-cfg.cc (last_stmt): Rename to ...
27879 (last_nondebug_stmt): ... this.
27880 (assign_discriminators): Adjust.
27881 (group_case_labels_stmt): Likewise.
27882 (gimple_can_duplicate_bb_p): Likewise.
27883 (execute_fixup_cfg): Likewise.
27884 * auto-profile.cc (afdo_propagate_circuit): Likewise.
27885 * gimple-range.cc (gimple_ranger::range_on_exit): Likewise.
27886 * omp-expand.cc (workshare_safe_to_combine_p): Likewise.
27887 (determine_parallel_type): Likewise.
27888 (adjust_context_and_scope): Likewise.
27889 (expand_task_call): Likewise.
27890 (remove_exit_barrier): Likewise.
27891 (expand_omp_taskreg): Likewise.
27892 (expand_omp_for_init_counts): Likewise.
27893 (expand_omp_for_init_vars): Likewise.
27894 (expand_omp_for_static_chunk): Likewise.
27895 (expand_omp_simd): Likewise.
27896 (expand_oacc_for): Likewise.
27897 (expand_omp_for): Likewise.
27898 (expand_omp_sections): Likewise.
27899 (expand_omp_atomic_fetch_op): Likewise.
27900 (expand_omp_atomic_cas): Likewise.
27901 (expand_omp_atomic): Likewise.
27902 (expand_omp_target): Likewise.
27903 (expand_omp): Likewise.
27904 (omp_make_gimple_edges): Likewise.
27905 * trans-mem.cc (tm_region_init): Likewise.
27906 * tree-inline.cc (redirect_all_calls): Likewise.
27907 * tree-parloops.cc (gen_parallel_loop): Likewise.
27908 * tree-ssa-loop-ch.cc (do_while_loop_p): Likewise.
27909 * tree-ssa-loop-ivcanon.cc (canonicalize_loop_induction_variables):
27911 * tree-ssa-loop-ivopts.cc (stmt_after_ip_normal_pos): Likewise.
27912 (may_eliminate_iv): Likewise.
27913 * tree-ssa-loop-manip.cc (standard_iv_increment_position): Likewise.
27914 * tree-ssa-loop-niter.cc (do_warn_aggressive_loop_optimizations):
27916 (estimate_numbers_of_iterations): Likewise.
27917 * tree-ssa-loop-split.cc (compute_added_num_insns): Likewise.
27918 * tree-ssa-loop-unswitch.cc (get_predicates_for_bb): Likewise.
27919 (set_predicates_for_bb): Likewise.
27920 (init_loop_unswitch_info): Likewise.
27921 (hoist_guard): Likewise.
27922 * tree-ssa-phiopt.cc (match_simplify_replacement): Likewise.
27923 (minmax_replacement): Likewise.
27924 * tree-ssa-reassoc.cc (update_range_test): Likewise.
27925 (optimize_range_tests_to_bit_test): Likewise.
27926 (optimize_range_tests_var_bound): Likewise.
27927 (optimize_range_tests): Likewise.
27928 (no_side_effect_bb): Likewise.
27929 (suitable_cond_bb): Likewise.
27930 (maybe_optimize_range_tests): Likewise.
27931 (reassociate_bb): Likewise.
27932 * tree-vrp.cc (rvrp_folder::pre_fold_bb): Likewise.
27934 2023-05-04 Jakub Jelinek <jakub@redhat.com>
27937 * config/i386/i386-features.cc (timode_scalar_chain::convert_insn):
27938 If src is REG, change its mode to V1TImode and call fix_debug_reg_uses
27939 for it only if it still has TImode. Don't decide whether to call
27940 fix_debug_reg_uses based on whether SRC is ever set or not.
27942 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27944 * config/cris/cris.cc (cris_split_constant): New function.
27945 * config/cris/cris.md (splitop): New iterator.
27946 (opsplit1): New define_peephole2.
27947 * config/cris/cris-protos.h (cris_split_constant): Declare.
27948 (cris_splittable_constant_p): New macro.
27950 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27952 * config/cris/cris.cc (TARGET_SPILL_CLASS): Define
27955 2023-05-04 Hans-Peter Nilsson <hp@axis.com>
27957 * config/cris/cris.cc (cris_side_effect_mode_ok): Use
27958 lra_in_progress, not reload_in_progress.
27959 * config/cris/cris.md ("movdi", "*addi_reload"): Ditto.
27960 * config/cris/constraints.md ("Q"): Ditto.
27962 2023-05-03 Andrew Pinski <apinski@marvell.com>
27964 * tree-ssa-dce.cc (simple_dce_from_worklist): Record
27965 stats on removed number of statements and phis.
27967 2023-05-03 Aldy Hernandez <aldyh@redhat.com>
27969 PR tree-optimization/109711
27970 * value-range.cc (irange::verify_range): Allow types of
27973 2023-05-03 Alexander Monakov <amonakov@ispras.ru>
27976 * calls.cc (can_implement_as_sibling_call_p): Reject calls
27977 to __sanitizer_cov_trace_pc.
27979 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
27982 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Add
27983 a new ABI break parameter for GCC 14. Set it to the alignment
27984 of enums that have an underlying type. Take the true alignment
27985 of such enums from the TYPE_ALIGN of the underlying type's
27987 (aarch64_function_arg_boundary): Update accordingly.
27988 (aarch64_layout_arg, aarch64_gimplify_va_arg_expr): Likewise.
27989 Warn about ABI differences.
27991 2023-05-03 Richard Sandiford <richard.sandiford@arm.com>
27994 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Rename
27995 ABI break variables to abi_break_gcc_9 and abi_break_gcc_13.
27996 (aarch64_layout_arg, aarch64_function_arg_boundary): Likewise.
27997 (aarch64_gimplify_va_arg_expr): Likewise.
27999 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28001 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_M_N_NO_F)
28002 (FUNCTION_WITHOUT_N_NO_F, FUNCTION_WITH_M_N_NO_U_F): New.
28003 (vhaddq, vhsubq, vmulhq, vqaddq, vqsubq, vqdmulhq, vrhaddq)
28005 * config/arm/arm-mve-builtins-base.def (vhaddq, vhsubq, vmulhq)
28006 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
28007 * config/arm/arm-mve-builtins-base.h (vhaddq, vhsubq, vmulhq)
28008 (vqaddq, vqsubq, vqdmulhq, vrhaddq, vrmulhq): New.
28009 * config/arm/arm_mve.h (vhsubq): Remove.
28011 (vhaddq_m): Remove.
28012 (vhsubq_m): Remove.
28013 (vhaddq_x): Remove.
28014 (vhsubq_x): Remove.
28015 (vhsubq_u8): Remove.
28016 (vhsubq_n_u8): Remove.
28017 (vhaddq_u8): Remove.
28018 (vhaddq_n_u8): Remove.
28019 (vhsubq_s8): Remove.
28020 (vhsubq_n_s8): Remove.
28021 (vhaddq_s8): Remove.
28022 (vhaddq_n_s8): Remove.
28023 (vhsubq_u16): Remove.
28024 (vhsubq_n_u16): Remove.
28025 (vhaddq_u16): Remove.
28026 (vhaddq_n_u16): Remove.
28027 (vhsubq_s16): Remove.
28028 (vhsubq_n_s16): Remove.
28029 (vhaddq_s16): Remove.
28030 (vhaddq_n_s16): Remove.
28031 (vhsubq_u32): Remove.
28032 (vhsubq_n_u32): Remove.
28033 (vhaddq_u32): Remove.
28034 (vhaddq_n_u32): Remove.
28035 (vhsubq_s32): Remove.
28036 (vhsubq_n_s32): Remove.
28037 (vhaddq_s32): Remove.
28038 (vhaddq_n_s32): Remove.
28039 (vhaddq_m_n_s8): Remove.
28040 (vhaddq_m_n_s32): Remove.
28041 (vhaddq_m_n_s16): Remove.
28042 (vhaddq_m_n_u8): Remove.
28043 (vhaddq_m_n_u32): Remove.
28044 (vhaddq_m_n_u16): Remove.
28045 (vhaddq_m_s8): Remove.
28046 (vhaddq_m_s32): Remove.
28047 (vhaddq_m_s16): Remove.
28048 (vhaddq_m_u8): Remove.
28049 (vhaddq_m_u32): Remove.
28050 (vhaddq_m_u16): Remove.
28051 (vhsubq_m_n_s8): Remove.
28052 (vhsubq_m_n_s32): Remove.
28053 (vhsubq_m_n_s16): Remove.
28054 (vhsubq_m_n_u8): Remove.
28055 (vhsubq_m_n_u32): Remove.
28056 (vhsubq_m_n_u16): Remove.
28057 (vhsubq_m_s8): Remove.
28058 (vhsubq_m_s32): Remove.
28059 (vhsubq_m_s16): Remove.
28060 (vhsubq_m_u8): Remove.
28061 (vhsubq_m_u32): Remove.
28062 (vhsubq_m_u16): Remove.
28063 (vhaddq_x_n_s8): Remove.
28064 (vhaddq_x_n_s16): Remove.
28065 (vhaddq_x_n_s32): Remove.
28066 (vhaddq_x_n_u8): Remove.
28067 (vhaddq_x_n_u16): Remove.
28068 (vhaddq_x_n_u32): Remove.
28069 (vhaddq_x_s8): Remove.
28070 (vhaddq_x_s16): Remove.
28071 (vhaddq_x_s32): Remove.
28072 (vhaddq_x_u8): Remove.
28073 (vhaddq_x_u16): Remove.
28074 (vhaddq_x_u32): Remove.
28075 (vhsubq_x_n_s8): Remove.
28076 (vhsubq_x_n_s16): Remove.
28077 (vhsubq_x_n_s32): Remove.
28078 (vhsubq_x_n_u8): Remove.
28079 (vhsubq_x_n_u16): Remove.
28080 (vhsubq_x_n_u32): Remove.
28081 (vhsubq_x_s8): Remove.
28082 (vhsubq_x_s16): Remove.
28083 (vhsubq_x_s32): Remove.
28084 (vhsubq_x_u8): Remove.
28085 (vhsubq_x_u16): Remove.
28086 (vhsubq_x_u32): Remove.
28087 (__arm_vhsubq_u8): Remove.
28088 (__arm_vhsubq_n_u8): Remove.
28089 (__arm_vhaddq_u8): Remove.
28090 (__arm_vhaddq_n_u8): Remove.
28091 (__arm_vhsubq_s8): Remove.
28092 (__arm_vhsubq_n_s8): Remove.
28093 (__arm_vhaddq_s8): Remove.
28094 (__arm_vhaddq_n_s8): Remove.
28095 (__arm_vhsubq_u16): Remove.
28096 (__arm_vhsubq_n_u16): Remove.
28097 (__arm_vhaddq_u16): Remove.
28098 (__arm_vhaddq_n_u16): Remove.
28099 (__arm_vhsubq_s16): Remove.
28100 (__arm_vhsubq_n_s16): Remove.
28101 (__arm_vhaddq_s16): Remove.
28102 (__arm_vhaddq_n_s16): Remove.
28103 (__arm_vhsubq_u32): Remove.
28104 (__arm_vhsubq_n_u32): Remove.
28105 (__arm_vhaddq_u32): Remove.
28106 (__arm_vhaddq_n_u32): Remove.
28107 (__arm_vhsubq_s32): Remove.
28108 (__arm_vhsubq_n_s32): Remove.
28109 (__arm_vhaddq_s32): Remove.
28110 (__arm_vhaddq_n_s32): Remove.
28111 (__arm_vhaddq_m_n_s8): Remove.
28112 (__arm_vhaddq_m_n_s32): Remove.
28113 (__arm_vhaddq_m_n_s16): Remove.
28114 (__arm_vhaddq_m_n_u8): Remove.
28115 (__arm_vhaddq_m_n_u32): Remove.
28116 (__arm_vhaddq_m_n_u16): Remove.
28117 (__arm_vhaddq_m_s8): Remove.
28118 (__arm_vhaddq_m_s32): Remove.
28119 (__arm_vhaddq_m_s16): Remove.
28120 (__arm_vhaddq_m_u8): Remove.
28121 (__arm_vhaddq_m_u32): Remove.
28122 (__arm_vhaddq_m_u16): Remove.
28123 (__arm_vhsubq_m_n_s8): Remove.
28124 (__arm_vhsubq_m_n_s32): Remove.
28125 (__arm_vhsubq_m_n_s16): Remove.
28126 (__arm_vhsubq_m_n_u8): Remove.
28127 (__arm_vhsubq_m_n_u32): Remove.
28128 (__arm_vhsubq_m_n_u16): Remove.
28129 (__arm_vhsubq_m_s8): Remove.
28130 (__arm_vhsubq_m_s32): Remove.
28131 (__arm_vhsubq_m_s16): Remove.
28132 (__arm_vhsubq_m_u8): Remove.
28133 (__arm_vhsubq_m_u32): Remove.
28134 (__arm_vhsubq_m_u16): Remove.
28135 (__arm_vhaddq_x_n_s8): Remove.
28136 (__arm_vhaddq_x_n_s16): Remove.
28137 (__arm_vhaddq_x_n_s32): Remove.
28138 (__arm_vhaddq_x_n_u8): Remove.
28139 (__arm_vhaddq_x_n_u16): Remove.
28140 (__arm_vhaddq_x_n_u32): Remove.
28141 (__arm_vhaddq_x_s8): Remove.
28142 (__arm_vhaddq_x_s16): Remove.
28143 (__arm_vhaddq_x_s32): Remove.
28144 (__arm_vhaddq_x_u8): Remove.
28145 (__arm_vhaddq_x_u16): Remove.
28146 (__arm_vhaddq_x_u32): Remove.
28147 (__arm_vhsubq_x_n_s8): Remove.
28148 (__arm_vhsubq_x_n_s16): Remove.
28149 (__arm_vhsubq_x_n_s32): Remove.
28150 (__arm_vhsubq_x_n_u8): Remove.
28151 (__arm_vhsubq_x_n_u16): Remove.
28152 (__arm_vhsubq_x_n_u32): Remove.
28153 (__arm_vhsubq_x_s8): Remove.
28154 (__arm_vhsubq_x_s16): Remove.
28155 (__arm_vhsubq_x_s32): Remove.
28156 (__arm_vhsubq_x_u8): Remove.
28157 (__arm_vhsubq_x_u16): Remove.
28158 (__arm_vhsubq_x_u32): Remove.
28159 (__arm_vhsubq): Remove.
28160 (__arm_vhaddq): Remove.
28161 (__arm_vhaddq_m): Remove.
28162 (__arm_vhsubq_m): Remove.
28163 (__arm_vhaddq_x): Remove.
28164 (__arm_vhsubq_x): Remove.
28166 (vmulhq_m): Remove.
28167 (vmulhq_x): Remove.
28168 (vmulhq_u8): Remove.
28169 (vmulhq_s8): Remove.
28170 (vmulhq_u16): Remove.
28171 (vmulhq_s16): Remove.
28172 (vmulhq_u32): Remove.
28173 (vmulhq_s32): Remove.
28174 (vmulhq_m_s8): Remove.
28175 (vmulhq_m_s32): Remove.
28176 (vmulhq_m_s16): Remove.
28177 (vmulhq_m_u8): Remove.
28178 (vmulhq_m_u32): Remove.
28179 (vmulhq_m_u16): Remove.
28180 (vmulhq_x_s8): Remove.
28181 (vmulhq_x_s16): Remove.
28182 (vmulhq_x_s32): Remove.
28183 (vmulhq_x_u8): Remove.
28184 (vmulhq_x_u16): Remove.
28185 (vmulhq_x_u32): Remove.
28186 (__arm_vmulhq_u8): Remove.
28187 (__arm_vmulhq_s8): Remove.
28188 (__arm_vmulhq_u16): Remove.
28189 (__arm_vmulhq_s16): Remove.
28190 (__arm_vmulhq_u32): Remove.
28191 (__arm_vmulhq_s32): Remove.
28192 (__arm_vmulhq_m_s8): Remove.
28193 (__arm_vmulhq_m_s32): Remove.
28194 (__arm_vmulhq_m_s16): Remove.
28195 (__arm_vmulhq_m_u8): Remove.
28196 (__arm_vmulhq_m_u32): Remove.
28197 (__arm_vmulhq_m_u16): Remove.
28198 (__arm_vmulhq_x_s8): Remove.
28199 (__arm_vmulhq_x_s16): Remove.
28200 (__arm_vmulhq_x_s32): Remove.
28201 (__arm_vmulhq_x_u8): Remove.
28202 (__arm_vmulhq_x_u16): Remove.
28203 (__arm_vmulhq_x_u32): Remove.
28204 (__arm_vmulhq): Remove.
28205 (__arm_vmulhq_m): Remove.
28206 (__arm_vmulhq_x): Remove.
28209 (vqaddq_m): Remove.
28210 (vqsubq_m): Remove.
28211 (vqsubq_u8): Remove.
28212 (vqsubq_n_u8): Remove.
28213 (vqaddq_u8): Remove.
28214 (vqaddq_n_u8): Remove.
28215 (vqsubq_s8): Remove.
28216 (vqsubq_n_s8): Remove.
28217 (vqaddq_s8): Remove.
28218 (vqaddq_n_s8): Remove.
28219 (vqsubq_u16): Remove.
28220 (vqsubq_n_u16): Remove.
28221 (vqaddq_u16): Remove.
28222 (vqaddq_n_u16): Remove.
28223 (vqsubq_s16): Remove.
28224 (vqsubq_n_s16): Remove.
28225 (vqaddq_s16): Remove.
28226 (vqaddq_n_s16): Remove.
28227 (vqsubq_u32): Remove.
28228 (vqsubq_n_u32): Remove.
28229 (vqaddq_u32): Remove.
28230 (vqaddq_n_u32): Remove.
28231 (vqsubq_s32): Remove.
28232 (vqsubq_n_s32): Remove.
28233 (vqaddq_s32): Remove.
28234 (vqaddq_n_s32): Remove.
28235 (vqaddq_m_n_s8): Remove.
28236 (vqaddq_m_n_s32): Remove.
28237 (vqaddq_m_n_s16): Remove.
28238 (vqaddq_m_n_u8): Remove.
28239 (vqaddq_m_n_u32): Remove.
28240 (vqaddq_m_n_u16): Remove.
28241 (vqaddq_m_s8): Remove.
28242 (vqaddq_m_s32): Remove.
28243 (vqaddq_m_s16): Remove.
28244 (vqaddq_m_u8): Remove.
28245 (vqaddq_m_u32): Remove.
28246 (vqaddq_m_u16): Remove.
28247 (vqsubq_m_n_s8): Remove.
28248 (vqsubq_m_n_s32): Remove.
28249 (vqsubq_m_n_s16): Remove.
28250 (vqsubq_m_n_u8): Remove.
28251 (vqsubq_m_n_u32): Remove.
28252 (vqsubq_m_n_u16): Remove.
28253 (vqsubq_m_s8): Remove.
28254 (vqsubq_m_s32): Remove.
28255 (vqsubq_m_s16): Remove.
28256 (vqsubq_m_u8): Remove.
28257 (vqsubq_m_u32): Remove.
28258 (vqsubq_m_u16): Remove.
28259 (__arm_vqsubq_u8): Remove.
28260 (__arm_vqsubq_n_u8): Remove.
28261 (__arm_vqaddq_u8): Remove.
28262 (__arm_vqaddq_n_u8): Remove.
28263 (__arm_vqsubq_s8): Remove.
28264 (__arm_vqsubq_n_s8): Remove.
28265 (__arm_vqaddq_s8): Remove.
28266 (__arm_vqaddq_n_s8): Remove.
28267 (__arm_vqsubq_u16): Remove.
28268 (__arm_vqsubq_n_u16): Remove.
28269 (__arm_vqaddq_u16): Remove.
28270 (__arm_vqaddq_n_u16): Remove.
28271 (__arm_vqsubq_s16): Remove.
28272 (__arm_vqsubq_n_s16): Remove.
28273 (__arm_vqaddq_s16): Remove.
28274 (__arm_vqaddq_n_s16): Remove.
28275 (__arm_vqsubq_u32): Remove.
28276 (__arm_vqsubq_n_u32): Remove.
28277 (__arm_vqaddq_u32): Remove.
28278 (__arm_vqaddq_n_u32): Remove.
28279 (__arm_vqsubq_s32): Remove.
28280 (__arm_vqsubq_n_s32): Remove.
28281 (__arm_vqaddq_s32): Remove.
28282 (__arm_vqaddq_n_s32): Remove.
28283 (__arm_vqaddq_m_n_s8): Remove.
28284 (__arm_vqaddq_m_n_s32): Remove.
28285 (__arm_vqaddq_m_n_s16): Remove.
28286 (__arm_vqaddq_m_n_u8): Remove.
28287 (__arm_vqaddq_m_n_u32): Remove.
28288 (__arm_vqaddq_m_n_u16): Remove.
28289 (__arm_vqaddq_m_s8): Remove.
28290 (__arm_vqaddq_m_s32): Remove.
28291 (__arm_vqaddq_m_s16): Remove.
28292 (__arm_vqaddq_m_u8): Remove.
28293 (__arm_vqaddq_m_u32): Remove.
28294 (__arm_vqaddq_m_u16): Remove.
28295 (__arm_vqsubq_m_n_s8): Remove.
28296 (__arm_vqsubq_m_n_s32): Remove.
28297 (__arm_vqsubq_m_n_s16): Remove.
28298 (__arm_vqsubq_m_n_u8): Remove.
28299 (__arm_vqsubq_m_n_u32): Remove.
28300 (__arm_vqsubq_m_n_u16): Remove.
28301 (__arm_vqsubq_m_s8): Remove.
28302 (__arm_vqsubq_m_s32): Remove.
28303 (__arm_vqsubq_m_s16): Remove.
28304 (__arm_vqsubq_m_u8): Remove.
28305 (__arm_vqsubq_m_u32): Remove.
28306 (__arm_vqsubq_m_u16): Remove.
28307 (__arm_vqsubq): Remove.
28308 (__arm_vqaddq): Remove.
28309 (__arm_vqaddq_m): Remove.
28310 (__arm_vqsubq_m): Remove.
28311 (vqdmulhq): Remove.
28312 (vqdmulhq_m): Remove.
28313 (vqdmulhq_s8): Remove.
28314 (vqdmulhq_n_s8): Remove.
28315 (vqdmulhq_s16): Remove.
28316 (vqdmulhq_n_s16): Remove.
28317 (vqdmulhq_s32): Remove.
28318 (vqdmulhq_n_s32): Remove.
28319 (vqdmulhq_m_n_s8): Remove.
28320 (vqdmulhq_m_n_s32): Remove.
28321 (vqdmulhq_m_n_s16): Remove.
28322 (vqdmulhq_m_s8): Remove.
28323 (vqdmulhq_m_s32): Remove.
28324 (vqdmulhq_m_s16): Remove.
28325 (__arm_vqdmulhq_s8): Remove.
28326 (__arm_vqdmulhq_n_s8): Remove.
28327 (__arm_vqdmulhq_s16): Remove.
28328 (__arm_vqdmulhq_n_s16): Remove.
28329 (__arm_vqdmulhq_s32): Remove.
28330 (__arm_vqdmulhq_n_s32): Remove.
28331 (__arm_vqdmulhq_m_n_s8): Remove.
28332 (__arm_vqdmulhq_m_n_s32): Remove.
28333 (__arm_vqdmulhq_m_n_s16): Remove.
28334 (__arm_vqdmulhq_m_s8): Remove.
28335 (__arm_vqdmulhq_m_s32): Remove.
28336 (__arm_vqdmulhq_m_s16): Remove.
28337 (__arm_vqdmulhq): Remove.
28338 (__arm_vqdmulhq_m): Remove.
28340 (vrhaddq_m): Remove.
28341 (vrhaddq_x): Remove.
28342 (vrhaddq_u8): Remove.
28343 (vrhaddq_s8): Remove.
28344 (vrhaddq_u16): Remove.
28345 (vrhaddq_s16): Remove.
28346 (vrhaddq_u32): Remove.
28347 (vrhaddq_s32): Remove.
28348 (vrhaddq_m_s8): Remove.
28349 (vrhaddq_m_s32): Remove.
28350 (vrhaddq_m_s16): Remove.
28351 (vrhaddq_m_u8): Remove.
28352 (vrhaddq_m_u32): Remove.
28353 (vrhaddq_m_u16): Remove.
28354 (vrhaddq_x_s8): Remove.
28355 (vrhaddq_x_s16): Remove.
28356 (vrhaddq_x_s32): Remove.
28357 (vrhaddq_x_u8): Remove.
28358 (vrhaddq_x_u16): Remove.
28359 (vrhaddq_x_u32): Remove.
28360 (__arm_vrhaddq_u8): Remove.
28361 (__arm_vrhaddq_s8): Remove.
28362 (__arm_vrhaddq_u16): Remove.
28363 (__arm_vrhaddq_s16): Remove.
28364 (__arm_vrhaddq_u32): Remove.
28365 (__arm_vrhaddq_s32): Remove.
28366 (__arm_vrhaddq_m_s8): Remove.
28367 (__arm_vrhaddq_m_s32): Remove.
28368 (__arm_vrhaddq_m_s16): Remove.
28369 (__arm_vrhaddq_m_u8): Remove.
28370 (__arm_vrhaddq_m_u32): Remove.
28371 (__arm_vrhaddq_m_u16): Remove.
28372 (__arm_vrhaddq_x_s8): Remove.
28373 (__arm_vrhaddq_x_s16): Remove.
28374 (__arm_vrhaddq_x_s32): Remove.
28375 (__arm_vrhaddq_x_u8): Remove.
28376 (__arm_vrhaddq_x_u16): Remove.
28377 (__arm_vrhaddq_x_u32): Remove.
28378 (__arm_vrhaddq): Remove.
28379 (__arm_vrhaddq_m): Remove.
28380 (__arm_vrhaddq_x): Remove.
28382 (vrmulhq_m): Remove.
28383 (vrmulhq_x): Remove.
28384 (vrmulhq_u8): Remove.
28385 (vrmulhq_s8): Remove.
28386 (vrmulhq_u16): Remove.
28387 (vrmulhq_s16): Remove.
28388 (vrmulhq_u32): Remove.
28389 (vrmulhq_s32): Remove.
28390 (vrmulhq_m_s8): Remove.
28391 (vrmulhq_m_s32): Remove.
28392 (vrmulhq_m_s16): Remove.
28393 (vrmulhq_m_u8): Remove.
28394 (vrmulhq_m_u32): Remove.
28395 (vrmulhq_m_u16): Remove.
28396 (vrmulhq_x_s8): Remove.
28397 (vrmulhq_x_s16): Remove.
28398 (vrmulhq_x_s32): Remove.
28399 (vrmulhq_x_u8): Remove.
28400 (vrmulhq_x_u16): Remove.
28401 (vrmulhq_x_u32): Remove.
28402 (__arm_vrmulhq_u8): Remove.
28403 (__arm_vrmulhq_s8): Remove.
28404 (__arm_vrmulhq_u16): Remove.
28405 (__arm_vrmulhq_s16): Remove.
28406 (__arm_vrmulhq_u32): Remove.
28407 (__arm_vrmulhq_s32): Remove.
28408 (__arm_vrmulhq_m_s8): Remove.
28409 (__arm_vrmulhq_m_s32): Remove.
28410 (__arm_vrmulhq_m_s16): Remove.
28411 (__arm_vrmulhq_m_u8): Remove.
28412 (__arm_vrmulhq_m_u32): Remove.
28413 (__arm_vrmulhq_m_u16): Remove.
28414 (__arm_vrmulhq_x_s8): Remove.
28415 (__arm_vrmulhq_x_s16): Remove.
28416 (__arm_vrmulhq_x_s32): Remove.
28417 (__arm_vrmulhq_x_u8): Remove.
28418 (__arm_vrmulhq_x_u16): Remove.
28419 (__arm_vrmulhq_x_u32): Remove.
28420 (__arm_vrmulhq): Remove.
28421 (__arm_vrmulhq_m): Remove.
28422 (__arm_vrmulhq_x): Remove.
28424 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28426 * config/arm/iterators.md (MVE_INT_SU_BINARY): New.
28427 (mve_insn): Add vabdq, vhaddq, vhsubq, vmulhq, vqaddq, vqdmulhq,
28428 vqrdmulhq, vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq.
28429 (supf): Add VQDMULHQ_S, VQRDMULHQ_S.
28430 * config/arm/mve.md (mve_vabdq_<supf><mode>)
28431 (@mve_vhaddq_<supf><mode>, mve_vhsubq_<supf><mode>)
28432 (mve_vmulhq_<supf><mode>, mve_vqaddq_<supf><mode>)
28433 (mve_vqdmulhq_s<mode>, mve_vqrdmulhq_s<mode>)
28434 (mve_vqrshlq_<supf><mode>, mve_vqshlq_<supf><mode>)
28435 (mve_vqsubq_<supf><mode>, @mve_vrhaddq_<supf><mode>)
28436 (mve_vrmulhq_<supf><mode>, mve_vrshlq_<supf><mode>): Merge into
28438 (@mve_<mve_insn>q_<supf><mode>): ... this.
28439 * config/arm/vec-common.md (avg<mode>3_floor, uavg<mode>3_floor)
28440 (avg<mode>3_ceil, uavg<mode>3_ceil): Use gen_mve_q instead of
28441 gen_mve_vhaddq / gen_mve_vrhaddq.
28443 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28445 * config/arm/iterators.md (MVE_INT_SU_M_N_BINARY): New.
28446 (mve_insn): Add vhaddq, vhsubq, vmlaq, vmlasq, vqaddq, vqdmlahq,
28447 vqdmlashq, vqdmulhq, vqrdmlahq, vqrdmlashq, vqrdmulhq, vqsubq.
28448 (supf): Add VQDMLAHQ_M_N_S, VQDMLASHQ_M_N_S, VQRDMLAHQ_M_N_S,
28449 VQRDMLASHQ_M_N_S, VQDMULHQ_M_N_S, VQRDMULHQ_M_N_S.
28450 * config/arm/mve.md (mve_vhaddq_m_n_<supf><mode>)
28451 (mve_vhsubq_m_n_<supf><mode>, mve_vmlaq_m_n_<supf><mode>)
28452 (mve_vmlasq_m_n_<supf><mode>, mve_vqaddq_m_n_<supf><mode>)
28453 (mve_vqdmlahq_m_n_s<mode>, mve_vqdmlashq_m_n_s<mode>)
28454 (mve_vqrdmlahq_m_n_s<mode>, mve_vqrdmlashq_m_n_s<mode>)
28455 (mve_vqsubq_m_n_<supf><mode>, mve_vqdmulhq_m_n_s<mode>)
28456 (mve_vqrdmulhq_m_n_s<mode>): Merge into ...
28457 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28459 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28461 * config/arm/iterators.md (MVE_INT_SU_N_BINARY): New.
28462 (mve_insn): Add vhaddq, vhsubq, vqaddq, vqdmulhq, vqrdmulhq,
28464 (supf): Add VQDMULHQ_N_S, VQRDMULHQ_N_S.
28465 * config/arm/mve.md (mve_vhaddq_n_<supf><mode>)
28466 (mve_vhsubq_n_<supf><mode>, mve_vqaddq_n_<supf><mode>)
28467 (mve_vqdmulhq_n_s<mode>, mve_vqrdmulhq_n_s<mode>)
28468 (mve_vqsubq_n_<supf><mode>): Merge into ...
28469 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28471 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28473 * config/arm/iterators.md (MVE_INT_SU_M_BINARY): New.
28474 (mve_insn): Add vabdq, vhaddq, vhsubq, vmaxq, vminq, vmulhq,
28475 vqaddq, vqdmladhq, vqdmladhxq, vqdmlsdhq, vqdmlsdhxq, vqdmulhq,
28476 vqrdmladhq, vqrdmladhxq, vqrdmlsdhq, vqrdmlsdhxq, vqrdmulhq,
28477 vqrshlq, vqshlq, vqsubq, vrhaddq, vrmulhq, vrshlq, vshlq.
28478 (supf): Add VQDMLADHQ_M_S, VQDMLADHXQ_M_S, VQDMLSDHQ_M_S,
28479 VQDMLSDHXQ_M_S, VQDMULHQ_M_S, VQRDMLADHQ_M_S, VQRDMLADHXQ_M_S,
28480 VQRDMLSDHQ_M_S, VQRDMLSDHXQ_M_S, VQRDMULHQ_M_S.
28481 * config/arm/mve.md (@mve_<mve_insn>q_m_<supf><mode>): New.
28482 (mve_vshlq_m_<supf><mode>): Merged into
28483 @mve_<mve_insn>q_m_<supf><mode>.
28484 (mve_vabdq_m_<supf><mode>): Likewise.
28485 (mve_vhaddq_m_<supf><mode>): Likewise.
28486 (mve_vhsubq_m_<supf><mode>): Likewise.
28487 (mve_vmaxq_m_<supf><mode>): Likewise.
28488 (mve_vminq_m_<supf><mode>): Likewise.
28489 (mve_vmulhq_m_<supf><mode>): Likewise.
28490 (mve_vqaddq_m_<supf><mode>): Likewise.
28491 (mve_vqrshlq_m_<supf><mode>): Likewise.
28492 (mve_vqshlq_m_<supf><mode>): Likewise.
28493 (mve_vqsubq_m_<supf><mode>): Likewise.
28494 (mve_vrhaddq_m_<supf><mode>): Likewise.
28495 (mve_vrmulhq_m_<supf><mode>): Likewise.
28496 (mve_vrshlq_m_<supf><mode>): Likewise.
28497 (mve_vqdmladhq_m_s<mode>): Likewise.
28498 (mve_vqdmladhxq_m_s<mode>): Likewise.
28499 (mve_vqdmlsdhq_m_s<mode>): Likewise.
28500 (mve_vqdmlsdhxq_m_s<mode>): Likewise.
28501 (mve_vqdmulhq_m_s<mode>): Likewise.
28502 (mve_vqrdmladhq_m_s<mode>): Likewise.
28503 (mve_vqrdmladhxq_m_s<mode>): Likewise.
28504 (mve_vqrdmlsdhq_m_s<mode>): Likewise.
28505 (mve_vqrdmlsdhxq_m_s<mode>): Likewise.
28506 (mve_vqrdmulhq_m_s<mode>): Likewise.
28508 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28510 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITHOUT_M_N): New. (vcreateq): New.
28511 * config/arm/arm-mve-builtins-base.def (vcreateq): New.
28512 * config/arm/arm-mve-builtins-base.h (vcreateq): New.
28513 * config/arm/arm_mve.h (vcreateq_f16): Remove.
28514 (vcreateq_f32): Remove.
28515 (vcreateq_u8): Remove.
28516 (vcreateq_u16): Remove.
28517 (vcreateq_u32): Remove.
28518 (vcreateq_u64): Remove.
28519 (vcreateq_s8): Remove.
28520 (vcreateq_s16): Remove.
28521 (vcreateq_s32): Remove.
28522 (vcreateq_s64): Remove.
28523 (__arm_vcreateq_u8): Remove.
28524 (__arm_vcreateq_u16): Remove.
28525 (__arm_vcreateq_u32): Remove.
28526 (__arm_vcreateq_u64): Remove.
28527 (__arm_vcreateq_s8): Remove.
28528 (__arm_vcreateq_s16): Remove.
28529 (__arm_vcreateq_s32): Remove.
28530 (__arm_vcreateq_s64): Remove.
28531 (__arm_vcreateq_f16): Remove.
28532 (__arm_vcreateq_f32): Remove.
28534 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28536 * config/arm/iterators.md (MVE_FP_CREATE_ONLY): New.
28537 (mve_insn): Add VCREATEQ_S, VCREATEQ_U, VCREATEQ_F.
28538 * config/arm/mve.md (mve_vcreateq_f<mode>): Rename into ...
28539 (@mve_<mve_insn>q_f<mode>): ... this.
28540 (mve_vcreateq_<supf><mode>): Rename into ...
28541 (@mve_<mve_insn>q_<supf><mode>): ... this.
28543 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28545 * config/arm/arm-mve-builtins-shapes.cc (create): New.
28546 * config/arm/arm-mve-builtins-shapes.h: (create): New.
28548 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28550 * config/arm/arm-mve-builtins-functions.h (class
28551 unspec_mve_function_exact_insn): New.
28553 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28555 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N_NO_N_F): New.
28557 * config/arm/arm-mve-builtins-base.def (vorrq): New.
28558 * config/arm/arm-mve-builtins-base.h (vorrq): New.
28559 * config/arm/arm-mve-builtins.cc
28560 (function_instance::has_inactive_argument): Handle vorrq.
28561 * config/arm/arm_mve.h (vorrq): Remove.
28562 (vorrq_m_n): Remove.
28565 (vorrq_u8): Remove.
28566 (vorrq_s8): Remove.
28567 (vorrq_u16): Remove.
28568 (vorrq_s16): Remove.
28569 (vorrq_u32): Remove.
28570 (vorrq_s32): Remove.
28571 (vorrq_n_u16): Remove.
28572 (vorrq_f16): Remove.
28573 (vorrq_n_s16): Remove.
28574 (vorrq_n_u32): Remove.
28575 (vorrq_f32): Remove.
28576 (vorrq_n_s32): Remove.
28577 (vorrq_m_n_s16): Remove.
28578 (vorrq_m_n_u16): Remove.
28579 (vorrq_m_n_s32): Remove.
28580 (vorrq_m_n_u32): Remove.
28581 (vorrq_m_s8): Remove.
28582 (vorrq_m_s32): Remove.
28583 (vorrq_m_s16): Remove.
28584 (vorrq_m_u8): Remove.
28585 (vorrq_m_u32): Remove.
28586 (vorrq_m_u16): Remove.
28587 (vorrq_m_f32): Remove.
28588 (vorrq_m_f16): Remove.
28589 (vorrq_x_s8): Remove.
28590 (vorrq_x_s16): Remove.
28591 (vorrq_x_s32): Remove.
28592 (vorrq_x_u8): Remove.
28593 (vorrq_x_u16): Remove.
28594 (vorrq_x_u32): Remove.
28595 (vorrq_x_f16): Remove.
28596 (vorrq_x_f32): Remove.
28597 (__arm_vorrq_u8): Remove.
28598 (__arm_vorrq_s8): Remove.
28599 (__arm_vorrq_u16): Remove.
28600 (__arm_vorrq_s16): Remove.
28601 (__arm_vorrq_u32): Remove.
28602 (__arm_vorrq_s32): Remove.
28603 (__arm_vorrq_n_u16): Remove.
28604 (__arm_vorrq_n_s16): Remove.
28605 (__arm_vorrq_n_u32): Remove.
28606 (__arm_vorrq_n_s32): Remove.
28607 (__arm_vorrq_m_n_s16): Remove.
28608 (__arm_vorrq_m_n_u16): Remove.
28609 (__arm_vorrq_m_n_s32): Remove.
28610 (__arm_vorrq_m_n_u32): Remove.
28611 (__arm_vorrq_m_s8): Remove.
28612 (__arm_vorrq_m_s32): Remove.
28613 (__arm_vorrq_m_s16): Remove.
28614 (__arm_vorrq_m_u8): Remove.
28615 (__arm_vorrq_m_u32): Remove.
28616 (__arm_vorrq_m_u16): Remove.
28617 (__arm_vorrq_x_s8): Remove.
28618 (__arm_vorrq_x_s16): Remove.
28619 (__arm_vorrq_x_s32): Remove.
28620 (__arm_vorrq_x_u8): Remove.
28621 (__arm_vorrq_x_u16): Remove.
28622 (__arm_vorrq_x_u32): Remove.
28623 (__arm_vorrq_f16): Remove.
28624 (__arm_vorrq_f32): Remove.
28625 (__arm_vorrq_m_f32): Remove.
28626 (__arm_vorrq_m_f16): Remove.
28627 (__arm_vorrq_x_f16): Remove.
28628 (__arm_vorrq_x_f32): Remove.
28629 (__arm_vorrq): Remove.
28630 (__arm_vorrq_m_n): Remove.
28631 (__arm_vorrq_m): Remove.
28632 (__arm_vorrq_x): Remove.
28634 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28636 * config/arm/arm-mve-builtins-shapes.cc (binary_orrq): New.
28637 * config/arm/arm-mve-builtins-shapes.h (binary_orrq): New.
28638 * config/arm/arm-mve-builtins.cc (preds_m_or_none): Remove static.
28639 * config/arm/arm-mve-builtins.h (preds_m_or_none): Declare.
28641 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28643 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M): New.
28644 (vandq,veorq): New.
28645 * config/arm/arm-mve-builtins-base.def (vandq, veorq): New.
28646 * config/arm/arm-mve-builtins-base.h (vandq, veorq): New.
28647 * config/arm/arm_mve.h (vandq): Remove.
28650 (vandq_u8): Remove.
28651 (vandq_s8): Remove.
28652 (vandq_u16): Remove.
28653 (vandq_s16): Remove.
28654 (vandq_u32): Remove.
28655 (vandq_s32): Remove.
28656 (vandq_f16): Remove.
28657 (vandq_f32): Remove.
28658 (vandq_m_s8): Remove.
28659 (vandq_m_s32): Remove.
28660 (vandq_m_s16): Remove.
28661 (vandq_m_u8): Remove.
28662 (vandq_m_u32): Remove.
28663 (vandq_m_u16): Remove.
28664 (vandq_m_f32): Remove.
28665 (vandq_m_f16): Remove.
28666 (vandq_x_s8): Remove.
28667 (vandq_x_s16): Remove.
28668 (vandq_x_s32): Remove.
28669 (vandq_x_u8): Remove.
28670 (vandq_x_u16): Remove.
28671 (vandq_x_u32): Remove.
28672 (vandq_x_f16): Remove.
28673 (vandq_x_f32): Remove.
28674 (__arm_vandq_u8): Remove.
28675 (__arm_vandq_s8): Remove.
28676 (__arm_vandq_u16): Remove.
28677 (__arm_vandq_s16): Remove.
28678 (__arm_vandq_u32): Remove.
28679 (__arm_vandq_s32): Remove.
28680 (__arm_vandq_m_s8): Remove.
28681 (__arm_vandq_m_s32): Remove.
28682 (__arm_vandq_m_s16): Remove.
28683 (__arm_vandq_m_u8): Remove.
28684 (__arm_vandq_m_u32): Remove.
28685 (__arm_vandq_m_u16): Remove.
28686 (__arm_vandq_x_s8): Remove.
28687 (__arm_vandq_x_s16): Remove.
28688 (__arm_vandq_x_s32): Remove.
28689 (__arm_vandq_x_u8): Remove.
28690 (__arm_vandq_x_u16): Remove.
28691 (__arm_vandq_x_u32): Remove.
28692 (__arm_vandq_f16): Remove.
28693 (__arm_vandq_f32): Remove.
28694 (__arm_vandq_m_f32): Remove.
28695 (__arm_vandq_m_f16): Remove.
28696 (__arm_vandq_x_f16): Remove.
28697 (__arm_vandq_x_f32): Remove.
28698 (__arm_vandq): Remove.
28699 (__arm_vandq_m): Remove.
28700 (__arm_vandq_x): Remove.
28703 (veorq_u8): Remove.
28704 (veorq_s8): Remove.
28705 (veorq_u16): Remove.
28706 (veorq_s16): Remove.
28707 (veorq_u32): Remove.
28708 (veorq_s32): Remove.
28709 (veorq_f16): Remove.
28710 (veorq_f32): Remove.
28711 (veorq_m_s8): Remove.
28712 (veorq_m_s32): Remove.
28713 (veorq_m_s16): Remove.
28714 (veorq_m_u8): Remove.
28715 (veorq_m_u32): Remove.
28716 (veorq_m_u16): Remove.
28717 (veorq_m_f32): Remove.
28718 (veorq_m_f16): Remove.
28719 (veorq_x_s8): Remove.
28720 (veorq_x_s16): Remove.
28721 (veorq_x_s32): Remove.
28722 (veorq_x_u8): Remove.
28723 (veorq_x_u16): Remove.
28724 (veorq_x_u32): Remove.
28725 (veorq_x_f16): Remove.
28726 (veorq_x_f32): Remove.
28727 (__arm_veorq_u8): Remove.
28728 (__arm_veorq_s8): Remove.
28729 (__arm_veorq_u16): Remove.
28730 (__arm_veorq_s16): Remove.
28731 (__arm_veorq_u32): Remove.
28732 (__arm_veorq_s32): Remove.
28733 (__arm_veorq_m_s8): Remove.
28734 (__arm_veorq_m_s32): Remove.
28735 (__arm_veorq_m_s16): Remove.
28736 (__arm_veorq_m_u8): Remove.
28737 (__arm_veorq_m_u32): Remove.
28738 (__arm_veorq_m_u16): Remove.
28739 (__arm_veorq_x_s8): Remove.
28740 (__arm_veorq_x_s16): Remove.
28741 (__arm_veorq_x_s32): Remove.
28742 (__arm_veorq_x_u8): Remove.
28743 (__arm_veorq_x_u16): Remove.
28744 (__arm_veorq_x_u32): Remove.
28745 (__arm_veorq_f16): Remove.
28746 (__arm_veorq_f32): Remove.
28747 (__arm_veorq_m_f32): Remove.
28748 (__arm_veorq_m_f16): Remove.
28749 (__arm_veorq_x_f16): Remove.
28750 (__arm_veorq_x_f32): Remove.
28751 (__arm_veorq): Remove.
28752 (__arm_veorq_m): Remove.
28753 (__arm_veorq_x): Remove.
28755 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28757 * config/arm/iterators.md (MVE_INT_M_BINARY_LOGIC)
28758 (MVE_FP_M_BINARY_LOGIC): New.
28759 (MVE_INT_M_N_BINARY_LOGIC): New.
28760 (MVE_INT_N_BINARY_LOGIC): New.
28761 (mve_insn): Add vand, veor, vorr, vbic.
28762 * config/arm/mve.md (mve_vandq_m_<supf><mode>)
28763 (mve_veorq_m_<supf><mode>, mve_vorrq_m_<supf><mode>)
28764 (mve_vbicq_m_<supf><mode>): Merge into ...
28765 (@mve_<mve_insn>q_m_<supf><mode>): ... this.
28766 (mve_vandq_m_f<mode>, mve_veorq_m_f<mode>, mve_vorrq_m_f<mode>)
28767 (mve_vbicq_m_f<mode>): Merge into ...
28768 (@mve_<mve_insn>q_m_f<mode>): ... this.
28769 (mve_vorrq_n_<supf><mode>)
28770 (mve_vbicq_n_<supf><mode>): Merge into ...
28771 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
28772 (mve_vorrq_m_n_<supf><mode>, mve_vbicq_m_n_<supf><mode>): Merge
28774 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
28776 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28778 * config/arm/arm-mve-builtins-shapes.cc (binary): New.
28779 * config/arm/arm-mve-builtins-shapes.h (binary): New.
28781 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
28783 * config/arm/arm-mve-builtins-base.cc (FUNCTION_WITH_RTX_M_N):
28785 (vaddq, vmulq, vsubq): New.
28786 * config/arm/arm-mve-builtins-base.def (vaddq, vmulq, vsubq): New.
28787 * config/arm/arm-mve-builtins-base.h (vaddq, vmulq, vsubq): New.
28788 * config/arm/arm_mve.h (vaddq): Remove.
28791 (vaddq_n_u8): Remove.
28792 (vaddq_n_s8): Remove.
28793 (vaddq_n_u16): Remove.
28794 (vaddq_n_s16): Remove.
28795 (vaddq_n_u32): Remove.
28796 (vaddq_n_s32): Remove.
28797 (vaddq_n_f16): Remove.
28798 (vaddq_n_f32): Remove.
28799 (vaddq_m_n_s8): Remove.
28800 (vaddq_m_n_s32): Remove.
28801 (vaddq_m_n_s16): Remove.
28802 (vaddq_m_n_u8): Remove.
28803 (vaddq_m_n_u32): Remove.
28804 (vaddq_m_n_u16): Remove.
28805 (vaddq_m_s8): Remove.
28806 (vaddq_m_s32): Remove.
28807 (vaddq_m_s16): Remove.
28808 (vaddq_m_u8): Remove.
28809 (vaddq_m_u32): Remove.
28810 (vaddq_m_u16): Remove.
28811 (vaddq_m_f32): Remove.
28812 (vaddq_m_f16): Remove.
28813 (vaddq_m_n_f32): Remove.
28814 (vaddq_m_n_f16): Remove.
28815 (vaddq_s8): Remove.
28816 (vaddq_s16): Remove.
28817 (vaddq_s32): Remove.
28818 (vaddq_u8): Remove.
28819 (vaddq_u16): Remove.
28820 (vaddq_u32): Remove.
28821 (vaddq_f16): Remove.
28822 (vaddq_f32): Remove.
28823 (vaddq_x_s8): Remove.
28824 (vaddq_x_s16): Remove.
28825 (vaddq_x_s32): Remove.
28826 (vaddq_x_n_s8): Remove.
28827 (vaddq_x_n_s16): Remove.
28828 (vaddq_x_n_s32): Remove.
28829 (vaddq_x_u8): Remove.
28830 (vaddq_x_u16): Remove.
28831 (vaddq_x_u32): Remove.
28832 (vaddq_x_n_u8): Remove.
28833 (vaddq_x_n_u16): Remove.
28834 (vaddq_x_n_u32): Remove.
28835 (vaddq_x_f16): Remove.
28836 (vaddq_x_f32): Remove.
28837 (vaddq_x_n_f16): Remove.
28838 (vaddq_x_n_f32): Remove.
28839 (__arm_vaddq_n_u8): Remove.
28840 (__arm_vaddq_n_s8): Remove.
28841 (__arm_vaddq_n_u16): Remove.
28842 (__arm_vaddq_n_s16): Remove.
28843 (__arm_vaddq_n_u32): Remove.
28844 (__arm_vaddq_n_s32): Remove.
28845 (__arm_vaddq_m_n_s8): Remove.
28846 (__arm_vaddq_m_n_s32): Remove.
28847 (__arm_vaddq_m_n_s16): Remove.
28848 (__arm_vaddq_m_n_u8): Remove.
28849 (__arm_vaddq_m_n_u32): Remove.
28850 (__arm_vaddq_m_n_u16): Remove.
28851 (__arm_vaddq_m_s8): Remove.
28852 (__arm_vaddq_m_s32): Remove.
28853 (__arm_vaddq_m_s16): Remove.
28854 (__arm_vaddq_m_u8): Remove.
28855 (__arm_vaddq_m_u32): Remove.
28856 (__arm_vaddq_m_u16): Remove.
28857 (__arm_vaddq_s8): Remove.
28858 (__arm_vaddq_s16): Remove.
28859 (__arm_vaddq_s32): Remove.
28860 (__arm_vaddq_u8): Remove.
28861 (__arm_vaddq_u16): Remove.
28862 (__arm_vaddq_u32): Remove.
28863 (__arm_vaddq_x_s8): Remove.
28864 (__arm_vaddq_x_s16): Remove.
28865 (__arm_vaddq_x_s32): Remove.
28866 (__arm_vaddq_x_n_s8): Remove.
28867 (__arm_vaddq_x_n_s16): Remove.
28868 (__arm_vaddq_x_n_s32): Remove.
28869 (__arm_vaddq_x_u8): Remove.
28870 (__arm_vaddq_x_u16): Remove.
28871 (__arm_vaddq_x_u32): Remove.
28872 (__arm_vaddq_x_n_u8): Remove.
28873 (__arm_vaddq_x_n_u16): Remove.
28874 (__arm_vaddq_x_n_u32): Remove.
28875 (__arm_vaddq_n_f16): Remove.
28876 (__arm_vaddq_n_f32): Remove.
28877 (__arm_vaddq_m_f32): Remove.
28878 (__arm_vaddq_m_f16): Remove.
28879 (__arm_vaddq_m_n_f32): Remove.
28880 (__arm_vaddq_m_n_f16): Remove.
28881 (__arm_vaddq_f16): Remove.
28882 (__arm_vaddq_f32): Remove.
28883 (__arm_vaddq_x_f16): Remove.
28884 (__arm_vaddq_x_f32): Remove.
28885 (__arm_vaddq_x_n_f16): Remove.
28886 (__arm_vaddq_x_n_f32): Remove.
28887 (__arm_vaddq): Remove.
28888 (__arm_vaddq_m): Remove.
28889 (__arm_vaddq_x): Remove.
28893 (vmulq_u8): Remove.
28894 (vmulq_n_u8): Remove.
28895 (vmulq_s8): Remove.
28896 (vmulq_n_s8): Remove.
28897 (vmulq_u16): Remove.
28898 (vmulq_n_u16): Remove.
28899 (vmulq_s16): Remove.
28900 (vmulq_n_s16): Remove.
28901 (vmulq_u32): Remove.
28902 (vmulq_n_u32): Remove.
28903 (vmulq_s32): Remove.
28904 (vmulq_n_s32): Remove.
28905 (vmulq_n_f16): Remove.
28906 (vmulq_f16): Remove.
28907 (vmulq_n_f32): Remove.
28908 (vmulq_f32): Remove.
28909 (vmulq_m_n_s8): Remove.
28910 (vmulq_m_n_s32): Remove.
28911 (vmulq_m_n_s16): Remove.
28912 (vmulq_m_n_u8): Remove.
28913 (vmulq_m_n_u32): Remove.
28914 (vmulq_m_n_u16): Remove.
28915 (vmulq_m_s8): Remove.
28916 (vmulq_m_s32): Remove.
28917 (vmulq_m_s16): Remove.
28918 (vmulq_m_u8): Remove.
28919 (vmulq_m_u32): Remove.
28920 (vmulq_m_u16): Remove.
28921 (vmulq_m_f32): Remove.
28922 (vmulq_m_f16): Remove.
28923 (vmulq_m_n_f32): Remove.
28924 (vmulq_m_n_f16): Remove.
28925 (vmulq_x_s8): Remove.
28926 (vmulq_x_s16): Remove.
28927 (vmulq_x_s32): Remove.
28928 (vmulq_x_n_s8): Remove.
28929 (vmulq_x_n_s16): Remove.
28930 (vmulq_x_n_s32): Remove.
28931 (vmulq_x_u8): Remove.
28932 (vmulq_x_u16): Remove.
28933 (vmulq_x_u32): Remove.
28934 (vmulq_x_n_u8): Remove.
28935 (vmulq_x_n_u16): Remove.
28936 (vmulq_x_n_u32): Remove.
28937 (vmulq_x_f16): Remove.
28938 (vmulq_x_f32): Remove.
28939 (vmulq_x_n_f16): Remove.
28940 (vmulq_x_n_f32): Remove.
28941 (__arm_vmulq_u8): Remove.
28942 (__arm_vmulq_n_u8): Remove.
28943 (__arm_vmulq_s8): Remove.
28944 (__arm_vmulq_n_s8): Remove.
28945 (__arm_vmulq_u16): Remove.
28946 (__arm_vmulq_n_u16): Remove.
28947 (__arm_vmulq_s16): Remove.
28948 (__arm_vmulq_n_s16): Remove.
28949 (__arm_vmulq_u32): Remove.
28950 (__arm_vmulq_n_u32): Remove.
28951 (__arm_vmulq_s32): Remove.
28952 (__arm_vmulq_n_s32): Remove.
28953 (__arm_vmulq_m_n_s8): Remove.
28954 (__arm_vmulq_m_n_s32): Remove.
28955 (__arm_vmulq_m_n_s16): Remove.
28956 (__arm_vmulq_m_n_u8): Remove.
28957 (__arm_vmulq_m_n_u32): Remove.
28958 (__arm_vmulq_m_n_u16): Remove.
28959 (__arm_vmulq_m_s8): Remove.
28960 (__arm_vmulq_m_s32): Remove.
28961 (__arm_vmulq_m_s16): Remove.
28962 (__arm_vmulq_m_u8): Remove.
28963 (__arm_vmulq_m_u32): Remove.
28964 (__arm_vmulq_m_u16): Remove.
28965 (__arm_vmulq_x_s8): Remove.
28966 (__arm_vmulq_x_s16): Remove.
28967 (__arm_vmulq_x_s32): Remove.
28968 (__arm_vmulq_x_n_s8): Remove.
28969 (__arm_vmulq_x_n_s16): Remove.
28970 (__arm_vmulq_x_n_s32): Remove.
28971 (__arm_vmulq_x_u8): Remove.
28972 (__arm_vmulq_x_u16): Remove.
28973 (__arm_vmulq_x_u32): Remove.
28974 (__arm_vmulq_x_n_u8): Remove.
28975 (__arm_vmulq_x_n_u16): Remove.
28976 (__arm_vmulq_x_n_u32): Remove.
28977 (__arm_vmulq_n_f16): Remove.
28978 (__arm_vmulq_f16): Remove.
28979 (__arm_vmulq_n_f32): Remove.
28980 (__arm_vmulq_f32): Remove.
28981 (__arm_vmulq_m_f32): Remove.
28982 (__arm_vmulq_m_f16): Remove.
28983 (__arm_vmulq_m_n_f32): Remove.
28984 (__arm_vmulq_m_n_f16): Remove.
28985 (__arm_vmulq_x_f16): Remove.
28986 (__arm_vmulq_x_f32): Remove.
28987 (__arm_vmulq_x_n_f16): Remove.
28988 (__arm_vmulq_x_n_f32): Remove.
28989 (__arm_vmulq): Remove.
28990 (__arm_vmulq_m): Remove.
28991 (__arm_vmulq_x): Remove.
28995 (vsubq_n_f16): Remove.
28996 (vsubq_n_f32): Remove.
28997 (vsubq_u8): Remove.
28998 (vsubq_n_u8): Remove.
28999 (vsubq_s8): Remove.
29000 (vsubq_n_s8): Remove.
29001 (vsubq_u16): Remove.
29002 (vsubq_n_u16): Remove.
29003 (vsubq_s16): Remove.
29004 (vsubq_n_s16): Remove.
29005 (vsubq_u32): Remove.
29006 (vsubq_n_u32): Remove.
29007 (vsubq_s32): Remove.
29008 (vsubq_n_s32): Remove.
29009 (vsubq_f16): Remove.
29010 (vsubq_f32): Remove.
29011 (vsubq_m_s8): Remove.
29012 (vsubq_m_u8): Remove.
29013 (vsubq_m_s16): Remove.
29014 (vsubq_m_u16): Remove.
29015 (vsubq_m_s32): Remove.
29016 (vsubq_m_u32): Remove.
29017 (vsubq_m_n_s8): Remove.
29018 (vsubq_m_n_s32): Remove.
29019 (vsubq_m_n_s16): Remove.
29020 (vsubq_m_n_u8): Remove.
29021 (vsubq_m_n_u32): Remove.
29022 (vsubq_m_n_u16): Remove.
29023 (vsubq_m_f32): Remove.
29024 (vsubq_m_f16): Remove.
29025 (vsubq_m_n_f32): Remove.
29026 (vsubq_m_n_f16): Remove.
29027 (vsubq_x_s8): Remove.
29028 (vsubq_x_s16): Remove.
29029 (vsubq_x_s32): Remove.
29030 (vsubq_x_n_s8): Remove.
29031 (vsubq_x_n_s16): Remove.
29032 (vsubq_x_n_s32): Remove.
29033 (vsubq_x_u8): Remove.
29034 (vsubq_x_u16): Remove.
29035 (vsubq_x_u32): Remove.
29036 (vsubq_x_n_u8): Remove.
29037 (vsubq_x_n_u16): Remove.
29038 (vsubq_x_n_u32): Remove.
29039 (vsubq_x_f16): Remove.
29040 (vsubq_x_f32): Remove.
29041 (vsubq_x_n_f16): Remove.
29042 (vsubq_x_n_f32): Remove.
29043 (__arm_vsubq_u8): Remove.
29044 (__arm_vsubq_n_u8): Remove.
29045 (__arm_vsubq_s8): Remove.
29046 (__arm_vsubq_n_s8): Remove.
29047 (__arm_vsubq_u16): Remove.
29048 (__arm_vsubq_n_u16): Remove.
29049 (__arm_vsubq_s16): Remove.
29050 (__arm_vsubq_n_s16): Remove.
29051 (__arm_vsubq_u32): Remove.
29052 (__arm_vsubq_n_u32): Remove.
29053 (__arm_vsubq_s32): Remove.
29054 (__arm_vsubq_n_s32): Remove.
29055 (__arm_vsubq_m_s8): Remove.
29056 (__arm_vsubq_m_u8): Remove.
29057 (__arm_vsubq_m_s16): Remove.
29058 (__arm_vsubq_m_u16): Remove.
29059 (__arm_vsubq_m_s32): Remove.
29060 (__arm_vsubq_m_u32): Remove.
29061 (__arm_vsubq_m_n_s8): Remove.
29062 (__arm_vsubq_m_n_s32): Remove.
29063 (__arm_vsubq_m_n_s16): Remove.
29064 (__arm_vsubq_m_n_u8): Remove.
29065 (__arm_vsubq_m_n_u32): Remove.
29066 (__arm_vsubq_m_n_u16): Remove.
29067 (__arm_vsubq_x_s8): Remove.
29068 (__arm_vsubq_x_s16): Remove.
29069 (__arm_vsubq_x_s32): Remove.
29070 (__arm_vsubq_x_n_s8): Remove.
29071 (__arm_vsubq_x_n_s16): Remove.
29072 (__arm_vsubq_x_n_s32): Remove.
29073 (__arm_vsubq_x_u8): Remove.
29074 (__arm_vsubq_x_u16): Remove.
29075 (__arm_vsubq_x_u32): Remove.
29076 (__arm_vsubq_x_n_u8): Remove.
29077 (__arm_vsubq_x_n_u16): Remove.
29078 (__arm_vsubq_x_n_u32): Remove.
29079 (__arm_vsubq_n_f16): Remove.
29080 (__arm_vsubq_n_f32): Remove.
29081 (__arm_vsubq_f16): Remove.
29082 (__arm_vsubq_f32): Remove.
29083 (__arm_vsubq_m_f32): Remove.
29084 (__arm_vsubq_m_f16): Remove.
29085 (__arm_vsubq_m_n_f32): Remove.
29086 (__arm_vsubq_m_n_f16): Remove.
29087 (__arm_vsubq_x_f16): Remove.
29088 (__arm_vsubq_x_f32): Remove.
29089 (__arm_vsubq_x_n_f16): Remove.
29090 (__arm_vsubq_x_n_f32): Remove.
29091 (__arm_vsubq): Remove.
29092 (__arm_vsubq_m): Remove.
29093 (__arm_vsubq_x): Remove.
29094 * config/arm/arm_mve_builtins.def (vsubq_u, vsubq_s, vsubq_f):
29096 (vmulq_u, vmulq_s, vmulq_f): Remove.
29097 * config/arm/mve.md (mve_vsubq_<supf><mode>): Remove.
29098 (mve_vmulq_<supf><mode>): Remove.
29100 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29102 * config/arm/iterators.md (MVE_INT_BINARY_RTX, MVE_INT_M_BINARY)
29103 (MVE_INT_M_N_BINARY, MVE_INT_N_BINARY, MVE_FP_M_BINARY)
29104 (MVE_FP_M_N_BINARY, MVE_FP_N_BINARY, mve_addsubmul, mve_insn): New
29106 * config/arm/mve.md
29107 (mve_vsubq_n_f<mode>, mve_vaddq_n_f<mode>, mve_vmulq_n_f<mode>):
29109 (@mve_<mve_insn>q_n_f<mode>): ... this.
29110 (mve_vaddq_n_<supf><mode>, mve_vmulq_n_<supf><mode>)
29111 (mve_vsubq_n_<supf><mode>): Factorize into ...
29112 (@mve_<mve_insn>q_n_<supf><mode>): ... this.
29113 (mve_vaddq<mode>, mve_vmulq<mode>, mve_vsubq<mode>): Factorize
29115 (mve_<mve_addsubmul>q<mode>): ... this.
29116 (mve_vaddq_f<mode>, mve_vmulq_f<mode>, mve_vsubq_f<mode>):
29118 (mve_<mve_addsubmul>q_f<mode>): ... this.
29119 (mve_vaddq_m_<supf><mode>, mve_vmulq_m_<supf><mode>)
29120 (mve_vsubq_m_<supf><mode>): Factorize into ...
29121 (@mve_<mve_insn>q_m_<supf><mode>): ... this,
29122 (mve_vaddq_m_n_<supf><mode>, mve_vmulq_m_n_<supf><mode>)
29123 (mve_vsubq_m_n_<supf><mode>): Factorize into ...
29124 (@mve_<mve_insn>q_m_n_<supf><mode>): ... this.
29125 (mve_vaddq_m_f<mode>, mve_vmulq_m_f<mode>, mve_vsubq_m_f<mode>):
29127 (@mve_<mve_insn>q_m_f<mode>): ... this.
29128 (mve_vaddq_m_n_f<mode>, mve_vmulq_m_n_f<mode>)
29129 (mve_vsubq_m_n_f<mode>): Factorize into ...
29130 (@mve_<mve_insn>q_m_n_f<mode>): ... this.
29132 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29134 * config/arm/arm-mve-builtins-functions.h (class
29135 unspec_based_mve_function_base): New.
29136 (class unspec_based_mve_function_exact_insn): New.
29138 2023-05-03 Christophe Lyon <christophe.lyon@arm.com>
29140 * config/arm/arm-mve-builtins-shapes.cc (binary_opt_n): New.
29141 * config/arm/arm-mve-builtins-shapes.h (binary_opt_n): New.
29143 2023-05-03 Murray Steele <murray.steele@arm.com>
29144 Christophe Lyon <christophe.lyon@arm.com>
29146 * config/arm/arm-mve-builtins-base.cc (class
29147 vuninitializedq_impl): New.
29148 * config/arm/arm-mve-builtins-base.def (vuninitializedq): New.
29149 * config/arm/arm-mve-builtins-base.h (vuninitializedq): New
29151 * config/arm/arm-mve-builtins-shapes.cc (inherent): New.
29152 * config/arm/arm-mve-builtins-shapes.h (inherent): New
29154 * config/arm/arm_mve_types.h (__arm_vuninitializedq): Move to ...
29155 * config/arm/arm_mve.h (__arm_vuninitializedq): ... here.
29156 (__arm_vuninitializedq_u8): Remove.
29157 (__arm_vuninitializedq_u16): Remove.
29158 (__arm_vuninitializedq_u32): Remove.
29159 (__arm_vuninitializedq_u64): Remove.
29160 (__arm_vuninitializedq_s8): Remove.
29161 (__arm_vuninitializedq_s16): Remove.
29162 (__arm_vuninitializedq_s32): Remove.
29163 (__arm_vuninitializedq_s64): Remove.
29164 (__arm_vuninitializedq_f16): Remove.
29165 (__arm_vuninitializedq_f32): Remove.
29167 2023-05-03 Murray Steele <murray.steele@arm.com>
29168 Christophe Lyon <christophe.lyon@arm.com>
29170 * config/arm/arm-mve-builtins-base.cc (vreinterpretq_impl): New class.
29171 * config/arm/arm-mve-builtins-base.def: Define vreinterpretq.
29172 * config/arm/arm-mve-builtins-base.h (vreinterpretq): New declaration.
29173 * config/arm/arm-mve-builtins-shapes.cc (parse_element_type): New function.
29174 (parse_type): Likewise.
29175 (parse_signature): Likewise.
29176 (build_one): Likewise.
29177 (build_all): Likewise.
29178 (overloaded_base): New struct.
29179 (unary_convert_def): Likewise.
29180 * config/arm/arm-mve-builtins-shapes.h (unary_convert): Declare.
29181 * config/arm/arm-mve-builtins.cc (TYPES_reinterpret_signed1): New
29183 (TYPES_reinterpret_unsigned1): Likewise.
29184 (TYPES_reinterpret_integer): Likewise.
29185 (TYPES_reinterpret_integer1): Likewise.
29186 (TYPES_reinterpret_float1): Likewise.
29187 (TYPES_reinterpret_float): Likewise.
29188 (reinterpret_integer): New.
29189 (reinterpret_float): New.
29190 (handle_arm_mve_h): Register builtins.
29191 * config/arm/arm_mve.h (vreinterpretq_s16): Remove.
29192 (vreinterpretq_s32): Likewise.
29193 (vreinterpretq_s64): Likewise.
29194 (vreinterpretq_s8): Likewise.
29195 (vreinterpretq_u16): Likewise.
29196 (vreinterpretq_u32): Likewise.
29197 (vreinterpretq_u64): Likewise.
29198 (vreinterpretq_u8): Likewise.
29199 (vreinterpretq_f16): Likewise.
29200 (vreinterpretq_f32): Likewise.
29201 (vreinterpretq_s16_s32): Likewise.
29202 (vreinterpretq_s16_s64): Likewise.
29203 (vreinterpretq_s16_s8): Likewise.
29204 (vreinterpretq_s16_u16): Likewise.
29205 (vreinterpretq_s16_u32): Likewise.
29206 (vreinterpretq_s16_u64): Likewise.
29207 (vreinterpretq_s16_u8): Likewise.
29208 (vreinterpretq_s32_s16): Likewise.
29209 (vreinterpretq_s32_s64): Likewise.
29210 (vreinterpretq_s32_s8): Likewise.
29211 (vreinterpretq_s32_u16): Likewise.
29212 (vreinterpretq_s32_u32): Likewise.
29213 (vreinterpretq_s32_u64): Likewise.
29214 (vreinterpretq_s32_u8): Likewise.
29215 (vreinterpretq_s64_s16): Likewise.
29216 (vreinterpretq_s64_s32): Likewise.
29217 (vreinterpretq_s64_s8): Likewise.
29218 (vreinterpretq_s64_u16): Likewise.
29219 (vreinterpretq_s64_u32): Likewise.
29220 (vreinterpretq_s64_u64): Likewise.
29221 (vreinterpretq_s64_u8): Likewise.
29222 (vreinterpretq_s8_s16): Likewise.
29223 (vreinterpretq_s8_s32): Likewise.
29224 (vreinterpretq_s8_s64): Likewise.
29225 (vreinterpretq_s8_u16): Likewise.
29226 (vreinterpretq_s8_u32): Likewise.
29227 (vreinterpretq_s8_u64): Likewise.
29228 (vreinterpretq_s8_u8): Likewise.
29229 (vreinterpretq_u16_s16): Likewise.
29230 (vreinterpretq_u16_s32): Likewise.
29231 (vreinterpretq_u16_s64): Likewise.
29232 (vreinterpretq_u16_s8): Likewise.
29233 (vreinterpretq_u16_u32): Likewise.
29234 (vreinterpretq_u16_u64): Likewise.
29235 (vreinterpretq_u16_u8): Likewise.
29236 (vreinterpretq_u32_s16): Likewise.
29237 (vreinterpretq_u32_s32): Likewise.
29238 (vreinterpretq_u32_s64): Likewise.
29239 (vreinterpretq_u32_s8): Likewise.
29240 (vreinterpretq_u32_u16): Likewise.
29241 (vreinterpretq_u32_u64): Likewise.
29242 (vreinterpretq_u32_u8): Likewise.
29243 (vreinterpretq_u64_s16): Likewise.
29244 (vreinterpretq_u64_s32): Likewise.
29245 (vreinterpretq_u64_s64): Likewise.
29246 (vreinterpretq_u64_s8): Likewise.
29247 (vreinterpretq_u64_u16): Likewise.
29248 (vreinterpretq_u64_u32): Likewise.
29249 (vreinterpretq_u64_u8): Likewise.
29250 (vreinterpretq_u8_s16): Likewise.
29251 (vreinterpretq_u8_s32): Likewise.
29252 (vreinterpretq_u8_s64): Likewise.
29253 (vreinterpretq_u8_s8): Likewise.
29254 (vreinterpretq_u8_u16): Likewise.
29255 (vreinterpretq_u8_u32): Likewise.
29256 (vreinterpretq_u8_u64): Likewise.
29257 (vreinterpretq_s32_f16): Likewise.
29258 (vreinterpretq_s32_f32): Likewise.
29259 (vreinterpretq_u16_f16): Likewise.
29260 (vreinterpretq_u16_f32): Likewise.
29261 (vreinterpretq_u32_f16): Likewise.
29262 (vreinterpretq_u32_f32): Likewise.
29263 (vreinterpretq_u64_f16): Likewise.
29264 (vreinterpretq_u64_f32): Likewise.
29265 (vreinterpretq_u8_f16): Likewise.
29266 (vreinterpretq_u8_f32): Likewise.
29267 (vreinterpretq_f16_f32): Likewise.
29268 (vreinterpretq_f16_s16): Likewise.
29269 (vreinterpretq_f16_s32): Likewise.
29270 (vreinterpretq_f16_s64): Likewise.
29271 (vreinterpretq_f16_s8): Likewise.
29272 (vreinterpretq_f16_u16): Likewise.
29273 (vreinterpretq_f16_u32): Likewise.
29274 (vreinterpretq_f16_u64): Likewise.
29275 (vreinterpretq_f16_u8): Likewise.
29276 (vreinterpretq_f32_f16): Likewise.
29277 (vreinterpretq_f32_s16): Likewise.
29278 (vreinterpretq_f32_s32): Likewise.
29279 (vreinterpretq_f32_s64): Likewise.
29280 (vreinterpretq_f32_s8): Likewise.
29281 (vreinterpretq_f32_u16): Likewise.
29282 (vreinterpretq_f32_u32): Likewise.
29283 (vreinterpretq_f32_u64): Likewise.
29284 (vreinterpretq_f32_u8): Likewise.
29285 (vreinterpretq_s16_f16): Likewise.
29286 (vreinterpretq_s16_f32): Likewise.
29287 (vreinterpretq_s64_f16): Likewise.
29288 (vreinterpretq_s64_f32): Likewise.
29289 (vreinterpretq_s8_f16): Likewise.
29290 (vreinterpretq_s8_f32): Likewise.
29291 (__arm_vreinterpretq_f16): Likewise.
29292 (__arm_vreinterpretq_f32): Likewise.
29293 (__arm_vreinterpretq_s16): Likewise.
29294 (__arm_vreinterpretq_s32): Likewise.
29295 (__arm_vreinterpretq_s64): Likewise.
29296 (__arm_vreinterpretq_s8): Likewise.
29297 (__arm_vreinterpretq_u16): Likewise.
29298 (__arm_vreinterpretq_u32): Likewise.
29299 (__arm_vreinterpretq_u64): Likewise.
29300 (__arm_vreinterpretq_u8): Likewise.
29301 * config/arm/arm_mve_types.h (__arm_vreinterpretq_s16_s32): Remove.
29302 (__arm_vreinterpretq_s16_s64): Likewise.
29303 (__arm_vreinterpretq_s16_s8): Likewise.
29304 (__arm_vreinterpretq_s16_u16): Likewise.
29305 (__arm_vreinterpretq_s16_u32): Likewise.
29306 (__arm_vreinterpretq_s16_u64): Likewise.
29307 (__arm_vreinterpretq_s16_u8): Likewise.
29308 (__arm_vreinterpretq_s32_s16): Likewise.
29309 (__arm_vreinterpretq_s32_s64): Likewise.
29310 (__arm_vreinterpretq_s32_s8): Likewise.
29311 (__arm_vreinterpretq_s32_u16): Likewise.
29312 (__arm_vreinterpretq_s32_u32): Likewise.
29313 (__arm_vreinterpretq_s32_u64): Likewise.
29314 (__arm_vreinterpretq_s32_u8): Likewise.
29315 (__arm_vreinterpretq_s64_s16): Likewise.
29316 (__arm_vreinterpretq_s64_s32): Likewise.
29317 (__arm_vreinterpretq_s64_s8): Likewise.
29318 (__arm_vreinterpretq_s64_u16): Likewise.
29319 (__arm_vreinterpretq_s64_u32): Likewise.
29320 (__arm_vreinterpretq_s64_u64): Likewise.
29321 (__arm_vreinterpretq_s64_u8): Likewise.
29322 (__arm_vreinterpretq_s8_s16): Likewise.
29323 (__arm_vreinterpretq_s8_s32): Likewise.
29324 (__arm_vreinterpretq_s8_s64): Likewise.
29325 (__arm_vreinterpretq_s8_u16): Likewise.
29326 (__arm_vreinterpretq_s8_u32): Likewise.
29327 (__arm_vreinterpretq_s8_u64): Likewise.
29328 (__arm_vreinterpretq_s8_u8): Likewise.
29329 (__arm_vreinterpretq_u16_s16): Likewise.
29330 (__arm_vreinterpretq_u16_s32): Likewise.
29331 (__arm_vreinterpretq_u16_s64): Likewise.
29332 (__arm_vreinterpretq_u16_s8): Likewise.
29333 (__arm_vreinterpretq_u16_u32): Likewise.
29334 (__arm_vreinterpretq_u16_u64): Likewise.
29335 (__arm_vreinterpretq_u16_u8): Likewise.
29336 (__arm_vreinterpretq_u32_s16): Likewise.
29337 (__arm_vreinterpretq_u32_s32): Likewise.
29338 (__arm_vreinterpretq_u32_s64): Likewise.
29339 (__arm_vreinterpretq_u32_s8): Likewise.
29340 (__arm_vreinterpretq_u32_u16): Likewise.
29341 (__arm_vreinterpretq_u32_u64): Likewise.
29342 (__arm_vreinterpretq_u32_u8): Likewise.
29343 (__arm_vreinterpretq_u64_s16): Likewise.
29344 (__arm_vreinterpretq_u64_s32): Likewise.
29345 (__arm_vreinterpretq_u64_s64): Likewise.
29346 (__arm_vreinterpretq_u64_s8): Likewise.
29347 (__arm_vreinterpretq_u64_u16): Likewise.
29348 (__arm_vreinterpretq_u64_u32): Likewise.
29349 (__arm_vreinterpretq_u64_u8): Likewise.
29350 (__arm_vreinterpretq_u8_s16): Likewise.
29351 (__arm_vreinterpretq_u8_s32): Likewise.
29352 (__arm_vreinterpretq_u8_s64): Likewise.
29353 (__arm_vreinterpretq_u8_s8): Likewise.
29354 (__arm_vreinterpretq_u8_u16): Likewise.
29355 (__arm_vreinterpretq_u8_u32): Likewise.
29356 (__arm_vreinterpretq_u8_u64): Likewise.
29357 (__arm_vreinterpretq_s32_f16): Likewise.
29358 (__arm_vreinterpretq_s32_f32): Likewise.
29359 (__arm_vreinterpretq_s16_f16): Likewise.
29360 (__arm_vreinterpretq_s16_f32): Likewise.
29361 (__arm_vreinterpretq_s64_f16): Likewise.
29362 (__arm_vreinterpretq_s64_f32): Likewise.
29363 (__arm_vreinterpretq_s8_f16): Likewise.
29364 (__arm_vreinterpretq_s8_f32): Likewise.
29365 (__arm_vreinterpretq_u16_f16): Likewise.
29366 (__arm_vreinterpretq_u16_f32): Likewise.
29367 (__arm_vreinterpretq_u32_f16): Likewise.
29368 (__arm_vreinterpretq_u32_f32): Likewise.
29369 (__arm_vreinterpretq_u64_f16): Likewise.
29370 (__arm_vreinterpretq_u64_f32): Likewise.
29371 (__arm_vreinterpretq_u8_f16): Likewise.
29372 (__arm_vreinterpretq_u8_f32): Likewise.
29373 (__arm_vreinterpretq_f16_f32): Likewise.
29374 (__arm_vreinterpretq_f16_s16): Likewise.
29375 (__arm_vreinterpretq_f16_s32): Likewise.
29376 (__arm_vreinterpretq_f16_s64): Likewise.
29377 (__arm_vreinterpretq_f16_s8): Likewise.
29378 (__arm_vreinterpretq_f16_u16): Likewise.
29379 (__arm_vreinterpretq_f16_u32): Likewise.
29380 (__arm_vreinterpretq_f16_u64): Likewise.
29381 (__arm_vreinterpretq_f16_u8): Likewise.
29382 (__arm_vreinterpretq_f32_f16): Likewise.
29383 (__arm_vreinterpretq_f32_s16): Likewise.
29384 (__arm_vreinterpretq_f32_s32): Likewise.
29385 (__arm_vreinterpretq_f32_s64): Likewise.
29386 (__arm_vreinterpretq_f32_s8): Likewise.
29387 (__arm_vreinterpretq_f32_u16): Likewise.
29388 (__arm_vreinterpretq_f32_u32): Likewise.
29389 (__arm_vreinterpretq_f32_u64): Likewise.
29390 (__arm_vreinterpretq_f32_u8): Likewise.
29391 (__arm_vreinterpretq_s16): Likewise.
29392 (__arm_vreinterpretq_s32): Likewise.
29393 (__arm_vreinterpretq_s64): Likewise.
29394 (__arm_vreinterpretq_s8): Likewise.
29395 (__arm_vreinterpretq_u16): Likewise.
29396 (__arm_vreinterpretq_u32): Likewise.
29397 (__arm_vreinterpretq_u64): Likewise.
29398 (__arm_vreinterpretq_u8): Likewise.
29399 (__arm_vreinterpretq_f16): Likewise.
29400 (__arm_vreinterpretq_f32): Likewise.
29401 * config/arm/mve.md (@arm_mve_reinterpret<mode>): New pattern.
29402 * config/arm/unspecs.md: (REINTERPRET): New unspec.
29404 2023-05-03 Murray Steele <murray.steele@arm.com>
29405 Christophe Lyon <christophe.lyon@arm.com>
29406 Christophe Lyon <christophe.lyon@arm.com
29408 * config.gcc: Add arm-mve-builtins-base.o and
29409 arm-mve-builtins-shapes.o to extra_objs.
29410 * config/arm/arm-builtins.cc (arm_builtin_decl): Handle MVE builtin
29412 (arm_expand_builtin): Likewise
29413 (arm_check_builtin_call): Likewise
29414 (arm_describe_resolver): Likewise.
29415 * config/arm/arm-builtins.h (enum resolver_ident): Add
29417 * config/arm/arm-c.cc (arm_pragma_arm): Handle new pragma.
29418 (arm_resolve_overloaded_builtin): Handle MVE builtins.
29419 (arm_register_target_pragmas): Register arm_check_builtin_call.
29420 * config/arm/arm-mve-builtins.cc (class registered_function): New
29422 (struct registered_function_hasher): New struct.
29423 (pred_suffixes): New table.
29424 (mode_suffixes): New table.
29425 (type_suffix_info): New table.
29426 (TYPES_float16): New.
29427 (TYPES_all_float): New.
29428 (TYPES_integer_8): New.
29429 (TYPES_integer_8_16): New.
29430 (TYPES_integer_16_32): New.
29431 (TYPES_integer_32): New.
29432 (TYPES_signed_16_32): New.
29433 (TYPES_signed_32): New.
29434 (TYPES_all_signed): New.
29435 (TYPES_all_unsigned): New.
29436 (TYPES_all_integer): New.
29437 (TYPES_all_integer_with_64): New.
29438 (DEF_VECTOR_TYPE): New.
29439 (DEF_DOUBLE_TYPE): New.
29440 (DEF_MVE_TYPES_ARRAY): New.
29441 (all_integer): New.
29442 (all_integer_with_64): New.
29446 (all_unsigned): New.
29448 (integer_8_16): New.
29449 (integer_16_32): New.
29451 (signed_16_32): New.
29453 (register_vector_type): Use void_type_node for mve.fp-only types when
29454 mve.fp is not enabled.
29455 (register_builtin_tuple_types): Likewise.
29456 (handle_arm_mve_h): New function..
29457 (matches_type_p): Likewise..
29458 (report_out_of_range): Likewise.
29459 (report_not_enum): Likewise.
29460 (report_missing_float): Likewise.
29461 (report_non_ice): Likewise.
29462 (check_requires_float): Likewise.
29463 (function_instance::hash): Likewise
29464 (function_instance::call_properties): Likewise.
29465 (function_instance::reads_global_state_p): Likewise.
29466 (function_instance::modifies_global_state_p): Likewise.
29467 (function_instance::could_trap_p): Likewise.
29468 (function_instance::has_inactive_argument): Likewise.
29469 (registered_function_hasher::hash): Likewise.
29470 (registered_function_hasher::equal): Likewise.
29471 (function_builder::function_builder): Likewise.
29472 (function_builder::~function_builder): Likewise.
29473 (function_builder::append_name): Likewise.
29474 (function_builder::finish_name): Likewise.
29475 (function_builder::get_name): Likewise.
29476 (add_attribute): Likewise.
29477 (function_builder::get_attributes): Likewise.
29478 (function_builder::add_function): Likewise.
29479 (function_builder::add_unique_function): Likewise.
29480 (function_builder::add_overloaded_function): Likewise.
29481 (function_builder::add_overloaded_functions): Likewise.
29482 (function_builder::register_function_group): Likewise.
29483 (function_call_info::function_call_info): Likewise.
29484 (function_resolver::function_resolver): Likewise.
29485 (function_resolver::get_vector_type): Likewise.
29486 (function_resolver::get_scalar_type_name): Likewise.
29487 (function_resolver::get_argument_type): Likewise.
29488 (function_resolver::scalar_argument_p): Likewise.
29489 (function_resolver::report_no_such_form): Likewise.
29490 (function_resolver::lookup_form): Likewise.
29491 (function_resolver::resolve_to): Likewise.
29492 (function_resolver::infer_vector_or_tuple_type): Likewise.
29493 (function_resolver::infer_vector_type): Likewise.
29494 (function_resolver::require_vector_or_scalar_type): Likewise.
29495 (function_resolver::require_vector_type): Likewise.
29496 (function_resolver::require_matching_vector_type): Likewise.
29497 (function_resolver::require_derived_vector_type): Likewise.
29498 (function_resolver::require_derived_scalar_type): Likewise.
29499 (function_resolver::require_integer_immediate): Likewise.
29500 (function_resolver::require_scalar_type): Likewise.
29501 (function_resolver::check_num_arguments): Likewise.
29502 (function_resolver::check_gp_argument): Likewise.
29503 (function_resolver::finish_opt_n_resolution): Likewise.
29504 (function_resolver::resolve_unary): Likewise.
29505 (function_resolver::resolve_unary_n): Likewise.
29506 (function_resolver::resolve_uniform): Likewise.
29507 (function_resolver::resolve_uniform_opt_n): Likewise.
29508 (function_resolver::resolve): Likewise.
29509 (function_checker::function_checker): Likewise.
29510 (function_checker::argument_exists_p): Likewise.
29511 (function_checker::require_immediate): Likewise.
29512 (function_checker::require_immediate_enum): Likewise.
29513 (function_checker::require_immediate_range): Likewise.
29514 (function_checker::check): Likewise.
29515 (gimple_folder::gimple_folder): Likewise.
29516 (gimple_folder::fold): Likewise.
29517 (function_expander::function_expander): Likewise.
29518 (function_expander::direct_optab_handler): Likewise.
29519 (function_expander::get_fallback_value): Likewise.
29520 (function_expander::get_reg_target): Likewise.
29521 (function_expander::add_output_operand): Likewise.
29522 (function_expander::add_input_operand): Likewise.
29523 (function_expander::add_integer_operand): Likewise.
29524 (function_expander::generate_insn): Likewise.
29525 (function_expander::use_exact_insn): Likewise.
29526 (function_expander::use_unpred_insn): Likewise.
29527 (function_expander::use_pred_x_insn): Likewise.
29528 (function_expander::use_cond_insn): Likewise.
29529 (function_expander::map_to_rtx_codes): Likewise.
29530 (function_expander::expand): Likewise.
29531 (resolve_overloaded_builtin): Likewise.
29532 (check_builtin_call): Likewise.
29533 (gimple_fold_builtin): Likewise.
29534 (expand_builtin): Likewise.
29535 (gt_ggc_mx): Likewise.
29536 (gt_pch_nx): Likewise.
29537 (gt_pch_nx): Likewise.
29538 * config/arm/arm-mve-builtins.def(s8): Define new type suffix.
29549 (offset): New mode.
29550 * config/arm/arm-mve-builtins.h (MAX_TUPLE_SIZE): New constant.
29551 (CP_READ_FPCR): Likewise.
29552 (CP_RAISE_FP_EXCEPTIONS): Likewise.
29553 (CP_READ_MEMORY): Likewise.
29554 (CP_WRITE_MEMORY): Likewise.
29555 (enum units_index): New enum.
29556 (enum predication_index): New.
29557 (enum type_class_index): New.
29558 (enum mode_suffix_index): New enum.
29559 (enum type_suffix_index): New.
29560 (struct mode_suffix_info): New struct.
29561 (struct type_suffix_info): New.
29562 (struct function_group_info): Likewise.
29563 (class function_instance): Likewise.
29564 (class registered_function): Likewise.
29565 (class function_builder): Likewise.
29566 (class function_call_info): Likewise.
29567 (class function_resolver): Likewise.
29568 (class function_checker): Likewise.
29569 (class gimple_folder): Likewise.
29570 (class function_expander): Likewise.
29571 (get_mve_pred16_t): Likewise.
29572 (find_mode_suffix): New function.
29573 (class function_base): Likewise.
29574 (class function_shape): Likewise.
29575 (function_instance::operator==): New function.
29576 (function_instance::operator!=): Likewise.
29577 (function_instance::vectors_per_tuple): Likewise.
29578 (function_instance::mode_suffix): Likewise.
29579 (function_instance::type_suffix): Likewise.
29580 (function_instance::scalar_type): Likewise.
29581 (function_instance::vector_type): Likewise.
29582 (function_instance::tuple_type): Likewise.
29583 (function_instance::vector_mode): Likewise.
29584 (function_call_info::function_returns_void_p): Likewise.
29585 (function_base::call_properties): Likewise.
29586 * config/arm/arm-protos.h (enum arm_builtin_class): Add
29588 (handle_arm_mve_h): New.
29589 (resolve_overloaded_builtin): New.
29590 (check_builtin_call): New.
29591 (gimple_fold_builtin): New.
29592 (expand_builtin): New.
29593 * config/arm/arm.cc (TARGET_GIMPLE_FOLD_BUILTIN): Define as
29594 arm_gimple_fold_builtin.
29595 (arm_gimple_fold_builtin): New function.
29596 * config/arm/arm_mve.h: Use new arm_mve.h pragma.
29597 * config/arm/predicates.md (arm_any_register_operand): New predicate.
29598 * config/arm/t-arm: (arm-mve-builtins.o): Add includes.
29599 (arm-mve-builtins-shapes.o): New target.
29600 (arm-mve-builtins-base.o): New target.
29601 * config/arm/arm-mve-builtins-base.cc: New file.
29602 * config/arm/arm-mve-builtins-base.def: New file.
29603 * config/arm/arm-mve-builtins-base.h: New file.
29604 * config/arm/arm-mve-builtins-functions.h: New file.
29605 * config/arm/arm-mve-builtins-shapes.cc: New file.
29606 * config/arm/arm-mve-builtins-shapes.h: New file.
29608 2023-05-03 Murray Steele <murray.steele@arm.com>
29609 Christophe Lyon <christophe.lyon@arm.com>
29610 Christophe Lyon <christophe.lyon@arm.com>
29612 * config/arm/arm-builtins.cc (arm_general_add_builtin_function):
29614 (arm_init_builtin): Use arm_general_add_builtin_function instead
29615 of arm_add_builtin_function.
29616 (arm_init_acle_builtins): Likewise.
29617 (arm_init_mve_builtins): Likewise.
29618 (arm_init_crypto_builtins): Likewise.
29619 (arm_init_builtins): Likewise.
29620 (arm_general_builtin_decl): New function.
29621 (arm_builtin_decl): Defer to numberspace-specialized functions.
29622 (arm_expand_builtin_args): Rename into arm_general_expand_builtin_args.
29623 (arm_expand_builtin_1): Rename into arm_general_expand_builtin_1 and ...
29624 (arm_general_expand_builtin_1): ... specialize for general builtins.
29625 (arm_expand_acle_builtin): Use arm_general_expand_builtin
29626 instead of arm_expand_builtin.
29627 (arm_expand_mve_builtin): Likewise.
29628 (arm_expand_neon_builtin): Likewise.
29629 (arm_expand_vfp_builtin): Likewise.
29630 (arm_general_expand_builtin): New function.
29631 (arm_expand_builtin): Specialize for general builtins.
29632 (arm_general_check_builtin_call): New function.
29633 (arm_check_builtin_call): Specialize for general builtins.
29634 (arm_describe_resolver): Validate numberspace.
29635 (arm_cde_end_args): Likewise.
29636 * config/arm/arm-protos.h (enum arm_builtin_class): New enum.
29637 (ARM_BUILTIN_SHIFT, ARM_BUILTIN_CLASS): New constants.
29639 2023-05-03 Martin Liska <mliska@suse.cz>
29642 * config/riscv/sync.md: Add gcc_unreachable to a switch.
29644 2023-05-03 Richard Biener <rguenther@suse.de>
29646 * tree-ssa-loop-split.cc (split_at_bb_p): Avoid last_stmt.
29647 (patch_loop_exit): Likewise.
29648 (connect_loops): Likewise.
29649 (split_loop): Likewise.
29650 (control_dep_semi_invariant_p): Likewise.
29651 (do_split_loop_on_cond): Likewise.
29652 (split_loop_on_cond): Likewise.
29653 * tree-ssa-loop-unswitch.cc (find_unswitching_predicates_for_bb):
29655 (simplify_loop_version): Likewise.
29656 (evaluate_bbs): Likewise.
29657 (find_loop_guard): Likewise.
29658 (clean_up_after_unswitching): Likewise.
29659 * tree-ssa-math-opts.cc (maybe_optimize_guarding_check):
29661 (optimize_spaceship): Take a gcond * argument, avoid
29663 (math_opts_dom_walker::after_dom_children): Adjust call to
29664 optimize_spaceship.
29665 * tree-vrp.cc (maybe_set_nonzero_bits): Avoid last_stmt.
29666 * value-pointer-equiv.cc (pointer_equiv_analyzer::visit_edge):
29669 2023-05-03 Andreas Schwab <schwab@suse.de>
29671 * config/riscv/linux.h (LIB_SPEC): Don't redefine.
29673 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29675 * config/riscv/riscv-vector-builtins-bases.cc (fold_fault_load):
29677 (class vlseg): New class.
29678 (class vsseg): Ditto.
29679 (class vlsseg): Ditto.
29680 (class vssseg): Ditto.
29681 (class seg_indexed_load): Ditto.
29682 (class seg_indexed_store): Ditto.
29683 (class vlsegff): Ditto.
29685 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
29686 * config/riscv/riscv-vector-builtins-functions.def (vlseg):
29696 * config/riscv/riscv-vector-builtins-shapes.cc (struct
29697 seg_loadstore_def): Ditto.
29698 (struct seg_indexed_loadstore_def): Ditto.
29699 (struct seg_fault_load_def): Ditto.
29701 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
29702 * config/riscv/riscv-vector-builtins.cc
29703 (function_builder::append_nf): New function.
29704 * config/riscv/riscv-vector-builtins.def (vfloat32m1x2_t):
29705 Change ptr from double into float.
29706 (vfloat32m1x3_t): Ditto.
29707 (vfloat32m1x4_t): Ditto.
29708 (vfloat32m1x5_t): Ditto.
29709 (vfloat32m1x6_t): Ditto.
29710 (vfloat32m1x7_t): Ditto.
29711 (vfloat32m1x8_t): Ditto.
29712 (vfloat32m2x2_t): Ditto.
29713 (vfloat32m2x3_t): Ditto.
29714 (vfloat32m2x4_t): Ditto.
29715 (vfloat32m4x2_t): Ditto.
29716 * config/riscv/riscv-vector-builtins.h: Add segment intrinsics.
29717 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Adapt for
29719 * config/riscv/riscv.md: Add segment instructions.
29720 * config/riscv/vector-iterators.md: Support segment intrinsics.
29721 * config/riscv/vector.md (@pred_unit_strided_load<mode>): New
29723 (@pred_unit_strided_store<mode>): Ditto.
29724 (@pred_strided_load<mode>): Ditto.
29725 (@pred_strided_store<mode>): Ditto.
29726 (@pred_fault_load<mode>): Ditto.
29727 (@pred_indexed_<order>load<V1T:mode><V1I:mode>): Ditto.
29728 (@pred_indexed_<order>load<V2T:mode><V2I:mode>): Ditto.
29729 (@pred_indexed_<order>load<V4T:mode><V4I:mode>): Ditto.
29730 (@pred_indexed_<order>load<V8T:mode><V8I:mode>): Ditto.
29731 (@pred_indexed_<order>load<V16T:mode><V16I:mode>): Ditto.
29732 (@pred_indexed_<order>load<V32T:mode><V32I:mode>): Ditto.
29733 (@pred_indexed_<order>load<V64T:mode><V64I:mode>): Ditto.
29734 (@pred_indexed_<order>store<V1T:mode><V1I:mode>): Ditto.
29735 (@pred_indexed_<order>store<V2T:mode><V2I:mode>): Ditto.
29736 (@pred_indexed_<order>store<V4T:mode><V4I:mode>): Ditto.
29737 (@pred_indexed_<order>store<V8T:mode><V8I:mode>): Ditto.
29738 (@pred_indexed_<order>store<V16T:mode><V16I:mode>): Ditto.
29739 (@pred_indexed_<order>store<V32T:mode><V32I:mode>): Ditto.
29740 (@pred_indexed_<order>store<V64T:mode><V64I:mode>): Ditto.
29742 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
29744 * config/riscv/genrvv-type-indexer.cc (valid_type): Adapt for
29745 tuple type support.
29747 (floattype): Ditto.
29749 * config/riscv/riscv-vector-builtins-bases.cc: Ditto.
29750 * config/riscv/riscv-vector-builtins-functions.def (vset): Add
29752 (vget): Add tuple type vget.
29753 * config/riscv/riscv-vector-builtins-types.def
29754 (DEF_RVV_TUPLE_OPS): New macro.
29755 (vint8mf8x2_t): Ditto.
29756 (vuint8mf8x2_t): Ditto.
29757 (vint8mf8x3_t): Ditto.
29758 (vuint8mf8x3_t): Ditto.
29759 (vint8mf8x4_t): Ditto.
29760 (vuint8mf8x4_t): Ditto.
29761 (vint8mf8x5_t): Ditto.
29762 (vuint8mf8x5_t): Ditto.
29763 (vint8mf8x6_t): Ditto.
29764 (vuint8mf8x6_t): Ditto.
29765 (vint8mf8x7_t): Ditto.
29766 (vuint8mf8x7_t): Ditto.
29767 (vint8mf8x8_t): Ditto.
29768 (vuint8mf8x8_t): Ditto.
29769 (vint8mf4x2_t): Ditto.
29770 (vuint8mf4x2_t): Ditto.
29771 (vint8mf4x3_t): Ditto.
29772 (vuint8mf4x3_t): Ditto.
29773 (vint8mf4x4_t): Ditto.
29774 (vuint8mf4x4_t): Ditto.
29775 (vint8mf4x5_t): Ditto.
29776 (vuint8mf4x5_t): Ditto.
29777 (vint8mf4x6_t): Ditto.
29778 (vuint8mf4x6_t): Ditto.
29779 (vint8mf4x7_t): Ditto.
29780 (vuint8mf4x7_t): Ditto.
29781 (vint8mf4x8_t): Ditto.
29782 (vuint8mf4x8_t): Ditto.
29783 (vint8mf2x2_t): Ditto.
29784 (vuint8mf2x2_t): Ditto.
29785 (vint8mf2x3_t): Ditto.
29786 (vuint8mf2x3_t): Ditto.
29787 (vint8mf2x4_t): Ditto.
29788 (vuint8mf2x4_t): Ditto.
29789 (vint8mf2x5_t): Ditto.
29790 (vuint8mf2x5_t): Ditto.
29791 (vint8mf2x6_t): Ditto.
29792 (vuint8mf2x6_t): Ditto.
29793 (vint8mf2x7_t): Ditto.
29794 (vuint8mf2x7_t): Ditto.
29795 (vint8mf2x8_t): Ditto.
29796 (vuint8mf2x8_t): Ditto.
29797 (vint8m1x2_t): Ditto.
29798 (vuint8m1x2_t): Ditto.
29799 (vint8m1x3_t): Ditto.
29800 (vuint8m1x3_t): Ditto.
29801 (vint8m1x4_t): Ditto.
29802 (vuint8m1x4_t): Ditto.
29803 (vint8m1x5_t): Ditto.
29804 (vuint8m1x5_t): Ditto.
29805 (vint8m1x6_t): Ditto.
29806 (vuint8m1x6_t): Ditto.
29807 (vint8m1x7_t): Ditto.
29808 (vuint8m1x7_t): Ditto.
29809 (vint8m1x8_t): Ditto.
29810 (vuint8m1x8_t): Ditto.
29811 (vint8m2x2_t): Ditto.
29812 (vuint8m2x2_t): Ditto.
29813 (vint8m2x3_t): Ditto.
29814 (vuint8m2x3_t): Ditto.
29815 (vint8m2x4_t): Ditto.
29816 (vuint8m2x4_t): Ditto.
29817 (vint8m4x2_t): Ditto.
29818 (vuint8m4x2_t): Ditto.
29819 (vint16mf4x2_t): Ditto.
29820 (vuint16mf4x2_t): Ditto.
29821 (vint16mf4x3_t): Ditto.
29822 (vuint16mf4x3_t): Ditto.
29823 (vint16mf4x4_t): Ditto.
29824 (vuint16mf4x4_t): Ditto.
29825 (vint16mf4x5_t): Ditto.
29826 (vuint16mf4x5_t): Ditto.
29827 (vint16mf4x6_t): Ditto.
29828 (vuint16mf4x6_t): Ditto.
29829 (vint16mf4x7_t): Ditto.
29830 (vuint16mf4x7_t): Ditto.
29831 (vint16mf4x8_t): Ditto.
29832 (vuint16mf4x8_t): Ditto.
29833 (vint16mf2x2_t): Ditto.
29834 (vuint16mf2x2_t): Ditto.
29835 (vint16mf2x3_t): Ditto.
29836 (vuint16mf2x3_t): Ditto.
29837 (vint16mf2x4_t): Ditto.
29838 (vuint16mf2x4_t): Ditto.
29839 (vint16mf2x5_t): Ditto.
29840 (vuint16mf2x5_t): Ditto.
29841 (vint16mf2x6_t): Ditto.
29842 (vuint16mf2x6_t): Ditto.
29843 (vint16mf2x7_t): Ditto.
29844 (vuint16mf2x7_t): Ditto.
29845 (vint16mf2x8_t): Ditto.
29846 (vuint16mf2x8_t): Ditto.
29847 (vint16m1x2_t): Ditto.
29848 (vuint16m1x2_t): Ditto.
29849 (vint16m1x3_t): Ditto.
29850 (vuint16m1x3_t): Ditto.
29851 (vint16m1x4_t): Ditto.
29852 (vuint16m1x4_t): Ditto.
29853 (vint16m1x5_t): Ditto.
29854 (vuint16m1x5_t): Ditto.
29855 (vint16m1x6_t): Ditto.
29856 (vuint16m1x6_t): Ditto.
29857 (vint16m1x7_t): Ditto.
29858 (vuint16m1x7_t): Ditto.
29859 (vint16m1x8_t): Ditto.
29860 (vuint16m1x8_t): Ditto.
29861 (vint16m2x2_t): Ditto.
29862 (vuint16m2x2_t): Ditto.
29863 (vint16m2x3_t): Ditto.
29864 (vuint16m2x3_t): Ditto.
29865 (vint16m2x4_t): Ditto.
29866 (vuint16m2x4_t): Ditto.
29867 (vint16m4x2_t): Ditto.
29868 (vuint16m4x2_t): Ditto.
29869 (vint32mf2x2_t): Ditto.
29870 (vuint32mf2x2_t): Ditto.
29871 (vint32mf2x3_t): Ditto.
29872 (vuint32mf2x3_t): Ditto.
29873 (vint32mf2x4_t): Ditto.
29874 (vuint32mf2x4_t): Ditto.
29875 (vint32mf2x5_t): Ditto.
29876 (vuint32mf2x5_t): Ditto.
29877 (vint32mf2x6_t): Ditto.
29878 (vuint32mf2x6_t): Ditto.
29879 (vint32mf2x7_t): Ditto.
29880 (vuint32mf2x7_t): Ditto.
29881 (vint32mf2x8_t): Ditto.
29882 (vuint32mf2x8_t): Ditto.
29883 (vint32m1x2_t): Ditto.
29884 (vuint32m1x2_t): Ditto.
29885 (vint32m1x3_t): Ditto.
29886 (vuint32m1x3_t): Ditto.
29887 (vint32m1x4_t): Ditto.
29888 (vuint32m1x4_t): Ditto.
29889 (vint32m1x5_t): Ditto.
29890 (vuint32m1x5_t): Ditto.
29891 (vint32m1x6_t): Ditto.
29892 (vuint32m1x6_t): Ditto.
29893 (vint32m1x7_t): Ditto.
29894 (vuint32m1x7_t): Ditto.
29895 (vint32m1x8_t): Ditto.
29896 (vuint32m1x8_t): Ditto.
29897 (vint32m2x2_t): Ditto.
29898 (vuint32m2x2_t): Ditto.
29899 (vint32m2x3_t): Ditto.
29900 (vuint32m2x3_t): Ditto.
29901 (vint32m2x4_t): Ditto.
29902 (vuint32m2x4_t): Ditto.
29903 (vint32m4x2_t): Ditto.
29904 (vuint32m4x2_t): Ditto.
29905 (vint64m1x2_t): Ditto.
29906 (vuint64m1x2_t): Ditto.
29907 (vint64m1x3_t): Ditto.
29908 (vuint64m1x3_t): Ditto.
29909 (vint64m1x4_t): Ditto.
29910 (vuint64m1x4_t): Ditto.
29911 (vint64m1x5_t): Ditto.
29912 (vuint64m1x5_t): Ditto.
29913 (vint64m1x6_t): Ditto.
29914 (vuint64m1x6_t): Ditto.
29915 (vint64m1x7_t): Ditto.
29916 (vuint64m1x7_t): Ditto.
29917 (vint64m1x8_t): Ditto.
29918 (vuint64m1x8_t): Ditto.
29919 (vint64m2x2_t): Ditto.
29920 (vuint64m2x2_t): Ditto.
29921 (vint64m2x3_t): Ditto.
29922 (vuint64m2x3_t): Ditto.
29923 (vint64m2x4_t): Ditto.
29924 (vuint64m2x4_t): Ditto.
29925 (vint64m4x2_t): Ditto.
29926 (vuint64m4x2_t): Ditto.
29927 (vfloat32mf2x2_t): Ditto.
29928 (vfloat32mf2x3_t): Ditto.
29929 (vfloat32mf2x4_t): Ditto.
29930 (vfloat32mf2x5_t): Ditto.
29931 (vfloat32mf2x6_t): Ditto.
29932 (vfloat32mf2x7_t): Ditto.
29933 (vfloat32mf2x8_t): Ditto.
29934 (vfloat32m1x2_t): Ditto.
29935 (vfloat32m1x3_t): Ditto.
29936 (vfloat32m1x4_t): Ditto.
29937 (vfloat32m1x5_t): Ditto.
29938 (vfloat32m1x6_t): Ditto.
29939 (vfloat32m1x7_t): Ditto.
29940 (vfloat32m1x8_t): Ditto.
29941 (vfloat32m2x2_t): Ditto.
29942 (vfloat32m2x3_t): Ditto.
29943 (vfloat32m2x4_t): Ditto.
29944 (vfloat32m4x2_t): Ditto.
29945 (vfloat64m1x2_t): Ditto.
29946 (vfloat64m1x3_t): Ditto.
29947 (vfloat64m1x4_t): Ditto.
29948 (vfloat64m1x5_t): Ditto.
29949 (vfloat64m1x6_t): Ditto.
29950 (vfloat64m1x7_t): Ditto.
29951 (vfloat64m1x8_t): Ditto.
29952 (vfloat64m2x2_t): Ditto.
29953 (vfloat64m2x3_t): Ditto.
29954 (vfloat64m2x4_t): Ditto.
29955 (vfloat64m4x2_t): Ditto.
29956 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_OPS):
29958 (DEF_RVV_TYPE_INDEX): Ditto.
29959 (rvv_arg_type_info::get_tuple_subpart_type): New function.
29960 (DEF_RVV_TUPLE_TYPE): New macro.
29961 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE_INDEX):
29962 Adapt for tuple vget/vset support.
29963 (vint8mf4_t): Ditto.
29964 (vuint8mf4_t): Ditto.
29965 (vint8mf2_t): Ditto.
29966 (vuint8mf2_t): Ditto.
29967 (vint8m1_t): Ditto.
29968 (vuint8m1_t): Ditto.
29969 (vint8m2_t): Ditto.
29970 (vuint8m2_t): Ditto.
29971 (vint8m4_t): Ditto.
29972 (vuint8m4_t): Ditto.
29973 (vint8m8_t): Ditto.
29974 (vuint8m8_t): Ditto.
29975 (vint16mf4_t): Ditto.
29976 (vuint16mf4_t): Ditto.
29977 (vint16mf2_t): Ditto.
29978 (vuint16mf2_t): Ditto.
29979 (vint16m1_t): Ditto.
29980 (vuint16m1_t): Ditto.
29981 (vint16m2_t): Ditto.
29982 (vuint16m2_t): Ditto.
29983 (vint16m4_t): Ditto.
29984 (vuint16m4_t): Ditto.
29985 (vint16m8_t): Ditto.
29986 (vuint16m8_t): Ditto.
29987 (vint32mf2_t): Ditto.
29988 (vuint32mf2_t): Ditto.
29989 (vint32m1_t): Ditto.
29990 (vuint32m1_t): Ditto.
29991 (vint32m2_t): Ditto.
29992 (vuint32m2_t): Ditto.
29993 (vint32m4_t): Ditto.
29994 (vuint32m4_t): Ditto.
29995 (vint32m8_t): Ditto.
29996 (vuint32m8_t): Ditto.
29997 (vint64m1_t): Ditto.
29998 (vuint64m1_t): Ditto.
29999 (vint64m2_t): Ditto.
30000 (vuint64m2_t): Ditto.
30001 (vint64m4_t): Ditto.
30002 (vuint64m4_t): Ditto.
30003 (vint64m8_t): Ditto.
30004 (vuint64m8_t): Ditto.
30005 (vfloat32mf2_t): Ditto.
30006 (vfloat32m1_t): Ditto.
30007 (vfloat32m2_t): Ditto.
30008 (vfloat32m4_t): Ditto.
30009 (vfloat32m8_t): Ditto.
30010 (vfloat64m1_t): Ditto.
30011 (vfloat64m2_t): Ditto.
30012 (vfloat64m4_t): Ditto.
30013 (vfloat64m8_t): Ditto.
30014 (tuple_subpart): Add tuple subpart base type.
30015 * config/riscv/riscv-vector-builtins.h (struct
30016 rvv_arg_type_info): Ditto.
30017 (tuple_type_field): New function.
30019 2023-05-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
30021 * config/riscv/riscv-modes.def (RVV_TUPLE_MODES): New macro.
30022 (RVV_TUPLE_PARTIAL_MODES): Ditto.
30023 * config/riscv/riscv-protos.h (riscv_v_ext_tuple_mode_p): New
30026 (get_subpart_mode): Ditto.
30027 (get_tuple_mode): Ditto.
30028 (expand_tuple_move): Ditto.
30029 * config/riscv/riscv-v.cc (ENTRY): New macro.
30030 (TUPLE_ENTRY): Ditto.
30031 (get_nf): New function.
30032 (get_subpart_mode): Ditto.
30033 (get_tuple_mode): Ditto.
30034 (expand_tuple_move): Ditto.
30035 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TUPLE_TYPE):
30037 (register_tuple_type): New function
30038 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TUPLE_TYPE):
30040 (vint8mf8x2_t): New macro.
30041 (vuint8mf8x2_t): Ditto.
30042 (vint8mf8x3_t): Ditto.
30043 (vuint8mf8x3_t): Ditto.
30044 (vint8mf8x4_t): Ditto.
30045 (vuint8mf8x4_t): Ditto.
30046 (vint8mf8x5_t): Ditto.
30047 (vuint8mf8x5_t): Ditto.
30048 (vint8mf8x6_t): Ditto.
30049 (vuint8mf8x6_t): Ditto.
30050 (vint8mf8x7_t): Ditto.
30051 (vuint8mf8x7_t): Ditto.
30052 (vint8mf8x8_t): Ditto.
30053 (vuint8mf8x8_t): Ditto.
30054 (vint8mf4x2_t): Ditto.
30055 (vuint8mf4x2_t): Ditto.
30056 (vint8mf4x3_t): Ditto.
30057 (vuint8mf4x3_t): Ditto.
30058 (vint8mf4x4_t): Ditto.
30059 (vuint8mf4x4_t): Ditto.
30060 (vint8mf4x5_t): Ditto.
30061 (vuint8mf4x5_t): Ditto.
30062 (vint8mf4x6_t): Ditto.
30063 (vuint8mf4x6_t): Ditto.
30064 (vint8mf4x7_t): Ditto.
30065 (vuint8mf4x7_t): Ditto.
30066 (vint8mf4x8_t): Ditto.
30067 (vuint8mf4x8_t): Ditto.
30068 (vint8mf2x2_t): Ditto.
30069 (vuint8mf2x2_t): Ditto.
30070 (vint8mf2x3_t): Ditto.
30071 (vuint8mf2x3_t): Ditto.
30072 (vint8mf2x4_t): Ditto.
30073 (vuint8mf2x4_t): Ditto.
30074 (vint8mf2x5_t): Ditto.
30075 (vuint8mf2x5_t): Ditto.
30076 (vint8mf2x6_t): Ditto.
30077 (vuint8mf2x6_t): Ditto.
30078 (vint8mf2x7_t): Ditto.
30079 (vuint8mf2x7_t): Ditto.
30080 (vint8mf2x8_t): Ditto.
30081 (vuint8mf2x8_t): Ditto.
30082 (vint8m1x2_t): Ditto.
30083 (vuint8m1x2_t): Ditto.
30084 (vint8m1x3_t): Ditto.
30085 (vuint8m1x3_t): Ditto.
30086 (vint8m1x4_t): Ditto.
30087 (vuint8m1x4_t): Ditto.
30088 (vint8m1x5_t): Ditto.
30089 (vuint8m1x5_t): Ditto.
30090 (vint8m1x6_t): Ditto.
30091 (vuint8m1x6_t): Ditto.
30092 (vint8m1x7_t): Ditto.
30093 (vuint8m1x7_t): Ditto.
30094 (vint8m1x8_t): Ditto.
30095 (vuint8m1x8_t): Ditto.
30096 (vint8m2x2_t): Ditto.
30097 (vuint8m2x2_t): Ditto.
30098 (vint8m2x3_t): Ditto.
30099 (vuint8m2x3_t): Ditto.
30100 (vint8m2x4_t): Ditto.
30101 (vuint8m2x4_t): Ditto.
30102 (vint8m4x2_t): Ditto.
30103 (vuint8m4x2_t): Ditto.
30104 (vint16mf4x2_t): Ditto.
30105 (vuint16mf4x2_t): Ditto.
30106 (vint16mf4x3_t): Ditto.
30107 (vuint16mf4x3_t): Ditto.
30108 (vint16mf4x4_t): Ditto.
30109 (vuint16mf4x4_t): Ditto.
30110 (vint16mf4x5_t): Ditto.
30111 (vuint16mf4x5_t): Ditto.
30112 (vint16mf4x6_t): Ditto.
30113 (vuint16mf4x6_t): Ditto.
30114 (vint16mf4x7_t): Ditto.
30115 (vuint16mf4x7_t): Ditto.
30116 (vint16mf4x8_t): Ditto.
30117 (vuint16mf4x8_t): Ditto.
30118 (vint16mf2x2_t): Ditto.
30119 (vuint16mf2x2_t): Ditto.
30120 (vint16mf2x3_t): Ditto.
30121 (vuint16mf2x3_t): Ditto.
30122 (vint16mf2x4_t): Ditto.
30123 (vuint16mf2x4_t): Ditto.
30124 (vint16mf2x5_t): Ditto.
30125 (vuint16mf2x5_t): Ditto.
30126 (vint16mf2x6_t): Ditto.
30127 (vuint16mf2x6_t): Ditto.
30128 (vint16mf2x7_t): Ditto.
30129 (vuint16mf2x7_t): Ditto.
30130 (vint16mf2x8_t): Ditto.
30131 (vuint16mf2x8_t): Ditto.
30132 (vint16m1x2_t): Ditto.
30133 (vuint16m1x2_t): Ditto.
30134 (vint16m1x3_t): Ditto.
30135 (vuint16m1x3_t): Ditto.
30136 (vint16m1x4_t): Ditto.
30137 (vuint16m1x4_t): Ditto.
30138 (vint16m1x5_t): Ditto.
30139 (vuint16m1x5_t): Ditto.
30140 (vint16m1x6_t): Ditto.
30141 (vuint16m1x6_t): Ditto.
30142 (vint16m1x7_t): Ditto.
30143 (vuint16m1x7_t): Ditto.
30144 (vint16m1x8_t): Ditto.
30145 (vuint16m1x8_t): Ditto.
30146 (vint16m2x2_t): Ditto.
30147 (vuint16m2x2_t): Ditto.
30148 (vint16m2x3_t): Ditto.
30149 (vuint16m2x3_t): Ditto.
30150 (vint16m2x4_t): Ditto.
30151 (vuint16m2x4_t): Ditto.
30152 (vint16m4x2_t): Ditto.
30153 (vuint16m4x2_t): Ditto.
30154 (vint32mf2x2_t): Ditto.
30155 (vuint32mf2x2_t): Ditto.
30156 (vint32mf2x3_t): Ditto.
30157 (vuint32mf2x3_t): Ditto.
30158 (vint32mf2x4_t): Ditto.
30159 (vuint32mf2x4_t): Ditto.
30160 (vint32mf2x5_t): Ditto.
30161 (vuint32mf2x5_t): Ditto.
30162 (vint32mf2x6_t): Ditto.
30163 (vuint32mf2x6_t): Ditto.
30164 (vint32mf2x7_t): Ditto.
30165 (vuint32mf2x7_t): Ditto.
30166 (vint32mf2x8_t): Ditto.
30167 (vuint32mf2x8_t): Ditto.
30168 (vint32m1x2_t): Ditto.
30169 (vuint32m1x2_t): Ditto.
30170 (vint32m1x3_t): Ditto.
30171 (vuint32m1x3_t): Ditto.
30172 (vint32m1x4_t): Ditto.
30173 (vuint32m1x4_t): Ditto.
30174 (vint32m1x5_t): Ditto.
30175 (vuint32m1x5_t): Ditto.
30176 (vint32m1x6_t): Ditto.
30177 (vuint32m1x6_t): Ditto.
30178 (vint32m1x7_t): Ditto.
30179 (vuint32m1x7_t): Ditto.
30180 (vint32m1x8_t): Ditto.
30181 (vuint32m1x8_t): Ditto.
30182 (vint32m2x2_t): Ditto.
30183 (vuint32m2x2_t): Ditto.
30184 (vint32m2x3_t): Ditto.
30185 (vuint32m2x3_t): Ditto.
30186 (vint32m2x4_t): Ditto.
30187 (vuint32m2x4_t): Ditto.
30188 (vint32m4x2_t): Ditto.
30189 (vuint32m4x2_t): Ditto.
30190 (vint64m1x2_t): Ditto.
30191 (vuint64m1x2_t): Ditto.
30192 (vint64m1x3_t): Ditto.
30193 (vuint64m1x3_t): Ditto.
30194 (vint64m1x4_t): Ditto.
30195 (vuint64m1x4_t): Ditto.
30196 (vint64m1x5_t): Ditto.
30197 (vuint64m1x5_t): Ditto.
30198 (vint64m1x6_t): Ditto.
30199 (vuint64m1x6_t): Ditto.
30200 (vint64m1x7_t): Ditto.
30201 (vuint64m1x7_t): Ditto.
30202 (vint64m1x8_t): Ditto.
30203 (vuint64m1x8_t): Ditto.
30204 (vint64m2x2_t): Ditto.
30205 (vuint64m2x2_t): Ditto.
30206 (vint64m2x3_t): Ditto.
30207 (vuint64m2x3_t): Ditto.
30208 (vint64m2x4_t): Ditto.
30209 (vuint64m2x4_t): Ditto.
30210 (vint64m4x2_t): Ditto.
30211 (vuint64m4x2_t): Ditto.
30212 (vfloat32mf2x2_t): Ditto.
30213 (vfloat32mf2x3_t): Ditto.
30214 (vfloat32mf2x4_t): Ditto.
30215 (vfloat32mf2x5_t): Ditto.
30216 (vfloat32mf2x6_t): Ditto.
30217 (vfloat32mf2x7_t): Ditto.
30218 (vfloat32mf2x8_t): Ditto.
30219 (vfloat32m1x2_t): Ditto.
30220 (vfloat32m1x3_t): Ditto.
30221 (vfloat32m1x4_t): Ditto.
30222 (vfloat32m1x5_t): Ditto.
30223 (vfloat32m1x6_t): Ditto.
30224 (vfloat32m1x7_t): Ditto.
30225 (vfloat32m1x8_t): Ditto.
30226 (vfloat32m2x2_t): Ditto.
30227 (vfloat32m2x3_t): Ditto.
30228 (vfloat32m2x4_t): Ditto.
30229 (vfloat32m4x2_t): Ditto.
30230 (vfloat64m1x2_t): Ditto.
30231 (vfloat64m1x3_t): Ditto.
30232 (vfloat64m1x4_t): Ditto.
30233 (vfloat64m1x5_t): Ditto.
30234 (vfloat64m1x6_t): Ditto.
30235 (vfloat64m1x7_t): Ditto.
30236 (vfloat64m1x8_t): Ditto.
30237 (vfloat64m2x2_t): Ditto.
30238 (vfloat64m2x3_t): Ditto.
30239 (vfloat64m2x4_t): Ditto.
30240 (vfloat64m4x2_t): Ditto.
30241 * config/riscv/riscv-vector-builtins.h (DEF_RVV_TUPLE_TYPE):
30243 * config/riscv/riscv-vector-switch.def (TUPLE_ENTRY): Ditto.
30244 * config/riscv/riscv.cc (riscv_v_ext_tuple_mode_p): New
30246 (TUPLE_ENTRY): Ditto.
30247 (riscv_v_ext_mode_p): New function.
30248 (riscv_v_adjust_nunits): Add tuple mode adjustment.
30249 (riscv_classify_address): Ditto.
30250 (riscv_binary_cost): Ditto.
30251 (riscv_rtx_costs): Ditto.
30252 (riscv_secondary_memory_needed): Ditto.
30253 (riscv_hard_regno_nregs): Ditto.
30254 (riscv_hard_regno_mode_ok): Ditto.
30255 (riscv_vector_mode_supported_p): Ditto.
30256 (riscv_regmode_natural_size): Ditto.
30257 (riscv_array_mode): New function.
30258 (TARGET_ARRAY_MODE): New target hook.
30259 * config/riscv/riscv.md: Add tuple modes.
30260 * config/riscv/vector-iterators.md: Ditto.
30261 * config/riscv/vector.md (mov<mode>): Add tuple modes data
30263 (*mov<VT:mode>_<P:mode>): Ditto.
30265 2023-05-03 Richard Biener <rguenther@suse.de>
30267 * cse.cc (cse_insn): Track an equivalence to the destination
30268 separately and delay using src_related for it.
30270 2023-05-03 Richard Biener <rguenther@suse.de>
30272 * cse.cc (HASH): Turn into inline function and mix
30273 in another HASH_SHIFT bits.
30274 (SAFE_HASH): Likewise.
30276 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30279 * config/aarch64/aarch64-simd.md (aarch64_<sur>h<addsub><mode>): Rename to...
30280 (aarch64_<sur>h<addsub><mode><vczle><vczbe>): ... This.
30282 2023-05-03 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
30285 * config/aarch64/aarch64-simd.md (add<mode>3): Rename to...
30286 (add<mode>3<vczle><vczbe>): ... This.
30287 (sub<mode>3): Rename to...
30288 (sub<mode>3<vczle><vczbe>): ... This.
30289 (mul<mode>3): Rename to...
30290 (mul<mode>3<vczle><vczbe>): ... This.
30291 (*div<mode>3): Rename to...
30292 (*div<mode>3<vczle><vczbe>): ... This.
30293 (neg<mode>2): Rename to...
30294 (neg<mode>2<vczle><vczbe>): ... This.
30295 (abs<mode>2): Rename to...
30296 (abs<mode>2<vczle><vczbe>): ... This.
30297 (<frint_pattern><mode>2): Rename to...
30298 (<frint_pattern><mode>2<vczle><vczbe>): ... This.
30299 (<fmaxmin><mode>3): Rename to...
30300 (<fmaxmin><mode>3<vczle><vczbe>): ... This.
30301 (*sqrt<mode>2): Rename to...
30302 (*sqrt<mode>2<vczle><vczbe>): ... This.
30304 2023-05-03 Kito Cheng <kito.cheng@sifive.com>
30306 * doc/md.texi (RISC-V): Add vr, vm, vd constarint.
30308 2023-05-03 Martin Liska <mliska@suse.cz>
30310 PR tree-optimization/109693
30311 * value-range-storage.cc (vrange_allocator::vrange_allocator):
30312 Remove unused field.
30313 * value-range-storage.h: Likewise.
30315 2023-05-02 Andrew Pinski <apinski@marvell.com>
30317 * tree-ssa-phiopt.cc (move_stmt): New function.
30318 (match_simplify_replacement): Use move_stmt instead
30319 of the inlined version.
30321 2023-05-02 Andrew Pinski <apinski@marvell.com>
30323 * match.pd (a != 0 ? CLRSB(a) : CST -> CLRSB(a)): New
30326 2023-05-02 Andrew Pinski <apinski@marvell.com>
30328 PR tree-optimization/109702
30329 * match.pd: Fix "a != 0 ? FUNC(a) : CST" patterns
30330 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
30332 2023-05-02 Andrew Pinski <apinski@marvell.com>
30335 * config/aarch64/aarch64.md (*cmov<mode>_insn_m1): New
30336 insn_and_split pattern.
30338 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30340 * config/riscv/sync.md (atomic_load<mode>): Implement atomic
30343 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30345 * config/riscv/sync.md (mem_thread_fence_1): Change fence
30346 depending on the given memory model.
30348 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30350 * config/riscv/riscv-protos.h (riscv_union_memmodels): Expose
30351 riscv_union_memmodels function to sync.md.
30352 * config/riscv/riscv.cc (riscv_union_memmodels): Add function to
30353 get the union of two memmodels in sync.md.
30354 (riscv_print_operand): Add %I and %J flags that output the
30355 optimal LR/SC flag bits for a given memory model.
30356 * config/riscv/sync.md: Remove static .aqrl bits on LR op/.rl
30357 bits on SC op and replace with optimized %I, %J flags.
30359 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30361 * config/riscv/riscv.cc
30362 (riscv_memmodel_needs_amo_release): Change function name.
30363 (riscv_print_operand): Remove unneeded %F case.
30364 * config/riscv/sync.md: Remove unneeded fences.
30366 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30369 * config/riscv/sync.md (atomic_store<mode>): Use simple store
30370 instruction in combination with fence(s).
30372 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30374 * config/riscv/riscv.cc (riscv_print_operand): Change behavior
30375 of %A to include release bits.
30377 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30379 * config/riscv/sync.md (atomic_cas_value_strong<mode>): Change
30380 FENCE/LR.aq/SC.aq into sequentially consistent LR.aqrl/SC.rl
30383 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30385 * config/riscv/sync.md: Change LR.aq/SC.rl pairs into
30386 sequentially consistent LR.aqrl/SC.rl pairs.
30388 2023-05-02 Patrick O'Neill <patrick@rivosinc.com>
30390 * config/riscv/riscv.cc: Remove MEMMODEL_SYNC_* cases and
30391 sanitize memmodel input with memmodel_base.
30393 2023-05-02 Yanzhang Wang <yanzhang.wang@intel.com>
30394 Pan Li <pan2.li@intel.com>
30397 * config/riscv/vector-iterators.md: Support VNx2HI and VNX4DI when MIN_VLEN >= 128.
30399 2023-05-02 Romain Naour <romain.naour@gmail.com>
30401 * config/riscv/genrvv-type-indexer.cc: Use log2 from the C header, without
30404 2023-05-02 Martin Liska <mliska@suse.cz>
30406 * doc/invoke.texi: Update documentation based on param.opt file.
30408 2023-05-02 Richard Biener <rguenther@suse.de>
30410 PR tree-optimization/109672
30411 * tree-vect-stmts.cc (vectorizable_operation): For plus,
30412 minus and negate always check the vector mode is word mode.
30414 2023-05-01 Andrew Pinski <apinski@marvell.com>
30416 * tree-ssa-phiopt.cc: Update comment about
30417 how the transformation are implemented.
30419 2023-05-01 Jeff Law <jlaw@ventanamicro>
30421 * config/stormy16/stormy16.cc (TARGET_LRA_P): Remove defintion.
30423 2023-05-01 Jeff Law <jlaw@ventanamicro>
30425 * config/cris/cris.cc (TARGET_LRA_P): Remove.
30426 * config/epiphany/epiphany.cc (TARGET_LRA_P): Remove.
30427 * config/iq2000/iq2000.cc (TARGET_LRA_P): Remove.
30428 * config/m32r/m32r.cc (TARGET_LRA_P): Remove.
30429 * config/microblaze/microblaze.cc (TARGET_LRA_P): Remove.
30430 * config/mmix/mmix.cc (TARGET_LRA_P): Remove.
30432 2023-05-01 Rasmus Villemoes <rasmus.villemoes@prevas.dk>
30434 * print-tree.h (PRINT_DECL_REMAP_DEBUG): New flag.
30435 * print-tree.cc (print_decl_identifier): Implement it.
30436 * toplev.cc (output_stack_usage_1): Use it.
30438 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30440 * value-range.h (class int_range): Remove gt_ggc_mx and gt_pch_nx
30443 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30445 * value-range.h (irange::set_nonzero): Inline.
30447 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30449 * gimple-range-op.cc (cfn_ffs::fold_range): Use the correct
30451 * gimple-ssa-warn-alloca.cc (alloca_call_type): Use <2> for
30452 invalid_range, as it is an inverse range.
30453 * tree-vrp.cc (find_case_label_range): Avoid trees.
30454 * value-range.cc (irange::irange_set): Delete.
30455 (irange::irange_set_1bit_anti_range): Delete.
30456 (irange::irange_set_anti_range): Delete.
30457 (irange::set): Cleanup.
30458 * value-range.h (class irange): Remove irange_set,
30459 irange_set_anti_range, irange_set_1bit_anti_range.
30460 (irange::set_undefined): Remove set to m_type.
30462 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30464 * range-op.cc (update_known_bitmask): Adjust for irange containing
30465 wide_ints internally.
30466 * tree-ssanames.cc (set_nonzero_bits): Same.
30467 * tree-ssanames.h (set_nonzero_bits): Same.
30468 * value-range-storage.cc (irange_storage::set_irange): Same.
30469 (irange_storage::get_irange): Same.
30470 * value-range.cc (irange::operator=): Same.
30471 (irange::irange_set): Same.
30472 (irange::irange_set_1bit_anti_range): Same.
30473 (irange::irange_set_anti_range): Same.
30474 (irange::set): Same.
30475 (irange::verify_range): Same.
30476 (irange::contains_p): Same.
30477 (irange::irange_single_pair_union): Same.
30478 (irange::union_): Same.
30479 (irange::irange_contains_p): Same.
30480 (irange::intersect): Same.
30481 (irange::invert): Same.
30482 (irange::set_range_from_nonzero_bits): Same.
30483 (irange::set_nonzero_bits): Same.
30484 (mask_to_wi): Same.
30485 (irange::intersect_nonzero_bits): Same.
30486 (irange::union_nonzero_bits): Same.
30489 (tree_range): Same.
30490 (range_tests_strict_enum): Same.
30491 (range_tests_misc): Same.
30492 (range_tests_nonzero_bits): Same.
30493 * value-range.h (irange::type): Same.
30494 (irange::varying_compatible_p): Same.
30495 (irange::irange): Same.
30496 (int_range::int_range): Same.
30497 (irange::set_undefined): Same.
30498 (irange::set_varying): Same.
30499 (irange::lower_bound): Same.
30500 (irange::upper_bound): Same.
30502 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30504 * gimple-range-fold.cc (tree_lower_bound): Delete.
30505 (tree_upper_bound): Delete.
30506 (vrp_val_max): Delete.
30507 (vrp_val_min): Delete.
30508 (fold_using_range::range_of_ssa_name_with_loop_info): Call
30509 range_of_var_in_loop.
30510 * vr-values.cc (valid_value_p): Delete.
30511 (fix_overflow): Delete.
30512 (get_scev_info): New.
30513 (bounds_of_var_in_loop): Refactor into...
30514 (induction_variable_may_overflow_p): ...this,
30515 (range_from_loop_direction): ...and this,
30516 (range_of_var_in_loop): ...and this.
30517 * vr-values.h (bounds_of_var_in_loop): Delete.
30518 (range_of_var_in_loop): New.
30520 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30522 * gimple-range-fold.cc (adjust_pointer_diff_expr): Rewrite with
30524 (vrp_val_max): New.
30525 (vrp_val_min): New.
30526 * gimple-range-op.cc (cfn_strlen::fold_range): Use irange_val_*.
30527 * range-op.cc (max_limit): Same.
30529 (plus_minus_ranges): Same.
30530 (operator_rshift::op1_range): Same.
30531 (operator_cast::inside_domain_p): Same.
30532 * value-range.cc (vrp_val_is_max): Delete.
30533 (vrp_val_is_min): Delete.
30534 (range_tests_misc): Use irange_val_*.
30535 * value-range.h (vrp_val_is_min): Delete.
30536 (vrp_val_is_max): Delete.
30537 (vrp_val_max): Delete.
30538 (irange_val_min): New.
30539 (vrp_val_min): Delete.
30540 (irange_val_max): New.
30541 * vr-values.cc (check_for_binary_op_overflow): Use irange_val_*.
30543 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30545 * fold-const.cc (expr_not_equal_to): Convert to irange wide_int API.
30546 * gimple-fold.cc (size_must_be_zero_p): Same.
30547 * gimple-loop-versioning.cc
30548 (loop_versioning::prune_loop_conditions): Same.
30549 * gimple-range-edge.cc (gcond_edge_range): Same.
30550 (gimple_outgoing_range::calc_switch_ranges): Same.
30551 * gimple-range-fold.cc (adjust_imagpart_expr): Same.
30552 (adjust_realpart_expr): Same.
30553 (fold_using_range::range_of_address): Same.
30554 (fold_using_range::relation_fold_and_or): Same.
30555 * gimple-range-gori.cc (gori_compute::gori_compute): Same.
30556 (range_is_either_true_or_false): Same.
30557 * gimple-range-op.cc (cfn_toupper_tolower::get_letter_range): Same.
30558 (cfn_clz::fold_range): Same.
30559 (cfn_ctz::fold_range): Same.
30560 * gimple-range-tests.cc (class test_expr_eval): Same.
30561 * gimple-ssa-warn-alloca.cc (alloca_call_type): Same.
30562 * ipa-cp.cc (ipa_value_range_from_jfunc): Same.
30563 (propagate_vr_across_jump_function): Same.
30564 (decide_whether_version_node): Same.
30565 * ipa-prop.cc (ipa_get_value_range): Same.
30566 * ipa-prop.h (ipa_range_set_and_normalize): Same.
30567 * range-op.cc (get_shift_range): Same.
30568 (value_range_from_overflowed_bounds): Same.
30569 (value_range_with_overflow): Same.
30570 (create_possibly_reversed_range): Same.
30571 (equal_op1_op2_relation): Same.
30572 (not_equal_op1_op2_relation): Same.
30573 (lt_op1_op2_relation): Same.
30574 (le_op1_op2_relation): Same.
30575 (gt_op1_op2_relation): Same.
30576 (ge_op1_op2_relation): Same.
30577 (operator_mult::op1_range): Same.
30578 (operator_exact_divide::op1_range): Same.
30579 (operator_lshift::op1_range): Same.
30580 (operator_rshift::op1_range): Same.
30581 (operator_cast::op1_range): Same.
30582 (operator_logical_and::fold_range): Same.
30583 (set_nonzero_range_from_mask): Same.
30584 (operator_bitwise_or::op1_range): Same.
30585 (operator_bitwise_xor::op1_range): Same.
30586 (operator_addr_expr::fold_range): Same.
30587 (pointer_plus_operator::wi_fold): Same.
30588 (pointer_or_operator::op1_range): Same.
30595 (range_op_cast_tests): Same.
30596 (range_op_lshift_tests): Same.
30597 (range_op_rshift_tests): Same.
30598 (range_op_bitwise_and_tests): Same.
30599 (range_relational_tests): Same.
30600 * range.cc (range_zero): Same.
30601 (range_nonzero): Same.
30602 * range.h (range_true): Same.
30603 (range_false): Same.
30604 (range_true_and_false): Same.
30605 * tree-data-ref.cc (split_constant_offset_1): Same.
30606 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Same.
30607 * tree-ssa-loop-unswitch.cc (struct unswitch_predicate): Same.
30608 (find_unswitching_predicates_for_bb): Same.
30609 * tree-ssa-phiopt.cc (value_replacement): Same.
30610 * tree-ssa-threadbackward.cc
30611 (back_threader::find_taken_edge_cond): Same.
30612 * tree-ssanames.cc (ssa_name_has_boolean_range): Same.
30613 * tree-vrp.cc (find_case_label_range): Same.
30614 * value-query.cc (range_query::get_tree_range): Same.
30615 * value-range.cc (irange::set_nonnegative): Same.
30616 (frange::contains_p): Same.
30617 (frange::singleton_p): Same.
30618 (frange::internal_singleton_p): Same.
30619 (irange::irange_set): Same.
30620 (irange::irange_set_1bit_anti_range): Same.
30621 (irange::irange_set_anti_range): Same.
30622 (irange::set): Same.
30623 (irange::operator==): Same.
30624 (irange::singleton_p): Same.
30625 (irange::contains_p): Same.
30626 (irange::set_range_from_nonzero_bits): Same.
30627 (DEFINE_INT_RANGE_INSTANCE): Same.
30637 (range_uint128): New.
30638 (range_uchar): New.
30640 (build_range3): Convert to irange wide_int API.
30641 (range_tests_irange3): Same.
30642 (range_tests_int_range_max): Same.
30643 (range_tests_strict_enum): Same.
30644 (range_tests_misc): Same.
30645 (range_tests_nonzero_bits): Same.
30646 (range_tests_nan): Same.
30647 (range_tests_signed_zeros): Same.
30648 * value-range.h (Value_Range::Value_Range): Same.
30649 (irange::set): Same.
30650 (irange::nonzero_p): Same.
30651 (irange::contains_p): Same.
30652 (range_includes_zero_p): Same.
30653 (irange::set_nonzero): Same.
30654 (irange::set_zero): Same.
30655 (contains_zero_p): Same.
30656 (frange::contains_p): Same.
30658 (simplify_using_ranges::op_with_boolean_value_range_p): Same.
30659 (bounds_of_var_in_loop): Same.
30660 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
30662 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30664 * value-range.cc (irange::irange_union): Rename to...
30665 (irange::union_): ...this.
30666 (irange::irange_intersect): Rename to...
30667 (irange::intersect): ...this.
30668 * value-range.h (irange::union_): Delete.
30669 (irange::intersect): Delete.
30671 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30673 * vr-values.cc (bounds_of_var_in_loop): Convert to irange API.
30675 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30677 * vr-values.cc (check_for_binary_op_overflow): Tidy up by using
30679 (compare_ranges): Delete.
30680 (compare_range_with_value): Delete.
30681 (bounds_of_var_in_loop): Tidy up by using ranger API.
30682 (simplify_using_ranges::fold_cond_with_ops): Cleanup and rename
30683 from vrp_evaluate_conditional_warnv_with_ops_using_ranges.
30684 (simplify_using_ranges::legacy_fold_cond_overflow): Remove
30685 strict_overflow_p and only_ranges.
30686 (simplify_using_ranges::legacy_fold_cond): Adjust call to
30687 legacy_fold_cond_overflow.
30688 (simplify_using_ranges::simplify_abs_using_ranges): Adjust for
30690 (range_fits_type_p): Rename value_range to irange.
30691 * vr-values.h (range_fits_type_p): Adjust prototype.
30693 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30695 * value-range.cc (irange::irange_set_anti_range): Remove uses of
30696 tree_lower_bound and tree_upper_bound.
30697 (irange::verify_range): Same.
30698 (irange::operator==): Same.
30699 (irange::singleton_p): Same.
30700 * value-range.h (irange::tree_lower_bound): Delete.
30701 (irange::tree_upper_bound): Delete.
30702 (irange::lower_bound): Delete.
30703 (irange::upper_bound): Delete.
30704 (irange::zero_p): Remove uses of tree_lower_bound and
30707 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30709 * tree-ssa-loop-niter.cc (refine_value_range_using_guard): Remove
30711 (determine_value_range): Same.
30712 (record_nonwrapping_iv): Same.
30713 (infer_loop_bounds_from_signedness): Same.
30714 (scev_var_range_cant_overflow): Same.
30715 * tree-vrp.cc (operand_less_p): Delete.
30716 * tree-vrp.h (operand_less_p): Delete.
30717 * value-range.cc (get_legacy_range): Remove uses of deprecated API.
30718 (irange::value_inside_range): Delete.
30719 * value-range.h (vrange::kind): Delete.
30720 (irange::num_pairs): Remove check of m_kind.
30721 (irange::min): Delete.
30722 (irange::max): Delete.
30724 2023-05-01 Aldy Hernandez <aldyh@redhat.com>
30726 * gimple-fold.cc (maybe_fold_comparisons_from_match_pd): Adjust
30727 for vrange_storage.
30728 * gimple-range-cache.cc (sbr_vector::sbr_vector): Same.
30729 (sbr_vector::grow): Same.
30730 (sbr_vector::set_bb_range): Same.
30731 (sbr_vector::get_bb_range): Same.
30732 (sbr_sparse_bitmap::sbr_sparse_bitmap): Same.
30733 (sbr_sparse_bitmap::set_bb_range): Same.
30734 (sbr_sparse_bitmap::get_bb_range): Same.
30735 (block_range_cache::block_range_cache): Same.
30736 (ssa_global_cache::ssa_global_cache): Same.
30737 (ssa_global_cache::get_global_range): Same.
30738 (ssa_global_cache::set_global_range): Same.
30739 * gimple-range-cache.h: Same.
30740 * gimple-range-edge.cc
30741 (gimple_outgoing_range::gimple_outgoing_range): Same.
30742 (gimple_outgoing_range::switch_edge_range): Same.
30743 (gimple_outgoing_range::calc_switch_ranges): Same.
30744 * gimple-range-edge.h: Same.
30745 * gimple-range-infer.cc
30746 (infer_range_manager::infer_range_manager): Same.
30747 (infer_range_manager::get_nonzero): Same.
30748 (infer_range_manager::maybe_adjust_range): Same.
30749 (infer_range_manager::add_range): Same.
30750 * gimple-range-infer.h: Rename obstack_vrange_allocator to
30752 * tree-core.h (struct irange_storage_slot): Remove.
30753 (struct tree_ssa_name): Remove irange_info and frange_info. Make
30754 range_info a pointer to vrange_storage.
30755 * tree-ssanames.cc (range_info_fits_p): Adjust for vrange_storage.
30756 (range_info_alloc): Same.
30757 (range_info_free): Same.
30758 (range_info_get_range): Same.
30759 (range_info_set_range): Same.
30760 (get_nonzero_bits): Same.
30761 * value-query.cc (get_ssa_name_range_info): Same.
30762 * value-range-storage.cc (class vrange_internal_alloc): New.
30763 (class vrange_obstack_alloc): New.
30764 (class vrange_ggc_alloc): New.
30765 (vrange_allocator::vrange_allocator): New.
30766 (vrange_allocator::~vrange_allocator): New.
30767 (vrange_storage::alloc_slot): New.
30768 (vrange_allocator::alloc): New.
30769 (vrange_allocator::free): New.
30770 (vrange_allocator::clone): New.
30771 (vrange_allocator::clone_varying): New.
30772 (vrange_allocator::clone_undefined): New.
30773 (vrange_storage::alloc): New.
30774 (vrange_storage::set_vrange): Remove slot argument.
30775 (vrange_storage::get_vrange): Same.
30776 (vrange_storage::fits_p): Same.
30777 (vrange_storage::equal_p): New.
30778 (irange_storage::write_lengths_address): New.
30779 (irange_storage::lengths_address): New.
30780 (irange_storage_slot::alloc_slot): Remove.
30781 (irange_storage::alloc): New.
30782 (irange_storage_slot::irange_storage_slot): Remove.
30783 (irange_storage::irange_storage): New.
30784 (write_wide_int): New.
30785 (irange_storage_slot::set_irange): Remove.
30786 (irange_storage::set_irange): New.
30787 (read_wide_int): New.
30788 (irange_storage_slot::get_irange): Remove.
30789 (irange_storage::get_irange): New.
30790 (irange_storage_slot::size): Remove.
30791 (irange_storage::equal_p): New.
30792 (irange_storage_slot::num_wide_ints_needed): Remove.
30793 (irange_storage::size): New.
30794 (irange_storage_slot::fits_p): Remove.
30795 (irange_storage::fits_p): New.
30796 (irange_storage_slot::dump): Remove.
30797 (irange_storage::dump): New.
30798 (frange_storage_slot::alloc_slot): Remove.
30799 (frange_storage::alloc): New.
30800 (frange_storage_slot::set_frange): Remove.
30801 (frange_storage::set_frange): New.
30802 (frange_storage_slot::get_frange): Remove.
30803 (frange_storage::get_frange): New.
30804 (frange_storage_slot::fits_p): Remove.
30805 (frange_storage::equal_p): New.
30806 (frange_storage::fits_p): New.
30807 (ggc_vrange_allocator): New.
30808 (ggc_alloc_vrange_storage): New.
30809 * value-range-storage.h (class vrange_storage): Rewrite.
30810 (class irange_storage): Rewrite.
30811 (class frange_storage): Rewrite.
30812 (class obstack_vrange_allocator): Remove.
30813 (class ggc_vrange_allocator): Remove.
30814 (vrange_allocator::alloc_vrange): Remove.
30815 (vrange_allocator::alloc_irange): Remove.
30816 (vrange_allocator::alloc_frange): Remove.
30817 (ggc_alloc_vrange_storage): New.
30818 * value-range.h (class irange): Rename vrange_allocator to
30820 (class frange): Same.
30822 2023-04-30 Roger Sayle <roger@nextmovesoftware.com>
30824 * config/stormy16/stormy16.md (neghi2): Rewrite pattern using
30825 inc to avoid clobbering the carry flag.
30827 2023-04-30 Andrew Pinski <apinski@marvell.com>
30829 * match.pd: Add patterns for "a != 0 ? FUNC(a) : CST"
30830 for FUNC of POPCOUNT BSWAP FFS PARITY CLZ and CTZ.
30832 2023-04-30 Andrew Pinski <apinski@marvell.com>
30834 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
30835 Allow some builtin/internal function calls which
30836 are known not to trap/throw.
30837 (phiopt_worker::match_simplify_replacement):
30838 Use name instead of getting the lhs again.
30840 2023-04-30 Joakim Nohlgård <joakim@nohlgard.se>
30842 * configure: Regenerate.
30843 * configure.ac: Use ld -r in the check for HAVE_LD_RO_RW_SECTION_MIXING
30845 2023-04-29 Hans-Peter Nilsson <hp@axis.com>
30847 * reload1.cc (emit_insn_if_valid_for_reload_1): Rename from
30848 emit_insn_if_valid_for_reload.
30849 (emit_insn_if_valid_for_reload): Call new helper, and if a SET fails
30850 to be recognized, also try emitting a parallel that clobbers
30851 TARGET_FLAGS_REGNUM, as applicable.
30853 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
30855 * config/stormy16/stormy16.md (neghi2): Convert from a define_expand
30857 (*rotatehi_1): New define_insn for efficient 2 insn sequence.
30858 (*rotatehi_8, *rotaterthi_8): New define_insn to emit a swpb.
30860 2023-04-29 Roger Sayle <roger@nextmovesoftware.com>
30862 * config/stormy16/stormy16.md (any_lshift): New code iterator.
30863 (any_or_plus): Likewise.
30864 (any_rotate): Likewise.
30865 (*<any_lshift>_and_internal): New define_insn_and_split to
30866 recognize a logical shift followed by an AND, and split it
30867 again after reload.
30868 (*swpn): New define_insn matching xstormy16's swpn.
30869 (*swpn_zext): New define_insn recognizing swpn followed by
30870 zero_extendqihi2, i.e. with the high byte set to zero.
30871 (*swpn_sext): Likewise, for swpn followed by cbw.
30872 (*swpn_sext_2): Likewise, for an alternate RTL form.
30873 (*swpn_zext_ior): A pre-reload splitter so that an swpn+zext+ior
30874 sequence is split in the correct place to recognize the *swpn_zext
30875 followed by any_or_plus (ior, xor or plus) instruction.
30877 2023-04-29 Mikael Pettersson <mikpelinux@gmail.com>
30880 * config.gcc (vax-*-linux*): Add glibc-stdint.h.
30881 (lm32-*-uclinux*): Likewise.
30883 2023-04-29 Fei Gao <gaofei@eswincomputing.com>
30885 * config/riscv/riscv.cc (riscv_avoid_save_libcall): helper function
30886 for riscv_use_save_libcall.
30887 (riscv_use_save_libcall): call riscv_avoid_save_libcall.
30888 (riscv_compute_frame_info): restructure to decouple stack allocation
30889 for rv32e w/o save-restore.
30891 2023-04-28 Eugene Rozenfeld <erozen@microsoft.com>
30893 * doc/install.texi: Fix documentation typo
30895 2023-04-28 Matevos Mehrabyan <matevosmehrabyan@gmail.com>
30897 * config/riscv/iterators.md (only_div, paired_mod): New iterators.
30898 (u): Add div/udiv cases.
30899 * config/riscv/riscv-protos.h (riscv_use_divmod_expander): Prototype.
30900 * config/riscv/riscv.cc (struct riscv_tune_param): Add field for
30902 (rocket_tune_info, sifive_7_tune_info): Initialize new field.
30903 (thead_c906_tune_info): Likewise.
30904 (optimize_size_tune_info): Likewise.
30905 (riscv_use_divmod_expander): New function.
30906 * config/riscv/riscv.md (<u>divmod<mode>4): New expander.
30908 2023-04-28 Karen Sargsyan <karen1999411@gmail.com>
30910 * config/riscv/bitmanip.md: Added clmulr instruction.
30911 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
30912 * config/riscv/riscv.md: (UNSPEC_CLMULR): Add new unspec type.
30914 * config/riscv/riscv-cmo.def: Added built-in function for clmulr.
30915 * config/riscv/crypto.md: Move clmul[h] instructions to bitmanip.md.
30916 * config/riscv/riscv-scalar-crypto.def: Move clmul[h] built-in
30917 functions to riscv-cmo.def.
30918 * config/riscv/generic.md: Add clmul to list of instructions
30919 using the generic_imul reservation.
30921 2023-04-28 Jivan Hakobyan <jivanhakobyan9@gmail.com>
30923 * config/riscv/bitmanip.md: Added expanders for minu/maxu instructions
30925 2023-04-28 Andrew Pinski <apinski@marvell.com>
30927 PR tree-optimization/100958
30928 * tree-ssa-phiopt.cc (two_value_replacement): Remove.
30929 (pass_phiopt::execute): Don't call two_value_replacement.
30930 * match.pd (a !=/== CST1 ? CST2 : CST3): Add pattern to
30931 handle what two_value_replacement did.
30933 2023-04-28 Andrew Pinski <apinski@marvell.com>
30935 * match.pd: Add patterns for
30936 "(A CMP B) ? MIN/MAX<A, C> : MIN/MAX <B, C>".
30938 2023-04-28 Andrew Pinski <apinski@marvell.com>
30940 * match.pd: Factor out the deciding the min/max from
30941 the "(cond (cmp (convert1? x) c1) (convert2? x) c2)"
30943 * fold-const.cc (minmax_from_comparison): this new function.
30944 * fold-const.h (minmax_from_comparison): New prototype.
30946 2023-04-28 Roger Sayle <roger@nextmovesoftware.com>
30948 PR rtl-optimization/109476
30949 * lower-subreg.cc: Include explow.h for force_reg.
30950 (find_decomposable_shift_zext): Pass an additional SPEED_P argument.
30951 If decomposing a suitable LSHIFTRT and we're not splitting
30952 ZERO_EXTEND (based on the current SPEED_P), then use a ZERO_EXTEND
30953 instead of setting a high part SUBREG to zero, which helps combine.
30954 (decompose_multiword_subregs): Update call to resolve_shift_zext.
30956 2023-04-28 Richard Biener <rguenther@suse.de>
30958 * tree-vect-data-refs.cc (vect_analyze_data_refs): Always
30960 * tree-vect-stmts.cc (vect_model_store_cost): Pass in the
30961 gather-scatter info and cost emulated scatters accordingly.
30962 (get_load_store_type): Support emulated scatters.
30963 (vectorizable_store): Likewise. Emulate them by extracting
30964 scalar offsets and data, doing scalar stores.
30966 2023-04-28 Richard Biener <rguenther@suse.de>
30968 * config/i386/i386.cc (ix86_vector_costs::add_stmt_cost):
30969 Tame down element extracts and scalar loads for gather/scatter
30970 similar to elementwise strided accesses.
30972 2023-04-28 Pan Li <pan2.li@intel.com>
30973 kito-cheng <kito.cheng@sifive.com>
30975 * config/riscv/vector.md: Add new define split to perform
30976 the simplification.
30978 2023-04-28 Richard Biener <rguenther@suse.de>
30981 * ipa-param-manipulation.cc
30982 (ipa_param_body_adjustments::modify_expression): Allow
30983 conversion of a register to a non-register type. Elide
30984 conversions inside BIT_FIELD_REFs.
30986 2023-04-28 Richard Biener <rguenther@suse.de>
30988 PR tree-optimization/109644
30989 * tree-cfg.cc (verify_types_in_gimple_reference): Check
30990 register constraints on the outermost VIEW_CONVERT_EXPR
30991 only. Do not allow register or invariant bases on
30992 multi-level or possibly variable index handled components.
30994 2023-04-28 Richard Biener <rguenther@suse.de>
30996 * gimplify.cc (gimplify_compound_lval): When there's a
30997 non-register type produced by one of the handled component
30998 operations make sure we get a non-register base.
31000 2023-04-28 Richard Biener <rguenther@suse.de>
31002 PR tree-optimization/108752
31003 * tree-vect-generic.cc (build_replicated_const): Rename
31004 to build_replicated_int_cst and move to tree.{h,cc}.
31005 (do_plus_minus): Adjust.
31006 (do_negate): Likewise.
31007 * tree-vect-stmts.cc (vectorizable_operation): Emit emulated
31008 arithmetic vector operations in lowered form.
31009 * tree.h (build_replicated_int_cst): Declare.
31010 * tree.cc (build_replicated_int_cst): Moved from
31011 tree-vect-generic.cc build_replicated_const.
31013 2023-04-28 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31016 * config/aarch64/aarch64-simd.md (aarch64_rbit<mode>): Rename to...
31017 (aarch64_rbit<mode><vczle><vczbe>): ... This.
31018 (neg<mode>2): Rename to...
31019 (neg<mode>2<vczle><vczbe>): ... This.
31020 (abs<mode>2): Rename to...
31021 (abs<mode>2<vczle><vczbe>): ... This.
31022 (aarch64_abs<mode>): Rename to...
31023 (aarch64_abs<mode><vczle><vczbe>): ... This.
31024 (one_cmpl<mode>2): Rename to...
31025 (one_cmpl<mode>2<vczle><vczbe>): ... This.
31026 (clrsb<mode>2): Rename to...
31027 (clrsb<mode>2<vczle><vczbe>): ... This.
31028 (clz<mode>2): Rename to...
31029 (clz<mode>2<vczle><vczbe>): ... This.
31030 (popcount<mode>2): Rename to...
31031 (popcount<mode>2<vczle><vczbe>): ... This.
31033 2023-04-28 Jakub Jelinek <jakub@redhat.com>
31035 * gimple-range-op.cc (class cfn_sqrt): New type.
31036 (op_cfn_sqrt): New variable.
31037 (gimple_range_op_handler::maybe_builtin_call): Handle
31038 CASE_CFN_SQRT{,_FN}.
31040 2023-04-28 Aldy Hernandez <aldyh@redhat.com>
31041 Jakub Jelinek <jakub@redhat.com>
31043 * value-range.h (frange_nextafter): Declare.
31044 * gimple-range-op.cc (class cfn_sincos): New.
31045 (op_cfn_sin, op_cfn_cos): New variables.
31046 (gimple_range_op_handler::maybe_builtin_call): Handle
31047 CASE_CFN_{SIN,COS}{,_FN}.
31049 2023-04-28 Jakub Jelinek <jakub@redhat.com>
31051 * target.def (libm_function_max_error): New target hook.
31052 * doc/tm.texi.in (TARGET_LIBM_FUNCTION_MAX_ERROR): Add.
31053 * doc/tm.texi: Regenerated.
31054 * targhooks.h (default_libm_function_max_error,
31055 glibc_linux_libm_function_max_error): Declare.
31056 * targhooks.cc: Include case-cfn-macros.h.
31057 (default_libm_function_max_error,
31058 glibc_linux_libm_function_max_error): New functions.
31059 * config/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31060 * config/linux-protos.h (linux_libm_function_max_error): Declare.
31061 * config/linux.cc: Include target.h and targhooks.h.
31062 (linux_libm_function_max_error): New function.
31063 * config/arc/arc.cc: Include targhooks.h and case-cfn-macros.h.
31064 (arc_libm_function_max_error): New function.
31065 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31066 * config/i386/i386.cc (ix86_libc_has_fast_function): Formatting fix.
31067 (ix86_libm_function_max_error): New function.
31068 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31069 * config/rs6000/rs6000-protos.h
31070 (rs6000_linux_libm_function_max_error): Declare.
31071 * config/rs6000/rs6000-linux.cc: Include target.h, targhooks.h, tree.h
31072 and case-cfn-macros.h.
31073 (rs6000_linux_libm_function_max_error): New function.
31074 * config/rs6000/linux.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31075 * config/rs6000/linux64.h (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31076 * config/or1k/or1k.cc: Include targhooks.h and case-cfn-macros.h.
31077 (or1k_libm_function_max_error): New function.
31078 (TARGET_LIBM_FUNCTION_MAX_ERROR): Redefine.
31080 2023-04-28 Alexandre Oliva <oliva@adacore.com>
31082 * gimple-harden-conditionals.cc (insert_edge_check_and_trap):
31083 Move detach value calls...
31084 (pass_harden_conditional_branches::execute): ... here.
31085 (pass_harden_compares::execute): Detach values before
31088 2023-04-27 Andrew Stubbs <ams@codesourcery.com>
31090 * config/gcn/gcn-valu.md (cmul<conj_op><mode>3): Use gcn_gen_undef.
31091 (cml<addsub_as><mode>4): Likewise.
31092 (vec_addsub<mode>3): Likewise.
31093 (cadd<rot><mode>3): Likewise.
31094 (vec_fmaddsub<mode>4): Likewise.
31095 (vec_fmsubadd<mode>4): Likewise, and use sub for the odd lanes.
31097 2023-04-27 Andrew Pinski <apinski@marvell.com>
31099 * tree-ssa-phiopt.cc (phiopt_early_allow): Allow for
31100 up to 2 min/max expressions in the sequence/match code.
31102 2023-04-27 Andrew Pinski <apinski@marvell.com>
31104 * rtlanal.cc (may_trap_p_1): Treat SMIN/SMAX similar as
31106 * tree-eh.cc (operation_could_trap_helper_p): Treate
31107 MIN_EXPR/MAX_EXPR similar as other comparisons.
31109 2023-04-27 Andrew Pinski <apinski@marvell.com>
31111 * tree-ssa-phiopt.cc (cond_store_replacement): Remove
31113 (cond_if_else_store_replacement): Likewise.
31114 (get_non_trapping): Likewise.
31115 (store_elim_worker): Move into ...
31116 (pass_cselim::execute): This.
31118 2023-04-27 Andrew Pinski <apinski@marvell.com>
31120 * tree-ssa-phiopt.cc (two_value_replacement): Remove
31122 (match_simplify_replacement): Likewise.
31123 (factor_out_conditional_conversion): Likewise.
31124 (value_replacement): Likewise.
31125 (minmax_replacement): Likewise.
31126 (spaceship_replacement): Likewise.
31127 (cond_removal_in_builtin_zero_pattern): Likewise.
31128 (hoist_adjacent_loads): Likewise.
31129 (tree_ssa_phiopt_worker): Move into ...
31130 (pass_phiopt::execute): this.
31132 2023-04-27 Andrew Pinski <apinski@marvell.com>
31134 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove
31135 do_store_elim argument and split that part out to ...
31136 (store_elim_worker): This new function.
31137 (pass_cselim::execute): Call store_elim_worker.
31138 (pass_phiopt::execute): Update call to tree_ssa_phiopt_worker.
31140 2023-04-27 Jan Hubicka <jh@suse.cz>
31142 * cfgloopmanip.h (unloop_loops): Export.
31143 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Unloop loops
31144 that no longer loop.
31145 * tree-ssa-loop-ivcanon.cc (unloop_loops): Export; do not free
31146 vectors of loops to unloop.
31147 (canonicalize_induction_variables): Free vectors here.
31148 (tree_unroll_loops_completely): Free vectors here.
31150 2023-04-27 Richard Biener <rguenther@suse.de>
31152 PR tree-optimization/109170
31153 * gimple-range-op.cc (gimple_range_op_handler::maybe_builtin_call):
31154 Handle __builtin_expect and similar via cfn_pass_through_arg1
31155 and inspecting the calls fnspec.
31156 * builtins.cc (builtin_fnspec): Handle BUILT_IN_EXPECT
31157 and BUILT_IN_EXPECT_WITH_PROBABILITY.
31159 2023-04-27 Alexandre Oliva <oliva@adacore.com>
31161 * genmultilib: Use CONFIG_SHELL to run sub-scripts.
31163 2023-04-27 Aldy Hernandez <aldyh@redhat.com>
31165 PR tree-optimization/109639
31166 * ipa-cp.cc (ipa_value_range_from_jfunc): Normalize range.
31167 (propagate_vr_across_jump_function): Same.
31168 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
31169 * ipa-prop.h (ipa_range_set_and_normalize): New.
31170 * value-range.cc (irange::set): Assert min and max are INTEGER_CST.
31172 2023-04-27 Richard Biener <rguenther@suse.de>
31174 * match.pd (BIT_FIELD_REF CONSTRUCTOR@0 @1 @2): Do not
31175 create a CTOR operand in the result when simplifying GIMPLE.
31177 2023-04-27 Richard Biener <rguenther@suse.de>
31179 * gimplify.cc (gimplify_compound_lval): When the base
31180 gimplified to a register make sure to split up chains
31183 2023-04-27 Richard Biener <rguenther@suse.de>
31186 * ipa-param-manipulation.h
31187 (ipa_param_body_adjustments::modify_expression): Add extra_stmts
31189 * ipa-param-manipulation.cc
31190 (ipa_param_body_adjustments::modify_expression): Likewise.
31191 When we need a conversion and the replacement is a register
31192 split the conversion out.
31193 (ipa_param_body_adjustments::modify_assignment): Pass
31194 extra_stmts to RHS modify_expression.
31196 2023-04-27 Jonathan Wakely <jwakely@redhat.com>
31198 * doc/extend.texi (Zero Length): Describe example.
31200 2023-04-27 Richard Biener <rguenther@suse.de>
31202 PR tree-optimization/109594
31203 * tree-ssa.cc (non_rewritable_mem_ref_base): Constrain
31204 what we rewrite to a register based on the above.
31206 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
31208 * config/riscv/riscv.cc: Fix whitespace.
31209 * config/riscv/sync.md: Fix whitespace.
31211 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31213 PR tree-optimization/108697
31214 * gimple-range-cache.cc (ssa_global_cache::clear_range): Do
31215 not clear the vector on an out of range query.
31216 (ssa_cache::dump): Use dump_range_query instead of get_range.
31217 (ssa_cache::dump_range_query): New.
31218 (ssa_lazy_cache::dump_range_query): New.
31219 (ssa_lazy_cache::set_range): New.
31220 * gimple-range-cache.h (ssa_cache::dump_range_query): New.
31221 (class ssa_lazy_cache): New.
31222 (ssa_lazy_cache::ssa_lazy_cache): New.
31223 (ssa_lazy_cache::~ssa_lazy_cache): New.
31224 (ssa_lazy_cache::get_range): New.
31225 (ssa_lazy_cache::clear_range): New.
31226 (ssa_lazy_cache::clear): New.
31227 (ssa_lazy_cache::dump): New.
31228 * gimple-range-path.cc (path_range_query::path_range_query): Do
31229 not allocate a ssa_cache object nor has_cache bitmap.
31230 (path_range_query::~path_range_query): Do not free objects.
31231 (path_range_query::clear_cache): Remove.
31232 (path_range_query::get_cache): Adjust.
31233 (path_range_query::set_cache): Remove.
31234 (path_range_query::dump): Don't call through a pointer.
31235 (path_range_query::internal_range_of_expr): Set cache directly.
31236 (path_range_query::reset_path): Clear cache directly.
31237 (path_range_query::ssa_range_in_phi): Fold with globals only.
31238 (path_range_query::compute_ranges_in_phis): Simply set range.
31239 (path_range_query::compute_ranges_in_block): Call cache directly.
31240 * gimple-range-path.h (class path_range_query): Replace bitmap
31241 and cache pointer with lazy cache object.
31242 * gimple-range.h (class assume_query): Use ssa_lazy_cache.
31244 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31246 * gimple-range-cache.cc (ssa_cache::ssa_cache): Rename.
31247 (ssa_cache::~ssa_cache): Rename.
31248 (ssa_cache::has_range): New.
31249 (ssa_cache::get_range): Rename.
31250 (ssa_cache::set_range): Rename.
31251 (ssa_cache::clear_range): Rename.
31252 (ssa_cache::clear): Rename.
31253 (ssa_cache::dump): Rename and use get_range.
31254 (ranger_cache::get_global_range): Use get_range and set_range.
31255 (ranger_cache::range_of_def): Use get_range.
31256 * gimple-range-cache.h (class ssa_cache): Rename class and methods.
31257 (class ranger_cache): Use ssa_cache.
31258 * gimple-range-path.cc (path_range_query::path_range_query): Use
31260 (path_range_query::get_cache): Use get_range.
31261 (path_range_query::set_cache): Use set_range.
31262 * gimple-range-path.h (class path_range_query): Use ssa_cache.
31263 * gimple-range.cc (assume_query::assume_range_p): Use get_range.
31264 (assume_query::range_of_expr): Use get_range.
31265 (assume_query::assume_query): Use set_range.
31266 (assume_query::calculate_op): Use get_range and set_range.
31267 * gimple-range.h (class assume_query): Use ssa_cache.
31269 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31271 * gimple-range-cache.cc (sbr_vector::sbr_vector): Add parameter
31272 and local to optionally zero memory.
31273 (br_vector::grow): Only zero memory if flag is set.
31274 (class sbr_lazy_vector): New.
31275 (sbr_lazy_vector::sbr_lazy_vector): New.
31276 (sbr_lazy_vector::set_bb_range): New.
31277 (sbr_lazy_vector::get_bb_range): New.
31278 (sbr_lazy_vector::bb_range_p): New.
31279 (block_range_cache::set_bb_range): Check flags and Use sbr_lazy_vector.
31280 * gimple-range-gori.cc (gori_map::calculate_gori): Use
31281 param_vrp_switch_limit.
31282 (gori_compute::gori_compute): Use param_vrp_switch_limit.
31283 * params.opt (vrp_sparse_threshold): Rename from evrp_sparse_threshold.
31284 (vrp_switch_limit): Rename from evrp_switch_limit.
31285 (vrp_vector_threshold): New.
31287 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31289 * value-relation.cc (dom_oracle::query_relation): Check early for lack
31291 * value-relation.h (equiv_oracle::has_equiv_p): New.
31293 2023-04-26 Andrew MacLeod <amacleod@redhat.com>
31295 PR tree-optimization/109417
31296 * gimple-range-gori.cc (range_def_chain::register_dependency):
31297 Save the ssa version number, not the pointer.
31298 (gori_compute::may_recompute_p): No need to check if a dependency
31299 is in the free list.
31300 * gimple-range-gori.h (class range_def_chain): Change ssa1 and ssa2
31301 fields to be unsigned int instead of trees.
31302 (ange_def_chain::depend1): Adjust.
31303 (ange_def_chain::depend2): Adjust.
31304 * gimple-range.h: Include "ssa.h" to inline ssa_name().
31306 2023-04-26 David Edelsohn <dje.gcc@gmail.com>
31308 * config/rs6000/aix72.h (TARGET_DEFAULT): Use ISA_2_6_MASKS_SERVER.
31309 * config/rs6000/aix73.h (TARGET_DEFAULT): Use ISA_2_7_MASKS_SERVER.
31310 (PROCESSOR_DEFAULT): Use PROCESSOR_POWER8.
31312 2023-04-26 Patrick O'Neill <patrick@rivosinc.com>
31315 * config/riscv/riscv-protos.h: Add helper function stubs.
31316 * config/riscv/riscv.cc: Add helper functions for subword masking.
31317 * config/riscv/riscv.opt: Add command-line flags -minline-atomics and
31318 -mno-inline-atomics.
31319 * config/riscv/sync.md: Add masking logic and inline asm for fetch_and_op,
31320 fetch_and_nand, CAS, and exchange ops.
31321 * doc/invoke.texi: Add blurb regarding new command-line flags
31322 -minline-atomics and -mno-inline-atomics.
31324 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31326 * config/aarch64/aarch64-simd.md (aarch64_rshrn2<mode>_insn_le):
31327 Reimplement using standard RTL codes instead of unspec.
31328 (aarch64_rshrn2<mode>_insn_be): Likewise.
31329 (aarch64_rshrn2<mode>): Adjust for the above.
31330 * config/aarch64/aarch64.md (UNSPEC_RSHRN): Delete.
31332 2023-04-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31334 * config/aarch64/aarch64-simd.md (aarch64_rshrn<mode>_insn_le): Reimplement
31335 with standard RTL codes instead of an UNSPEC.
31336 (aarch64_rshrn<mode>_insn_be): Likewise.
31337 (aarch64_rshrn<mode>): Adjust for the above.
31338 * config/aarch64/predicates.md (aarch64_simd_rshrn_imm_vec): Define.
31340 2023-04-26 Pan Li <pan2.li@intel.com>
31341 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31343 * config/riscv/riscv.cc (riscv_classify_address): Allow
31344 const0_rtx for the RVV load/store.
31346 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31348 * range-op.cc (range_op_cast_tests): Remove legacy support.
31349 * value-range-storage.h (vrange_allocator::alloc_irange): Same.
31350 * value-range.cc (irange::operator=): Same.
31351 (get_legacy_range): Same.
31352 (irange::copy_legacy_to_multi_range): Delete.
31353 (irange::copy_to_legacy): Delete.
31354 (irange::irange_set_anti_range): Delete.
31355 (irange::set): Remove legacy support.
31356 (irange::verify_range): Same.
31357 (irange::legacy_lower_bound): Delete.
31358 (irange::legacy_upper_bound): Delete.
31359 (irange::legacy_equal_p): Delete.
31360 (irange::operator==): Remove legacy support.
31361 (irange::singleton_p): Same.
31362 (irange::value_inside_range): Same.
31363 (irange::contains_p): Same.
31364 (intersect_ranges): Delete.
31365 (irange::legacy_intersect): Delete.
31366 (union_ranges): Delete.
31367 (irange::legacy_union): Delete.
31368 (irange::legacy_verbose_union_): Delete.
31369 (irange::legacy_verbose_intersect): Delete.
31370 (irange::irange_union): Remove legacy support.
31371 (irange::irange_intersect): Same.
31372 (irange::intersect): Same.
31373 (irange::invert): Same.
31374 (ranges_from_anti_range): Delete.
31375 (gt_pch_nx): Adjust for legacy removal.
31377 (range_tests_legacy): Delete.
31378 (range_tests_misc): Adjust for legacy removal.
31379 (range_tests): Same.
31380 * value-range.h (class irange): Same.
31381 (irange::legacy_mode_p): Delete.
31382 (ranges_from_anti_range): Delete.
31383 (irange::nonzero_p): Adjust for legacy removal.
31384 (irange::lower_bound): Same.
31385 (irange::upper_bound): Same.
31386 (irange::union_): Same.
31387 (irange::intersect): Same.
31388 (irange::set_nonzero): Same.
31389 (irange::set_zero): Same.
31390 * vr-values.cc (simplify_using_ranges::legacy_fold_cond_overflow): Same.
31392 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31394 * value-range.cc (irange::copy_legacy_to_multi_range): Rewrite use
31395 of range_has_numeric_bounds_p with irange API.
31396 (range_has_numeric_bounds_p): Delete.
31397 * value-range.h (range_has_numeric_bounds_p): Delete.
31399 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31401 * tree-data-ref.cc (compute_distributive_range): Replace uses of
31402 range_int_cst_p with irange API.
31403 * tree-ssa-strlen.cc (get_range_strlen_dynamic): Same.
31404 * tree-vrp.h (range_int_cst_p): Delete.
31405 * vr-values.cc (check_for_binary_op_overflow): Replace usees of
31406 range_int_cst_p with irange API.
31407 (vr_set_zero_nonzero_bits): Same.
31408 (range_fits_type_p): Same.
31409 (simplify_using_ranges::simplify_casted_cond): Same.
31410 * tree-vrp.cc (range_int_cst_p): Remove.
31412 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31414 * tree-ssa-strlen.cc (compare_nonzero_chars): Convert to wide_ints.
31416 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31418 * builtins.cc (expand_builtin_strnlen): Rewrite deprecated irange
31419 API uses to new API.
31420 * gimple-predicate-analysis.cc (find_var_cmp_const): Same.
31421 * internal-fn.cc (get_min_precision): Same.
31423 * tree-affine.cc (expr_to_aff_combination): Same.
31424 * tree-data-ref.cc (dr_step_indicator): Same.
31425 * tree-dfa.cc (get_ref_base_and_extent): Same.
31426 * tree-scalar-evolution.cc (iv_can_overflow_p): Same.
31427 * tree-ssa-phiopt.cc (two_value_replacement): Same.
31428 * tree-ssa-pre.cc (insert_into_preds_of_block): Same.
31429 * tree-ssa-reassoc.cc (optimize_range_tests_to_bit_test): Same.
31430 * tree-ssa-strlen.cc (compare_nonzero_chars): Same.
31431 * tree-switch-conversion.cc (bit_test_cluster::emit): Same.
31432 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Same.
31433 * tree.cc (get_range_pos_neg): Same.
31435 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31437 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Use
31438 vrange::dump instead of ad-hoc dumper.
31439 * tree-ssa-strlen.cc (dump_strlen_info): Same.
31440 * value-range-pretty-print.cc (visit): Pass TDF_NOUID to
31443 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31445 * range-op.cc (operator_cast::op1_range): Use
31446 create_possibly_reversed_range.
31447 (operator_bitwise_and::simple_op1_range_solver): Same.
31448 * value-range.cc (swap_out_of_order_endpoints): Delete.
31449 (irange::set): Remove call to swap_out_of_order_endpoints.
31451 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31453 * builtins.cc (determine_block_size): Convert use of legacy API to
31455 * gimple-array-bounds.cc (check_out_of_bounds_and_warn): Same.
31456 (array_bounds_checker::check_array_ref): Same.
31457 * gimple-ssa-warn-restrict.cc
31458 (builtin_memref::extend_offset_range): Same.
31459 * ipa-cp.cc (ipcp_store_vr_results): Same.
31460 * ipa-fnsummary.cc (set_switch_stmt_execution_predicate): Same.
31461 * ipa-prop.cc (struct ipa_vr_ggc_hash_traits): Same.
31462 (ipa_write_jump_function): Same.
31463 * pointer-query.cc (get_size_range): Same.
31464 * tree-data-ref.cc (split_constant_offset): Same.
31465 * tree-ssa-strlen.cc (get_range): Same.
31466 (maybe_diag_stxncpy_trunc): Same.
31467 (strlen_pass::get_len_or_size): Same.
31468 (strlen_pass::count_nonzero_bytes_addr): Same.
31469 * tree-vect-patterns.cc (vect_get_range_info): Same.
31470 * value-range.cc (irange::maybe_anti_range): Remove.
31471 (get_legacy_range): New.
31472 (irange::copy_to_legacy): Use get_legacy_range.
31473 (ranges_from_anti_range): Same.
31474 * value-range.h (class irange): Remove maybe_anti_range.
31475 (get_legacy_range): New.
31476 * vr-values.cc (check_for_binary_op_overflow): Convert use of
31477 legacy API to get_legacy_range.
31478 (compare_ranges): Same.
31479 (compare_range_with_value): Same.
31480 (bounds_of_var_in_loop): Same.
31481 (find_case_label_ranges): Same.
31482 (simplify_using_ranges::simplify_switch_using_ranges): Same.
31484 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31486 * value-range-pretty-print.cc (vrange_printer::visit): Remove
31488 * value-range.cc (irange::constant_p): Remove.
31489 (irange::get_nonzero_bits_from_range): Remove constant_p use.
31490 * value-range.h (class irange): Remove constant_p.
31491 (irange::num_pairs): Remove constant_p use.
31493 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31495 * value-range.cc (irange::copy_legacy_to_multi_range): Remove
31497 (irange::set): Same.
31498 (irange::legacy_lower_bound): Same.
31499 (irange::legacy_upper_bound): Same.
31500 (irange::contains_p): Same.
31501 (range_tests_legacy): Same.
31502 (irange::normalize_addresses): Remove.
31503 (irange::normalize_symbolics): Remove.
31504 (irange::symbolic_p): Remove.
31505 * value-range.h (class irange): Remove symbolic_p,
31506 normalize_symbolics, and normalize_addresses.
31507 * vr-values.cc (simplify_using_ranges::two_valued_val_range_p):
31508 Remove symbolics support.
31510 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31512 * value-range.cc (irange::may_contain_p): Remove.
31513 * value-range.h (range_includes_zero_p): Rewrite may_contain_p
31514 usage with contains_p.
31515 * vr-values.cc (compare_range_with_value): Same.
31517 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31519 * tree-vrp.cc (supported_types_p): Remove.
31520 (defined_ranges_p): Remove.
31521 (range_fold_binary_expr): Remove.
31522 (range_fold_unary_expr): Remove.
31523 * tree-vrp.h (range_fold_unary_expr): Remove.
31524 (range_fold_binary_expr): Remove.
31526 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31528 * ipa-cp.cc (ipa_vr_operation_and_type_effects): Convert to ranger API.
31529 (ipa_value_range_from_jfunc): Same.
31530 (propagate_vr_across_jump_function): Same.
31531 * ipa-fnsummary.cc (evaluate_conditions_for_known_args): Same.
31532 * ipa-prop.cc (ipa_compute_jump_functions_for_edge): Same.
31533 * vr-values.cc (bounds_of_var_in_loop): Same.
31535 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31537 * gimple-array-bounds.cc (array_bounds_checker::get_value_range):
31538 Add irange argument.
31539 (check_out_of_bounds_and_warn): Remove check for vr.
31540 (array_bounds_checker::check_array_ref): Remove pointer qualifier
31541 for vr and adjust accordingly.
31542 * gimple-array-bounds.h (get_value_range): Add irange argument.
31543 * value-query.cc (class equiv_allocator): Delete.
31544 (range_query::get_value_range): Delete.
31545 (range_query::range_query): Remove allocator access.
31546 (range_query::~range_query): Same.
31547 * value-query.h (get_value_range): Delete.
31549 (simplify_using_ranges::op_with_boolean_value_range_p): Remove
31550 call to get_value_range.
31551 (check_for_binary_op_overflow): Same.
31552 (simplify_using_ranges::legacy_fold_cond_overflow): Same.
31553 (simplify_using_ranges::simplify_abs_using_ranges): Same.
31554 (simplify_using_ranges::simplify_cond_using_ranges_1): Same.
31555 (simplify_using_ranges::simplify_casted_cond): Same.
31556 (simplify_using_ranges::simplify_switch_using_ranges): Same.
31557 (simplify_using_ranges::two_valued_val_range_p): Same.
31559 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31562 (simplify_using_ranges::vrp_evaluate_conditional_warnv_with_ops):
31564 (simplify_using_ranges::legacy_fold_cond_overflow): ...this.
31565 (simplify_using_ranges::vrp_visit_cond_stmt): Rename to...
31566 (simplify_using_ranges::legacy_fold_cond): ...this.
31567 (simplify_using_ranges::fold_cond): Rename
31568 vrp_evaluate_conditional_warnv_with_ops to
31569 legacy_fold_cond_overflow.
31570 * vr-values.h (class vr_values): Replace vrp_visit_cond_stmt and
31571 vrp_evaluate_conditional_warnv_with_ops with legacy_fold_cond and
31572 legacy_fold_cond_overflow respectively.
31574 2023-04-26 Aldy Hernandez <aldyh@redhat.com>
31576 * vr-values.cc (get_vr_for_comparison): Remove.
31577 (compare_name_with_value): Same.
31578 (vrp_evaluate_conditional_warnv_with_ops): Remove calls to
31579 compare_name_with_value.
31580 * vr-values.h: Remove compare_name_with_value.
31581 Remove get_vr_for_comparison.
31583 2023-04-26 Roger Sayle <roger@nextmovesoftware.com>
31585 * config/stormy16/stormy16.md (bswaphi2): New define_insn.
31586 (bswapsi2): New define_insn.
31587 (swaphi): New define_insn to exchange two registers (swpw).
31588 (define_peephole2): Recognize exchange of registers as swaphi.
31590 2023-04-26 Richard Biener <rguenther@suse.de>
31592 * gimple-range-path.cc (path_range_query::compute_outgoing_relations):
31594 * ipa-pure-const.cc (pass_nothrow::execute): Likewise.
31595 * predict.cc (apply_return_prediction): Likewise.
31596 * sese.cc (set_ifsese_condition): Likewise. Simplify.
31597 * tree-cfg.cc (assert_unreachable_fallthru_edge_p): Avoid last_stmt.
31598 (make_edges_bb): Likewise.
31599 (make_cond_expr_edges): Likewise.
31600 (end_recording_case_labels): Likewise.
31601 (make_gimple_asm_edges): Likewise.
31602 (cleanup_dead_labels): Likewise.
31603 (group_case_labels): Likewise.
31604 (gimple_can_merge_blocks_p): Likewise.
31605 (gimple_merge_blocks): Likewise.
31606 (find_taken_edge): Likewise. Also handle empty fallthru blocks.
31607 (gimple_duplicate_sese_tail): Avoid last_stmt.
31608 (find_loop_dist_alias): Likewise.
31609 (gimple_block_ends_with_condjump_p): Likewise.
31610 (gimple_purge_dead_eh_edges): Likewise.
31611 (gimple_purge_dead_abnormal_call_edges): Likewise.
31612 (pass_warn_function_return::execute): Likewise.
31613 (execute_fixup_cfg): Likewise.
31614 * tree-eh.cc (redirect_eh_edge_1): Likewise.
31615 (pass_lower_resx::execute): Likewise.
31616 (pass_lower_eh_dispatch::execute): Likewise.
31617 (cleanup_empty_eh): Likewise.
31618 * tree-if-conv.cc (if_convertible_bb_p): Likewise.
31619 (predicate_bbs): Likewise.
31620 (ifcvt_split_critical_edges): Likewise.
31621 * tree-loop-distribution.cc (create_edge_for_control_dependence):
31623 (loop_distribution::transform_reduction_loop): Likewise.
31624 * tree-parloops.cc (transform_to_exit_first_loop_alt): Likewise.
31625 (try_transform_to_exit_first_loop_alt): Likewise.
31626 (transform_to_exit_first_loop): Likewise.
31627 (create_parallel_loop): Likewise.
31628 * tree-scalar-evolution.cc (get_loop_exit_condition): Likewise.
31629 * tree-ssa-dce.cc (mark_last_stmt_necessary): Likewise.
31630 (eliminate_unnecessary_stmts): Likewise.
31632 (dom_opt_dom_walker::set_global_ranges_from_unreachable_edges):
31634 * tree-ssa-ifcombine.cc (ifcombine_ifandif): Likewise.
31635 (pass_tree_ifcombine::execute): Likewise.
31636 * tree-ssa-loop-ch.cc (entry_loop_condition_is_static): Likewise.
31637 (should_duplicate_loop_header_p): Likewise.
31638 * tree-ssa-loop-ivcanon.cc (create_canonical_iv): Likewise.
31639 (tree_estimate_loop_size): Likewise.
31640 (try_unroll_loop_completely): Likewise.
31641 * tree-ssa-loop-ivopts.cc (tree_ssa_iv_optimize_loop): Likewise.
31642 * tree-ssa-loop-manip.cc (ip_normal_pos): Likewise.
31643 (canonicalize_loop_ivs): Likewise.
31644 * tree-ssa-loop-niter.cc (determine_value_range): Likewise.
31645 (bound_difference): Likewise.
31646 (number_of_iterations_popcount): Likewise.
31647 (number_of_iterations_cltz): Likewise.
31648 (number_of_iterations_cltz_complement): Likewise.
31649 (simplify_using_initial_conditions): Likewise.
31650 (number_of_iterations_exit_assumptions): Likewise.
31651 (loop_niter_by_eval): Likewise.
31652 (estimate_numbers_of_iterations): Likewise.
31654 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31656 * config/riscv/vector.md: Refine vmadc/vmsbc RA constraint.
31658 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
31661 * config/rs6000/rs6000-builtins.def
31662 (__builtin_vsx_scalar_cmp_exp_qp_eq, __builtin_vsx_scalar_cmp_exp_qp_gt
31663 __builtin_vsx_scalar_cmp_exp_qp_lt,
31664 __builtin_vsx_scalar_cmp_exp_qp_unordered): Move from stanza ieee128-hw
31667 2023-04-26 Kewen Lin <linkw@linux.ibm.com>
31670 * config/rs6000/altivec.md (sldoi_to_mov<mode>): Replace predicate
31671 easy_vector_constant with const_vector_each_byte_same, add
31672 handlings in preparation for !easy_vector_constant, and update
31673 VECTOR_UNIT_ALTIVEC_OR_VSX_P with VECTOR_MEM_ALTIVEC_OR_VSX_P.
31674 * config/rs6000/predicates.md (const_vector_each_byte_same): New
31677 2023-04-26 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31679 * config/riscv/vector.md (*pred_cmp<mode>_merge_tie_mask): New pattern.
31680 (*pred_ltge<mode>_merge_tie_mask): Ditto.
31681 (*pred_cmp<mode>_scalar_merge_tie_mask): Ditto.
31682 (*pred_eqne<mode>_scalar_merge_tie_mask): Ditto.
31683 (*pred_cmp<mode>_extended_scalar_merge_tie_mask): Ditto.
31684 (*pred_eqne<mode>_extended_scalar_merge_tie_mask): Ditto.
31685 (*pred_cmp<mode>_narrow_merge_tie_mask): Ditto.
31687 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31689 * config/riscv/vector.md: Fix redundant vmv1r.v.
31691 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31693 * config/riscv/vector.md: Fix RA constraint.
31695 2023-04-26 Pan Li <pan2.li@intel.com>
31698 * tree-ssa-sccvn.cc (vn_reference_eq): add type vector subparts
31699 check for vn_reference equal.
31701 2023-04-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
31703 * config/riscv/riscv-opts.h (enum riscv_autovec_preference_enum): Add enum for
31704 auto-vectorization preference.
31705 (enum riscv_autovec_lmul_enum): Add enum for choosing LMUL of RVV
31706 auto-vectorization.
31707 * config/riscv/riscv.opt: Add compile option for RVV auto-vectorization.
31709 2023-04-26 Jivan Hakobyan <jivanhakobyan9@gmail.com>
31711 * config/riscv/bitmanip.md: Updated predicates of bclri<mode>_nottwobits
31712 and bclridisi_nottwobits patterns.
31713 * config/riscv/predicates.md: (not_uimm_extra_bit_or_nottwobits): Adjust
31714 predicate to avoid splitting arith constants.
31715 (const_nottwobits_not_arith_operand): New predicate.
31717 2023-04-25 Hans-Peter Nilsson <hp@axis.com>
31719 * recog.cc (peep2_attempt, peep2_update_life): Correct
31720 head-comment description of parameter match_len.
31722 2023-04-25 Vineet Gupta <vineetg@rivosinc.com>
31724 * config/riscv/riscv.md: riscv_move_integer() drop in_splitter arg.
31725 riscv_split_symbol() drop in_splitter arg.
31726 * config/riscv/riscv.cc: riscv_move_integer() drop in_splitter arg.
31727 riscv_split_symbol() drop in_splitter arg.
31728 riscv_force_temporary() drop in_splitter arg.
31729 * config/riscv/riscv-protos.h: riscv_move_integer() drop in_splitter arg.
31730 riscv_split_symbol() drop in_splitter arg.
31732 2023-04-25 Eric Botcazou <ebotcazou@adacore.com>
31734 * tree-ssa.cc (insert_debug_temp_for_var_def): Do not create
31735 superfluous debug temporaries for single GIMPLE assignments.
31737 2023-04-25 Richard Biener <rguenther@suse.de>
31739 PR tree-optimization/109609
31740 * attr-fnspec.h (arg_max_access_size_given_by_arg_p):
31742 * tree-ssa-alias.cc (check_fnspec): Correctly interpret
31743 the size given by arg_max_access_size_given_by_arg_p as
31744 maximum, not exact, size.
31746 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31749 * config/aarch64/aarch64-simd.md (orn<mode>3): Rename to...
31750 (orn<mode>3<vczle><vczbe>): ... This.
31751 (bic<mode>3): Rename to...
31752 (bic<mode>3<vczle><vczbe>): ... This.
31753 (<su><maxmin><mode>3): Rename to...
31754 (<su><maxmin><mode>3<vczle><vczbe>): ... This.
31756 2023-04-25 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31758 * config/aarch64/aarch64-simd.md (<su_optab>div<mode>3): New define_expand.
31759 * config/aarch64/iterators.md (VQDIV): New mode iterator.
31760 (vnx2di): New mode attribute.
31762 2023-04-25 Richard Biener <rguenther@suse.de>
31764 PR rtl-optimization/109585
31765 * tree-ssa-alias.cc (aliasing_component_refs_p): Fix typo.
31767 2023-04-25 Jakub Jelinek <jakub@redhat.com>
31770 * config/rs6000/rs6000.cc (rs6000_is_valid_rotate_dot_mask): For
31771 !TARGET_64BIT, don't return true if UINTVAL (mask) << (63 - nb)
31772 is larger than signed int maximum.
31774 2023-04-25 Martin Liska <mliska@suse.cz>
31776 * doc/gcov.texi: Document the new "calls" field and document
31777 the API bump. Mention also "block_ids" for lines.
31778 * gcov.cc (output_intermediate_json_line): Output info about
31779 calls and extend branches as well.
31780 (generate_results): Bump version to 2.
31781 (output_line_details): Use block ID instead of a non-sensual
31784 2023-04-25 Roger Sayle <roger@nextmovesoftware.com>
31786 * config/stormy16/stormy16.md (zero_extendqihi2): Restore/fix
31787 length attribute for the first (memory operand) alternative.
31789 2023-04-25 Victor Do Nascimento <victor.donascimento@arm.com>
31791 * config/aarch64/aarch64-simd.md(aarch64_simd_stp<mode>): New.
31792 * config/aarch64/constraints.md: Make "Umn" relaxed memory
31794 * config/aarch64/iterators.md(ldpstp_vel_sz): New.
31796 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
31798 * value-range.cc (frange::set): Adjust constructor.
31799 * value-range.h (nan_state::nan_state): Replace default
31800 constructor with one taking an argument.
31802 2023-04-25 Aldy Hernandez <aldyh@redhat.com>
31804 * ipa-cp.cc (ipa_range_contains_p): New.
31805 (decide_whether_version_node): Use it.
31807 2023-04-24 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
31809 * tree-ssa-forwprop.cc (is_combined_permutation_identity): Try to
31810 simplify two successive VEC_PERM_EXPRs with same VLA mask,
31811 where mask chooses elements in reverse order.
31813 2023-04-24 Andrew Pinski <apinski@marvell.com>
31815 * tree-ssa-phiopt.cc (match_simplify_replacement): Add new arguments
31816 and support diamond shaped basic block form.
31817 (tree_ssa_phiopt_worker): Update call to match_simplify_replacement
31819 2023-04-24 Andrew Pinski <apinski@marvell.com>
31821 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31822 Instead of calling last_and_only_stmt, look for the last statement
31825 2023-04-24 Andrew Pinski <apinski@marvell.com>
31827 * tree-ssa-phiopt.cc (empty_bb_or_one_feeding_into_p):
31829 (match_simplify_replacement): Call
31830 empty_bb_or_one_feeding_into_p instead of doing it inline.
31832 2023-04-24 Andrew Pinski <apinski@marvell.com>
31834 PR tree-optimization/68894
31835 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove the
31836 continue for the do_hoist_loads diamond case.
31838 2023-04-24 Andrew Pinski <apinski@marvell.com>
31840 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Rearrange
31841 code for better code readability.
31843 2023-04-24 Andrew Pinski <apinski@marvell.com>
31845 PR tree-optimization/109604
31846 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Move the
31847 diamond form check from ...
31848 (minmax_replacement): Here.
31850 2023-04-24 Patrick Palka <ppalka@redhat.com>
31852 * tree.cc (strip_array_types): Don't define here.
31853 (is_typedef_decl): Don't define here.
31854 (typedef_variant_p): Don't define here.
31855 * tree.h (strip_array_types): Define here.
31856 (is_typedef_decl): Define here.
31857 (typedef_variant_p): Define here.
31859 2023-04-24 Frederik Harwath <frederik@codesourcery.com>
31861 * doc/generic.texi (OpenMP): Add != to allowed
31862 conditions and state that vars can be unsigned.
31863 * tree.def (OMP_FOR): Likewise.
31865 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31867 * config/aarch64/aarch64-simd.md (mulv2di3): New expander.
31869 2023-04-24 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
31871 * doc/install.texi: Consistently use Solaris rather than Solaris 2.
31872 Remove explicit Solaris 11 references.
31874 (Options specification, --with-gnu-as): as and gas always differ
31876 Remove /usr/ccs/bin reference.
31877 (Installing GCC: Binaries, Solaris (SPARC, Intel)): Remove.
31878 (i?86-*-solaris2*): Merge assembler, linker recommendations ...
31879 (*-*-solaris2*): ... here.
31880 Update bundled GCC versions.
31881 Don't refer to pre-built binaries.
31882 Remove /bin/sh warning.
31883 Update assembler, linker recommendations.
31884 Document GNAT bootstrap compiler.
31885 (sparc-sun-solaris2*): Remove non-UltraSPARC reference.
31886 (sparc64-*-solaris2*): Move content...
31887 (sparcv9-*-solaris2*): ...here.
31888 Add GDC for 64-bit bootstrap compilers.
31890 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31893 * config/aarch64/aarch64-sve.md (<optab><mode>3): Handle TARGET_SVE2 MUL
31895 * config/aarch64/aarch64-sve2.md (*aarch64_mul_unpredicated_<mode>): New
31898 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31900 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal2<mode>): Rename to...
31901 (aarch64_<su>abal2<mode>_insn): ... This. Use RTL codes instead of unspec.
31902 (aarch64_<su>abal2<mode>): New define_expand.
31903 * config/aarch64/aarch64.cc (aarch64_abd_rtx_p): New function.
31904 (aarch64_rtx_costs): Handle ABD rtxes.
31905 * config/aarch64/aarch64.md (UNSPEC_SABAL2, UNSPEC_UABAL2): Delete.
31906 * config/aarch64/iterators.md (ABAL2): Delete.
31907 (sur): Remove handling of UNSPEC_UABAL2 and UNSPEC_SABAL2.
31909 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31911 * config/aarch64/aarch64-simd.md (aarch64_<sur>abal<mode>): Rename to...
31912 (aarch64_<su>abal<mode>): ... This. Use RTL codes instead of unspec.
31913 (<sur>sadv16qi): Rename to...
31914 (<su>sadv16qi): ... This. Adjust for the above.
31915 * config/aarch64/aarch64-sve.md (<sur>sad<vsi2qi>): Rename to...
31916 (<su>sad<vsi2qi>): ... This. Adjust for the above.
31917 * config/aarch64/aarch64.md (UNSPEC_SABAL, UNSPEC_UABAL): Delete.
31918 * config/aarch64/iterators.md (ABAL): Delete.
31919 (sur): Remove handling of UNSPEC_SABAL and UNSPEC_UABAL.
31921 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31923 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl2<mode>): Rename to...
31924 (aarch64_<su>abdl2<mode>_insn): ... This. Use RTL codes instead of unspec.
31925 (aarch64_<su>abdl2<mode>): New define_expand.
31926 * config/aarch64/aarch64.md (UNSPEC_SABDL2, UNSPEC_UABDL2): Delete.
31927 * config/aarch64/iterators.md (ABDL2): Delete.
31928 (sur): Remove handling of UNSPEC_SABDL2 and UNSPEC_UABDL2.
31930 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31932 * config/aarch64/aarch64-simd.md (aarch64_<sur>abdl<mode>): Rename to...
31933 (aarch64_<su>abdl<mode>): ... This. Use standard RTL ops instead of
31935 * config/aarch64/aarch64.md (UNSPEC_SABDL, UNSPEC_UABDL): Delete.
31936 * config/aarch64/iterators.md (ABDL): Delete.
31937 (sur): Remove handling of UNSPEC_SABDL and UNSPEC_UABDL.
31939 2023-04-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
31941 * config/aarch64/aarch64-simd.md
31942 (*aarch64_<su>addlv<VDQV_L:mode>_ze<GPI:mode>): New pattern.
31944 2023-04-24 Richard Biener <rguenther@suse.de>
31946 * gimple-ssa-split-paths.cc (is_feasible_trace): Avoid
31948 * graphite-scop-detection.cc (single_pred_cond_non_loop_exit):
31950 * ipa-fnsummary.cc (set_cond_stmt_execution_predicate): Likewise.
31951 (set_switch_stmt_execution_predicate): Likewise.
31952 (phi_result_unknown_predicate): Likewise.
31953 * ipa-prop.cc (compute_complex_ancestor_jump_func): Likewise.
31954 (ipa_analyze_indirect_call_uses): Likewise.
31955 * predict.cc (predict_iv_comparison): Likewise.
31956 (predict_extra_loop_exits): Likewise.
31957 (predict_loops): Likewise.
31958 (tree_predict_by_opcode): Likewise.
31959 * gimple-predicate-analysis.cc (predicate::init_from_control_deps):
31961 * gimple-pretty-print.cc (dump_implicit_edges): Likewise.
31962 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Likewise.
31963 (replace_phi_edge_with_variable): Likewise.
31964 (two_value_replacement): Likewise.
31965 (value_replacement): Likewise.
31966 (minmax_replacement): Likewise.
31967 (spaceship_replacement): Likewise.
31968 (cond_removal_in_builtin_zero_pattern): Likewise.
31969 * tree-ssa-reassoc.cc (maybe_optimize_range_tests): Likewise.
31970 * tree-ssa-sccvn.cc (vn_phi_eq): Likewise.
31971 (vn_phi_lookup): Likewise.
31972 (vn_phi_insert): Likewise.
31973 * tree-ssa-structalias.cc (compute_points_to_sets): Likewise.
31974 * tree-ssa-threadbackward.cc (back_threader::maybe_thread_block):
31976 (back_threader_profitability::possibly_profitable_path_p):
31978 * tree-ssa-threadedge.cc (jump_threader::thread_outgoing_edges):
31980 * tree-switch-conversion.cc (pass_convert_switch::execute):
31982 (pass_lower_switch<O0>::execute): Likewise.
31983 * tree-tailcall.cc (tree_optimize_tail_calls_1): Likewise.
31984 * tree-vect-loop-manip.cc (vect_loop_versioning): Likewise.
31985 * tree-vect-slp.cc (vect_slp_function): Likewise.
31986 * tree-vect-stmts.cc (cfun_returns): Likewise.
31987 * tree-vectorizer.cc (vect_loop_vectorized_call): Likewise.
31988 (vect_loop_dist_alias_call): Likewise.
31990 2023-04-24 Richard Biener <rguenther@suse.de>
31992 * cfgcleanup.cc (outgoing_edges_match): Use FORWARDER_BLOCK_P.
31994 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
31996 * config/riscv/riscv-vsetvl.cc
31997 (vector_infos_manager::all_avail_in_compatible_p): New function.
31998 (pass_vsetvl::refine_vsetvls): Optimize vsetvls.
31999 * config/riscv/riscv-vsetvl.h: New function.
32001 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32003 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::pre_vsetvl): Add function
32004 comment for cleanup_insns.
32006 2023-04-24 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32008 * config/riscv/vector-iterators.md: New unspec to refine fault first load pattern.
32009 * config/riscv/vector.md: Refine fault first load pattern to erase avl from instructions
32010 with the fault first load property.
32012 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32014 * config/aarch64/aarch64-simd.md (aarch64_float_truncate_lo_): Rename to...
32015 (aarch64_float_truncate_lo_<mode><vczle><vczbe>): ... This.
32017 2023-04-23 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32020 * config/aarch64/aarch64-simd.md (aarch64_addp<mode>): Rename to...
32021 (aarch64_addp<mode><vczle><vczbe>): ... This.
32023 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
32025 * config/stormy16/stormy16.cc (xstormy16_rtx_costs): Rewrite to
32026 provide reasonable values for common arithmetic operations and
32027 immediate operands (in several machine modes).
32029 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
32031 * config/stormy16/stormy16.cc (xstormy16_print_operand): Add %h
32032 format specifier to output high_part register name of SImode reg.
32033 * config/stormy16/stormy16.md (extendhisi2): New define_insn.
32034 (zero_extendqihi2): Fix lengths, consistent formatting and add
32035 "and Rx,#255" alternative, for documentation purposes.
32036 (zero_extendhisi2): New define_insn.
32038 2023-04-23 Roger Sayle <roger@nextmovesoftware.com>
32040 * config/stormy16/stormy16.cc (xstormy16_output_shift): Implement
32041 SImode shifts by two by performing a single bit SImode shift twice.
32043 2023-04-23 Aldy Hernandez <aldyh@redhat.com>
32045 PR tree-optimization/109593
32046 * value-range.cc (frange::operator==): Handle NANs.
32048 2023-04-23 liuhongt <hongtao.liu@intel.com>
32050 PR rtl-optimization/108707
32051 * ira-costs.cc (scan_one_insn): Use NO_REGS instead of
32052 GENERAL_REGS when preferred reg_class is not known.
32054 2023-04-22 Andrew Pinski <apinski@marvell.com>
32056 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
32057 Change the code around slightly to move diamond
32058 handling for do_store_elim/do_hoist_loads out of
32061 2023-04-22 Andrew Pinski <apinski@marvell.com>
32063 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker):
32064 Remove check on empty_block_p.
32066 2023-04-22 Jakub Jelinek <jakub@redhat.com>
32068 PR bootstrap/109589
32069 * system.h (class auto_mpz): Workaround PR62101 bug in GCC 4.8 and 4.9.
32070 * realmpfr.h (class auto_mpfr): Likewise.
32072 2023-04-22 Jakub Jelinek <jakub@redhat.com>
32074 PR tree-optimization/109583
32075 * match.pd (fneg/fadd simplify): Don't call related_vector_mode
32076 if vec_mode is not VECTOR_MODE_P.
32078 2023-04-22 Jan Hubicka <hubicka@ucw.cz>
32079 Ondrej Kubanek <kubanek0ondrej@gmail.com>
32081 * cfgloopmanip.h (adjust_loop_info_after_peeling): Declare.
32082 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix updating of
32083 loop profile and bounds after header duplication.
32084 * tree-ssa-loop-ivcanon.cc (adjust_loop_info_after_peeling):
32085 Break out from try_peel_loop; fix handling of 0 iterations.
32086 (try_peel_loop): Use adjust_loop_info_after_peeling.
32088 2023-04-21 Andrew MacLeod <amacleod@redhat.com>
32090 PR tree-optimization/109546
32091 * tree-vrp.cc (remove_unreachable::remove_and_update_globals): Do
32092 not fold conditions with ADDR_EXPR early.
32094 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32096 * config/aarch64/aarch64.md (aarch64_umax<mode>3_insn): Delete.
32097 (umax<mode>3): Emit raw UMAX RTL instead of going through gen_ function
32099 (<optab><mode>3): New define_expand for MAXMIN_NOUMAX codes.
32100 (*aarch64_<optab><mode>3_zero): Define.
32101 (*aarch64_<optab><mode>3_cssc): Likewise.
32102 * config/aarch64/iterators.md (maxminand): New code attribute.
32104 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32107 * config/aarch64/aarch64-opts.h (enum aarch64_tp_reg): Define.
32108 * config/aarch64/aarch64-protos.h (aarch64_output_load_tp):
32110 * config/aarch64/aarch64.cc (aarch64_tpidr_register): Declare.
32111 (aarch64_override_options_internal): Handle the above.
32112 (aarch64_output_load_tp): New function.
32113 * config/aarch64/aarch64.md (aarch64_load_tp_hard): Call
32114 aarch64_output_load_tp.
32115 * config/aarch64/aarch64.opt (aarch64_tp_reg): Define enum.
32116 (mtp=): New option.
32117 * doc/invoke.texi (AArch64 Options): Document -mtp=.
32119 2023-04-21 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32122 * config/aarch64/aarch64-simd.md (add_vec_concat_subst_le): Define.
32123 (add_vec_concat_subst_be): Likewise.
32126 (add<mode>3): Rename to...
32127 (add<mode>3<vczle><vczbe>): ... This.
32128 (sub<mode>3): Rename to...
32129 (sub<mode>3<vczle><vczbe>): ... This.
32130 (mul<mode>3): Rename to...
32131 (mul<mode>3<vczle><vczbe>): ... This.
32132 (and<mode>3): Rename to...
32133 (and<mode>3<vczle><vczbe>): ... This.
32134 (ior<mode>3): Rename to...
32135 (ior<mode>3<vczle><vczbe>): ... This.
32136 (xor<mode>3): Rename to...
32137 (xor<mode>3<vczle><vczbe>): ... This.
32138 * config/aarch64/iterators.md (VDZ): Define.
32140 2023-04-21 Patrick Palka <ppalka@redhat.com>
32142 * tree.cc (walk_tree_1): Avoid repeatedly dereferencing tp
32145 2023-04-21 Jan Hubicka <jh@suse.cz>
32147 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Fix previous
32150 2023-04-21 Vineet Gupta <vineetg@rivosinc.com>
32152 * expmed.h (x_shift*_cost): convert to int [speed][mode][shift].
32153 (shift*_cost_ptr ()): Access x_shift*_cost array directly.
32155 2023-04-21 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32157 * config/aarch64/aarch64.cc (aarch64_simd_dup_constant): Use
32158 force_reg instead of copy_to_mode_reg.
32159 (aarch64_expand_vector_init): Likewise.
32161 2023-04-21 Uroš Bizjak <ubizjak@gmail.com>
32163 * config/i386/i386.h (REG_OK_FOR_INDEX_P, REG_OK_FOR_BASE_P): Remove.
32164 (REG_OK_FOR_INDEX_NONSTRICT_P, REG_OK_FOR_BASE_NONSTRICT_P): Ditto.
32165 (REG_OK_FOR_INDEX_STRICT_P, REG_OK_FOR_BASE_STRICT_P): Ditto.
32166 (FIRST_INDEX_REG, LAST_INDEX_REG): New defines.
32167 (LEGACY_INDEX_REG_P, LEGACY_INDEX_REGNO_P): New macros.
32168 (INDEX_REG_P, INDEX_REGNO_P): Ditto.
32169 (REGNO_OK_FOR_INDEX_P): Use INDEX_REGNO_P predicates.
32170 (REGNO_OK_FOR_INDEX_NONSTRICT_P): New macro.
32171 (EG_OK_FOR_BASE_NONSTRICT_P): Ditto.
32172 * config/i386/predicates.md (index_register_operand):
32173 Use REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
32174 * config/i386/i386.cc (ix86_legitimate_address_p): Use
32175 REGNO_OK_FOR_BASE_P, REGNO_OK_FOR_BASE_NONSTRICT_P,
32176 REGNO_OK_FOR_INDEX_P and REGNO_OK_FOR_INDEX_NONSTRICT_P macros.
32178 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32179 Ondrej Kubanek <kubanek0ondrej@gmail.com>
32181 * tree-ssa-loop-ch.cc (ch_base::copy_headers): Update loop header and
32184 2023-04-21 Richard Biener <rguenther@suse.de>
32186 * is-a.h (safe_is_a): New.
32188 2023-04-21 Richard Biener <rguenther@suse.de>
32190 * gimple-iterator.h (gimple_stmt_iterator::operator*): Add.
32191 (gphi_iterator::operator*): Likewise.
32193 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32194 Michal Jires <michal@jires.eu>
32196 * ipa-inline.cc (class inline_badness): New class.
32197 (edge_heap_t, edge_heap_node_t): Use inline_badness for badness instead
32199 (update_edge_key): Update.
32200 (lookup_recursive_calls): Likewise.
32201 (recursive_inlining): Likewise.
32202 (add_new_edges_to_heap): Likewise.
32203 (inline_small_functions): Likewise.
32205 2023-04-21 Jan Hubicka <hubicka@ucw.cz>
32207 * ipa-devirt.cc (odr_types_equivalent_p): Cleanup warned checks.
32209 2023-04-21 Richard Biener <rguenther@suse.de>
32211 PR tree-optimization/109573
32212 * tree-vect-loop.cc (vectorizable_live_operation): Allow
32213 unhandled SSA copy as well. Demote assert to checking only.
32215 2023-04-21 Richard Biener <rguenther@suse.de>
32217 * df-core.cc (df_analyze): Compute RPO on the reverse graph
32218 for DF_BACKWARD problems.
32219 (loop_post_order_compute): Rename to ...
32220 (loop_rev_post_order_compute): ... this, compute a RPO.
32221 (loop_inverted_post_order_compute): Rename to ...
32222 (loop_inverted_rev_post_order_compute): ... this, compute a RPO.
32223 (df_analyze_loop): Use RPO on the forward graph for DF_FORWARD
32224 problems, RPO on the inverted graph for DF_BACKWARD.
32226 2023-04-21 Richard Biener <rguenther@suse.de>
32228 * cfganal.h (inverted_rev_post_order_compute): Rename
32230 (inverted_post_order_compute): ... this. Add struct function
32231 argument, change allocation to a C array.
32232 * cfganal.cc (inverted_rev_post_order_compute): Likewise.
32233 * lcm.cc (compute_antinout_edge): Adjust.
32234 * lra-lives.cc (lra_create_live_ranges_1): Likewise.
32235 * tree-ssa-dce.cc (remove_dead_stmt): Likewise.
32236 * tree-ssa-pre.cc (compute_antic): Likewise.
32238 2023-04-21 Richard Biener <rguenther@suse.de>
32240 * df.h (df_d::postorder_inverted): Change back to int *,
32242 * df-core.cc (rest_of_handle_df_finish): Adjust.
32243 (df_analyze_1): Likewise.
32244 (df_analyze): For DF_FORWARD problems use RPO on the forward
32246 (loop_inverted_post_order_compute): Adjust API.
32247 (df_analyze_loop): Adjust.
32248 (df_get_n_blocks): Likewise.
32249 (df_get_postorder): Likewise.
32251 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32254 * config/riscv/riscv-vsetvl.cc
32255 (vector_infos_manager::all_empty_predecessor_p): New function.
32256 (pass_vsetvl::backward_demand_fusion): Ditto.
32257 * config/riscv/riscv-vsetvl.h: Ditto.
32259 2023-04-21 Robin Dapp <rdapp@ventanamicro.com>
32262 * config/riscv/generic.md: Change standard names to insn names.
32264 2023-04-21 Richard Biener <rguenther@suse.de>
32266 * lcm.cc (compute_antinout_edge): Use RPO on the inverted graph.
32267 (compute_laterin): Use RPO.
32268 (compute_available): Likewise.
32270 2023-04-21 Peng Fan <fanpeng@loongson.cn>
32272 * config/loongarch/gnu-user.h (MUSL_DYNAMIC_LINKER): Redefine.
32274 2023-04-21 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32277 * config/riscv/riscv-vsetvl.cc (local_eliminate_vsetvl_insn): New function.
32278 (vector_insn_info::skip_avl_compatible_p): Ditto.
32279 (vector_insn_info::merge): Remove default value.
32280 (pass_vsetvl::compute_local_backward_infos): Ditto.
32281 (pass_vsetvl::cleanup_insns): Add local vsetvl elimination.
32282 * config/riscv/riscv-vsetvl.h: Ditto.
32284 2023-04-20 Alejandro Colomar <alx.manpages@gmail.com>
32286 * doc/extend.texi (Common Function Attributes): Remove duplicate
32289 2023-04-20 Andrew MacLeod <amacleod@redhat.com>
32291 PR tree-optimization/109564
32292 * gimple-range-fold.cc (fold_using_range::range_of_phi): Do no ignore
32293 UNDEFINED range names when deciding if all PHI arguments are the same,
32295 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32297 PR tree-optimization/109011
32298 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): Use
32299 .CTZ (X) = .POPCOUNT ((X - 1) & ~X) in preference to
32300 .CTZ (X) = PREC - .POPCOUNT (X | -X).
32302 2023-04-20 Vladimir N. Makarov <vmakarov@redhat.com>
32304 * lra-constraints.cc (match_reload): Exclude some hard regs for
32305 multi-reg inout reload pseudos used in asm in different mode.
32307 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
32309 * config/arm/arm.cc (thumb1_legitimate_address_p):
32310 Use VIRTUAL_REGISTER_P predicate.
32311 (arm_eliminable_register): Ditto.
32312 * config/avr/avr.md (push<mode>_1): Ditto.
32313 * config/bfin/predicates.md (register_no_elim_operand): Ditto.
32314 * config/h8300/predicates.md (register_no_sp_elim_operand): Ditto.
32315 * config/i386/predicates.md (register_no_elim_operand): Ditto.
32316 * config/iq2000/predicates.md (call_insn_operand): Ditto.
32317 * config/microblaze/microblaze.h (CALL_INSN_OP): Ditto.
32319 2023-04-20 Uros Bizjak <ubizjak@gmail.com>
32322 * config/i386/predicates.md (extract_operator): New predicate.
32323 * config/i386/i386.md (any_extract): Remove code iterator.
32324 (*cmpqi_ext<mode>_1_mem_rex64): Use extract_operator predicate.
32325 (*cmpqi_ext<mode>_1): Ditto.
32326 (*cmpqi_ext<mode>_2): Ditto.
32327 (*cmpqi_ext<mode>_3_mem_rex64): Ditto.
32328 (*cmpqi_ext<mode>_3): Ditto.
32329 (*cmpqi_ext<mode>_4): Ditto.
32330 (*extzvqi_mem_rex64): Ditto.
32332 (*insvqi_2): Ditto.
32333 (*extendqi<SWI24:mode>_ext_1): Ditto.
32334 (*addqi_ext<mode>_0): Ditto.
32335 (*addqi_ext<mode>_1): Ditto.
32336 (*addqi_ext<mode>_2): Ditto.
32337 (*subqi_ext<mode>_0): Ditto.
32338 (*subqi_ext<mode>_2): Ditto.
32339 (*testqi_ext<mode>_1): Ditto.
32340 (*testqi_ext<mode>_2): Ditto.
32341 (*andqi_ext<mode>_0): Ditto.
32342 (*andqi_ext<mode>_1): Ditto.
32343 (*andqi_ext<mode>_1_cc): Ditto.
32344 (*andqi_ext<mode>_2): Ditto.
32345 (*<any_or:code>qi_ext<mode>_0): Ditto.
32346 (*<any_or:code>qi_ext<mode>_1): Ditto.
32347 (*<any_or:code>qi_ext<mode>_2): Ditto.
32348 (*xorqi_ext<mode>_1_cc): Ditto.
32349 (*negqi_ext<mode>_2): Ditto.
32350 (*ashlqi_ext<mode>_2): Ditto.
32351 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
32353 2023-04-20 Raphael Zinsly <rzinsly@ventanamicro.com>
32356 * config/riscv/bitmanip.md (clz, ctz, pcnt, min, max patterns): Use
32357 <bitmanip_insn> as the type to allow for fine grained control of
32358 scheduling these insns.
32359 * config/riscv/generic.md (generic_alu): Add bitmanip, clz, ctz, pcnt,
32361 * config/riscv/riscv.md (type attribute): Add types for clz, ctz,
32362 pcnt, signed and unsigned min/max.
32364 2023-04-20 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32365 kito-cheng <kito.cheng@sifive.com>
32367 * config/riscv/riscv.h (enum reg_class): Fix RVV register order.
32369 2023-04-20 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
32370 kito-cheng <kito.cheng@sifive.com>
32373 * config/riscv/riscv-vsetvl.cc (count_regno_occurrences): New function.
32374 (pass_vsetvl::cleanup_insns): Fix bug.
32376 2023-04-20 Andrew Stubbs <ams@codesourcery.com>
32378 * config/gcn/gcn-valu.md (vnsi, VnSI): Add scalar modes.
32379 (ldexp<mode>3): Delete.
32380 (ldexp<mode>3<exec>): Change "B" to "A".
32382 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32383 Jonathan Wakely <jwakely@redhat.com>
32385 * tree.h (built_in_function_equal_p): New helper function.
32386 (fndecl_built_in_p): Turn into variadic template to support
32387 1 or more built_in_function arguments.
32388 * builtins.cc (fold_builtin_expect): Use 3 argument fndecl_built_in_p.
32389 * gimplify.cc (goa_stabilize_expr): Likewise.
32390 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
32391 * ipa-fnsummary.cc (compute_fn_summary): Likewise.
32392 * omp-low.cc (setjmp_or_longjmp_p): Likewise.
32393 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
32394 cgraph_update_edges_for_call_stmt_node,
32395 cgraph_edge::verify_corresponds_to_fndecl,
32396 cgraph_node::verify_node): Likewise.
32397 * tree-stdarg.cc (optimize_va_list_gpr_fpr_size): Likewise.
32398 * gimple-ssa-warn-access.cc (matching_alloc_calls_p): Likewise.
32399 * ipa-prop.cc (try_make_edge_direct_virtual_call): Likewise.
32401 2023-04-20 Jakub Jelinek <jakub@redhat.com>
32403 PR tree-optimization/109011
32404 * tree-vect-patterns.cc (vect_recog_ctz_ffs_pattern): New function.
32405 (vect_recog_popcount_clz_ctz_ffs_pattern): Move vect_pattern_detected
32406 call later. Don't punt for IFN_CTZ or IFN_FFS if it doesn't have
32407 direct optab support, but has instead IFN_CLZ, IFN_POPCOUNT or
32408 for IFN_FFS IFN_CTZ support, use vect_recog_ctz_ffs_pattern for that
32410 (vect_vect_recog_func_ptrs): Add ctz_ffs entry.
32412 2023-04-20 Richard Biener <rguenther@suse.de>
32414 * df-core.cc (rest_of_handle_df_initialize): Remove
32415 computation of df->postorder, df->postorder_inverted and
32418 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32420 * common/config/i386/i386-common.cc
32421 (OPTION_MASK_ISA2_AVX_UNSET): Add OPTION_MASK_ISA2_VAES_UNSET.
32422 (ix86_handle_option): Set AVX flag for VAES.
32423 * config/i386/i386-builtins.cc (ix86_init_mmx_sse_builtins):
32424 Add OPTION_MASK_ISA2_VAES_UNSET.
32425 (def_builtin): Share builtin between AES and VAES.
32426 * config/i386/i386-expand.cc (ix86_check_builtin_isa_match):
32428 * config/i386/i386.md (aes): New isa attribute.
32429 * config/i386/sse.md (aesenc): Add pattern for VAES with xmm.
32430 (aesenclast): Ditto.
32432 (aesdeclast): Ditto.
32433 * config/i386/vaesintrin.h: Remove redundant avx target push.
32434 * config/i386/wmmintrin.h (_mm_aesdec_si128): Change to macro.
32435 (_mm_aesdeclast_si128): Ditto.
32436 (_mm_aesenc_si128): Ditto.
32437 (_mm_aesenclast_si128): Ditto.
32439 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
32441 * config/i386/avx2intrin.h
32442 (_MM_REDUCE_OPERATOR_BASIC_EPI16): New macro.
32443 (_MM_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
32444 (_MM256_REDUCE_OPERATOR_BASIC_EPI16): Ditto.
32445 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP16): Ditto.
32446 (_MM_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
32447 (_MM_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
32448 (_MM256_REDUCE_OPERATOR_BASIC_EPI8): Ditto.
32449 (_MM256_REDUCE_OPERATOR_MAX_MIN_EP8): Ditto.
32450 (_mm_reduce_add_epi16): New instrinsics.
32451 (_mm_reduce_mul_epi16): Ditto.
32452 (_mm_reduce_and_epi16): Ditto.
32453 (_mm_reduce_or_epi16): Ditto.
32454 (_mm_reduce_max_epi16): Ditto.
32455 (_mm_reduce_max_epu16): Ditto.
32456 (_mm_reduce_min_epi16): Ditto.
32457 (_mm_reduce_min_epu16): Ditto.
32458 (_mm256_reduce_add_epi16): Ditto.
32459 (_mm256_reduce_mul_epi16): Ditto.
32460 (_mm256_reduce_and_epi16): Ditto.
32461 (_mm256_reduce_or_epi16): Ditto.
32462 (_mm256_reduce_max_epi16): Ditto.
32463 (_mm256_reduce_max_epu16): Ditto.
32464 (_mm256_reduce_min_epi16): Ditto.
32465 (_mm256_reduce_min_epu16): Ditto.
32466 (_mm_reduce_add_epi8): Ditto.
32467 (_mm_reduce_mul_epi8): Ditto.
32468 (_mm_reduce_and_epi8): Ditto.
32469 (_mm_reduce_or_epi8): Ditto.
32470 (_mm_reduce_max_epi8): Ditto.
32471 (_mm_reduce_max_epu8): Ditto.
32472 (_mm_reduce_min_epi8): Ditto.
32473 (_mm_reduce_min_epu8): Ditto.
32474 (_mm256_reduce_add_epi8): Ditto.
32475 (_mm256_reduce_mul_epi8): Ditto.
32476 (_mm256_reduce_and_epi8): Ditto.
32477 (_mm256_reduce_or_epi8): Ditto.
32478 (_mm256_reduce_max_epi8): Ditto.
32479 (_mm256_reduce_max_epu8): Ditto.
32480 (_mm256_reduce_min_epi8): Ditto.
32481 (_mm256_reduce_min_epu8): Ditto.
32482 * config/i386/avx512vlbwintrin.h:
32483 (_mm_mask_reduce_add_epi16): Ditto.
32484 (_mm_mask_reduce_mul_epi16): Ditto.
32485 (_mm_mask_reduce_and_epi16): Ditto.
32486 (_mm_mask_reduce_or_epi16): Ditto.
32487 (_mm_mask_reduce_max_epi16): Ditto.
32488 (_mm_mask_reduce_max_epu16): Ditto.
32489 (_mm_mask_reduce_min_epi16): Ditto.
32490 (_mm_mask_reduce_min_epu16): Ditto.
32491 (_mm256_mask_reduce_add_epi16): Ditto.
32492 (_mm256_mask_reduce_mul_epi16): Ditto.
32493 (_mm256_mask_reduce_and_epi16): Ditto.
32494 (_mm256_mask_reduce_or_epi16): Ditto.
32495 (_mm256_mask_reduce_max_epi16): Ditto.
32496 (_mm256_mask_reduce_max_epu16): Ditto.
32497 (_mm256_mask_reduce_min_epi16): Ditto.
32498 (_mm256_mask_reduce_min_epu16): Ditto.
32499 (_mm_mask_reduce_add_epi8): Ditto.
32500 (_mm_mask_reduce_mul_epi8): Ditto.
32501 (_mm_mask_reduce_and_epi8): Ditto.
32502 (_mm_mask_reduce_or_epi8): Ditto.
32503 (_mm_mask_reduce_max_epi8): Ditto.
32504 (_mm_mask_reduce_max_epu8): Ditto.
32505 (_mm_mask_reduce_min_epi8): Ditto.
32506 (_mm_mask_reduce_min_epu8): Ditto.
32507 (_mm256_mask_reduce_add_epi8): Ditto.
32508 (_mm256_mask_reduce_mul_epi8): Ditto.
32509 (_mm256_mask_reduce_and_epi8): Ditto.
32510 (_mm256_mask_reduce_or_epi8): Ditto.
32511 (_mm256_mask_reduce_max_epi8): Ditto.
32512 (_mm256_mask_reduce_max_epu8): Ditto.
32513 (_mm256_mask_reduce_min_epi8): Ditto.
32514 (_mm256_mask_reduce_min_epu8): Ditto.
32516 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32518 * common/config/i386/i386-common.cc
32519 (OPTION_MASK_ISA_VPCLMULQDQ_SET):
32520 Add OPTION_MASK_ISA_PCLMUL_SET and OPTION_MASK_ISA_AVX_SET.
32521 (OPTION_MASK_ISA_AVX_UNSET):
32522 Add OPTION_MASK_ISA_VPCLMULQDQ_UNSET.
32523 (OPTION_MASK_ISA_PCLMUL_UNSET): Ditto.
32524 * config/i386/i386.md (vpclmulqdqvl): New.
32525 * config/i386/sse.md (pclmulqdq): Add evex encoding.
32526 * config/i386/vpclmulqdqintrin.h: Remove redudant avx target
32529 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32531 * config/i386/avx512vlbwintrin.h
32532 (_mm_mask_blend_epi16): Remove __OPTIMIZE__ wrapper.
32533 (_mm_mask_blend_epi8): Ditto.
32534 (_mm256_mask_blend_epi16): Ditto.
32535 (_mm256_mask_blend_epi8): Ditto.
32536 * config/i386/avx512vlintrin.h
32537 (_mm256_mask_blend_pd): Ditto.
32538 (_mm256_mask_blend_ps): Ditto.
32539 (_mm256_mask_blend_epi64): Ditto.
32540 (_mm256_mask_blend_epi32): Ditto.
32541 (_mm_mask_blend_pd): Ditto.
32542 (_mm_mask_blend_ps): Ditto.
32543 (_mm_mask_blend_epi64): Ditto.
32544 (_mm_mask_blend_epi32): Ditto.
32545 * config/i386/sse.md (VF_AVX512BWHFBF16): Removed.
32546 (VF_AVX512HFBFVL): Move it before the first usage.
32547 (<avx512>_blendm<mode>): Change iterator from VF_AVX512BWHFBF16
32548 to VF_AVX512HFBFVL.
32550 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32552 * common/config/i386/i386-common.cc
32553 (OPTION_MASK_ISA_AVX512VBMI2_SET): Change OPTION_MASK_ISA_AVX512F_SET
32554 to OPTION_MASK_ISA_AVX512BW_SET.
32555 (OPTION_MASK_ISA_AVX512F_UNSET):
32556 Remove OPTION_MASK_ISA_AVX512VBMI2_UNSET.
32557 (OPTION_MASK_ISA_AVX512BW_UNSET):
32558 Add OPTION_MASK_ISA_AVX512VBMI2_UNSET.
32559 * config/i386/avx512vbmi2intrin.h: Do not push avx512bw.
32560 * config/i386/avx512vbmi2vlintrin.h: Ditto.
32561 * config/i386/i386-builtin.def: Remove OPTION_MASK_ISA_AVX512BW.
32562 * config/i386/sse.md (VI12_AVX512VLBW): Removed.
32563 (VI12_VI48F_AVX512VLBW): Rename to VI12_VI48F_AVX512VL.
32564 (compress<mode>_mask): Change iterator from VI12_AVX512VLBW to
32566 (compressstore<mode>_mask): Ditto.
32567 (expand<mode>_mask): Ditto.
32568 (expand<mode>_maskz): Ditto.
32569 (*expand<mode>_mask): Change iterator from VI12_VI48F_AVX512VLBW to
32570 VI12_VI48F_AVX512VL.
32572 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32574 * common/config/i386/i386-common.cc
32575 (OPTION_MASK_ISA_AVX512BITALG_SET):
32576 Change OPTION_MASK_ISA_AVX512F_SET
32577 to OPTION_MASK_ISA_AVX512BW_SET.
32578 (OPTION_MASK_ISA_AVX512F_UNSET):
32579 Remove OPTION_MASK_ISA_AVX512BITALG_SET.
32580 (OPTION_MASK_ISA_AVX512BW_UNSET):
32581 Add OPTION_MASK_ISA_AVX512BITALG_SET.
32582 * config/i386/avx512bitalgintrin.h: Do not push avx512bw.
32583 * config/i386/i386-builtin.def:
32584 Remove redundant OPTION_MASK_ISA_AVX512BW.
32585 * config/i386/sse.md (VI1_AVX512VLBW): Removed.
32586 (avx512vl_vpshufbitqmb<mode><mask_scalar_merge_name>):
32587 Change the iterator from VI1_AVX512VLBW to VI1_AVX512VL.
32589 2023-04-20 Haochen Jiang <haochen.jiang@intel.com>
32591 * config/i386/i386-expand.cc
32592 (ix86_check_builtin_isa_match): Correct wrong comments.
32593 Add a new macro SHARE_BUILTIN and refactor the current if
32596 2023-04-20 Mo, Zewei <zewei.mo@intel.com>
32598 * config/i386/cpuid.h: Open a new section for Extended Features
32599 Leaf (%eax == 7, %ecx == 0) and Extended Features Sub-leaf (%eax == 7,
32602 2023-04-20 Hu, Lin1 <lin1.hu@intel.com>
32604 * config/i386/sse.md: Modify insn vperm{i,f}
32607 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
32609 * config/xtensa/xtensa-opts.h: New header.
32610 * config/xtensa/xtensa.h (STRICT_ALIGNMENT): Redefine as
32611 xtensa_strict_align.
32612 * config/xtensa/xtensa.cc (xtensa_option_override): When
32613 -m[no-]strict-align is not specified in the command line set
32614 xtensa_strict_align to 0 if the hardware supports both unaligned
32615 loads and stores or to 1 otherwise.
32616 * config/xtensa/xtensa.opt (mstrict-align): New option.
32617 * doc/invoke.texi (Xtensa Options): Document -m[no-]strict-align.
32619 2023-04-19 Max Filippov <jcmvbkbc@gmail.com>
32621 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v4): New
32624 2023-04-19 Andrew Pinski <apinski@marvell.com>
32626 * config/i386/i386.md (*movsicc_noc_zext_1): New pattern.
32628 2023-04-19 Juzhe-Zhong <juzhe.zhong@rivai.ai>
32630 * config/riscv/riscv-modes.def (FLOAT_MODE): Add chunk 128 support.
32631 (VECTOR_BOOL_MODE): Ditto.
32632 (ADJUST_NUNITS): Ditto.
32633 (ADJUST_ALIGNMENT): Ditto.
32634 (ADJUST_BYTESIZE): Ditto.
32635 (ADJUST_PRECISION): Ditto.
32636 (RVV_MODES): Ditto.
32637 (VECTOR_MODE_WITH_PREFIX): Ditto.
32638 * config/riscv/riscv-v.cc (ENTRY): Ditto.
32639 (get_vlmul): Ditto.
32640 (get_ratio): Ditto.
32641 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
32642 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): Ditto.
32643 (vbool64_t): Ditto.
32644 (vbool32_t): Ditto.
32645 (vbool16_t): Ditto.
32650 (vint8mf8_t): Ditto.
32651 (vuint8mf8_t): Ditto.
32652 (vint8mf4_t): Ditto.
32653 (vuint8mf4_t): Ditto.
32654 (vint8mf2_t): Ditto.
32655 (vuint8mf2_t): Ditto.
32656 (vint8m1_t): Ditto.
32657 (vuint8m1_t): Ditto.
32658 (vint8m2_t): Ditto.
32659 (vuint8m2_t): Ditto.
32660 (vint8m4_t): Ditto.
32661 (vuint8m4_t): Ditto.
32662 (vint8m8_t): Ditto.
32663 (vuint8m8_t): Ditto.
32664 (vint16mf4_t): Ditto.
32665 (vuint16mf4_t): Ditto.
32666 (vint16mf2_t): Ditto.
32667 (vuint16mf2_t): Ditto.
32668 (vint16m1_t): Ditto.
32669 (vuint16m1_t): Ditto.
32670 (vint16m2_t): Ditto.
32671 (vuint16m2_t): Ditto.
32672 (vint16m4_t): Ditto.
32673 (vuint16m4_t): Ditto.
32674 (vint16m8_t): Ditto.
32675 (vuint16m8_t): Ditto.
32676 (vint32mf2_t): Ditto.
32677 (vuint32mf2_t): Ditto.
32678 (vint32m1_t): Ditto.
32679 (vuint32m1_t): Ditto.
32680 (vint32m2_t): Ditto.
32681 (vuint32m2_t): Ditto.
32682 (vint32m4_t): Ditto.
32683 (vuint32m4_t): Ditto.
32684 (vint32m8_t): Ditto.
32685 (vuint32m8_t): Ditto.
32686 (vint64m1_t): Ditto.
32687 (vuint64m1_t): Ditto.
32688 (vint64m2_t): Ditto.
32689 (vuint64m2_t): Ditto.
32690 (vint64m4_t): Ditto.
32691 (vuint64m4_t): Ditto.
32692 (vint64m8_t): Ditto.
32693 (vuint64m8_t): Ditto.
32694 (vfloat32mf2_t): Ditto.
32695 (vfloat32m1_t): Ditto.
32696 (vfloat32m2_t): Ditto.
32697 (vfloat32m4_t): Ditto.
32698 (vfloat32m8_t): Ditto.
32699 (vfloat64m1_t): Ditto.
32700 (vfloat64m2_t): Ditto.
32701 (vfloat64m4_t): Ditto.
32702 (vfloat64m8_t): Ditto.
32703 * config/riscv/riscv-vector-switch.def (ENTRY): Ditto.
32704 * config/riscv/riscv.cc (riscv_legitimize_poly_move): Ditto.
32705 (riscv_convert_vector_bits): Ditto.
32706 * config/riscv/riscv.md:
32707 * config/riscv/vector-iterators.md:
32708 * config/riscv/vector.md
32709 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
32710 (@pred_indexed_<order>store<VNX32_QHS:mode><VNX32_QHSI:mode>): Ditto.
32711 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
32712 (@pred_indexed_<order>store<VNX64_QH:mode><VNX64_QHI:mode>): Ditto.
32713 (@pred_indexed_<order>store<VNX128_Q:mode><VNX128_Q:mode>): Ditto.
32714 (@pred_reduc_<reduc><mode><vlmul1_zve64>): Ditto.
32715 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve64>): Ditto.
32716 (@pred_reduc_plus<order><mode><vlmul1_zve64>): Ditto.
32717 (@pred_widen_reduc_plus<order><mode><vwlmul1_zve64>): Ditto.
32719 2023-04-19 Pan Li <pan2.li@intel.com>
32721 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1):
32722 Align IOR (A | (~A) -> -1) optimization MODE_CLASS condition to AND.
32724 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
32728 * config/i386/i386.md (*cmpqi_ext<mode>_1_mem_rex64): New insn pattern.
32729 (*cmpqi_ext<mode>_1): Use nonimmediate_operand predicate
32730 for operand 0. Use any_extract code iterator.
32731 (*cmpqi_ext<mode>_1 peephole2): New peephole2 pattern.
32732 (*cmpqi_ext<mode>_2): Use any_extract code iterator.
32733 (*cmpqi_ext<mode>_3_mem_rex64): New insn pattern.
32734 (*cmpqi_ext<mode>_1): Use general_operand predicate
32735 for operand 1. Use any_extract code iterator.
32736 (*cmpqi_ext<mode>_3 peephole2): New peephole2 pattern.
32737 (*cmpqi_ext<mode>_4): Use any_extract code iterator.
32739 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32741 * config/aarch64/aarch64-simd.md (aarch64_saddw2<mode>): Delete.
32742 (aarch64_uaddw2<mode>): Delete.
32743 (aarch64_ssubw2<mode>): Delete.
32744 (aarch64_usubw2<mode>): Delete.
32745 (aarch64_<ANY_EXTEND:su><ADDSUB:optab>w2<mode>): New define_expand.
32747 2023-04-19 Richard Biener <rguenther@suse.de>
32749 * tree-ssa-structalias.cc (do_ds_constraint): Use
32750 solve_add_graph_edge.
32752 2023-04-19 Richard Biener <rguenther@suse.de>
32754 * tree-ssa-structalias.cc (solve_add_graph_edge): New function,
32756 (do_sd_constraint): ... here.
32758 2023-04-19 Richard Biener <rguenther@suse.de>
32760 * tree-cfg.cc (gimple_can_merge_blocks_p): Remove condition
32761 rejecting the merge when A contains only a non-local label.
32763 2023-04-19 Uros Bizjak <ubizjak@gmail.com>
32765 * rtl.h (VIRTUAL_REGISTER_P): New predicate.
32766 (VIRTUAL_REGISTER_NUM_P): Ditto.
32767 (REGNO_PTR_FRAME_P): Use VIRTUAL_REGISTER_NUM_P predicate.
32768 * expr.cc (force_operand): Use VIRTUAL_REGISTER_P predicate.
32769 * function.cc (instantiate_decl_rtl): Ditto.
32770 * rtlanal.cc (rtx_addr_can_trap_p_1): Ditto.
32771 (nonzero_address_p): Ditto.
32772 (refers_to_regno_p): Use VIRTUAL_REGISTER_NUM_P predicate.
32774 2023-04-19 Aldy Hernandez <aldyh@redhat.com>
32776 * value-range.h (Value_Range::Value_Range): Avoid pointer sharing.
32778 2023-04-19 Richard Biener <rguenther@suse.de>
32780 * system.h (auto_mpz::operator->()): New.
32781 * realmpfr.h (auto_mpfr::operator->()): New.
32782 * builtins.cc (do_mpfr_lgamma_r): Use auto_mpfr.
32783 * real.cc (real_from_string): Likewise.
32784 (dconst_e_ptr): Likewise.
32785 (dconst_sqrt2_ptr): Likewise.
32786 * tree-ssa-loop-niter.cc (refine_value_range_using_guard):
32788 (bound_difference_of_offsetted_base): Likewise.
32789 (number_of_iterations_ne): Likewise.
32790 (number_of_iterations_lt_to_ne): Likewise.
32791 * ubsan.cc: Include realmpfr.h.
32792 (ubsan_instrument_float_cast): Use auto_mpfr.
32794 2023-04-19 Richard Biener <rguenther@suse.de>
32796 * tree-ssa-structalias.cc (solve_graph): Remove self-copy
32797 edges, remove edges from escaped after special-casing them.
32799 2023-04-19 Richard Biener <rguenther@suse.de>
32801 * tree-ssa-structalias.cc (do_sd_constraint): Fixup escape
32804 2023-04-19 Richard Biener <rguenther@suse.de>
32806 * tree-ssa-structalias.cc (do_sd_constraint): Do not write
32807 to the LHS varinfo solution member.
32809 2023-04-19 Richard Biener <rguenther@suse.de>
32811 * tree-ssa-structalias.cc (topo_visit): Look at the real
32812 destination of edges.
32814 2023-04-19 Richard Biener <rguenther@suse.de>
32816 PR tree-optimization/44794
32817 * tree-ssa-loop-manip.cc (tree_transform_and_unroll_loop):
32818 If an epilogue loop is required set its iteration upper bound.
32820 2023-04-19 Xi Ruoyao <xry111@xry111.site>
32823 * config/loongarch/loongarch-protos.h
32824 (loongarch_expand_block_move): Add a parameter as alignment RTX.
32825 * config/loongarch/loongarch.h:
32826 (LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER): Remove.
32827 (LARCH_MAX_MOVE_BYTES_STRAIGHT): Remove.
32828 (LARCH_MAX_MOVE_OPS_PER_LOOP_ITER): Define.
32829 (LARCH_MAX_MOVE_OPS_STRAIGHT): Define.
32830 (MOVE_RATIO): Use LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
32831 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
32832 * config/loongarch/loongarch.cc (loongarch_expand_block_move):
32833 Take the alignment from the parameter, but set it to
32834 UNITS_PER_WORD if !TARGET_STRICT_ALIGN. Limit the length of
32835 straight-line implementation with LARCH_MAX_MOVE_OPS_STRAIGHT
32836 instead of LARCH_MAX_MOVE_BYTES_STRAIGHT.
32837 (loongarch_block_move_straight): When there are left-over bytes,
32838 half the mode size instead of falling back to byte mode at once.
32839 (loongarch_block_move_loop): Limit the length of loop body with
32840 LARCH_MAX_MOVE_OPS_PER_LOOP_ITER instead of
32841 LARCH_MAX_MOVE_BYTES_PER_LOOP_ITER.
32842 * config/loongarch/loongarch.md (cpymemsi): Pass the alignment
32843 to loongarch_expand_block_move.
32845 2023-04-19 Xi Ruoyao <xry111@xry111.site>
32847 * config/loongarch/loongarch.cc
32848 (loongarch_setup_incoming_varargs): Don't save more GARs than
32849 cfun->va_list_gpr_size / UNITS_PER_WORD.
32851 2023-04-19 Richard Biener <rguenther@suse.de>
32853 * tree-ssa-loop-manip.cc (determine_exit_conditions): Fix
32854 no epilogue condition.
32856 2023-04-19 Richard Biener <rguenther@suse.de>
32858 * gimple.h (gimple_assign_load): Outline...
32859 * gimple.cc (gimple_assign_load): ... here. Avoid
32860 get_base_address and instead just strip the outermost
32861 handled component, treating a remaining handled component
32864 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32866 * config/aarch64/aarch64-simd-builtins.def (neg): Delete builtins
32868 * config/aarch64/arm_fp16.h (vnegh_f16): Reimplement using normal negation.
32870 2023-04-19 Jakub Jelinek <jakub@redhat.com>
32872 PR tree-optimization/109011
32873 * tree-vect-patterns.cc (vect_recog_popcount_pattern): Rename to ...
32874 (vect_recog_popcount_clz_ctz_ffs_pattern): ... this. Handle also
32875 CLZ, CTZ and FFS. Remove vargs variable, use
32876 gimple_build_call_internal rather than gimple_build_call_internal_vec.
32877 (vect_vect_recog_func_ptrs): Adjust popcount entry.
32879 2023-04-19 Jakub Jelinek <jakub@redhat.com>
32882 * dse.cc (replace_read): If read_reg is a SUBREG of a word mode
32883 REG, for WORD_REGISTER_OPERATIONS copy SUBREG_REG of it into
32884 a new REG rather than the SUBREG.
32886 2023-04-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
32888 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set_zero<mode>):
32891 2023-04-19 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
32894 * config/aarch64/aarch64.cc (aarch64_rtx_costs): Merge ASHIFT and
32895 ROTATE, ROTATERT, LSHIFTRT, ASHIFTRT cases. Handle subregs in op1.
32897 2023-04-19 Richard Biener <rguenther@suse.de>
32899 PR rtl-optimization/109237
32900 * cse.cc (insn_live_p): Remove NEXT_INSN walk, instead check
32901 TREE_VISITED on INSN_VAR_LOCATION_DECL.
32902 (delete_trivially_dead_insns): Maintain TREE_VISITED on
32903 active debug bind INSN_VAR_LOCATION_DECL.
32905 2023-04-19 Richard Biener <rguenther@suse.de>
32907 PR rtl-optimization/109237
32908 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
32910 2023-04-19 Christophe Lyon <christophe.lyon@arm.com>
32912 * doc/install.texi (enable-decimal-float): Add AArch64.
32914 2023-04-19 liuhongt <hongtao.liu@intel.com>
32916 PR rtl-optimization/109351
32917 * ira.cc (setup_class_subset_and_memory_move_costs): Check
32918 hard_regno_mode_ok before setting lowest memory move cost for
32919 the mode with different reg classes.
32921 2023-04-18 Jason Merrill <jason@redhat.com>
32923 * doc/invoke.texi: Remove stray @gol.
32925 2023-04-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
32927 * ifcvt.cc (cond_move_process_if_block): Consider the result of
32928 targetm.noce_conversion_profitable_p() when replacing the original
32929 sequence with the converted one.
32931 2023-04-18 Mark Harmstone <mark@harmstone.com>
32933 * common.opt (gcodeview): Add new option.
32934 * gcc.cc (driver_handle_option); Handle OPT_gcodeview.
32935 * opts.cc (command_handle_option): Similarly.
32936 * doc/invoke.texi: Add documentation for -gcodeview.
32938 2023-04-18 Andrew Pinski <apinski@marvell.com>
32940 * tree-ssa-phiopt.cc (tree_ssa_phiopt_worker): Remove declaration.
32941 (make_pass_phiopt): Make execute out of line.
32942 (tree_ssa_cs_elim): Move code into ...
32943 (pass_cselim::execute): here.
32945 2023-04-18 Sam James <sam@gentoo.org>
32947 * system.h: Drop unused INCLUDE_PTHREAD_H.
32949 2023-04-18 Kevin Lee <kevinl@rivosinc.com>
32951 * tree-vect-data-refs.cc (vect_grouped_store_supported): Add new
32954 2023-04-18 Sinan Lin <sinan.lin@linux.alibaba.com>
32956 * config/riscv/bitmanip.md (rotr<mode>3 expander): Enable for ZBKB.
32957 (bswapdi2, bswapsi2): Similarly.
32959 2023-04-18 Uros Bizjak <ubizjak@gmail.com>
32962 * config/i386/i386-builtin.def (__builtin_ia32_insertps128):
32963 Use CODE_FOR_sse4_1_insertps_v4sf.
32964 * config/i386/i386-expand.cc (expand_vec_perm_insertps): New.
32965 (expand_vec_perm_1): Call expand_vec_per_insertps.
32966 * config/i386/i386.md ("unspec"): Declare UNSPEC_INSERTPS here.
32967 * config/i386/mmx.md (mmxscalarmode): New mode attribute.
32968 (@sse4_1_insertps_<mode>): New insn pattern.
32969 * config/i386/sse.md (@sse4_1_insertps_<mode>): Macroize insn
32970 pattern from sse4_1_insertps using VI4F_128 mode iterator.
32972 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
32974 * value-range.cc (gt_ggc_mx): New.
32976 * value-range.h (class vrange): Add GTY marker.
32977 (class frange): Same.
32978 (gt_ggc_mx): Remove.
32979 (gt_pch_nx): Remove.
32981 2023-04-18 Victor L. Do Nascimento <victor.donascimento@arm.com>
32983 * lra-constraints.cc (constraint_unique): New.
32984 (process_address_1): Apply constraint_unique test.
32985 * recog.cc (constrain_operands): Allow relaxed memory
32988 2023-04-18 Kito Cheng <kito.cheng@sifive.com>
32990 * doc/extend.texi (Target Builtins): Add RISC-V Vector
32992 (RISC-V Vector Intrinsics): Document GCC implemented which
32993 version of RISC-V vector intrinsics and its reference.
32995 2023-04-18 Richard Biener <rguenther@suse.de>
32997 PR middle-end/108786
32998 * bitmap.h (bitmap_clear_first_set_bit): New.
32999 * bitmap.cc (bitmap_first_set_bit_worker): Rename from
33000 bitmap_first_set_bit and add optional clearing of the bit.
33001 (bitmap_first_set_bit): Wrap bitmap_first_set_bit_worker.
33002 (bitmap_clear_first_set_bit): Likewise.
33003 * df-core.cc (df_worklist_dataflow_doublequeue): Use
33004 bitmap_clear_first_set_bit.
33005 * graphite-scop-detection.cc (scop_detection::merge_sese):
33007 * sanopt.cc (sanitize_asan_mark_unpoison): Likewise.
33008 (sanitize_asan_mark_poison): Likewise.
33009 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Likewise.
33010 * tree-into-ssa.cc (rewrite_blocks): Likewise.
33011 * tree-ssa-dce.cc (simple_dce_from_worklist): Likewise.
33012 * tree-ssa-sccvn.cc (do_rpo_vn_1): Likewise.
33014 2023-04-18 Richard Biener <rguenther@suse.de>
33016 * tree-ssa-structalias.cc (dump_sa_stats): Split out from...
33017 (dump_sa_points_to_info): ... this function.
33018 (compute_points_to_sets): Guard large dumps with TDF_DETAILS,
33019 and call dump_sa_stats guarded with TDF_STATS.
33020 (ipa_pta_execute): Likewise.
33021 (compute_may_aliases): Guard dump_alias_info with
33022 TDF_DETAILS|TDF_ALIAS.
33024 2023-04-18 Andrew Pinski <apinski@marvell.com>
33026 * tree-ssa-phiopt.cc (gimple_simplify_phiopt): Dump
33027 the expression that is being tried when TDF_FOLDING
33029 (phiopt_worker::match_simplify_replacement): Dump
33030 the sequence which was created by gimple_simplify_phiopt
33031 when TDF_FOLDING is true.
33033 2023-04-18 Andrew Pinski <apinski@marvell.com>
33035 * tree-ssa-phiopt.cc (match_simplify_replacement):
33036 Simplify code that does the movement slightly.
33038 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33040 * config/aarch64/aarch64.md (@aarch64_rev16<mode>): Change to
33042 (rev16<mode>2): Rename to...
33043 (aarch64_rev16<mode>2_alt1): ... This.
33044 (rev16<mode>2_alt): Rename to...
33045 (*aarch64_rev16<mode>2_alt2): ... This.
33047 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33049 * emit-rtl.cc (init_emit_once): Initialize dconstm0.
33050 * gimple-range-op.cc (class cfn_signbit): Remove dconstm0
33052 * range-op-float.cc (zero_range): Use dconstm0.
33053 (zero_to_inf_range): Same.
33054 * real.h (dconstm0): New.
33055 * value-range.cc (frange::flush_denormals_to_zero): Use dconstm0.
33056 (frange::set_zero): Do not declare dconstm0.
33058 2023-04-18 Richard Biener <rguenther@suse.de>
33060 * system.h (class auto_mpz): New,
33061 * realmpfr.h (class auto_mpfr): Likewise.
33062 * fold-const-call.cc (do_mpfr_arg1): Use auto_mpfr.
33063 (do_mpfr_arg2): Likewise.
33064 * tree-ssa-loop-niter.cc (bound_difference): Use auto_mpz;
33066 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33068 * config/aarch64/aarch64-builtins.cc (aarch64_init_simd_intrinsics): Take
33069 builtin flags from intrinsic data rather than hardcoded FLAG_AUTO_FP.
33071 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33073 * value-range.cc (frange::operator==): Adjust for NAN.
33074 (range_tests_nan): Remove some NAN tests.
33076 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33078 * inchash.cc (hash::add_real_value): New.
33079 * inchash.h (class hash): Add add_real_value.
33080 * value-range.cc (add_vrange): New.
33081 * value-range.h (inchash::add_vrange): New.
33083 2023-04-18 Richard Biener <rguenther@suse.de>
33085 PR tree-optimization/109539
33086 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
33087 Re-implement pointer relatedness for PHIs.
33089 2023-04-18 Andrew Stubbs <ams@codesourcery.com>
33091 * config/gcn/gcn-valu.md (SV_SFDF): New iterator.
33092 (SV_FP): New iterator.
33093 (scalar_mode, SCALAR_MODE): Add identity mappings for scalar modes.
33094 (recip<mode>2): Unify the two patterns using SV_FP.
33095 (div_scale<mode><exec_vcc>): New insn.
33096 (div_fmas<mode><exec>): New insn.
33097 (div_fixup<mode><exec>): New insn.
33098 (div<mode>3): Unify the two expanders and rewrite using hardfp.
33099 * config/gcn/gcn.cc (gcn_md_reorg): Support "vccwait" attribute.
33100 * config/gcn/gcn.md (unspec): Add UNSPEC_DIV_SCALE, UNSPEC_DIV_FMAS,
33101 and UNSPEC_DIV_FIXUP.
33102 (vccwait): New attribute.
33104 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33106 * config/aarch64/aarch64.cc (aarch64_validate_mcpu): Add hint to use -march
33107 if the argument matches that.
33109 2023-04-18 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
33111 * config/aarch64/atomics.md
33112 (*aarch64_atomic_load<ALLX:mode>_rcpc_zext):
33113 Use SD_HSDI for destination mode iterator.
33115 2023-04-18 Jin Ma <jinma@linux.alibaba.com>
33117 * common/config/riscv/riscv-common.cc (multi_letter_subset_rank): Swap the order
33118 of z-extensions and s-extensions.
33119 (riscv_subset_list::parse): Likewise.
33121 2023-04-18 Jakub Jelinek <jakub@redhat.com>
33123 PR tree-optimization/109240
33124 * match.pd (fneg/fadd): Rewrite such that it handles both plus as
33125 first vec_perm operand and minus as second using fneg/fadd and
33126 minus as first vec_perm operand and plus as second using fneg/fsub.
33128 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33130 * data-streamer.cc (bp_pack_real_value): New.
33131 (bp_unpack_real_value): New.
33132 * data-streamer.h (bp_pack_real_value): New.
33133 (bp_unpack_real_value): New.
33134 * tree-streamer-in.cc (unpack_ts_real_cst_value_fields): Use
33135 bp_unpack_real_value.
33136 * tree-streamer-out.cc (pack_ts_real_cst_value_fields): Use
33137 bp_pack_real_value.
33139 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33141 * wide-int.h (WIDE_INT_MAX_HWIS): New.
33142 (class fixed_wide_int_storage): Use it.
33143 (trailing_wide_ints <N>::set_precision): Use it.
33144 (trailing_wide_ints <N>::extra_size): Use it.
33146 2023-04-18 Xi Ruoyao <xry111@xry111.site>
33148 * config/loongarch/loongarch-protos.h
33149 (loongarch_addu16i_imm12_operand_p): New function prototype.
33150 (loongarch_split_plus_constant): Likewise.
33151 * config/loongarch/loongarch.cc
33152 (loongarch_addu16i_imm12_operand_p): New function.
33153 (loongarch_split_plus_constant): Likewise.
33154 * config/loongarch/loongarch.h (ADDU16I_OPERAND): New macro.
33155 (DUAL_IMM12_OPERAND): Likewise.
33156 (DUAL_ADDU16I_OPERAND): Likewise.
33157 * config/loongarch/constraints.md (La, Lb, Lc, Ld, Le): New
33159 * config/loongarch/predicates.md (const_dual_imm12_operand): New
33161 (const_addu16i_operand): Likewise.
33162 (const_addu16i_imm12_di_operand): Likewise.
33163 (const_addu16i_imm12_si_operand): Likewise.
33164 (plus_di_operand): Likewise.
33165 (plus_si_operand): Likewise.
33166 (plus_si_extend_operand): Likewise.
33167 * config/loongarch/loongarch.md (add<mode>3): Convert to
33168 define_insn_and_split. Use plus_<mode>_operand predicate
33169 instead of arith_operand. Add alternatives for La, Lb, Lc, Ld,
33170 and Le constraints.
33171 (*addsi3_extended): Convert to define_insn_and_split. Use
33172 plus_si_extend_operand instead of arith_operand. Add
33173 alternatives for La and Le alternatives.
33175 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33177 * value-range.h (Value_Range::Value_Range): New.
33178 (Value_Range::contains_p): New.
33180 2023-04-18 Aldy Hernandez <aldyh@redhat.com>
33182 * value-range.h (class vrange): Make m_discriminator const.
33183 (class irange): Make m_max_ranges const. Adjust constructors
33185 (class unsupported_range): Construct vrange appropriately.
33186 (class frange): Same.
33188 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
33190 * config/loongarch/loongarch.h (LOGICAL_OP_NON_SHORT_CIRCUIT): Remove the macro
33193 2023-04-18 Lulu Cheng <chenglulu@loongson.cn>
33195 * doc/extend.texi: Add section for LoongArch Base Built-in functions.
33197 2023-04-18 Fei Gao <gaofei@eswincomputing.com>
33199 * config/riscv/riscv.cc (riscv_first_stack_step): Make codes more
33201 (riscv_expand_epilogue): Likewise.
33203 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
33205 * config/riscv/riscv.cc (riscv_expand_prologue): Consider save-restore in
33207 (riscv_expand_epilogue): Consider save-restore in stack deallocation.
33209 2023-04-17 Andrew Pinski <apinski@marvell.com>
33211 * tree-ssa-phiopt.cc (gate_hoist_loads): Remove
33214 2023-04-17 Aldy Hernandez <aldyh@redhat.com>
33216 * gimple-ssa-warn-alloca.cc (pass_walloca::execute): Do not export
33219 2023-04-17 Fei Gao <gaofei@eswincomputing.com>
33221 * config/riscv/riscv.cc (riscv_first_stack_step): Add a new function
33222 parameter remaining_size.
33223 (riscv_compute_frame_info): Adapt new riscv_first_stack_step interface.
33224 (riscv_expand_prologue): Likewise.
33225 (riscv_expand_epilogue): Likewise.
33227 2023-04-17 Feng Wang <wangfeng@eswincomputing.com>
33229 * config/riscv/bitmanip.md (rotrsi3_sext): Support generating
33230 roriw for constant counts.
33231 * rtl.h (reverse_rotate_by_imm_p): Add function declartion
33232 * simplify-rtx.cc (reverse_rotate_by_imm_p): New function.
33233 (simplify_context::simplify_binary_operation_1): Use it.
33234 * expmed.cc (expand_shift_1): Likewise.
33236 2023-04-17 Martin Jambor <mjambor@suse.cz>
33240 * cgraph.h (symtab_node::find_reference): Add parameter use_type.
33241 * ipa-prop.h (ipa_pass_through_data): New flag refdesc_decremented.
33242 (ipa_zap_jf_refdesc): New function.
33243 (ipa_get_jf_pass_through_refdesc_decremented): Likewise.
33244 (ipa_set_jf_pass_through_refdesc_decremented): Likewise.
33245 * ipa-cp.cc (ipcp_discover_new_direct_edges): Provide a value for
33246 the new parameter of find_reference.
33247 (adjust_references_in_caller): Likewise. Make sure the constant jump
33248 function is not used to decrement a refdec counter again. Only
33249 decrement refdesc counters when the pass_through jump function allows
33250 it. Added a detailed dump when decrementing refdesc counters.
33251 * ipa-prop.cc (ipa_print_node_jump_functions_for_edge): Dump new flag.
33252 (ipa_set_jf_simple_pass_through): Initialize the new flag.
33253 (ipa_set_jf_unary_pass_through): Likewise.
33254 (ipa_set_jf_arith_pass_through): Likewise.
33255 (remove_described_reference): Provide a value for the new parameter of
33257 (update_jump_functions_after_inlining): Zap refdesc of new jfunc if
33258 the previous pass_through had a flag mandating that we do so.
33259 (propagate_controlled_uses): Likewise. Only decrement refdesc
33260 counters when the pass_through jump function allows it.
33261 (ipa_edge_args_sum_t::duplicate): Provide a value for the new
33262 parameter of find_reference.
33263 (ipa_write_jump_function): Assert the new flag does not have to be
33265 * symtab.cc (symtab_node::find_reference): Add parameter use_type, use
33268 2023-04-17 Philipp Tomsich <philipp.tomsich@vrull.eu>
33269 Di Zhao <di.zhao@amperecomputing.com>
33271 * config/aarch64/aarch64-tuning-flags.def (AARCH64_EXTRA_TUNING_OPTION):
33272 Add AARCH64_EXTRA_TUNE_NO_LDP_COMBINE.
33273 * config/aarch64/aarch64.cc (aarch64_operands_ok_for_ldpstp):
33274 Check for the above tuning option when processing loads.
33276 2023-04-17 Richard Biener <rguenther@suse.de>
33278 PR tree-optimization/109524
33279 * tree-vrp.cc (remove_unreachable::m_list): Change to a
33280 vector of pairs of block indices.
33281 (remove_unreachable::maybe_register_block): Adjust.
33282 (remove_unreachable::remove_and_update_globals): Likewise.
33283 Deal with removed blocks.
33285 2023-04-16 Jeff Law <jlaw@ventanamicro>
33288 * config/riscv/riscv.cc (riscv_expand_conditional_move): For
33289 TARGET_SFB_ALU, force the true arm into a register.
33291 2023-04-15 John David Anglin <danglin@gcc.gnu.org>
33294 * config/pa/pa-protos.h (pa_function_arg_size): Update prototype.
33295 * config/pa/pa.cc (pa_function_arg): Return NULL_RTX if argument
33297 (pa_arg_partial_bytes): Don't call pa_function_arg_size twice.
33298 (pa_function_arg_size): Change return type to int. Return zero
33299 for arguments larger than 1 GB. Update comments.
33301 2023-04-15 Jakub Jelinek <jakub@redhat.com>
33303 PR tree-optimization/109154
33304 * tree-if-conv.cc (predicate_scalar_phi): For complex PHIs, emit just
33305 args_len - 1 COND_EXPRs rather than args_len. Formatting fix.
33307 2023-04-15 Jason Merrill <jason@redhat.com>
33310 * gimple-ssa-warn-access.cc (pass_waccess::check_dangling_stores):
33311 Overhaul lhs_ref.ref analysis.
33313 2023-04-14 Richard Biener <rguenther@suse.de>
33315 PR tree-optimization/109502
33316 * tree-vect-stmts.cc (vectorizable_assignment): Fix
33317 check for conversion between mask and non-mask types.
33319 2023-04-14 Jeff Law <jlaw@ventanamicro.com>
33320 Jakub Jelinek <jakub@redhat.com>
33324 * combine.cc (simplify_and_const_int_1): Compute nonzero_bits in
33325 word_mode rather than mode if WORD_REGISTER_OPERATIONS and mode is
33326 smaller than word_mode.
33327 * simplify-rtx.cc (simplify_context::simplify_binary_operation_1)
33328 <case AND>: Likewise.
33330 2023-04-14 Jakub Jelinek <jakub@redhat.com>
33332 * loop-iv.cc (iv_number_of_iterations): Use gen_int_mode instead
33335 2023-04-13 Andrew MacLeod <amacleod@redhat.com>
33337 PR tree-optimization/108139
33338 PR tree-optimization/109462
33339 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Remove
33340 equivalency check for PHI nodes.
33341 * gimple-range-fold.cc (fold_using_range::range_of_phi): Ensure def
33342 does not dominate single-arg equivalency edges.
33344 2023-04-13 Richard Sandiford <richard.sandiford@arm.com>
33347 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Do
33348 not trust TYPE_ALIGN for pointer types; use POINTER_SIZE instead.
33350 2023-04-13 Richard Biener <rguenther@suse.de>
33352 PR tree-optimization/109491
33353 * tree-ssa-sccvn.cc (expressions_equal_p): Restore the
33354 NULL operands test.
33356 2023-04-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33359 * config/riscv/riscv-vector-builtins-types.def (vint8mf8_t): Fix predicate.
33360 (vint16mf4_t): Ditto.
33361 (vint32mf2_t): Ditto.
33362 (vint64m1_t): Ditto.
33363 (vint64m2_t): Ditto.
33364 (vint64m4_t): Ditto.
33365 (vint64m8_t): Ditto.
33366 (vuint8mf8_t): Ditto.
33367 (vuint16mf4_t): Ditto.
33368 (vuint32mf2_t): Ditto.
33369 (vuint64m1_t): Ditto.
33370 (vuint64m2_t): Ditto.
33371 (vuint64m4_t): Ditto.
33372 (vuint64m8_t): Ditto.
33373 (vfloat32mf2_t): Ditto.
33374 (vbool64_t): Ditto.
33375 * config/riscv/riscv-vector-builtins.cc (register_builtin_type): Add comments.
33376 (register_vector_type): Ditto.
33377 (check_required_extensions): Fix condition.
33378 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_ZVE64): Remove it.
33379 (RVV_REQUIRE_ELEN_64): New define.
33380 (RVV_REQUIRE_MIN_VLEN_64): Ditto.
33381 * config/riscv/riscv-vector-switch.def (TARGET_VECTOR_FP32): Remove it.
33382 (TARGET_VECTOR_FP64): Ditto.
33383 (ENTRY): Fix predicate.
33384 * config/riscv/vector-iterators.md: Fix predicate.
33386 2023-04-12 Jakub Jelinek <jakub@redhat.com>
33388 PR tree-optimization/109410
33389 * tree-ssa-reassoc.cc (build_and_add_sum): Split edge from entry
33390 block if first statement of the function is a call to returns_twice
33393 2023-04-12 Jakub Jelinek <jakub@redhat.com>
33396 * config/i386/i386.cc: Include rtl-error.h.
33397 (ix86_print_operand): For z modifier warning, use warning_for_asm
33398 if this_is_asm_operands. For Z modifier errors, use %c and code
33399 instead of hardcoded Z.
33401 2023-04-12 Costas Argyris <costas.argyris@gmail.com>
33403 * config/i386/x-mingw32-utf8: Remove extrataneous $@
33405 2023-04-12 Andrew MacLeod <amacleod@redhat.com>
33407 PR tree-optimization/109462
33408 * gimple-range-cache.cc (ranger_cache::fill_block_cache): Don't
33409 check for equivalences if NAME is a phi node.
33411 2023-04-12 Richard Biener <rguenther@suse.de>
33413 PR tree-optimization/109473
33414 * tree-vect-loop.cc (vect_create_epilog_for_reduction):
33415 Convert scalar result to the computation type before performing
33416 the reduction adjustment.
33418 2023-04-12 Richard Biener <rguenther@suse.de>
33420 PR tree-optimization/109469
33421 * tree-vect-slp.cc (vect_slp_function): Skip region starts with
33422 a returns-twice call.
33424 2023-04-12 Richard Biener <rguenther@suse.de>
33426 PR tree-optimization/109434
33427 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): Properly
33428 handle possibly throwing calls when processing the LHS
33429 and may-defs are not OK.
33431 2023-04-11 Lin Sinan <mynameisxiaou@gmail.com>
33433 * config/riscv/predicates.md (uimm_extra_bit_or_twobits): Adjust
33434 predicate to avoid splitting arith constants.
33436 2023-04-11 Yanzhang Wang <yanzhang.wang@intel.com>
33437 Pan Li <pan2.li@intel.com>
33438 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33439 Kito Cheng <kito.cheng@sifive.com>
33442 * config/riscv/riscv-protos.h (emit_hard_vlmax_vsetvl): New.
33443 * config/riscv/riscv-v.cc (emit_hard_vlmax_vsetvl): New.
33444 (emit_vlmax_vsetvl): Use emit_hard_vlmax_vsetvl.
33445 * config/riscv/riscv.cc (vector_zero_call_used_regs): New.
33446 (riscv_zero_call_used_regs): New.
33447 (TARGET_ZERO_CALL_USED_REGS): New.
33449 2023-04-11 Martin Liska <mliska@suse.cz>
33452 * opts.cc (finish_options): Drop also
33453 x_flag_var_tracking_assignments.
33455 2023-04-11 Andre Vieira <andre.simoesdiasvieira@arm.com>
33457 PR tree-optimization/108888
33458 * tree-if-conv.cc (predicate_statements): Fix gimple call check.
33460 2023-04-11 Haochen Gui <guihaoc@gcc.gnu.org>
33463 * config/rs6000/vsx.md (vsx_sign_extend_qi_<mode>): Rename to...
33464 (vsx_sign_extend_v16qi_<mode>): ... this.
33465 (vsx_sign_extend_hi_<mode>): Rename to...
33466 (vsx_sign_extend_v8hi_<mode>): ... this.
33467 (vsx_sign_extend_si_v2di): Rename to...
33468 (vsx_sign_extend_v4si_v2di): ... this.
33469 (vsignextend_qi_<mode>): Remove.
33470 (vsignextend_hi_<mode>): Remove.
33471 (vsignextend_si_v2di): Remove.
33472 (vsignextend_v2di_v1ti): Remove.
33473 (*xxspltib_<mode>_split): Replace gen_vsx_sign_extend_qi_v2di with
33474 gen_vsx_sign_extend_v16qi_v2di and gen_vsx_sign_extend_qi_v4si
33475 with gen_vsx_sign_extend_v16qi_v4si.
33476 * config/rs6000/rs6000.md (split for DI constant generation):
33477 Replace gen_vsx_sign_extend_qi_si with gen_vsx_sign_extend_v16qi_si.
33478 (split for HSDI constant generation): Replace gen_vsx_sign_extend_qi_di
33479 with gen_vsx_sign_extend_v16qi_di and gen_vsx_sign_extend_qi_si
33480 with gen_vsx_sign_extend_v16qi_si.
33481 * config/rs6000/rs6000-builtins.def (__builtin_altivec_vsignextsb2d):
33482 Set bif-pattern to vsx_sign_extend_v16qi_v2di.
33483 (__builtin_altivec_vsignextsb2w): Set bif-pattern to
33484 vsx_sign_extend_v16qi_v4si.
33485 (__builtin_altivec_visgnextsh2d): Set bif-pattern to
33486 vsx_sign_extend_v8hi_v2di.
33487 (__builtin_altivec_vsignextsh2w): Set bif-pattern to
33488 vsx_sign_extend_v8hi_v4si.
33489 (__builtin_altivec_vsignextsw2d): Set bif-pattern to
33490 vsx_sign_extend_si_v2di.
33491 (__builtin_altivec_vsignext): Set bif-pattern to
33492 vsx_sign_extend_v2di_v1ti.
33493 * config/rs6000/rs6000-builtin.cc (lxvrse_expand_builtin): Replace
33494 gen_vsx_sign_extend_qi_v2di with gen_vsx_sign_extend_v16qi_v2di,
33495 gen_vsx_sign_extend_hi_v2di with gen_vsx_sign_extend_v8hi_v2di and
33496 gen_vsx_sign_extend_si_v2di with gen_vsx_sign_extend_v4si_v2di.
33498 2023-04-10 Michael Meissner <meissner@linux.ibm.com>
33501 * config/rs6000/vsx.md (vsx_fmav4sf4): Do not generate vmaddfp.
33502 (vsx_nfmsv4sf4): Do not generate vnmsubfp.
33504 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
33506 * config/i386/i386.h (PTA_GRANITERAPIDS): Add PTA_AMX_COMPLEX.
33508 2023-04-10 Haochen Jiang <haochen.jiang@intel.com>
33510 * common/config/i386/cpuinfo.h (get_available_features):
33511 Detect AMX-COMPLEX.
33512 * common/config/i386/i386-common.cc
33513 (OPTION_MASK_ISA2_AMX_COMPLEX_SET,
33514 OPTION_MASK_ISA2_AMX_COMPLEX_UNSET): New.
33515 (ix86_handle_option): Handle -mamx-complex.
33516 * common/config/i386/i386-cpuinfo.h (enum processor_features):
33517 Add FEATURE_AMX_COMPLEX.
33518 * common/config/i386/i386-isas.h: Add ISA_NAME_TABLE_ENTRY for
33520 * config.gcc: Add amxcomplexintrin.h.
33521 * config/i386/cpuid.h (bit_AMX_COMPLEX): New.
33522 * config/i386/i386-c.cc (ix86_target_macros_internal): Define
33524 * config/i386/i386-isa.def (AMX_COMPLEX): Add DEF_PTA(AMX_COMPLEX).
33525 * config/i386/i386-options.cc (ix86_valid_target_attribute_inner_p):
33526 Handle amx-complex.
33527 * config/i386/i386.opt: Add option -mamx-complex.
33528 * config/i386/immintrin.h: Include amxcomplexintrin.h.
33529 * doc/extend.texi: Document amx-complex.
33530 * doc/invoke.texi: Document -mamx-complex.
33531 * doc/sourcebuild.texi: Document target amx-complex.
33532 * config/i386/amxcomplexintrin.h: New file.
33534 2023-04-08 Jakub Jelinek <jakub@redhat.com>
33536 PR tree-optimization/109392
33537 * tree-vect-generic.cc (tree_vec_extract): Handle failure
33538 of maybe_push_res_to_seq better.
33540 2023-04-08 Jakub Jelinek <jakub@redhat.com>
33542 * Makefile.in (CORETYPES_H): Depend on align.h, poly-int.h and
33544 (SYSTEM_H): Depend on $(HASHTAB_H).
33545 * config/riscv/t-riscv (build/genrvv-type-indexer.o): Remove unused
33546 dependency on $(RTL_BASE_H), remove redundant dependency on
33549 2023-04-06 Richard Earnshaw <rearnsha@arm.com>
33552 * config/arm/arm.cc (arm_effective_regno): New function.
33553 (mve_vector_mem_operand): Use it.
33555 2023-04-06 Andrew MacLeod <amacleod@redhat.com>
33557 PR tree-optimization/109417
33558 * gimple-range-gori.cc (gori_compute::may_recompute_p): Check if
33559 dependency is in SSA_NAME_FREE_LIST.
33561 2023-04-06 Andrew Pinski <apinski@marvell.com>
33563 PR tree-optimization/109427
33564 * params.opt (-param=vect-induction-float=):
33565 Fix option attribute typo for IntegerRange.
33567 2023-04-05 Jeff Law <jlaw@ventanamicro>
33570 * combine.cc (combine_instructions): Force re-recognition when
33571 after restoring the body of an insn to its original form.
33573 2023-04-05 Martin Jambor <mjambor@suse.cz>
33576 * ipa-sra.cc (zap_useless_ipcp_results): New function.
33577 (process_isra_node_results): Call it.
33579 2023-04-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
33581 * config/riscv/vector.md: Fix incorrect operand order.
33583 2023-04-05 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33585 * config/riscv/riscv-vsetvl.cc
33586 (pass_vsetvl::compute_local_backward_infos): Update user vsetvl in local
33589 2023-04-05 Li Xu <xuli1@eswincomputing.com>
33591 * config/riscv/riscv-vector-builtins.def: Fix typo.
33592 * config/riscv/riscv.cc (riscv_dwarf_poly_indeterminate_value): Ditto.
33593 * config/riscv/vector-iterators.md: Ditto.
33595 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
33597 * doc/md.texi (Including Patterns): Fix page break.
33599 2023-04-04 Jakub Jelinek <jakub@redhat.com>
33601 PR tree-optimization/109386
33602 * range-op-float.cc (foperator_lt::op1_range, foperator_lt::op2_range,
33603 foperator_le::op1_range, foperator_le::op2_range,
33604 foperator_gt::op1_range, foperator_gt::op2_range,
33605 foperator_ge::op1_range, foperator_ge::op2_range): Make r varying for
33606 BRS_FALSE case even if the other op is maybe_isnan, not just
33608 (foperator_unordered_lt::op1_range, foperator_unordered_lt::op2_range,
33609 foperator_unordered_le::op1_range, foperator_unordered_le::op2_range,
33610 foperator_unordered_gt::op1_range, foperator_unordered_gt::op2_range,
33611 foperator_unordered_ge::op1_range, foperator_unordered_ge::op2_range):
33612 Make r varying for BRS_TRUE case even if the other op is maybe_isnan,
33613 not just known_isnan.
33615 2023-04-04 Marek Polacek <polacek@redhat.com>
33617 PR sanitizer/109107
33618 * fold-const.cc (fold_binary_loc): Use TYPE_OVERFLOW_SANITIZED
33620 * match.pd: Use TYPE_OVERFLOW_SANITIZED.
33622 2023-04-04 Stam Markianos-Wright <stam.markianos-wright@arm.com>
33624 * config/arm/mve.md (mve_vcvtq_n_to_f_<supf><mode>): Swap operands.
33625 (mve_vcreateq_f<mode>): Swap operands.
33627 2023-04-04 Andrew Stubbs <ams@codesourcery.com>
33629 * config/gcn/gcn-valu.md (one_cmpl<mode>2<exec>): New.
33631 2023-04-04 Jakub Jelinek <jakub@redhat.com>
33634 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
33635 Reword diagnostics about zfinx conflict with f, formatting fixes.
33637 2023-04-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
33639 * config/sol2.h (LIB_SPEC): Don't link with -lpthread.
33641 2023-04-04 Richard Biener <rguenther@suse.de>
33643 PR tree-optimization/109304
33644 * tree-profile.cc (tree_profiling): Use symtab node
33645 availability to decide whether to skip adjusting calls.
33646 Do not adjust calls to internal functions.
33648 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
33651 * config/rs6000/rs6000.cc (rs6000_expand_vector_set_var_p9): Fix gen
33652 function for permutation control vector by considering big endianness.
33654 2023-04-04 Kewen Lin <linkw@linux.ibm.com>
33657 * config/rs6000/altivec.md (*p9v_parity<mode>2): Rename to ...
33658 (rs6000_vprtyb<mode>2): ... this.
33659 * config/rs6000/rs6000-builtins.def (VPRTYBD): Replace parityv2di2 with
33660 rs6000_vprtybv2di2.
33661 (VPRTYBW): Replace parityv4si2 with rs6000_vprtybv4si2.
33662 (VPRTYBQ): Replace parityv1ti2 with rs6000_vprtybv1ti2.
33663 * config/rs6000/vector.md (parity<mode>2 with VEC_IP): Expand with
33664 popcountv16qi2 and the corresponding rs6000_vprtyb<mode>2.
33666 2023-04-04 Hans-Peter Nilsson <hp@axis.com>
33667 Sandra Loosemore <sandra@codesourcery.com>
33669 * doc/md.texi (Insn Splitting): Tweak wording for readability.
33671 2023-04-03 Martin Jambor <mjambor@suse.cz>
33674 * ipa-prop.cc (determine_known_aggregate_parts): Check that the
33675 offset + size will be representable in unsigned int.
33677 2023-04-03 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
33679 * configure.ac (ZSTD_LIB): Move before zstd.h check.
33680 Unset gcc_cv_header_zstd_h without libzstd.
33681 * configure: Regenerate.
33683 2023-04-03 Martin Liska <mliska@suse.cz>
33685 * doc/invoke.texi: Document new param.
33687 2023-04-03 Cupertino Miranda <cupertino.miranda@oracle.com>
33689 * doc/sourcebuild.texi (const_volatile_readonly_section): Document
33690 new check_effective_target function.
33692 2023-04-03 Li Xu <xuli1@eswincomputing.com>
33694 * config/riscv/riscv-vector-builtins.def (vuint32m8_t): Fix typo.
33695 (vfloat32m8_t): Likewise
33697 2023-04-03 liuhongt <hongtao.liu@intel.com>
33699 * doc/md.texi: Document signbitm2.
33701 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33702 kito-cheng <kito.cheng@sifive.com>
33704 * config/riscv/vector.md: Fix RA constraint.
33706 2023-04-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
33708 * config/riscv/riscv-protos.h (gen_avl_for_scalar_move): New function.
33709 * config/riscv/riscv-v.cc (gen_avl_for_scalar_move): New function.
33710 * config/riscv/vector.md: Fix scalar move bug.
33712 2023-04-01 Jakub Jelinek <jakub@redhat.com>
33714 * range-op-float.cc (foperator_equal::fold_range): If at least
33715 one of the op ranges is not singleton and neither is NaN and all
33716 4 bounds are zero, return [1, 1].
33717 (foperator_not_equal::fold_range): In the same case return [0, 0].
33719 2023-04-01 Jakub Jelinek <jakub@redhat.com>
33721 * range-op-float.cc (foperator_equal::fold_range): Perform the
33722 non-singleton handling regardless of maybe_isnan (op1, op2).
33723 (foperator_not_equal::fold_range): Likewise.
33724 (foperator_lt::fold_range, foperator_le::fold_range,
33725 foperator_gt::fold_range, foperator_ge::fold_range): Perform the
33726 real_* comparison check which results in range_false (type)
33727 even if maybe_isnan (op1, op2). Simplify.
33728 (foperator_ltgt): New class.
33729 (fop_ltgt): New variable.
33730 (floating_op_table::floating_op_table): Handle LTGT_EXPR using
33733 2023-04-01 Jakub Jelinek <jakub@redhat.com>
33736 * builtins.cc (apply_args_size): If targetm.calls.get_raw_arg_mode
33737 returns VOIDmode, handle it like if the register isn't used for
33738 passing arguments at all.
33739 (apply_result_size): If targetm.calls.get_raw_result_mode returns
33740 VOIDmode, handle it like if the register isn't used for returning
33742 * target.def (get_raw_result_mode, get_raw_arg_mode): Document what it
33743 means to return VOIDmode.
33744 * doc/tm.texi: Regenerated.
33745 * config/aarch64/aarch64.cc (aarch64_function_value_regno_p): Return
33746 TARGET_SVE for P0_REGNUM.
33747 (aarch64_function_arg_regno_p): Also return true for p0-p3.
33748 (aarch64_get_reg_raw_mode): Return VOIDmode for PR_REGNUM_P regs.
33750 2023-03-31 Vladimir N. Makarov <vmakarov@redhat.com>
33752 * lra-constraints.cc: (combine_reload_insn): New function.
33754 2023-03-31 Jakub Jelinek <jakub@redhat.com>
33756 PR tree-optimization/91645
33757 * range-op-float.cc (foperator_unordered_lt::fold_range,
33758 foperator_unordered_le::fold_range,
33759 foperator_unordered_gt::fold_range,
33760 foperator_unordered_ge::fold_range,
33761 foperator_unordered_equal::fold_range): Call the ordered
33762 fold_range on ranges with cleared NaNs.
33763 * value-query.cc (range_query::get_tree_range): Handle also
33764 COMPARISON_CLASS_P trees.
33766 2023-03-31 Kito Cheng <kito.cheng@sifive.com>
33767 Andrew Pinski <pinskia@gmail.com>
33770 * config/riscv/t-riscv: Add missing dependencies.
33772 2023-03-31 liuhongt <hongtao.liu@intel.com>
33774 * config/i386/i386.cc (inline_memory_move_cost): Return 100
33775 for MASK_REGS when MODE_SIZE > 8.
33777 2023-03-31 liuhongt <hongtao.liu@intel.com>
33780 * config/i386/i386-builtin.def (BDESC): Adjust icode name from
33781 ufloat/ufix to floatuns/fixuns.
33782 * config/i386/i386-expand.cc
33783 (ix86_expand_vector_convert_uns_vsivsf): Adjust comments.
33784 * config/i386/sse.md
33785 (ufloat<sseintvecmodelower><mode>2<mask_name><round_name>):
33787 (<mask_codefor>floatuns<sseintvecmodelower><mode>2<mask_name><round_name>):.. this.
33788 (<mask_codefor><avx512>_ufix_notrunc<sf2simodelower><mode><mask_name><round_name>):
33790 (<mask_codefor><avx512>_fixuns_notrunc<sf2simodelower><mode><mask_name><round_name>):
33792 (<fixsuffix>fix_truncv16sfv16si2<mask_name><round_saeonly_name>):
33794 (fix<fixunssuffix>_truncv16sfv16si2<mask_name><round_saeonly_name>):.. this.
33795 (ufloat<si2dfmodelower><mode>2<mask_name>): Renamed to ..
33796 (floatuns<si2dfmodelower><mode>2<mask_name>): .. this.
33797 (ufloatv2siv2df2<mask_name>): Renamed to ..
33798 (<mask_codefor>floatunsv2siv2df2<mask_name>): .. this.
33799 (ufix_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
33801 (fixuns_notrunc<mode><si2dfmodelower>2<mask_name><round_name>):
33803 (ufix_notruncv2dfv2si2): Renamed to ..
33804 (fixuns_notruncv2dfv2si2):.. this.
33805 (ufix_notruncv2dfv2si2_mask): Renamed to ..
33806 (fixuns_notruncv2dfv2si2_mask): .. this.
33807 (*ufix_notruncv2dfv2si2_mask_1): Renamed to ..
33808 (*fixuns_notruncv2dfv2si2_mask_1): .. this.
33809 (ufix_truncv2dfv2si2): Renamed to ..
33810 (*fixuns_truncv2dfv2si2): .. this.
33811 (ufix_truncv2dfv2si2_mask): Renamed to ..
33812 (fixuns_truncv2dfv2si2_mask): .. this.
33813 (*ufix_truncv2dfv2si2_mask_1): Renamed to ..
33814 (*fixuns_truncv2dfv2si2_mask_1): .. this.
33815 (ufix_truncv4dfv4si2<mask_name>): Renamed to ..
33816 (fixuns_truncv4dfv4si2<mask_name>): .. this.
33817 (ufix_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
33819 (fixuns_notrunc<mode><sseintvecmodelower>2<mask_name><round_name>):
33821 (ufix_trunc<mode><sseintvecmodelower>2<mask_name>): Renamed to ..
33822 (<mask_codefor>fixuns_trunc<mode><sseintvecmodelower>2<mask_name>):
33825 2023-03-30 Andrew MacLeod <amacleod@redhat.com>
33827 PR tree-optimization/109154
33828 * gimple-range-gori.cc (gori_compute::may_recompute_p): Add depth limit.
33829 * gimple-range-gori.h (may_recompute_p): Add depth param.
33830 * params.opt (ranger-recompute-depth): New param.
33832 2023-03-30 Jason Merrill <jason@redhat.com>
33836 * cgraph.h: Move reset() from cgraph_node to symtab_node.
33837 * cgraphunit.cc (symtab_node::reset): Adjust. Also call
33838 remove_from_same_comdat_group.
33840 2023-03-30 Richard Biener <rguenther@suse.de>
33842 PR tree-optimization/107561
33843 * gimple-ssa-warn-access.cc (get_size_range): Add flags
33844 argument and pass it on.
33845 (check_access): When querying for the size range pass
33846 SR_ALLOW_ZERO when the known destination size is zero.
33848 2023-03-30 Richard Biener <rguenther@suse.de>
33850 PR tree-optimization/109342
33851 * tree-ssa-sccvn.cc (vn_nary_op_get_predicated_value): New
33852 overload for edge. When that edge is a backedge use
33853 dominated_by_p directly.
33855 2023-03-30 liuhongt <hongtao.liu@intel.com>
33857 * config/i386/i386-expand.cc (expand_vec_perm_blend): Generate
33858 vpblendd instead of vpblendw for V4SI under avx2.
33860 2023-03-29 Hans-Peter Nilsson <hp@axis.com>
33862 * config/cris/cris.cc (cris_rtx_costs) [CONST_INT]: Return 0
33863 for many quick operands, for register-sized modes.
33865 2023-03-29 Jiawei <jiawei@iscas.ac.cn>
33867 * common/config/riscv/riscv-common.cc (riscv_subset_list::parse):
33870 2023-03-29 Martin Liska <mliska@suse.cz>
33872 PR bootstrap/109310
33873 * configure.ac: Emit a warning for deprecated option
33874 --enable-link-mutex.
33875 * configure: Regenerate.
33877 2023-03-29 Richard Biener <rguenther@suse.de>
33879 PR tree-optimization/109331
33880 * tree-ssa-forwprop.cc (pass_forwprop::execute): When we
33881 discover a taken edge make sure to cleanup the CFG.
33883 2023-03-29 Richard Biener <rguenther@suse.de>
33885 PR tree-optimization/109327
33886 * tree-ssa-forwprop.cc (pass_forwprop::execute): Deal with
33887 already removed stmts when draining to_remove.
33889 2023-03-29 Richard Biener <rguenther@suse.de>
33892 * dwarf2out.cc (lookup_type_die): Reset TREE_ASM_WRITTEN
33893 so we can re-create the DIE for the type if required.
33895 2023-03-29 Jakub Jelinek <jakub@redhat.com>
33896 Richard Biener <rguenther@suse.de>
33898 PR tree-optimization/109301
33899 * tree-ssa-math-opts.cc (pass_data_cse_sincos): Change
33900 properties_provided from PROP_gimple_opt_math to 0.
33901 (pass_data_expand_powcabs): Change properties_provided from 0 to
33902 PROP_gimple_opt_math.
33904 2023-03-29 Richard Biener <rguenther@suse.de>
33906 PR tree-optimization/109154
33907 * tree-if-conv.cc (gen_phi_arg_condition): Handle single
33908 inverted condition specially by inverting at the caller.
33909 (gen_phi_arg_condition): Swap COND_EXPR arms if requested.
33911 2023-03-28 David Malcolm <dmalcolm@redhat.com>
33914 * diagnostic-show-locus.cc (column_range::column_range): Factor
33915 out assertion conditional into...
33916 (column_range::valid_p): ...this new function.
33917 (line_corrections::add_hint): Don't attempt to consolidate hints
33918 if it would lead to invalid column_range instances.
33920 2023-03-28 Kito Cheng <kito.cheng@sifive.com>
33923 * config/riscv/riscv-c.cc (riscv_ext_version_value): New.
33924 (riscv_cpu_cpp_builtins): Define __riscv_v_intrinsic and
33927 2023-03-28 Alexander Monakov <amonakov@ispras.ru>
33929 PR rtl-optimization/109187
33930 * haifa-sched.cc (autopref_rank_for_schedule): Avoid use of overflowing
33931 subtraction in three-way comparison.
33933 2023-03-28 Andrew MacLeod <amacleod@redhat.com>
33935 PR tree-optimization/109265
33936 PR tree-optimization/109274
33937 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
33938 not create a relation record is op1 and op2 are the same symbol.
33939 (gori_compute::compute_operand1_range): Pass op1 == op2 to the
33940 handler for this stmt, but create a new record only if this statement
33941 generates a relation based on the ranges.
33942 (gori_compute::compute_operand2_range): Ditto.
33943 * value-relation.h (value_relation::set_relation): Always create the
33944 record that is requested.
33946 2023-03-28 Richard Biener <rguenther@suse.de>
33948 PR tree-optimization/107087
33949 * tree-ssa-forwprop.cc (pass_forwprop::execute): Track
33950 executable regions to avoid useless work and to better
33951 propagate degenerate PHIs.
33953 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
33955 * config/i386/x-mingw32-utf8: update comments.
33957 2023-03-28 Richard Sandiford <richard.sandiford@arm.com>
33960 * config/aarch64/aarch64-protos.h (aarch64_vector_load_decl): Declare.
33961 * config/aarch64/aarch64.h (machine_function::vector_load_decls): New
33963 * config/aarch64/aarch64-builtins.cc (aarch64_record_vector_load_arg):
33965 (aarch64_general_gimple_fold_builtin): Delay folding of vld1 until
33966 after inlining. Record which decls are loaded from. Fix handling
33967 of vops for loads and stores.
33968 * config/aarch64/aarch64.cc (aarch64_vector_load_decl): New function.
33969 (aarch64_accesses_vector_load_decl_p): Likewise.
33970 (aarch64_vector_costs::m_stores_to_vector_load_decl): New member
33972 (aarch64_vector_costs::add_stmt_cost): If the function has a vld1
33973 that loads from a decl, treat vector stores to those decls as
33975 (aarch64_vector_costs::finish_cost): ...and in that case,
33976 if the vector code does nothing more than a store, give the
33977 prologue a zero cost as well.
33979 2023-03-28 Richard Biener <rguenther@suse.de>
33982 PR tree-optimization/108129
33983 * genmatch.cc (lower_for): For (match ...) delay
33984 substituting into the match operator if possible.
33985 (dt_operand::gen_gimple_expr): For user_id look at the
33986 first substitute for determining how to access operands.
33987 (dt_operand::gen_generic_expr): Likewise.
33988 (dt_node::gen_kids): Properly sort user_ids according
33989 to their substitutes.
33990 (dt_node::gen_kids_1): Code-generate user_id matching.
33992 2023-03-28 Jakub Jelinek <jakub@redhat.com>
33993 Jonathan Wakely <jwakely@redhat.com>
33995 * gcov-tool.cc (do_merge, do_merge_stream, do_rewrite, do_overlap):
33996 Use subcommand rather than sub-command in function comments.
33998 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34000 PR tree-optimization/109154
34001 * value-range.h (frange::flush_denormals_to_zero): Make it public
34002 rather than private.
34003 * value-range.cc (frange::set): Don't call flush_denormals_to_zero
34005 * range-op-float.cc (range_operator_float::fold_range): Call
34006 flush_denormals_to_zero.
34008 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34010 PR middle-end/106190
34011 * sanopt.cc (pass_sanopt::execute): Return TODO_cleanup_cfg if any
34012 of the IFN_{UB,HWA,A}SAN_* internal fns are lowered.
34014 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34016 * range-op-float.cc (float_widen_lhs_range): Use pass get_nan_state
34017 as 4th argument to set to avoid clear_nan and union_ calls.
34019 2023-03-28 Jakub Jelinek <jakub@redhat.com>
34022 * config/i386/i386.cc (assign_386_stack_local): For DImode
34023 with SLOT_FLOATxFDI_387 and -m32 -mpreferred-stack-boundary=2 pass
34024 align 32 rather than 0 to assign_stack_local.
34026 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
34029 * config/sparc/sparc.cc (sparc_expand_vcond): Call signed_condition
34030 on operand #3 to get the final condition code. Use std::swap.
34031 * config/sparc/sparc.md (vcondv8qiv8qi): New VIS 4 expander.
34032 (fucmp<gcond:code>8<P:mode>_vis): Move around.
34033 (fpcmpu<gcond:code><GCM:gcm_name><P:mode>_vis): Likewise.
34034 (vcondu<GCM:mode><GCM:mode>): New VIS 4 expander.
34036 2023-03-28 Eric Botcazou <ebotcazou@adacore.com>
34038 * doc/gm2.texi: Add missing Next, Previous and Top fields to most
34039 top-level sections.
34041 2023-03-28 Costas Argyris <costas.argyris@gmail.com>
34043 * config.host: Pull in i386/x-mingw32-utf8 Makefile
34044 fragment and reference utf8rc-mingw32.o explicitly
34046 * config/i386/sym-mingw32.cc: prevent name mangling of
34048 * config/i386/x-mingw32-utf8: Make utf8rc-mingw32.o
34049 depend on manifest file explicitly.
34051 2023-03-28 Richard Biener <rguenther@suse.de>
34054 2023-03-27 Richard Biener <rguenther@suse.de>
34056 PR rtl-optimization/109237
34057 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
34059 2023-03-28 Richard Biener <rguenther@suse.de>
34061 * common.opt (gdwarf): Remove Negative(gdwarf-).
34063 2023-03-28 Richard Biener <rguenther@suse.de>
34065 * common.opt (gdwarf): Add RejectNegative.
34066 (gdwarf-): Likewise.
34070 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34072 * config/cris/constraints.md ("T"): Correct to
34073 define_memory_constraint.
34075 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34077 * config/cris/cris.md (BW2): New mode-iterator.
34078 (lra_szext_decomposed, lra_szext_decomposed_indirect_with_offset): New
34081 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34083 * config/cris/cris.md ("*add<mode>3_addi"): Improve to bail only
34084 for possible eliminable compares.
34086 2023-03-28 Hans-Peter Nilsson <hp@axis.com>
34088 * config/cris/constraints.md ("R"): Remove unused constraint.
34090 2023-03-27 Jonathan Wakely <jwakely@redhat.com>
34092 PR gcov-profile/109297
34093 * gcov-tool.cc (merge_usage): Fix "subcomand" typo.
34094 (merge_stream_usage): Likewise.
34095 (overlap_usage): Likewise.
34097 2023-03-27 Christoph Müllner <christoph.muellner@vrull.eu>
34100 * config/riscv/thead.md: Add missing mode specifiers.
34102 2023-03-27 Philipp Tomsich <philipp.tomsich@vrull.eu>
34103 Jiangning Liu <jiangning.liu@amperecomputing.com>
34104 Manolis Tsamis <manolis.tsamis@vrull.eu>
34106 * config/aarch64/aarch64.cc: Update vector costs for ampere1.
34108 2023-03-27 Richard Biener <rguenther@suse.de>
34110 PR rtl-optimization/109237
34111 * cfgcleanup.cc (bb_is_just_return): Walk insns backwards.
34113 2023-03-27 Richard Biener <rguenther@suse.de>
34116 * lto-wrapper.cc (run_gcc): Parse alternate debug options
34117 as well, they always enable debug.
34119 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
34122 * config/rs6000/emmintrin.h (_mm_bslli_si128): Move the implementation
34124 (_mm_slli_si128): ... here. Change to call _mm_bslli_si128 directly.
34126 2023-03-27 Kewen Lin <linkw@linux.ibm.com>
34129 * config/rs6000/emmintrin.h (_mm_bslli_si128): Check __N is not less
34130 than zero when calling vec_sld.
34131 (_mm_bsrli_si128): Return __A if __N is zero, check __N is bigger than
34132 zero when calling vec_sld.
34133 (_mm_slli_si128): Return __A if _imm5 is zero, check _imm5 is bigger
34134 than zero when calling vec_sld.
34136 2023-03-27 Sandra Loosemore <sandra@codesourcery.com>
34138 * doc/generic.texi (OpenMP): Document OMP_SIMD, OMP_DISTRIBUTE,
34139 OMP_TASKLOOP, and OMP_LOOP with OMP_FOR. Document how collapsed
34140 loops are represented and which fields are vectors. Add
34141 documentation for OMP_FOR_PRE_BODY field. Document internal
34142 form of non-rectangular loops and OMP_FOR_NON_RECTANGULAR.
34143 * tree.def (OMP_FOR): Make documentation consistent with the
34144 Texinfo manual, to fill some gaps and correct errors.
34146 2023-03-26 Andreas Schwab <schwab@linux-m68k.org>
34149 * config/m68k/m68k.h (FINAL_PRESCAN_INSN): Define.
34150 * config/m68k/m68k.cc (m68k_final_prescan_insn): Define.
34151 (handle_move_double): Call it before handle_movsi.
34152 * config/m68k/m68k-protos.h: Declare it.
34154 2023-03-26 Jakub Jelinek <jakub@redhat.com>
34156 PR tree-optimization/109230
34157 * match.pd (fneg/fadd simplify): Verify also odd permutation indexes.
34159 2023-03-26 Jakub Jelinek <jakub@redhat.com>
34162 * predict.cc (compute_function_frequency): Don't call
34163 warn_function_cold if function already has cold attribute.
34165 2023-03-26 Gerald Pfeifer <gerald@pfeifer.com>
34167 * doc/install.texi: Remove anachronistic note
34168 related to languages built and separate source tarballs.
34170 2023-03-25 David Malcolm <dmalcolm@redhat.com>
34173 * diagnostic-format-sarif.cc (read_until_eof): Delete.
34174 (maybe_read_file): Delete.
34175 (sarif_builder::maybe_make_artifact_content_object): Use
34176 get_source_file_content rather than maybe_read_file.
34177 Reject it if it's not valid UTF-8.
34178 * input.cc (file_cache_slot::get_full_file_content): New.
34179 (get_source_file_content): New.
34180 (selftest::check_cpp_valid_utf8_p): New.
34181 (selftest::test_cpp_valid_utf8_p): New.
34182 (selftest::input_cc_tests): Call selftest::test_cpp_valid_utf8_p.
34183 * input.h (get_source_file_content): New prototype.
34185 2023-03-24 David Malcolm <dmalcolm@redhat.com>
34187 * doc/analyzer.texi (Debugging the Analyzer): Add notes on useful
34189 (Special Functions for Debugging the Analyzer): Convert to a
34190 table, and rewrite in places.
34191 (Other Debugging Techniques): Add notes on how to compare two
34192 different exploded graphs.
34194 2023-03-24 David Malcolm <dmalcolm@redhat.com>
34197 * json.cc: Update comments to indicate that we now preserve
34198 insertion order of keys within objects.
34199 (object::print): Traverse keys in insertion order.
34200 (object::set): Preserve insertion order of keys.
34201 (selftest::test_writing_objects): Add an additional key to verify
34202 that we preserve insertion order.
34203 * json.h (object::m_keys): New field.
34205 2023-03-24 Andrew MacLeod <amacleod@redhat.com>
34207 PR tree-optimization/109238
34208 * gimple-range-cache.cc (ranger_cache::resolve_dom): Ignore
34209 predecessors which this block dominates.
34211 2023-03-24 Richard Biener <rguenther@suse.de>
34213 PR tree-optimization/106912
34214 * tree-profile.cc (tree_profiling): Update stmts only when
34215 profiling or testing coverage. Make sure to update calls
34216 fntype, stripping 'const' there.
34218 2023-03-24 Jakub Jelinek <jakub@redhat.com>
34220 PR middle-end/109258
34221 * builtins.cc (inline_expand_builtin_bytecmp): Return NULL_RTX early
34222 if target == const0_rtx.
34224 2023-03-24 Alexandre Oliva <oliva@adacore.com>
34226 * doc/sourcebuild.texi (weak_undefined, posix_memalign):
34227 Document options and effective targets.
34229 2023-03-24 Costas Argyris <costas.argyris@gmail.com>
34231 * config/i386/x-mingw32-utf8: Make HOST_EXTRA_OBJS_SYMBOL
34234 2023-03-23 Pat Haugen <pthaugen@linux.ibm.com>
34236 * config/rs6000/rs6000.md (*mod<mode>3, umod<mode>3): Add
34237 non-earlyclobber alternative.
34239 2023-03-23 Andrew Pinski <apinski@marvell.com>
34242 * fold-const.cc (maybe_lvalue_p): Treat COMPOUND_LITERAL_EXPR
34245 2023-03-23 Richard Biener <rguenther@suse.de>
34247 PR tree-optimization/107569
34248 * tree-ssa-sccvn.cc (eliminate_dom_walker::eliminate_stmt):
34249 Do not push SSA names with zero uses as available leader.
34250 (process_bb): Likewise.
34252 2023-03-23 Richard Biener <rguenther@suse.de>
34254 PR tree-optimization/109262
34255 * tree-ssa-forwprop.cc (pass_forwprop::execute): When
34256 combining a piecewise complex load avoid touching loads
34257 that throw internally. Use fun, not cfun throughout.
34259 2023-03-23 Jakub Jelinek <jakub@redhat.com>
34261 * value-range.cc (irange::irange_union, irange::intersect): Fix
34262 comment spelling bugs.
34263 * gimple-range-trace.cc (range_tracer::do_header): Likewise.
34264 * gimple-range-trace.h: Likewise.
34265 * gimple-range-edge.cc: Likewise.
34266 (gimple_outgoing_range_stmt_p,
34267 gimple_outgoing_range::switch_edge_range,
34268 gimple_outgoing_range::edge_range_p): Likewise.
34269 * gimple-range.cc (gimple_ranger::prefill_stmt_dependencies,
34270 gimple_ranger::fold_stmt, gimple_ranger::register_transitive_infer,
34271 assume_query::assume_query, assume_query::calculate_phi): Likewise.
34272 * gimple-range-edge.h: Likewise.
34273 * value-range.h (Value_Range::set, Value_Range::lower_bound,
34274 Value_Range::upper_bound, frange::set_undefined): Likewise.
34275 * gimple-range-gori.h (range_def_chain::depend, gori_map::m_outgoing,
34276 gori_compute): Likewise.
34277 * gimple-range-fold.h (fold_using_range): Likewise.
34278 * gimple-range-path.cc (path_range_query::compute_ranges_in_phis):
34280 * gimple-range-gori.cc (range_def_chain::in_chain_p,
34281 range_def_chain::dump, gori_map::calculate_gori,
34282 gori_compute::compute_operand_range_switch,
34283 gori_compute::logical_combine, gori_compute::refine_using_relation,
34284 gori_compute::compute_operand1_range, gori_compute::may_recompute_p):
34286 * gimple-range.h: Likewise.
34287 (enable_ranger): Likewise.
34288 * range-op.h (empty_range_varying): Likewise.
34289 * value-query.h (value_query): Likewise.
34290 * gimple-range-cache.cc (block_range_cache::set_bb_range,
34291 block_range_cache::dump, ssa_global_cache::clear_global_range,
34292 temporal_cache::temporal_value, temporal_cache::current_p,
34293 ranger_cache::range_of_def, ranger_cache::propagate_updated_value,
34294 ranger_cache::range_from_dom, ranger_cache::register_inferred_value):
34296 * gimple-range-fold.cc (fur_edge::get_phi_operand,
34297 fur_stmt::get_operand, gimple_range_adjustment,
34298 fold_using_range::range_of_phi,
34299 fold_using_range::relation_fold_and_or): Likewise.
34300 * value-range-storage.h (irange_storage_slot::MAX_INTS): Likewise.
34301 * value-query.cc (range_query::value_of_expr,
34302 range_query::value_on_edge, range_query::query_relation): Likewise.
34303 * tree-vrp.cc (remove_unreachable::remove_and_update_globals,
34304 intersect_range_with_nonzero_bits): Likewise.
34305 * gimple-range-infer.cc (gimple_infer_range::check_assume_func,
34306 exit_range): Likewise.
34307 * value-relation.h: Likewise.
34308 (equiv_oracle, relation_trio::relation_trio, value_relation,
34309 value_relation::value_relation, pe_min): Likewise.
34310 * range-op-float.cc (range_operator_float::rv_fold,
34311 frange_arithmetic, foperator_unordered_equal::op1_range,
34312 foperator_div::rv_fold): Likewise.
34313 * gimple-range-op.cc (cfn_clz::fold_range): Likewise.
34314 * value-relation.cc (equiv_oracle::query_relation,
34315 equiv_oracle::register_equiv, equiv_oracle::add_equiv_to_block,
34316 value_relation::apply_transitive, relation_chain_head::find_relation,
34317 dom_oracle::query_relation, dom_oracle::find_relation_block,
34318 dom_oracle::find_relation_dom, path_oracle::register_equiv): Likewise.
34319 * range-op.cc (range_operator::wi_fold_in_parts_equiv,
34320 create_possibly_reversed_range, adjust_op1_for_overflow,
34321 operator_mult::wi_fold, operator_exact_divide::op1_range,
34322 operator_cast::lhs_op1_relation, operator_cast::fold_pair,
34323 operator_cast::fold_range, operator_abs::wi_fold, range_op_cast_tests,
34324 range_op_lshift_tests): Likewise.
34326 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
34328 * config/gcn/gcn.cc (gcn_class_max_nregs): Handle vectors in SGPRs.
34329 (move_callee_saved_registers): Detect the bug condition early.
34331 2023-03-23 Andrew Stubbs <ams@codesourcery.com>
34333 * config/gcn/gcn-protos.h (gcn_stepped_zero_int_parallel_p): New.
34334 * config/gcn/gcn-valu.md (V_1REG_ALT): New.
34336 (vec_extract<V_1REG:mode><V_1REG_ALT:mode>_nop): New.
34337 (vec_extract<V_2REG:mode><V_2REG_ALT:mode>_nop): New.
34338 (vec_extract<V_ALL:mode><V_ALL_ALT:mode>): Use new patterns.
34339 * config/gcn/gcn.cc (gcn_stepped_zero_int_parallel_p): New.
34340 * config/gcn/predicates.md (ascending_zero_int_parallel): New.
34342 2023-03-23 Jakub Jelinek <jakub@redhat.com>
34344 PR tree-optimization/109176
34345 * tree-vect-generic.cc (expand_vector_condition): If a has
34346 vector boolean type and is a comparison, also check if both
34347 the comparison and VEC_COND_EXPR could be successfully expanded
34350 2023-03-23 Pan Li <pan2.li@intel.com>
34351 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34355 * config/riscv/riscv-modes.def (ADJUST_BYTESIZE): Adjust size
34356 for vector mask modes.
34357 * config/riscv/riscv.cc (riscv_v_adjust_bytesize): New.
34358 * config/riscv/riscv.h (riscv_v_adjust_bytesize): New.
34360 2023-03-23 Songhe Zhu <zhusonghe@eswincomputing.com>
34362 * config/riscv/multilib-generator: Adjusting the loop of 'alt' in 'alts'.
34364 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34367 * config/riscv/riscv-protos.h (emit_vlmax_vsetvl): Define as global.
34368 (emit_vlmax_op): Ditto.
34369 * config/riscv/riscv-v.cc (get_sew): New function.
34370 (emit_vlmax_vsetvl): Adapt function.
34371 (emit_pred_op): Ditto.
34372 (emit_vlmax_op): Ditto.
34373 (emit_nonvlmax_op): Ditto.
34374 (legitimize_move): Fix LRA ICE.
34375 (gen_no_side_effects_vsetvl_rtx): Adapt function.
34376 * config/riscv/vector.md (@mov<V_FRACT:mode><P:mode>_lra): New pattern.
34377 (@mov<VB:mode><P:mode>_lra): Ditto.
34378 (*mov<V_FRACT:mode><P:mode>_lra): Ditto.
34379 (*mov<VB:mode><P:mode>_lra): Ditto.
34381 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34384 * config/riscv/riscv-vector-builtins-bases.cc (class vlenb): Add
34385 __riscv_vlenb support.
34387 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
34388 * config/riscv/riscv-vector-builtins-functions.def (vlenb): Ditto.
34389 * config/riscv/riscv-vector-builtins-shapes.cc (struct vlenb_def): Ditto.
34391 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
34392 * config/riscv/riscv-vector-builtins.cc: Ditto.
34394 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34395 kito-cheng <kito.cheng@sifive.com>
34397 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bugs.
34398 (pass_vsetvl::compute_local_backward_infos): Fix bugs.
34399 (pass_vsetvl::need_vsetvl): Fix bugs.
34400 (pass_vsetvl::backward_demand_fusion): Fix bugs.
34401 (pass_vsetvl::demand_fusion): Fix bugs.
34402 (eliminate_insn): Fix bugs.
34403 (insert_vsetvl): Ditto.
34404 (pass_vsetvl::emit_local_forward_vsetvls): Ditto.
34405 * config/riscv/riscv-vsetvl.h (enum vsetvl_type): Ditto.
34406 * config/riscv/vector.md: Ditto.
34408 2023-03-23 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34409 kito-cheng <kito.cheng@sifive.com>
34411 * config/riscv/riscv-vector-builtins-bases.cc: Fix ternary bug.
34412 * config/riscv/vector-iterators.md (nmsac): Ditto.
34418 * config/riscv/vector.md (@pred_mul_<optab><mode>): Ditto.
34419 (@pred_mul_plus<mode>): Ditto.
34420 (*pred_madd<mode>): Ditto.
34421 (*pred_macc<mode>): Ditto.
34422 (*pred_mul_plus<mode>): Ditto.
34423 (@pred_mul_plus<mode>_scalar): Ditto.
34424 (*pred_madd<mode>_scalar): Ditto.
34425 (*pred_macc<mode>_scalar): Ditto.
34426 (*pred_mul_plus<mode>_scalar): Ditto.
34427 (*pred_madd<mode>_extended_scalar): Ditto.
34428 (*pred_macc<mode>_extended_scalar): Ditto.
34429 (*pred_mul_plus<mode>_extended_scalar): Ditto.
34430 (@pred_minus_mul<mode>): Ditto.
34431 (*pred_<madd_nmsub><mode>): Ditto.
34432 (*pred_nmsub<mode>): Ditto.
34433 (*pred_<macc_nmsac><mode>): Ditto.
34434 (*pred_nmsac<mode>): Ditto.
34435 (*pred_mul_<optab><mode>): Ditto.
34436 (*pred_minus_mul<mode>): Ditto.
34437 (@pred_mul_<optab><mode>_scalar): Ditto.
34438 (@pred_minus_mul<mode>_scalar): Ditto.
34439 (*pred_<madd_nmsub><mode>_scalar): Ditto.
34440 (*pred_nmsub<mode>_scalar): Ditto.
34441 (*pred_<macc_nmsac><mode>_scalar): Ditto.
34442 (*pred_nmsac<mode>_scalar): Ditto.
34443 (*pred_mul_<optab><mode>_scalar): Ditto.
34444 (*pred_minus_mul<mode>_scalar): Ditto.
34445 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
34446 (*pred_nmsub<mode>_extended_scalar): Ditto.
34447 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
34448 (*pred_nmsac<mode>_extended_scalar): Ditto.
34449 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
34450 (*pred_minus_mul<mode>_extended_scalar): Ditto.
34451 (*pred_<madd_msub><mode>): Ditto.
34452 (*pred_<macc_msac><mode>): Ditto.
34453 (*pred_<madd_msub><mode>_scalar): Ditto.
34454 (*pred_<macc_msac><mode>_scalar): Ditto.
34455 (@pred_neg_mul_<optab><mode>): Ditto.
34456 (@pred_mul_neg_<optab><mode>): Ditto.
34457 (*pred_<nmadd_msub><mode>): Ditto.
34458 (*pred_<nmsub_nmadd><mode>): Ditto.
34459 (*pred_<nmacc_msac><mode>): Ditto.
34460 (*pred_<nmsac_nmacc><mode>): Ditto.
34461 (*pred_neg_mul_<optab><mode>): Ditto.
34462 (*pred_mul_neg_<optab><mode>): Ditto.
34463 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
34464 (@pred_mul_neg_<optab><mode>_scalar): Ditto.
34465 (*pred_<nmadd_msub><mode>_scalar): Ditto.
34466 (*pred_<nmsub_nmadd><mode>_scalar): Ditto.
34467 (*pred_<nmacc_msac><mode>_scalar): Ditto.
34468 (*pred_<nmsac_nmacc><mode>_scalar): Ditto.
34469 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
34470 (*pred_mul_neg_<optab><mode>_scalar): Ditto.
34471 (@pred_widen_neg_mul_<optab><mode>): Ditto.
34472 (@pred_widen_mul_neg_<optab><mode>): Ditto.
34473 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
34474 (@pred_widen_mul_neg_<optab><mode>_scalar): Ditto.
34476 2023-03-23 liuhongt <hongtao.liu@intel.com>
34478 * builtins.cc (builtin_memset_read_str): Replace
34479 targetm.gen_memset_scratch_rtx with gen_reg_rtx.
34480 (builtin_memset_gen_str): Ditto.
34481 * config/i386/i386-expand.cc
34482 (ix86_convert_const_wide_int_to_broadcast): Replace
34483 ix86_gen_scratch_sse_rtx with gen_reg_rtx.
34484 (ix86_expand_vector_move): Ditto.
34485 * config/i386/i386-protos.h (ix86_gen_scratch_sse_rtx):
34487 * config/i386/i386.cc (ix86_gen_scratch_sse_rtx): Removed.
34488 (TARGET_GEN_MEMSET_SCRATCH_RTX): Removed.
34489 * doc/tm.texi: Remove TARGET_GEN_MEMSET_SCRATCH_RTX.
34490 * doc/tm.texi.in: Ditto.
34491 * target.def: Ditto.
34493 2023-03-22 Vladimir N. Makarov <vmakarov@redhat.com>
34495 * lra.cc (lra): Do not repeat inheritance and live range splitting
34496 when asm error is found.
34498 2023-03-22 Andrew Jenner <andrew@codesourcery.com>
34500 * config/gcn/gcn-protos.h (gcn_expand_dpp_swap_pairs_insn)
34501 (gcn_expand_dpp_distribute_even_insn)
34502 (gcn_expand_dpp_distribute_odd_insn): Declare.
34503 * config/gcn/gcn-valu.md (@dpp_swap_pairs<mode>)
34504 (@dpp_distribute_even<mode>, @dpp_distribute_odd<mode>)
34505 (cmul<conj_op><mode>3, cml<addsub_as><mode>4, vec_addsub<mode>3)
34506 (cadd<rot><mode>3, vec_fmaddsub<mode>4, vec_fmsubadd<mode>4)
34507 (fms<mode>4<exec>, fms<mode>4_negop2<exec>, fms<mode>4)
34508 (fms<mode>4_negop2): New patterns.
34509 * config/gcn/gcn.cc (gcn_expand_dpp_swap_pairs_insn)
34510 (gcn_expand_dpp_distribute_even_insn)
34511 (gcn_expand_dpp_distribute_odd_insn): New functions.
34512 * config/gcn/gcn.md: Add entries to unspec enum.
34514 2023-03-22 Aldy Hernandez <aldyh@redhat.com>
34516 PR tree-optimization/109008
34517 * value-range.cc (frange::set): Add nan_state argument.
34518 * value-range.h (class nan_state): New.
34519 (frange::get_nan_state): New.
34521 2023-03-22 Martin Liska <mliska@suse.cz>
34523 * configure: Regenerate.
34525 2023-03-21 Joseph Myers <joseph@codesourcery.com>
34527 * stor-layout.cc (finalize_type_size): Copy TYPE_TYPELESS_STORAGE
34530 2023-03-21 Andrew MacLeod <amacleod@redhat.com>
34532 PR tree-optimization/109192
34533 * gimple-range-gori.cc (gori_compute::compute_operand_range):
34534 Terminate gori calculations if a relation is not relevant.
34535 * value-relation.h (value_relation::set_relation): Allow
34536 equality between op1 and op2 if they are the same.
34538 2023-03-21 Richard Biener <rguenther@suse.de>
34540 PR tree-optimization/109219
34541 * tree-vect-loop.cc (vectorizable_reduction): Check
34542 slp_node, not STMT_SLP_TYPE.
34543 * tree-vect-stmts.cc (vectorizable_condition): Likewise.
34544 * tree-vect-slp.cc (vect_slp_analyze_node_operations_1):
34545 Remove assertion on STMT_SLP_TYPE.
34547 2023-03-21 Jakub Jelinek <jakub@redhat.com>
34549 PR tree-optimization/109215
34550 * tree.h (enum special_array_member): Adjust comments for int_0
34552 * tree.cc (component_ref_sam_type): Clear zero_elts if memtype
34553 has zero sized element type and the array has variable number of
34554 elements or constant one or more elements.
34555 (component_ref_size): Adjust comments, formatting fix.
34557 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34559 * configure.ac: Add check for the Texinfo 6.8
34560 CONTENTS_OUTPUT_LOCATION customization variable and set it if
34562 * configure: Regenerate.
34563 * Makefile.in (MAKEINFO_TOC_INLINE_FLAG): New variable. Set by
34564 configure.ac to -c CONTENTS_OUTPUT_LOCATION=inline if
34565 CONTENTS_OUTPUT_LOCATION support is detected, empty otherwise.
34566 ($(build_htmldir)/%/index.html): Pass MAKEINFO_TOC_INLINE_FLAG.
34568 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34570 * doc/extend.texi: Associate use_hazard_barrier_return index
34571 entry with its attribute.
34572 * doc/invoke.texi: Associate -fcanon-prefix-map index entry with
34575 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34577 * doc/implement-c.texi: Remove usage of @gol.
34578 * doc/invoke.texi: Ditto.
34579 * doc/sourcebuild.texi: Ditto.
34580 * doc/include/gcc-common.texi: Remove @gol. In new Makeinfo and
34581 texinfo.tex versions, the bug it was working around appears to
34584 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34586 * doc/include/texinfo.tex: Update to 2023-01-17.19.
34588 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34590 * doc/include/gcc-common.texi: Add @defbuiltin{,x} and
34591 @enddefbuiltin for defining built-in functions.
34592 * doc/extend.texi: Apply @defbuiltin{,x} to many, but not all,
34593 places where it should be used.
34595 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34597 * doc/extend.texi (Formatted Output Function Checking): New
34598 subsection for grouping together printf et al.
34599 (Exception handling) Fix missing @ sign before copyright
34600 header, which lead to the copyright line leaking into
34601 '(gcc)Exception handling'.
34602 * doc/gcc.texi: Set document language to en_US.
34603 (@copying): Wrap front cover texts in quotations, move in manual
34606 2023-03-21 Arsen Arsenović <arsen@aarsen.me>
34608 * doc/gcc.texi: Add the Indices appendix, to make texinfo
34609 generate nice indices overview page.
34611 2023-03-21 Richard Biener <rguenther@suse.de>
34613 PR tree-optimization/109170
34614 * gimple-range-op.cc (cfn_pass_through_arg1): New.
34615 (gimple_range_op_handler::maybe_builtin_call): Handle
34616 __builtin_expect via cfn_pass_through_arg1.
34618 2023-03-20 Michael Meissner <meissner@linux.ibm.com>
34621 * config/rs6000/rs6000.cc (create_complex_muldiv): Delete.
34622 (init_float128_ieee): Delete code to switch complex multiply and divide
34624 (complex_multiply_builtin_code): New helper function.
34625 (complex_divide_builtin_code): Likewise.
34626 (rs6000_mangle_decl_assembler_name): Add support for mangling the name
34627 of complex 128-bit multiply and divide built-in functions.
34629 2023-03-20 Peter Bergner <bergner@linux.ibm.com>
34632 * config/rs6000/rs6000-builtin.cc (stv_expand_builtin): Use tmode.
34634 2023-03-19 Jonny Grant <jg@jguk.org>
34636 * doc/extend.texi (Common Function Attributes) <nonnull>:
34639 2023-03-18 Peter Bergner <bergner@linux.ibm.com>
34641 PR rtl-optimization/109179
34642 * lra-constraints.cc (combine_reload_insn): Enforce TO is not a debug
34643 insn or note. Move the tests earlier to guard lra_get_insn_recog_data.
34645 2023-03-17 Jakub Jelinek <jakub@redhat.com>
34648 * function.h (push_struct_function): Add ABSTRACT_P argument defaulted
34650 * function.cc (push_struct_function): Add ABSTRACT_P argument, pass it
34651 to allocate_struct_function instead of false.
34652 * tree-inline.cc (initialize_cfun): Don't copy DECL_ARGUMENTS
34653 nor DECL_RESULT here. Pass true as ABSTRACT_P to
34654 push_struct_function. Call targetm.target_option.relayout_function
34656 (tree_function_versioning): Formatting fix.
34658 2023-03-17 Vladimir N. Makarov <vmakarov@redhat.com>
34660 * lra-constraints.cc: Include hooks.h.
34661 (combine_reload_insn): New function.
34662 (lra_constraints): Call it.
34664 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34665 kito-cheng <kito.cheng@sifive.com>
34667 * config/riscv/riscv-v.cc (legitimize_move): Allow undef value
34668 as legitimate value.
34669 * config/riscv/riscv-vector-builtins.cc
34670 (function_expander::use_ternop_insn): Fix bugs of ternary intrinsic.
34671 (function_expander::use_widen_ternop_insn): Ditto.
34672 * config/riscv/vector.md (@vundefined<mode>): New pattern.
34673 (pred_mul_<optab><mode>_undef_merge): Remove.
34674 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
34675 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
34676 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
34677 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
34679 2023-03-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
34682 * config/riscv/riscv.md: Fix subreg bug.
34684 2023-03-17 Jakub Jelinek <jakub@redhat.com>
34686 PR middle-end/108685
34687 * omp-expand.cc (expand_omp_for_ordered_loops): Add L0_BB argument,
34688 use its loop_father rather than BODY_BB's loop_father.
34689 (expand_omp_for_generic): Adjust expand_omp_for_ordered_loops caller.
34690 If broken_loop with ordered > collapse and at least one of those
34691 extra loops aren't guaranteed to have at least one iteration, change
34692 l0_bb's loop_father to entry_bb's loop_father. Set cont_bb's
34693 loop_father to l0_bb's loop_father rather than l1_bb's.
34695 2023-03-17 Jakub Jelinek <jakub@redhat.com>
34698 * gdbhooks.py (TreePrinter.to_string): Wrap
34699 gdb.parse_and_eval('tree_code_type') in a try block, parse
34700 and eval 'tree_code_type_tmpl<0>::tree_code_type' instead if it
34701 raises exception. Update comments for the recent tree_code_type
34704 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
34706 * doc/extend.texi (BPF Built-in Functions): Fix numerous markup
34707 issues. Add more line breaks to example so it doesn't overflow
34710 2023-03-17 Sandra Loosemore <sandra@codesourcery.com>
34712 * doc/extend.texi (Common Function Attributes) <access>: Fix bad
34713 line breaks in examples.
34714 <malloc>: Fix bad line breaks in running text, also copy-edit
34716 (Extended Asm) <Generic Operand Modifiers>: Fix @multitable width.
34717 * doc/invoke.texi (Option Summary) <Developer Options>: Fix misplaced
34719 (C++ Dialect Options) <-fcontracts>: Add line break in example.
34720 <-Wctad-maybe-unsupported>: Likewise.
34721 <-Winvalid-constexpr>: Likewise.
34722 (Warning Options) <-Wdangling-pointer>: Likewise.
34723 <-Winterference-size>: Likewise.
34724 <-Wvla-parameter>: Likewise.
34725 (Static Analyzer Options): Fix bad line breaks in running text,
34726 plus add some missing markup.
34727 (Optimize Options) <openacc-privatization>: Fix more bad line
34728 breaks in running text.
34730 2023-03-16 Uros Bizjak <ubizjak@gmail.com>
34732 * config/i386/i386-expand.cc (expand_vec_perm_pblendv):
34733 Handle 8-byte modes only with TARGET_MMX_WITH_SSE.
34734 (expand_vec_perm_2perm_pblendv): Ditto.
34736 2023-03-16 Martin Liska <mliska@suse.cz>
34738 PR middle-end/106133
34739 * gcc.cc (driver_handle_option): Use x_main_input_basename
34740 if x_dump_base_name is null.
34741 * opts.cc (common_handle_option): Likewise.
34743 2023-03-16 Richard Biener <rguenther@suse.de>
34745 PR tree-optimization/109123
34746 * gimple-ssa-warn-access.cc (pass_waccess::warn_invalid_pointer):
34747 Do not emit -Wuse-after-free late.
34748 (pass_waccess::check_call): Always check call pointer uses.
34750 2023-03-16 Richard Biener <rguenther@suse.de>
34752 PR tree-optimization/109141
34753 * tree-dfa.h (renumber_gimple_stmt_uids_in_block): New.
34754 * tree-dfa.cc (renumber_gimple_stmt_uids_in_block): Split
34756 (renumber_gimple_stmt_uids): ... here and
34757 (renumber_gimple_stmt_uids_in_blocks): ... here.
34758 * gimple-ssa-warn-access.cc (pass_waccess::use_after_inval_p):
34759 Use renumber_gimple_stmt_uids_in_block to also assign UIDs
34761 (pass_waccess::check_pointer_uses): Process all PHIs.
34763 2023-03-15 David Malcolm <dmalcolm@redhat.com>
34766 * diagnostic-format-sarif.cc (class sarif_invocation): New.
34767 (class sarif_ice_notification): New.
34768 (sarif_builder::m_invocation_obj): New field.
34769 (sarif_invocation::add_notification_for_ice): New.
34770 (sarif_invocation::prepare_to_flush): New.
34771 (sarif_ice_notification::sarif_ice_notification): New.
34772 (sarif_builder::sarif_builder): Add m_invocation_obj.
34773 (sarif_builder::end_diagnostic): Special-case DK_ICE and
34775 (sarif_builder::flush_to_file): Call prepare_to_flush on
34776 m_invocation_obj. Pass the latter to make_top_level_object.
34777 (sarif_builder::make_result_object): Move creation of "locations"
34779 (sarif_builder::make_locations_arr): ...this new function.
34780 (sarif_builder::make_top_level_object): Add "invocation_obj" param
34781 and pass it to make_run_object.
34782 (sarif_builder::make_run_object): Add "invocation_obj" param and
34784 (sarif_ice_handler): New callback.
34785 (diagnostic_output_format_init_sarif): Wire up sarif_ice_handler.
34786 * diagnostic.cc (diagnostic_initialize): Initialize new field
34788 (diagnostic_action_after_output): If it is set, make one attempt
34789 to call ice_handler_cb.
34790 * diagnostic.h (diagnostic_context::ice_handler_cb): New field.
34792 2023-03-15 Uros Bizjak <ubizjak@gmail.com>
34794 * config/i386/i386-expand.cc (expand_vec_perm_blend):
34795 Handle 8-byte modes only with TARGET_MMX_WITH_SSE. Handle V2SFmode
34796 and fix V2HImode handling.
34797 (expand_vec_perm_1): Try to emit BLEND instruction
34798 before MOVSS/MOVSD.
34799 * config/i386/mmx.md (*mmx_blendps): New insn pattern.
34801 2023-03-15 Tobias Burnus <tobias@codesourcery.com>
34803 * omp-low.cc (omp_runtime_api_call): Add omp_in_explicit_task.
34805 2023-03-15 Richard Biener <rguenther@suse.de>
34807 * gimple-ssa-warn-access.cc (pass_waccess::check_pointer_uses):
34808 Do not diagnose clobbers.
34810 2023-03-15 Richard Biener <rguenther@suse.de>
34812 PR tree-optimization/109139
34813 * tree-ssa-live.cc (remove_unused_locals): Look at the
34814 base address for unused decls on the LHS of .DEFERRED_INIT.
34816 2023-03-15 Xi Ruoyao <xry111@xry111.site>
34819 * builtins.cc (inline_string_cmp): Force the character
34820 difference into "result" pseudo-register, instead of reassign
34821 the pseudo-register.
34823 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34825 * config.gcc: Add thead.o to RISC-V extra_objs.
34826 * config/riscv/peephole.md: Add mempair peephole passes.
34827 * config/riscv/riscv-protos.h (riscv_split_64bit_move_p): New
34829 (th_mempair_operands_p): Likewise.
34830 (th_mempair_order_operands): Likewise.
34831 (th_mempair_prepare_save_restore_operands): Likewise.
34832 (th_mempair_save_restore_regs): Likewise.
34833 (th_mempair_output_move): Likewise.
34834 * config/riscv/riscv.cc (riscv_save_reg): Move code.
34835 (riscv_restore_reg): Move code.
34836 (riscv_for_each_saved_reg): Add code to emit mempair insns.
34837 * config/riscv/t-riscv: Add thead.cc.
34838 * config/riscv/thead.md (*th_mempair_load_<GPR:mode>2):
34840 (*th_mempair_store_<GPR:mode>2): Likewise.
34841 (*th_mempair_load_extendsidi2): Likewise.
34842 (*th_mempair_load_zero_extendsidi2): Likewise.
34843 * config/riscv/thead.cc: New file.
34845 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34847 * config/riscv/constraints.md (TARGET_XTHEADFMV ? FP_REGS : NO_REGS)
34848 New constraint "th_f_fmv".
34849 (TARGET_XTHEADFMV ? GR_REGS : NO_REGS): New constraint
34851 * config/riscv/riscv.cc (riscv_split_doubleword_move):
34852 Add split code for XTheadFmv.
34853 (riscv_secondary_memory_needed): XTheadFmv does not need
34855 * config/riscv/riscv.md: Add new UNSPEC_XTHEADFMV and
34856 UNSPEC_XTHEADFMV_HW. Add support for XTheadFmv to
34857 movdf_hardfloat_rv32.
34858 * config/riscv/thead.md (th_fmv_hw_w_x): New INSN.
34859 (th_fmv_x_w): New INSN.
34860 (th_fmv_x_hw): New INSN.
34862 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34864 * config/riscv/riscv.md (maddhisi4): New expand.
34865 (msubhisi4): New expand.
34866 * config/riscv/thead.md (*th_mula<mode>): New pattern.
34867 (*th_mulawsi): New pattern.
34868 (*th_mulawsi2): New pattern.
34869 (*th_maddhisi4): New pattern.
34870 (*th_sextw_maddhisi4): New pattern.
34871 (*th_muls<mode>): New pattern.
34872 (*th_mulswsi): New pattern.
34873 (*th_mulswsi2): New pattern.
34874 (*th_msubhisi4): New pattern.
34875 (*th_sextw_msubhisi4): New pattern.
34877 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34879 * config/riscv/iterators.md (TARGET_64BIT): Add GPR2 iterator.
34880 * config/riscv/riscv-protos.h (riscv_expand_conditional_move):
34882 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for
34884 (riscv_expand_conditional_move): New function.
34885 (riscv_expand_conditional_move_onesided): New function.
34886 * config/riscv/riscv.md: Add support for XTheadCondMov.
34887 * config/riscv/thead.md (*th_cond_mov<GPR:mode><GPR2:mode>): Add
34888 support for XTheadCondMov.
34889 (*th_cond_gpr_mov<GPR:mode><GPR2:mode>): Likewise.
34891 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34893 * config/riscv/bitmanip.md (clzdi2): New expand.
34894 (clzsi2): New expand.
34895 (ctz<mode>2): New expand.
34896 (popcount<mode>2): New expand.
34897 (<bitmanip_optab>si2): Rename INSN.
34898 (*<bitmanip_optab>si2): Hide INSN name.
34899 (<bitmanip_optab>di2): Rename INSN.
34900 (*<bitmanip_optab>di2): Hide INSN name.
34901 (rotrsi3): Remove INSN.
34902 (rotr<mode>3): Add expand.
34903 (*rotrsi3): New INSN.
34904 (rotrdi3): Rename INSN.
34905 (*rotrdi3): Hide INSN name.
34906 (rotrsi3_sext): Rename INSN.
34907 (*rotrsi3_sext): Hide INSN name.
34908 (bswap<mode>2): Remove INSN.
34909 (bswapdi2): Add expand.
34910 (bswapsi2): Add expand.
34911 (*bswap<mode>2): Hide INSN name.
34912 * config/riscv/riscv.cc (riscv_rtx_costs): Add costs for sign
34914 * config/riscv/riscv.md (extv<mode>): New expand.
34915 (extzv<mode>): New expand.
34916 * config/riscv/thead.md (*th_srri<mode>3): New INSN.
34917 (*th_ext<mode>): New INSN.
34918 (*th_extu<mode>): New INSN.
34919 (*th_clz<mode>2): New INSN.
34920 (*th_rev<mode>2): New INSN.
34922 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34924 * config/riscv/riscv.cc (riscv_rtx_costs): Add xthead:tst cost.
34925 * config/riscv/thead.md (*th_tst<mode>3): New INSN.
34927 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34929 * config/riscv/riscv.md: Include thead.md
34930 * config/riscv/thead.md: New file.
34932 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34934 * config/riscv/riscv-cores.def (RISCV_CORE): Add "thead-c906".
34936 2023-03-15 Christoph Müllner <christoph.muellner@vrull.eu>
34938 * common/config/riscv/riscv-common.cc: Add xthead* extensions.
34939 * config/riscv/riscv-opts.h (MASK_XTHEADBA): New.
34940 (MASK_XTHEADBB): New.
34941 (MASK_XTHEADBS): New.
34942 (MASK_XTHEADCMO): New.
34943 (MASK_XTHEADCONDMOV): New.
34944 (MASK_XTHEADFMEMIDX): New.
34945 (MASK_XTHEADFMV): New.
34946 (MASK_XTHEADINT): New.
34947 (MASK_XTHEADMAC): New.
34948 (MASK_XTHEADMEMIDX): New.
34949 (MASK_XTHEADMEMPAIR): New.
34950 (MASK_XTHEADSYNC): New.
34951 (TARGET_XTHEADBA): New.
34952 (TARGET_XTHEADBB): New.
34953 (TARGET_XTHEADBS): New.
34954 (TARGET_XTHEADCMO): New.
34955 (TARGET_XTHEADCONDMOV): New.
34956 (TARGET_XTHEADFMEMIDX): New.
34957 (TARGET_XTHEADFMV): New.
34958 (TARGET_XTHEADINT): New.
34959 (TARGET_XTHEADMAC): New.
34960 (TARGET_XTHEADMEMIDX): New.
34961 (TARGET_XTHEADMEMPAIR): new.
34962 (TARGET_XTHEADSYNC): New.
34963 * config/riscv/riscv.opt: Add riscv_xthead_subext.
34965 2023-03-15 Hu, Lin1 <lin1.hu@intel.com>
34968 * config/i386/i386-builtin.def (__builtin_ia32_vaesdec_v16qi,
34969 __builtin_ia32_vaesdeclast_v16qi,__builtin_ia32_vaesenc_v16qi,
34970 __builtin_ia32_vaesenclast_v16qi): Require OPTION_MASK_ISA_AVX512VL.
34972 2023-03-14 Jakub Jelinek <jakub@redhat.com>
34975 * config/i386/i386-expand.cc (split_double_concat): Fix splitting
34976 when lo is equal to dhi and hi is a MEM which uses dlo register.
34978 2023-03-14 Martin Jambor <mjambor@suse.cz>
34981 * ipa-cp.cc (update_profiling_info): Drop counts of orig_node to
34982 global0 instead of zeroing when it does not have as many counts as
34985 2023-03-14 Martin Jambor <mjambor@suse.cz>
34988 * ipa-cp.cc (update_specialized_profile): Drop orig_node_count to
34989 ipa count, remove assert, lenient_count_portion_handling, dump
34990 also orig_node_count.
34992 2023-03-14 Uros Bizjak <ubizjak@gmail.com>
34994 * config/i386/i386-expand.cc (expand_vec_perm_movs):
34995 Handle V2SImode for TARGET_MMX_WITH_SSE.
34996 * config/i386/mmx.md (*mmx_movss_<mode>): Rename from *mmx_movss
34997 using V2FI mode iterator to handle both V2SI and V2SF modes.
34999 2023-03-14 Sam James <sam@gentoo.org>
35001 * config/riscv/genrvv-type-indexer.cc: Avoid calloc() poisoning on musl by
35002 including <sstream> earlier.
35003 * system.h: Add INCLUDE_SSTREAM.
35005 2023-03-14 Richard Biener <rguenther@suse.de>
35007 * tree-ssa-live.cc (remove_unused_locals): Do not treat
35008 the .DEFERRED_INIT of a variable as use, instead remove
35009 that if it is the only use.
35011 2023-03-14 Eric Botcazou <ebotcazou@adacore.com>
35013 PR rtl-optimization/107762
35014 * expr.cc (emit_group_store): Revert latest change.
35016 2023-03-14 Andre Vieira <andre.simoesdiasvieira@arm.com>
35018 PR tree-optimization/109005
35019 * tree-if-conv.cc (get_bitfield_rep): Replace BLKmode check with
35020 aggregate type check.
35022 2023-03-14 Jakub Jelinek <jakub@redhat.com>
35024 PR tree-optimization/109115
35025 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Don't use
35026 r.upper_bound () on r.undefined_p () range.
35028 2023-03-14 Jan Hubicka <hubicka@ucw.cz>
35030 PR tree-optimization/106896
35031 * profile-count.cc (profile_count::to_sreal_scale): Synchronize
35032 implementatoin with probability_in; avoid some asserts.
35034 2023-03-13 Max Filippov <jcmvbkbc@gmail.com>
35036 * config/xtensa/linux.h (TARGET_ASM_FILE_END): New macro.
35038 2023-03-13 Sean Bright <sean@seanbright.com>
35040 * doc/invoke.texi (Warning Options): Remove errant 'See'
35043 2023-03-13 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
35045 * config/xtensa/xtensa.h (REG_OK_STRICT, REG_OK_FOR_INDEX_P,
35046 REG_OK_FOR_BASE_P): Remove.
35048 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35050 * config/riscv/vector-iterators.md (=vd,vr): Fine tune.
35051 (=vd,vd,vr,vr): Ditto.
35052 * config/riscv/vector.md: Ditto.
35054 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35056 * config/riscv/riscv-vector-builtins.cc
35057 (function_expander::use_compare_insn): Add operand predicate check.
35059 2023-03-13 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35061 * config/riscv/vector.md: Fine tune RA constraints.
35063 2023-03-13 Tobias Burnus <tobias@codesourcery.com>
35065 * config/gcn/mkoffload.cc (main): Pass -save-temps on for the
35066 hsaco assemble/link.
35068 2023-03-13 Richard Biener <rguenther@suse.de>
35070 PR tree-optimization/109046
35071 * tree-ssa-forwprop.cc (pass_forwprop::execute): Combine
35072 piecewise complex loads.
35074 2023-03-12 Jakub Jelinek <jakub@redhat.com>
35076 * config/aarch64/aarch64.h (aarch64_bf16_type_node): Remove.
35077 (aarch64_bf16_ptr_type_node): Adjust comment.
35078 * config/aarch64/aarch64.cc (aarch64_gimplify_va_arg_expr): Use
35079 bfloat16_type_node rather than aarch64_bf16_type_node.
35080 (aarch64_libgcc_floating_mode_supported_p,
35081 aarch64_scalar_mode_supported_p): Also support BFmode.
35082 (aarch64_invalid_conversion, aarch64_invalid_unary_op): Remove.
35083 (aarch64_invalid_binary_op): Remove BFmode related rejections.
35084 (TARGET_INVALID_CONVERSION, TARGET_INVALID_UNARY_OP): Don't redefine.
35085 * config/aarch64/aarch64-builtins.cc (aarch64_bf16_type_node): Remove.
35086 (aarch64_int_or_fp_type): Use bfloat16_type_node rather than
35087 aarch64_bf16_type_node.
35088 (aarch64_init_simd_builtin_types): Likewise.
35089 (aarch64_init_bf16_types): Likewise. Don't create bfloat16_type_node,
35090 which is created in tree.cc already.
35091 * config/aarch64/aarch64-sve-builtins.def (svbfloat16_t): Likewise.
35093 2023-03-12 Roger Sayle <roger@nextmovesoftware.com>
35095 PR middle-end/109031
35096 * tree-chrec.cc (chrec_apply): When folding "{a, +, a} (x-1)",
35097 ensure that the type of x is as wide or wider than the type of a.
35099 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35102 * config/aarch64/aarch64-simd.md (@aarch64_bitmask_udiv<mode>3): Remove.
35103 (*bitmask_shift_plus<mode>): New.
35104 * config/aarch64/aarch64-sve2.md (*bitmask_shift_plus<mode>): New.
35105 (@aarch64_bitmask_udiv<mode>3): Remove.
35106 * config/aarch64/aarch64.cc
35107 (aarch64_vectorize_can_special_div_by_constant,
35108 TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Removed.
35109 (TARGET_VECTORIZE_PREFERRED_DIV_AS_SHIFTS_OVER_MULT,
35110 aarch64_vectorize_preferred_div_as_shifts_over_mult): New.
35112 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35115 * target.def (preferred_div_as_shifts_over_mult): New.
35116 * doc/tm.texi.in: Document it.
35117 * doc/tm.texi: Regenerate.
35118 * targhooks.cc (default_preferred_div_as_shifts_over_mult): New.
35119 * targhooks.h (default_preferred_div_as_shifts_over_mult): New.
35120 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Use it.
35122 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35123 Richard Sandiford <richard.sandiford@arm.com>
35126 * tree-ssa-math-opts.cc (convert_mult_to_fma): Inhibit FMA in case not
35129 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35130 Andrew MacLeod <amacleod@redhat.com>
35133 * gimple-range-op.h (gimple_range_op_handler): Add maybe_non_standard.
35134 * gimple-range-op.cc (gimple_range_op_handler::gimple_range_op_handler):
35136 (gimple_range_op_handler::maybe_non_standard): New.
35137 * range-op.cc (class operator_widen_plus_signed,
35138 operator_widen_plus_signed::wi_fold, class operator_widen_plus_unsigned,
35139 operator_widen_plus_unsigned::wi_fold, class operator_widen_mult_signed,
35140 operator_widen_mult_signed::wi_fold, class operator_widen_mult_unsigned,
35141 operator_widen_mult_unsigned::wi_fold,
35142 ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
35143 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New.
35144 * range-op.h (ptr_op_widen_mult_signed, ptr_op_widen_mult_unsigned,
35145 ptr_op_widen_plus_signed, ptr_op_widen_plus_unsigned): New
35147 2023-03-12 Tamar Christina <tamar.christina@arm.com>
35150 * doc/tm.texi (TARGET_VECTORIZE_CAN_SPECIAL_DIV_BY_CONST): Remove.
35151 * doc/tm.texi.in: Likewise.
35152 * explow.cc (round_push, align_dynamic_address): Revert previous patch.
35153 * expmed.cc (expand_divmod): Likewise.
35154 * expmed.h (expand_divmod): Likewise.
35155 * expr.cc (force_operand, expand_expr_divmod): Likewise.
35156 * optabs.cc (expand_doubleword_mod, expand_doubleword_divmod): Likewise.
35157 * target.def (can_special_div_by_const): Remove.
35158 * target.h: Remove tree-core.h include
35159 * targhooks.cc (default_can_special_div_by_const): Remove.
35160 * targhooks.h (default_can_special_div_by_const): Remove.
35161 * tree-vect-generic.cc (expand_vector_operation): Remove hook.
35162 * tree-vect-patterns.cc (vect_recog_divmod_pattern): Remove hook.
35163 * tree-vect-stmts.cc (vectorizable_operation): Remove hook.
35165 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
35167 * doc/install.texi2html: Fix issue number typo in comment.
35169 2023-03-12 Gaius Mulley <gaiusmod2@gmail.com>
35171 * doc/gm2.texi (Elementary data types): Equivalence BOOLEAN with
35174 2023-03-12 Sandra Loosemore <sandra@codesourcery.com>
35176 * doc/invoke.texi (Optimize Options): Add markup to
35177 description of asan-kernel-mem-intrinsic-prefix, and clarify
35180 2023-03-11 Gerald Pfeifer <gerald@pfeifer.com>
35182 * doc/extend.texi (Named Address Spaces): Drop a redundant link
35185 2023-03-11 Jeff Law <jlaw@ventanamicro>
35188 * doc/extend.texi: Clarify Attribute Syntax a bit.
35190 2023-03-11 Sandra Loosemore <sandra@codesourcery.com>
35192 * doc/install.texi (Prerequisites): Suggest using newer versions
35194 (Final install): Clean up and modernize discussion of how to
35195 build or obtain the GCC manuals.
35196 * doc/install.texi2html: Update comment to point to the PR instead
35197 of "makeinfo 4.7 brokenness" (it's not specific to that version).
35199 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35202 * optabs.cc (expand_fix): For conversions from BFmode to integral,
35203 use shifts to convert it to SFmode first and then convert SFmode
35206 2023-03-10 Andrew Pinski <apinski@marvell.com>
35208 * config/aarch64/aarch64.md: Add a new define_split
35211 2023-03-10 Richard Biener <rguenther@suse.de>
35213 * tree-ssa-structalias.cc (solve_graph): Immediately
35214 iterate self-cycles.
35216 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35218 PR tree-optimization/109008
35219 * range-op-float.cc (float_widen_lhs_range): If not
35220 -frounding-math and not IBM double double format, extend lhs
35221 range just by 0.5ulp rather than 1ulp in each direction.
35223 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35226 * config.gcc (x86_64-*-cygwin*): Don't add i386/t-cygwin-w64 into
35228 * config/i386/t-cygwin-w64: Remove.
35230 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35233 * tree-core.h (tree_code_type, tree_code_length): For C++11 or
35234 C++14, don't declare as extern const arrays.
35235 (tree_code_type_tmpl, tree_code_length_tmpl): New types with
35236 static constexpr member arrays for C++11 or C++14.
35237 * tree.h (TREE_CODE_CLASS): For C++11 or C++14 use
35238 tree_code_type_tmpl <0>::tree_code_type instead of tree_code_type.
35239 (TREE_CODE_LENGTH): For C++11 or C++14 use
35240 tree_code_length_tmpl <0>::tree_code_length instead of
35242 * tree.cc (tree_code_type, tree_code_length): Remove.
35244 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35247 * common.opt (fcanon-prefix-map): New option.
35248 * opts.cc: Include file-prefix-map.h.
35249 (flag_canon_prefix_map): New variable.
35250 (common_handle_option): Handle OPT_fcanon_prefix_map.
35251 (gen_command_line_string): Ignore OPT_fcanon_prefix_map.
35252 * file-prefix-map.h (flag_canon_prefix_map): Declare.
35253 * file-prefix-map.cc (struct file_prefix_map): Add canonicalize
35255 (add_prefix_map): Initialize canonicalize member from
35256 flag_canon_prefix_map, and if true canonicalize it using lrealpath.
35257 (remap_filename): Revert 2022-11-01 and 2022-11-07 changes,
35258 use lrealpath result only for map->canonicalize map entries.
35259 * lto-opts.cc (lto_write_options): Ignore OPT_fcanon_prefix_map.
35260 * opts-global.cc (handle_common_deferred_options): Clear
35261 flag_canon_prefix_map at the start and handle OPT_fcanon_prefix_map.
35262 * doc/invoke.texi (-fcanon-prefix-map): Document.
35263 (-ffile-prefix-map, -fdebug-prefix-map, -fprofile-prefix-map): Add
35264 see also for -fcanon-prefix-map.
35265 * doc/cppopts.texi (-fmacro-prefix-map): Likewise.
35267 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35270 * cgraphunit.cc (check_global_declaration): Don't warn for unused
35271 variables which have OPT_Wunused_variable warning suppressed.
35273 2023-03-10 Jakub Jelinek <jakub@redhat.com>
35275 PR tree-optimization/109008
35276 * range-op-float.cc (float_widen_lhs_range): If lb is
35277 minimum representable finite number or ub is maximum
35278 representable finite number, instead of widening it to
35279 -inf or inf widen it to negative or positive 0x0.8p+(EMAX+1).
35280 Temporarily clear flag_finite_math_only when canonicalizing
35283 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35285 * config/riscv/riscv-builtins.cc (riscv_gimple_fold_builtin): New function.
35286 * config/riscv/riscv-protos.h (riscv_gimple_fold_builtin): Ditto.
35287 (gimple_fold_builtin): Ditto.
35288 * config/riscv/riscv-vector-builtins-bases.cc (class read_vl): New class.
35289 (class vleff): Ditto.
35291 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35292 * config/riscv/riscv-vector-builtins-functions.def (read_vl): Ditto.
35294 * config/riscv/riscv-vector-builtins-shapes.cc (struct read_vl_def): Ditto.
35295 (struct fault_load_def): Ditto.
35297 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35298 * config/riscv/riscv-vector-builtins.cc
35299 (rvv_arg_type_info::get_tree_type): Add size_ptr.
35300 (gimple_folder::gimple_folder): New class.
35301 (gimple_folder::fold): Ditto.
35302 (gimple_fold_builtin): New function.
35303 (get_read_vl_instance): Ditto.
35304 (get_read_vl_decl): Ditto.
35305 * config/riscv/riscv-vector-builtins.def (size_ptr): Add size_ptr.
35306 * config/riscv/riscv-vector-builtins.h (class gimple_folder): New class.
35307 (get_read_vl_instance): New function.
35308 (get_read_vl_decl): Ditto.
35309 * config/riscv/riscv-vsetvl.cc (fault_first_load_p): Ditto.
35310 (read_vl_insn_p): Ditto.
35311 (available_occurrence_p): Ditto.
35312 (backward_propagate_worthwhile_p): Ditto.
35313 (gen_vsetvl_pat): Adapt for vleff support.
35314 (get_forward_read_vl_insn): New function.
35315 (get_backward_fault_first_load_insn): Ditto.
35316 (source_equal_p): Adapt for vleff support.
35317 (first_ratio_invalid_for_second_sew_p): Remove.
35318 (first_ratio_invalid_for_second_lmul_p): Ditto.
35319 (first_lmul_less_than_second_lmul_p): Ditto.
35320 (first_ratio_less_than_second_ratio_p): Ditto.
35321 (support_relaxed_compatible_p): New function.
35322 (vector_insn_info::operator>): Remove.
35323 (vector_insn_info::operator>=): Refine.
35324 (vector_insn_info::parse_insn): Adapt for vleff support.
35325 (vector_insn_info::compatible_p): Ditto.
35326 (vector_insn_info::update_fault_first_load_avl): New function.
35327 (pass_vsetvl::transfer_after): Adapt for vleff support.
35328 (pass_vsetvl::demand_fusion): Ditto.
35329 (pass_vsetvl::cleanup_insns): Ditto.
35330 * config/riscv/riscv-vsetvl.def (DEF_INCOMPATIBLE_COND): Remove
35331 redundant condtions.
35332 * config/riscv/riscv-vsetvl.h (struct demands_cond): New function.
35333 * config/riscv/riscv.cc (TARGET_GIMPLE_FOLD_BUILTIN): New target hook.
35334 * config/riscv/riscv.md: Adapt for vleff support.
35335 * config/riscv/t-riscv: Ditto.
35336 * config/riscv/vector-iterators.md: New iterator.
35337 * config/riscv/vector.md (read_vlsi): New pattern.
35338 (read_vldi_zero_extend): Ditto.
35339 (@pred_fault_load<mode>): Ditto.
35341 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35343 * config/riscv/riscv-vector-builtins.cc
35344 (function_expander::use_ternop_insn): Use maybe_gen_insn instead.
35345 (function_expander::use_widen_ternop_insn): Ditto.
35346 * optabs.cc (maybe_gen_insn): Extend nops handling.
35348 2023-03-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35350 * config/riscv/riscv-vector-builtins-bases.cc: Split indexed load
35351 patterns according to RVV ISA.
35352 * config/riscv/vector-iterators.md: New iterators.
35353 * config/riscv/vector.md
35354 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Remove.
35355 (@pred_indexed_<order>load<mode>_same_eew): New pattern.
35356 (@pred_indexed_<order>load<mode>_x2_greater_eew): Ditto.
35357 (@pred_indexed_<order>load<mode>_x4_greater_eew): Ditto.
35358 (@pred_indexed_<order>load<mode>_x8_greater_eew): Ditto.
35359 (@pred_indexed_<order>load<mode>_x2_smaller_eew): Ditto.
35360 (@pred_indexed_<order>load<mode>_x4_smaller_eew): Ditto.
35361 (@pred_indexed_<order>load<mode>_x8_smaller_eew): Ditto.
35362 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Remove.
35363 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
35364 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
35365 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
35366 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
35367 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
35369 2023-03-10 Michael Collison <collison@rivosinc.com>
35371 * tree-vect-loop-manip.cc (vect_do_peeling): Use
35372 result of constant_lower_bound instead of vf for the lower
35373 bound of the epilog loop trip count.
35375 2023-03-09 Tamar Christina <tamar.christina@arm.com>
35377 * passes.cc (emergency_dump_function): Finish graph generation.
35379 2023-03-09 Tamar Christina <tamar.christina@arm.com>
35381 * config/aarch64/aarch64.md (tbranch_<code><mode>3): Restrict to SHORT
35382 and bottom bit only.
35384 2023-03-09 Andrew Pinski <apinski@marvell.com>
35386 PR tree-optimization/108980
35387 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
35388 Reorgnize the call to warning for not strict flexible arrays
35389 to be before the check of warned.
35391 2023-03-09 Jason Merrill <jason@redhat.com>
35393 * doc/extend.texi: Comment out __is_deducible docs.
35395 2023-03-09 Jason Merrill <jason@redhat.com>
35398 * doc/extend.texi (Type Traits):: Document __is_deducible.
35400 2023-03-09 Costas Argyris <costas.argyris@gmail.com>
35403 * config.host: add object for x86_64-*-mingw*.
35404 * config/i386/sym-mingw32.cc: dummy file to attach
35406 * config/i386/utf8-mingw32.rc: windres resource file.
35407 * config/i386/winnt-utf8.manifest: XML manifest to
35409 * config/i386/x-mingw32: reference to x-mingw32-utf8.
35410 * config/i386/x-mingw32-utf8: Makefile fragment to
35411 embed UTF-8 manifest.
35413 2023-03-09 Vladimir N. Makarov <vmakarov@redhat.com>
35415 * lra-constraints.cc (process_alt_operands): Use operand modes for
35416 clobbered regs instead of the biggest access mode.
35418 2023-03-09 Richard Biener <rguenther@suse.de>
35420 PR middle-end/108995
35421 * fold-const.cc (extract_muldiv_1): Avoid folding
35422 (CST * b) / CST2 when sanitizing overflow and we rely on
35423 overflow being undefined.
35425 2023-03-09 Jakub Jelinek <jakub@redhat.com>
35426 Richard Biener <rguenther@suse.de>
35428 PR tree-optimization/109008
35429 * range-op-float.cc (float_widen_lhs_range): New function.
35430 (foperator_plus::op1_range, foperator_minus::op1_range,
35431 foperator_minus::op2_range, foperator_mult::op1_range,
35432 foperator_div::op1_range, foperator_div::op2_range): Use it.
35434 2023-03-07 Jonathan Grant <jg@jguk.org>
35437 * doc/invoke.texi (Instrumentation Options): Clarify
35438 LeakSanitizer behavior.
35440 2023-03-07 Benson Muite <benson_muite@emailplus.org>
35442 * doc/install.texi (Prerequisites): Add link to gmplib.org.
35444 2023-03-07 Pan Li <pan2.li@intel.com>
35445 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35449 * config/riscv/riscv-modes.def (ADJUST_PRECISION): Adjust VNx*BI
35451 * config/riscv/riscv.cc (riscv_v_adjust_precision): New.
35452 * config/riscv/riscv.h (riscv_v_adjust_precision): New.
35453 * genmodes.cc (adj_precision): New.
35454 (ADJUST_PRECISION): New.
35455 (emit_mode_adjustments): Handle ADJUST_PRECISION.
35457 2023-03-07 Hans-Peter Nilsson <hp@axis.com>
35459 * doc/sourcebuild.texi: Document check_effective_target_tail_call.
35461 2023-03-06 Paul-Antoine Arras <pa@codesourcery.com>
35463 * config/gcn/gcn-valu.md (<expander><mode>3_exec): Add patterns for
35464 {s|u}{max|min} in QI, HI and DI modes.
35465 (<expander><mode>3): Add pattern for {s|u}{max|min} in DI mode.
35466 (cond_<fexpander><mode>): Add pattern for cond_f{max|min}.
35467 (cond_<expander><mode>): Add pattern for cond_{s|u}{max|min}.
35468 * config/gcn/gcn.cc (gcn_spill_class): Allow the exec register to be
35471 2023-03-06 Richard Biener <rguenther@suse.de>
35473 PR tree-optimization/109025
35474 * tree-vect-loop.cc (vect_is_simple_reduction): Verify
35475 the inner LC PHI use is the inner loop PHI latch definition
35476 before classifying an outer PHI as double reduction.
35478 2023-03-06 Jan Hubicka <hubicka@ucw.cz>
35481 * config/i386/x86-tune.def (X86_TUNE_USE_SCATTER_2PARTS): Enable for
35483 (X86_TUNE_USE_SCATTER_4PARTS): Likewise.
35484 (X86_TUNE_USE_SCATTER): Likewise.
35486 2023-03-06 Xi Ruoyao <xry111@xry111.site>
35489 * config/loongarch/loongarch.h (FP_RETURN): Use
35490 TARGET_*_FLOAT_ABI instead of TARGET_*_FLOAT.
35491 (UNITS_PER_FP_ARG): Likewise.
35493 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35495 * config/riscv/riscv-vsetvl.cc (reg_available_p): Fix bug.
35496 (pass_vsetvl::backward_demand_fusion): Ditto.
35498 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35499 SiYu Wu <siyu@isrc.iscas.ac.cn>
35501 * config/riscv/crypto.md (riscv_sm3p0_<mode>): Add ZKSED's and ZKSH's
35503 (riscv_sm3p1_<mode>): New.
35504 (riscv_sm4ed_<mode>): New.
35505 (riscv_sm4ks_<mode>): New.
35506 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKSED's and ZKSH's AVAIL.
35507 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): Add ZKSED's and
35508 ZKSH's built-in functions.
35510 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35511 SiYu Wu <siyu@isrc.iscas.ac.cn>
35513 * config/riscv/crypto.md (riscv_sha256sig0_<mode>): Add ZKNH's instructions.
35514 (riscv_sha256sig1_<mode>): New.
35515 (riscv_sha256sum0_<mode>): New.
35516 (riscv_sha256sum1_<mode>): New.
35517 (riscv_sha512sig0h): New.
35518 (riscv_sha512sig0l): New.
35519 (riscv_sha512sig1h): New.
35520 (riscv_sha512sig1l): New.
35521 (riscv_sha512sum0r): New.
35522 (riscv_sha512sum1r): New.
35523 (riscv_sha512sig0): New.
35524 (riscv_sha512sig1): New.
35525 (riscv_sha512sum0): New.
35526 (riscv_sha512sum1): New.
35527 * config/riscv/riscv-builtins.cc (AVAIL): And ZKNH's AVAIL.
35528 * config/riscv/riscv-scalar-crypto.def (RISCV_BUILTIN): And ZKNH's
35529 built-in functions.
35530 (DIRECT_BUILTIN): Add new.
35532 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35533 SiYu Wu <siyu@isrc.iscas.ac.cn>
35535 * config/riscv/constraints.md (D03): Add constants of bs and rnum.
35537 * config/riscv/crypto.md (riscv_aes32dsi): Add ZKND's and ZKNE's instructions.
35538 (riscv_aes32dsmi): New.
35539 (riscv_aes64ds): New.
35540 (riscv_aes64dsm): New.
35541 (riscv_aes64im): New.
35542 (riscv_aes64ks1i): New.
35543 (riscv_aes64ks2): New.
35544 (riscv_aes32esi): New.
35545 (riscv_aes32esmi): New.
35546 (riscv_aes64es): New.
35547 (riscv_aes64esm): New.
35548 * config/riscv/riscv-builtins.cc (AVAIL): Add ZKND's and ZKNE's AVAIL.
35549 * config/riscv/riscv-scalar-crypto.def (DIRECT_BUILTIN): Add ZKND's and
35550 ZKNE's built-in functions.
35552 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35553 SiYu Wu <siyu@isrc.iscas.ac.cn>
35555 * config/riscv/bitmanip.md: Add ZBKB's instructions.
35556 * config/riscv/riscv-builtins.cc (AVAIL): Add new.
35557 * config/riscv/riscv.md: Add new type for crypto instructions.
35558 * config/riscv/crypto.md: Add Scalar Cryptography extension's machine
35560 * config/riscv/riscv-scalar-crypto.def: Add Scalar Cryptography
35561 extension's built-in function file.
35563 2023-03-05 Liao Shihua <shihua@iscas.ac.cn>
35564 SiYu Wu <siyu@isrc.iscas.ac.cn>
35566 * config/riscv/riscv-builtins.cc (RISCV_FTYPE_NAME2): New.
35567 (RISCV_FTYPE_NAME3): New.
35568 (RISCV_ATYPE_QI): New.
35569 (RISCV_ATYPE_HI): New.
35570 (RISCV_FTYPE_ATYPES2): New.
35571 (RISCV_FTYPE_ATYPES3): New.
35572 * config/riscv/riscv-ftypes.def (2): New.
35575 2023-03-05 Vineet Gupta <vineetg@rivosinc.com>
35577 * config/riscv/riscv.cc (riscv_rtx_costs): Fixed IN_RANGE() to
35580 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35581 kito-cheng <kito.cheng@sifive.com>
35583 * config/riscv/predicates.md (vector_any_register_operand): New predicate.
35584 * config/riscv/riscv-c.cc (riscv_check_builtin_call): New function.
35585 (riscv_register_pragmas): Add builtin function check call.
35586 * config/riscv/riscv-protos.h (RVV_VUNDEF): Adapt macro.
35587 (check_builtin_call): New function.
35588 * config/riscv/riscv-vector-builtins-bases.cc (class vundefined): New class.
35589 (class vreinterpret): Ditto.
35590 (class vlmul_ext): Ditto.
35591 (class vlmul_trunc): Ditto.
35592 (class vset): Ditto.
35593 (class vget): Ditto.
35595 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35596 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Change name.
35612 (vundefined): Add new intrinsic.
35613 (vreinterpret): Ditto.
35614 (vlmul_ext): Ditto.
35615 (vlmul_trunc): Ditto.
35618 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def): New class.
35619 (struct narrow_alu_def): Ditto.
35620 (struct reduc_alu_def): Ditto.
35621 (struct vundefined_def): Ditto.
35622 (struct misc_def): Ditto.
35623 (struct vset_def): Ditto.
35624 (struct vget_def): Ditto.
35626 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35627 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EEW8_INTERPRET_OPS): New def.
35628 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
35629 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
35630 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
35631 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
35632 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
35633 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
35634 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
35635 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
35636 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
35637 (DEF_RVV_LMUL1_OPS): Ditto.
35638 (DEF_RVV_LMUL2_OPS): Ditto.
35639 (DEF_RVV_LMUL4_OPS): Ditto.
35640 (vint16mf4_t): Ditto.
35641 (vint16mf2_t): Ditto.
35642 (vint16m1_t): Ditto.
35643 (vint16m2_t): Ditto.
35644 (vint16m4_t): Ditto.
35645 (vint16m8_t): Ditto.
35646 (vint32mf2_t): Ditto.
35647 (vint32m1_t): Ditto.
35648 (vint32m2_t): Ditto.
35649 (vint32m4_t): Ditto.
35650 (vint32m8_t): Ditto.
35651 (vint64m1_t): Ditto.
35652 (vint64m2_t): Ditto.
35653 (vint64m4_t): Ditto.
35654 (vint64m8_t): Ditto.
35655 (vuint16mf4_t): Ditto.
35656 (vuint16mf2_t): Ditto.
35657 (vuint16m1_t): Ditto.
35658 (vuint16m2_t): Ditto.
35659 (vuint16m4_t): Ditto.
35660 (vuint16m8_t): Ditto.
35661 (vuint32mf2_t): Ditto.
35662 (vuint32m1_t): Ditto.
35663 (vuint32m2_t): Ditto.
35664 (vuint32m4_t): Ditto.
35665 (vuint32m8_t): Ditto.
35666 (vuint64m1_t): Ditto.
35667 (vuint64m2_t): Ditto.
35668 (vuint64m4_t): Ditto.
35669 (vuint64m8_t): Ditto.
35670 (vint8mf4_t): Ditto.
35671 (vint8mf2_t): Ditto.
35672 (vint8m1_t): Ditto.
35673 (vint8m2_t): Ditto.
35674 (vint8m4_t): Ditto.
35675 (vint8m8_t): Ditto.
35676 (vuint8mf4_t): Ditto.
35677 (vuint8mf2_t): Ditto.
35678 (vuint8m1_t): Ditto.
35679 (vuint8m2_t): Ditto.
35680 (vuint8m4_t): Ditto.
35681 (vuint8m8_t): Ditto.
35682 (vint8mf8_t): Ditto.
35683 (vuint8mf8_t): Ditto.
35684 (vfloat32mf2_t): Ditto.
35685 (vfloat32m1_t): Ditto.
35686 (vfloat32m2_t): Ditto.
35687 (vfloat32m4_t): Ditto.
35688 (vfloat64m1_t): Ditto.
35689 (vfloat64m2_t): Ditto.
35690 (vfloat64m4_t): Ditto.
35691 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_TYPE): Ditto.
35692 (DEF_RVV_EEW8_INTERPRET_OPS): Ditto.
35693 (DEF_RVV_EEW16_INTERPRET_OPS): Ditto.
35694 (DEF_RVV_EEW32_INTERPRET_OPS): Ditto.
35695 (DEF_RVV_EEW64_INTERPRET_OPS): Ditto.
35696 (DEF_RVV_X2_VLMUL_EXT_OPS): Ditto.
35697 (DEF_RVV_X4_VLMUL_EXT_OPS): Ditto.
35698 (DEF_RVV_X8_VLMUL_EXT_OPS): Ditto.
35699 (DEF_RVV_X16_VLMUL_EXT_OPS): Ditto.
35700 (DEF_RVV_X32_VLMUL_EXT_OPS): Ditto.
35701 (DEF_RVV_X64_VLMUL_EXT_OPS): Ditto.
35702 (DEF_RVV_LMUL1_OPS): Ditto.
35703 (DEF_RVV_LMUL2_OPS): Ditto.
35704 (DEF_RVV_LMUL4_OPS): Ditto.
35705 (DEF_RVV_TYPE_INDEX): Ditto.
35706 (required_extensions_p): Adapt for new intrinsic support/
35707 (get_required_extensions): New function.
35708 (check_required_extensions): Ditto.
35709 (unsigned_base_type_p): Remove.
35710 (rvv_arg_type_info::get_scalar_ptr_type): New function.
35711 (get_mode_for_bitsize): Remove.
35712 (rvv_arg_type_info::get_scalar_const_ptr_type): New function.
35713 (rvv_arg_type_info::get_base_vector_type): Ditto.
35714 (rvv_arg_type_info::get_function_type_index): Ditto.
35715 (DEF_RVV_BASE_TYPE): New def.
35716 (function_builder::apply_predication): New class.
35717 (function_expander::mask_mode): Ditto.
35718 (function_checker::function_checker): Ditto.
35719 (function_checker::report_non_ice): Ditto.
35720 (function_checker::report_out_of_range): Ditto.
35721 (function_checker::require_immediate): Ditto.
35722 (function_checker::require_immediate_range): Ditto.
35723 (function_checker::check): Ditto.
35724 (check_builtin_call): Ditto.
35725 * config/riscv/riscv-vector-builtins.def (DEF_RVV_TYPE): New def.
35726 (DEF_RVV_BASE_TYPE): Ditto.
35727 (DEF_RVV_TYPE_INDEX): Ditto.
35728 (vbool64_t): Ditto.
35729 (vbool32_t): Ditto.
35730 (vbool16_t): Ditto.
35735 (vuint8mf8_t): Ditto.
35736 (vuint8mf4_t): Ditto.
35737 (vuint8mf2_t): Ditto.
35738 (vuint8m1_t): Ditto.
35739 (vuint8m2_t): Ditto.
35740 (vint8m4_t): Ditto.
35741 (vuint8m4_t): Ditto.
35742 (vint8m8_t): Ditto.
35743 (vuint8m8_t): Ditto.
35744 (vint16mf4_t): Ditto.
35745 (vuint16mf2_t): Ditto.
35746 (vuint16m1_t): Ditto.
35747 (vuint16m2_t): Ditto.
35748 (vuint16m4_t): Ditto.
35749 (vuint16m8_t): Ditto.
35750 (vint32mf2_t): Ditto.
35751 (vuint32m1_t): Ditto.
35752 (vuint32m2_t): Ditto.
35753 (vuint32m4_t): Ditto.
35754 (vuint32m8_t): Ditto.
35755 (vuint64m1_t): Ditto.
35756 (vuint64m2_t): Ditto.
35757 (vuint64m4_t): Ditto.
35758 (vuint64m8_t): Ditto.
35759 (vfloat32mf2_t): Ditto.
35760 (vfloat32m1_t): Ditto.
35761 (vfloat32m2_t): Ditto.
35762 (vfloat32m4_t): Ditto.
35763 (vfloat32m8_t): Ditto.
35764 (vfloat64m1_t): Ditto.
35765 (vfloat64m4_t): Ditto.
35766 (vector): Move it def.
35769 (signed_vector): Ditto.
35770 (unsigned_vector): Ditto.
35771 (unsigned_scalar): Ditto.
35772 (vector_ptr): Ditto.
35773 (scalar_ptr): Ditto.
35774 (scalar_const_ptr): Ditto.
35778 (unsigned_long): Ditto.
35780 (eew8_index): Ditto.
35781 (eew16_index): Ditto.
35782 (eew32_index): Ditto.
35783 (eew64_index): Ditto.
35784 (shift_vector): Ditto.
35785 (double_trunc_vector): Ditto.
35786 (quad_trunc_vector): Ditto.
35787 (oct_trunc_vector): Ditto.
35788 (double_trunc_scalar): Ditto.
35789 (double_trunc_signed_vector): Ditto.
35790 (double_trunc_unsigned_vector): Ditto.
35791 (double_trunc_unsigned_scalar): Ditto.
35792 (double_trunc_float_vector): Ditto.
35793 (float_vector): Ditto.
35794 (lmul1_vector): Ditto.
35795 (widen_lmul1_vector): Ditto.
35796 (eew8_interpret): Ditto.
35797 (eew16_interpret): Ditto.
35798 (eew32_interpret): Ditto.
35799 (eew64_interpret): Ditto.
35800 (vlmul_ext_x2): Ditto.
35801 (vlmul_ext_x4): Ditto.
35802 (vlmul_ext_x8): Ditto.
35803 (vlmul_ext_x16): Ditto.
35804 (vlmul_ext_x32): Ditto.
35805 (vlmul_ext_x64): Ditto.
35806 * config/riscv/riscv-vector-builtins.h (DEF_RVV_BASE_TYPE): New def.
35807 (struct function_type_info): New function.
35808 (struct rvv_arg_type_info): Ditto.
35809 (class function_checker): New class.
35810 (rvv_arg_type_info::get_scalar_type): New function.
35811 (rvv_arg_type_info::get_vector_type): Ditto.
35812 (function_expander::ret_mode): New function.
35813 (function_checker::arg_mode): Ditto.
35814 (function_checker::ret_mode): Ditto.
35815 * config/riscv/t-riscv: Add generator.
35816 * config/riscv/vector-iterators.md: New iterators.
35817 * config/riscv/vector.md (vundefined<mode>): New pattern.
35818 (@vundefined<mode>): Ditto.
35819 (@vreinterpret<mode>): Ditto.
35820 (@vlmul_extx2<mode>): Ditto.
35821 (@vlmul_extx4<mode>): Ditto.
35822 (@vlmul_extx8<mode>): Ditto.
35823 (@vlmul_extx16<mode>): Ditto.
35824 (@vlmul_extx32<mode>): Ditto.
35825 (@vlmul_extx64<mode>): Ditto.
35826 (*vlmul_extx2<mode>): Ditto.
35827 (*vlmul_extx4<mode>): Ditto.
35828 (*vlmul_extx8<mode>): Ditto.
35829 (*vlmul_extx16<mode>): Ditto.
35830 (*vlmul_extx32<mode>): Ditto.
35831 (*vlmul_extx64<mode>): Ditto.
35832 * config/riscv/genrvv-type-indexer.cc: New file.
35834 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35836 * config/riscv/riscv-protos.h (enum vlen_enum): New enum.
35837 (slide1_sew64_helper): New function.
35838 * config/riscv/riscv-v.cc (compute_vlmax): Ditto.
35839 (get_unknown_min_value): Ditto.
35840 (force_vector_length_operand): Ditto.
35841 (gen_no_side_effects_vsetvl_rtx): Ditto.
35842 (get_vl_x2_rtx): Ditto.
35843 (slide1_sew64_helper): Ditto.
35844 * config/riscv/riscv-vector-builtins-bases.cc (class slideop): New class.
35845 (class vrgather): Ditto.
35846 (class vrgatherei16): Ditto.
35847 (class vcompress): Ditto.
35849 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35850 * config/riscv/riscv-vector-builtins-functions.def (vslideup): Ditto.
35851 (vslidedown): Ditto.
35852 (vslide1up): Ditto.
35853 (vslide1down): Ditto.
35854 (vfslide1up): Ditto.
35855 (vfslide1down): Ditto.
35857 (vrgatherei16): Ditto.
35858 (vcompress): Ditto.
35859 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_EI16_OPS): New macro.
35860 (vint8mf8_t): Ditto.
35861 (vint8mf4_t): Ditto.
35862 (vint8mf2_t): Ditto.
35863 (vint8m1_t): Ditto.
35864 (vint8m2_t): Ditto.
35865 (vint8m4_t): Ditto.
35866 (vint16mf4_t): Ditto.
35867 (vint16mf2_t): Ditto.
35868 (vint16m1_t): Ditto.
35869 (vint16m2_t): Ditto.
35870 (vint16m4_t): Ditto.
35871 (vint16m8_t): Ditto.
35872 (vint32mf2_t): Ditto.
35873 (vint32m1_t): Ditto.
35874 (vint32m2_t): Ditto.
35875 (vint32m4_t): Ditto.
35876 (vint32m8_t): Ditto.
35877 (vint64m1_t): Ditto.
35878 (vint64m2_t): Ditto.
35879 (vint64m4_t): Ditto.
35880 (vint64m8_t): Ditto.
35881 (vuint8mf8_t): Ditto.
35882 (vuint8mf4_t): Ditto.
35883 (vuint8mf2_t): Ditto.
35884 (vuint8m1_t): Ditto.
35885 (vuint8m2_t): Ditto.
35886 (vuint8m4_t): Ditto.
35887 (vuint16mf4_t): Ditto.
35888 (vuint16mf2_t): Ditto.
35889 (vuint16m1_t): Ditto.
35890 (vuint16m2_t): Ditto.
35891 (vuint16m4_t): Ditto.
35892 (vuint16m8_t): Ditto.
35893 (vuint32mf2_t): Ditto.
35894 (vuint32m1_t): Ditto.
35895 (vuint32m2_t): Ditto.
35896 (vuint32m4_t): Ditto.
35897 (vuint32m8_t): Ditto.
35898 (vuint64m1_t): Ditto.
35899 (vuint64m2_t): Ditto.
35900 (vuint64m4_t): Ditto.
35901 (vuint64m8_t): Ditto.
35902 (vfloat32mf2_t): Ditto.
35903 (vfloat32m1_t): Ditto.
35904 (vfloat32m2_t): Ditto.
35905 (vfloat32m4_t): Ditto.
35906 (vfloat32m8_t): Ditto.
35907 (vfloat64m1_t): Ditto.
35908 (vfloat64m2_t): Ditto.
35909 (vfloat64m4_t): Ditto.
35910 (vfloat64m8_t): Ditto.
35911 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_EI16_OPS): Ditto.
35912 * config/riscv/riscv.md: Adjust RVV instruction types.
35913 * config/riscv/vector-iterators.md (down): New iterator.
35914 (=vd,vr): New attribute.
35915 (UNSPEC_VSLIDE1UP): New unspec.
35916 * config/riscv/vector.md (@pred_slide<ud><mode>): New pattern.
35917 (*pred_slide<ud><mode>): Ditto.
35918 (*pred_slide<ud><mode>_extended): Ditto.
35919 (@pred_gather<mode>): Ditto.
35920 (@pred_gather<mode>_scalar): Ditto.
35921 (@pred_gatherei16<mode>): Ditto.
35922 (@pred_compress<mode>): Ditto.
35924 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35926 * config/riscv/riscv-vector-builtins.cc: Remove void_type_node.
35928 2023-03-05 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
35930 * config/riscv/constraints.md (Wb1): New constraint.
35931 * config/riscv/predicates.md
35932 (vector_least_significant_set_mask_operand): New predicate.
35933 (vector_broadcast_mask_operand): Ditto.
35934 * config/riscv/riscv-protos.h (enum vlmul_type): Adjust.
35935 (gen_scalar_move_mask): New function.
35936 * config/riscv/riscv-v.cc (gen_scalar_move_mask): Ditto.
35937 * config/riscv/riscv-vector-builtins-bases.cc (class vmv): New class.
35938 (class vmv_s): Ditto.
35940 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
35941 * config/riscv/riscv-vector-builtins-functions.def (vmv_x): Ditto.
35945 * config/riscv/riscv-vector-builtins-shapes.cc (struct scalar_move_def): Ditto.
35947 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
35948 * config/riscv/riscv-vector-builtins.cc (function_expander::mask_mode): Ditto.
35949 (function_expander::use_exact_insn): New function.
35950 (function_expander::use_contiguous_load_insn): New function.
35951 (function_expander::use_contiguous_store_insn): New function.
35952 (function_expander::use_ternop_insn): New function.
35953 (function_expander::use_widen_ternop_insn): New function.
35954 (function_expander::use_scalar_move_insn): New function.
35955 * config/riscv/riscv-vector-builtins.def (s): New operand suffix.
35956 * config/riscv/riscv-vector-builtins.h
35957 (function_expander::add_scalar_move_mask_operand): New class.
35958 * config/riscv/riscv-vsetvl.cc (ignore_vlmul_insn_p): New function.
35959 (scalar_move_insn_p): Ditto.
35960 (has_vsetvl_killed_avl_p): Ditto.
35961 (anticipatable_occurrence_p): Ditto.
35962 (insert_vsetvl): Ditto.
35963 (get_vl_vtype_info): Ditto.
35964 (calculate_sew): Ditto.
35965 (calculate_vlmul): Ditto.
35966 (incompatible_avl_p): Ditto.
35967 (different_sew_p): Ditto.
35968 (different_lmul_p): Ditto.
35969 (different_ratio_p): Ditto.
35970 (different_tail_policy_p): Ditto.
35971 (different_mask_policy_p): Ditto.
35972 (possible_zero_avl_p): Ditto.
35973 (first_ratio_invalid_for_second_sew_p): Ditto.
35974 (first_ratio_invalid_for_second_lmul_p): Ditto.
35975 (second_ratio_invalid_for_first_sew_p): Ditto.
35976 (second_ratio_invalid_for_first_lmul_p): Ditto.
35977 (second_sew_less_than_first_sew_p): Ditto.
35978 (first_sew_less_than_second_sew_p): Ditto.
35979 (compare_lmul): Ditto.
35980 (second_lmul_less_than_first_lmul_p): Ditto.
35981 (first_lmul_less_than_second_lmul_p): Ditto.
35982 (first_ratio_less_than_second_ratio_p): Ditto.
35983 (second_ratio_less_than_first_ratio_p): Ditto.
35984 (DEF_INCOMPATIBLE_COND): Ditto.
35985 (greatest_sew): Ditto.
35986 (first_sew): Ditto.
35987 (second_sew): Ditto.
35988 (first_vlmul): Ditto.
35989 (second_vlmul): Ditto.
35990 (first_ratio): Ditto.
35991 (second_ratio): Ditto.
35992 (vlmul_for_first_sew_second_ratio): Ditto.
35993 (ratio_for_second_sew_first_vlmul): Ditto.
35994 (DEF_SEW_LMUL_FUSE_RULE): Ditto.
35995 (always_unavailable): Ditto.
35996 (avl_unavailable_p): Ditto.
35997 (sew_unavailable_p): Ditto.
35998 (lmul_unavailable_p): Ditto.
35999 (ge_sew_unavailable_p): Ditto.
36000 (ge_sew_lmul_unavailable_p): Ditto.
36001 (ge_sew_ratio_unavailable_p): Ditto.
36002 (DEF_UNAVAILABLE_COND): Ditto.
36003 (same_sew_lmul_demand_p): Ditto.
36004 (propagate_avl_across_demands_p): Ditto.
36005 (reg_available_p): Ditto.
36006 (avl_info::has_non_zero_avl): Ditto.
36007 (vl_vtype_info::has_non_zero_avl): Ditto.
36008 (vector_insn_info::operator>=): Refactor.
36009 (vector_insn_info::parse_insn): Adjust for scalar move.
36010 (vector_insn_info::demand_vl_vtype): Remove.
36011 (vector_insn_info::compatible_p): New function.
36012 (vector_insn_info::compatible_avl_p): Ditto.
36013 (vector_insn_info::compatible_vtype_p): Ditto.
36014 (vector_insn_info::available_p): Ditto.
36015 (vector_insn_info::merge): Ditto.
36016 (vector_insn_info::fuse_avl): Ditto.
36017 (vector_insn_info::fuse_sew_lmul): Ditto.
36018 (vector_insn_info::fuse_tail_policy): Ditto.
36019 (vector_insn_info::fuse_mask_policy): Ditto.
36020 (vector_insn_info::dump): Ditto.
36021 (vector_infos_manager::release): Ditto.
36022 (pass_vsetvl::compute_local_backward_infos): Adjust for scalar move support.
36023 (pass_vsetvl::get_backward_fusion_type): Adjust for scalar move support.
36024 (pass_vsetvl::hard_empty_block_p): Ditto.
36025 (pass_vsetvl::backward_demand_fusion): Ditto.
36026 (pass_vsetvl::forward_demand_fusion): Ditto.
36027 (pass_vsetvl::refine_vsetvls): Ditto.
36028 (pass_vsetvl::cleanup_vsetvls): Ditto.
36029 (pass_vsetvl::commit_vsetvls): Ditto.
36030 (pass_vsetvl::propagate_avl): Ditto.
36031 * config/riscv/riscv-vsetvl.h (enum demand_status): New class.
36032 (struct demands_pair): Ditto.
36033 (struct demands_cond): Ditto.
36034 (struct demands_fuse_rule): Ditto.
36035 * config/riscv/vector-iterators.md: New iterator.
36036 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
36037 (*pred_broadcast<mode>): Ditto.
36038 (*pred_broadcast<mode>_extended_scalar): Ditto.
36039 (@pred_extract_first<mode>): Ditto.
36040 (*pred_extract_first<mode>): Ditto.
36041 (@pred_extract_first_trunc<mode>): Ditto.
36042 * config/riscv/riscv-vsetvl.def: New file.
36044 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
36046 * config/riscv/bitmanip.md: allow 0 constant in max/min
36049 2023-03-05 Lin Sinan <sinan.lin@linux.alibaba.com>
36051 * config/riscv/bitmanip.md: Fix wrong index in the check.
36053 2023-03-04 Jakub Jelinek <jakub@redhat.com>
36055 PR middle-end/109006
36056 * vec.cc (test_auto_alias): Adjust comment for removal of
36058 * read-rtl-function.cc (function_reader::parse_block): Likewise.
36059 * gdbhooks.py: Likewise.
36061 2023-03-04 Jakub Jelinek <jakub@redhat.com>
36063 PR testsuite/108973
36064 * selftest-diagnostic.cc
36065 (test_diagnostic_context::test_diagnostic_context): Set
36066 caret_max_width to 80.
36068 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36070 * gimple-ssa-warn-access.cc
36071 (pass_waccess::check_dangling_stores): Skip non-stores.
36073 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36075 * config/arm/vfp.md (*thumb2_movsi_vfp): Drop blank after tab
36076 after vmsr and vmrs, and lower the case of P0.
36078 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
36080 PR middle-end/109006
36081 * gdbhooks.py (VecPrinter): Handle vec<T> as well as vec<T>*.
36083 2023-03-03 Jonathan Wakely <jwakely@redhat.com>
36085 PR middle-end/109006
36086 * gdbhooks.py (VecPrinter): Adjust for new vec layout.
36088 2023-03-03 Jakub Jelinek <jakub@redhat.com>
36091 * gimple-ssa-warn-access.cc (pass_waccess::maybe_check_access_sizes):
36092 Return immediately if OPT_Wnonnull or OPT_Wstringop_overflow_ is
36093 suppressed on stmt. For [static %E] warning, print access_nelts
36094 rather than access_size. Fix up comment wording.
36096 2023-03-03 Robin Dapp <rdapp@linux.ibm.com>
36098 * config/s390/driver-native.cc (s390_host_detect_local_cpu): Use
36099 arch14 instead of z16.
36101 2023-03-03 Anthony Green <green@moxielogic.com>
36103 * config/moxie/moxie.cc (TARGET_LRA_P): Remove.
36105 2023-03-03 Anthony Green <green@moxielogic.com>
36107 * config/moxie/constraints.md (A, B, W): Change
36108 define_constraint to define_memory_constraint.
36110 2023-03-03 Xi Ruoyao <xry111@xry111.site>
36112 * toplev.cc (process_options): Fix the spelling of
36113 "-fstack-clash-protection".
36115 2023-03-03 Richard Biener <rguenther@suse.de>
36117 PR tree-optimization/109002
36118 * tree-ssa-pre.cc (compute_partial_antic_aux): Properly
36119 PHI-translate ANTIC_IN.
36121 2023-03-03 Jakub Jelinek <jakub@redhat.com>
36123 PR tree-optimization/108988
36124 * gimple-fold.cc (gimple_fold_builtin_fputs): Fold len to
36125 size_type_node before passing it as argument to fwrite. Formatting
36128 2023-03-03 Richard Biener <rguenther@suse.de>
36131 * config/i386/i386.opt (--param x86-stv-max-visits): New param.
36132 * doc/invoke.texi (--param x86-stv-max-visits): Document it.
36133 * config/i386/i386-features.h (scalar_chain::max_visits): New.
36134 (scalar_chain::build): Add bitmap parameter, return boolean.
36135 (scalar_chain::add_insn): Likewise.
36136 (scalar_chain::analyze_register_chain): Likewise.
36137 * config/i386/i386-features.cc (scalar_chain::scalar_chain):
36138 Initialize max_visits.
36139 (scalar_chain::analyze_register_chain): When we exhaust
36140 max_visits, abort. Also abort when running into any
36142 (scalar_chain::add_insn): Propagate abort.
36143 (scalar_chain::build): Likewise. When aborting amend
36144 the set of disallowed insn with the insns set.
36145 (convert_scalars_to_vector): Adjust. Do not convert aborted
36148 2023-03-03 Richard Biener <rguenther@suse.de>
36151 * dwarf2out.cc (dwarf2out_late_global_decl): Do not
36152 generate a DIE for a function scope static.
36154 2023-03-03 Alexandre Oliva <oliva@adacore.com>
36156 * config/vx-common.h (WINT_TYPE): Alias to "wchar_t".
36158 2023-03-02 Jakub Jelinek <jakub@redhat.com>
36161 * target.h (emit_support_tinfos_callback): New typedef.
36162 * targhooks.h (default_emit_support_tinfos): Declare.
36163 * targhooks.cc (default_emit_support_tinfos): New function.
36164 * target.def (emit_support_tinfos): New target hook.
36165 * doc/tm.texi.in (emit_support_tinfos): Document it.
36166 * doc/tm.texi: Regenerated.
36167 * config/i386/i386.cc (ix86_emit_support_tinfos): New function.
36168 (TARGET_EMIT_SUPPORT_TINFOS): Redefine.
36170 2023-03-02 Vladimir N. Makarov <vmakarov@redhat.com>
36172 * ira-costs.cc: Include print-rtl.h.
36173 (record_reg_classes, scan_one_insn): Add code to print debug info.
36174 (record_operand_costs): Find and use smaller cost for hard reg
36177 2023-03-02 Kwok Cheung Yeung <kcy@codesourcery.com>
36178 Paul-Antoine Arras <pa@codesourcery.com>
36180 * builtins.cc (mathfn_built_in_explicit): New.
36181 * config/gcn/gcn.cc: Include case-cfn-macros.h.
36182 (mathfn_built_in_explicit): Add prototype.
36183 (gcn_vectorize_builtin_vectorized_function): New.
36184 (gcn_libc_has_function): New.
36185 (TARGET_LIBC_HAS_FUNCTION): Define.
36186 (TARGET_VECTORIZE_BUILTIN_VECTORIZED_FUNCTION): Define.
36188 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36190 PR tree-optimization/108979
36191 * tree-vect-stmts.cc (vectorizable_operation): Don't mask
36192 operations on invariants.
36194 2023-03-02 Robin Dapp <rdapp@linux.ibm.com>
36196 * config/s390/predicates.md (vll_bias_operand): Add -1 bias.
36197 * config/s390/s390.cc (s390_option_override_internal): Make
36198 partial vector usage the default from z13 on.
36199 * config/s390/vector.md (len_load_v16qi): Add.
36200 (len_store_v16qi): Add.
36202 2023-03-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
36204 * simplify-rtx.cc (simplify_context::simplify_subreg): Use byte instead
36205 of constant 0 offset.
36207 2023-03-02 Robert Suchanek <robert.suchanek@imgtec.com>
36209 * config/mips/mips.cc (mips_set_text_contents_type): Use HOST_WIDE_INT
36211 * config/mips/mips-protos.h (mips_set_text_contents_type): Likewise.
36213 2023-03-02 Junxian Zhu <zhujunxian@oss.cipunited.com>
36215 * config.gcc: add -with-{no-}msa build option.
36216 * config/mips/mips.h: Likewise.
36217 * doc/install.texi: Likewise.
36219 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36221 PR tree-optimization/108603
36222 * explow.cc (convert_memory_address_addr_space_1): Only wrap
36223 the result of a recursive call in a CONST if no instructions
36226 2023-03-02 Richard Sandiford <richard.sandiford@arm.com>
36228 PR tree-optimization/108430
36229 * tree-vect-stmts.cc (vectorizable_condition): Fix handling
36230 of inverted condition.
36232 2023-03-02 Jakub Jelinek <jakub@redhat.com>
36235 * fold-const.cc (native_interpret_expr) <case REAL_CST>: Before memcmp
36236 comparison copy the bytes from ptr to a temporary buffer and clearing
36237 padding bits in there.
36239 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
36241 PR middle-end/108545
36242 * gimplify.cc (struct tree_operand_hash_no_se): New.
36243 (omp_index_mapping_groups_1, omp_index_mapping_groups,
36244 omp_reindex_mapping_groups, omp_mapped_by_containing_struct,
36245 omp_tsort_mapping_groups_1, omp_tsort_mapping_groups,
36246 oacc_resolve_clause_dependencies, omp_build_struct_sibling_lists,
36247 gimplify_scan_omp_clauses): Use tree_operand_hash_no_se instead
36248 of tree_operand_hash.
36250 2023-03-01 LIU Hao <lh_mouse@126.com>
36253 * config/i386/host-mingw32.cc (mingw32_gt_pch_get_address):
36254 Remove the size limit `pch_VA_max_size`
36256 2023-03-01 Tobias Burnus <tobias@codesourcery.com>
36258 PR middle-end/108546
36259 * omp-low.cc (lower_omp_target): Remove optional handling
36260 on the receiver side, i.e. inside target (data), for
36263 2023-03-01 Jakub Jelinek <jakub@redhat.com>
36266 * cfgexpand.cc (expand_debug_expr): Handle WIDEN_{PLUS,MINUS}_EXPR
36267 and VEC_WIDEN_{PLUS,MINUS}_{HI,LO}_EXPR.
36269 2023-03-01 Richard Biener <rguenther@suse.de>
36271 PR tree-optimization/108970
36272 * tree-vect-loop-manip.cc (slpeel_can_duplicate_loop_p):
36273 Check we can copy the BBs.
36274 (slpeel_tree_duplicate_loop_to_edge_cfg): Avoid redundant
36276 (vect_do_peeling): Streamline error handling.
36278 2023-03-01 Richard Biener <rguenther@suse.de>
36280 PR tree-optimization/108950
36281 * tree-vect-patterns.cc (vect_recog_widen_sum_pattern):
36282 Check oprnd0 is defined in the loop.
36283 * tree-vect-loop.cc (vectorizable_reduction): Record all
36284 operands vector types, compute that of invariants and
36285 properly update their SLP nodes.
36287 2023-03-01 Kewen Lin <linkw@linux.ibm.com>
36290 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Allow
36291 implicit powerpc64 setting to be unset if 64 bit is enabled implicitly.
36293 2023-02-28 Qing Zhao <qing.zhao@oracle.com>
36295 PR middle-end/107411
36296 PR middle-end/107411
36297 * gimplify.cc (gimple_add_init_for_auto_var): Use sprintf to replace
36299 * tree-ssa-uninit.cc (warn_uninit): Handle the case when the
36300 LHS varaible of a .DEFERRED_INIT call doesn't have a DECL_NAME.
36302 2023-02-28 Jakub Jelinek <jakub@redhat.com>
36304 PR sanitizer/108894
36305 * ubsan.cc (ubsan_expand_bounds_ifn): Emit index >= bound
36306 comparison rather than index > bound.
36307 * gimple-fold.cc (gimple_fold_call): Use tree_int_cst_lt
36308 rather than tree_int_cst_le for IFN_UBSAN_BOUND comparison.
36309 * doc/invoke.texi (-fsanitize=bounds): Document that whether
36310 flexible array member-like arrays are instrumented or not depends
36311 on -fstrict-flex-arrays* options of strict_flex_array attributes.
36312 (-fsanitize=bounds-strict): Document that flexible array members
36313 are not instrumented.
36315 2023-02-27 Uroš Bizjak <ubizjak@gmail.com>
36319 * config/i386/i386.md (fmodxf3): Enable for flag_finite_math_only only.
36320 (fmod<mode>3): Ditto.
36321 (fpremxf4_i387): Ditto.
36322 (reminderxf3): Ditto.
36323 (reminder<mode>3): Ditto.
36324 (fprem1xf4_i387): Ditto.
36326 2023-02-27 Roger Sayle <roger@nextmovesoftware.com>
36328 * simplify-rtx.cc (simplify_unary_operation_1) <case FFS>: Avoid
36329 generating FFS with mismatched operand and result modes, by using
36330 an explicit SIGN_EXTEND/ZERO_EXTEND.
36331 <case POPCOUNT>: Likewise, for POPCOUNT of ZERO_EXTEND.
36332 <case PARITY>: Likewise, for PARITY of {ZERO,SIGN}_EXTEND.
36334 2023-02-27 Patrick Palka <ppalka@redhat.com>
36336 * hash-table.h (gt_pch_nx(hash_table<D>)): Remove static.
36337 * lra-int.h (lra_change_class): Likewise.
36338 * recog.h (which_op_alt): Likewise.
36339 * sel-sched-ir.h (sel_bb_empty_or_nop_p): Declare inline
36342 2023-02-27 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36344 * config/xtensa/xtensa-protos.h (xtensa_match_CLAMPS_imms_p):
36346 * config/xtensa/xtensa.cc (xtensa_match_CLAMPS_imms_p):
36348 * config/xtensa/xtensa.h (TARGET_CLAMPS): New macro definition.
36349 * config/xtensa/xtensa.md (*xtensa_clamps): New insn pattern.
36351 2023-02-27 Max Filippov <jcmvbkbc@gmail.com>
36353 * config/xtensa/xtensa-dynconfig.cc (xtensa_get_config_v2)
36354 (xtensa_get_config_v3): New functions.
36356 2023-02-27 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36358 * config/aarch64/aarch64-simd.md (aarch64_abs<mode>): Fix typo in comment.
36360 2023-02-27 Lulu Cheng <chenglulu@loongson.cn>
36362 * config/host-linux.cc (TRY_EMPTY_VM_SPACE): Modify the value of
36363 the macro to 0x1000000000.
36365 2023-02-25 Gaius Mulley <gaiusmod2@gmail.com>
36368 * doc/gm2.texi (-fm2-pathname): New option documented.
36369 (-fm2-pathnameI): New option documented.
36370 (-fm2-prefix=): New option documented.
36371 (-fruntime-modules=): Update default module list.
36373 2023-02-25 Max Filippov <jcmvbkbc@gmail.com>
36376 * config/xtensa/xtensa-protos.h
36377 (xtensa_prepare_expand_call): Rename to xtensa_expand_call.
36378 * config/xtensa/xtensa.cc (xtensa_prepare_expand_call): Rename
36379 to xtensa_expand_call.
36380 (xtensa_expand_call): Emit the call and add a clobber expression
36381 for the static chain to it in case of windowed ABI.
36382 * config/xtensa/xtensa.md (call, call_value, sibcall)
36383 (sibcall_value): Call xtensa_expand_call and complete expansion
36384 right after that call.
36386 2023-02-24 Richard Biener <rguenther@suse.de>
36388 * vec.h (vec<T, A, vl_embed>::m_vecdata): Remove.
36389 (vec<T, A, vl_embed>::m_vecpfx): Align as T to avoid
36390 changing alignment of vec<T, A, vl_embed> and simplifying
36392 (vec<T, A, vl_embed>::address): Compute as this + 1.
36393 (vec<T, A, vl_embed>::embedded_size): Use sizeof the
36394 vector instead of the offset of the m_vecdata member.
36395 (auto_vec<T, N>::m_data): Turn storage into
36396 uninitialized unsigned char.
36397 (auto_vec<T, N>::auto_vec): Allow allocation of one
36398 stack member. Initialize m_vec in a special way to
36399 avoid later stringop overflow diagnostics.
36400 * vec.cc (test_auto_alias): New.
36401 (vec_cc_tests): Call it.
36403 2023-02-24 Richard Biener <rguenther@suse.de>
36405 * vec.h (vec<T, A, vl_embed>::lower_bound): Adjust to
36406 take a const reference to the object, use address to
36408 (vec<T, A, vl_embed>::contains): Use address to access data.
36409 (vec<T, A, vl_embed>::operator[]): Use address instead of
36410 m_vecdata to access data.
36411 (vec<T, A, vl_embed>::iterate): Likewise.
36412 (vec<T, A, vl_embed>::copy): Likewise.
36413 (vec<T, A, vl_embed>::quick_push): Likewise.
36414 (vec<T, A, vl_embed>::pop): Likewise.
36415 (vec<T, A, vl_embed>::quick_insert): Likewise.
36416 (vec<T, A, vl_embed>::ordered_remove): Likewise.
36417 (vec<T, A, vl_embed>::unordered_remove): Likewise.
36418 (vec<T, A, vl_embed>::block_remove): Likewise.
36419 (vec<T, A, vl_heap>::address): Likewise.
36421 2023-02-24 Martin Liska <mliska@suse.cz>
36423 PR sanitizer/108834
36424 * asan.cc (asan_add_global): Use proper TU name for normal
36425 global variables (and aux_base_name for the artificial one).
36427 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36429 * config/i386/i386-builtin.def: Update description of BDESC
36430 and BDESC_FIRST in file comment to include mask2.
36432 2023-02-24 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
36434 * config/aarch64/aarch64-cores.def (FLAGS): Update comment.
36436 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36438 PR middle-end/108854
36439 * cgraphclones.cc (duplicate_thunk_for_node): If no parameter
36440 changes are needed, copy at least DECL_ARGUMENTS PARM_DECL
36441 nodes and adjust their DECL_CONTEXT.
36443 2023-02-24 Jakub Jelinek <jakub@redhat.com>
36446 * config/i386/i386-builtin.def (__builtin_ia32_cvtne2ps2bf16_v16bf,
36447 __builtin_ia32_cvtne2ps2bf16_v16bf_mask,
36448 __builtin_ia32_cvtne2ps2bf16_v16bf_maskz,
36449 __builtin_ia32_cvtne2ps2bf16_v8bf,
36450 __builtin_ia32_cvtne2ps2bf16_v8bf_mask,
36451 __builtin_ia32_cvtne2ps2bf16_v8bf_maskz,
36452 __builtin_ia32_cvtneps2bf16_v8sf_mask,
36453 __builtin_ia32_cvtneps2bf16_v8sf_maskz,
36454 __builtin_ia32_cvtneps2bf16_v4sf_mask,
36455 __builtin_ia32_cvtneps2bf16_v4sf_maskz,
36456 __builtin_ia32_dpbf16ps_v8sf, __builtin_ia32_dpbf16ps_v8sf_mask,
36457 __builtin_ia32_dpbf16ps_v8sf_maskz, __builtin_ia32_dpbf16ps_v4sf,
36458 __builtin_ia32_dpbf16ps_v4sf_mask,
36459 __builtin_ia32_dpbf16ps_v4sf_maskz): Require also
36460 OPTION_MASK_ISA_AVX512VL.
36462 2023-02-24 Sebastian Huber <sebastian.huber@embedded-brains.de>
36464 * config/riscv/t-rtems: Keep only -mcmodel=medany 64-bit multilibs.
36465 Add non-compact 32-bit multilibs.
36467 2023-02-24 Junxian Zhu <zhujunxian@oss.cipunited.com>
36469 * config/mips/mips.md (*clo<mode>2): New pattern.
36471 2023-02-24 Prachi Godbole <prachi.godbole@imgtec.com>
36473 * config/mips/mips.h (machine_function): New variable
36474 use_hazard_barrier_return_p.
36475 * config/mips/mips.md (UNSPEC_JRHB): New unspec.
36476 (mips_hb_return_internal): New insn pattern.
36477 * config/mips/mips.cc (mips_attribute_table): Add attribute
36478 use_hazard_barrier_return.
36479 (mips_use_hazard_barrier_return_p): New static function.
36480 (mips_function_attr_inlinable_p): Likewise.
36481 (mips_compute_frame_info): Set use_hazard_barrier_return_p.
36482 Emit error for unsupported architecture choice.
36483 (mips_function_ok_for_sibcall, mips_can_use_return_insn):
36484 Return false for use_hazard_barrier_return.
36485 (mips_expand_epilogue): Emit hazard barrier return.
36486 * doc/extend.texi: Document use_hazard_barrier_return.
36488 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36490 * config/xtensa/xtensa-dynconfig.cc (config.h, system.h)
36491 (coretypes.h, diagnostic.h, intl.h): Use "..." instead of <...>
36492 for the gcc-internal headers.
36494 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36496 * config/xtensa/t-xtensa (xtensa-dynconfig.o): Use $(COMPILE)
36497 and $(POSTCOMPILE) instead of manual dependency listing.
36498 * config/xtensa/xtensa-dynconfig.c: Rename to ...
36499 * config/xtensa/xtensa-dynconfig.cc: ... this.
36501 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
36503 * doc/cfg.texi: Reorder index entries around @items.
36504 * doc/cpp.texi: Ditto.
36505 * doc/cppenv.texi: Ditto.
36506 * doc/cppopts.texi: Ditto.
36507 * doc/generic.texi: Ditto.
36508 * doc/install.texi: Ditto.
36509 * doc/extend.texi: Ditto.
36510 * doc/invoke.texi: Ditto.
36511 * doc/md.texi: Ditto.
36512 * doc/rtl.texi: Ditto.
36513 * doc/tm.texi.in: Ditto.
36514 * doc/trouble.texi: Ditto.
36515 * doc/tm.texi: Regenerate.
36517 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36519 * config/xtensa/xtensa.md: New peephole2 pattern that eliminates
36520 the occurrence of general-purpose register used only once and for
36521 transferring intermediate value.
36523 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36525 * config/xtensa/xtensa.cc (machine_function): Add new member
36526 'eliminated_callee_saved_bmp'.
36527 (xtensa_can_eliminate_callee_saved_reg_p): New function to
36528 determine whether the register can be eliminated or not.
36529 (xtensa_expand_prologue): Add invoking the above function and
36530 elimination the use of callee-saved register by using its stack
36531 slot through the stack pointer (or the frame pointer if needed)
36533 (xtensa_expand_prologue): Modify to not emit register restoration
36534 insn from its stack slot if the register is already eliminated.
36536 2023-02-23 Jakub Jelinek <jakub@redhat.com>
36538 PR translation/108890
36539 * config/xtensa/xtensa-dynconfig.c (xtensa_load_config): Drop _()s
36540 around fatal_error format strings.
36542 2023-02-23 Richard Biener <rguenther@suse.de>
36544 * tree-ssa-structalias.cc (handle_lhs_call): Do not
36545 re-create rhsc, only truncate it.
36547 2023-02-23 Jakub Jelinek <jakub@redhat.com>
36549 PR middle-end/106258
36550 * ipa-prop.cc (try_make_edge_direct_virtual_call): Handle
36551 BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
36553 2023-02-23 Richard Biener <rguenther@suse.de>
36555 * tree-if-conv.cc (tree_if_conversion): Properly manage
36556 memory of refs and the contained data references.
36558 2023-02-23 Richard Biener <rguenther@suse.de>
36560 PR tree-optimization/108888
36561 * tree-if-conv.cc (if_convertible_stmt_p): Set PLF_2 on
36562 calls to predicate.
36563 (predicate_statements): Only predicate calls with PLF_2.
36565 2023-02-23 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36567 * config/xtensa/xtensa.md
36568 (zero_cost_loop_start, zero_cost_loop_end, loop_end):
36569 Add missing "SI:" to PLUS RTXes.
36571 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36574 * config/xtensa/xtensa.cc (xtensa_expand_epilogue):
36575 Emit (use (reg:SI A0_REG)) at the end in the sibling call
36576 (i.e. the same place as (return) in the normal call).
36578 2023-02-23 Max Filippov <jcmvbkbc@gmail.com>
36581 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
36584 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
36586 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
36587 (sibcall_value, sibcall_value_internal): Add 'use' expression
36590 2023-02-23 Arsen Arsenović <arsen@aarsen.me>
36592 * doc/cppdiropts.texi: Reorder @opindex commands to precede
36593 @items they relate to.
36594 * doc/cppopts.texi: Ditto.
36595 * doc/cppwarnopts.texi: Ditto.
36596 * doc/invoke.texi: Ditto.
36597 * doc/lto.texi: Ditto.
36599 2023-02-22 Andrew Stubbs <ams@codesourcery.com>
36601 * internal-fn.cc (expand_MASK_CALL): New.
36602 * internal-fn.def (MASK_CALL): New.
36603 * internal-fn.h (expand_MASK_CALL): New prototype.
36604 * omp-simd-clone.cc (simd_clone_adjust_argument_types): Set vector_type
36605 for mask arguments also.
36606 * tree-if-conv.cc: Include cgraph.h.
36607 (if_convertible_stmt_p): Do if conversions for calls to SIMD calls.
36608 (predicate_statements): Convert functions to IFN_MASK_CALL.
36609 * tree-vect-loop.cc (vect_get_datarefs_in_loop): Recognise
36610 IFN_MASK_CALL as a SIMD function call.
36611 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Handle
36612 IFN_MASK_CALL as an inbranch SIMD function call.
36613 Generate the mask vector arguments.
36615 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36617 * config/riscv/riscv-vector-builtins-bases.cc (class reducop): New class.
36618 (class widen_reducop): Ditto.
36619 (class freducop): Ditto.
36620 (class widen_freducop): Ditto.
36622 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
36623 * config/riscv/riscv-vector-builtins-functions.def (vredsum): Add reduction support.
36632 (vwredsumu): Ditto.
36633 (vfredusum): Ditto.
36634 (vfredosum): Ditto.
36637 (vfwredosum): Ditto.
36638 (vfwredusum): Ditto.
36639 * config/riscv/riscv-vector-builtins-shapes.cc (struct reduc_alu_def): Ditto.
36641 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
36642 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WI_OPS): New macro.
36643 (DEF_RVV_WU_OPS): Ditto.
36644 (DEF_RVV_WF_OPS): Ditto.
36645 (vint8mf8_t): Ditto.
36646 (vint8mf4_t): Ditto.
36647 (vint8mf2_t): Ditto.
36648 (vint8m1_t): Ditto.
36649 (vint8m2_t): Ditto.
36650 (vint8m4_t): Ditto.
36651 (vint8m8_t): Ditto.
36652 (vint16mf4_t): Ditto.
36653 (vint16mf2_t): Ditto.
36654 (vint16m1_t): Ditto.
36655 (vint16m2_t): Ditto.
36656 (vint16m4_t): Ditto.
36657 (vint16m8_t): Ditto.
36658 (vint32mf2_t): Ditto.
36659 (vint32m1_t): Ditto.
36660 (vint32m2_t): Ditto.
36661 (vint32m4_t): Ditto.
36662 (vint32m8_t): Ditto.
36663 (vuint8mf8_t): Ditto.
36664 (vuint8mf4_t): Ditto.
36665 (vuint8mf2_t): Ditto.
36666 (vuint8m1_t): Ditto.
36667 (vuint8m2_t): Ditto.
36668 (vuint8m4_t): Ditto.
36669 (vuint8m8_t): Ditto.
36670 (vuint16mf4_t): Ditto.
36671 (vuint16mf2_t): Ditto.
36672 (vuint16m1_t): Ditto.
36673 (vuint16m2_t): Ditto.
36674 (vuint16m4_t): Ditto.
36675 (vuint16m8_t): Ditto.
36676 (vuint32mf2_t): Ditto.
36677 (vuint32m1_t): Ditto.
36678 (vuint32m2_t): Ditto.
36679 (vuint32m4_t): Ditto.
36680 (vuint32m8_t): Ditto.
36681 (vfloat32mf2_t): Ditto.
36682 (vfloat32m1_t): Ditto.
36683 (vfloat32m2_t): Ditto.
36684 (vfloat32m4_t): Ditto.
36685 (vfloat32m8_t): Ditto.
36686 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WI_OPS): Ditto.
36687 (DEF_RVV_WU_OPS): Ditto.
36688 (DEF_RVV_WF_OPS): Ditto.
36689 (required_extensions_p): Add reduction support.
36690 (rvv_arg_type_info::get_base_vector_type): Ditto.
36691 (rvv_arg_type_info::get_tree_type): Ditto.
36692 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
36693 * config/riscv/riscv.md: Ditto.
36694 * config/riscv/vector-iterators.md (minu): Ditto.
36695 * config/riscv/vector.md (@pred_reduc_<reduc><mode><vlmul1>): New patern.
36696 (@pred_reduc_<reduc><mode><vlmul1_zve32>): Ditto.
36697 (@pred_widen_reduc_plus<v_su><mode><vwlmul1>): Ditto.
36698 (@pred_widen_reduc_plus<v_su><mode><vwlmul1_zve32>):Ditto.
36699 (@pred_reduc_plus<order><mode><vlmul1>): Ditto.
36700 (@pred_reduc_plus<order><mode><vlmul1_zve32>): Ditto.
36701 (@pred_widen_reduc_plus<order><mode><vwlmul1>): Ditto.
36703 2023-02-22 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
36705 * config/riscv/iterators.md: New iterator.
36706 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New class.
36707 (enum ternop_type): New enum.
36708 (class vmacc): New class.
36709 (class imac): Ditto.
36710 (class vnmsac): Ditto.
36711 (enum widen_ternop_type): New enum.
36712 (class vmadd): Ditto.
36713 (class vnmsub): Ditto.
36714 (class iwmac): Ditto.
36715 (class vwmacc): Ditto.
36716 (class vwmaccu): Ditto.
36717 (class vwmaccsu): Ditto.
36718 (class vwmaccus): Ditto.
36719 (class reverse_binop): Ditto.
36720 (class vfmacc): Ditto.
36721 (class vfnmsac): Ditto.
36722 (class vfmadd): Ditto.
36723 (class vfnmsub): Ditto.
36724 (class vfnmacc): Ditto.
36725 (class vfmsac): Ditto.
36726 (class vfnmadd): Ditto.
36727 (class vfmsub): Ditto.
36728 (class vfwmacc): Ditto.
36729 (class vfwnmacc): Ditto.
36730 (class vfwmsac): Ditto.
36731 (class vfwnmsac): Ditto.
36732 (class float_misc): Ditto.
36733 (class fcmp): Ditto.
36734 (class vfclass): Ditto.
36735 (class vfcvt_x): Ditto.
36736 (class vfcvt_rtz_x): Ditto.
36737 (class vfcvt_f): Ditto.
36738 (class vfwcvt_x): Ditto.
36739 (class vfwcvt_rtz_x): Ditto.
36740 (class vfwcvt_f): Ditto.
36741 (class vfncvt_x): Ditto.
36742 (class vfncvt_rtz_x): Ditto.
36743 (class vfncvt_f): Ditto.
36744 (class vfncvt_rod_f): Ditto.
36746 * config/riscv/riscv-vector-builtins-bases.h:
36747 * config/riscv/riscv-vector-builtins-functions.def (vzext): Ditto.
36791 (vfcvt_rtz_x): Ditto.
36792 (vfcvt_rtz_xu): Ditto.
36795 (vfwcvt_xu): Ditto.
36796 (vfwcvt_rtz_x): Ditto.
36797 (vfwcvt_rtz_xu): Ditto.
36800 (vfncvt_xu): Ditto.
36801 (vfncvt_rtz_x): Ditto.
36802 (vfncvt_rtz_xu): Ditto.
36804 (vfncvt_rod_f): Ditto.
36805 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
36806 (struct move_def): Ditto.
36807 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTF_OPS): New macro.
36808 (DEF_RVV_CONVERT_I_OPS): Ditto.
36809 (DEF_RVV_CONVERT_U_OPS): Ditto.
36810 (DEF_RVV_WCONVERT_I_OPS): Ditto.
36811 (DEF_RVV_WCONVERT_U_OPS): Ditto.
36812 (DEF_RVV_WCONVERT_F_OPS): Ditto.
36813 (vfloat64m1_t): Ditto.
36814 (vfloat64m2_t): Ditto.
36815 (vfloat64m4_t): Ditto.
36816 (vfloat64m8_t): Ditto.
36817 (vint32mf2_t): Ditto.
36818 (vint32m1_t): Ditto.
36819 (vint32m2_t): Ditto.
36820 (vint32m4_t): Ditto.
36821 (vint32m8_t): Ditto.
36822 (vint64m1_t): Ditto.
36823 (vint64m2_t): Ditto.
36824 (vint64m4_t): Ditto.
36825 (vint64m8_t): Ditto.
36826 (vuint32mf2_t): Ditto.
36827 (vuint32m1_t): Ditto.
36828 (vuint32m2_t): Ditto.
36829 (vuint32m4_t): Ditto.
36830 (vuint32m8_t): Ditto.
36831 (vuint64m1_t): Ditto.
36832 (vuint64m2_t): Ditto.
36833 (vuint64m4_t): Ditto.
36834 (vuint64m8_t): Ditto.
36835 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CONVERT_I_OPS): Ditto.
36836 (DEF_RVV_CONVERT_U_OPS): Ditto.
36837 (DEF_RVV_WCONVERT_I_OPS): Ditto.
36838 (DEF_RVV_WCONVERT_U_OPS): Ditto.
36839 (DEF_RVV_WCONVERT_F_OPS): Ditto.
36840 (DEF_RVV_F_OPS): Ditto.
36841 (DEF_RVV_WEXTF_OPS): Ditto.
36842 (required_extensions_p): Adjust for floating-point support.
36843 (check_required_extensions): Ditto.
36844 (unsigned_base_type_p): Ditto.
36845 (get_mode_for_bitsize): Ditto.
36846 (rvv_arg_type_info::get_base_vector_type): Ditto.
36847 (rvv_arg_type_info::get_tree_type): Ditto.
36848 * config/riscv/riscv-vector-builtins.def (v_f): New define.
36851 (xu_v): New define.
36853 (xu_w): New define.
36854 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): New enum.
36855 (function_expander::arg_mode): New function.
36856 * config/riscv/vector-iterators.md (sof): New iterator.
36862 (fixuns_trunc): Ditto.
36864 * config/riscv/vector.md (@pred_broadcast<mode>): New pattern.
36865 (@pred_<optab><mode>): Ditto.
36866 (@pred_<optab><mode>_scalar): Ditto.
36867 (@pred_<optab><mode>_reverse_scalar): Ditto.
36868 (@pred_<copysign><mode>): Ditto.
36869 (@pred_<copysign><mode>_scalar): Ditto.
36870 (@pred_mul_<optab><mode>): Ditto.
36871 (pred_mul_<optab><mode>_undef_merge): Ditto.
36872 (*pred_<madd_nmsub><mode>): Ditto.
36873 (*pred_<macc_nmsac><mode>): Ditto.
36874 (*pred_mul_<optab><mode>): Ditto.
36875 (@pred_mul_<optab><mode>_scalar): Ditto.
36876 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
36877 (*pred_<madd_nmsub><mode>_scalar): Ditto.
36878 (*pred_<macc_nmsac><mode>_scalar): Ditto.
36879 (*pred_mul_<optab><mode>_scalar): Ditto.
36880 (@pred_neg_mul_<optab><mode>): Ditto.
36881 (pred_neg_mul_<optab><mode>_undef_merge): Ditto.
36882 (*pred_<nmadd_msub><mode>): Ditto.
36883 (*pred_<nmacc_msac><mode>): Ditto.
36884 (*pred_neg_mul_<optab><mode>): Ditto.
36885 (@pred_neg_mul_<optab><mode>_scalar): Ditto.
36886 (*pred_neg_mul_<optab><mode>_undef_merge_scalar): Ditto.
36887 (*pred_<nmadd_msub><mode>_scalar): Ditto.
36888 (*pred_<nmacc_msac><mode>_scalar): Ditto.
36889 (*pred_neg_mul_<optab><mode>_scalar): Ditto.
36890 (@pred_<misc_op><mode>): Ditto.
36891 (@pred_class<mode>): Ditto.
36892 (@pred_dual_widen_<optab><mode>): Ditto.
36893 (@pred_dual_widen_<optab><mode>_scalar): Ditto.
36894 (@pred_single_widen_<plus_minus:optab><mode>): Ditto.
36895 (@pred_single_widen_<plus_minus:optab><mode>_scalar): Ditto.
36896 (@pred_widen_mul_<optab><mode>): Ditto.
36897 (@pred_widen_mul_<optab><mode>_scalar): Ditto.
36898 (@pred_widen_neg_mul_<optab><mode>): Ditto.
36899 (@pred_widen_neg_mul_<optab><mode>_scalar): Ditto.
36900 (@pred_cmp<mode>): Ditto.
36901 (*pred_cmp<mode>): Ditto.
36902 (*pred_cmp<mode>_narrow): Ditto.
36903 (@pred_cmp<mode>_scalar): Ditto.
36904 (*pred_cmp<mode>_scalar): Ditto.
36905 (*pred_cmp<mode>_scalar_narrow): Ditto.
36906 (@pred_eqne<mode>_scalar): Ditto.
36907 (*pred_eqne<mode>_scalar): Ditto.
36908 (*pred_eqne<mode>_scalar_narrow): Ditto.
36909 (@pred_merge<mode>_scalar): Ditto.
36910 (@pred_fcvt_x<v_su>_f<mode>): Ditto.
36911 (@pred_<fix_cvt><mode>): Ditto.
36912 (@pred_<float_cvt><mode>): Ditto.
36913 (@pred_widen_fcvt_x<v_su>_f<mode>): Ditto.
36914 (@pred_widen_<fix_cvt><mode>): Ditto.
36915 (@pred_widen_<float_cvt><mode>): Ditto.
36916 (@pred_extend<mode>): Ditto.
36917 (@pred_narrow_fcvt_x<v_su>_f<mode>): Ditto.
36918 (@pred_narrow_<fix_cvt><mode>): Ditto.
36919 (@pred_narrow_<float_cvt><mode>): Ditto.
36920 (@pred_trunc<mode>): Ditto.
36921 (@pred_rod_trunc<mode>): Ditto.
36923 2023-02-22 Jakub Jelinek <jakub@redhat.com>
36925 PR middle-end/106258
36926 * cgraph.cc (cgraph_edge::redirect_call_stmt_to_callee,
36927 cgraph_update_edges_for_call_stmt_node, cgraph_node::verify_node):
36928 Handle BUILT_IN_UNREACHABLE_TRAP like BUILT_IN_UNREACHABLE.
36929 * cgraphclones.cc (cgraph_node::create_clone): Likewise.
36931 2023-02-22 Thomas Schwinge <thomas@codesourcery.com>
36933 * common.opt (-Wcomplain-wrong-lang): New.
36934 * doc/invoke.texi (-Wno-complain-wrong-lang): Document it.
36935 * opts-common.cc (prune_options): Handle it.
36936 * opts-global.cc (complain_wrong_lang): Use it.
36938 2023-02-21 David Malcolm <dmalcolm@redhat.com>
36941 * doc/invoke.texi: Document -fno-analyzer-suppress-followups.
36943 2023-02-21 Max Filippov <jcmvbkbc@gmail.com>
36946 * config/xtensa/xtensa.cc (xtensa_expand_epilogue): Drop emit_use
36948 * config/xtensa/xtensa.md (sibcall, sibcall_internal)
36949 (sibcall_value, sibcall_value_internal): Add 'use' expression
36952 2023-02-21 Richard Biener <rguenther@suse.de>
36954 PR tree-optimization/108691
36955 * tree-ssa-dce.cc (eliminate_unnecessary_stmts): Remove
36956 assert about calls_setjmp not becoming true when it was false.
36958 2023-02-21 Richard Biener <rguenther@suse.de>
36960 PR tree-optimization/108793
36961 * tree-ssa-loop-niter.cc (number_of_iterations_until_wrap):
36962 Use convert operands to niter_type when computing num.
36964 2023-02-21 Richard Biener <rguenther@suse.de>
36967 2023-02-13 Richard Biener <rguenther@suse.de>
36969 PR tree-optimization/108691
36970 * tree-cfg.cc (notice_special_calls): When the CFG is built
36971 honor gimple_call_ctrl_altering_p.
36972 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
36973 temporarily if the call is not control-altering.
36974 * calls.cc (emit_call_1): Do not add REG_SETJMP if
36975 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
36977 2023-02-21 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
36979 * config/xtensa/xtensa.cc (xtensa_call_save_reg): Change to return
36980 true if register A0 (return address register) when -Og is specified.
36982 2023-02-20 Uroš Bizjak <ubizjak@gmail.com>
36984 * config/i386/predicates.md
36985 (general_x64constmem_operand): New predicate.
36986 * config/i386/i386.md (*cmpqi_ext<mode>_1):
36987 Use nonimm_x64constmem_operand.
36988 (*cmpqi_ext<mode>_3): Use general_x64constmem_operand.
36989 (*addqi_ext<mode>_1): Ditto.
36990 (*testqi_ext<mode>_1): Ditto.
36991 (*andqi_ext<mode>_1): Ditto.
36992 (*andqi_ext<mode>_1_cc): Ditto.
36993 (*<any_or:code>qi_ext<mode>_1): Ditto.
36994 (*xorqi_ext<mode>_1_cc): Ditto.
36996 2023-02-20 Jakub Jelinek <jakub2redhat.com>
36999 * config/rs6000/rs6000.md (umaddditi4): Swap gen_maddlddi4 with
37000 gen_umadddi4_highpart{,_le}.
37002 2023-02-20 Kito Cheng <kito.cheng@sifive.com>
37004 * config/riscv/riscv.md (prefetch): Use r instead of p for the
37006 (riscv_prefetchi_<mode>): Ditto.
37008 2023-02-20 Richard Biener <rguenther@suse.de>
37010 PR tree-optimization/108816
37011 * tree-vect-loop-manip.cc (vect_loop_versioning): Adjust
37012 versioning condition split prerequesite, assert required
37015 2023-02-20 Richard Biener <rguenther@suse.de>
37017 PR tree-optimization/108825
37018 * tree-ssa-loop-manip.cc (verify_loop_closed_ssa): For
37019 loop-local verfication only verify there's no pending SSA
37022 2023-02-20 Richard Biener <rguenther@suse.de>
37024 PR tree-optimization/108819
37025 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): Check
37026 we have an SSA name as iv_2 as expected.
37028 2023-02-18 Jakub Jelinek <jakub@redhat.com>
37030 PR tree-optimization/108819
37031 * tree-ssa-reassoc.cc (update_ops): Fold new stmt in place.
37033 2023-02-18 Jakub Jelinek <jakub@redhat.com>
37036 * config/i386/i386-protos.h (ix86_replace_reg_with_reg): Declare.
37037 * config/i386/i386-expand.cc (ix86_replace_reg_with_reg): New
37039 * config/i386/i386.md: Replace replace_rtx calls in all peephole2s
37040 with ix86_replace_reg_with_reg.
37042 2023-02-18 Gerald Pfeifer <gerald@pfeifer.com>
37044 * doc/invoke.texi (AVR Options): Update link to AVR-LibC.
37046 2023-02-18 Xi Ruoyao <xry111@xry111.site>
37048 * config.gcc (triplet_abi): Set its value based on $with_abi,
37049 instead of $target.
37050 (la_canonical_triplet): Set it after $triplet_abi is set
37052 * config/loongarch/t-linux (MULTILIB_OSDIRNAMES): Make the
37053 multiarch tuple for lp64d "loongarch64-linux-gnu" (without
37056 2023-02-18 Andrew Pinski <apinski@marvell.com>
37058 * match.pd: Remove #if GIMPLE around the
37061 2023-02-18 Andrew Pinski <apinski@marvell.com>
37063 * value-query.h (get_range_query): Return the global ranges
37064 for a nullptr func.
37066 2023-02-17 Siddhesh Poyarekar <siddhesh@gotplt.org>
37068 * doc/invoke.texi (@item -Wall): Fix typo in
37071 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
37074 * config/i386/predicates.md
37075 (nonimm_x64constmem_operand): New predicate.
37076 * config/i386/i386.md (*addqi_ext<mode>_0): New insn pattern.
37077 (*subqi_ext<mode>_0): Ditto.
37078 (*andqi_ext<mode>_0): Ditto.
37079 (*<any_or:code>qi_ext<mode>_0): Ditto.
37081 2023-02-17 Uroš Bizjak <ubizjak@gmail.com>
37084 * simplify-rtx.cc (simplify_context::simplify_subreg): Use
37085 int_outermode instead of GET_MODE (tem) to prevent
37086 VOIDmode from entering simplify_gen_subreg.
37088 2023-02-17 Richard Biener <rguenther@suse.de>
37090 PR tree-optimization/108821
37091 * tree-ssa-loop-im.cc (sm_seq_valid_bb): We can also not
37092 move volatile accesses.
37094 2023-02-17 Richard Biener <rguenther@suse.de>
37096 * tree-ssa.cc (ssa_undefined_value_p): Assert we are not
37097 called on virtual operands.
37098 * tree-ssa-sccvn.cc (vn_phi_lookup): Guard
37099 ssa_undefined_value_p calls.
37100 (vn_phi_insert): Likewise.
37101 (set_ssa_val_to): Likewise.
37102 (visit_phi): Avoid extra work with equivalences for
37103 virtual operand PHIs.
37105 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37107 * config/riscv/riscv-vector-builtins-bases.cc (class mask_logic): New
37109 (class mask_nlogic): Ditto.
37110 (class mask_notlogic): Ditto.
37111 (class vmmv): Ditto.
37112 (class vmclr): Ditto.
37113 (class vmset): Ditto.
37114 (class vmnot): Ditto.
37115 (class vcpop): Ditto.
37116 (class vfirst): Ditto.
37117 (class mask_misc): Ditto.
37118 (class viota): Ditto.
37119 (class vid): Ditto.
37121 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37122 * config/riscv/riscv-vector-builtins-functions.def (vmand): Ditto.
37141 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Ditto.
37142 (struct mask_alu_def): Ditto.
37144 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37145 * config/riscv/riscv-vector-builtins.cc: Ditto.
37146 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::cleanup_insns): Fix bug
37147 for dest it scalar RVV intrinsics.
37148 * config/riscv/vector-iterators.md (sof): New iterator.
37149 * config/riscv/vector.md (@pred_<optab>n<mode>): New pattern.
37150 (@pred_<optab>not<mode>): New pattern.
37151 (@pred_popcount<VB:mode><P:mode>): New pattern.
37152 (@pred_ffs<VB:mode><P:mode>): New pattern.
37153 (@pred_<misc_op><mode>): New pattern.
37154 (@pred_iota<mode>): New pattern.
37155 (@pred_series<mode>): New pattern.
37157 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37159 * config/riscv/riscv-vector-builtins-functions.def (vadc): Rename.
37163 * config/riscv/riscv-vector-builtins.cc: Ditto.
37165 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37166 kito-cheng <kito.cheng@sifive.com>
37168 * config/riscv/riscv-protos.h (sew64_scalar_helper): New function.
37169 * config/riscv/riscv-v.cc (has_vi_variant_p): Adjust.
37170 (sew64_scalar_helper): New function.
37171 * config/riscv/vector.md: Normalization.
37173 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37175 * config/riscv/riscv-vector-builtins-functions.def (vsetvlmax): Rearrange.
37237 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37239 * config/riscv/vector.md (@pred_<optab><mode>): Rearrange.
37240 (@pred_<optab><mode>_scalar): Ditto.
37241 (*pred_<optab><mode>_scalar): Ditto.
37242 (*pred_<optab><mode>_extended_scalar): Ditto.
37244 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37246 * config/riscv/riscv-protos.h (riscv_run_selftests): Remove 'extern'.
37247 (init_builtins): Ditto.
37248 (mangle_builtin_type): Ditto.
37249 (verify_type_context): Ditto.
37250 (handle_pragma_vector): Ditto.
37251 (builtin_decl): Ditto.
37252 (expand_builtin): Ditto.
37253 (const_vec_all_same_in_range_p): Ditto.
37254 (legitimize_move): Ditto.
37255 (emit_vlmax_op): Ditto.
37256 (emit_nonvlmax_op): Ditto.
37257 (get_vlmul): Ditto.
37258 (get_ratio): Ditto.
37261 (get_avl_type): Ditto.
37262 (calculate_ratio): Ditto.
37263 (enum vlmul_type): Ditto.
37265 (neg_simm5_p): Ditto.
37266 (has_vi_variant_p): Ditto.
37268 2023-02-17 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37270 * config/riscv/riscv-protos.h (simm32_p): Remove.
37271 * config/riscv/riscv-v.cc (simm32_p): Ditto.
37272 * config/riscv/vector.md: Use immediate_operand
37273 instead of riscv_vector::simm32_p.
37275 2023-02-16 Gerald Pfeifer <gerald@pfeifer.com>
37277 * doc/invoke.texi (Optimize Options): Reword the explanation
37278 getting minimal, maximal and default values of a parameter.
37280 2023-02-16 Patrick Palka <ppalka@redhat.com>
37282 * addresses.h: Mechanically drop 'static' from 'static inline'
37283 functions via s/^static inline/inline/g.
37284 * asan.h: Likewise.
37285 * attribs.h: Likewise.
37286 * basic-block.h: Likewise.
37287 * bitmap.h: Likewise.
37288 * cfghooks.h: Likewise.
37289 * cfgloop.h: Likewise.
37290 * cgraph.h: Likewise.
37291 * cselib.h: Likewise.
37292 * data-streamer.h: Likewise.
37293 * debug.h: Likewise.
37295 * diagnostic.h: Likewise.
37296 * dominance.h: Likewise.
37297 * dumpfile.h: Likewise.
37298 * emit-rtl.h: Likewise.
37299 * except.h: Likewise.
37300 * expmed.h: Likewise.
37301 * expr.h: Likewise.
37302 * fixed-value.h: Likewise.
37303 * gengtype.h: Likewise.
37304 * gimple-expr.h: Likewise.
37305 * gimple-iterator.h: Likewise.
37306 * gimple-predict.h: Likewise.
37307 * gimple-range-fold.h: Likewise.
37308 * gimple-ssa.h: Likewise.
37309 * gimple.h: Likewise.
37310 * graphite.h: Likewise.
37311 * hard-reg-set.h: Likewise.
37312 * hash-map.h: Likewise.
37313 * hash-set.h: Likewise.
37314 * hash-table.h: Likewise.
37315 * hwint.h: Likewise.
37316 * input.h: Likewise.
37317 * insn-addr.h: Likewise.
37318 * internal-fn.h: Likewise.
37319 * ipa-fnsummary.h: Likewise.
37320 * ipa-icf-gimple.h: Likewise.
37321 * ipa-inline.h: Likewise.
37322 * ipa-modref.h: Likewise.
37323 * ipa-prop.h: Likewise.
37324 * ira-int.h: Likewise.
37326 * lra-int.h: Likewise.
37328 * lto-streamer.h: Likewise.
37329 * memmodel.h: Likewise.
37330 * omp-general.h: Likewise.
37331 * optabs-query.h: Likewise.
37332 * optabs.h: Likewise.
37333 * plugin.h: Likewise.
37334 * pretty-print.h: Likewise.
37335 * range.h: Likewise.
37336 * read-md.h: Likewise.
37337 * recog.h: Likewise.
37338 * regs.h: Likewise.
37339 * rtl-iter.h: Likewise.
37341 * sbitmap.h: Likewise.
37342 * sched-int.h: Likewise.
37343 * sel-sched-ir.h: Likewise.
37344 * sese.h: Likewise.
37345 * sparseset.h: Likewise.
37346 * ssa-iterators.h: Likewise.
37347 * system.h: Likewise.
37348 * target-globals.h: Likewise.
37349 * target.h: Likewise.
37350 * timevar.h: Likewise.
37351 * tree-chrec.h: Likewise.
37352 * tree-data-ref.h: Likewise.
37353 * tree-iterator.h: Likewise.
37354 * tree-outof-ssa.h: Likewise.
37355 * tree-phinodes.h: Likewise.
37356 * tree-scalar-evolution.h: Likewise.
37357 * tree-sra.h: Likewise.
37358 * tree-ssa-alias.h: Likewise.
37359 * tree-ssa-live.h: Likewise.
37360 * tree-ssa-loop-manip.h: Likewise.
37361 * tree-ssa-loop.h: Likewise.
37362 * tree-ssa-operands.h: Likewise.
37363 * tree-ssa-propagate.h: Likewise.
37364 * tree-ssa-sccvn.h: Likewise.
37365 * tree-ssa.h: Likewise.
37366 * tree-ssanames.h: Likewise.
37367 * tree-streamer.h: Likewise.
37368 * tree-switch-conversion.h: Likewise.
37369 * tree-vectorizer.h: Likewise.
37370 * tree.h: Likewise.
37371 * wide-int.h: Likewise.
37373 2023-02-16 Jakub Jelinek <jakub@redhat.com>
37375 PR tree-optimization/108657
37376 * tree-ssa-dse.cc (initialize_ao_ref_for_dse): If lhs of stmt
37377 exists and is not a SSA_NAME, call ao_ref_init even if the stmt
37378 is a call to internal or builtin function.
37380 2023-02-16 Jonathan Wakely <jwakely@redhat.com>
37382 * doc/invoke.texi (C++ Dialect Options): Suggest adding a
37383 using-declaration to unhide functions.
37385 2023-02-16 Jakub Jelinek <jakub@redhat.com>
37387 PR tree-optimization/108783
37388 * tree-ssa-reassoc.cc (eliminate_redundant_comparison): If lcode
37389 is equal to TREE_CODE (t), op1 to newop1 and op2 to newop2, set
37390 t to curr->op. Otherwise, punt if either newop1 or newop2 are
37391 SSA_NAME_OCCURS_IN_ABNORMAL_PHI SSA_NAMEs.
37393 2023-02-16 Richard Biener <rguenther@suse.de>
37395 PR tree-optimization/108791
37396 * tree-ssa-forwprop.cc (optimize_vector_load): Build
37397 the ADDR_EXPR of a TARGET_MEM_REF using a more meaningful
37400 2023-02-15 Eric Botcazou <ebotcazou@adacore.com>
37403 * config/i386/i386.cc (ix86_compute_frame_layout): Disable the
37404 effects of -fstack-clash-protection for TARGET_STACK_PROBE.
37405 (ix86_expand_prologue): Likewise.
37407 2023-02-15 Jan-Benedict Glaw <jbglaw@lug-owl.de>
37409 * config/bpf/bpf.cc (bpf_option_override): Fix doubled space.
37411 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
37413 * config/i386/i386.md (*cmpqi_ext<mode>_1): Use
37414 int248_register_operand predicate in zero_extract sub-RTX.
37415 (*cmpqi_ext<mode>_2): Ditto.
37416 (*cmpqi_ext<mode>_3): Ditto.
37417 (*cmpqi_ext<mode>_4): Ditto.
37418 (*extzvqi_mem_rex64): Ditto.
37420 (*insvqi_1_mem_rex64): Ditto.
37421 (@insv<mode>_1): Ditto.
37422 (*insvqi_1): Ditto.
37423 (*insvqi_2): Ditto.
37424 (*insvqi_3): Ditto.
37425 (*extendqi<SWI24:mode>_ext_1): Ditto.
37426 (*addqi_ext<mode>_1): Ditto.
37427 (*addqi_ext<mode>_2): Ditto.
37428 (*subqi_ext<mode>_2): Ditto.
37429 (*testqi_ext<mode>_1): Ditto.
37430 (*testqi_ext<mode>_2): Ditto.
37431 (*andqi_ext<mode>_1): Ditto.
37432 (*andqi_ext<mode>_1_cc): Ditto.
37433 (*andqi_ext<mode>_2): Ditto.
37434 (*<any_or:code>qi_ext<mode>_1): Ditto.
37435 (*<any_or:code>qi_ext<mode>_2): Ditto.
37436 (*xorqi_ext<mode>_1_cc): Ditto.
37437 (*negqi_ext<mode>_2): Ditto.
37438 (*ashlqi_ext<mode>_2): Ditto.
37439 (*<any_shiftrt:insn>qi_ext<mode>_2): Ditto.
37441 2023-02-15 Uroš Bizjak <ubizjak@gmail.com>
37443 * config/i386/predicates.md (int248_register_operand):
37444 Rename from extr_register_operand.
37445 * config/i386/i386.md (*extv<mode>): Update for renamed predicate.
37446 (*extzx<mode>): Ditto.
37447 (*ashl<dwi>3_doubleword_mask): Use int248_register_operand predicate.
37448 (*ashl<mode>3_mask): Ditto.
37449 (*<any_shiftrt:insn><mode>3_mask): Ditto.
37450 (*<any_shiftrt:insn><dwi>3_doubleword_mask): Ditto.
37451 (*<any_rotate:insn><mode>3_mask): Ditto.
37452 (*<btsc><mode>_mask): Ditto.
37453 (*btr<mode>_mask): Ditto.
37454 (*jcc_bt<mode>_mask_1): Ditto.
37456 2023-02-15 Richard Biener <rguenther@suse.de>
37458 PR middle-end/26854
37459 * df-core.cc (df_worklist_propagate_forward): Put later
37460 blocks on worklist and only earlier blocks on pending.
37461 (df_worklist_propagate_backward): Likewise.
37462 (df_worklist_dataflow_doublequeue): Change the iteration
37463 to process new blocks in the same iteration if that
37464 maintains the iteration order.
37466 2023-02-15 Marek Polacek <polacek@redhat.com>
37468 PR middle-end/106080
37469 * gimple-ssa-warn-access.cc (is_auto_decl): Remove. Use auto_var_p
37472 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37474 * config/riscv/predicates.md: Refine codes.
37475 * config/riscv/riscv-protos.h (RVV_VUNDEF): New macro.
37476 * config/riscv/riscv-v.cc: Refine codes.
37477 * config/riscv/riscv-vector-builtins-bases.cc (enum ternop_type): New
37479 (class imac): New class.
37480 (enum widen_ternop_type): New enum.
37481 (class iwmac): New class.
37483 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37484 * config/riscv/riscv-vector-builtins-functions.def (vmacc): Ditto.
37492 * config/riscv/riscv-vector-builtins.cc
37493 (function_builder::apply_predication): Adjust for multiply-add support.
37494 (function_expander::add_vundef_operand): Refine codes.
37495 (function_expander::use_ternop_insn): New function.
37496 (function_expander::use_widen_ternop_insn): Ditto.
37497 * config/riscv/riscv-vector-builtins.h: New function.
37498 * config/riscv/vector.md (@pred_mul_<optab><mode>): New pattern.
37499 (pred_mul_<optab><mode>_undef_merge): Ditto.
37500 (*pred_<madd_nmsub><mode>): Ditto.
37501 (*pred_<macc_nmsac><mode>): Ditto.
37502 (*pred_mul_<optab><mode>): Ditto.
37503 (@pred_mul_<optab><mode>_scalar): Ditto.
37504 (*pred_mul_<optab><mode>_undef_merge_scalar): Ditto.
37505 (*pred_<madd_nmsub><mode>_scalar): Ditto.
37506 (*pred_<macc_nmsac><mode>_scalar): Ditto.
37507 (*pred_mul_<optab><mode>_scalar): Ditto.
37508 (*pred_mul_<optab><mode>_undef_merge_extended_scalar): Ditto.
37509 (*pred_<madd_nmsub><mode>_extended_scalar): Ditto.
37510 (*pred_<macc_nmsac><mode>_extended_scalar): Ditto.
37511 (*pred_mul_<optab><mode>_extended_scalar): Ditto.
37512 (@pred_widen_mul_plus<su><mode>): Ditto.
37513 (@pred_widen_mul_plus<su><mode>_scalar): Ditto.
37514 (@pred_widen_mul_plussu<mode>): Ditto.
37515 (@pred_widen_mul_plussu<mode>_scalar): Ditto.
37516 (@pred_widen_mul_plusus<mode>_scalar): Ditto.
37518 2023-02-15 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37520 * config/riscv/predicates.md (vector_mask_operand): Refine the codes.
37521 (vector_all_trues_mask_operand): New predicate.
37522 (vector_undef_operand): New predicate.
37523 (ltge_operator): New predicate.
37524 (comparison_except_ltge_operator): New predicate.
37525 (comparison_except_eqge_operator): New predicate.
37526 (ge_operator): New predicate.
37527 * config/riscv/riscv-v.cc (has_vi_variant_p): Add compare support.
37528 * config/riscv/riscv-vector-builtins-bases.cc (class icmp): New class.
37530 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37531 * config/riscv/riscv-vector-builtins-functions.def (vmseq): Ditto.
37541 * config/riscv/riscv-vector-builtins-shapes.cc
37542 (struct return_mask_def): Adjust for compare support.
37543 * config/riscv/riscv-vector-builtins.cc
37544 (function_expander::use_compare_insn): New function.
37545 * config/riscv/riscv-vector-builtins.h
37546 (function_expander::add_integer_operand): Ditto.
37547 * config/riscv/riscv.cc (riscv_print_operand): Add compare support.
37548 * config/riscv/riscv.md: Add vector min/max attributes.
37549 * config/riscv/vector-iterators.md (xnor): New iterator.
37550 * config/riscv/vector.md (@pred_cmp<mode>): New pattern.
37551 (*pred_cmp<mode>): Ditto.
37552 (*pred_cmp<mode>_narrow): Ditto.
37553 (@pred_ltge<mode>): Ditto.
37554 (*pred_ltge<mode>): Ditto.
37555 (*pred_ltge<mode>_narrow): Ditto.
37556 (@pred_cmp<mode>_scalar): Ditto.
37557 (*pred_cmp<mode>_scalar): Ditto.
37558 (*pred_cmp<mode>_scalar_narrow): Ditto.
37559 (@pred_eqne<mode>_scalar): Ditto.
37560 (*pred_eqne<mode>_scalar): Ditto.
37561 (*pred_eqne<mode>_scalar_narrow): Ditto.
37562 (*pred_cmp<mode>_extended_scalar): Ditto.
37563 (*pred_cmp<mode>_extended_scalar_narrow): Ditto.
37564 (*pred_eqne<mode>_extended_scalar): Ditto.
37565 (*pred_eqne<mode>_extended_scalar_narrow): Ditto.
37566 (@pred_ge<mode>_scalar): Ditto.
37567 (@pred_<optab><mode>): Ditto.
37568 (@pred_n<optab><mode>): Ditto.
37569 (@pred_<optab>n<mode>): Ditto.
37570 (@pred_not<mode>): Ditto.
37572 2023-02-15 Martin Jambor <mjambor@suse.cz>
37575 * ipa-sra.cc (push_param_adjustments_for_index): Do not omit
37576 creation of non-scalar replacements even if IPA-CP knows their
37579 2023-02-15 Jakub Jelinek <jakub@redhat.com>
37583 * config/rs6000/rs6000.md (<u>maddditi4): Change into umaddditi4 only
37584 expander, change operand 3 to be TImode, emit maddlddi4 and
37585 umadddi4_highpart{,_le} with its low half and finally add the high
37586 half to the result.
37588 2023-02-15 Martin Liska <mliska@suse.cz>
37590 * doc/invoke.texi: Document --param=asan-kernel-mem-intrinsic-prefix.
37592 2023-02-15 Richard Biener <rguenther@suse.de>
37594 * sanopt.cc (sanitize_asan_mark_unpoison): Use bitmap
37595 for with_poison and alias worklist to it.
37596 (sanitize_asan_mark_poison): Likewise.
37598 2023-02-15 Richard Biener <rguenther@suse.de>
37601 * config/i386/i386-features.cc (scalar_chain::add_to_queue):
37602 Combine bitmap test and set.
37603 (scalar_chain::add_insn): Likewise.
37604 (scalar_chain::analyze_register_chain): Remove redundant
37605 attempt to add to queue and instead strengthen assert.
37606 Sink common attempts to mark the def dual-mode.
37607 (scalar_chain::add_to_queue): Remove redundant insn bitmap
37610 2023-02-15 Richard Biener <rguenther@suse.de>
37613 * config/i386/i386-features.cc (convert_scalars_to_vector):
37614 Switch candidates bitmaps to tree view before building the chains.
37616 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
37618 * reload1.cc (gen_reload): Correct rtx parameter for fatal_insn
37619 "failure trying to reload" call.
37621 2023-02-15 Hans-Peter Nilsson <hp@axis.com>
37623 * gdbinit.in (phrs): New command.
37624 * sel-sched-dump.cc (debug_hard_reg_set): Remove debug-function.
37625 * ira-color.cc (debug_hard_reg_set): New, calling print_hard_reg_set.
37627 2023-02-14 David Faust <david.faust@oracle.com>
37630 * config/bpf/constraints.md (q): New memory constraint.
37631 * config/bpf/bpf.md (zero_extendhidi2): Use it here.
37632 (zero_extendqidi2): Likewise.
37633 (zero_extendsidi2): Likewise.
37634 (*mov<MM:mode>): Likewise.
37636 2023-02-14 Andrew Pinski <apinski@marvell.com>
37638 PR tree-optimization/108355
37639 PR tree-optimization/96921
37640 * match.pd: Add pattern for "1 - bool_val".
37642 2023-02-14 Richard Biener <rguenther@suse.de>
37644 * tree-ssa-sccvn.cc (vn_phi_compute_hash): Key skipping
37645 basic block index hashing on the availability of ->cclhs.
37646 (vn_phi_eq): Avoid re-doing sanity checks for CSE but
37647 rely on ->cclhs availability.
37648 (vn_phi_lookup): Set ->cclhs only when we are eventually
37649 going to CSE the PHI.
37650 (vn_phi_insert): Likewise.
37652 2023-02-14 Eric Botcazou <ebotcazou@adacore.com>
37654 * gimplify.cc (gimplify_save_expr): Add missing guard.
37656 2023-02-14 Richard Biener <rguenther@suse.de>
37658 PR tree-optimization/108782
37659 * tree-vect-loop.cc (vect_phi_first_order_recurrence_p):
37660 Make sure we're not vectorizing an inner loop.
37662 2023-02-14 Jakub Jelinek <jakub@redhat.com>
37664 PR sanitizer/108777
37665 * params.opt (-param=asan-kernel-mem-intrinsic-prefix=): New param.
37666 * asan.h (asan_memfn_rtl): Declare.
37667 * asan.cc (asan_memfn_rtls): New variable.
37668 (asan_memfn_rtl): New function.
37669 * builtins.cc (expand_builtin): If
37670 param_asan_kernel_mem_intrinsic_prefix and function is
37671 kernel-{,hw}address sanitized, emit calls to
37672 __{,hw}asan_{memcpy,memmove,memset} rather than
37673 {memcpy,memmove,memset}. Use sanitize_flags_p (SANITIZE_ADDRESS)
37674 instead of flag_sanitize & SANITIZE_ADDRESS to check if
37675 asan_intercepted_p functions shouldn't be expanded inline.
37677 2023-02-14 Richard Sandiford <richard.sandiford@arm.com>
37679 PR tree-optimization/96373
37680 * tree-vect-stmts.cc (vectorizable_operation): Predicate trapping
37681 operations on the loop mask. Reject partial vectors if this isn't
37684 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
37686 PR rtl-optimization/108681
37687 * lra-spills.cc (lra_final_code_change): Extend subreg replacement
37688 code to handle bare uses and clobbers.
37690 2023-02-13 Vladimir N. Makarov <vmakarov@redhat.com>
37692 * ira.cc (ira_update_equiv_info_by_shuffle_insn): Clear equiv
37693 caller_save_p flag when clearing defined_p flag.
37694 (setup_reg_equiv): Ditto.
37695 * lra-constraints.cc (lra_constraints): Ditto.
37697 2023-02-13 Uroš Bizjak <ubizjak@gmail.com>
37700 * config/i386/predicates.md (extr_register_operand):
37701 New special predicate.
37702 * config/i386/i386.md (*extv<mode>): Use extr_register_operand
37703 as operand 1 predicate.
37704 (*exzv<mode>): Ditto.
37705 (*extendqi<SWI24:mode>_ext_1): New insn pattern.
37707 2023-02-13 Richard Biener <rguenther@suse.de>
37709 PR tree-optimization/28614
37710 * tree-ssa-sccvn.cc (can_track_predicate_on_edge): Avoid
37711 walking all edges in most cases.
37712 (vn_nary_op_insert_pieces_predicated): Avoid repeated
37713 calls to can_track_predicate_on_edge unless checking is
37715 (process_bb): Instead call it once here for each edge
37716 we register possibly multiple predicates on.
37718 2023-02-13 Richard Biener <rguenther@suse.de>
37720 PR tree-optimization/108691
37721 * tree-cfg.cc (notice_special_calls): When the CFG is built
37722 honor gimple_call_ctrl_altering_p.
37723 * cfgexpand.cc (expand_call_stmt): Clear cfun->calls_setjmp
37724 temporarily if the call is not control-altering.
37725 * calls.cc (emit_call_1): Do not add REG_SETJMP if
37726 cfun->calls_setjmp is not set. Do not alter cfun->calls_setjmp.
37728 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
37731 * config/s390/s390.cc (s390_bb_fallthru_entry_likely): Remove.
37732 (struct s390_sched_state): Initialise to zero.
37733 (s390_sched_variable_issue): For better debuggability also emit
37735 (s390_sched_init): Unconditionally reset scheduler state.
37737 2023-02-13 Richard Sandiford <richard.sandiford@arm.com>
37739 * ifcvt.h (noce_if_info::cond_inverted): New field.
37740 * ifcvt.cc (cond_move_convert_if_block): Swap the then and else
37741 values when cond_inverted is true.
37742 (noce_find_if_block): Allow the condition to be inverted when
37743 handling conditional moves.
37745 2023-02-13 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
37747 * config/s390/predicates.md (execute_operation): Use
37748 constrain_operands instead of extract_constrain_insn in order to
37749 determine wheter there exists a valid alternative.
37751 2023-02-13 Claudiu Zissulescu <claziss@gmail.com>
37753 * common/config/arc/arc-common.cc (arc_option_optimization_table):
37754 Remove millicode from list.
37756 2023-02-13 Martin Liska <mliska@suse.cz>
37758 * doc/invoke.texi: Document ira-simple-lra-insn-threshold.
37760 2023-02-13 Richard Biener <rguenther@suse.de>
37762 PR tree-optimization/106722
37763 * tree-ssa-dce.cc (mark_last_stmt_necessary): Return
37764 whether we marked a stmt.
37765 (mark_control_dependent_edges_necessary): When
37766 mark_last_stmt_necessary didn't mark any stmt make sure
37767 to mark its control dependent edges.
37768 (propagate_necessity): Likewise.
37770 2023-02-13 Kito Cheng <kito.cheng@sifive.com>
37772 * config/riscv/riscv.h (RISCV_DWARF_VLENB): New.
37773 (DWARF_FRAME_REGISTERS): New.
37774 (DWARF_REG_TO_UNWIND_COLUMN): New.
37776 2023-02-12 Gerald Pfeifer <gerald@pfeifer.com>
37778 * doc/sourcebuild.texi: Remove (broken) direct reference to
37779 "The GNU configure and build system".
37781 2023-02-12 Jin Ma <jinma@linux.alibaba.com>
37783 * config/riscv/riscv.cc (riscv_adjust_libcall_cfi_prologue): Change
37784 gen_add3_insn to gen_rtx_SET.
37785 (riscv_adjust_libcall_cfi_epilogue): Likewise.
37787 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37789 * config/riscv/riscv-vector-builtins-bases.cc (class sat_op): New class.
37790 (class vnclip): Ditto.
37792 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37793 * config/riscv/riscv-vector-builtins-functions.def (vaadd): Ditto.
37802 * config/riscv/vector-iterators.md (su): Add instruction.
37805 * config/riscv/vector.md (@pred_<sat_op><mode>): New pattern.
37806 (@pred_<sat_op><mode>_scalar): Ditto.
37807 (*pred_<sat_op><mode>_scalar): Ditto.
37808 (*pred_<sat_op><mode>_extended_scalar): Ditto.
37809 (@pred_narrow_clip<v_su><mode>): Ditto.
37810 (@pred_narrow_clip<v_su><mode>_scalar): Ditto.
37812 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37814 * config/riscv/constraints.md (Wbr): Remove unused constraint.
37815 * config/riscv/predicates.md: Fix move operand predicate.
37816 * config/riscv/riscv-vector-builtins-bases.cc (class vnshift): New class.
37817 (class vncvt_x): Ditto.
37818 (class vmerge): Ditto.
37819 (class vmv_v): Ditto.
37821 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37822 * config/riscv/riscv-vector-builtins-functions.def (vsra): Ditto.
37829 * config/riscv/riscv-vector-builtins-shapes.cc (struct narrow_alu_def): Ditto.
37830 (struct move_def): Ditto.
37832 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37833 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): New variable.
37834 (DEF_RVV_WEXTU_OPS): Ditto
37835 * config/riscv/riscv-vector-builtins.def (x_x_w): Fix type for suffix.
37840 * config/riscv/riscv.cc (riscv_print_operand): Refine ASM printting rule.
37841 * config/riscv/vector-iterators.md (nmsac):New iterator.
37842 (nmsub): New iterator.
37843 * config/riscv/vector.md (@pred_merge<mode>): New pattern.
37844 (@pred_merge<mode>_scalar): New pattern.
37845 (*pred_merge<mode>_scalar): New pattern.
37846 (*pred_merge<mode>_extended_scalar): New pattern.
37847 (@pred_narrow_<optab><mode>): New pattern.
37848 (@pred_narrow_<optab><mode>_scalar): New pattern.
37849 (@pred_trunc<mode>): New pattern.
37851 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37853 * config/riscv/riscv-vector-builtins-bases.cc (class vmadc): New class.
37854 (class vmsbc): Ditto.
37855 (BASE): Define new class.
37856 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37857 * config/riscv/riscv-vector-builtins-functions.def (vmadc): New define.
37859 * config/riscv/riscv-vector-builtins-shapes.cc (struct return_mask_def):
37862 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37863 * config/riscv/riscv-vector-builtins.cc
37864 (function_expander::use_exact_insn): Adjust for new support
37865 * config/riscv/riscv-vector-builtins.h
37866 (function_base::has_merge_operand_p): New function.
37867 * config/riscv/vector-iterators.md: New iterator.
37868 * config/riscv/vector.md (@pred_madc<mode>): New pattern.
37869 (@pred_msbc<mode>): Ditto.
37870 (@pred_madc<mode>_scalar): Ditto.
37871 (@pred_msbc<mode>_scalar): Ditto.
37872 (*pred_madc<mode>_scalar): Ditto.
37873 (*pred_madc<mode>_extended_scalar): Ditto.
37874 (*pred_msbc<mode>_scalar): Ditto.
37875 (*pred_msbc<mode>_extended_scalar): Ditto.
37876 (@pred_madc<mode>_overflow): Ditto.
37877 (@pred_msbc<mode>_overflow): Ditto.
37878 (@pred_madc<mode>_overflow_scalar): Ditto.
37879 (@pred_msbc<mode>_overflow_scalar): Ditto.
37880 (*pred_madc<mode>_overflow_scalar): Ditto.
37881 (*pred_madc<mode>_overflow_extended_scalar): Ditto.
37882 (*pred_msbc<mode>_overflow_scalar): Ditto.
37883 (*pred_msbc<mode>_overflow_extended_scalar): Ditto.
37885 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37887 * config/riscv/riscv-protos.h (simm5_p): Add vadc/vsbc support.
37888 * config/riscv/riscv-v.cc (simm32_p): Ditto.
37889 * config/riscv/riscv-vector-builtins-bases.cc (class vadc): New class.
37890 (class vsbc): Ditto.
37892 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37893 * config/riscv/riscv-vector-builtins-functions.def (vadc): Ditto.
37895 * config/riscv/riscv-vector-builtins-shapes.cc
37896 (struct no_mask_policy_def): Ditto.
37898 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
37899 * config/riscv/riscv-vector-builtins.cc
37900 (rvv_arg_type_info::get_base_vector_type): Add vadc/vsbc support.
37901 (rvv_arg_type_info::get_tree_type): Ditto.
37902 (function_expander::use_exact_insn): Ditto.
37903 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
37904 (function_base::use_mask_predication_p): New function.
37905 * config/riscv/vector-iterators.md: New iterator.
37906 * config/riscv/vector.md (@pred_adc<mode>): New pattern.
37907 (@pred_sbc<mode>): Ditto.
37908 (@pred_adc<mode>_scalar): Ditto.
37909 (@pred_sbc<mode>_scalar): Ditto.
37910 (*pred_adc<mode>_scalar): Ditto.
37911 (*pred_adc<mode>_extended_scalar): Ditto.
37912 (*pred_sbc<mode>_scalar): Ditto.
37913 (*pred_sbc<mode>_extended_scalar): Ditto.
37915 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37917 * config/riscv/vector.md: use "zero" reg.
37919 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37921 * config/riscv/riscv-vector-builtins-bases.cc (class widen_binop): New
37923 (class vwmulsu): Ditto.
37924 (class vwcvt): Ditto.
37925 (BASE): Add integer widening support.
37926 * config/riscv/riscv-vector-builtins-bases.h: Ditto
37927 * config/riscv/riscv-vector-builtins-functions.def (vwadd): New class.
37928 (vwsub): New class.
37929 (vwmul): New class.
37930 (vwmulu): New class.
37931 (vwmulsu): New class.
37932 (vwaddu): New class.
37933 (vwsubu): New class.
37934 (vwcvt_x): New class.
37935 (vwcvtu_x): New class.
37936 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): New
37938 (struct widen_alu_def): New class.
37939 (SHAPE): New class.
37940 * config/riscv/riscv-vector-builtins-shapes.h: New class.
37941 * config/riscv/riscv-vector-builtins.cc
37942 (rvv_arg_type_info::get_base_vector_type): Add integer widening support.
37943 (rvv_arg_type_info::get_tree_type): Ditto.
37944 * config/riscv/riscv-vector-builtins.def (x_x_v): Change into "x_v"
37946 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add integer
37948 * config/riscv/riscv-vsetvl.cc (change_insn): Fix reg_equal use bug.
37949 * config/riscv/riscv.h (X0_REGNUM): New constant.
37950 * config/riscv/vector-iterators.md: New iterators.
37951 * config/riscv/vector.md
37952 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>): New
37954 (@pred_dual_widen_<any_widen_binop:optab><any_extend:su><mode>_scalar):
37956 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>): Ditto.
37957 (@pred_single_widen_<plus_minus:optab><any_extend:su><mode>_scalar):
37959 (@pred_widen_mulsu<mode>): Ditto.
37960 (@pred_widen_mulsu<mode>_scalar): Ditto.
37961 (@pred_<optab><mode>): Ditto.
37963 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
37964 kito-cheng <kito.cheng@sifive.com>
37966 * common/config/riscv/riscv-common.cc: Add flag for 'V' extension.
37967 * config/riscv/riscv-vector-builtins-bases.cc (class vmulh): New class.
37969 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
37970 * config/riscv/riscv-vector-builtins-functions.def (vmulh): Add vmulh
37974 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_FULL_V_I_OPS):
37976 (DEF_RVV_FULL_V_U_OPS): Ditto.
37977 (vint8mf8_t): Ditto.
37978 (vint8mf4_t): Ditto.
37979 (vint8mf2_t): Ditto.
37980 (vint8m1_t): Ditto.
37981 (vint8m2_t): Ditto.
37982 (vint8m4_t): Ditto.
37983 (vint8m8_t): Ditto.
37984 (vint16mf4_t): Ditto.
37985 (vint16mf2_t): Ditto.
37986 (vint16m1_t): Ditto.
37987 (vint16m2_t): Ditto.
37988 (vint16m4_t): Ditto.
37989 (vint16m8_t): Ditto.
37990 (vint32mf2_t): Ditto.
37991 (vint32m1_t): Ditto.
37992 (vint32m2_t): Ditto.
37993 (vint32m4_t): Ditto.
37994 (vint32m8_t): Ditto.
37995 (vint64m1_t): Ditto.
37996 (vint64m2_t): Ditto.
37997 (vint64m4_t): Ditto.
37998 (vint64m8_t): Ditto.
37999 (vuint8mf8_t): Ditto.
38000 (vuint8mf4_t): Ditto.
38001 (vuint8mf2_t): Ditto.
38002 (vuint8m1_t): Ditto.
38003 (vuint8m2_t): Ditto.
38004 (vuint8m4_t): Ditto.
38005 (vuint8m8_t): Ditto.
38006 (vuint16mf4_t): Ditto.
38007 (vuint16mf2_t): Ditto.
38008 (vuint16m1_t): Ditto.
38009 (vuint16m2_t): Ditto.
38010 (vuint16m4_t): Ditto.
38011 (vuint16m8_t): Ditto.
38012 (vuint32mf2_t): Ditto.
38013 (vuint32m1_t): Ditto.
38014 (vuint32m2_t): Ditto.
38015 (vuint32m4_t): Ditto.
38016 (vuint32m8_t): Ditto.
38017 (vuint64m1_t): Ditto.
38018 (vuint64m2_t): Ditto.
38019 (vuint64m4_t): Ditto.
38020 (vuint64m8_t): Ditto.
38021 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_FULL_V_I_OPS): Ditto.
38022 (DEF_RVV_FULL_V_U_OPS): Ditto.
38023 (check_required_extensions): Add vmulh support.
38024 (rvv_arg_type_info::get_tree_type): Ditto.
38025 * config/riscv/riscv-vector-builtins.h (RVV_REQUIRE_FULL_V): Ditto.
38026 (enum rvv_base_type): Ditto.
38027 * config/riscv/riscv.opt: Add 'V' extension flag.
38028 * config/riscv/vector-iterators.md (su): New iterator.
38029 * config/riscv/vector.md (@pred_mulh<v_su><mode>): New pattern.
38030 (@pred_mulh<v_su><mode>_scalar): Ditto.
38031 (*pred_mulh<v_su><mode>_scalar): Ditto.
38032 (*pred_mulh<v_su><mode>_extended_scalar): Ditto.
38034 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38036 * config/riscv/iterators.md: Add sign_extend/zero_extend.
38037 * config/riscv/riscv-vector-builtins-bases.cc (class ext): New class.
38039 * config/riscv/riscv-vector-builtins-bases.h: Add vsext/vzext support.
38040 * config/riscv/riscv-vector-builtins-functions.def (vsext): New macro
38043 * config/riscv/riscv-vector-builtins-shapes.cc (struct alu_def): Adjust
38044 for vsext/vzext support.
38045 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_WEXTI_OPS): New
38047 (DEF_RVV_QEXTI_OPS): Ditto.
38048 (DEF_RVV_OEXTI_OPS): Ditto.
38049 (DEF_RVV_WEXTU_OPS): Ditto.
38050 (DEF_RVV_QEXTU_OPS): Ditto.
38051 (DEF_RVV_OEXTU_OPS): Ditto.
38052 (vint16mf4_t): Ditto.
38053 (vint16mf2_t): Ditto.
38054 (vint16m1_t): Ditto.
38055 (vint16m2_t): Ditto.
38056 (vint16m4_t): Ditto.
38057 (vint16m8_t): Ditto.
38058 (vint32mf2_t): Ditto.
38059 (vint32m1_t): Ditto.
38060 (vint32m2_t): Ditto.
38061 (vint32m4_t): Ditto.
38062 (vint32m8_t): Ditto.
38063 (vint64m1_t): Ditto.
38064 (vint64m2_t): Ditto.
38065 (vint64m4_t): Ditto.
38066 (vint64m8_t): Ditto.
38067 (vuint16mf4_t): Ditto.
38068 (vuint16mf2_t): Ditto.
38069 (vuint16m1_t): Ditto.
38070 (vuint16m2_t): Ditto.
38071 (vuint16m4_t): Ditto.
38072 (vuint16m8_t): Ditto.
38073 (vuint32mf2_t): Ditto.
38074 (vuint32m1_t): Ditto.
38075 (vuint32m2_t): Ditto.
38076 (vuint32m4_t): Ditto.
38077 (vuint32m8_t): Ditto.
38078 (vuint64m1_t): Ditto.
38079 (vuint64m2_t): Ditto.
38080 (vuint64m4_t): Ditto.
38081 (vuint64m8_t): Ditto.
38082 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_WEXTI_OPS): Ditto.
38083 (DEF_RVV_QEXTI_OPS): Ditto.
38084 (DEF_RVV_OEXTI_OPS): Ditto.
38085 (DEF_RVV_WEXTU_OPS): Ditto.
38086 (DEF_RVV_QEXTU_OPS): Ditto.
38087 (DEF_RVV_OEXTU_OPS): Ditto.
38088 (rvv_arg_type_info::get_base_vector_type): Add sign_exted/zero_extend
38090 (rvv_arg_type_info::get_tree_type): Ditto.
38091 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Ditto.
38092 * config/riscv/vector-iterators.md (z): New attribute.
38093 * config/riscv/vector.md (@pred_<optab><mode>_vf2): New pattern.
38094 (@pred_<optab><mode>_vf4): Ditto.
38095 (@pred_<optab><mode>_vf8): Ditto.
38097 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38099 * config/riscv/iterators.md: Add saturating Addition && Subtraction.
38100 * config/riscv/riscv-v.cc (has_vi_variant_p): Ditto.
38101 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Ditto.
38102 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38103 * config/riscv/riscv-vector-builtins-functions.def (vsadd): New def.
38107 * config/riscv/vector-iterators.md (sll.vi): Adjust for Saturating
38112 * config/riscv/vector.md (@pred_<optab><mode>): New pattern.
38113 (@pred_<optab><mode>_scalar): New pattern.
38114 (*pred_<optab><mode>_scalar): New pattern.
38115 (*pred_<optab><mode>_extended_scalar): New pattern.
38117 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38119 * config/riscv/iterators.md: Add neg and not.
38120 * config/riscv/riscv-vector-builtins-bases.cc (class unop): New class.
38122 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38123 * config/riscv/riscv-vector-builtins-functions.def (vadd): Rename binop
38144 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): Ditto.
38145 (struct alu_def): Ditto.
38147 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
38148 * config/riscv/riscv-vector-builtins.cc: Support unary C/C/++.
38149 * config/riscv/vector-iterators.md: New iterator.
38150 * config/riscv/vector.md (@pred_<optab><mode>): New pattern
38152 2023-02-12 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38154 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::compute_probabilities): Skip exit block.
38156 2023-02-11 Jakub Jelinek <jakub@redhat.com>
38159 * ipa-cp.cc (ipa_agg_value_from_jfunc): Return NULL_TREE also if
38160 item->offset bit position is too large to be representable as
38161 unsigned int byte position.
38163 2023-02-11 Gerald Pfeifer <gerald@pfeifer.com>
38165 * doc/extend.texi (Other Builtins): Adjust link to WG14 N965.
38167 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
38169 * ira.cc (update_equiv_regs): Set up ira_reg_equiv for
38170 valid_combine only when ira_use_lra_p is true.
38172 2023-02-10 Vladimir N. Makarov <vmakarov@redhat.com>
38174 * params.opt (ira-simple-lra-insn-threshold): Add new param.
38175 * ira.cc (ira): Use the param to switch on simple LRA.
38177 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
38179 PR tree-optimization/108687
38180 * gimple-range-cache.cc (ranger_cache::range_on_edge): Revert
38181 back to RFD_NONE mode for calculations.
38182 (ranger_cache::propagate_cache): Call the internal edge range API
38183 with RFD_READ_ONLY instead of changing the external routine.
38185 2023-02-10 Andrew MacLeod <amacleod@redhat.com>
38187 PR tree-optimization/108520
38188 * gimple-range-infer.cc (check_assume_func): Invoke
38189 gimple_range_global directly instead using global_range_query.
38190 * value-query.cc (get_range_global): Add function context and
38191 avoid calling nonnull_arg_p if not cfun.
38192 (gimple_range_global): Add function context pointer.
38193 * value-query.h (imple_range_global): Add function context.
38195 2023-02-10 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38197 * config/riscv/constraints.md (Wdm): Adjust constraint.
38198 (Wbr): New constraint.
38199 * config/riscv/predicates.md (reg_or_int_operand): New predicate.
38200 * config/riscv/riscv-protos.h (emit_pred_op): Remove function.
38201 (emit_vlmax_op): New function.
38202 (emit_nonvlmax_op): Ditto.
38204 (neg_simm5_p): Ditto.
38205 (has_vi_variant_p): Ditto.
38206 * config/riscv/riscv-v.cc (emit_pred_op): Adjust function.
38207 (emit_vlmax_op): New function.
38208 (emit_nonvlmax_op): Ditto.
38209 (expand_const_vector): Adjust function.
38210 (legitimize_move): Ditto.
38211 (simm32_p): New function.
38213 (neg_simm5_p): Ditto.
38214 (has_vi_variant_p): Ditto.
38215 * config/riscv/riscv-vector-builtins-bases.cc (class vrsub): New class.
38217 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
38218 * config/riscv/riscv-vector-builtins-functions.def (vmin): Remove
38221 (vminu): Remove signed cases.
38223 (vdiv): Remove unsigned cases.
38225 (vdivu): Remove signed cases.
38229 (vrsub): New class.
38234 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_U_OPS): New macro.
38235 * config/riscv/riscv.h: change VL/VTYPE as fixed reg.
38236 * config/riscv/vector-iterators.md: New iterators.
38237 * config/riscv/vector.md (@pred_broadcast<mode>): Adjust pattern for vx
38239 (@pred_<optab><mode>_scalar): New pattern.
38240 (@pred_sub<mode>_reverse_scalar): Ditto.
38241 (*pred_<optab><mode>_scalar): Ditto.
38242 (*pred_<optab><mode>_extended_scalar): Ditto.
38243 (*pred_sub<mode>_reverse_scalar): Ditto.
38244 (*pred_sub<mode>_extended_reverse_scalar): Ditto.
38246 2023-02-10 Richard Biener <rguenther@suse.de>
38248 PR tree-optimization/108724
38249 * tree-vect-stmts.cc (vectorizable_operation): Avoid
38250 using word_mode vectors when vector lowering will
38251 decompose them to elementwise operations.
38253 2023-02-10 Jakub Jelinek <jakub@redhat.com>
38256 2023-02-09 Martin Liska <mliska@suse.cz>
38259 * doc/extend.texi: Document that the function
38260 does not work correctly for old VIA processors.
38262 2023-02-10 Andrew Pinski <apinski@marvell.com>
38263 Andrew Macleod <amacleod@redhat.com>
38265 PR tree-optimization/108684
38266 * tree-ssa-dce.cc (simple_dce_from_worklist):
38267 Check all ssa names and not just non-vdef ones
38268 before accepting the inline-asm.
38269 Call unlink_stmt_vdef on the statement before
38272 2023-02-09 Vladimir N. Makarov <vmakarov@redhat.com>
38274 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38275 * ira.cc (validate_equiv_mem): Check memref address variance.
38276 (no_equiv): Clear caller_save_p flag.
38277 (update_equiv_regs): Define caller save equivalence for
38279 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38280 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38281 call_save_p. Use caller save equivalence depending on the arg.
38282 (split_reg): Adjust the call.
38284 2023-02-09 Jakub Jelinek <jakub@redhat.com>
38287 * common/config/i386/cpuinfo.h (get_zhaoxin_cpu): Formatting fixes.
38288 (cpu_indicator_init): Call get_available_features for all CPUs with
38289 max_level >= 1, rather than just Intel, AMD or Zhaoxin. Formatting
38292 2023-02-09 Jakub Jelinek <jakub@redhat.com>
38294 PR tree-optimization/108688
38295 * match.pd (bit_field_ref [bit_insert]): Simplify BIT_FIELD_REF
38296 of BIT_INSERT_EXPR extracting exactly all inserted bits even
38297 when without mode precision. Formatting fixes.
38299 2023-02-09 Andrew Pinski <apinski@marvell.com>
38301 PR tree-optimization/108688
38302 * match.pd (bit_field_ref [bit_insert]): Avoid generating
38303 BIT_FIELD_REFs of non-mode-precision integral operands.
38305 2023-02-09 Martin Liska <mliska@suse.cz>
38308 * doc/extend.texi: Document that the function
38309 does not work correctly for old VIA processors.
38311 2023-02-09 Andreas Schwab <schwab@suse.de>
38313 * lto-wrapper.cc (merge_and_complain): Handle
38314 -funwind-tables and -fasynchronous-unwind-tables.
38315 (append_compiler_options): Likewise.
38317 2023-02-09 Richard Biener <rguenther@suse.de>
38319 PR tree-optimization/26854
38320 * tree-into-ssa.cc (update_ssa): Turn blocks_to_update to tree
38321 view around insert_updated_phi_nodes_for.
38322 * tree-ssa-alias.cc (maybe_skip_until): Allocate visited bitmap
38324 (walk_aliased_vdefs_1): Likewise.
38326 2023-02-08 Gerald Pfeifer <gerald@pfeifer.com>
38328 * doc/include/gpl_v3.texi: Change fsf.org to www.fsf.org.
38330 2023-02-08 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
38333 * config.gcc (tm_mlib_file): Define new variable.
38335 2023-02-08 Jakub Jelinek <jakub@redhat.com>
38337 PR tree-optimization/108692
38338 * tree-vect-patterns.cc (vect_widened_op_tree): If rhs_code is
38339 widened_code which is different from code, don't call
38340 vect_look_through_possible_promotion but instead just check op is
38341 SSA_NAME with integral type for which vect_is_simple_use is true
38342 and call set_op on this_unprom.
38344 2023-02-08 Andrea Corallo <andrea.corallo@arm.com>
38346 * config/aarch64/aarch64-protos.h (aarch_ra_sign_key): Remove
38348 * config/aarch64/aarch64.cc (aarch_ra_sign_key): Remove
38350 * config/aarch64/aarch64.opt (aarch64_ra_sign_key): Rename
38351 to 'aarch_ra_sign_key'.
38352 * config/arm/aarch-common.cc (aarch_ra_sign_key): Remove
38354 * config/arm/arm-protos.h (aarch_ra_sign_key): Likewise.
38355 * config/arm/arm.cc (enum aarch_key_type): Remove definition.
38356 * config/arm/arm.opt: Define.
38358 2023-02-08 Richard Sandiford <richard.sandiford@arm.com>
38360 PR tree-optimization/108316
38361 * tree-vect-stmts.cc (get_load_store_type): When using
38362 internal functions for gather/scatter, make sure that the type
38363 of the offset argument is consistent with the offset vector type.
38365 2023-02-08 Vladimir N. Makarov <vmakarov@redhat.com>
38368 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
38370 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38371 * ira.cc (validate_equiv_mem): Check memref address variance.
38372 (update_equiv_regs): Define caller save equivalence for
38374 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38375 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38376 call_save_p. Use caller save equivalence depending on the arg.
38377 (split_reg): Adjust the call.
38379 2023-02-08 Jakub Jelinek <jakub@redhat.com>
38381 * tree.def (SAD_EXPR): Remove outdated comment about missing
38384 2023-02-07 Marek Polacek <polacek@redhat.com>
38386 * doc/invoke.texi: Update -fchar8_t documentation.
38388 2023-02-07 Vladimir N. Makarov <vmakarov@redhat.com>
38390 * ira.h (struct ira_reg_equiv_s): Add new field caller_save_p.
38391 * ira.cc (validate_equiv_mem): Check memref address variance.
38392 (update_equiv_regs): Define caller save equivalence for
38394 (setup_reg_equiv): Clear defined_p flag for caller save equivalence.
38395 * lra-constraints.cc (lra_copy_reg_equiv): Add new arg
38396 call_save_p. Use caller save equivalence depending on the arg.
38397 (split_reg): Adjust the call.
38399 2023-02-07 Richard Biener <rguenther@suse.de>
38401 PR tree-optimization/26854
38402 * gimple-fold.cc (has_use_on_stmt): Look at stmt operands
38403 instead of immediate uses.
38405 2023-02-07 Jakub Jelinek <jakub@redhat.com>
38407 PR tree-optimization/106923
38408 * ipa-split.cc (execute_split_functions): Don't split returns_twice
38411 2023-02-07 Jakub Jelinek <jakub@redhat.com>
38413 PR tree-optimization/106433
38414 * cgraph.cc (set_const_flag_1): Recurse on simd clones too.
38415 (cgraph_node::set_pure_flag): Call set_pure_flag_1 on simd clones too.
38417 2023-02-07 Jan Hubicka <jh@suse.cz>
38419 * config/i386/x86-tune.def (X86_TUNE_AVX256_OPTIMAL): Turn off
38422 2023-02-06 Andrew Stubbs <ams@codesourcery.com>
38424 * config/gcn/mkoffload.cc (gcn_stack_size): New global variable.
38425 (process_asm): Create a constructor for GCN_STACK_SIZE.
38426 (main): Parse the -mstack-size option.
38428 2023-02-06 Alex Coplan <alex.coplan@arm.com>
38431 * config/aarch64/aarch64-simd.md (aarch64_bfmlal<bt>_lane<q>v4sf):
38432 Use correct constraint for operand 3.
38434 2023-02-06 Martin Jambor <mjambor@suse.cz>
38436 * ipa-sra.cc (adjust_parameter_descriptions): Fix a typo in a dump.
38438 2023-02-06 Xi Ruoyao <xry111@xry111.site>
38440 * config/loongarch/loongarch.md (bytepick_w_ashift_amount):
38441 New define_int_iterator.
38442 (bytepick_d_ashift_amount): Likewise.
38443 (bytepick_imm): New define_int_attr.
38444 (bytepick_w_lshiftrt_amount): Likewise.
38445 (bytepick_d_lshiftrt_amount): Likewise.
38446 (bytepick_w_<bytepick_imm>): New define_insn template.
38447 (bytepick_w_<bytepick_imm>_extend): Likewise.
38448 (bytepick_d_<bytepick_imm>): Likewise.
38449 (bytepick_w): Remove unused define_insn.
38450 (bytepick_d): Likewise.
38451 (UNSPEC_BYTEPICK_W): Remove unused unspec.
38452 (UNSPEC_BYTEPICK_D): Likewise.
38453 * config/loongarch/predicates.md (const_0_to_3_operand):
38454 Remove unused define_predicate.
38455 (const_0_to_7_operand): Likewise.
38457 2023-02-06 Jakub Jelinek <jakub@redhat.com>
38459 PR tree-optimization/108655
38460 * ubsan.cc (sanitize_unreachable_fn): For -funreachable-traps
38461 or -fsanitize=unreachable -fsanitize-trap=unreachable return
38462 BUILT_IN_UNREACHABLE_TRAP decl rather than BUILT_IN_TRAP.
38464 2023-02-05 Gerald Pfeifer <gerald@pfeifer.com>
38466 * doc/install.texi (Specific): Remove PW32.
38468 2023-02-03 Jakub Jelinek <jakub@redhat.com>
38470 PR tree-optimization/108647
38471 * range-op.cc (operator_equal::op1_range,
38472 operator_not_equal::op1_range): Don't test op2 bound
38473 equality if op2.undefined_p (), instead set_varying.
38474 (operator_lt::op1_range, operator_le::op1_range,
38475 operator_gt::op1_range, operator_ge::op1_range): Return false if
38476 op2.undefined_p ().
38477 (operator_lt::op2_range, operator_le::op2_range,
38478 operator_gt::op2_range, operator_ge::op2_range): Return false if
38479 op1.undefined_p ().
38481 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
38483 PR tree-optimization/108639
38484 * value-range.cc (irange::legacy_equal_p): Compare nonzero bits as
38486 (irange::operator==): Same.
38488 2023-02-03 Aldy Hernandez <aldyh@redhat.com>
38490 PR tree-optimization/108647
38491 * range-op-float.cc (foperator_lt::op1_range): Handle undefined ranges.
38492 (foperator_lt::op2_range): Same.
38493 (foperator_le::op1_range): Same.
38494 (foperator_le::op2_range): Same.
38495 (foperator_gt::op1_range): Same.
38496 (foperator_gt::op2_range): Same.
38497 (foperator_ge::op1_range): Same.
38498 (foperator_ge::op2_range): Same.
38499 (foperator_unordered_lt::op1_range): Same.
38500 (foperator_unordered_lt::op2_range): Same.
38501 (foperator_unordered_le::op1_range): Same.
38502 (foperator_unordered_le::op2_range): Same.
38503 (foperator_unordered_gt::op1_range): Same.
38504 (foperator_unordered_gt::op2_range): Same.
38505 (foperator_unordered_ge::op1_range): Same.
38506 (foperator_unordered_ge::op2_range): Same.
38508 2023-02-03 Andrew MacLeod <amacleod@redhat.com>
38510 PR tree-optimization/107570
38511 * tree-vrp.cc (remove_and_update_globals): Reset SCEV.
38513 2023-02-03 Gaius Mulley <gaiusmod2@gmail.com>
38515 * doc/gm2.texi (Internals): Remove from menu.
38516 (Using): Comment out ifnohtml conditional.
38517 (Documentation): Use gcc url.
38518 (License): Node simplified.
38519 (Copying): New node. Include gpl_v3_without_node.
38520 (Contributing): Node simplified.
38521 (Internals): Commented out.
38522 (Libraries): Node simplified.
38525 (Functions): Ditto.
38527 2023-02-03 Christophe Lyon <christophe.lyon@arm.com>
38529 * config/arm/mve.md (mve_vabavq_p_<supf><mode>): Add length
38531 (mve_vqshluq_m_n_s<mode>): Likewise.
38532 (mve_vshlq_m_<supf><mode>): Likewise.
38533 (mve_vsriq_m_n_<supf><mode>): Likewise.
38534 (mve_vsubq_m_<supf><mode>): Likewise.
38536 2023-02-03 Martin Jambor <mjambor@suse.cz>
38539 * ipa-sra.cc (push_param_adjustments_for_index): Remove a size check
38540 when comparing to an IPA-CP value.
38541 (dump_list_of_param_indices): New function.
38542 (adjust_parameter_descriptions): Check for mismatching IPA-CP values.
38543 Dump removed candidates using dump_list_of_param_indices.
38544 * ipa-param-manipulation.cc
38545 (ipa_param_body_adjustments::modify_expression): Add assert checking
38546 sizes of a VIEW_CONVERT_EXPR will match.
38547 (ipa_param_body_adjustments::modify_assignment): Likewise.
38549 2023-02-03 Monk Chiang <monk.chiang@sifive.com>
38551 * config/riscv/riscv.h: Remove VL_REGS, VTYPE_REGS class.
38552 * config/riscv/riscv.cc: Ditto.
38554 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38556 * config/riscv/vector-iterators.md (sll.vi): Fix constraint bug.
38560 * config/riscv/vector.md: Ditto.
38562 2023-02-03 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38564 * config/riscv/predicates.md (pmode_reg_or_uimm5_operand): New predicate.
38565 * config/riscv/riscv-vector-builtins-bases.cc: New class.
38566 * config/riscv/riscv-vector-builtins-functions.def (vsll): Ditto.
38569 * config/riscv/riscv-vector-builtins.cc: Ditto.
38570 * config/riscv/vector.md (@pred_<optab><mode>_scalar): New pattern.
38572 2023-02-02 Iain Sandoe <iain@sandoe.co.uk>
38574 * toplev.cc (toplev::main): Only print the version information header
38575 from toplevel main().
38577 2023-02-02 Paul-Antoine Arras <pa@codesourcery.com>
38579 * config/gcn/gcn-valu.md (cond_<expander><mode>): Add
38580 cond_{ashl|ashr|lshr}
38582 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
38584 PR rtl-optimization/108086
38585 * rtl-ssa/insns.h (insn_info): Make m_num_defs a full unsigned int.
38586 Adjust size-related commentary accordingly.
38588 2023-02-02 Richard Sandiford <richard.sandiford@arm.com>
38590 PR rtl-optimization/108508
38591 * rtl-ssa/accesses.cc (function_info::split_clobber_group): When
38592 the splay tree search gives the first clobber in the second group,
38593 make sure that the root of the first clobber group is updated
38594 correctly. Enter the new clobber group into the definition splay
38597 2023-02-02 Jin Ma <jinma@linux.alibaba.com>
38599 * common/config/riscv/riscv-common.cc (riscv_compute_multilib):
38600 Fix finding best match score.
38602 2023-02-02 Jakub Jelinek <jakub@redhat.com>
38605 PR rtl-optimization/108463
38607 * cselib.cc (cselib_current_insn): Move declaration earlier.
38608 (cselib_hasher::equal): For debug only locs, temporarily override
38609 cselib_current_insn to their l->setting_insn for the
38610 rtx_equal_for_cselib_1 call, so that unsuccessful comparisons don't
38611 promote some debug locs.
38612 * sched-deps.cc (sched_analyze_2) <case MEM>: For MEMs in DEBUG_INSNs
38613 when using cselib call cselib_lookup_from_insn on the address but
38614 don't substitute it.
38616 2023-02-02 Richard Biener <rguenther@suse.de>
38618 PR middle-end/108625
38619 * genmatch.cc (expr::gen_transform): Also disallow resimplification
38620 from pushing to lseq with force_leaf.
38621 (dt_simplify::gen_1): Likewise.
38623 2023-02-02 Andrew Stubbs <ams@codesourcery.com>
38625 * config/gcn/gcn-run.cc: Include libgomp-gcn.h.
38626 (struct kernargs): Replace the common content with kernargs_abi.
38627 (struct heap): Delete.
38628 (main): Read GCN_STACK_SIZE envvar.
38629 Allocate space for the device stacks.
38630 Write the new kernargs fields.
38631 * config/gcn/gcn.cc (gcn_option_override): Remove stack_size_opt.
38632 (default_requested_args): Remove PRIVATE_SEGMENT_BUFFER_ARG and
38633 PRIVATE_SEGMENT_WAVE_OFFSET_ARG.
38634 (gcn_addr_space_convert): Mask the QUEUE_PTR_ARG content.
38635 (gcn_expand_prologue): Move the TARGET_PACKED_WORK_ITEMS to the top.
38636 Set up the stacks from the values in the kernargs, not private.
38637 (gcn_expand_builtin_1): Match the stack configuration in the prologue.
38638 (gcn_hsa_declare_function_name): Turn off the private segment.
38639 (gcn_conditional_register_usage): Ensure QUEUE_PTR is fixed.
38640 * config/gcn/gcn.h (FIXED_REGISTERS): Fix the QUEUE_PTR register.
38641 * config/gcn/gcn.opt (mstack-size): Change the description.
38643 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
38646 * config/arm/arm.h (VALID_MVE_PRED_MODE): Add V2QI.
38647 * config/arm/arm.cc (thumb2_legitimate_address_p): Use HImode for
38648 addressing MVE predicate modes.
38649 (mve_bool_vec_to_const): Change to represent correct MVE predicate
38651 (arm_hard_regno_mode_ok): Use VALID_MVE_PRED_MODE instead of checking
38653 (arm_vector_mode_supported_p): Likewise.
38654 (arm_mode_to_pred_mode): Add V2QI.
38655 * config/arm/arm-builtins.cc (UNOP_PRED_UNONE_QUALIFIERS): New
38657 (UNOP_PRED_PRED_QUALIFIERS): New qualifier
38658 (BINOP_PRED_UNONE_PRED_QUALIFIERS): New qualifier.
38659 (v2qi_UP): New macro.
38660 (v4bi_UP): New macro.
38661 (v8bi_UP): New macro.
38662 (v16bi_UP): New macro.
38663 (arm_expand_builtin_args): Make it able to expand the new predicate
38665 * config/arm/arm-modes.def (V2QI): New mode.
38666 * config/arm/arm-simd-builtin-types.def (Pred1x16_t, Pred2x8_t
38667 Pred4x4_t): Remove unused predicate builtin types.
38668 * config/arm/arm_mve.h (__arm_vctp16q, __arm_vctp32q, __arm_vctp64q,
38669 __arm_vctp8q, __arm_vpnot, __arm_vctp8q_m, __arm_vctp64q_m,
38670 __arm_vctp32q_m, __arm_vctp16q_m): Use predicate modes.
38671 * config/arm/arm_mve_builtins.def (vctp16q, vctp32q, vctp64q, vctp8q,
38672 vpnot, vctp8q_m, vctp16q_m, vctp32q_m, vctp64q_m): Likewise.
38673 * config/arm/constraints.md (DB): Check for VALID_MVE_PRED_MODE instead
38674 of MODE_VECTOR_BOOL.
38675 * config/arm/iterators.md (MVE_7, MVE_7_HI): Add V2QI
38676 (MVE_VPRED): Likewise.
38677 (MVE_vpred): Add V2QI and map upper case predicate modes to lower case.
38678 (MVE_vctp): New mode attribute.
38682 * config/arm/mve.md (mve_vctp<mode1>qhi): Rename this...
38683 (mve_vctp<MVE_vctp>q<MVE_vpred>): ... to this. And use new mode
38685 (mve_vpnothi): Rename this...
38686 (mve_vpnotv16bi): ... to this.
38687 (mve_vctp<mode1>q_mhi): Rename this...
38688 (mve_vctp<MVE_vctp>q_m<MVE_vpred>):... to this.
38689 (mve_vldrdq_gather_base_z_<supf>v2di,
38690 mve_vldrdq_gather_offset_z_<supf>v2di,
38691 mve_vldrdq_gather_shifted_offset_z_<supf>v2di,
38692 mve_vstrdq_scatter_base_p_<supf>v2di,
38693 mve_vstrdq_scatter_offset_p_<supf>v2di,
38694 mve_vstrdq_scatter_offset_p_<supf>v2di_insn,
38695 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di,
38696 mve_vstrdq_scatter_shifted_offset_p_<supf>v2di_insn,
38697 mve_vstrdq_scatter_base_wb_p_<supf>v2di,
38698 mve_vldrdq_gather_base_wb_z_<supf>v2di,
38699 mve_vldrdq_gather_base_nowb_z_<supf>v2di,
38700 mve_vldrdq_gather_base_wb_z_<supf>v2di_insn): Use V2QI insead of HI for
38702 * config/arm/unspecs.md (VCTP8Q, VCTP16Q, VCTP32Q, VCTP64Q): Replace
38704 (VCTP): ... with this.
38705 (VCTP8Q_M, VCTP16Q_M, VCTP32Q_M, VCTP64Q_M): Replace these...
38706 (VCTP_M): ... with this.
38707 * config/arm/vfp.md (*thumb2_movhi_vfp, *thumb2_movhi_fp16): Use
38708 VALID_MVE_PRED_MODE instead of checking for MODE_VECTOR_BOOL class.
38710 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
38713 * config/arm/arm.cc (arm_hard_regno_mode_ok): Use new MACRO.
38714 (arm_modes_tieable_p): Make MVE predicate modes tieable.
38715 * config/arm/arm.h (VALID_MVE_PRED_MODE): New define.
38716 * simplify-rtx.cc (simplify_context::simplify_subreg): Teach
38717 simplify_subreg to simplify subregs where the outermode is not scalar.
38719 2023-02-02 Andre Vieira <andre.simoesdiasvieira@arm.com>
38722 * config/arm/arm-builtins.cc (arm_simd_builtin_type): Rewrite to use
38723 new qualifiers parameter and use unsigned short type for MVE predicate.
38724 (arm_init_builtin): Call arm_simd_builtin_type with qualifiers
38726 (arm_init_crypto_builtins): Likewise.
38728 2023-02-02 Jakub Jelinek <jakub@redhat.com>
38731 * builtins.def (BUILT_IN_UNREACHABLE_TRAP): New builtin.
38732 * internal-fn.def (TRAP): Remove.
38733 * internal-fn.cc (expand_TRAP): Remove.
38734 * tree.cc (build_common_builtin_nodes): Define
38735 BUILT_IN_UNREACHABLE_TRAP if not yet defined.
38736 (builtin_decl_unreachable): Use BUILT_IN_UNREACHABLE_TRAP
38737 instead of BUILT_IN_TRAP.
38738 * gimple.cc (gimple_build_builtin_unreachable): Remove
38739 emitting internal function for BUILT_IN_TRAP.
38740 * asan.cc (maybe_instrument_call): Handle BUILT_IN_UNREACHABLE_TRAP.
38741 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Handle
38742 BUILT_IN_UNREACHABLE_TRAP instead of BUILT_IN_TRAP.
38743 * ipa-devirt.cc (possible_polymorphic_call_target_p): Handle
38744 BUILT_IN_UNREACHABLE_TRAP.
38745 * builtins.cc (expand_builtin, is_inexpensive_builtin): Likewise.
38746 * tree-cfg.cc (verify_gimple_call,
38747 pass_warn_function_return::execute): Likewise.
38748 * attribs.cc (decl_attributes): Don't report exclusions on
38749 BUILT_IN_UNREACHABLE_TRAP either.
38751 2023-02-02 liuhongt <hongtao.liu@intel.com>
38753 PR tree-optimization/108601
38754 * tree-vectorizer.h (vect_can_peel_nonlinear_iv_p): Removed.
38755 * tree-vect-loop.cc
38756 (vectorizable_nonlinear_induction): Remove
38757 vect_can_peel_nonlinear_iv_p.
38758 (vect_can_peel_nonlinear_iv_p): Don't peel
38759 nonlinear iv(mult or shift) for epilog when vf is not
38760 constant and moved the defination to ..
38761 * tree-vect-loop-manip.cc (vect_can_peel_nonlinear_iv_p):
38764 2023-02-02 Jakub Jelinek <jakub@redhat.com>
38766 PR middle-end/108435
38767 * tree-nested.cc (convert_nonlocal_omp_clauses)
38768 <case OMP_CLAUSE_LASTPRIVATE>: If info->new_local_var_chain and *seq
38769 is not a GIMPLE_BIND, wrap the sequence into a new GIMPLE_BIND
38770 before calling declare_vars.
38771 (convert_nonlocal_omp_clauses) <case OMP_CLAUSE_LINEAR>: Merge
38772 with the OMP_CLAUSE_LASTPRIVATE handling except for whether
38773 seq is initialized to &OMP_CLAUSE_LASTPRIVATE_GIMPLE_SEQ (clause)
38774 or &OMP_CLAUSE_LINEAR_GIMPLE_SEQ (clause).
38776 2023-02-01 Tamar Christina <tamar.christina@arm.com>
38778 * common/config/aarch64/aarch64-common.cc
38779 (struct aarch64_option_extension): Add native_detect and document struct
38781 (all_extensions): Set new field native_detect.
38782 * config/aarch64/aarch64.cc (struct aarch64_option_extension): Delete
38785 2023-02-01 Martin Liska <mliska@suse.cz>
38787 * ipa-devirt.cc (odr_types_equivalent_p): Respect *warned
38790 2023-02-01 Andrew MacLeod <amacleod@redhat.com>
38792 PR tree-optimization/108356
38793 * gimple-range-cache.cc (ranger_cache::range_on_edge): Always
38794 do a search of the DOM tree for a range.
38796 2023-02-01 Martin Liska <mliska@suse.cz>
38799 * cgraphunit.cc (walk_polymorphic_call_targets): Insert
38800 ony non-null values.
38801 * ipa.cc (walk_polymorphic_call_targets): Likewise.
38803 2023-02-01 Martin Liska <mliska@suse.cz>
38806 * gcc.cc (LINK_COMPRESS_DEBUG_SPEC): Report error only for
38809 2023-02-01 Jakub Jelinek <jakub@redhat.com>
38812 * ree.cc (combine_reaching_defs): Don't return false for paradoxical
38813 subregs in DEBUG_INSNs.
38815 2023-02-01 Richard Sandiford <richard.sandiford@arm.com>
38817 * compare-elim.cc (find_flags_uses_in_insn): Guard use of SET_SRC.
38819 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38821 * config/s390/s390.cc (s390_restore_gpr_p): New function.
38822 (s390_preserve_gpr_arg_in_range_p): New function.
38823 (s390_preserve_gpr_arg_p): New function.
38824 (s390_preserve_fpr_arg_p): New function.
38825 (s390_register_info_stdarg_fpr): Rename to ...
38826 (s390_register_info_arg_fpr): ... this. Add -mpreserve-args handling.
38827 (s390_register_info_stdarg_gpr): Rename to ...
38828 (s390_register_info_arg_gpr): ... this. Add -mpreserve-args handling.
38829 (s390_register_info): Use the renamed functions above.
38830 (s390_optimize_register_info): Likewise.
38831 (save_fpr): Generate CFI for -mpreserve-args.
38832 (save_gprs): Generate CFI for -mpreserve-args. Drop return value.
38833 (s390_emit_prologue): Adjust to changed calling convention of save_gprs.
38834 (s390_optimize_prologue): Likewise.
38835 * config/s390/s390.opt: New option -mpreserve-args
38837 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38839 * config/s390/s390.cc (save_gprs): Use gen_frame_mem.
38840 (restore_gprs): Likewise.
38841 (s390_emit_stack_tie): Make the stack_tie to be dependent on the
38842 frame pointer if a frame-pointer is used.
38843 (s390_emit_prologue): Emit stack_tie when frame-pointer is needed.
38844 * config/s390/s390.md (stack_tie): Add a register operand and
38846 (@stack_tie<mode>): ... this.
38848 2023-02-01 Andreas Krebbel <krebbel@linux.ibm.com>
38850 * dwarf2cfi.cc (dwarf2out_frame_debug_cfa_restore): Add
38851 EMIT_CFI parameter.
38852 (dwarf2out_frame_debug): Add case for REG_CFA_NORESTORE.
38853 * reg-notes.def (REG_CFA_NOTE): New reg note definition.
38855 2023-02-01 Richard Biener <rguenther@suse.de>
38857 PR middle-end/108500
38858 * dominance.cc (assign_dfs_numbers): Replace recursive DFS
38859 with tree traversal algorithm.
38861 2023-02-01 Jason Merrill <jason@redhat.com>
38863 * doc/invoke.texi: Document -Wno-changes-meaning.
38865 2023-02-01 David Malcolm <dmalcolm@redhat.com>
38867 * doc/invoke.texi (Static Analyzer Options): Add notes about
38868 limitations of -fanalyzer.
38870 2023-01-31 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38872 * config/riscv/constraints.md (vj): New.
38874 * config/riscv/iterators.md: Add more opcode.
38875 * config/riscv/predicates.md (vector_arith_operand): New.
38876 (vector_neg_arith_operand): New.
38877 (vector_shift_operand): New.
38878 * config/riscv/riscv-vector-builtins-bases.cc (class binop): New.
38879 * config/riscv/riscv-vector-builtins-bases.h: (vadd): New.
38896 * config/riscv/riscv-vector-builtins-functions.def (vadd): New.
38913 * config/riscv/riscv-vector-builtins-shapes.cc (struct binop_def): New.
38914 * config/riscv/riscv-vector-builtins-shapes.h (binop): New.
38915 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_I_OPS): New.
38916 (DEF_RVV_U_OPS): New.
38917 (rvv_arg_type_info::get_base_vector_type): Handle
38918 RVV_BASE_shift_vector.
38919 (rvv_arg_type_info::get_tree_type): Ditto.
38920 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Add
38921 RVV_BASE_shift_vector.
38922 * config/riscv/riscv.cc (riscv_print_operand): Handle 'V'.
38923 * config/riscv/vector-iterators.md: Handle more opcode.
38924 * config/riscv/vector.md (@pred_<optab><mode>): New.
38926 2023-01-31 Philipp Tomsich <philipp.tomsich@vrull.eu>
38929 * config/aarch64/aarch64.cc (aarch_macro_fusion_pair_p): Check
38932 2023-01-31 Richard Sandiford <richard.sandiford@arm.com>
38934 PR tree-optimization/108608
38935 * tree-vect-loop.cc (vect_transform_reduction): Handle single
38936 def-use cycles that involve function calls rather than tree codes.
38938 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38940 PR tree-optimization/108385
38941 * gimple-range-gori.cc (gori_compute::compute_operand_range):
38942 Allow VARYING computations to continue if there is a relation.
38943 * range-op.cc (pointer_plus_operator::op2_range): New.
38945 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38947 PR tree-optimization/108359
38948 * range-op.cc (range_operator::wi_fold_in_parts_equiv): New.
38949 (range_operator::fold_range): If op1 is equivalent to op2 then
38950 invoke new fold_in_parts_equiv to operate on sub-components.
38951 * range-op.h (wi_fold_in_parts_equiv): New prototype.
38953 2023-01-31 Andrew MacLeod <amacleod@redhat.com>
38955 * gimple-range-gori.cc (gori_compute::compute_operand_range): Do
38956 not abort calculations if there is a valid relation available.
38957 (gori_compute::refine_using_relation): Pass correct relation trio.
38958 (gori_compute::compute_operand1_range): Create trio and use it.
38959 (gori_compute::compute_operand2_range): Ditto.
38960 * range-op.cc (operator_plus::op1_range): Use correct trio member.
38961 (operator_minus::op1_range): Use correct trio member.
38962 * value-relation.cc (value_relation::create_trio): New.
38963 * value-relation.h (value_relation::create_trio): New prototype.
38965 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38968 * config/i386/i386-expand.cc
38969 (ix86_convert_const_wide_int_to_broadcast): Return nullptr if
38970 CONST_WIDE_INT_NUNITS (op) times HOST_BITS_PER_WIDE_INT isn't
38971 equal to bitsize of mode.
38973 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38975 PR rtl-optimization/108596
38976 * bb-reorder.cc (fix_up_fall_thru_edges): Handle the case where cur_bb
38977 ends with asm goto and has a crossing fallthrough edge to the same bb
38978 that contains at least one of its labels by restoring EDGE_CROSSING
38979 flag even on possible edge from cur_bb to new_bb successor.
38981 2023-01-31 Jakub Jelinek <jakub@redhat.com>
38984 * config/i386/avx512erintrin.h (_mm512_exp2a23_round_pd,
38985 _mm512_exp2a23_round_ps, _mm512_rcp28_round_pd, _mm512_rcp28_round_ps,
38986 _mm512_rsqrt28_round_pd, _mm512_rsqrt28_round_ps): Use
38987 _mm512_undefined_pd () or _mm512_undefined_ps () instead of using
38988 uninitialized automatic variable __W.
38990 2023-01-31 Gerald Pfeifer <gerald@pfeifer.com>
38992 * doc/include/fdl.texi: Change fsf.org to www.fsf.org.
38994 2023-01-30 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
38996 * config/riscv/riscv-protos.h (get_vector_mode): New function.
38997 * config/riscv/riscv-v.cc (get_vector_mode): Ditto.
38998 * config/riscv/riscv-vector-builtins-bases.cc (enum lst_type): New enum.
38999 (class loadstore): Adjust for indexed loads/stores support.
39001 * config/riscv/riscv-vector-builtins-bases.h: New function declare.
39002 * config/riscv/riscv-vector-builtins-functions.def (vluxei8): Ditto.
39018 * config/riscv/riscv-vector-builtins-shapes.cc
39019 (struct indexed_loadstore_def): New class.
39021 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
39022 * config/riscv/riscv-vector-builtins.cc (required_extensions_p): Adjust
39023 for indexed loads/stores support.
39024 (check_required_extensions): Ditto.
39025 (rvv_arg_type_info::get_base_vector_type): New function.
39026 (rvv_arg_type_info::get_tree_type): Ditto.
39027 (function_builder::add_unique_function): Adjust for indexed loads/stores
39029 (function_expander::use_exact_insn): New function.
39030 * config/riscv/riscv-vector-builtins.h (enum rvv_base_type): Adjust for
39031 indexed loads/stores support.
39032 (struct rvv_arg_type_info): Ditto.
39033 (function_expander::index_mode): New function.
39034 (function_base::apply_tail_policy_p): Ditto.
39035 (function_base::apply_mask_policy_p): Ditto.
39036 * config/riscv/vector-iterators.md (unspec): New unspec.
39037 * config/riscv/vector.md (unspec): Ditto.
39038 (@pred_indexed_<order>load<VNX1_QHSD:mode><VNX1_QHSDI:mode>): New
39040 (@pred_indexed_<order>store<VNX1_QHSD:mode><VNX1_QHSDI:mode>): Ditto.
39041 (@pred_indexed_<order>load<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
39042 (@pred_indexed_<order>store<VNX2_QHSD:mode><VNX2_QHSDI:mode>): Ditto.
39043 (@pred_indexed_<order>load<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
39044 (@pred_indexed_<order>store<VNX4_QHSD:mode><VNX4_QHSDI:mode>): Ditto.
39045 (@pred_indexed_<order>load<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
39046 (@pred_indexed_<order>store<VNX8_QHSD:mode><VNX8_QHSDI:mode>): Ditto.
39047 (@pred_indexed_<order>load<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
39048 (@pred_indexed_<order>store<VNX16_QHS:mode><VNX16_QHSI:mode>): Ditto.
39049 (@pred_indexed_<order>load<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39050 (@pred_indexed_<order>store<VNX32_QH:mode><VNX32_QHI:mode>): Ditto.
39051 (@pred_indexed_<order>load<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39052 (@pred_indexed_<order>store<VNX64_Q:mode><VNX64_Q:mode>): Ditto.
39054 2023-01-30 Flavio Cruz <flaviocruz@gmail.com>
39056 * config.gcc: Recognize x86_64-*-gnu* targets and include
39058 * config/i386/gnu64.h: Define configuration for new target
39059 including ld.so location.
39061 2023-01-30 Philipp Tomsich <philipp.tomsich@vrull.eu>
39063 * config/aarch64/aarch64-cores.def (AARCH64_CORE): Update
39064 ampere1a to include SM4.
39066 2023-01-30 Andrew Pinski <apinski@marvell.com>
39068 PR tree-optimization/108582
39069 * tree-ssa-phiopt.cc (match_simplify_replacement): Add check
39070 for middlebb to have no phi nodes.
39072 2023-01-30 Richard Biener <rguenther@suse.de>
39074 PR tree-optimization/108574
39075 * tree-ssa-sccvn.cc (visit_phi): Instead of swapping
39076 sameval and def, ignore the equivalence if there's the
39077 danger of oscillating between two values.
39079 2023-01-30 Andreas Schwab <schwab@suse.de>
39081 * common/config/riscv/riscv-common.cc
39082 (riscv_option_optimization_table)
39083 [TARGET_DEFAULT_ASYNC_UNWIND_TABLES]: Enable
39084 -fasynchronous-unwind-tables and -funwind-tables.
39085 * config.gcc (riscv*-*-linux*): Define
39086 TARGET_DEFAULT_ASYNC_UNWIND_TABLES.
39088 2023-01-30 YunQiang Su <yunqiang.su@cipunited.com>
39090 * Makefile.in (CROSS_SYSTEM_HEADER_DIR): set according the
39091 value of includedir.
39093 2023-01-30 Richard Biener <rguenther@suse.de>
39096 * cgraph.cc (possibly_call_in_translation_unit_p): Relax
39099 2023-01-30 liuhongt <hongtao.liu@intel.com>
39101 * config/i386/i386.opt: Change AVX512FP16 to AVX512-FP16.
39102 * doc/invoke.texi: Ditto.
39104 2023-01-29 Jan Hubicka <hubicka@ucw.cz>
39106 * ipa-utils.cc: Include calls.h, cfgloop.h and cfganal.h
39107 (stmt_may_terminate_function_p): If assuming return or EH
39108 volatile asm is safe.
39109 (find_always_executed_bbs): Fix handling of terminating BBS and
39110 infinite loops; add debug output.
39111 * tree-ssa-alias.cc (stmt_kills_ref_p): Fix debug output
39113 2023-01-28 Philipp Tomsich <philipp.tomsich@vrull.eu>
39115 * config/aarch64/aarch64.cc (aarch64_uxt_size): fix an
39116 off-by-one in checking the permissible shift-amount.
39118 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39120 * doc/extend.texi (Named Address Spaces): Update link to the
39123 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39125 * doc/standards.texi (Standards): Fix markup.
39127 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39129 * doc/standards.texi (Standards): Update link to Objective-C book.
39131 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39133 * doc/invoke.texi (Instrumentation Options): Update reference to
39136 2023-01-28 Gerald Pfeifer <gerald@pfeifer.com>
39138 * doc/standards.texi: Update Go1 link.
39140 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39142 * config/riscv/predicates.md (pmode_reg_or_0_operand): New predicate.
39143 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore):
39146 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39147 * config/riscv/riscv-vector-builtins-functions.def (vlse): New class.
39149 * config/riscv/riscv-vector-builtins.cc
39150 (function_expander::use_contiguous_load_insn): Support vlse/vsse.
39151 * config/riscv/vector.md (@pred_strided_load<mode>): New md pattern.
39152 (@pred_strided_store<mode>): Ditto.
39154 2023-01-28 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39156 * config/riscv/vector.md (tail_policy_op_idx): Remove.
39157 (mask_policy_op_idx): Remove.
39158 (avl_type_op_idx): Remove.
39160 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
39162 PR tree-optimization/96373
39163 * tree.h (sign_mask_for): Declare.
39164 * tree.cc (sign_mask_for): New function.
39165 (signed_or_unsigned_type_for): For vector types, try to use the
39166 related_int_vector_mode.
39167 * genmatch.cc (commutative_op): Handle conditional internal functions.
39168 * match.pd: Fold an IFN_COND_MUL+copysign into an IFN_COND_XOR+and.
39170 2023-01-27 Richard Sandiford <richard.sandiford@arm.com>
39172 * tree-vectorizer.cc (vector_costs::compare_inside_loop_cost):
39173 Use the likely minimum VF when bounding the denominators to
39174 the estimated number of iterations.
39176 2023-01-27 Richard Biener <rguenther@suse.de>
39179 * doc/invoke.texi (-shared): Clarify effect on -ffast-math
39180 and -Ofast FP environment side-effects.
39182 2023-01-27 Richard Biener <rguenther@suse.de>
39185 * config/mips/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
39186 Don't add crtfastmath.o for -shared.
39188 2023-01-27 Richard Biener <rguenther@suse.de>
39191 * config/ia64/linux.h (ENDFILE_SPEC): Don't add crtfastmath.o
39194 2023-01-27 Richard Biener <rguenther@suse.de>
39197 * config/alpha/linux.h (ENDFILE_SPEC): Don't add
39198 crtfastmath.o for -shared.
39200 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
39202 PR tree-optimization/108306
39203 * range-op.cc (operator_lshift::fold_range): Return [0, 0] not
39204 varying for shifts that are always out of void range.
39205 (operator_rshift::fold_range): Return [0, 0] not
39206 varying for shifts that are always out of void range.
39208 2023-01-27 Andrew MacLeod <amacleod@redhat.com>
39210 PR tree-optimization/108447
39211 * gimple-range-fold.cc (old_using_range::relation_fold_and_or):
39212 Do not attempt to fold HONOR_NAN types.
39214 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39216 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def):
39217 Remove _m suffix for "vop_m" C++ overloaded API name.
39219 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39221 * config/riscv/riscv-vector-builtins-bases.cc (BASE): Add vlm/vsm support.
39222 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
39223 * config/riscv/riscv-vector-builtins-functions.def (vlm): New define.
39225 * config/riscv/riscv-vector-builtins-shapes.cc (struct loadstore_def): Add vlm/vsm support.
39226 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_B_OPS): Ditto.
39227 (vbool64_t): Ditto.
39228 (vbool32_t): Ditto.
39229 (vbool16_t): Ditto.
39234 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_B_OPS): Ditto.
39235 (rvv_arg_type_info::get_tree_type): Ditto.
39236 (function_expander::use_contiguous_load_insn): Ditto.
39237 * config/riscv/vector.md (@pred_store<mode>): Ditto.
39239 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39241 * config/riscv/riscv-vsetvl.cc (vsetvl_insn_p): Add condition to avoid ICE.
39242 (vsetvl_discard_result_insn_p): New function.
39243 (reg_killed_by_bb_p): rename to find_reg_killed_by.
39244 (find_reg_killed_by): New name.
39245 (get_vl): allow it to be called by more functions.
39246 (has_vsetvl_killed_avl_p): Add condition.
39247 (get_avl): allow it to be called by more functions.
39248 (insn_should_be_added_p): New function.
39249 (get_all_nonphi_defs): Refine function.
39250 (get_all_sets): Ditto.
39251 (get_same_bb_set): New function.
39252 (any_insn_in_bb_p): Ditto.
39253 (any_set_in_bb_p): Ditto.
39254 (get_vl_vtype_info): Add VLMAX forward optimization.
39255 (source_equal_p): Fix issues.
39256 (extract_single_source): Refine.
39257 (avl_info::multiple_source_equal_p): New function.
39258 (avl_info::operator==): Adjust for final version.
39259 (vl_vtype_info::operator==): Ditto.
39260 (vl_vtype_info::same_avl_p): Ditto.
39261 (vector_insn_info::parse_insn): Ditto.
39262 (vector_insn_info::available_p): New function.
39263 (vector_insn_info::merge): Adjust for final version.
39264 (vector_insn_info::dump): Add hard_empty.
39265 (pass_vsetvl::hard_empty_block_p): New function.
39266 (pass_vsetvl::backward_demand_fusion): Adjust for final version.
39267 (pass_vsetvl::forward_demand_fusion): Ditto.
39268 (pass_vsetvl::demand_fusion): Ditto.
39269 (pass_vsetvl::cleanup_illegal_dirty_blocks): New function.
39270 (pass_vsetvl::compute_local_properties): Adjust for final version.
39271 (pass_vsetvl::can_refine_vsetvl_p): Ditto.
39272 (pass_vsetvl::refine_vsetvls): Ditto.
39273 (pass_vsetvl::commit_vsetvls): Ditto.
39274 (pass_vsetvl::propagate_avl): New function.
39275 (pass_vsetvl::lazy_vsetvl): Adjust for new version.
39276 * config/riscv/riscv-vsetvl.h (enum def_type): New enum.
39278 2023-01-27 Jakub Jelinek <jakub@redhat.com>
39281 * doc/extend.texi: Fix up return type of __builtin_va_arg_pack_len
39282 from size_t to int.
39284 2023-01-27 Jakub Jelinek <jakub@redhat.com>
39287 * cgraph.cc (cgraph_edge::verify_corresponds_to_fndecl): Allow
39288 redirection of calls to __builtin_trap in addition to redirection
39289 to __builtin_unreachable.
39291 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39293 * config/riscv/riscv-vsetvl.cc (before_p): Fix bug.
39295 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39297 * config/riscv/riscv-vsetvl.cc (gen_vsetvl_pat): Refine function args.
39298 (emit_vsetvl_insn): Ditto.
39300 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39302 * config/riscv/vector.md: Fix constraints.
39304 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39306 * config/riscv/vector-iterators.md: Add TARGET_MIN_VLEN > 32 predicates.
39308 2023-01-27 Patrick Palka <ppalka@redhat.com>
39309 Jakub Jelinek <jakub@redhat.com>
39311 * tree-core.h (tree_code_type, tree_code_length): For
39312 C++17 and later, add inline keyword, otherwise don't define
39313 the arrays, but declare extern arrays.
39314 * tree.cc (tree_code_type, tree_code_length): Define these
39315 arrays for C++14 and older.
39317 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39319 * config/riscv/riscv-vsetvl.h: Change it into public.
39321 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39323 * config/riscv/riscv-passes.def (INSERT_PASS_BEFORE): Reorder VSETVL
39326 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39328 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::execute): Always call split_all_insns.
39330 2023-01-27 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39332 * config/riscv/vector.md: Fix incorrect attributes.
39334 2023-01-27 Richard Biener <rguenther@suse.de>
39337 * config/loongarch/gnu-user.h (GNU_USER_TARGET_MATHFILE_SPEC):
39338 Don't add crtfastmath.o for -shared.
39340 2023-01-27 Alexandre Oliva <oliva@gnu.org>
39342 * doc/options.texi (option, RejectNegative): Mention that
39343 -g-started options are also implicitly negatable.
39345 2023-01-26 Kito Cheng <kito.cheng@sifive.com>
39347 * config/riscv/riscv-vector-builtins.cc (register_builtin_types):
39348 Use get_typenode_from_name to get fixed-width integer type
39350 * config/riscv/riscv-vector-builtins.def: Update define with
39351 fixed-width integer type nodes.
39353 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39355 * config/riscv/riscv-vsetvl.cc (same_bb_and_before_p): Remove it.
39356 (real_insn_and_same_bb_p): New function.
39357 (same_bb_and_after_or_equal_p): Remove it.
39358 (before_p): New function.
39359 (reg_killed_by_bb_p): Ditto.
39360 (has_vsetvl_killed_avl_p): Ditto.
39361 (get_vl): Move location so that we can call it.
39362 (anticipatable_occurrence_p): Fix issue of AVL=REG support.
39363 (available_occurrence_p): Ditto.
39364 (dominate_probability_p): Remove it.
39365 (can_backward_propagate_p): Remove it.
39366 (get_all_nonphi_defs): New function.
39367 (get_all_predecessors): Ditto.
39368 (any_insn_in_bb_p): Ditto.
39369 (insert_vsetvl): Adjust AVL REG.
39370 (source_equal_p): New function.
39371 (extract_single_source): Ditto.
39372 (avl_info::single_source_equal_p): Ditto.
39373 (avl_info::operator==): Adjust for AVL=REG.
39374 (vl_vtype_info::same_avl_p): Ditto.
39375 (vector_insn_info::set_demand_info): Remove it.
39376 (vector_insn_info::compatible_p): Adjust for AVL=REG.
39377 (vector_insn_info::compatible_avl_p): New function.
39378 (vector_insn_info::merge): Adjust AVL=REG.
39379 (vector_insn_info::dump): Ditto.
39380 (pass_vsetvl::merge_successors): Remove it.
39381 (enum fusion_type): New enum.
39382 (pass_vsetvl::get_backward_fusion_type): New function.
39383 (pass_vsetvl::backward_demand_fusion): Adjust for AVL=REG.
39384 (pass_vsetvl::forward_demand_fusion): Ditto.
39385 (pass_vsetvl::demand_fusion): Ditto.
39386 (pass_vsetvl::prune_expressions): Ditto.
39387 (pass_vsetvl::compute_local_properties): Ditto.
39388 (pass_vsetvl::cleanup_vsetvls): Ditto.
39389 (pass_vsetvl::commit_vsetvls): Ditto.
39390 (pass_vsetvl::init): Ditto.
39391 * config/riscv/riscv-vsetvl.h (enum fusion_type): New enum.
39392 (enum merge_type): New enum.
39394 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39396 * config/riscv/riscv-vsetvl.cc
39397 (vector_infos_manager::vector_infos_manager): Add probability.
39398 (vector_infos_manager::dump): Ditto.
39399 (pass_vsetvl::compute_probabilities): Ditto.
39400 * config/riscv/riscv-vsetvl.h (struct vector_block_info): Ditto.
39402 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39404 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator==): Remove dirty_pat.
39405 (vector_insn_info::merge): Ditto.
39406 (vector_insn_info::dump): Ditto.
39407 (pass_vsetvl::merge_successors): Ditto.
39408 (pass_vsetvl::backward_demand_fusion): Ditto.
39409 (pass_vsetvl::forward_demand_fusion): Ditto.
39410 (pass_vsetvl::commit_vsetvls): Ditto.
39411 * config/riscv/riscv-vsetvl.h: Ditto.
39413 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39415 * config/riscv/riscv-vsetvl.cc (add_label_notes): Rename insn to
39418 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39420 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::backward_demand_fusion): Refine codes.
39422 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39424 * config/riscv/riscv-vsetvl.cc (pass_vsetvl::forward_demand_fusion):
39425 Add pre-check for redundant flow.
39427 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39429 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::create_bitmap_vectors): New function.
39430 (vector_infos_manager::free_bitmap_vectors): Ditto.
39431 (pass_vsetvl::pre_vsetvl): Adjust codes.
39432 * config/riscv/riscv-vsetvl.h: New function declaration.
39434 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39436 * config/riscv/riscv-vsetvl.cc (can_backward_propagate_p): Fix for null iter_bb.
39437 (vector_insn_info::set_demand_info): New function.
39438 (pass_vsetvl::emit_local_forward_vsetvls): Adjust for refinement of Phase 3.
39439 (pass_vsetvl::merge_successors): Ditto.
39440 (pass_vsetvl::compute_global_backward_infos): Ditto.
39441 (pass_vsetvl::backward_demand_fusion): Ditto.
39442 (pass_vsetvl::forward_demand_fusion): Ditto.
39443 (pass_vsetvl::demand_fusion): New function.
39444 (pass_vsetvl::lazy_vsetvl): Adjust for refinement of phase 3.
39445 * config/riscv/riscv-vsetvl.h: New function declaration.
39447 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39449 * config/riscv/riscv-vsetvl.cc (vector_insn_info::operator>=): Fix available condition.
39451 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39453 * config/riscv/riscv-vsetvl.cc (change_vsetvl_insn): New function.
39454 (pass_vsetvl::compute_global_backward_infos): Simplify codes.
39456 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39458 * config/riscv/riscv-vsetvl.cc (loop_basic_block_p): Adjust function.
39459 (backward_propagate_worthwhile_p): Fix non-worthwhile.
39461 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39463 * config/riscv/riscv-vsetvl.cc (change_insn): Adjust in_group in validate_change.
39465 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39467 * config/riscv/riscv-vsetvl.cc (vector_infos_manager::all_same_avl_p): New function.
39468 (pass_vsetvl::can_refine_vsetvl_p): Add AVL check.
39469 (pass_vsetvl::commit_vsetvls): Ditto.
39470 * config/riscv/riscv-vsetvl.h: New function declaration.
39472 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39474 * config/riscv/vector.md:
39476 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39478 * config/riscv/riscv-vector-builtins-bases.cc (class loadstore): use
39479 pred_store for vse.
39480 * config/riscv/riscv-vector-builtins.cc
39481 (function_expander::add_mem_operand): Refine function.
39482 (function_expander::use_contiguous_load_insn): Adjust new
39484 (function_expander::use_contiguous_store_insn): Ditto.
39485 * config/riscv/riscv-vector-builtins.h: Refine function.
39486 * config/riscv/vector.md (@pred_store<mode>): New pattern.
39488 2023-01-26 Ju-Zhe Zhong <juzhe.zhong@rivai.ai>
39490 * config/riscv/riscv-vector-builtins.cc: Change to scalar pointer.
39492 2023-01-26 Marek Polacek <polacek@redhat.com>
39494 PR middle-end/108543
39495 * opts.cc (parse_sanitizer_options): Don't always clear SANITIZE_ADDRESS
39496 if it was previously set.
39498 2023-01-26 Jakub Jelinek <jakub@redhat.com>
39500 PR tree-optimization/108540
39501 * range-op-float.cc (foperator_equal::fold_range): If both op1 and op2
39502 are singletons, use range_true even if op1 != op2
39503 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
39504 even if intersection of the ranges is empty and one has
39505 zero low bound and another zero high bound, use range_true_and_false
39506 rather than range_false.
39507 (foperator_not_equal::fold_range): If both op1 and op2
39508 are singletons, use range_false even if op1 != op2
39509 when one range is [-0.0, -0.0] and another [0.0, 0.0]. Similarly,
39510 even if intersection of the ranges is empty and one has
39511 zero low bound and another zero high bound, use range_true_and_false
39512 rather than range_true.
39514 2023-01-26 Jakub Jelinek <jakub@redhat.com>
39516 * value-relation.cc (kind_string): Add const.
39517 (rr_negate_table, rr_swap_table, rr_intersect_table,
39518 rr_union_table, rr_transitive_table): Add static const, change
39519 element type from relation_kind to unsigned char.
39520 (relation_negate, relation_swap, relation_intersect, relation_union,
39521 relation_transitive): Cast rr_*_table element to relation_kind.
39522 (relation_to_code): Add static const.
39523 (relation_tests): Assert VREL_LAST is smaller than UCHAR_MAX.
39525 2023-01-26 Richard Biener <rguenther@suse.de>
39527 PR tree-optimization/108547
39528 * gimple-predicate-analysis.cc (value_sat_pred_p):
39531 2023-01-26 Siddhesh Poyarekar <siddhesh@gotplt.org>
39533 PR tree-optimization/108522
39534 * tree-object-size.cc (compute_object_offset): Make EXPR
39535 argument non-const. Call component_ref_field_offset.
39537 2023-01-26 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
39539 * config/aarch64/aarch64-option-extensions.def (cssc): Specify
39540 FEATURE_STRING field.
39542 2023-01-26 Gerald Pfeifer <gerald@pfeifer.com>
39544 * doc/sourcebuild.texi: Refer to projects as GCC and GDB.
39546 2023-01-25 Iain Sandoe <iain@sandoe.co.uk>
39550 * gcc.cc: Provide default specs for Modula-2 so that when the
39551 language is not built-in better diagnostics are emitted for
39552 attempts to use .mod or .m2i file extensions.
39554 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39556 * config/arm/mve.md (mve_vqnegq_s<mode>): Fix spacing.
39558 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39560 * config/arm/mve.md (mve_vqabsq_s<mode>): Fix spacing.
39562 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39564 * config/arm/mve.md (mve_vnegq_f<mode>, mve_vnegq_s<mode>):
39567 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39569 * config/arm/mve.md (@mve_vclzq_s<mode>): Fix spacing.
39571 2023-01-25 Andrea Corallo <andrea.corallo@arm.com>
39573 * config/arm/mve.md (mve_vclsq_s<mode>): Fix spacing.
39575 2023-01-25 Richard Biener <rguenther@suse.de>
39577 PR tree-optimization/108523
39578 * tree-ssa-sccvn.cc (visit_phi): Avoid using the exclusive
39579 backedge value for the result when using predication to
39582 2023-01-25 Richard Biener <rguenther@suse.de>
39584 * doc/lto.texi (Command line options): Reword and update reference
39585 to removed lto_read_all_file_options.
39587 2023-01-25 Richard Sandiford <richard.sandiford@arm.com>
39589 * config/aarch64/aarch64.md (umax<mode>3): Separate the CNT and CSSC
39592 2023-01-25 Gerald Pfeifer <gerald@pfeifer.com>
39594 * doc/contrib.texi: Add Jose E. Marchesi.
39596 2023-01-25 Jakub Jelinek <jakub@redhat.com>
39598 PR tree-optimization/108498
39599 * gimple-ssa-store-merging.cc (class store_operand_info):
39600 End coment with full stop rather than comma.
39601 (split_group): Likewise.
39602 (merged_store_group::apply_stores): Clear string_concatenation if
39603 start or end aren't on a byte boundary.
39605 2023-01-25 Siddhesh Poyarekar <siddhesh@gotplt.org>
39606 Jakub Jelinek <jakub@redhat.com>
39608 PR tree-optimization/108522
39609 * tree-object-size.cc (compute_object_offset): Use
39610 TREE_OPERAND(ref, 2) for COMPONENT_REF when available.
39612 2023-01-24 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
39614 * config/xtensa/xtensa.md:
39615 Fix exit from loops detecting references before overwriting in the
39618 2023-01-24 Vladimir N. Makarov <vmakarov@redhat.com>
39620 * lra-constraints.cc (get_hard_regno): Remove final_p arg. Always
39621 do elimination but only for hard register.
39622 (operands_match_p, uses_hard_regs_p, process_alt_operands): Adjust
39623 calls of get_hard_regno.
39625 2023-01-24 Stefan Schulze Frielinghaus <stefansf@linux.ibm.com>
39627 * config/s390/s390-d.cc (s390_d_target_versions): Fix detection
39630 2023-01-24 Andre Vieira <andre.simoesdiasvieira@arm.com>
39633 * config/arm/mve.md (mve_vstrbq_p_<supf><mode>, mve_vstrhq_p_fv8hf,
39634 mve_vstrhq_p_<supf><mode>, mve_vstrwq_p_<supf>v4si): Add memory operand
39637 2023-01-24 Xianmiao Qu <cooper.qu@linux.alibaba.com>
39639 * config.gcc(csky-*-linux*): Define CSKY_ENABLE_MULTILIB
39640 and only include 'csky/t-csky-linux' when enable multilib.
39641 * config/csky/csky-linux-elf.h(SYSROOT_SUFFIX_SPEC): Don't
39642 define it when disable multilib.
39644 2023-01-24 Richard Biener <rguenther@suse.de>
39646 PR tree-optimization/108500
39647 * dominance.h (calculate_dominance_info): Add parameter
39648 to indicate fast-query compute, defaulted to true.
39649 * dominance.cc (calculate_dominance_info): Honor
39650 fast-query compute parameter.
39651 * tree-cfgcleanup.cc (cleanup_tree_cfg_noloop): Do
39652 not compute the dominator fast-query DFS numbers.
39654 2023-01-24 Eric Biggers <ebiggers@google.com>
39657 * optc-save-gen.awk: Fix copy-and-paste error.
39659 2023-01-24 Jakub Jelinek <jakub@redhat.com>
39662 * cgraphbuild.cc: Include gimplify.h.
39663 (record_reference): Replace VAR_DECLs with DECL_HAS_VALUE_EXPR_P with
39664 their corresponding DECL_VALUE_EXPR expressions after unsharing.
39666 2023-01-24 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39669 * config.gcc (tm_file): Move the variable out of loop.
39671 2023-01-24 Lulu Cheng <chenglulu@loongson.cn>
39672 Yang Yujie <yangyujie@loongson.cn>
39675 * config/loongarch/loongarch.cc (loongarch_classify_address):
39676 Add precessint for CONST_INT.
39677 (loongarch_print_operand_reloc): Operand modifier 'c' is supported.
39678 (loongarch_print_operand): Increase the processing of '%c'.
39679 * doc/extend.texi: Adds documents for LoongArch operand modifiers.
39680 And port the public operand modifiers information to this document.
39682 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39684 * doc/invoke.texi (-mbranch-protection): Update documentation.
39686 2023-01-23 Richard Biener <rguenther@suse.de>
39689 * config/sparc/freebsd.h (ENDFILE_SPEC): Don't add crtfastmath.o
39691 * config/sparc/linux.h (ENDFILE_SPEC): Likewise.
39692 * config/sparc/linux64.h (ENDFILE_SPEC): Likewise.
39693 * config/sparc/sp-elf.h (ENDFILE_SPEC): Likewise.
39694 * config/sparc/sp64-elf.h (ENDFILE_SPEC): Likewise.
39696 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39698 * config/arm/aout.h (ra_auth_code): Add entry in enum.
39699 * config/arm/arm.cc (emit_multi_reg_push): Add RA_AUTH_CODE register
39700 to dwarf frame expression.
39701 (arm_emit_multi_reg_pop): Restore RA_AUTH_CODE register.
39702 (arm_expand_prologue): Update frame related information and reg notes
39703 for pac/pacbit insn.
39704 (arm_regno_class): Check for pac pseudo reigster.
39705 (arm_dbx_register_number): Assign ra_auth_code register number in dwarf.
39706 (arm_init_machine_status): Set pacspval_needed to zero.
39707 (arm_debugger_regno): Check for PAC register.
39708 (arm_unwind_emit_sequence): Print .save directive with ra_auth_code
39710 (arm_unwind_emit_set): Add entry for IP_REGNUM in switch case.
39711 (arm_unwind_emit): Update REG_CFA_REGISTER case._
39712 * config/arm/arm.h (FIRST_PSEUDO_REGISTER): Modify.
39713 (DWARF_PAC_REGNUM): Define.
39714 (IS_PAC_REGNUM): Likewise.
39715 (enum reg_class): Add PAC_REG entry.
39716 (machine_function): Add pacbti_needed state to structure.
39717 * config/arm/arm.md (RA_AUTH_CODE): Define.
39719 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39721 * config.gcc ($tm_file): Update variable.
39722 * config/arm/arm-mlib.h: Create new header file.
39723 * config/arm/t-rmprofile (MULTI_ARCH_DIRS_RM): Rename mbranch-protection
39724 multilib arch directory.
39725 (MULTILIB_REUSE): Add multilib reuse rules.
39726 (MULTILIB_MATCHES): Add multilib match rules.
39728 2023-01-23 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39730 * config/arm/arm-cpus.in (cortex-m85): Define new CPU.
39731 * config/arm/arm-tables.opt: Regenerate.
39732 * config/arm/arm-tune.md: Likewise.
39733 * doc/invoke.texi (Arm Options): Document -mcpu=cortex-m85.
39734 * (-mfix-cmse-cve-2021-35465): Likewise.
39736 2023-01-23 Richard Biener <rguenther@suse.de>
39738 PR tree-optimization/108482
39739 * tree-vect-generic.cc (expand_vector_operations): Fold remaining
39740 .LOOP_DIST_ALIAS calls.
39742 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39744 * config.gcc (arm*-*-*): Add 'aarch-bti-insert.o' object.
39745 * config/arm/arm-protos.h: Update.
39746 * config/arm/aarch-common-protos.h: Declare
39747 'aarch_bti_arch_check'.
39748 * config/arm/arm.cc (aarch_bti_enabled) Update.
39749 (aarch_bti_j_insn_p, aarch_pac_insn_p, aarch_gen_bti_c)
39750 (aarch_gen_bti_j, aarch_bti_arch_check): New functions.
39751 * config/arm/arm.md (bti_nop): New insn.
39752 * config/arm/t-arm (PASSES_EXTRA): Add 'arm-passes.def'.
39753 (aarch-bti-insert.o): New target.
39754 * config/arm/unspecs.md (VUNSPEC_BTI_NOP): New unspec.
39755 * config/arm/aarch-bti-insert.cc (rest_of_insert_bti): Verify arch
39757 (gate): Make use of 'aarch_bti_arch_check'.
39758 * config/arm/arm-passes.def: New file.
39759 * config/aarch64/aarch64.cc (aarch_bti_arch_check): New function.
39761 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39763 * config.gcc (aarch64*-*-*): Rename 'aarch64-bti-insert.o' into
39764 'aarch-bti-insert.o'.
39765 * config/aarch64/aarch64-protos.h: Remove 'aarch64_bti_enabled'
39767 * config/aarch64/aarch64.cc (aarch_bti_enabled): Rename.
39768 (aarch_bti_j_insn_p, aarch_pac_insn_p): New functions.
39769 (aarch64_output_mi_thunk)
39770 (aarch64_print_patchable_function_entry)
39771 (aarch64_file_end_indicate_exec_stack): Update renamed function
39772 calls to renamed functions.
39773 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Likewise.
39774 * config/aarch64/t-aarch64 (aarch-bti-insert.o): Update
39776 * config/aarch64/aarch64-bti-insert.cc: Delete.
39777 * config/arm/aarch-bti-insert.cc: New file including and
39778 generalizing code from aarch64-bti-insert.cc.
39779 * config/arm/aarch-common-protos.h: Update.
39781 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39783 * config/arm/arm.h (arm_arch8m_main): Declare it.
39784 * config/arm/arm-protos.h (arm_current_function_pac_enabled_p):
39786 * config/arm/arm.cc (arm_arch8m_main): Define it.
39787 (arm_option_reconfigure_globals): Set arm_arch8m_main.
39788 (arm_compute_frame_layout, arm_expand_prologue)
39789 (thumb2_expand_return, arm_expand_epilogue)
39790 (arm_conditional_register_usage): Update for pac codegen.
39791 (arm_current_function_pac_enabled_p): New function.
39792 (aarch_bti_enabled) New function.
39793 (use_return_insn): Return zero when pac is enabled.
39794 * config/arm/arm.md (pac_ip_lr_sp, pacbti_ip_lr_sp, aut_ip_lr_sp):
39796 * config/arm/unspecs.md (UNSPEC_PAC_NOP)
39797 (VUNSPEC_PACBTI_NOP, VUNSPEC_AUT_NOP): Add unspecs.
39799 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39801 * config/arm/t-rmprofile: Add multilib rules for march +pacbti and
39802 mbranch-protection.
39804 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39805 Tejas Belagod <tbelagod@arm.com>
39807 * config/arm/arm.cc (arm_file_start): Emit EABI attributes for
39808 Tag_PAC_extension, Tag_BTI_extension, TAG_BTI_use, TAG_PACRET_use.
39810 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39811 Tejas Belagod <tbelagod@arm.com>
39812 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
39814 * ginclude/unwind-arm-common.h (_Unwind_VRS_RegClass): Introduce
39815 new pseudo register class _UVRSC_PAC.
39817 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39818 Tejas Belagod <tbelagod@arm.com>
39820 * config/arm/arm-c.cc (arm_cpu_builtins): Define
39821 __ARM_FEATURE_BTI_DEFAULT, __ARM_FEATURE_PAC_DEFAULT,
39822 __ARM_FEATURE_PAUTH and __ARM_FEATURE_BTI.
39824 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39825 Tejas Belagod <tbelagod@arm.com>
39827 * doc/sourcebuild.texi: Document arm_pacbti_hw.
39829 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39830 Tejas Belagod <tbelagod@arm.com>
39831 Richard Earnshaw <Richard.Earnshaw@arm.com>
39833 * config/arm/arm.cc (arm_configure_build_target): Parse and validate
39834 -mbranch-protection option and initialize appropriate data structures.
39835 * config/arm/arm.opt (-mbranch-protection): New option.
39836 * doc/invoke.texi (Arm Options): Document it.
39838 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39839 Tejas Belagod <tbelagod@arm.com>
39841 * config/arm/arm.h (TARGET_HAVE_PACBTI): New macro.
39842 * config/arm/arm-cpus.in (pacbti): New feature.
39843 * doc/invoke.texi (Arm Options): Document it.
39845 2023-01-23 Andrea Corallo <andrea.corallo@arm.com>
39846 Tejas Belagod <tbelagod@arm.com>
39848 * common/config/aarch64/aarch64-common.cc: Include aarch-common.h.
39849 (all_architectures): Fix comment.
39850 (aarch64_parse_extension): Rename return type, enum value names.
39851 * config/aarch64/aarch64-c.cc (aarch64_update_cpp_builtins): Rename
39852 factored out aarch_ra_sign_scope and aarch_ra_sign_key variables.
39853 Also rename corresponding enum values.
39854 * config/aarch64/aarch64-opts.h (aarch64_function_type): Factor
39855 out aarch64_function_type and move it to common code as
39856 aarch_function_type in aarch-common.h.
39857 * config/aarch64/aarch64-protos.h: Include common types header,
39858 move out types aarch64_parse_opt_result and aarch64_key_type to
39860 * config/aarch64/aarch64.cc: Move mbranch-protection parsing types
39861 and functions out into aarch-common.h and aarch-common.cc. Fix up
39862 all the name changes resulting from the move.
39863 * config/aarch64/aarch64.md: Fix up aarch64_ra_sign_key type name change
39865 * config/aarch64/aarch64.opt: Include aarch-common.h to import
39866 type move. Fix up name changes from factoring out common code and
39868 * config/arm/aarch-common-protos.h: Export factored out routines to both
39870 * config/arm/aarch-common.cc: Include newly factored out types.
39871 Move all mbranch-protection code and data structures from
39873 * config/arm/aarch-common.h: New header that declares types shared
39874 between aarch32 and aarch64 backends.
39875 * config/arm/arm-protos.h: Declare types and variables that are
39876 made common to aarch64 and aarch32 backends - aarch_ra_sign_key,
39877 aarch_ra_sign_scope and aarch_enable_bti.
39878 * config/arm/arm.opt (config/arm/aarch-common.h): Include header.
39879 (aarch_ra_sign_scope, aarch_enable_bti): Declare variable.
39880 * config/arm/arm.cc: Add missing includes.
39882 2023-01-23 Tobias Burnus <tobias@codesourcery.com>
39884 * doc/install.texi (amdgcn, nvptx): Require newlib 4.3.0.
39886 2023-01-23 Richard Biener <rguenther@suse.de>
39888 PR tree-optimization/108449
39889 * cgraphunit.cc (check_global_declaration): Do not turn
39890 undefined statics into externs.
39892 2023-01-22 Dimitar Dimitrov <dimitar@dinux.eu>
39894 * config/pru/pru.h (CLZ_DEFINED_VALUE_AT_ZERO): Fix value for QI
39895 and HI input modes.
39896 * config/pru/pru.md (clz): Fix generated code for QI and HI
39899 2023-01-22 Cupertino Miranda <cupertino.miranda@oracle.com>
39901 * config/v850/v850.cc (v850_select_section): Put const volatile
39902 objects into read-only sections.
39904 2023-01-20 Tejas Belagod <tejas.belagod@arm.com>
39906 * config/aarch64/arm_neon.h (vmull_p64, vmull_high_p64, vaeseq_u8,
39907 vaesdq_u8, vaesmcq_u8, vaesimcq_u8): Gate under "nothing+aes".
39908 (vsha1*_u32, vsha256*_u32): Gate under "nothing+sha2".
39910 2023-01-20 Jakub Jelinek <jakub@redhat.com>
39912 PR tree-optimization/108457
39913 * tree-ssa-loop-niter.cc (build_cltz_expr): Use
39914 SCALAR_INT_TYPE_MODE (utype) directly as C[LT]Z_DEFINED_VALUE_AT_ZERO
39915 argument instead of a temporary. Formatting fixes.
39917 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39919 PR tree-optimization/108447
39920 * value-relation.cc (rr_union_table): Fix VREL_UNDEFINED row order.
39921 (relation_tests): Add self-tests for relation_{intersect,union}
39923 * selftest.h (relation_tests): Declare.
39924 * function-tests.cc (test_ranges): Call it.
39926 2023-01-19 H.J. Lu <hjl.tools@gmail.com>
39929 * config/i386/i386-expand.cc (ix86_expand_builtin): Check
39930 invalid third argument to __builtin_ia32_prefetch.
39932 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39934 PR middle-end/108459
39935 * omp-expand.cc (expand_omp_for_init_counts): Use fold_build1 rather
39936 than fold_unary for NEGATE_EXPR.
39938 2023-01-19 Christophe Lyon <christophe.lyon@arm.com>
39941 * config/aarch64/aarch64.cc (aarch64_layout_arg): Improve
39942 comment. Move assert about alignment a bit later.
39944 2023-01-19 Jakub Jelinek <jakub@redhat.com>
39946 PR tree-optimization/108440
39947 * tree-ssa-forwprop.cc: Include gimple-range.h.
39948 (simplify_rotate): For the forms with T2 wider than T and shift counts of
39949 Y and B - Y add & (B - 1) masking for the rotate count if Y could be equal
39950 to B. For the forms with T2 wider than T and shift counts of
39951 Y and (-Y) & (B - 1), don't punt if range could be [B, B2], but only if
39952 range doesn't guarantee Y < B or Y = N * B. If range doesn't guarantee
39953 Y < B, also add & (B - 1) masking for the rotate count. Use lazily created
39954 pass specific ranger instead of get_global_range_query.
39955 (pass_forwprop::execute): Disable that ranger at the end of pass if it has
39958 2023-01-19 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
39960 * config/aarch64/aarch64-simd.md (aarch64_simd_vec_set<mode>): Use
39961 exact_log2 (INTVAL (operands[2])) >= 0 as condition for gating
39963 (aarch64_simd_vec_copy_lane<mode>): Likewise.
39964 (aarch64_simd_vec_copy_lane_<vswap_width_name><mode>): Likewise.
39966 2023-01-19 Alexandre Oliva <oliva@adacore.com>
39969 * sched-deps.cc (sched_analyze_2): Skip cselib address lookup
39970 within debug insns.
39972 2023-01-18 Martin Jambor <mjambor@suse.cz>
39975 * cgraph.cc (cgraph_node::remove): Check whether nodes up the
39976 lcone_of chain also do not need the body.
39978 2023-01-18 Richard Biener <rguenther@suse.de>
39981 2022-12-16 Richard Biener <rguenther@suse.de>
39983 PR middle-end/108086
39984 * tree-inline.cc (remap_ssa_name): Do not unshare the
39985 result from the decl_map.
39987 2023-01-18 Murray Steele <murray.steele@arm.com>
39990 * config/arm/arm_mve.h (__arm_vst1q_p_u8): Use prefixed intrinsic
39992 (__arm_vst1q_p_s8): Likewise.
39993 (__arm_vld1q_z_u8): Likewise.
39994 (__arm_vld1q_z_s8): Likewise.
39995 (__arm_vst1q_p_u16): Likewise.
39996 (__arm_vst1q_p_s16): Likewise.
39997 (__arm_vld1q_z_u16): Likewise.
39998 (__arm_vld1q_z_s16): Likewise.
39999 (__arm_vst1q_p_u32): Likewise.
40000 (__arm_vst1q_p_s32): Likewise.
40001 (__arm_vld1q_z_u32): Likewise.
40002 (__arm_vld1q_z_s32): Likewise.
40003 (__arm_vld1q_z_f16): Likewise.
40004 (__arm_vst1q_p_f16): Likewise.
40005 (__arm_vld1q_z_f32): Likewise.
40006 (__arm_vst1q_p_f32): Likewise.
40008 2023-01-18 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40010 * config/xtensa/xtensa.md (xorsi3_internal):
40011 Rename from the original of "xorsi3".
40012 (xorsi3): New expansion pattern that emits addition rather than
40013 bitwise-XOR when the second source is a constant of -2147483648
40016 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
40017 Andrew Pinski <apinski@marvell.com>
40020 * config/rs6000/rs6000-overload.def (VEC_VSUBCUQ): Fix typo
40021 vec_vsubcuqP with vec_vsubcuq.
40023 2023-01-18 Kewen Lin <linkw@linux.ibm.com>
40026 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
40027 support for invalid uses of MMA opaque type in function arguments.
40029 2023-01-18 liuhongt <hongtao.liu@intel.com>
40032 * config/i386/cygwin.h (ENDFILE_SPEC): Link crtfastmath.o
40033 whenever -mdaz-ftz is specified. Don't link crtfastmath.o when
40034 -share or -mno-daz-ftz is specified.
40035 * config/i386/darwin.h (ENDFILE_SPEC): Ditto.
40036 * config/i386/mingw32.h (ENDFILE_SPEC): Ditto.
40038 2023-01-17 Jose E. Marchesi <jose.marchesi@oracle.com>
40040 * config/bpf/bpf.cc (bpf_option_override): Disable
40043 2023-01-17 Jakub Jelinek <jakub@redhat.com>
40045 PR tree-optimization/106523
40046 * tree-ssa-forwprop.cc (simplify_rotate): For the
40047 patterns with (-Y) & (B - 1) in one operand's shift
40048 count and Y in another, if T2 has wider precision than T,
40049 punt if Y could have a value in [B, B2 - 1] range.
40051 2023-01-16 H.J. Lu <hjl.tools@gmail.com>
40054 * config/i386/i386.cc (x86_output_mi_thunk): Disable
40055 -mforce-indirect-call for PIC in 32-bit mode.
40057 2023-01-16 Jan Hubicka <hubicka@ucw.cz>
40060 * ipa-modref.cc (modref_access_analysis::analyze): Use
40061 find_always_executed_bbs.
40062 * ipa-sra.cc (process_scan_results): Likewise.
40063 * ipa-utils.cc (stmt_may_terminate_function_p): New function.
40064 (find_always_executed_bbs): New function.
40065 * ipa-utils.h (stmt_may_terminate_function_p): Declare.
40066 (find_always_executed_bbs): Declare.
40068 2023-01-16 Jan Hubicka <jh@suse.cz>
40070 * config/i386/i386.cc (ix86_vectorize_builtin_scatter): Guard scatter
40071 by TARGET_USE_SCATTER.
40072 * config/i386/i386.h (TARGET_USE_SCATTER_2PARTS,
40073 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New macros.
40074 * config/i386/x86-tune.def (TARGET_USE_SCATTER_2PARTS,
40075 TARGET_USE_SCATTER_4PARTS, TARGET_USE_SCATTER): New tunes.
40076 (X86_TUNE_AVOID_256FMA_CHAINS, X86_TUNE_AVOID_512FMA_CHAINS): Disable
40077 for znver4. (X86_TUNE_USE_GATHER): Disable for zen4.
40079 2023-01-16 Richard Biener <rguenther@suse.de>
40082 * config/sol2.h (ENDFILE_SPEC): Don't add crtfastmath.o for -shared.
40084 2023-01-16 Stam Markianos-Wright <stam.markianos-wright@arm.com>
40088 * config/arm/arm_mve.h (__ARM_mve_coerce2): Split types.
40089 (__ARM_mve_coerce3): Likewise.
40091 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40093 * tree-ssa-loop-niter.cc (build_popcount_expr): Add IFN support.
40095 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40097 * tree-ssa-loop-niter.cc (number_of_iterations_cltz): New.
40098 (number_of_iterations_bitcount): Add call to the above.
40099 (number_of_iterations_exit_assumptions): Add EQ_EXPR case for
40100 c[lt]z idiom recognition.
40102 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40104 * doc/sourcebuild.texi: Add missing target attributes.
40106 2023-01-16 Andrew Carlotti <andrew.carlotti@arm.com>
40108 PR tree-optimization/94793
40109 * tree-scalar-evolution.cc (expression_expensive_p): Add checks
40111 * tree-ssa-loop-niter.cc (build_cltz_expr): New.
40112 (number_of_iterations_cltz_complement): New.
40113 (number_of_iterations_bitcount): Add call to the above.
40115 2023-01-16 Jonathan Wakely <jwakely@redhat.com>
40117 * doc/extend.texi (Common Function Attributes): Fix grammar.
40119 2023-01-16 Jakub Jelinek <jakub@redhat.com>
40122 * config/riscv/riscv-vsetvl.h: Add space in between Copyright and (C).
40123 * config/riscv/riscv-vsetvl.cc: Likewise.
40125 2023-01-16 Jakub Jelinek <jakub@redhat.com>
40128 * config/i386/xmmintrin.h (_mm_undefined_ps): Temporarily
40129 disable -Winit-self using pragma GCC diagnostic ignored.
40130 * config/i386/emmintrin.h (_mm_undefined_pd, _mm_undefined_si128):
40132 * config/i386/avxintrin.h (_mm256_undefined_pd, _mm256_undefined_ps,
40133 _mm256_undefined_si256): Likewise.
40134 * config/i386/avx512fintrin.h (_mm512_undefined_pd,
40135 _mm512_undefined_ps, _mm512_undefined_epi32): Likewise.
40136 * config/i386/avx512fp16intrin.h (_mm_undefined_ph,
40137 _mm256_undefined_ph, _mm512_undefined_ph): Likewise.
40139 2023-01-16 Kewen Lin <linkw@linux.ibm.com>
40142 * config/rs6000/rs6000.cc (rs6000_opaque_type_invalid_use_p): Add the
40143 support for invalid uses in inline asm, factor out the checking and
40144 erroring to lambda function check_and_error_invalid_use.
40146 2023-01-15 Aldy Hernandez <aldyh@redhat.com>
40148 PR tree-optimization/107608
40149 * range-op-float.cc (range_operator_float::fold_range): Avoid
40150 folding into INF when flag_trapping_math.
40151 * value-range.h (frange::known_isinf): Return false for possible NANs.
40153 2023-01-15 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40155 * config.gcc (csky-*-*): Support --with-float=softfp.
40157 2023-01-14 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40159 * config/xtensa/xtensa-protos.h (order_regs_for_local_alloc):
40160 Rename to xtensa_adjust_reg_alloc_order.
40161 * config/xtensa/xtensa.cc (xtensa_adjust_reg_alloc_order):
40162 Ditto. And also remove code to reorder register numbers for
40163 leaf functions, rename the tables, and adjust the allocation
40164 order for the call0 ABI to use register A0 more.
40165 (xtensa_leaf_regs): Remove.
40166 * config/xtensa/xtensa.h (REG_ALLOC_ORDER): Cosmetics.
40167 (order_regs_for_local_alloc): Rename as the above.
40168 (LEAF_REGISTERS, LEAF_REG_REMAP, leaf_function): Remove.
40170 2023-01-14 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
40172 * config/aarch64/aarch64-sve.md (aarch64_vec_duplicate_vq<mode>_le):
40173 Change to define_insn_and_split to fold ldr+dup to ld1rq.
40174 * config/aarch64/predicates.md (aarch64_sve_dup_ld1rq_operand): New.
40176 2023-01-14 Alexandre Oliva <oliva@adacore.com>
40178 * hash-table.h (is_deleted): Precheck !is_empty.
40179 (mark_deleted): Postcheck !is_empty.
40180 (copy constructor): Test is_empty before is_deleted.
40182 2023-01-14 Alexandre Oliva <oliva@adacore.com>
40185 * config/arm/arm.md (movmisaligndi): Prefer aligned SImode
40188 2023-01-13 Eric Botcazou <ebotcazou@adacore.com>
40190 PR rtl-optimization/108274
40191 * function.cc (thread_prologue_and_epilogue_insns): Also update the
40192 DF information for calls in a few more cases.
40194 2023-01-13 John David Anglin <danglin@gcc.gnu.org>
40196 * config/pa/pa-linux.h (TARGET_SYNC_LIBCALL): Delete define.
40197 * config/pa/pa.cc (pa_init_libfuncs): Use MAX_SYNC_LIBFUNC_SIZE
40199 * config/pa/pa.h (TARGET_SYNC_LIBCALLS): Use flag_sync_libcalls.
40200 (MAX_SYNC_LIBFUNC_SIZE): Define.
40201 (TARGET_CPU_CPP_BUILTINS): Define __SOFTFP__ when soft float is
40203 * config/pa/pa.md (atomic_storeqi): Emit __atomic_exchange_1
40204 libcall when sync libcalls are disabled.
40205 (atomic_storehi, atomic_storesi, atomic_storedi): Likewise.
40206 (atomic_loaddi): Emit __atomic_load_8 libcall when sync libcalls
40207 are disabled on 32-bit target.
40208 * config/pa/pa.opt (matomic-libcalls): New option.
40209 * doc/invoke.texi (HPPA Options): Update.
40211 2023-01-13 Alexander Monakov <amonakov@ispras.ru>
40213 PR rtl-optimization/108117
40214 PR rtl-optimization/108132
40215 * sched-deps.cc (deps_analyze_insn): Do not schedule across
40216 calls before reload.
40218 2023-01-13 Srinath Parvathaneni <srinath.parvathaneni@arm.com>
40220 * common/config/arm/arm-common.cc (arm_canon_arch_option_1): Ignore cde
40221 options for -mlibarch.
40222 * config/arm/arm-cpus.in (begin cpu cortex-m55): Add cde options.
40223 * doc/invoke.texi (CDE): Document options for Cortex-M55 CPU.
40225 2023-01-13 Qing Zhao <qing.zhao@oracle.com>
40227 * attribs.cc (strict_flex_array_level_of): Move this function to ...
40228 * attribs.h (strict_flex_array_level_of): Remove the declaration.
40229 * gimple-array-bounds.cc (array_bounds_checker::check_array_ref):
40230 replace the referece to strict_flex_array_level_of with
40231 DECL_NOT_FLEXARRAY.
40232 * tree.cc (component_ref_size): Likewise.
40234 2023-01-13 Richard Biener <rguenther@suse.de>
40237 * config/arm/linux-eabi.h (ENDFILE_SPEC): Don't add
40238 crtfastmath.o for -shared.
40239 * config/arm/unknown-elf.h (STARTFILE_SPEC): Likewise.
40241 2023-01-13 Richard Biener <rguenther@suse.de>
40244 * config/aarch64/aarch64-elf-raw.h (ENDFILE_SPEC): Don't add
40245 crtfastmath.o for -shared.
40246 * config/aarch64/aarch64-freebsd.h (GNU_USER_TARGET_MATHFILE_SPEC):
40248 * config/aarch64/aarch64-linux.h (GNU_USER_TARGET_MATHFILE_SPEC):
40251 2023-01-13 Richard Sandiford <richard.sandiford@arm.com>
40253 * config/aarch64/aarch64.cc (aarch64_dwarf_frame_reg_mode): New
40255 (TARGET_DWARF_FRAME_REG_MODE): Define.
40257 2023-01-13 Richard Biener <rguenther@suse.de>
40260 * config/aarch64/aarch64.cc (aarch64_gimple_fold_builtin): Don't
40261 update EH info on the fly.
40263 2023-01-13 Richard Biener <rguenther@suse.de>
40265 PR tree-optimization/108387
40266 * tree-ssa-sccvn.cc (visit_nary_op): Check for SSA_NAME
40267 value before inserting expression into the tables.
40269 2023-01-12 Andrew Pinski <apinski@marvell.com>
40270 Roger Sayle <roger@nextmovesoftware.com>
40272 PR tree-optimization/92342
40273 * match.pd ((m1 CMP m2) * d -> (m1 CMP m2) ? d : 0):
40274 Use tcc_comparison and :c for the multiply.
40275 (b & -(a CMP c) -> (a CMP c)?b:0): New pattern.
40277 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
40278 Richard Sandiford <richard.sandiford@arm.com>
40281 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment):
40282 Check DECL_PACKED for bitfield.
40283 (aarch64_layout_arg): Warn when parameter passing ABI changes.
40284 (aarch64_function_arg_boundary): Do not warn here.
40285 (aarch64_gimplify_va_arg_expr): Warn when parameter passing ABI
40288 2023-01-12 Christophe Lyon <christophe.lyon@arm.com>
40289 Richard Sandiford <richard.sandiford@arm.com>
40291 * config/aarch64/aarch64.cc (aarch64_function_arg_alignment): Fix
40293 (aarch64_layout_arg): Factorize warning conditions.
40294 (aarch64_function_arg_boundary): Fix typo.
40295 * function.cc (currently_expanding_function_start): New variable.
40296 (expand_function_start): Handle
40297 currently_expanding_function_start.
40298 * function.h (currently_expanding_function_start): Declare.
40300 2023-01-12 Richard Biener <rguenther@suse.de>
40302 PR tree-optimization/99412
40303 * tree-ssa-reassoc.cc (is_phi_for_stmt): Remove.
40304 (swap_ops_for_binary_stmt): Remove reduction handling.
40305 (rewrite_expr_tree_parallel): Adjust.
40306 (reassociate_bb): Likewise.
40307 * tree-parloops.cc (build_new_reduction): Handle MINUS_EXPR.
40309 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40311 * config/xtensa/xtensa.md (ctzsi2, ffssi2):
40312 Rearrange the emitting codes.
40314 2023-01-12 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40316 * config/xtensa/xtensa.md (*btrue):
40317 Correct value of the attribute "length" that depends on
40318 TARGET_DENSITY and operands, and add '?' character to the register
40319 constraint of the compared operand.
40321 2023-01-12 Alexandre Oliva <oliva@adacore.com>
40323 * hash-table.h (expand): Check elements and deleted counts.
40324 (verify): Likewise.
40326 2023-01-11 Roger Sayle <roger@nextmovesoftware.com>
40328 PR tree-optimization/71343
40329 * tree-ssa-sccvn.cc (visit_nary_op) <case LSHIFT_EXPR>: Make
40330 the value number of the expression X << C the same as the value
40331 number for the multiplication X * (1<<C).
40333 2023-01-11 David Faust <david.faust@oracle.com>
40336 * config/bpf/bpf.cc (bpf_print_operand): Correct handling for
40337 floating point modes.
40339 2023-01-11 Eric Botcazou <ebotcazou@adacore.com>
40341 PR tree-optimization/108199
40342 * tree-sra.cc (sra_modify_expr): Deal with reverse storage order
40343 for bit-field references.
40345 2023-01-11 Kewen Lin <linkw@linux.ibm.com>
40347 * config/rs6000/rs6000.cc (rs6000_option_override_internal): Make
40348 OPTION_MASK_P10_FUSION implicit setting honour Power10 tuning setting.
40349 * config/rs6000/rs6000-cpus.def (ISA_3_1_MASKS_SERVER): Remove
40350 OPTION_MASK_P10_FUSION.
40352 2023-01-11 Richard Biener <rguenther@suse.de>
40354 PR tree-optimization/107767
40355 * tree-cfgcleanup.cc (phi_alternatives_equal): Export.
40356 * tree-cfgcleanup.h (phi_alternatives_equal): Declare.
40357 * tree-switch-conversion.cc (switch_conversion::collect):
40358 Count unique non-default targets accounting for later
40359 merging opportunities.
40361 2023-01-11 Martin Liska <mliska@suse.cz>
40363 PR middle-end/107976
40364 * params.opt: Limit JT params.
40365 * stmt.cc (emit_case_dispatch_table): Use auto_vec.
40367 2023-01-11 Richard Biener <rguenther@suse.de>
40369 PR tree-optimization/108352
40370 * tree-ssa-threadbackward.cc
40371 (back_threader_profitability::profitable_path_p): Adjust
40372 heuristic that allows non-multi-way branch threads creating
40374 * doc/invoke.texi (--param fsm-scale-path-blocks): Remove.
40375 (--param fsm-scale-path-stmts): Adjust.
40376 * params.opt (--param=fsm-scale-path-blocks=): Remove.
40377 (-param=fsm-scale-path-stmts=): Adjust description.
40379 2023-01-11 Richard Biener <rguenther@suse.de>
40381 PR tree-optimization/108353
40382 * tree-ssa-propagate.cc (cfg_blocks_back, ssa_edge_worklist_back):
40384 (add_ssa_edge): Simplify.
40385 (add_control_edge): Likewise.
40386 (ssa_prop_init): Likewise.
40387 (ssa_prop_fini): Likewise.
40388 (ssa_propagation_engine::ssa_propagate): Likewise.
40390 2023-01-11 Andreas Krebbel <krebbel@linux.ibm.com>
40392 * config/s390/s390.md (*not<mode>): New pattern.
40394 2023-01-11 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40396 * config/xtensa/xtensa.cc (xtensa_insn_cost):
40397 Let insn cost for size be obtained by applying COSTS_N_INSNS()
40398 to instruction length and then dividing by 3.
40400 2023-01-10 Richard Biener <rguenther@suse.de>
40402 PR tree-optimization/106293
40403 * tree-ssa-dse.cc (dse_classify_store): Use a worklist to
40404 process degenerate PHI defs.
40406 2023-01-10 Roger Sayle <roger@nextmovesoftware.com>
40408 PR rtl-optimization/106421
40409 * cprop.cc (bypass_block): Check that DEST is local to this
40410 function (non-NULL) before calling find_edge.
40412 2023-01-10 Martin Jambor <mjambor@suse.cz>
40415 * ipa-param-manipulation.h (ipa_param_body_adjustments): New members
40416 sort_replacements, lookup_first_base_replacement and
40417 m_sorted_replacements_p.
40418 * ipa-param-manipulation.cc: Define INCLUDE_ALGORITHM.
40419 (ipa_param_body_adjustments::register_replacement): Set
40420 m_sorted_replacements_p to false.
40421 (compare_param_body_replacement): New function.
40422 (ipa_param_body_adjustments::sort_replacements): Likewise.
40423 (ipa_param_body_adjustments::common_initialization): Call
40425 (ipa_param_body_adjustments::ipa_param_body_adjustments): Initialize
40426 m_sorted_replacements_p.
40427 (ipa_param_body_adjustments::lookup_replacement_1): Rework to use
40429 (ipa_param_body_adjustments::lookup_first_base_replacement): New
40431 (ipa_param_body_adjustments::modify_call_stmt): Use
40432 lookup_first_base_replacement.
40433 * omp-simd-clone.cc (ipa_simd_modify_function_body): Call
40434 adjustments->sort_replacements.
40436 2023-01-10 Richard Biener <rguenther@suse.de>
40438 PR tree-optimization/108314
40439 * tree-vect-stmts.cc (vectorizable_condition): Do not
40440 perform BIT_NOT_EXPR optimization for EXTRACT_LAST_REDUCTION.
40442 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40444 * config/csky/csky-linux-elf.h (SYSROOT_SUFFIX_SPEC): New.
40446 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40448 * config/csky/csky.h (MULTILIB_DEFAULTS): Fix float abi option.
40450 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40452 * config/csky/csky.cc (csky_cpu_cpp_builtins): Add builtin
40453 defines for soft float abi.
40455 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40457 * config/csky/csky.md (smart_bseti): Change condition to CSKY_ISA_FEATURE (E1).
40458 (smart_bclri): Likewise.
40459 (fast_bseti): Change condition to CSKY_ISA_FEATURE (E2).
40460 (fast_bclri): Likewise.
40461 (fast_cmpnesi_i): Likewise.
40462 (*fast_cmpltsi_i): Likewise.
40463 (*fast_cmpgeusi_i): Likewise.
40465 2023-01-10 Xianmiao Qu <cooper.qu@linux.alibaba.com>
40467 * config/csky/csky_insn_fpuv3.md (l<frm_pattern><fixsuop><mode>si2): Test
40468 flag_fp_int_builtin_inexact || !flag_trapping_math.
40469 (<frm_pattern><mode>2): Likewise.
40471 2023-01-10 Andreas Krebbel <krebbel@linux.ibm.com>
40473 * config/s390/s390.cc (s390_register_info): Check call_used_regs
40474 instead of hard-coding the register numbers for call saved
40476 (s390_optimize_register_info): Likewise.
40478 2023-01-09 Eric Botcazou <ebotcazou@adacore.com>
40480 * doc/gm2.texi (Overview): Fix @node markers.
40481 (Using): Likewise. Remove subsections that were moved to Overview
40482 from the menu and move others around.
40484 2023-01-09 Richard Biener <rguenther@suse.de>
40486 PR middle-end/108209
40487 * genmatch.cc (commutative_op): Fix return value for
40488 user-id with non-commutative first replacement.
40490 2023-01-09 Jakub Jelinek <jakub@redhat.com>
40493 * calls.cc (expand_call): For calls with
40494 TYPE_NO_NAMED_ARGS_STDARG_P (funtype) use zero for n_named_args.
40497 2023-01-09 Richard Biener <rguenther@suse.de>
40499 PR middle-end/69482
40500 * cfgexpand.cc (discover_nonconstant_array_refs_r): Volatile
40501 qualified accesses also force objects to memory.
40503 2023-01-09 Martin Liska <mliska@suse.cz>
40506 * lto-cgraph.cc (compute_ltrans_boundary): Do not insert
40507 NULL (deleleted value) to a hash_set.
40509 2023-01-08 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40511 * config/xtensa/xtensa.md (*splice_bits):
40512 New insn_and_split pattern.
40514 2023-01-07 Takayuki 'January June' Suwa <jjsuwa_sys3175@yahoo.co.jp>
40516 * config/xtensa/xtensa.cc
40517 (xtensa_split_imm_two_addends, xtensa_emit_add_imm):
40518 New helper functions.
40519 (xtensa_set_return_address, xtensa_output_mi_thunk):
40520 Change to use the helper function.
40521 (xtensa_emit_adjust_stack_ptr): Ditto.
40522 And also change to try reusing the content of scratch register
40523 A9 if the register is not modified in the function body.
40525 2023-01-07 LIU Hao <lh_mouse@126.com>
40527 PR middle-end/108300
40528 * config/xtensa/xtensa-dynconfig.c: Define `WIN32_LEAN_AND_MEAN`
40529 before <windows.h>.
40530 * diagnostic-color.cc: Likewise.
40531 * plugin.cc: Likewise.
40532 * prefix.cc: Likewise.
40534 2023-01-06 Joseph Myers <joseph@codesourcery.com>
40536 * doc/extend.texi (__builtin_tgmath): Do not restate standard rule
40537 for handling real integer types.
40539 2023-01-06 Tamar Christina <tamar.christina@arm.com>
40542 2022-12-12 Tamar Christina <tamar.christina@arm.com>
40544 * config/aarch64/aarch64-simd.md (*aarch64_simd_movv2hf): New.
40545 (mov<mode>, movmisalign<mode>, aarch64_dup_lane<mode>,
40546 aarch64_store_lane0<mode>, aarch64_simd_vec_set<mode>,
40547 @aarch64_simd_vec_copy_lane<mode>, vec_set<mode>,
40548 reduc_<optab>_scal_<mode>, reduc_<fmaxmin>_scal_<mode>,
40549 aarch64_reduc_<optab>_internal<mode>, aarch64_get_lane<mode>,
40550 vec_init<mode><Vel>, vec_extract<mode><Vel>): Support V2HF.
40551 (aarch64_simd_dupv2hf): New.
40552 * config/aarch64/aarch64.cc (aarch64_classify_vector_mode):
40554 * config/aarch64/iterators.md (VHSDF_P): New.
40555 (V2F, VMOVE, nunits, Vtype, Vmtype, Vetype, stype, VEL,
40556 Vel, q, vp): Add V2HF.
40557 * config/arm/types.md (neon_fp_reduc_add_h): New.
40559 2023-01-06 Martin Liska <mliska@suse.cz>
40561 PR middle-end/107966
40562 * doc/options.texi: Fix Var documentation in internal manual.
40564 2023-01-05 Roger Sayle <roger@nextmovesoftware.com>
40567 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
40569 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
40570 RTL expansion to allow condition (mask) to be shared/reused,
40571 by avoiding overwriting pseudos and adding REG_EQUAL notes.
40573 2023-01-05 Iain Sandoe <iain@sandoe.co.uk>
40575 * common.opt: Add -static-libgm2.
40576 * config/darwin.h (LINK_SPEC): Handle static-libgm2.
40577 * doc/gm2.texi: Document static-libgm2.
40578 * gcc.cc (driver_handle_option): Allow static-libgm2.
40580 2023-01-05 Tejas Joshi <TejasSanjay.Joshi@amd.com>
40582 * common/config/i386/i386-common.cc (processor_alias_table):
40583 Use CPU_ZNVER4 for znver4.
40584 * config/i386/i386.md: Add znver4.md.
40585 * config/i386/znver4.md: New.
40587 2023-01-04 Jakub Jelinek <jakub@redhat.com>
40589 PR tree-optimization/108253
40590 * tree-vrp.cc (maybe_set_nonzero_bits): Handle var with pointer
40593 2023-01-04 Jakub Jelinek <jakub@redhat.com>
40595 PR middle-end/108237
40596 * generic-match-head.cc: Include tree-pass.h.
40597 (canonicalize_math_p, optimize_vectors_before_lowering_p): Define
40598 to false if cfun and cfun->curr_properties has PROP_gimple_opt_math
40599 resp. PROP_gimple_lvec property set.
40601 2023-01-04 Jakub Jelinek <jakub@redhat.com>
40603 PR sanitizer/108256
40604 * convert.cc (do_narrow): Punt for MULT_EXPR if original
40605 type doesn't wrap around and -fsanitize=signed-integer-overflow
40607 * fold-const.cc (fold_unary_loc) <CASE_CONVERT>: Likewise.
40609 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
40611 * common/config/i386/cpuinfo.h (get_intel_cpu): Handle Emeraldrapids.
40612 * common/config/i386/i386-common.cc: Add Emeraldrapids.
40614 2023-01-04 Hu, Lin1 <lin1.hu@intel.com>
40616 * common/config/i386/cpuinfo.h (get_intel_cpu): Remove case 0xb5
40619 2023-01-03 Sandra Loosemore <sandra@codesourcery.com>
40621 * cgraph.h (struct cgraph_node): Add gc_candidate bit, modify
40622 default constructor to initialize it.
40623 * cgraphunit.cc (expand_all_functions): Save gc_candidate functions
40624 for last and iterate to handle recursive calls. Delete leftover
40625 candidates at the end.
40626 * omp-simd-clone.cc (simd_clone_create): Set gc_candidate bit
40628 * tree-vect-stmts.cc (vectorizable_simd_clone_call): Clear
40629 gc_candidate bit when a clone is used.
40631 2023-01-03 Florian Weimer <fweimer@redhat.com>
40634 2023-01-02 Florian Weimer <fweimer@redhat.com>
40636 * dwarf2cfi.cc (init_return_column_size): Remove.
40637 (init_one_dwarf_reg_size): Adjust.
40638 (generate_dwarf_reg_sizes): New function. Extracted
40639 from expand_builtin_init_dwarf_reg_sizes.
40640 (expand_builtin_init_dwarf_reg_sizes): Call
40641 generate_dwarf_reg_sizes.
40642 * target.def (init_dwarf_reg_sizes_extra): Adjust
40644 * config/msp430/msp430.cc
40645 (msp430_init_dwarf_reg_sizes_extra): Adjust.
40646 * config/rs6000/rs6000.cc
40647 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
40648 * doc/tm.texi: Update.
40650 2023-01-03 Florian Weimer <fweimer@redhat.com>
40653 2023-01-02 Florian Weimer <fweimer@redhat.com>
40655 * debug.h (dwarf_reg_sizes_constant): Declare.
40656 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
40658 2023-01-03 Siddhesh Poyarekar <siddhesh@gotplt.org>
40660 PR tree-optimization/105043
40661 * doc/extend.texi (Object Size Checking): Split out into two
40662 subsections and mention _FORTIFY_SOURCE.
40664 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
40666 * config/i386/i386-expand.cc (ix86_expand_int_movcc): Rewrite
40667 RTL expansion to allow condition (mask) to be shared/reused,
40668 by avoiding overwriting pseudos and adding REG_EQUAL notes.
40670 2023-01-03 Roger Sayle <roger@nextmovesoftware.com>
40673 * config/i386/i386-features.cc
40674 (general_scalar_chain::compute_convert_gain) <case PLUS>: Consider
40675 the gain/cost of converting a MEM operand.
40677 2023-01-03 Jakub Jelinek <jakub@redhat.com>
40679 PR middle-end/108264
40680 * expr.cc (store_expr): For stores into SUBREG_PROMOTED_* targets
40681 from source which doesn't have scalar integral mode first convert
40684 2023-01-03 Jakub Jelinek <jakub@redhat.com>
40686 PR rtl-optimization/108263
40687 * cfgrtl.cc (fixup_reorder_chain): Avoid trying to redirect
40690 2023-01-02 Alexander Monakov <amonakov@ispras.ru>
40693 * config/i386/lujiazui.md (lujiazui_div): New automaton.
40694 (lua_div): New unit.
40695 (lua_idiv_qi): Correct unit in the reservation.
40696 (lua_idiv_qi_load): Ditto.
40697 (lua_idiv_hi): Ditto.
40698 (lua_idiv_hi_load): Ditto.
40699 (lua_idiv_si): Ditto.
40700 (lua_idiv_si_load): Ditto.
40701 (lua_idiv_di): Ditto.
40702 (lua_idiv_di_load): Ditto.
40703 (lua_fdiv_SF): Ditto.
40704 (lua_fdiv_SF_load): Ditto.
40705 (lua_fdiv_DF): Ditto.
40706 (lua_fdiv_DF_load): Ditto.
40707 (lua_fdiv_XF): Ditto.
40708 (lua_fdiv_XF_load): Ditto.
40709 (lua_ssediv_SF): Ditto.
40710 (lua_ssediv_load_SF): Ditto.
40711 (lua_ssediv_V4SF): Ditto.
40712 (lua_ssediv_load_V4SF): Ditto.
40713 (lua_ssediv_V8SF): Ditto.
40714 (lua_ssediv_load_V8SF): Ditto.
40715 (lua_ssediv_SD): Ditto.
40716 (lua_ssediv_load_SD): Ditto.
40717 (lua_ssediv_V2DF): Ditto.
40718 (lua_ssediv_load_V2DF): Ditto.
40719 (lua_ssediv_V4DF): Ditto.
40720 (lua_ssediv_load_V4DF): Ditto.
40722 2023-01-02 Florian Weimer <fweimer@redhat.com>
40724 * debug.h (dwarf_reg_sizes_constant): Declare.
40725 * dwarf2cfi.cc (dwarf_reg_sizes_constant): New function.
40727 2023-01-02 Florian Weimer <fweimer@redhat.com>
40729 * dwarf2cfi.cc (init_return_column_size): Remove.
40730 (init_one_dwarf_reg_size): Adjust.
40731 (generate_dwarf_reg_sizes): New function. Extracted
40732 from expand_builtin_init_dwarf_reg_sizes.
40733 (expand_builtin_init_dwarf_reg_sizes): Call
40734 generate_dwarf_reg_sizes.
40735 * target.def (init_dwarf_reg_sizes_extra): Adjust
40737 * config/msp430/msp430.cc
40738 (msp430_init_dwarf_reg_sizes_extra): Adjust.
40739 * config/rs6000/rs6000.cc
40740 (rs6000_init_dwarf_reg_sizes_extra): Likewise.
40741 * doc/tm.texi: Update.
40743 2023-01-02 Jakub Jelinek <jakub@redhat.com>
40745 * gcc.cc (process_command): Update copyright notice dates.
40746 * gcov-dump.cc (print_version): Ditto.
40747 * gcov.cc (print_version): Ditto.
40748 * gcov-tool.cc (print_version): Ditto.
40749 * gengtype.cc (create_file): Ditto.
40750 * doc/cpp.texi: Bump @copying's copyright year.
40751 * doc/cppinternals.texi: Ditto.
40752 * doc/gcc.texi: Ditto.
40753 * doc/gccint.texi: Ditto.
40754 * doc/gcov.texi: Ditto.
40755 * doc/install.texi: Ditto.
40756 * doc/invoke.texi: Ditto.
40758 2023-01-01 Roger Sayle <roger@nextmovesoftware.com>
40759 Uroš Bizjak <ubizjak@gmail.com>
40761 * config/i386/i386.md (extendditi2): New define_insn.
40762 (define_split): Use DWIH mode iterator to treat new extendditi2
40763 identically to existing extendsidi2_1.
40764 (define_peephole2): Likewise.
40765 (define_peephole2): Likewise.
40766 (define_Split): Likewise.
40769 Copyright (C) 2023 Free Software Foundation, Inc.
40771 Copying and distribution of this file, with or without modification,
40772 are permitted in any medium without royalty provided the copyright
40773 notice and this notice are preserved.