1 ;; Machine description for the RISC-V Zicond extension and functionally-
2 ;; equivalent XVentanaCondOps vendor extension
3 ;; Copyright (C) 2022-2024 Free Software Foundation, Inc.
5 ;; This file is part of GCC.
7 ;; GCC is free software; you can redistribute it and/or modify
8 ;; it under the terms of the GNU General Public License as published by
9 ;; the Free Software Foundation; either version 3, or (at your option)
12 ;; GCC is distributed in the hope that it will be useful,
13 ;; but WITHOUT ANY WARRANTY; without even the implied warranty of
14 ;; MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 ;; GNU General Public License for more details.
17 ;; You should have received a copy of the GNU General Public License
18 ;; along with GCC; see the file COPYING3. If not see
19 ;; <http://www.gnu.org/licenses/>.
21 (define_code_iterator eq_or_ne [eq ne])
22 (define_code_attr eqz [(eq "nez") (ne "eqz")])
23 (define_code_attr nez [(eq "eqz") (ne "nez")])
24 (define_code_attr eqz_ventana [(eq "n") (ne "")])
25 (define_code_attr nez_ventana [(eq "") (ne "n")])
27 ;; Zicond / XVentanaCondOps
28 (define_insn "*czero.<eqz>.<GPR:mode><X:mode>"
29 [(set (match_operand:GPR 0 "register_operand" "=r")
30 (if_then_else:GPR (eq_or_ne (match_operand:X 1 "register_operand" "r")
32 (match_operand:GPR 2 "register_operand" "r")
37 return "czero.<eqz>\t%0,%2,%1";
38 else if (TARGET_XVENTANACONDOPS && TARGET_64BIT)
39 return "vt.maskc<eqz_ventana>\t%0,%2,%1";
43 [(set_attr "type" "zicond")])
45 (define_insn "*czero.<nez>.<GPR:mode><X:mode>"
46 [(set (match_operand:GPR 0 "register_operand" "=r")
47 (if_then_else:GPR (eq_or_ne (match_operand:X 1 "register_operand" "r")
50 (match_operand:GPR 2 "register_operand" "r")))]
54 return "czero.<nez>\t%0,%2,%1";
55 else if (TARGET_XVENTANACONDOPS && TARGET_64BIT)
56 return "vt.maskc<nez_ventana>\t%0,%2,%1";
60 [(set_attr "type" "zicond")])
62 ;; Special optimization under eq/ne in primitive semantics
63 (define_insn "*czero.eqz.<GPR:mode><X:mode>.opt1"
64 [(set (match_operand:GPR 0 "register_operand" "=r")
65 (if_then_else:GPR (eq (match_operand:X 1 "register_operand" "r")
67 (match_operand:GPR 2 "register_operand" "1")
68 (match_operand:GPR 3 "register_operand" "r")))]
69 "TARGET_ZICOND_LIKE && rtx_equal_p (operands[1], operands[2])"
72 return "czero.eqz\t%0,%3,%1";
73 else if (TARGET_XVENTANACONDOPS && TARGET_64BIT)
74 return "vt.maskc\t%0,%3,%1";
78 [(set_attr "type" "zicond")])
80 (define_insn "*czero.nez.<GPR:mode><X:mode>.opt2"
81 [(set (match_operand:GPR 0 "register_operand" "=r")
82 (if_then_else:GPR (ne (match_operand:X 1 "register_operand" "r")
84 (match_operand:GPR 2 "register_operand" "r")
85 (match_operand:GPR 3 "register_operand" "1")))]
86 "TARGET_ZICOND && rtx_equal_p (operands[1], operands[3])"
89 return "czero.eqz\t%0,%2,%1";
90 else if (TARGET_XVENTANACONDOPS && TARGET_64BIT)
91 return "vt.maskc\t%0,%2,%1";
95 [(set_attr "type" "zicond")])
97 ;; Combine creates this form in some cases (particularly the coremark
100 [(set (match_operand:X 0 "register_operand")
101 (and:X (sign_extract:X (match_operand:X 1 "register_operand")
103 (match_operand 2 "immediate_operand"))
104 (match_operand:X 3 "register_operand")))
105 (clobber (match_operand:X 4 "register_operand"))]
106 "TARGET_ZICOND_LIKE && TARGET_ZBS"
107 [(set (match_dup 4) (zero_extract:X (match_dup 1) (const_int 1) (match_dup 2)))
108 (set (match_dup 0) (if_then_else:X (eq:X (match_dup 4) (const_int 0))
113 [(set (match_operand:X 0 "register_operand")
114 (and:X (sign_extract:X (match_operand:X 1 "register_operand")
116 (match_operand 2 "immediate_operand"))
117 (match_operand:X 3 "register_operand")))
118 (clobber (match_operand:X 4 "register_operand"))]
119 "TARGET_ZICOND_LIKE && !TARGET_ZBS && (UINTVAL (operands[2]) < 11)"
120 [(set (match_dup 4) (and:X (match_dup 1) (match_dup 2)))
121 (set (match_dup 0) (if_then_else:X (eq:X (match_dup 4) (const_int 0))
125 operands[2] = GEN_INT (1 << UINTVAL(operands[2]));