stl_bvector.h (swap(_Bit_reference,_Bit_reference)): Move/rename...
[official-gcc.git] / gcc / resource.c
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1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000, 2001, 2002 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 2, or (at your option) any later
9 version.
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
14 for more details.
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING. If not, write to the Free
18 Software Foundation, 59 Temple Place - Suite 330, Boston, MA
19 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
35 #include "params.h"
37 /* This structure is used to record liveness information at the targets or
38 fallthrough insns of branches. We will most likely need the information
39 at targets again, so save them in a hash table rather than recomputing them
40 each time. */
42 struct target_info
44 int uid; /* INSN_UID of target. */
45 struct target_info *next; /* Next info for same hash bucket. */
46 HARD_REG_SET live_regs; /* Registers live at target. */
47 int block; /* Basic block number containing target. */
48 int bb_tick; /* Generation count of basic block info. */
51 #define TARGET_HASH_PRIME 257
53 /* Indicates what resources are required at the beginning of the epilogue. */
54 static struct resources start_of_epilogue_needs;
56 /* Indicates what resources are required at function end. */
57 static struct resources end_of_function_needs;
59 /* Define the hash table itself. */
60 static struct target_info **target_hash_table = NULL;
62 /* For each basic block, we maintain a generation number of its basic
63 block info, which is updated each time we move an insn from the
64 target of a jump. This is the generation number indexed by block
65 number. */
67 static int *bb_ticks;
69 /* Marks registers possibly live at the current place being scanned by
70 mark_target_live_regs. Also used by update_live_status. */
72 static HARD_REG_SET current_live_regs;
74 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
75 Also only used by the next two functions. */
77 static HARD_REG_SET pending_dead_regs;
79 static void update_live_status PARAMS ((rtx, rtx, void *));
80 static int find_basic_block PARAMS ((rtx, int));
81 static rtx next_insn_no_annul PARAMS ((rtx));
82 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
83 rtx*, int, struct resources,
84 struct resources));
86 /* Utility function called from mark_target_live_regs via note_stores.
87 It deadens any CLOBBERed registers and livens any SET registers. */
89 static void
90 update_live_status (dest, x, data)
91 rtx dest;
92 rtx x;
93 void *data ATTRIBUTE_UNUSED;
95 int first_regno, last_regno;
96 int i;
98 if (GET_CODE (dest) != REG
99 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
100 return;
102 if (GET_CODE (dest) == SUBREG)
103 first_regno = subreg_regno (dest);
104 else
105 first_regno = REGNO (dest);
107 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
109 if (GET_CODE (x) == CLOBBER)
110 for (i = first_regno; i < last_regno; i++)
111 CLEAR_HARD_REG_BIT (current_live_regs, i);
112 else
113 for (i = first_regno; i < last_regno; i++)
115 SET_HARD_REG_BIT (current_live_regs, i);
116 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
120 /* Find the number of the basic block with correct live register
121 information that starts closest to INSN. Return -1 if we couldn't
122 find such a basic block or the beginning is more than
123 SEARCH_LIMIT instructions before INSN. Use SEARCH_LIMIT = -1 for
124 an unlimited search.
126 The delay slot filling code destroys the control-flow graph so,
127 instead of finding the basic block containing INSN, we search
128 backwards toward a BARRIER where the live register information is
129 correct. */
131 static int
132 find_basic_block (insn, search_limit)
133 rtx insn;
134 int search_limit;
136 basic_block bb;
138 /* Scan backwards to the previous BARRIER. Then see if we can find a
139 label that starts a basic block. Return the basic block number. */
140 for (insn = prev_nonnote_insn (insn);
141 insn && GET_CODE (insn) != BARRIER && search_limit != 0;
142 insn = prev_nonnote_insn (insn), --search_limit)
145 /* The closest BARRIER is too far away. */
146 if (search_limit == 0)
147 return -1;
149 /* The start of the function. */
150 else if (insn == 0)
151 return ENTRY_BLOCK_PTR->next_bb->index;
153 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
154 anything other than a CODE_LABEL or note, we can't find this code. */
155 for (insn = next_nonnote_insn (insn);
156 insn && GET_CODE (insn) == CODE_LABEL;
157 insn = next_nonnote_insn (insn))
159 FOR_EACH_BB (bb)
160 if (insn == bb->head)
161 return bb->index;
164 return -1;
167 /* Similar to next_insn, but ignores insns in the delay slots of
168 an annulled branch. */
170 static rtx
171 next_insn_no_annul (insn)
172 rtx insn;
174 if (insn)
176 /* If INSN is an annulled branch, skip any insns from the target
177 of the branch. */
178 if ((GET_CODE (insn) == JUMP_INSN
179 || GET_CODE (insn) == CALL_INSN
180 || GET_CODE (insn) == INSN)
181 && INSN_ANNULLED_BRANCH_P (insn)
182 && NEXT_INSN (PREV_INSN (insn)) != insn)
184 rtx next = NEXT_INSN (insn);
185 enum rtx_code code = GET_CODE (next);
187 while ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
188 && INSN_FROM_TARGET_P (next))
190 insn = next;
191 next = NEXT_INSN (insn);
192 code = GET_CODE (next);
196 insn = NEXT_INSN (insn);
197 if (insn && GET_CODE (insn) == INSN
198 && GET_CODE (PATTERN (insn)) == SEQUENCE)
199 insn = XVECEXP (PATTERN (insn), 0, 0);
202 return insn;
205 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
206 which resources are referenced by the insn. If INCLUDE_DELAYED_EFFECTS
207 is TRUE, resources used by the called routine will be included for
208 CALL_INSNs. */
210 void
211 mark_referenced_resources (x, res, include_delayed_effects)
212 rtx x;
213 struct resources *res;
214 int include_delayed_effects;
216 enum rtx_code code = GET_CODE (x);
217 int i, j;
218 unsigned int r;
219 const char *format_ptr;
221 /* Handle leaf items for which we set resource flags. Also, special-case
222 CALL, SET and CLOBBER operators. */
223 switch (code)
225 case CONST:
226 case CONST_INT:
227 case CONST_DOUBLE:
228 case CONST_VECTOR:
229 case PC:
230 case SYMBOL_REF:
231 case LABEL_REF:
232 return;
234 case SUBREG:
235 if (GET_CODE (SUBREG_REG (x)) != REG)
236 mark_referenced_resources (SUBREG_REG (x), res, 0);
237 else
239 unsigned int regno = subreg_regno (x);
240 unsigned int last_regno
241 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
243 if (last_regno > FIRST_PSEUDO_REGISTER)
244 abort ();
245 for (r = regno; r < last_regno; r++)
246 SET_HARD_REG_BIT (res->regs, r);
248 return;
250 case REG:
252 unsigned int regno = REGNO (x);
253 unsigned int last_regno
254 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
256 if (last_regno > FIRST_PSEUDO_REGISTER)
257 abort ();
258 for (r = regno; r < last_regno; r++)
259 SET_HARD_REG_BIT (res->regs, r);
261 return;
263 case MEM:
264 /* If this memory shouldn't change, it really isn't referencing
265 memory. */
266 if (RTX_UNCHANGING_P (x))
267 res->unch_memory = 1;
268 else
269 res->memory = 1;
270 res->volatil |= MEM_VOLATILE_P (x);
272 /* Mark registers used to access memory. */
273 mark_referenced_resources (XEXP (x, 0), res, 0);
274 return;
276 case CC0:
277 res->cc = 1;
278 return;
280 case UNSPEC_VOLATILE:
281 case ASM_INPUT:
282 /* Traditional asm's are always volatile. */
283 res->volatil = 1;
284 return;
286 case TRAP_IF:
287 res->volatil = 1;
288 break;
290 case ASM_OPERANDS:
291 res->volatil |= MEM_VOLATILE_P (x);
293 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
294 We can not just fall through here since then we would be confused
295 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
296 traditional asms unlike their normal usage. */
298 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
299 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
300 return;
302 case CALL:
303 /* The first operand will be a (MEM (xxx)) but doesn't really reference
304 memory. The second operand may be referenced, though. */
305 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
306 mark_referenced_resources (XEXP (x, 1), res, 0);
307 return;
309 case SET:
310 /* Usually, the first operand of SET is set, not referenced. But
311 registers used to access memory are referenced. SET_DEST is
312 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
314 mark_referenced_resources (SET_SRC (x), res, 0);
316 x = SET_DEST (x);
317 if (GET_CODE (x) == SIGN_EXTRACT
318 || GET_CODE (x) == ZERO_EXTRACT
319 || GET_CODE (x) == STRICT_LOW_PART)
320 mark_referenced_resources (x, res, 0);
321 else if (GET_CODE (x) == SUBREG)
322 x = SUBREG_REG (x);
323 if (GET_CODE (x) == MEM)
324 mark_referenced_resources (XEXP (x, 0), res, 0);
325 return;
327 case CLOBBER:
328 return;
330 case CALL_INSN:
331 if (include_delayed_effects)
333 /* A CALL references memory, the frame pointer if it exists, the
334 stack pointer, any global registers and any registers given in
335 USE insns immediately in front of the CALL.
337 However, we may have moved some of the parameter loading insns
338 into the delay slot of this CALL. If so, the USE's for them
339 don't count and should be skipped. */
340 rtx insn = PREV_INSN (x);
341 rtx sequence = 0;
342 int seq_size = 0;
343 int i;
345 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
346 if (NEXT_INSN (insn) != x)
348 sequence = PATTERN (NEXT_INSN (insn));
349 seq_size = XVECLEN (sequence, 0);
350 if (GET_CODE (sequence) != SEQUENCE)
351 abort ();
354 res->memory = 1;
355 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
356 if (frame_pointer_needed)
358 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
359 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
360 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
361 #endif
364 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
365 if (global_regs[i])
366 SET_HARD_REG_BIT (res->regs, i);
368 /* Check for a REG_SETJMP. If it exists, then we must
369 assume that this call can need any register.
371 This is done to be more conservative about how we handle setjmp.
372 We assume that they both use and set all registers. Using all
373 registers ensures that a register will not be considered dead
374 just because it crosses a setjmp call. A register should be
375 considered dead only if the setjmp call returns non-zero. */
376 if (find_reg_note (x, REG_SETJMP, NULL))
377 SET_HARD_REG_SET (res->regs);
380 rtx link;
382 for (link = CALL_INSN_FUNCTION_USAGE (x);
383 link;
384 link = XEXP (link, 1))
385 if (GET_CODE (XEXP (link, 0)) == USE)
387 for (i = 1; i < seq_size; i++)
389 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
390 if (GET_CODE (slot_pat) == SET
391 && rtx_equal_p (SET_DEST (slot_pat),
392 XEXP (XEXP (link, 0), 0)))
393 break;
395 if (i >= seq_size)
396 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
397 res, 0);
402 /* ... fall through to other INSN processing ... */
404 case INSN:
405 case JUMP_INSN:
407 #ifdef INSN_REFERENCES_ARE_DELAYED
408 if (! include_delayed_effects
409 && INSN_REFERENCES_ARE_DELAYED (x))
410 return;
411 #endif
413 /* No special processing, just speed up. */
414 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
415 return;
417 default:
418 break;
421 /* Process each sub-expression and flag what it needs. */
422 format_ptr = GET_RTX_FORMAT (code);
423 for (i = 0; i < GET_RTX_LENGTH (code); i++)
424 switch (*format_ptr++)
426 case 'e':
427 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
428 break;
430 case 'E':
431 for (j = 0; j < XVECLEN (x, i); j++)
432 mark_referenced_resources (XVECEXP (x, i, j), res,
433 include_delayed_effects);
434 break;
438 /* A subroutine of mark_target_live_regs. Search forward from TARGET
439 looking for registers that are set before they are used. These are dead.
440 Stop after passing a few conditional jumps, and/or a small
441 number of unconditional branches. */
443 static rtx
444 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
445 rtx target;
446 struct resources *res;
447 rtx *jump_target;
448 int jump_count;
449 struct resources set, needed;
451 HARD_REG_SET scratch;
452 rtx insn, next;
453 rtx jump_insn = 0;
454 int i;
456 for (insn = target; insn; insn = next)
458 rtx this_jump_insn = insn;
460 next = NEXT_INSN (insn);
462 /* If this instruction can throw an exception, then we don't
463 know where we might end up next. That means that we have to
464 assume that whatever we have already marked as live really is
465 live. */
466 if (can_throw_internal (insn))
467 break;
469 switch (GET_CODE (insn))
471 case CODE_LABEL:
472 /* After a label, any pending dead registers that weren't yet
473 used can be made dead. */
474 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
475 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
476 CLEAR_HARD_REG_SET (pending_dead_regs);
478 continue;
480 case BARRIER:
481 case NOTE:
482 continue;
484 case INSN:
485 if (GET_CODE (PATTERN (insn)) == USE)
487 /* If INSN is a USE made by update_block, we care about the
488 underlying insn. Any registers set by the underlying insn
489 are live since the insn is being done somewhere else. */
490 if (INSN_P (XEXP (PATTERN (insn), 0)))
491 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
492 MARK_SRC_DEST_CALL);
494 /* All other USE insns are to be ignored. */
495 continue;
497 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
498 continue;
499 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
501 /* An unconditional jump can be used to fill the delay slot
502 of a call, so search for a JUMP_INSN in any position. */
503 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
505 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
506 if (GET_CODE (this_jump_insn) == JUMP_INSN)
507 break;
511 default:
512 break;
515 if (GET_CODE (this_jump_insn) == JUMP_INSN)
517 if (jump_count++ < 10)
519 if (any_uncondjump_p (this_jump_insn)
520 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
522 next = JUMP_LABEL (this_jump_insn);
523 if (jump_insn == 0)
525 jump_insn = insn;
526 if (jump_target)
527 *jump_target = JUMP_LABEL (this_jump_insn);
530 else if (any_condjump_p (this_jump_insn))
532 struct resources target_set, target_res;
533 struct resources fallthrough_res;
535 /* We can handle conditional branches here by following
536 both paths, and then IOR the results of the two paths
537 together, which will give us registers that are dead
538 on both paths. Since this is expensive, we give it
539 a much higher cost than unconditional branches. The
540 cost was chosen so that we will follow at most 1
541 conditional branch. */
543 jump_count += 4;
544 if (jump_count >= 10)
545 break;
547 mark_referenced_resources (insn, &needed, 1);
549 /* For an annulled branch, mark_set_resources ignores slots
550 filled by instructions from the target. This is correct
551 if the branch is not taken. Since we are following both
552 paths from the branch, we must also compute correct info
553 if the branch is taken. We do this by inverting all of
554 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
555 and then inverting the INSN_FROM_TARGET_P bits again. */
557 if (GET_CODE (PATTERN (insn)) == SEQUENCE
558 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
560 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
561 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
562 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
564 target_set = set;
565 mark_set_resources (insn, &target_set, 0,
566 MARK_SRC_DEST_CALL);
568 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
569 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
570 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
572 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
574 else
576 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
577 target_set = set;
580 target_res = *res;
581 COPY_HARD_REG_SET (scratch, target_set.regs);
582 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
583 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
585 fallthrough_res = *res;
586 COPY_HARD_REG_SET (scratch, set.regs);
587 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
588 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
590 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
591 &target_res, 0, jump_count,
592 target_set, needed);
593 find_dead_or_set_registers (next,
594 &fallthrough_res, 0, jump_count,
595 set, needed);
596 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
597 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
598 break;
600 else
601 break;
603 else
605 /* Don't try this optimization if we expired our jump count
606 above, since that would mean there may be an infinite loop
607 in the function being compiled. */
608 jump_insn = 0;
609 break;
613 mark_referenced_resources (insn, &needed, 1);
614 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
616 COPY_HARD_REG_SET (scratch, set.regs);
617 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
618 AND_COMPL_HARD_REG_SET (res->regs, scratch);
621 return jump_insn;
624 /* Given X, a part of an insn, and a pointer to a `struct resource',
625 RES, indicate which resources are modified by the insn. If
626 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
627 set by the called routine. If MARK_TYPE is MARK_DEST, only mark SET_DESTs
629 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
630 objects are being referenced instead of set.
632 We never mark the insn as modifying the condition code unless it explicitly
633 SETs CC0 even though this is not totally correct. The reason for this is
634 that we require a SET of CC0 to immediately precede the reference to CC0.
635 So if some other insn sets CC0 as a side-effect, we know it cannot affect
636 our computation and thus may be placed in a delay slot. */
638 void
639 mark_set_resources (x, res, in_dest, mark_type)
640 rtx x;
641 struct resources *res;
642 int in_dest;
643 enum mark_resource_type mark_type;
645 enum rtx_code code;
646 int i, j;
647 unsigned int r;
648 const char *format_ptr;
650 restart:
652 code = GET_CODE (x);
654 switch (code)
656 case NOTE:
657 case BARRIER:
658 case CODE_LABEL:
659 case USE:
660 case CONST_INT:
661 case CONST_DOUBLE:
662 case CONST_VECTOR:
663 case LABEL_REF:
664 case SYMBOL_REF:
665 case CONST:
666 case PC:
667 /* These don't set any resources. */
668 return;
670 case CC0:
671 if (in_dest)
672 res->cc = 1;
673 return;
675 case CALL_INSN:
676 /* Called routine modifies the condition code, memory, any registers
677 that aren't saved across calls, global registers and anything
678 explicitly CLOBBERed immediately after the CALL_INSN. */
680 if (mark_type == MARK_SRC_DEST_CALL)
682 rtx link;
684 res->cc = res->memory = 1;
685 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
686 if (call_used_regs[r] || global_regs[r])
687 SET_HARD_REG_BIT (res->regs, r);
689 for (link = CALL_INSN_FUNCTION_USAGE (x);
690 link; link = XEXP (link, 1))
691 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
692 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
693 MARK_SRC_DEST);
695 /* Check for a REG_SETJMP. If it exists, then we must
696 assume that this call can clobber any register. */
697 if (find_reg_note (x, REG_SETJMP, NULL))
698 SET_HARD_REG_SET (res->regs);
701 /* ... and also what its RTL says it modifies, if anything. */
703 case JUMP_INSN:
704 case INSN:
706 /* An insn consisting of just a CLOBBER (or USE) is just for flow
707 and doesn't actually do anything, so we ignore it. */
709 #ifdef INSN_SETS_ARE_DELAYED
710 if (mark_type != MARK_SRC_DEST_CALL
711 && INSN_SETS_ARE_DELAYED (x))
712 return;
713 #endif
715 x = PATTERN (x);
716 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
717 goto restart;
718 return;
720 case SET:
721 /* If the source of a SET is a CALL, this is actually done by
722 the called routine. So only include it if we are to include the
723 effects of the calling routine. */
725 mark_set_resources (SET_DEST (x), res,
726 (mark_type == MARK_SRC_DEST_CALL
727 || GET_CODE (SET_SRC (x)) != CALL),
728 mark_type);
730 if (mark_type != MARK_DEST)
731 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
732 return;
734 case CLOBBER:
735 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
736 return;
738 case SEQUENCE:
739 for (i = 0; i < XVECLEN (x, 0); i++)
740 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
741 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
742 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
743 return;
745 case POST_INC:
746 case PRE_INC:
747 case POST_DEC:
748 case PRE_DEC:
749 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
750 return;
752 case PRE_MODIFY:
753 case POST_MODIFY:
754 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
755 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
756 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
757 return;
759 case SIGN_EXTRACT:
760 case ZERO_EXTRACT:
761 if (! (mark_type == MARK_DEST && in_dest))
763 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
764 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
765 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
767 return;
769 case MEM:
770 if (in_dest)
772 res->memory = 1;
773 res->unch_memory |= RTX_UNCHANGING_P (x);
774 res->volatil |= MEM_VOLATILE_P (x);
777 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
778 return;
780 case SUBREG:
781 if (in_dest)
783 if (GET_CODE (SUBREG_REG (x)) != REG)
784 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
785 else
787 unsigned int regno = subreg_regno (x);
788 unsigned int last_regno
789 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
791 if (last_regno > FIRST_PSEUDO_REGISTER)
792 abort ();
793 for (r = regno; r < last_regno; r++)
794 SET_HARD_REG_BIT (res->regs, r);
797 return;
799 case REG:
800 if (in_dest)
802 unsigned int regno = REGNO (x);
803 unsigned int last_regno
804 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
806 if (last_regno > FIRST_PSEUDO_REGISTER)
807 abort ();
808 for (r = regno; r < last_regno; r++)
809 SET_HARD_REG_BIT (res->regs, r);
811 return;
813 case STRICT_LOW_PART:
814 if (! (mark_type == MARK_DEST && in_dest))
816 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
817 return;
820 case UNSPEC_VOLATILE:
821 case ASM_INPUT:
822 /* Traditional asm's are always volatile. */
823 res->volatil = 1;
824 return;
826 case TRAP_IF:
827 res->volatil = 1;
828 break;
830 case ASM_OPERANDS:
831 res->volatil |= MEM_VOLATILE_P (x);
833 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
834 We can not just fall through here since then we would be confused
835 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
836 traditional asms unlike their normal usage. */
838 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
839 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
840 MARK_SRC_DEST);
841 return;
843 default:
844 break;
847 /* Process each sub-expression and flag what it needs. */
848 format_ptr = GET_RTX_FORMAT (code);
849 for (i = 0; i < GET_RTX_LENGTH (code); i++)
850 switch (*format_ptr++)
852 case 'e':
853 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
854 break;
856 case 'E':
857 for (j = 0; j < XVECLEN (x, i); j++)
858 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
859 break;
863 /* Set the resources that are live at TARGET.
865 If TARGET is zero, we refer to the end of the current function and can
866 return our precomputed value.
868 Otherwise, we try to find out what is live by consulting the basic block
869 information. This is tricky, because we must consider the actions of
870 reload and jump optimization, which occur after the basic block information
871 has been computed.
873 Accordingly, we proceed as follows::
875 We find the previous BARRIER and look at all immediately following labels
876 (with no intervening active insns) to see if any of them start a basic
877 block. If we hit the start of the function first, we use block 0.
879 Once we have found a basic block and a corresponding first insns, we can
880 accurately compute the live status from basic_block_live_regs and
881 reg_renumber. (By starting at a label following a BARRIER, we are immune
882 to actions taken by reload and jump.) Then we scan all insns between
883 that point and our target. For each CLOBBER (or for call-clobbered regs
884 when we pass a CALL_INSN), mark the appropriate registers are dead. For
885 a SET, mark them as live.
887 We have to be careful when using REG_DEAD notes because they are not
888 updated by such things as find_equiv_reg. So keep track of registers
889 marked as dead that haven't been assigned to, and mark them dead at the
890 next CODE_LABEL since reload and jump won't propagate values across labels.
892 If we cannot find the start of a basic block (should be a very rare
893 case, if it can happen at all), mark everything as potentially live.
895 Next, scan forward from TARGET looking for things set or clobbered
896 before they are used. These are not live.
898 Because we can be called many times on the same target, save our results
899 in a hash table indexed by INSN_UID. This is only done if the function
900 init_resource_info () was invoked before we are called. */
902 void
903 mark_target_live_regs (insns, target, res)
904 rtx insns;
905 rtx target;
906 struct resources *res;
908 int b = -1;
909 unsigned int i;
910 struct target_info *tinfo = NULL;
911 rtx insn;
912 rtx jump_insn = 0;
913 rtx jump_target;
914 HARD_REG_SET scratch;
915 struct resources set, needed;
917 /* Handle end of function. */
918 if (target == 0)
920 *res = end_of_function_needs;
921 return;
924 /* We have to assume memory is needed, but the CC isn't. */
925 res->memory = 1;
926 res->volatil = res->unch_memory = 0;
927 res->cc = 0;
929 /* See if we have computed this value already. */
930 if (target_hash_table != NULL)
932 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
933 tinfo; tinfo = tinfo->next)
934 if (tinfo->uid == INSN_UID (target))
935 break;
937 /* Start by getting the basic block number. If we have saved
938 information, we can get it from there unless the insn at the
939 start of the basic block has been deleted. */
940 if (tinfo && tinfo->block != -1
941 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
942 b = tinfo->block;
945 if (b == -1)
946 b = find_basic_block (target, MAX_DELAY_SLOT_LIVE_SEARCH);
948 if (target_hash_table != NULL)
950 if (tinfo)
952 /* If the information is up-to-date, use it. Otherwise, we will
953 update it below. */
954 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
956 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
957 return;
960 else
962 /* Allocate a place to put our results and chain it into the
963 hash table. */
964 tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
965 tinfo->uid = INSN_UID (target);
966 tinfo->block = b;
967 tinfo->next
968 = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
969 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
973 CLEAR_HARD_REG_SET (pending_dead_regs);
975 /* If we found a basic block, get the live registers from it and update
976 them with anything set or killed between its start and the insn before
977 TARGET. Otherwise, we must assume everything is live. */
978 if (b != -1)
980 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
981 unsigned int j;
982 unsigned int regno;
983 rtx start_insn, stop_insn;
985 /* Compute hard regs live at start of block -- this is the real hard regs
986 marked live, plus live pseudo regs that have been renumbered to
987 hard regs. */
989 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
991 EXECUTE_IF_SET_IN_REG_SET
992 (regs_live, FIRST_PSEUDO_REGISTER, i,
994 if (reg_renumber[i] >= 0)
996 regno = reg_renumber[i];
997 for (j = regno;
998 j < regno + HARD_REGNO_NREGS (regno,
999 PSEUDO_REGNO_MODE (i));
1000 j++)
1001 SET_HARD_REG_BIT (current_live_regs, j);
1005 /* Get starting and ending insn, handling the case where each might
1006 be a SEQUENCE. */
1007 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
1008 stop_insn = target;
1010 if (GET_CODE (start_insn) == INSN
1011 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
1012 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
1014 if (GET_CODE (stop_insn) == INSN
1015 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
1016 stop_insn = next_insn (PREV_INSN (stop_insn));
1018 for (insn = start_insn; insn != stop_insn;
1019 insn = next_insn_no_annul (insn))
1021 rtx link;
1022 rtx real_insn = insn;
1023 enum rtx_code code = GET_CODE (insn);
1025 /* If this insn is from the target of a branch, it isn't going to
1026 be used in the sequel. If it is used in both cases, this
1027 test will not be true. */
1028 if ((code == INSN || code == JUMP_INSN || code == CALL_INSN)
1029 && INSN_FROM_TARGET_P (insn))
1030 continue;
1032 /* If this insn is a USE made by update_block, we care about the
1033 underlying insn. */
1034 if (code == INSN && GET_CODE (PATTERN (insn)) == USE
1035 && INSN_P (XEXP (PATTERN (insn), 0)))
1036 real_insn = XEXP (PATTERN (insn), 0);
1038 if (GET_CODE (real_insn) == CALL_INSN)
1040 /* CALL clobbers all call-used regs that aren't fixed except
1041 sp, ap, and fp. Do this before setting the result of the
1042 call live. */
1043 AND_COMPL_HARD_REG_SET (current_live_regs,
1044 regs_invalidated_by_call);
1046 /* A CALL_INSN sets any global register live, since it may
1047 have been modified by the call. */
1048 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1049 if (global_regs[i])
1050 SET_HARD_REG_BIT (current_live_regs, i);
1053 /* Mark anything killed in an insn to be deadened at the next
1054 label. Ignore USE insns; the only REG_DEAD notes will be for
1055 parameters. But they might be early. A CALL_INSN will usually
1056 clobber registers used for parameters. It isn't worth bothering
1057 with the unlikely case when it won't. */
1058 if ((GET_CODE (real_insn) == INSN
1059 && GET_CODE (PATTERN (real_insn)) != USE
1060 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1061 || GET_CODE (real_insn) == JUMP_INSN
1062 || GET_CODE (real_insn) == CALL_INSN)
1064 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1065 if (REG_NOTE_KIND (link) == REG_DEAD
1066 && GET_CODE (XEXP (link, 0)) == REG
1067 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1069 unsigned int first_regno = REGNO (XEXP (link, 0));
1070 unsigned int last_regno
1071 = (first_regno
1072 + HARD_REGNO_NREGS (first_regno,
1073 GET_MODE (XEXP (link, 0))));
1075 for (i = first_regno; i < last_regno; i++)
1076 SET_HARD_REG_BIT (pending_dead_regs, i);
1079 note_stores (PATTERN (real_insn), update_live_status, NULL);
1081 /* If any registers were unused after this insn, kill them.
1082 These notes will always be accurate. */
1083 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1084 if (REG_NOTE_KIND (link) == REG_UNUSED
1085 && GET_CODE (XEXP (link, 0)) == REG
1086 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1088 unsigned int first_regno = REGNO (XEXP (link, 0));
1089 unsigned int last_regno
1090 = (first_regno
1091 + HARD_REGNO_NREGS (first_regno,
1092 GET_MODE (XEXP (link, 0))));
1094 for (i = first_regno; i < last_regno; i++)
1095 CLEAR_HARD_REG_BIT (current_live_regs, i);
1099 else if (GET_CODE (real_insn) == CODE_LABEL)
1101 /* A label clobbers the pending dead registers since neither
1102 reload nor jump will propagate a value across a label. */
1103 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1104 CLEAR_HARD_REG_SET (pending_dead_regs);
1107 /* The beginning of the epilogue corresponds to the end of the
1108 RTL chain when there are no epilogue insns. Certain resources
1109 are implicitly required at that point. */
1110 else if (GET_CODE (real_insn) == NOTE
1111 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1112 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1115 COPY_HARD_REG_SET (res->regs, current_live_regs);
1116 if (tinfo != NULL)
1118 tinfo->block = b;
1119 tinfo->bb_tick = bb_ticks[b];
1122 else
1123 /* We didn't find the start of a basic block. Assume everything
1124 in use. This should happen only extremely rarely. */
1125 SET_HARD_REG_SET (res->regs);
1127 CLEAR_RESOURCE (&set);
1128 CLEAR_RESOURCE (&needed);
1130 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1131 set, needed);
1133 /* If we hit an unconditional branch, we have another way of finding out
1134 what is live: we can see what is live at the branch target and include
1135 anything used but not set before the branch. We add the live
1136 resources found using the test below to those found until now. */
1138 if (jump_insn)
1140 struct resources new_resources;
1141 rtx stop_insn = next_active_insn (jump_insn);
1143 mark_target_live_regs (insns, next_active_insn (jump_target),
1144 &new_resources);
1145 CLEAR_RESOURCE (&set);
1146 CLEAR_RESOURCE (&needed);
1148 /* Include JUMP_INSN in the needed registers. */
1149 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1151 mark_referenced_resources (insn, &needed, 1);
1153 COPY_HARD_REG_SET (scratch, needed.regs);
1154 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1155 IOR_HARD_REG_SET (new_resources.regs, scratch);
1157 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1160 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1163 if (tinfo != NULL)
1165 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1169 /* Initialize the resources required by mark_target_live_regs ().
1170 This should be invoked before the first call to mark_target_live_regs. */
1172 void
1173 init_resource_info (epilogue_insn)
1174 rtx epilogue_insn;
1176 int i;
1178 /* Indicate what resources are required to be valid at the end of the current
1179 function. The condition code never is and memory always is. If the
1180 frame pointer is needed, it is and so is the stack pointer unless
1181 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1182 stack pointer is. Registers used to return the function value are
1183 needed. Registers holding global variables are needed. */
1185 end_of_function_needs.cc = 0;
1186 end_of_function_needs.memory = 1;
1187 end_of_function_needs.unch_memory = 0;
1188 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1190 if (frame_pointer_needed)
1192 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1193 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1194 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1195 #endif
1196 #ifdef EXIT_IGNORE_STACK
1197 if (! EXIT_IGNORE_STACK
1198 || current_function_sp_is_unchanging)
1199 #endif
1200 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1202 else
1203 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1205 if (current_function_return_rtx != 0)
1206 mark_referenced_resources (current_function_return_rtx,
1207 &end_of_function_needs, 1);
1209 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1210 if (global_regs[i]
1211 #ifdef EPILOGUE_USES
1212 || EPILOGUE_USES (i)
1213 #endif
1215 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1217 /* The registers required to be live at the end of the function are
1218 represented in the flow information as being dead just prior to
1219 reaching the end of the function. For example, the return of a value
1220 might be represented by a USE of the return register immediately
1221 followed by an unconditional jump to the return label where the
1222 return label is the end of the RTL chain. The end of the RTL chain
1223 is then taken to mean that the return register is live.
1225 This sequence is no longer maintained when epilogue instructions are
1226 added to the RTL chain. To reconstruct the original meaning, the
1227 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1228 point where these registers become live (start_of_epilogue_needs).
1229 If epilogue instructions are present, the registers set by those
1230 instructions won't have been processed by flow. Thus, those
1231 registers are additionally required at the end of the RTL chain
1232 (end_of_function_needs). */
1234 start_of_epilogue_needs = end_of_function_needs;
1236 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1237 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1238 MARK_SRC_DEST_CALL);
1240 /* Allocate and initialize the tables used by mark_target_live_regs. */
1241 target_hash_table = (struct target_info **)
1242 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1243 bb_ticks = (int *) xcalloc (last_basic_block, sizeof (int));
1246 /* Free up the resources allcated to mark_target_live_regs (). This
1247 should be invoked after the last call to mark_target_live_regs (). */
1249 void
1250 free_resource_info ()
1252 if (target_hash_table != NULL)
1254 int i;
1256 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1258 struct target_info *ti = target_hash_table[i];
1260 while (ti)
1262 struct target_info *next = ti->next;
1263 free (ti);
1264 ti = next;
1268 free (target_hash_table);
1269 target_hash_table = NULL;
1272 if (bb_ticks != NULL)
1274 free (bb_ticks);
1275 bb_ticks = NULL;
1279 /* Clear any hashed information that we have stored for INSN. */
1281 void
1282 clear_hashed_info_for_insn (insn)
1283 rtx insn;
1285 struct target_info *tinfo;
1287 if (target_hash_table != NULL)
1289 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1290 tinfo; tinfo = tinfo->next)
1291 if (tinfo->uid == INSN_UID (insn))
1292 break;
1294 if (tinfo)
1295 tinfo->block = -1;
1299 /* Increment the tick count for the basic block that contains INSN. */
1301 void
1302 incr_ticks_for_insn (insn)
1303 rtx insn;
1305 int b = find_basic_block (insn, MAX_DELAY_SLOT_LIVE_SEARCH);
1307 if (b != -1)
1308 bb_ticks[b]++;
1311 /* Add TRIAL to the set of resources used at the end of the current
1312 function. */
1313 void
1314 mark_end_of_function_resources (trial, include_delayed_effects)
1315 rtx trial;
1316 int include_delayed_effects;
1318 mark_referenced_resources (trial, &end_of_function_needs,
1319 include_delayed_effects);