1 /* Partial redundancy elimination / Hoisting for RTL.
2 Copyright (C) 1997-2014 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
21 - reordering of memory allocation and freeing to be more space efficient
22 - calc rough register pressure information and use the info to drive all
23 kinds of code motion (including code hoisting) in a unified way.
26 /* References searched while implementing this.
28 Compilers Principles, Techniques and Tools
32 Global Optimization by Suppression of Partial Redundancies
34 communications of the acm, Vol. 22, Num. 2, Feb. 1979
36 A Portable Machine-Independent Global Optimizer - Design and Measurements
38 Stanford Ph.D. thesis, Dec. 1983
40 A Fast Algorithm for Code Movement Optimization
42 SIGPLAN Notices, Vol. 23, Num. 10, Oct. 1988
44 A Solution to a Problem with Morel and Renvoise's
45 Global Optimization by Suppression of Partial Redundancies
46 K-H Drechsler, M.P. Stadel
47 ACM TOPLAS, Vol. 10, Num. 4, Oct. 1988
49 Practical Adaptation of the Global Optimization
50 Algorithm of Morel and Renvoise
52 ACM TOPLAS, Vol. 13, Num. 2. Apr. 1991
54 Efficiently Computing Static Single Assignment Form and the Control
56 R. Cytron, J. Ferrante, B.K. Rosen, M.N. Wegman, and F.K. Zadeck
57 ACM TOPLAS, Vol. 13, Num. 4, Oct. 1991
60 J. Knoop, O. Ruthing, B. Steffen
61 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
63 What's In a Region? Or Computing Control Dependence Regions in Near-Linear
64 Time for Reducible Flow Control
66 ACM Letters on Programming Languages and Systems,
67 Vol. 2, Num. 1-4, Mar-Dec 1993
69 An Efficient Representation for Sparse Sets
70 Preston Briggs, Linda Torczon
71 ACM Letters on Programming Languages and Systems,
72 Vol. 2, Num. 1-4, Mar-Dec 1993
74 A Variation of Knoop, Ruthing, and Steffen's Lazy Code Motion
75 K-H Drechsler, M.P. Stadel
76 ACM SIGPLAN Notices, Vol. 28, Num. 5, May 1993
78 Partial Dead Code Elimination
79 J. Knoop, O. Ruthing, B. Steffen
80 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
82 Effective Partial Redundancy Elimination
83 P. Briggs, K.D. Cooper
84 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
86 The Program Structure Tree: Computing Control Regions in Linear Time
87 R. Johnson, D. Pearson, K. Pingali
88 ACM SIGPLAN Notices, Vol. 29, Num. 6, Jun. 1994
90 Optimal Code Motion: Theory and Practice
91 J. Knoop, O. Ruthing, B. Steffen
92 ACM TOPLAS, Vol. 16, Num. 4, Jul. 1994
94 The power of assignment motion
95 J. Knoop, O. Ruthing, B. Steffen
96 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
98 Global code motion / global value numbering
100 ACM SIGPLAN Notices Vol. 30, Num. 6, Jun. 1995, '95 Conference on PLDI
102 Value Driven Redundancy Elimination
104 Rice University Ph.D. thesis, Apr. 1996
108 Massively Scalar Compiler Project, Rice University, Sep. 1996
110 High Performance Compilers for Parallel Computing
114 Advanced Compiler Design and Implementation
116 Morgan Kaufmann, 1997
118 Building an Optimizing Compiler
122 People wishing to speed up the code here should read:
123 Elimination Algorithms for Data Flow Analysis
124 B.G. Ryder, M.C. Paull
125 ACM Computing Surveys, Vol. 18, Num. 3, Sep. 1986
127 How to Analyze Large Programs Efficiently and Informatively
128 D.M. Dhamdhere, B.K. Rosen, F.K. Zadeck
129 ACM SIGPLAN Notices Vol. 27, Num. 7, Jul. 1992, '92 Conference on PLDI
131 People wishing to do something different can find various possibilities
132 in the above papers and elsewhere.
137 #include "coretypes.h"
139 #include "diagnostic-core.h"
142 #include "hard-reg-set.h"
149 #include "insn-config.h"
151 #include "basic-block.h"
152 #include "function.h"
160 #include "tree-pass.h"
161 #include "hash-table.h"
167 /* We support GCSE via Partial Redundancy Elimination. PRE optimizations
168 are a superset of those done by classic GCSE.
170 Two passes of copy/constant propagation are done around PRE or hoisting
171 because the first one enables more GCSE and the second one helps to clean
172 up the copies that PRE and HOIST create. This is needed more for PRE than
173 for HOIST because code hoisting will try to use an existing register
174 containing the common subexpression rather than create a new one. This is
175 harder to do for PRE because of the code motion (which HOIST doesn't do).
177 Expressions we are interested in GCSE-ing are of the form
178 (set (pseudo-reg) (expression)).
179 Function want_to_gcse_p says what these are.
181 In addition, expressions in REG_EQUAL notes are candidates for GCSE-ing.
182 This allows PRE to hoist expressions that are expressed in multiple insns,
183 such as complex address calculations (e.g. for PIC code, or loads with a
184 high part and a low part).
186 PRE handles moving invariant expressions out of loops (by treating them as
187 partially redundant).
189 **********************
191 We used to support multiple passes but there are diminishing returns in
192 doing so. The first pass usually makes 90% of the changes that are doable.
193 A second pass can make a few more changes made possible by the first pass.
194 Experiments show any further passes don't make enough changes to justify
197 A study of spec92 using an unlimited number of passes:
198 [1 pass] = 1208 substitutions, [2] = 577, [3] = 202, [4] = 192, [5] = 83,
199 [6] = 34, [7] = 17, [8] = 9, [9] = 4, [10] = 4, [11] = 2,
200 [12] = 2, [13] = 1, [15] = 1, [16] = 2, [41] = 1
202 It was found doing copy propagation between each pass enables further
205 This study was done before expressions in REG_EQUAL notes were added as
206 candidate expressions for optimization, and before the GIMPLE optimizers
207 were added. Probably, multiple passes is even less efficient now than
208 at the time when the study was conducted.
210 PRE is quite expensive in complicated functions because the DFA can take
211 a while to converge. Hence we only perform one pass.
213 **********************
215 The steps for PRE are:
217 1) Build the hash table of expressions we wish to GCSE (expr_hash_table).
219 2) Perform the data flow analysis for PRE.
221 3) Delete the redundant instructions
223 4) Insert the required copies [if any] that make the partially
224 redundant instructions fully redundant.
226 5) For other reaching expressions, insert an instruction to copy the value
227 to a newly created pseudo that will reach the redundant instruction.
229 The deletion is done first so that when we do insertions we
230 know which pseudo reg to use.
232 Various papers have argued that PRE DFA is expensive (O(n^2)) and others
233 argue it is not. The number of iterations for the algorithm to converge
234 is typically 2-4 so I don't view it as that expensive (relatively speaking).
236 PRE GCSE depends heavily on the second CPROP pass to clean up the copies
237 we create. To make an expression reach the place where it's redundant,
238 the result of the expression is copied to a new register, and the redundant
239 expression is deleted by replacing it with this new register. Classic GCSE
240 doesn't have this problem as much as it computes the reaching defs of
241 each register in each block and thus can try to use an existing
244 /* GCSE global vars. */
246 struct target_gcse default_target_gcse
;
247 #if SWITCHABLE_TARGET
248 struct target_gcse
*this_target_gcse
= &default_target_gcse
;
251 /* Set to non-zero if CSE should run after all GCSE optimizations are done. */
252 int flag_rerun_cse_after_global_opts
;
254 /* An obstack for our working variables. */
255 static struct obstack gcse_obstack
;
257 /* Hash table of expressions. */
261 /* The expression. */
263 /* Index in the available expression bitmaps. */
265 /* Next entry with the same hash. */
266 struct expr
*next_same_hash
;
267 /* List of anticipatable occurrences in basic blocks in the function.
268 An "anticipatable occurrence" is one that is the first occurrence in the
269 basic block, the operands are not modified in the basic block prior
270 to the occurrence and the output is not used between the start of
271 the block and the occurrence. */
272 struct occr
*antic_occr
;
273 /* List of available occurrence in basic blocks in the function.
274 An "available occurrence" is one that is the last occurrence in the
275 basic block and the operands are not modified by following statements in
276 the basic block [including this insn]. */
277 struct occr
*avail_occr
;
278 /* Non-null if the computation is PRE redundant.
279 The value is the newly created pseudo-reg to record a copy of the
280 expression in all the places that reach the redundant copy. */
282 /* Maximum distance in instructions this expression can travel.
283 We avoid moving simple expressions for more than a few instructions
284 to keep register pressure under control.
285 A value of "0" removes restrictions on how far the expression can
290 /* Occurrence of an expression.
291 There is one per basic block. If a pattern appears more than once the
292 last appearance is used [or first for anticipatable expressions]. */
296 /* Next occurrence of this expression. */
298 /* The insn that computes the expression. */
300 /* Nonzero if this [anticipatable] occurrence has been deleted. */
302 /* Nonzero if this [available] occurrence has been copied to
304 /* ??? This is mutually exclusive with deleted_p, so they could share
309 typedef struct occr
*occr_t
;
311 /* Expression hash tables.
312 Each hash table is an array of buckets.
313 ??? It is known that if it were an array of entries, structure elements
314 `next_same_hash' and `bitmap_index' wouldn't be necessary. However, it is
315 not clear whether in the final analysis a sufficient amount of memory would
316 be saved as the size of the available expression bitmaps would be larger
317 [one could build a mapping table without holes afterwards though].
318 Someday I'll perform the computation and figure it out. */
323 This is an array of `expr_hash_table_size' elements. */
326 /* Size of the hash table, in elements. */
329 /* Number of hash table elements. */
330 unsigned int n_elems
;
333 /* Expression hash table. */
334 static struct hash_table_d expr_hash_table
;
336 /* This is a list of expressions which are MEMs and will be used by load
338 Load motion tracks MEMs which aren't killed by anything except itself,
339 i.e. loads and stores to a single location.
340 We can then allow movement of these MEM refs with a little special
341 allowance. (all stores copy the same value to the reaching reg used
342 for the loads). This means all values used to store into memory must have
343 no side effects so we can re-issue the setter value. */
347 struct expr
* expr
; /* Gcse expression reference for LM. */
348 rtx pattern
; /* Pattern of this mem. */
349 rtx pattern_regs
; /* List of registers mentioned by the mem. */
350 rtx loads
; /* INSN list of loads seen. */
351 rtx stores
; /* INSN list of stores seen. */
352 struct ls_expr
* next
; /* Next in the list. */
353 int invalid
; /* Invalid for some reason. */
354 int index
; /* If it maps to a bitmap index. */
355 unsigned int hash_index
; /* Index when in a hash table. */
356 rtx reaching_reg
; /* Register to use when re-writing. */
359 /* Head of the list of load/store memory refs. */
360 static struct ls_expr
* pre_ldst_mems
= NULL
;
362 struct pre_ldst_expr_hasher
: typed_noop_remove
<ls_expr
>
364 typedef ls_expr value_type
;
365 typedef value_type compare_type
;
366 static inline hashval_t
hash (const value_type
*);
367 static inline bool equal (const value_type
*, const compare_type
*);
370 /* Hashtable helpers. */
372 pre_ldst_expr_hasher::hash (const value_type
*x
)
374 int do_not_record_p
= 0;
376 hash_rtx (x
->pattern
, GET_MODE (x
->pattern
), &do_not_record_p
, NULL
, false);
379 static int expr_equiv_p (const_rtx
, const_rtx
);
382 pre_ldst_expr_hasher::equal (const value_type
*ptr1
,
383 const compare_type
*ptr2
)
385 return expr_equiv_p (ptr1
->pattern
, ptr2
->pattern
);
388 /* Hashtable for the load/store memory refs. */
389 static hash_table
<pre_ldst_expr_hasher
> *pre_ldst_table
;
391 /* Bitmap containing one bit for each register in the program.
392 Used when performing GCSE to track which registers have been set since
393 the start of the basic block. */
394 static regset reg_set_bitmap
;
396 /* Array, indexed by basic block number for a list of insns which modify
397 memory within that block. */
398 static vec
<rtx
> *modify_mem_list
;
399 static bitmap modify_mem_list_set
;
401 typedef struct modify_pair_s
403 rtx dest
; /* A MEM. */
404 rtx dest_addr
; /* The canonical address of `dest'. */
408 /* This array parallels modify_mem_list, except that it stores MEMs
409 being set and their canonicalized memory addresses. */
410 static vec
<modify_pair
> *canon_modify_mem_list
;
412 /* Bitmap indexed by block numbers to record which blocks contain
414 static bitmap blocks_with_calls
;
416 /* Various variables for statistics gathering. */
418 /* Memory used in a pass.
419 This isn't intended to be absolutely precise. Its intent is only
420 to keep an eye on memory usage. */
421 static int bytes_used
;
423 /* GCSE substitutions made. */
424 static int gcse_subst_count
;
425 /* Number of copy instructions created. */
426 static int gcse_create_count
;
428 /* Doing code hoisting. */
429 static bool doing_code_hoisting_p
= false;
431 /* For available exprs */
432 static sbitmap
*ae_kill
;
434 /* Data stored for each basic block. */
437 /* Maximal register pressure inside basic block for given register class
438 (defined only for the pressure classes). */
439 int max_reg_pressure
[N_REG_CLASSES
];
440 /* Recorded register pressure of basic block before trying to hoist
441 an expression. Will be used to restore the register pressure
442 if the expression should not be hoisted. */
444 /* Recorded register live_in info of basic block during code hoisting
445 process. BACKUP is used to record live_in info before trying to
446 hoist an expression, and will be used to restore LIVE_IN if the
447 expression should not be hoisted. */
448 bitmap live_in
, backup
;
451 #define BB_DATA(bb) ((struct bb_data *) (bb)->aux)
453 static basic_block curr_bb
;
455 /* Current register pressure for each pressure class. */
456 static int curr_reg_pressure
[N_REG_CLASSES
];
459 static void compute_can_copy (void);
460 static void *gmalloc (size_t) ATTRIBUTE_MALLOC
;
461 static void *gcalloc (size_t, size_t) ATTRIBUTE_MALLOC
;
462 static void *gcse_alloc (unsigned long);
463 static void alloc_gcse_mem (void);
464 static void free_gcse_mem (void);
465 static void hash_scan_insn (rtx
, struct hash_table_d
*);
466 static void hash_scan_set (rtx
, rtx
, struct hash_table_d
*);
467 static void hash_scan_clobber (rtx
, rtx
, struct hash_table_d
*);
468 static void hash_scan_call (rtx
, rtx
, struct hash_table_d
*);
469 static int want_to_gcse_p (rtx
, int *);
470 static int oprs_unchanged_p (const_rtx
, const_rtx
, int);
471 static int oprs_anticipatable_p (const_rtx
, const_rtx
);
472 static int oprs_available_p (const_rtx
, const_rtx
);
473 static void insert_expr_in_table (rtx
, enum machine_mode
, rtx
, int, int, int,
474 struct hash_table_d
*);
475 static unsigned int hash_expr (const_rtx
, enum machine_mode
, int *, int);
476 static void record_last_reg_set_info (rtx
, int);
477 static void record_last_mem_set_info (rtx
);
478 static void record_last_set_info (rtx
, const_rtx
, void *);
479 static void compute_hash_table (struct hash_table_d
*);
480 static void alloc_hash_table (struct hash_table_d
*);
481 static void free_hash_table (struct hash_table_d
*);
482 static void compute_hash_table_work (struct hash_table_d
*);
483 static void dump_hash_table (FILE *, const char *, struct hash_table_d
*);
484 static void compute_transp (const_rtx
, int, sbitmap
*);
485 static void compute_local_properties (sbitmap
*, sbitmap
*, sbitmap
*,
486 struct hash_table_d
*);
487 static void mems_conflict_for_gcse_p (rtx
, const_rtx
, void *);
488 static int load_killed_in_block_p (const_basic_block
, int, const_rtx
, int);
489 static void canon_list_insert (rtx
, const_rtx
, void *);
490 static void alloc_pre_mem (int, int);
491 static void free_pre_mem (void);
492 static struct edge_list
*compute_pre_data (void);
493 static int pre_expr_reaches_here_p (basic_block
, struct expr
*,
495 static void insert_insn_end_basic_block (struct expr
*, basic_block
);
496 static void pre_insert_copy_insn (struct expr
*, rtx
);
497 static void pre_insert_copies (void);
498 static int pre_delete (void);
499 static int pre_gcse (struct edge_list
*);
500 static int one_pre_gcse_pass (void);
501 static void add_label_notes (rtx
, rtx
);
502 static void alloc_code_hoist_mem (int, int);
503 static void free_code_hoist_mem (void);
504 static void compute_code_hoist_vbeinout (void);
505 static void compute_code_hoist_data (void);
506 static int should_hoist_expr_to_dom (basic_block
, struct expr
*, basic_block
,
507 sbitmap
, int, int *, enum reg_class
,
509 static int hoist_code (void);
510 static enum reg_class
get_regno_pressure_class (int regno
, int *nregs
);
511 static enum reg_class
get_pressure_class_and_nregs (rtx insn
, int *nregs
);
512 static int one_code_hoisting_pass (void);
513 static rtx
process_insert_insn (struct expr
*);
514 static int pre_edge_insert (struct edge_list
*, struct expr
**);
515 static int pre_expr_reaches_here_p_work (basic_block
, struct expr
*,
516 basic_block
, char *);
517 static struct ls_expr
* ldst_entry (rtx
);
518 static void free_ldst_entry (struct ls_expr
*);
519 static void free_ld_motion_mems (void);
520 static void print_ldst_list (FILE *);
521 static struct ls_expr
* find_rtx_in_ldst (rtx
);
522 static int simple_mem (const_rtx
);
523 static void invalidate_any_buried_refs (rtx
);
524 static void compute_ld_motion_mems (void);
525 static void trim_ld_motion_mems (void);
526 static void update_ld_motion_stores (struct expr
*);
527 static void clear_modify_mem_tables (void);
528 static void free_modify_mem_tables (void);
529 static rtx
gcse_emit_move_after (rtx
, rtx
, rtx
);
530 static bool is_too_expensive (const char *);
532 #define GNEW(T) ((T *) gmalloc (sizeof (T)))
533 #define GCNEW(T) ((T *) gcalloc (1, sizeof (T)))
535 #define GNEWVEC(T, N) ((T *) gmalloc (sizeof (T) * (N)))
536 #define GCNEWVEC(T, N) ((T *) gcalloc ((N), sizeof (T)))
538 #define GNEWVAR(T, S) ((T *) gmalloc ((S)))
539 #define GCNEWVAR(T, S) ((T *) gcalloc (1, (S)))
541 #define GOBNEW(T) ((T *) gcse_alloc (sizeof (T)))
542 #define GOBNEWVAR(T, S) ((T *) gcse_alloc ((S)))
544 /* Misc. utilities. */
547 (this_target_gcse->x_can_copy)
548 #define can_copy_init_p \
549 (this_target_gcse->x_can_copy_init_p)
551 /* Compute which modes support reg/reg copy operations. */
554 compute_can_copy (void)
557 #ifndef AVOID_CCMODE_COPIES
560 memset (can_copy
, 0, NUM_MACHINE_MODES
);
563 for (i
= 0; i
< NUM_MACHINE_MODES
; i
++)
564 if (GET_MODE_CLASS (i
) == MODE_CC
)
566 #ifdef AVOID_CCMODE_COPIES
569 reg
= gen_rtx_REG ((enum machine_mode
) i
, LAST_VIRTUAL_REGISTER
+ 1);
570 insn
= emit_insn (gen_rtx_SET (VOIDmode
, reg
, reg
));
571 if (recog (PATTERN (insn
), insn
, NULL
) >= 0)
581 /* Returns whether the mode supports reg/reg copy operations. */
584 can_copy_p (enum machine_mode mode
)
586 if (! can_copy_init_p
)
589 can_copy_init_p
= true;
592 return can_copy
[mode
] != 0;
595 /* Cover function to xmalloc to record bytes allocated. */
598 gmalloc (size_t size
)
601 return xmalloc (size
);
604 /* Cover function to xcalloc to record bytes allocated. */
607 gcalloc (size_t nelem
, size_t elsize
)
609 bytes_used
+= nelem
* elsize
;
610 return xcalloc (nelem
, elsize
);
613 /* Cover function to obstack_alloc. */
616 gcse_alloc (unsigned long size
)
619 return obstack_alloc (&gcse_obstack
, size
);
622 /* Allocate memory for the reg/memory set tracking tables.
623 This is called at the start of each pass. */
626 alloc_gcse_mem (void)
628 /* Allocate vars to track sets of regs. */
629 reg_set_bitmap
= ALLOC_REG_SET (NULL
);
631 /* Allocate array to keep a list of insns which modify memory in each
632 basic block. The two typedefs are needed to work around the
633 pre-processor limitation with template types in macro arguments. */
634 typedef vec
<rtx
> vec_rtx_heap
;
635 typedef vec
<modify_pair
> vec_modify_pair_heap
;
636 modify_mem_list
= GCNEWVEC (vec_rtx_heap
, last_basic_block_for_fn (cfun
));
637 canon_modify_mem_list
= GCNEWVEC (vec_modify_pair_heap
,
638 last_basic_block_for_fn (cfun
));
639 modify_mem_list_set
= BITMAP_ALLOC (NULL
);
640 blocks_with_calls
= BITMAP_ALLOC (NULL
);
643 /* Free memory allocated by alloc_gcse_mem. */
648 FREE_REG_SET (reg_set_bitmap
);
650 free_modify_mem_tables ();
651 BITMAP_FREE (modify_mem_list_set
);
652 BITMAP_FREE (blocks_with_calls
);
655 /* Compute the local properties of each recorded expression.
657 Local properties are those that are defined by the block, irrespective of
660 An expression is transparent in a block if its operands are not modified
663 An expression is computed (locally available) in a block if it is computed
664 at least once and expression would contain the same value if the
665 computation was moved to the end of the block.
667 An expression is locally anticipatable in a block if it is computed at
668 least once and expression would contain the same value if the computation
669 was moved to the beginning of the block.
671 We call this routine for pre and code hoisting. They all compute
672 basically the same information and thus can easily share this code.
674 TRANSP, COMP, and ANTLOC are destination sbitmaps for recording local
675 properties. If NULL, then it is not necessary to compute or record that
678 TABLE controls which hash table to look at. */
681 compute_local_properties (sbitmap
*transp
, sbitmap
*comp
, sbitmap
*antloc
,
682 struct hash_table_d
*table
)
686 /* Initialize any bitmaps that were passed in. */
689 bitmap_vector_ones (transp
, last_basic_block_for_fn (cfun
));
693 bitmap_vector_clear (comp
, last_basic_block_for_fn (cfun
));
695 bitmap_vector_clear (antloc
, last_basic_block_for_fn (cfun
));
697 for (i
= 0; i
< table
->size
; i
++)
701 for (expr
= table
->table
[i
]; expr
!= NULL
; expr
= expr
->next_same_hash
)
703 int indx
= expr
->bitmap_index
;
706 /* The expression is transparent in this block if it is not killed.
707 We start by assuming all are transparent [none are killed], and
708 then reset the bits for those that are. */
710 compute_transp (expr
->expr
, indx
, transp
);
712 /* The occurrences recorded in antic_occr are exactly those that
713 we want to set to nonzero in ANTLOC. */
715 for (occr
= expr
->antic_occr
; occr
!= NULL
; occr
= occr
->next
)
717 bitmap_set_bit (antloc
[BLOCK_FOR_INSN (occr
->insn
)->index
], indx
);
719 /* While we're scanning the table, this is a good place to
724 /* The occurrences recorded in avail_occr are exactly those that
725 we want to set to nonzero in COMP. */
727 for (occr
= expr
->avail_occr
; occr
!= NULL
; occr
= occr
->next
)
729 bitmap_set_bit (comp
[BLOCK_FOR_INSN (occr
->insn
)->index
], indx
);
731 /* While we're scanning the table, this is a good place to
736 /* While we're scanning the table, this is a good place to
738 expr
->reaching_reg
= 0;
743 /* Hash table support. */
745 struct reg_avail_info
752 static struct reg_avail_info
*reg_avail_info
;
753 static basic_block current_bb
;
755 /* See whether X, the source of a set, is something we want to consider for
759 want_to_gcse_p (rtx x
, int *max_distance_ptr
)
762 /* On register stack architectures, don't GCSE constants from the
763 constant pool, as the benefits are often swamped by the overhead
764 of shuffling the register stack between basic blocks. */
765 if (IS_STACK_MODE (GET_MODE (x
)))
766 x
= avoid_constant_pool_reference (x
);
769 /* GCSE'ing constants:
771 We do not specifically distinguish between constant and non-constant
772 expressions in PRE and Hoist. We use set_src_cost below to limit
773 the maximum distance simple expressions can travel.
775 Nevertheless, constants are much easier to GCSE, and, hence,
776 it is easy to overdo the optimizations. Usually, excessive PRE and
777 Hoisting of constant leads to increased register pressure.
779 RA can deal with this by rematerialing some of the constants.
780 Therefore, it is important that the back-end generates sets of constants
781 in a way that allows reload rematerialize them under high register
782 pressure, i.e., a pseudo register with REG_EQUAL to constant
783 is set only once. Failing to do so will result in IRA/reload
784 spilling such constants under high register pressure instead of
785 rematerializing them. */
787 switch (GET_CODE (x
))
795 if (!doing_code_hoisting_p
)
796 /* Do not PRE constants. */
802 if (doing_code_hoisting_p
)
803 /* PRE doesn't implement max_distance restriction. */
808 gcc_assert (!optimize_function_for_speed_p (cfun
)
809 && optimize_function_for_size_p (cfun
));
810 cost
= set_src_cost (x
, 0);
812 if (cost
< COSTS_N_INSNS (GCSE_UNRESTRICTED_COST
))
814 max_distance
= (GCSE_COST_DISTANCE_RATIO
* cost
) / 10;
815 if (max_distance
== 0)
818 gcc_assert (max_distance
> 0);
823 if (max_distance_ptr
)
824 *max_distance_ptr
= max_distance
;
827 return can_assign_to_reg_without_clobbers_p (x
);
831 /* Used internally by can_assign_to_reg_without_clobbers_p. */
833 static GTY(()) rtx test_insn
;
835 /* Return true if we can assign X to a pseudo register such that the
836 resulting insn does not result in clobbering a hard register as a
839 Additionally, if the target requires it, check that the resulting insn
840 can be copied. If it cannot, this means that X is special and probably
841 has hidden side-effects we don't want to mess with.
843 This function is typically used by code motion passes, to verify
844 that it is safe to insert an insn without worrying about clobbering
845 maybe live hard regs. */
848 can_assign_to_reg_without_clobbers_p (rtx x
)
850 int num_clobbers
= 0;
852 bool can_assign
= false;
854 /* If this is a valid operand, we are OK. If it's VOIDmode, we aren't. */
855 if (general_operand (x
, GET_MODE (x
)))
857 else if (GET_MODE (x
) == VOIDmode
)
860 /* Otherwise, check if we can make a valid insn from it. First initialize
861 our test insn if we haven't already. */
865 = make_insn_raw (gen_rtx_SET (VOIDmode
,
866 gen_rtx_REG (word_mode
,
867 FIRST_PSEUDO_REGISTER
* 2),
869 SET_NEXT_INSN (test_insn
) = SET_PREV_INSN (test_insn
) = 0;
870 INSN_LOCATION (test_insn
) = UNKNOWN_LOCATION
;
873 /* Now make an insn like the one we would make when GCSE'ing and see if
875 PUT_MODE (SET_DEST (PATTERN (test_insn
)), GET_MODE (x
));
876 SET_SRC (PATTERN (test_insn
)) = x
;
878 icode
= recog (PATTERN (test_insn
), test_insn
, &num_clobbers
);
880 /* If the test insn is valid and doesn't need clobbers, and the target also
881 has no objections, we're good. */
883 && (num_clobbers
== 0 || !added_clobbers_hard_reg_p (icode
))
884 && ! (targetm
.cannot_copy_insn_p
885 && targetm
.cannot_copy_insn_p (test_insn
)))
888 /* Make sure test_insn doesn't have any pointers into GC space. */
889 SET_SRC (PATTERN (test_insn
)) = NULL_RTX
;
894 /* Return nonzero if the operands of expression X are unchanged from the
895 start of INSN's basic block up to but not including INSN (if AVAIL_P == 0),
896 or from INSN to the end of INSN's basic block (if AVAIL_P != 0). */
899 oprs_unchanged_p (const_rtx x
, const_rtx insn
, int avail_p
)
913 struct reg_avail_info
*info
= ®_avail_info
[REGNO (x
)];
915 if (info
->last_bb
!= current_bb
)
918 return info
->last_set
< DF_INSN_LUID (insn
);
920 return info
->first_set
>= DF_INSN_LUID (insn
);
925 || load_killed_in_block_p (current_bb
, DF_INSN_LUID (insn
),
929 return oprs_unchanged_p (XEXP (x
, 0), insn
, avail_p
);
953 for (i
= GET_RTX_LENGTH (code
) - 1, fmt
= GET_RTX_FORMAT (code
); i
>= 0; i
--)
957 /* If we are about to do the last recursive call needed at this
958 level, change it into iteration. This function is called enough
961 return oprs_unchanged_p (XEXP (x
, i
), insn
, avail_p
);
963 else if (! oprs_unchanged_p (XEXP (x
, i
), insn
, avail_p
))
966 else if (fmt
[i
] == 'E')
967 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
968 if (! oprs_unchanged_p (XVECEXP (x
, i
, j
), insn
, avail_p
))
975 /* Info passed from load_killed_in_block_p to mems_conflict_for_gcse_p. */
977 struct mem_conflict_info
979 /* A memory reference for a load instruction, mems_conflict_for_gcse_p will
980 see if a memory store conflicts with this memory load. */
983 /* True if mems_conflict_for_gcse_p finds a conflict between two memory
988 /* DEST is the output of an instruction. If it is a memory reference and
989 possibly conflicts with the load found in DATA, then communicate this
990 information back through DATA. */
993 mems_conflict_for_gcse_p (rtx dest
, const_rtx setter ATTRIBUTE_UNUSED
,
996 struct mem_conflict_info
*mci
= (struct mem_conflict_info
*) data
;
998 while (GET_CODE (dest
) == SUBREG
999 || GET_CODE (dest
) == ZERO_EXTRACT
1000 || GET_CODE (dest
) == STRICT_LOW_PART
)
1001 dest
= XEXP (dest
, 0);
1003 /* If DEST is not a MEM, then it will not conflict with the load. Note
1004 that function calls are assumed to clobber memory, but are handled
1009 /* If we are setting a MEM in our list of specially recognized MEMs,
1010 don't mark as killed this time. */
1011 if (pre_ldst_mems
!= NULL
&& expr_equiv_p (dest
, mci
->mem
))
1013 if (!find_rtx_in_ldst (dest
))
1014 mci
->conflict
= true;
1018 if (true_dependence (dest
, GET_MODE (dest
), mci
->mem
))
1019 mci
->conflict
= true;
1022 /* Return nonzero if the expression in X (a memory reference) is killed
1023 in block BB before or after the insn with the LUID in UID_LIMIT.
1024 AVAIL_P is nonzero for kills after UID_LIMIT, and zero for kills
1027 To check the entire block, set UID_LIMIT to max_uid + 1 and
1031 load_killed_in_block_p (const_basic_block bb
, int uid_limit
, const_rtx x
,
1034 vec
<rtx
> list
= modify_mem_list
[bb
->index
];
1038 /* If this is a readonly then we aren't going to be changing it. */
1039 if (MEM_READONLY_P (x
))
1042 FOR_EACH_VEC_ELT_REVERSE (list
, ix
, setter
)
1044 struct mem_conflict_info mci
;
1046 /* Ignore entries in the list that do not apply. */
1048 && DF_INSN_LUID (setter
) < uid_limit
)
1050 && DF_INSN_LUID (setter
) > uid_limit
))
1053 /* If SETTER is a call everything is clobbered. Note that calls
1054 to pure functions are never put on the list, so we need not
1055 worry about them. */
1056 if (CALL_P (setter
))
1059 /* SETTER must be an INSN of some kind that sets memory. Call
1060 note_stores to examine each hunk of memory that is modified. */
1062 mci
.conflict
= false;
1063 note_stores (PATTERN (setter
), mems_conflict_for_gcse_p
, &mci
);
1070 /* Return nonzero if the operands of expression X are unchanged from
1071 the start of INSN's basic block up to but not including INSN. */
1074 oprs_anticipatable_p (const_rtx x
, const_rtx insn
)
1076 return oprs_unchanged_p (x
, insn
, 0);
1079 /* Return nonzero if the operands of expression X are unchanged from
1080 INSN to the end of INSN's basic block. */
1083 oprs_available_p (const_rtx x
, const_rtx insn
)
1085 return oprs_unchanged_p (x
, insn
, 1);
1088 /* Hash expression X.
1090 MODE is only used if X is a CONST_INT. DO_NOT_RECORD_P is a boolean
1091 indicating if a volatile operand is found or if the expression contains
1092 something we don't want to insert in the table. HASH_TABLE_SIZE is
1093 the current size of the hash table to be probed. */
1096 hash_expr (const_rtx x
, enum machine_mode mode
, int *do_not_record_p
,
1097 int hash_table_size
)
1101 *do_not_record_p
= 0;
1103 hash
= hash_rtx (x
, mode
, do_not_record_p
, NULL
, /*have_reg_qty=*/false);
1104 return hash
% hash_table_size
;
1107 /* Return nonzero if exp1 is equivalent to exp2. */
1110 expr_equiv_p (const_rtx x
, const_rtx y
)
1112 return exp_equiv_p (x
, y
, 0, true);
1115 /* Insert expression X in INSN in the hash TABLE.
1116 If it is already present, record it as the last occurrence in INSN's
1119 MODE is the mode of the value X is being stored into.
1120 It is only used if X is a CONST_INT.
1122 ANTIC_P is nonzero if X is an anticipatable expression.
1123 AVAIL_P is nonzero if X is an available expression.
1125 MAX_DISTANCE is the maximum distance in instructions this expression can
1129 insert_expr_in_table (rtx x
, enum machine_mode mode
, rtx insn
, int antic_p
,
1130 int avail_p
, int max_distance
, struct hash_table_d
*table
)
1132 int found
, do_not_record_p
;
1134 struct expr
*cur_expr
, *last_expr
= NULL
;
1135 struct occr
*antic_occr
, *avail_occr
;
1137 hash
= hash_expr (x
, mode
, &do_not_record_p
, table
->size
);
1139 /* Do not insert expression in table if it contains volatile operands,
1140 or if hash_expr determines the expression is something we don't want
1141 to or can't handle. */
1142 if (do_not_record_p
)
1145 cur_expr
= table
->table
[hash
];
1148 while (cur_expr
&& 0 == (found
= expr_equiv_p (cur_expr
->expr
, x
)))
1150 /* If the expression isn't found, save a pointer to the end of
1152 last_expr
= cur_expr
;
1153 cur_expr
= cur_expr
->next_same_hash
;
1158 cur_expr
= GOBNEW (struct expr
);
1159 bytes_used
+= sizeof (struct expr
);
1160 if (table
->table
[hash
] == NULL
)
1161 /* This is the first pattern that hashed to this index. */
1162 table
->table
[hash
] = cur_expr
;
1164 /* Add EXPR to end of this hash chain. */
1165 last_expr
->next_same_hash
= cur_expr
;
1167 /* Set the fields of the expr element. */
1169 cur_expr
->bitmap_index
= table
->n_elems
++;
1170 cur_expr
->next_same_hash
= NULL
;
1171 cur_expr
->antic_occr
= NULL
;
1172 cur_expr
->avail_occr
= NULL
;
1173 gcc_assert (max_distance
>= 0);
1174 cur_expr
->max_distance
= max_distance
;
1177 gcc_assert (cur_expr
->max_distance
== max_distance
);
1179 /* Now record the occurrence(s). */
1182 antic_occr
= cur_expr
->antic_occr
;
1185 && BLOCK_FOR_INSN (antic_occr
->insn
) != BLOCK_FOR_INSN (insn
))
1189 /* Found another instance of the expression in the same basic block.
1190 Prefer the currently recorded one. We want the first one in the
1191 block and the block is scanned from start to end. */
1192 ; /* nothing to do */
1195 /* First occurrence of this expression in this basic block. */
1196 antic_occr
= GOBNEW (struct occr
);
1197 bytes_used
+= sizeof (struct occr
);
1198 antic_occr
->insn
= insn
;
1199 antic_occr
->next
= cur_expr
->antic_occr
;
1200 antic_occr
->deleted_p
= 0;
1201 cur_expr
->antic_occr
= antic_occr
;
1207 avail_occr
= cur_expr
->avail_occr
;
1210 && BLOCK_FOR_INSN (avail_occr
->insn
) == BLOCK_FOR_INSN (insn
))
1212 /* Found another instance of the expression in the same basic block.
1213 Prefer this occurrence to the currently recorded one. We want
1214 the last one in the block and the block is scanned from start
1216 avail_occr
->insn
= insn
;
1220 /* First occurrence of this expression in this basic block. */
1221 avail_occr
= GOBNEW (struct occr
);
1222 bytes_used
+= sizeof (struct occr
);
1223 avail_occr
->insn
= insn
;
1224 avail_occr
->next
= cur_expr
->avail_occr
;
1225 avail_occr
->deleted_p
= 0;
1226 cur_expr
->avail_occr
= avail_occr
;
1231 /* Scan SET present in INSN and add an entry to the hash TABLE. */
1234 hash_scan_set (rtx set
, rtx insn
, struct hash_table_d
*table
)
1236 rtx src
= SET_SRC (set
);
1237 rtx dest
= SET_DEST (set
);
1240 if (GET_CODE (src
) == CALL
)
1241 hash_scan_call (src
, insn
, table
);
1243 else if (REG_P (dest
))
1245 unsigned int regno
= REGNO (dest
);
1246 int max_distance
= 0;
1248 /* See if a REG_EQUAL note shows this equivalent to a simpler expression.
1250 This allows us to do a single GCSE pass and still eliminate
1251 redundant constants, addresses or other expressions that are
1252 constructed with multiple instructions.
1254 However, keep the original SRC if INSN is a simple reg-reg move.
1255 In this case, there will almost always be a REG_EQUAL note on the
1256 insn that sets SRC. By recording the REG_EQUAL value here as SRC
1257 for INSN, we miss copy propagation opportunities and we perform the
1258 same PRE GCSE operation repeatedly on the same REG_EQUAL value if we
1259 do more than one PRE GCSE pass.
1261 Note that this does not impede profitable constant propagations. We
1262 "look through" reg-reg sets in lookup_avail_set. */
1263 note
= find_reg_equal_equiv_note (insn
);
1265 && REG_NOTE_KIND (note
) == REG_EQUAL
1267 && want_to_gcse_p (XEXP (note
, 0), NULL
))
1268 src
= XEXP (note
, 0), set
= gen_rtx_SET (VOIDmode
, dest
, src
);
1270 /* Only record sets of pseudo-regs in the hash table. */
1271 if (regno
>= FIRST_PSEUDO_REGISTER
1272 /* Don't GCSE something if we can't do a reg/reg copy. */
1273 && can_copy_p (GET_MODE (dest
))
1274 /* GCSE commonly inserts instruction after the insn. We can't
1275 do that easily for EH edges so disable GCSE on these for now. */
1276 /* ??? We can now easily create new EH landing pads at the
1277 gimple level, for splitting edges; there's no reason we
1278 can't do the same thing at the rtl level. */
1279 && !can_throw_internal (insn
)
1280 /* Is SET_SRC something we want to gcse? */
1281 && want_to_gcse_p (src
, &max_distance
)
1282 /* Don't CSE a nop. */
1283 && ! set_noop_p (set
)
1284 /* Don't GCSE if it has attached REG_EQUIV note.
1285 At this point this only function parameters should have
1286 REG_EQUIV notes and if the argument slot is used somewhere
1287 explicitly, it means address of parameter has been taken,
1288 so we should not extend the lifetime of the pseudo. */
1289 && (note
== NULL_RTX
|| ! MEM_P (XEXP (note
, 0))))
1291 /* An expression is not anticipatable if its operands are
1292 modified before this insn or if this is not the only SET in
1293 this insn. The latter condition does not have to mean that
1294 SRC itself is not anticipatable, but we just will not be
1295 able to handle code motion of insns with multiple sets. */
1296 int antic_p
= oprs_anticipatable_p (src
, insn
)
1297 && !multiple_sets (insn
);
1298 /* An expression is not available if its operands are
1299 subsequently modified, including this insn. It's also not
1300 available if this is a branch, because we can't insert
1301 a set after the branch. */
1302 int avail_p
= (oprs_available_p (src
, insn
)
1303 && ! JUMP_P (insn
));
1305 insert_expr_in_table (src
, GET_MODE (dest
), insn
, antic_p
, avail_p
,
1306 max_distance
, table
);
1309 /* In case of store we want to consider the memory value as available in
1310 the REG stored in that memory. This makes it possible to remove
1311 redundant loads from due to stores to the same location. */
1312 else if (flag_gcse_las
&& REG_P (src
) && MEM_P (dest
))
1314 unsigned int regno
= REGNO (src
);
1315 int max_distance
= 0;
1317 /* Only record sets of pseudo-regs in the hash table. */
1318 if (regno
>= FIRST_PSEUDO_REGISTER
1319 /* Don't GCSE something if we can't do a reg/reg copy. */
1320 && can_copy_p (GET_MODE (src
))
1321 /* GCSE commonly inserts instruction after the insn. We can't
1322 do that easily for EH edges so disable GCSE on these for now. */
1323 && !can_throw_internal (insn
)
1324 /* Is SET_DEST something we want to gcse? */
1325 && want_to_gcse_p (dest
, &max_distance
)
1326 /* Don't CSE a nop. */
1327 && ! set_noop_p (set
)
1328 /* Don't GCSE if it has attached REG_EQUIV note.
1329 At this point this only function parameters should have
1330 REG_EQUIV notes and if the argument slot is used somewhere
1331 explicitly, it means address of parameter has been taken,
1332 so we should not extend the lifetime of the pseudo. */
1333 && ((note
= find_reg_note (insn
, REG_EQUIV
, NULL_RTX
)) == 0
1334 || ! MEM_P (XEXP (note
, 0))))
1336 /* Stores are never anticipatable. */
1338 /* An expression is not available if its operands are
1339 subsequently modified, including this insn. It's also not
1340 available if this is a branch, because we can't insert
1341 a set after the branch. */
1342 int avail_p
= oprs_available_p (dest
, insn
)
1345 /* Record the memory expression (DEST) in the hash table. */
1346 insert_expr_in_table (dest
, GET_MODE (dest
), insn
,
1347 antic_p
, avail_p
, max_distance
, table
);
1353 hash_scan_clobber (rtx x ATTRIBUTE_UNUSED
, rtx insn ATTRIBUTE_UNUSED
,
1354 struct hash_table_d
*table ATTRIBUTE_UNUSED
)
1356 /* Currently nothing to do. */
1360 hash_scan_call (rtx x ATTRIBUTE_UNUSED
, rtx insn ATTRIBUTE_UNUSED
,
1361 struct hash_table_d
*table ATTRIBUTE_UNUSED
)
1363 /* Currently nothing to do. */
1366 /* Process INSN and add hash table entries as appropriate. */
1369 hash_scan_insn (rtx insn
, struct hash_table_d
*table
)
1371 rtx pat
= PATTERN (insn
);
1374 /* Pick out the sets of INSN and for other forms of instructions record
1375 what's been modified. */
1377 if (GET_CODE (pat
) == SET
)
1378 hash_scan_set (pat
, insn
, table
);
1380 else if (GET_CODE (pat
) == CLOBBER
)
1381 hash_scan_clobber (pat
, insn
, table
);
1383 else if (GET_CODE (pat
) == CALL
)
1384 hash_scan_call (pat
, insn
, table
);
1386 else if (GET_CODE (pat
) == PARALLEL
)
1387 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
1389 rtx x
= XVECEXP (pat
, 0, i
);
1391 if (GET_CODE (x
) == SET
)
1392 hash_scan_set (x
, insn
, table
);
1393 else if (GET_CODE (x
) == CLOBBER
)
1394 hash_scan_clobber (x
, insn
, table
);
1395 else if (GET_CODE (x
) == CALL
)
1396 hash_scan_call (x
, insn
, table
);
1400 /* Dump the hash table TABLE to file FILE under the name NAME. */
1403 dump_hash_table (FILE *file
, const char *name
, struct hash_table_d
*table
)
1406 /* Flattened out table, so it's printed in proper order. */
1407 struct expr
**flat_table
;
1408 unsigned int *hash_val
;
1411 flat_table
= XCNEWVEC (struct expr
*, table
->n_elems
);
1412 hash_val
= XNEWVEC (unsigned int, table
->n_elems
);
1414 for (i
= 0; i
< (int) table
->size
; i
++)
1415 for (expr
= table
->table
[i
]; expr
!= NULL
; expr
= expr
->next_same_hash
)
1417 flat_table
[expr
->bitmap_index
] = expr
;
1418 hash_val
[expr
->bitmap_index
] = i
;
1421 fprintf (file
, "%s hash table (%d buckets, %d entries)\n",
1422 name
, table
->size
, table
->n_elems
);
1424 for (i
= 0; i
< (int) table
->n_elems
; i
++)
1425 if (flat_table
[i
] != 0)
1427 expr
= flat_table
[i
];
1428 fprintf (file
, "Index %d (hash value %d; max distance %d)\n ",
1429 expr
->bitmap_index
, hash_val
[i
], expr
->max_distance
);
1430 print_rtl (file
, expr
->expr
);
1431 fprintf (file
, "\n");
1434 fprintf (file
, "\n");
1440 /* Record register first/last/block set information for REGNO in INSN.
1442 first_set records the first place in the block where the register
1443 is set and is used to compute "anticipatability".
1445 last_set records the last place in the block where the register
1446 is set and is used to compute "availability".
1448 last_bb records the block for which first_set and last_set are
1449 valid, as a quick test to invalidate them. */
1452 record_last_reg_set_info (rtx insn
, int regno
)
1454 struct reg_avail_info
*info
= ®_avail_info
[regno
];
1455 int luid
= DF_INSN_LUID (insn
);
1457 info
->last_set
= luid
;
1458 if (info
->last_bb
!= current_bb
)
1460 info
->last_bb
= current_bb
;
1461 info
->first_set
= luid
;
1465 /* Record all of the canonicalized MEMs of record_last_mem_set_info's insn.
1466 Note we store a pair of elements in the list, so they have to be
1467 taken off pairwise. */
1470 canon_list_insert (rtx dest ATTRIBUTE_UNUSED
, const_rtx x ATTRIBUTE_UNUSED
,
1473 rtx dest_addr
, insn
;
1477 while (GET_CODE (dest
) == SUBREG
1478 || GET_CODE (dest
) == ZERO_EXTRACT
1479 || GET_CODE (dest
) == STRICT_LOW_PART
)
1480 dest
= XEXP (dest
, 0);
1482 /* If DEST is not a MEM, then it will not conflict with a load. Note
1483 that function calls are assumed to clobber memory, but are handled
1489 dest_addr
= get_addr (XEXP (dest
, 0));
1490 dest_addr
= canon_rtx (dest_addr
);
1491 insn
= (rtx
) v_insn
;
1492 bb
= BLOCK_FOR_INSN (insn
)->index
;
1495 pair
.dest_addr
= dest_addr
;
1496 canon_modify_mem_list
[bb
].safe_push (pair
);
1499 /* Record memory modification information for INSN. We do not actually care
1500 about the memory location(s) that are set, or even how they are set (consider
1501 a CALL_INSN). We merely need to record which insns modify memory. */
1504 record_last_mem_set_info (rtx insn
)
1511 /* load_killed_in_block_p will handle the case of calls clobbering
1513 bb
= BLOCK_FOR_INSN (insn
)->index
;
1514 modify_mem_list
[bb
].safe_push (insn
);
1515 bitmap_set_bit (modify_mem_list_set
, bb
);
1518 bitmap_set_bit (blocks_with_calls
, bb
);
1520 note_stores (PATTERN (insn
), canon_list_insert
, (void*) insn
);
1523 /* Called from compute_hash_table via note_stores to handle one
1524 SET or CLOBBER in an insn. DATA is really the instruction in which
1525 the SET is taking place. */
1528 record_last_set_info (rtx dest
, const_rtx setter ATTRIBUTE_UNUSED
, void *data
)
1530 rtx last_set_insn
= (rtx
) data
;
1532 if (GET_CODE (dest
) == SUBREG
)
1533 dest
= SUBREG_REG (dest
);
1536 record_last_reg_set_info (last_set_insn
, REGNO (dest
));
1537 else if (MEM_P (dest
)
1538 /* Ignore pushes, they clobber nothing. */
1539 && ! push_operand (dest
, GET_MODE (dest
)))
1540 record_last_mem_set_info (last_set_insn
);
1543 /* Top level function to create an expression hash table.
1545 Expression entries are placed in the hash table if
1546 - they are of the form (set (pseudo-reg) src),
1547 - src is something we want to perform GCSE on,
1548 - none of the operands are subsequently modified in the block
1550 Currently src must be a pseudo-reg or a const_int.
1552 TABLE is the table computed. */
1555 compute_hash_table_work (struct hash_table_d
*table
)
1559 /* re-Cache any INSN_LIST nodes we have allocated. */
1560 clear_modify_mem_tables ();
1561 /* Some working arrays used to track first and last set in each block. */
1562 reg_avail_info
= GNEWVEC (struct reg_avail_info
, max_reg_num ());
1564 for (i
= 0; i
< max_reg_num (); ++i
)
1565 reg_avail_info
[i
].last_bb
= NULL
;
1567 FOR_EACH_BB_FN (current_bb
, cfun
)
1572 /* First pass over the instructions records information used to
1573 determine when registers and memory are first and last set. */
1574 FOR_BB_INSNS (current_bb
, insn
)
1576 if (!NONDEBUG_INSN_P (insn
))
1581 hard_reg_set_iterator hrsi
;
1582 EXECUTE_IF_SET_IN_HARD_REG_SET (regs_invalidated_by_call
,
1584 record_last_reg_set_info (insn
, regno
);
1586 if (! RTL_CONST_OR_PURE_CALL_P (insn
))
1587 record_last_mem_set_info (insn
);
1590 note_stores (PATTERN (insn
), record_last_set_info
, insn
);
1593 /* The next pass builds the hash table. */
1594 FOR_BB_INSNS (current_bb
, insn
)
1595 if (NONDEBUG_INSN_P (insn
))
1596 hash_scan_insn (insn
, table
);
1599 free (reg_avail_info
);
1600 reg_avail_info
= NULL
;
1603 /* Allocate space for the set/expr hash TABLE.
1604 It is used to determine the number of buckets to use. */
1607 alloc_hash_table (struct hash_table_d
*table
)
1611 n
= get_max_insn_count ();
1613 table
->size
= n
/ 4;
1614 if (table
->size
< 11)
1617 /* Attempt to maintain efficient use of hash table.
1618 Making it an odd number is simplest for now.
1619 ??? Later take some measurements. */
1621 n
= table
->size
* sizeof (struct expr
*);
1622 table
->table
= GNEWVAR (struct expr
*, n
);
1625 /* Free things allocated by alloc_hash_table. */
1628 free_hash_table (struct hash_table_d
*table
)
1630 free (table
->table
);
1633 /* Compute the expression hash table TABLE. */
1636 compute_hash_table (struct hash_table_d
*table
)
1638 /* Initialize count of number of entries in hash table. */
1640 memset (table
->table
, 0, table
->size
* sizeof (struct expr
*));
1642 compute_hash_table_work (table
);
1645 /* Expression tracking support. */
1647 /* Clear canon_modify_mem_list and modify_mem_list tables. */
1649 clear_modify_mem_tables (void)
1654 EXECUTE_IF_SET_IN_BITMAP (modify_mem_list_set
, 0, i
, bi
)
1656 modify_mem_list
[i
].release ();
1657 canon_modify_mem_list
[i
].release ();
1659 bitmap_clear (modify_mem_list_set
);
1660 bitmap_clear (blocks_with_calls
);
1663 /* Release memory used by modify_mem_list_set. */
1666 free_modify_mem_tables (void)
1668 clear_modify_mem_tables ();
1669 free (modify_mem_list
);
1670 free (canon_modify_mem_list
);
1671 modify_mem_list
= 0;
1672 canon_modify_mem_list
= 0;
1675 /* For each block, compute whether X is transparent. X is either an
1676 expression or an assignment [though we don't care which, for this context
1677 an assignment is treated as an expression]. For each block where an
1678 element of X is modified, reset the INDX bit in BMAP. */
1681 compute_transp (const_rtx x
, int indx
, sbitmap
*bmap
)
1687 /* repeat is used to turn tail-recursion into iteration since GCC
1688 can't do it when there's no return value. */
1694 code
= GET_CODE (x
);
1700 for (def
= DF_REG_DEF_CHAIN (REGNO (x
));
1702 def
= DF_REF_NEXT_REG (def
))
1703 bitmap_clear_bit (bmap
[DF_REF_BB (def
)->index
], indx
);
1709 if (! MEM_READONLY_P (x
))
1715 x_addr
= get_addr (XEXP (x
, 0));
1716 x_addr
= canon_rtx (x_addr
);
1718 /* First handle all the blocks with calls. We don't need to
1719 do any list walking for them. */
1720 EXECUTE_IF_SET_IN_BITMAP (blocks_with_calls
, 0, bb_index
, bi
)
1722 bitmap_clear_bit (bmap
[bb_index
], indx
);
1725 /* Now iterate over the blocks which have memory modifications
1726 but which do not have any calls. */
1727 EXECUTE_IF_AND_COMPL_IN_BITMAP (modify_mem_list_set
,
1731 vec
<modify_pair
> list
1732 = canon_modify_mem_list
[bb_index
];
1736 FOR_EACH_VEC_ELT_REVERSE (list
, ix
, pair
)
1738 rtx dest
= pair
->dest
;
1739 rtx dest_addr
= pair
->dest_addr
;
1741 if (canon_true_dependence (dest
, GET_MODE (dest
),
1742 dest_addr
, x
, x_addr
))
1744 bitmap_clear_bit (bmap
[bb_index
], indx
);
1768 for (i
= GET_RTX_LENGTH (code
) - 1, fmt
= GET_RTX_FORMAT (code
); i
>= 0; i
--)
1772 /* If we are about to do the last recursive call
1773 needed at this level, change it into iteration.
1774 This function is called enough to be worth it. */
1781 compute_transp (XEXP (x
, i
), indx
, bmap
);
1783 else if (fmt
[i
] == 'E')
1784 for (j
= 0; j
< XVECLEN (x
, i
); j
++)
1785 compute_transp (XVECEXP (x
, i
, j
), indx
, bmap
);
1789 /* Compute PRE+LCM working variables. */
1791 /* Local properties of expressions. */
1793 /* Nonzero for expressions that are transparent in the block. */
1794 static sbitmap
*transp
;
1796 /* Nonzero for expressions that are computed (available) in the block. */
1797 static sbitmap
*comp
;
1799 /* Nonzero for expressions that are locally anticipatable in the block. */
1800 static sbitmap
*antloc
;
1802 /* Nonzero for expressions where this block is an optimal computation
1804 static sbitmap
*pre_optimal
;
1806 /* Nonzero for expressions which are redundant in a particular block. */
1807 static sbitmap
*pre_redundant
;
1809 /* Nonzero for expressions which should be inserted on a specific edge. */
1810 static sbitmap
*pre_insert_map
;
1812 /* Nonzero for expressions which should be deleted in a specific block. */
1813 static sbitmap
*pre_delete_map
;
1815 /* Allocate vars used for PRE analysis. */
1818 alloc_pre_mem (int n_blocks
, int n_exprs
)
1820 transp
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
1821 comp
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
1822 antloc
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
1825 pre_redundant
= NULL
;
1826 pre_insert_map
= NULL
;
1827 pre_delete_map
= NULL
;
1828 ae_kill
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
1830 /* pre_insert and pre_delete are allocated later. */
1833 /* Free vars used for PRE analysis. */
1838 sbitmap_vector_free (transp
);
1839 sbitmap_vector_free (comp
);
1841 /* ANTLOC and AE_KILL are freed just after pre_lcm finishes. */
1844 sbitmap_vector_free (pre_optimal
);
1846 sbitmap_vector_free (pre_redundant
);
1848 sbitmap_vector_free (pre_insert_map
);
1850 sbitmap_vector_free (pre_delete_map
);
1852 transp
= comp
= NULL
;
1853 pre_optimal
= pre_redundant
= pre_insert_map
= pre_delete_map
= NULL
;
1856 /* Remove certain expressions from anticipatable and transparent
1857 sets of basic blocks that have incoming abnormal edge.
1858 For PRE remove potentially trapping expressions to avoid placing
1859 them on abnormal edges. For hoisting remove memory references that
1860 can be clobbered by calls. */
1863 prune_expressions (bool pre_p
)
1865 sbitmap prune_exprs
;
1870 prune_exprs
= sbitmap_alloc (expr_hash_table
.n_elems
);
1871 bitmap_clear (prune_exprs
);
1872 for (ui
= 0; ui
< expr_hash_table
.size
; ui
++)
1874 for (expr
= expr_hash_table
.table
[ui
]; expr
; expr
= expr
->next_same_hash
)
1876 /* Note potentially trapping expressions. */
1877 if (may_trap_p (expr
->expr
))
1879 bitmap_set_bit (prune_exprs
, expr
->bitmap_index
);
1883 if (!pre_p
&& MEM_P (expr
->expr
))
1884 /* Note memory references that can be clobbered by a call.
1885 We do not split abnormal edges in hoisting, so would
1886 a memory reference get hoisted along an abnormal edge,
1887 it would be placed /before/ the call. Therefore, only
1888 constant memory references can be hoisted along abnormal
1891 if (GET_CODE (XEXP (expr
->expr
, 0)) == SYMBOL_REF
1892 && CONSTANT_POOL_ADDRESS_P (XEXP (expr
->expr
, 0)))
1895 if (MEM_READONLY_P (expr
->expr
)
1896 && !MEM_VOLATILE_P (expr
->expr
)
1897 && MEM_NOTRAP_P (expr
->expr
))
1898 /* Constant memory reference, e.g., a PIC address. */
1901 /* ??? Optimally, we would use interprocedural alias
1902 analysis to determine if this mem is actually killed
1905 bitmap_set_bit (prune_exprs
, expr
->bitmap_index
);
1910 FOR_EACH_BB_FN (bb
, cfun
)
1915 /* If the current block is the destination of an abnormal edge, we
1916 kill all trapping (for PRE) and memory (for hoist) expressions
1917 because we won't be able to properly place the instruction on
1918 the edge. So make them neither anticipatable nor transparent.
1919 This is fairly conservative.
1921 ??? For hoisting it may be necessary to check for set-and-jump
1922 instructions here, not just for abnormal edges. The general problem
1923 is that when an expression cannot not be placed right at the end of
1924 a basic block we should account for any side-effects of a subsequent
1925 jump instructions that could clobber the expression. It would
1926 be best to implement this check along the lines of
1927 should_hoist_expr_to_dom where the target block is already known
1928 and, hence, there's no need to conservatively prune expressions on
1929 "intermediate" set-and-jump instructions. */
1930 FOR_EACH_EDGE (e
, ei
, bb
->preds
)
1931 if ((e
->flags
& EDGE_ABNORMAL
)
1932 && (pre_p
|| CALL_P (BB_END (e
->src
))))
1934 bitmap_and_compl (antloc
[bb
->index
],
1935 antloc
[bb
->index
], prune_exprs
);
1936 bitmap_and_compl (transp
[bb
->index
],
1937 transp
[bb
->index
], prune_exprs
);
1942 sbitmap_free (prune_exprs
);
1945 /* It may be necessary to insert a large number of insns on edges to
1946 make the existing occurrences of expressions fully redundant. This
1947 routine examines the set of insertions and deletions and if the ratio
1948 of insertions to deletions is too high for a particular expression, then
1949 the expression is removed from the insertion/deletion sets.
1951 N_ELEMS is the number of elements in the hash table. */
1954 prune_insertions_deletions (int n_elems
)
1956 sbitmap_iterator sbi
;
1957 sbitmap prune_exprs
;
1959 /* We always use I to iterate over blocks/edges and J to iterate over
1963 /* Counts for the number of times an expression needs to be inserted and
1964 number of times an expression can be removed as a result. */
1965 int *insertions
= GCNEWVEC (int, n_elems
);
1966 int *deletions
= GCNEWVEC (int, n_elems
);
1968 /* Set of expressions which require too many insertions relative to
1969 the number of deletions achieved. We will prune these out of the
1970 insertion/deletion sets. */
1971 prune_exprs
= sbitmap_alloc (n_elems
);
1972 bitmap_clear (prune_exprs
);
1974 /* Iterate over the edges counting the number of times each expression
1975 needs to be inserted. */
1976 for (i
= 0; i
< (unsigned) n_edges_for_fn (cfun
); i
++)
1978 EXECUTE_IF_SET_IN_BITMAP (pre_insert_map
[i
], 0, j
, sbi
)
1982 /* Similarly for deletions, but those occur in blocks rather than on
1984 for (i
= 0; i
< (unsigned) last_basic_block_for_fn (cfun
); i
++)
1986 EXECUTE_IF_SET_IN_BITMAP (pre_delete_map
[i
], 0, j
, sbi
)
1990 /* Now that we have accurate counts, iterate over the elements in the
1991 hash table and see if any need too many insertions relative to the
1992 number of evaluations that can be removed. If so, mark them in
1994 for (j
= 0; j
< (unsigned) n_elems
; j
++)
1996 && ((unsigned) insertions
[j
] / deletions
[j
]) > MAX_GCSE_INSERTION_RATIO
)
1997 bitmap_set_bit (prune_exprs
, j
);
1999 /* Now prune PRE_INSERT_MAP and PRE_DELETE_MAP based on PRUNE_EXPRS. */
2000 EXECUTE_IF_SET_IN_BITMAP (prune_exprs
, 0, j
, sbi
)
2002 for (i
= 0; i
< (unsigned) n_edges_for_fn (cfun
); i
++)
2003 bitmap_clear_bit (pre_insert_map
[i
], j
);
2005 for (i
= 0; i
< (unsigned) last_basic_block_for_fn (cfun
); i
++)
2006 bitmap_clear_bit (pre_delete_map
[i
], j
);
2009 sbitmap_free (prune_exprs
);
2014 /* Top level routine to do the dataflow analysis needed by PRE. */
2016 static struct edge_list
*
2017 compute_pre_data (void)
2019 struct edge_list
*edge_list
;
2022 compute_local_properties (transp
, comp
, antloc
, &expr_hash_table
);
2023 prune_expressions (true);
2024 bitmap_vector_clear (ae_kill
, last_basic_block_for_fn (cfun
));
2026 /* Compute ae_kill for each basic block using:
2031 FOR_EACH_BB_FN (bb
, cfun
)
2033 bitmap_ior (ae_kill
[bb
->index
], transp
[bb
->index
], comp
[bb
->index
]);
2034 bitmap_not (ae_kill
[bb
->index
], ae_kill
[bb
->index
]);
2037 edge_list
= pre_edge_lcm (expr_hash_table
.n_elems
, transp
, comp
, antloc
,
2038 ae_kill
, &pre_insert_map
, &pre_delete_map
);
2039 sbitmap_vector_free (antloc
);
2041 sbitmap_vector_free (ae_kill
);
2044 prune_insertions_deletions (expr_hash_table
.n_elems
);
2051 /* Return nonzero if an occurrence of expression EXPR in OCCR_BB would reach
2054 VISITED is a pointer to a working buffer for tracking which BB's have
2055 been visited. It is NULL for the top-level call.
2057 We treat reaching expressions that go through blocks containing the same
2058 reaching expression as "not reaching". E.g. if EXPR is generated in blocks
2059 2 and 3, INSN is in block 4, and 2->3->4, we treat the expression in block
2060 2 as not reaching. The intent is to improve the probability of finding
2061 only one reaching expression and to reduce register lifetimes by picking
2062 the closest such expression. */
2065 pre_expr_reaches_here_p_work (basic_block occr_bb
, struct expr
*expr
,
2066 basic_block bb
, char *visited
)
2071 FOR_EACH_EDGE (pred
, ei
, bb
->preds
)
2073 basic_block pred_bb
= pred
->src
;
2075 if (pred
->src
== ENTRY_BLOCK_PTR_FOR_FN (cfun
)
2076 /* Has predecessor has already been visited? */
2077 || visited
[pred_bb
->index
])
2078 ;/* Nothing to do. */
2080 /* Does this predecessor generate this expression? */
2081 else if (bitmap_bit_p (comp
[pred_bb
->index
], expr
->bitmap_index
))
2083 /* Is this the occurrence we're looking for?
2084 Note that there's only one generating occurrence per block
2085 so we just need to check the block number. */
2086 if (occr_bb
== pred_bb
)
2089 visited
[pred_bb
->index
] = 1;
2091 /* Ignore this predecessor if it kills the expression. */
2092 else if (! bitmap_bit_p (transp
[pred_bb
->index
], expr
->bitmap_index
))
2093 visited
[pred_bb
->index
] = 1;
2095 /* Neither gen nor kill. */
2098 visited
[pred_bb
->index
] = 1;
2099 if (pre_expr_reaches_here_p_work (occr_bb
, expr
, pred_bb
, visited
))
2104 /* All paths have been checked. */
2108 /* The wrapper for pre_expr_reaches_here_work that ensures that any
2109 memory allocated for that function is returned. */
2112 pre_expr_reaches_here_p (basic_block occr_bb
, struct expr
*expr
, basic_block bb
)
2115 char *visited
= XCNEWVEC (char, last_basic_block_for_fn (cfun
));
2117 rval
= pre_expr_reaches_here_p_work (occr_bb
, expr
, bb
, visited
);
2123 /* Generate RTL to copy an EXPR to its `reaching_reg' and return it. */
2126 process_insert_insn (struct expr
*expr
)
2128 rtx reg
= expr
->reaching_reg
;
2129 /* Copy the expression to make sure we don't have any sharing issues. */
2130 rtx exp
= copy_rtx (expr
->expr
);
2135 /* If the expression is something that's an operand, like a constant,
2136 just copy it to a register. */
2137 if (general_operand (exp
, GET_MODE (reg
)))
2138 emit_move_insn (reg
, exp
);
2140 /* Otherwise, make a new insn to compute this expression and make sure the
2141 insn will be recognized (this also adds any needed CLOBBERs). */
2144 rtx insn
= emit_insn (gen_rtx_SET (VOIDmode
, reg
, exp
));
2146 if (insn_invalid_p (insn
, false))
2156 /* Add EXPR to the end of basic block BB.
2158 This is used by both the PRE and code hoisting. */
2161 insert_insn_end_basic_block (struct expr
*expr
, basic_block bb
)
2163 rtx insn
= BB_END (bb
);
2165 rtx reg
= expr
->reaching_reg
;
2166 int regno
= REGNO (reg
);
2169 pat
= process_insert_insn (expr
);
2170 gcc_assert (pat
&& INSN_P (pat
));
2173 while (NEXT_INSN (pat_end
) != NULL_RTX
)
2174 pat_end
= NEXT_INSN (pat_end
);
2176 /* If the last insn is a jump, insert EXPR in front [taking care to
2177 handle cc0, etc. properly]. Similarly we need to care trapping
2178 instructions in presence of non-call exceptions. */
2181 || (NONJUMP_INSN_P (insn
)
2182 && (!single_succ_p (bb
)
2183 || single_succ_edge (bb
)->flags
& EDGE_ABNORMAL
)))
2186 /* FIXME: 'twould be nice to call prev_cc0_setter here but it aborts
2187 if cc0 isn't set. */
2188 rtx note
= find_reg_note (insn
, REG_CC_SETTER
, NULL_RTX
);
2190 insn
= XEXP (note
, 0);
2193 rtx maybe_cc0_setter
= prev_nonnote_insn (insn
);
2194 if (maybe_cc0_setter
2195 && INSN_P (maybe_cc0_setter
)
2196 && sets_cc0_p (PATTERN (maybe_cc0_setter
)))
2197 insn
= maybe_cc0_setter
;
2200 /* FIXME: What if something in cc0/jump uses value set in new insn? */
2201 new_insn
= emit_insn_before_noloc (pat
, insn
, bb
);
2204 /* Likewise if the last insn is a call, as will happen in the presence
2205 of exception handling. */
2206 else if (CALL_P (insn
)
2207 && (!single_succ_p (bb
)
2208 || single_succ_edge (bb
)->flags
& EDGE_ABNORMAL
))
2210 /* Keeping in mind targets with small register classes and parameters
2211 in registers, we search backward and place the instructions before
2212 the first parameter is loaded. Do this for everyone for consistency
2213 and a presumption that we'll get better code elsewhere as well. */
2215 /* Since different machines initialize their parameter registers
2216 in different orders, assume nothing. Collect the set of all
2217 parameter registers. */
2218 insn
= find_first_parameter_load (insn
, BB_HEAD (bb
));
2220 /* If we found all the parameter loads, then we want to insert
2221 before the first parameter load.
2223 If we did not find all the parameter loads, then we might have
2224 stopped on the head of the block, which could be a CODE_LABEL.
2225 If we inserted before the CODE_LABEL, then we would be putting
2226 the insn in the wrong basic block. In that case, put the insn
2227 after the CODE_LABEL. Also, respect NOTE_INSN_BASIC_BLOCK. */
2228 while (LABEL_P (insn
)
2229 || NOTE_INSN_BASIC_BLOCK_P (insn
))
2230 insn
= NEXT_INSN (insn
);
2232 new_insn
= emit_insn_before_noloc (pat
, insn
, bb
);
2235 new_insn
= emit_insn_after_noloc (pat
, insn
, bb
);
2240 add_label_notes (PATTERN (pat
), new_insn
);
2243 pat
= NEXT_INSN (pat
);
2246 gcse_create_count
++;
2250 fprintf (dump_file
, "PRE/HOIST: end of bb %d, insn %d, ",
2251 bb
->index
, INSN_UID (new_insn
));
2252 fprintf (dump_file
, "copying expression %d to reg %d\n",
2253 expr
->bitmap_index
, regno
);
2257 /* Insert partially redundant expressions on edges in the CFG to make
2258 the expressions fully redundant. */
2261 pre_edge_insert (struct edge_list
*edge_list
, struct expr
**index_map
)
2263 int e
, i
, j
, num_edges
, set_size
, did_insert
= 0;
2266 /* Where PRE_INSERT_MAP is nonzero, we add the expression on that edge
2267 if it reaches any of the deleted expressions. */
2269 set_size
= pre_insert_map
[0]->size
;
2270 num_edges
= NUM_EDGES (edge_list
);
2271 inserted
= sbitmap_vector_alloc (num_edges
, expr_hash_table
.n_elems
);
2272 bitmap_vector_clear (inserted
, num_edges
);
2274 for (e
= 0; e
< num_edges
; e
++)
2277 basic_block bb
= INDEX_EDGE_PRED_BB (edge_list
, e
);
2279 for (i
= indx
= 0; i
< set_size
; i
++, indx
+= SBITMAP_ELT_BITS
)
2281 SBITMAP_ELT_TYPE insert
= pre_insert_map
[e
]->elms
[i
];
2284 insert
&& j
< (int) expr_hash_table
.n_elems
;
2286 if ((insert
& 1) != 0 && index_map
[j
]->reaching_reg
!= NULL_RTX
)
2288 struct expr
*expr
= index_map
[j
];
2291 /* Now look at each deleted occurrence of this expression. */
2292 for (occr
= expr
->antic_occr
; occr
!= NULL
; occr
= occr
->next
)
2294 if (! occr
->deleted_p
)
2297 /* Insert this expression on this edge if it would
2298 reach the deleted occurrence in BB. */
2299 if (!bitmap_bit_p (inserted
[e
], j
))
2302 edge eg
= INDEX_EDGE (edge_list
, e
);
2304 /* We can't insert anything on an abnormal and
2305 critical edge, so we insert the insn at the end of
2306 the previous block. There are several alternatives
2307 detailed in Morgans book P277 (sec 10.5) for
2308 handling this situation. This one is easiest for
2311 if (eg
->flags
& EDGE_ABNORMAL
)
2312 insert_insn_end_basic_block (index_map
[j
], bb
);
2315 insn
= process_insert_insn (index_map
[j
]);
2316 insert_insn_on_edge (insn
, eg
);
2321 fprintf (dump_file
, "PRE: edge (%d,%d), ",
2323 INDEX_EDGE_SUCC_BB (edge_list
, e
)->index
);
2324 fprintf (dump_file
, "copy expression %d\n",
2325 expr
->bitmap_index
);
2328 update_ld_motion_stores (expr
);
2329 bitmap_set_bit (inserted
[e
], j
);
2331 gcse_create_count
++;
2338 sbitmap_vector_free (inserted
);
2342 /* Copy the result of EXPR->EXPR generated by INSN to EXPR->REACHING_REG.
2343 Given "old_reg <- expr" (INSN), instead of adding after it
2344 reaching_reg <- old_reg
2345 it's better to do the following:
2346 reaching_reg <- expr
2347 old_reg <- reaching_reg
2348 because this way copy propagation can discover additional PRE
2349 opportunities. But if this fails, we try the old way.
2350 When "expr" is a store, i.e.
2351 given "MEM <- old_reg", instead of adding after it
2352 reaching_reg <- old_reg
2353 it's better to add it before as follows:
2354 reaching_reg <- old_reg
2355 MEM <- reaching_reg. */
2358 pre_insert_copy_insn (struct expr
*expr
, rtx insn
)
2360 rtx reg
= expr
->reaching_reg
;
2361 int regno
= REGNO (reg
);
2362 int indx
= expr
->bitmap_index
;
2363 rtx pat
= PATTERN (insn
);
2364 rtx set
, first_set
, new_insn
;
2368 /* This block matches the logic in hash_scan_insn. */
2369 switch (GET_CODE (pat
))
2376 /* Search through the parallel looking for the set whose
2377 source was the expression that we're interested in. */
2378 first_set
= NULL_RTX
;
2380 for (i
= 0; i
< XVECLEN (pat
, 0); i
++)
2382 rtx x
= XVECEXP (pat
, 0, i
);
2383 if (GET_CODE (x
) == SET
)
2385 /* If the source was a REG_EQUAL or REG_EQUIV note, we
2386 may not find an equivalent expression, but in this
2387 case the PARALLEL will have a single set. */
2388 if (first_set
== NULL_RTX
)
2390 if (expr_equiv_p (SET_SRC (x
), expr
->expr
))
2398 gcc_assert (first_set
);
2399 if (set
== NULL_RTX
)
2407 if (REG_P (SET_DEST (set
)))
2409 old_reg
= SET_DEST (set
);
2410 /* Check if we can modify the set destination in the original insn. */
2411 if (validate_change (insn
, &SET_DEST (set
), reg
, 0))
2413 new_insn
= gen_move_insn (old_reg
, reg
);
2414 new_insn
= emit_insn_after (new_insn
, insn
);
2418 new_insn
= gen_move_insn (reg
, old_reg
);
2419 new_insn
= emit_insn_after (new_insn
, insn
);
2422 else /* This is possible only in case of a store to memory. */
2424 old_reg
= SET_SRC (set
);
2425 new_insn
= gen_move_insn (reg
, old_reg
);
2427 /* Check if we can modify the set source in the original insn. */
2428 if (validate_change (insn
, &SET_SRC (set
), reg
, 0))
2429 new_insn
= emit_insn_before (new_insn
, insn
);
2431 new_insn
= emit_insn_after (new_insn
, insn
);
2434 gcse_create_count
++;
2438 "PRE: bb %d, insn %d, copy expression %d in insn %d to reg %d\n",
2439 BLOCK_FOR_INSN (insn
)->index
, INSN_UID (new_insn
), indx
,
2440 INSN_UID (insn
), regno
);
2443 /* Copy available expressions that reach the redundant expression
2444 to `reaching_reg'. */
2447 pre_insert_copies (void)
2449 unsigned int i
, added_copy
;
2454 /* For each available expression in the table, copy the result to
2455 `reaching_reg' if the expression reaches a deleted one.
2457 ??? The current algorithm is rather brute force.
2458 Need to do some profiling. */
2460 for (i
= 0; i
< expr_hash_table
.size
; i
++)
2461 for (expr
= expr_hash_table
.table
[i
]; expr
; expr
= expr
->next_same_hash
)
2463 /* If the basic block isn't reachable, PPOUT will be TRUE. However,
2464 we don't want to insert a copy here because the expression may not
2465 really be redundant. So only insert an insn if the expression was
2466 deleted. This test also avoids further processing if the
2467 expression wasn't deleted anywhere. */
2468 if (expr
->reaching_reg
== NULL
)
2471 /* Set when we add a copy for that expression. */
2474 for (occr
= expr
->antic_occr
; occr
!= NULL
; occr
= occr
->next
)
2476 if (! occr
->deleted_p
)
2479 for (avail
= expr
->avail_occr
; avail
!= NULL
; avail
= avail
->next
)
2481 rtx insn
= avail
->insn
;
2483 /* No need to handle this one if handled already. */
2484 if (avail
->copied_p
)
2487 /* Don't handle this one if it's a redundant one. */
2488 if (INSN_DELETED_P (insn
))
2491 /* Or if the expression doesn't reach the deleted one. */
2492 if (! pre_expr_reaches_here_p (BLOCK_FOR_INSN (avail
->insn
),
2494 BLOCK_FOR_INSN (occr
->insn
)))
2499 /* Copy the result of avail to reaching_reg. */
2500 pre_insert_copy_insn (expr
, insn
);
2501 avail
->copied_p
= 1;
2506 update_ld_motion_stores (expr
);
2517 /* Increment number of sets and record set in DATA. */
2520 record_set_data (rtx dest
, const_rtx set
, void *data
)
2522 struct set_data
*s
= (struct set_data
*)data
;
2524 if (GET_CODE (set
) == SET
)
2526 /* We allow insns having multiple sets, where all but one are
2527 dead as single set insns. In the common case only a single
2528 set is present, so we want to avoid checking for REG_UNUSED
2529 notes unless necessary. */
2531 && find_reg_note (s
->insn
, REG_UNUSED
, SET_DEST (s
->set
))
2532 && !side_effects_p (s
->set
))
2537 /* Record this set. */
2541 else if (!find_reg_note (s
->insn
, REG_UNUSED
, dest
)
2542 || side_effects_p (set
))
2548 single_set_gcse (rtx insn
)
2553 gcc_assert (INSN_P (insn
));
2555 /* Optimize common case. */
2556 pattern
= PATTERN (insn
);
2557 if (GET_CODE (pattern
) == SET
)
2562 note_stores (pattern
, record_set_data
, &s
);
2564 /* Considered invariant insns have exactly one set. */
2565 gcc_assert (s
.nsets
== 1);
2569 /* Emit move from SRC to DEST noting the equivalence with expression computed
2573 gcse_emit_move_after (rtx dest
, rtx src
, rtx insn
)
2576 const_rtx set
= single_set_gcse (insn
);
2581 /* This should never fail since we're creating a reg->reg copy
2582 we've verified to be valid. */
2584 new_rtx
= emit_insn_after (gen_move_insn (dest
, src
), insn
);
2586 /* Note the equivalence for local CSE pass. Take the note from the old
2587 set if there was one. Otherwise record the SET_SRC from the old set
2588 unless DEST is also an operand of the SET_SRC. */
2589 set2
= single_set (new_rtx
);
2590 if (!set2
|| !rtx_equal_p (SET_DEST (set2
), dest
))
2592 if ((note
= find_reg_equal_equiv_note (insn
)))
2593 eqv
= XEXP (note
, 0);
2594 else if (! REG_P (dest
)
2595 || ! reg_mentioned_p (dest
, SET_SRC (set
)))
2596 eqv
= SET_SRC (set
);
2598 if (eqv
!= NULL_RTX
)
2599 set_unique_reg_note (new_rtx
, REG_EQUAL
, copy_insn_1 (eqv
));
2604 /* Delete redundant computations.
2605 Deletion is done by changing the insn to copy the `reaching_reg' of
2606 the expression into the result of the SET. It is left to later passes
2607 to propagate the copy or eliminate it.
2609 Return nonzero if a change is made. */
2620 for (i
= 0; i
< expr_hash_table
.size
; i
++)
2621 for (expr
= expr_hash_table
.table
[i
]; expr
; expr
= expr
->next_same_hash
)
2623 int indx
= expr
->bitmap_index
;
2625 /* We only need to search antic_occr since we require ANTLOC != 0. */
2626 for (occr
= expr
->antic_occr
; occr
!= NULL
; occr
= occr
->next
)
2628 rtx insn
= occr
->insn
;
2630 basic_block bb
= BLOCK_FOR_INSN (insn
);
2632 /* We only delete insns that have a single_set. */
2633 if (bitmap_bit_p (pre_delete_map
[bb
->index
], indx
)
2634 && (set
= single_set (insn
)) != 0
2635 && dbg_cnt (pre_insn
))
2637 /* Create a pseudo-reg to store the result of reaching
2638 expressions into. Get the mode for the new pseudo from
2639 the mode of the original destination pseudo. */
2640 if (expr
->reaching_reg
== NULL
)
2641 expr
->reaching_reg
= gen_reg_rtx_and_attrs (SET_DEST (set
));
2643 gcse_emit_move_after (SET_DEST (set
), expr
->reaching_reg
, insn
);
2645 occr
->deleted_p
= 1;
2652 "PRE: redundant insn %d (expression %d) in ",
2653 INSN_UID (insn
), indx
);
2654 fprintf (dump_file
, "bb %d, reaching reg is %d\n",
2655 bb
->index
, REGNO (expr
->reaching_reg
));
2664 /* Perform GCSE optimizations using PRE.
2665 This is called by one_pre_gcse_pass after all the dataflow analysis
2668 This is based on the original Morel-Renvoise paper Fred Chow's thesis, and
2669 lazy code motion from Knoop, Ruthing and Steffen as described in Advanced
2670 Compiler Design and Implementation.
2672 ??? A new pseudo reg is created to hold the reaching expression. The nice
2673 thing about the classical approach is that it would try to use an existing
2674 reg. If the register can't be adequately optimized [i.e. we introduce
2675 reload problems], one could add a pass here to propagate the new register
2678 ??? We don't handle single sets in PARALLELs because we're [currently] not
2679 able to copy the rest of the parallel when we insert copies to create full
2680 redundancies from partial redundancies. However, there's no reason why we
2681 can't handle PARALLELs in the cases where there are no partial
2685 pre_gcse (struct edge_list
*edge_list
)
2688 int did_insert
, changed
;
2689 struct expr
**index_map
;
2692 /* Compute a mapping from expression number (`bitmap_index') to
2693 hash table entry. */
2695 index_map
= XCNEWVEC (struct expr
*, expr_hash_table
.n_elems
);
2696 for (i
= 0; i
< expr_hash_table
.size
; i
++)
2697 for (expr
= expr_hash_table
.table
[i
]; expr
; expr
= expr
->next_same_hash
)
2698 index_map
[expr
->bitmap_index
] = expr
;
2700 /* Delete the redundant insns first so that
2701 - we know what register to use for the new insns and for the other
2702 ones with reaching expressions
2703 - we know which insns are redundant when we go to create copies */
2705 changed
= pre_delete ();
2706 did_insert
= pre_edge_insert (edge_list
, index_map
);
2708 /* In other places with reaching expressions, copy the expression to the
2709 specially allocated pseudo-reg that reaches the redundant expr. */
2710 pre_insert_copies ();
2713 commit_edge_insertions ();
2721 /* Top level routine to perform one PRE GCSE pass.
2723 Return nonzero if a change was made. */
2726 one_pre_gcse_pass (void)
2730 gcse_subst_count
= 0;
2731 gcse_create_count
= 0;
2733 /* Return if there's nothing to do, or it is too expensive. */
2734 if (n_basic_blocks_for_fn (cfun
) <= NUM_FIXED_BLOCKS
+ 1
2735 || is_too_expensive (_("PRE disabled")))
2738 /* We need alias. */
2739 init_alias_analysis ();
2742 gcc_obstack_init (&gcse_obstack
);
2745 alloc_hash_table (&expr_hash_table
);
2746 add_noreturn_fake_exit_edges ();
2748 compute_ld_motion_mems ();
2750 compute_hash_table (&expr_hash_table
);
2752 trim_ld_motion_mems ();
2754 dump_hash_table (dump_file
, "Expression", &expr_hash_table
);
2756 if (expr_hash_table
.n_elems
> 0)
2758 struct edge_list
*edge_list
;
2759 alloc_pre_mem (last_basic_block_for_fn (cfun
), expr_hash_table
.n_elems
);
2760 edge_list
= compute_pre_data ();
2761 changed
|= pre_gcse (edge_list
);
2762 free_edge_list (edge_list
);
2767 free_ld_motion_mems ();
2768 remove_fake_exit_edges ();
2769 free_hash_table (&expr_hash_table
);
2772 obstack_free (&gcse_obstack
, NULL
);
2774 /* We are finished with alias. */
2775 end_alias_analysis ();
2779 fprintf (dump_file
, "PRE GCSE of %s, %d basic blocks, %d bytes needed, ",
2780 current_function_name (), n_basic_blocks_for_fn (cfun
),
2782 fprintf (dump_file
, "%d substs, %d insns created\n",
2783 gcse_subst_count
, gcse_create_count
);
2789 /* If X contains any LABEL_REF's, add REG_LABEL_OPERAND notes for them
2790 to INSN. If such notes are added to an insn which references a
2791 CODE_LABEL, the LABEL_NUSES count is incremented. We have to add
2792 that note, because the following loop optimization pass requires
2795 /* ??? If there was a jump optimization pass after gcse and before loop,
2796 then we would not need to do this here, because jump would add the
2797 necessary REG_LABEL_OPERAND and REG_LABEL_TARGET notes. */
2800 add_label_notes (rtx x
, rtx insn
)
2802 enum rtx_code code
= GET_CODE (x
);
2806 if (code
== LABEL_REF
&& !LABEL_REF_NONLOCAL_P (x
))
2808 /* This code used to ignore labels that referred to dispatch tables to
2809 avoid flow generating (slightly) worse code.
2811 We no longer ignore such label references (see LABEL_REF handling in
2812 mark_jump_label for additional information). */
2814 /* There's no reason for current users to emit jump-insns with
2815 such a LABEL_REF, so we don't have to handle REG_LABEL_TARGET
2817 gcc_assert (!JUMP_P (insn
));
2818 add_reg_note (insn
, REG_LABEL_OPERAND
, XEXP (x
, 0));
2820 if (LABEL_P (XEXP (x
, 0)))
2821 LABEL_NUSES (XEXP (x
, 0))++;
2826 for (i
= GET_RTX_LENGTH (code
) - 1, fmt
= GET_RTX_FORMAT (code
); i
>= 0; i
--)
2829 add_label_notes (XEXP (x
, i
), insn
);
2830 else if (fmt
[i
] == 'E')
2831 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
2832 add_label_notes (XVECEXP (x
, i
, j
), insn
);
2836 /* Code Hoisting variables and subroutines. */
2838 /* Very busy expressions. */
2839 static sbitmap
*hoist_vbein
;
2840 static sbitmap
*hoist_vbeout
;
2842 /* ??? We could compute post dominators and run this algorithm in
2843 reverse to perform tail merging, doing so would probably be
2844 more effective than the tail merging code in jump.c.
2846 It's unclear if tail merging could be run in parallel with
2847 code hoisting. It would be nice. */
2849 /* Allocate vars used for code hoisting analysis. */
2852 alloc_code_hoist_mem (int n_blocks
, int n_exprs
)
2854 antloc
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
2855 transp
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
2856 comp
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
2858 hoist_vbein
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
2859 hoist_vbeout
= sbitmap_vector_alloc (n_blocks
, n_exprs
);
2862 /* Free vars used for code hoisting analysis. */
2865 free_code_hoist_mem (void)
2867 sbitmap_vector_free (antloc
);
2868 sbitmap_vector_free (transp
);
2869 sbitmap_vector_free (comp
);
2871 sbitmap_vector_free (hoist_vbein
);
2872 sbitmap_vector_free (hoist_vbeout
);
2874 free_dominance_info (CDI_DOMINATORS
);
2877 /* Compute the very busy expressions at entry/exit from each block.
2879 An expression is very busy if all paths from a given point
2880 compute the expression. */
2883 compute_code_hoist_vbeinout (void)
2885 int changed
, passes
;
2888 bitmap_vector_clear (hoist_vbeout
, last_basic_block_for_fn (cfun
));
2889 bitmap_vector_clear (hoist_vbein
, last_basic_block_for_fn (cfun
));
2898 /* We scan the blocks in the reverse order to speed up
2900 FOR_EACH_BB_REVERSE_FN (bb
, cfun
)
2902 if (bb
->next_bb
!= EXIT_BLOCK_PTR_FOR_FN (cfun
))
2904 bitmap_intersection_of_succs (hoist_vbeout
[bb
->index
],
2907 /* Include expressions in VBEout that are calculated
2908 in BB and available at its end. */
2909 bitmap_ior (hoist_vbeout
[bb
->index
],
2910 hoist_vbeout
[bb
->index
], comp
[bb
->index
]);
2913 changed
|= bitmap_or_and (hoist_vbein
[bb
->index
],
2915 hoist_vbeout
[bb
->index
],
2924 fprintf (dump_file
, "hoisting vbeinout computation: %d passes\n", passes
);
2926 FOR_EACH_BB_FN (bb
, cfun
)
2928 fprintf (dump_file
, "vbein (%d): ", bb
->index
);
2929 dump_bitmap_file (dump_file
, hoist_vbein
[bb
->index
]);
2930 fprintf (dump_file
, "vbeout(%d): ", bb
->index
);
2931 dump_bitmap_file (dump_file
, hoist_vbeout
[bb
->index
]);
2936 /* Top level routine to do the dataflow analysis needed by code hoisting. */
2939 compute_code_hoist_data (void)
2941 compute_local_properties (transp
, comp
, antloc
, &expr_hash_table
);
2942 prune_expressions (false);
2943 compute_code_hoist_vbeinout ();
2944 calculate_dominance_info (CDI_DOMINATORS
);
2946 fprintf (dump_file
, "\n");
2949 /* Update register pressure for BB when hoisting an expression from
2950 instruction FROM, if live ranges of inputs are shrunk. Also
2951 maintain live_in information if live range of register referred
2954 Return 0 if register pressure doesn't change, otherwise return
2955 the number by which register pressure is decreased.
2957 NOTE: Register pressure won't be increased in this function. */
2960 update_bb_reg_pressure (basic_block bb
, rtx from
)
2963 basic_block succ_bb
;
2967 int decreased_pressure
= 0;
2969 enum reg_class pressure_class
;
2971 FOR_EACH_INSN_USE (use
, from
)
2973 dreg
= DF_REF_REAL_REG (use
);
2974 /* The live range of register is shrunk only if it isn't:
2975 1. referred on any path from the end of this block to EXIT, or
2976 2. referred by insns other than FROM in this block. */
2977 FOR_EACH_EDGE (succ
, ei
, bb
->succs
)
2979 succ_bb
= succ
->dest
;
2980 if (succ_bb
== EXIT_BLOCK_PTR_FOR_FN (cfun
))
2983 if (bitmap_bit_p (BB_DATA (succ_bb
)->live_in
, REGNO (dreg
)))
2989 op_ref
= DF_REG_USE_CHAIN (REGNO (dreg
));
2990 for (; op_ref
; op_ref
= DF_REF_NEXT_REG (op_ref
))
2992 if (!DF_REF_INSN_INFO (op_ref
))
2995 insn
= DF_REF_INSN (op_ref
);
2996 if (BLOCK_FOR_INSN (insn
) == bb
2997 && NONDEBUG_INSN_P (insn
) && insn
!= from
)
3001 pressure_class
= get_regno_pressure_class (REGNO (dreg
), &nregs
);
3002 /* Decrease register pressure and update live_in information for
3004 if (!op_ref
&& pressure_class
!= NO_REGS
)
3006 decreased_pressure
+= nregs
;
3007 BB_DATA (bb
)->max_reg_pressure
[pressure_class
] -= nregs
;
3008 bitmap_clear_bit (BB_DATA (bb
)->live_in
, REGNO (dreg
));
3011 return decreased_pressure
;
3014 /* Determine if the expression EXPR should be hoisted to EXPR_BB up in
3015 flow graph, if it can reach BB unimpared. Stop the search if the
3016 expression would need to be moved more than DISTANCE instructions.
3018 DISTANCE is the number of instructions through which EXPR can be
3019 hoisted up in flow graph.
3021 BB_SIZE points to an array which contains the number of instructions
3022 for each basic block.
3024 PRESSURE_CLASS and NREGS are register class and number of hard registers
3027 HOISTED_BBS points to a bitmap indicating basic blocks through which
3030 FROM is the instruction from which EXPR is hoisted.
3032 It's unclear exactly what Muchnick meant by "unimpared". It seems
3033 to me that the expression must either be computed or transparent in
3034 *every* block in the path(s) from EXPR_BB to BB. Any other definition
3035 would allow the expression to be hoisted out of loops, even if
3036 the expression wasn't a loop invariant.
3038 Contrast this to reachability for PRE where an expression is
3039 considered reachable if *any* path reaches instead of *all*
3043 should_hoist_expr_to_dom (basic_block expr_bb
, struct expr
*expr
,
3044 basic_block bb
, sbitmap visited
, int distance
,
3045 int *bb_size
, enum reg_class pressure_class
,
3046 int *nregs
, bitmap hoisted_bbs
, rtx from
)
3051 sbitmap_iterator sbi
;
3052 int visited_allocated_locally
= 0;
3053 int decreased_pressure
= 0;
3055 if (flag_ira_hoist_pressure
)
3057 /* Record old information of basic block BB when it is visited
3058 at the first time. */
3059 if (!bitmap_bit_p (hoisted_bbs
, bb
->index
))
3061 struct bb_data
*data
= BB_DATA (bb
);
3062 bitmap_copy (data
->backup
, data
->live_in
);
3063 data
->old_pressure
= data
->max_reg_pressure
[pressure_class
];
3065 decreased_pressure
= update_bb_reg_pressure (bb
, from
);
3067 /* Terminate the search if distance, for which EXPR is allowed to move,
3071 if (flag_ira_hoist_pressure
)
3073 /* Prefer to hoist EXPR if register pressure is decreased. */
3074 if (decreased_pressure
> *nregs
)
3075 distance
+= bb_size
[bb
->index
];
3076 /* Let EXPR be hoisted through basic block at no cost if one
3077 of following conditions is satisfied:
3079 1. The basic block has low register pressure.
3080 2. Register pressure won't be increases after hoisting EXPR.
3082 Constant expressions is handled conservatively, because
3083 hoisting constant expression aggressively results in worse
3084 code. This decision is made by the observation of CSiBE
3085 on ARM target, while it has no obvious effect on other
3086 targets like x86, x86_64, mips and powerpc. */
3087 else if (CONST_INT_P (expr
->expr
)
3088 || (BB_DATA (bb
)->max_reg_pressure
[pressure_class
]
3089 >= ira_class_hard_regs_num
[pressure_class
]
3090 && decreased_pressure
< *nregs
))
3091 distance
-= bb_size
[bb
->index
];
3094 distance
-= bb_size
[bb
->index
];
3100 gcc_assert (distance
== 0);
3102 if (visited
== NULL
)
3104 visited_allocated_locally
= 1;
3105 visited
= sbitmap_alloc (last_basic_block_for_fn (cfun
));
3106 bitmap_clear (visited
);
3109 FOR_EACH_EDGE (pred
, ei
, bb
->preds
)
3111 basic_block pred_bb
= pred
->src
;
3113 if (pred
->src
== ENTRY_BLOCK_PTR_FOR_FN (cfun
))
3115 else if (pred_bb
== expr_bb
)
3117 else if (bitmap_bit_p (visited
, pred_bb
->index
))
3119 else if (! bitmap_bit_p (transp
[pred_bb
->index
], expr
->bitmap_index
))
3124 bitmap_set_bit (visited
, pred_bb
->index
);
3125 if (! should_hoist_expr_to_dom (expr_bb
, expr
, pred_bb
,
3126 visited
, distance
, bb_size
,
3127 pressure_class
, nregs
,
3132 if (visited_allocated_locally
)
3134 /* If EXPR can be hoisted to expr_bb, record basic blocks through
3135 which EXPR is hoisted in hoisted_bbs. */
3136 if (flag_ira_hoist_pressure
&& !pred
)
3138 /* Record the basic block from which EXPR is hoisted. */
3139 bitmap_set_bit (visited
, bb
->index
);
3140 EXECUTE_IF_SET_IN_BITMAP (visited
, 0, i
, sbi
)
3141 bitmap_set_bit (hoisted_bbs
, i
);
3143 sbitmap_free (visited
);
3146 return (pred
== NULL
);
3149 /* Find occurrence in BB. */
3151 static struct occr
*
3152 find_occr_in_bb (struct occr
*occr
, basic_block bb
)
3154 /* Find the right occurrence of this expression. */
3155 while (occr
&& BLOCK_FOR_INSN (occr
->insn
) != bb
)
3161 /* Actually perform code hoisting.
3163 The code hoisting pass can hoist multiple computations of the same
3164 expression along dominated path to a dominating basic block, like
3165 from b2/b3 to b1 as depicted below:
3175 Unfortunately code hoisting generally extends the live range of an
3176 output pseudo register, which increases register pressure and hurts
3177 register allocation. To address this issue, an attribute MAX_DISTANCE
3178 is computed and attached to each expression. The attribute is computed
3179 from rtx cost of the corresponding expression and it's used to control
3180 how long the expression can be hoisted up in flow graph. As the
3181 expression is hoisted up in flow graph, GCC decreases its DISTANCE
3182 and stops the hoist if DISTANCE reaches 0. Code hoisting can decrease
3183 register pressure if live ranges of inputs are shrunk.
3185 Option "-fira-hoist-pressure" implements register pressure directed
3186 hoist based on upper method. The rationale is:
3187 1. Calculate register pressure for each basic block by reusing IRA
3189 2. When expression is hoisted through one basic block, GCC checks
3190 the change of live ranges for inputs/output. The basic block's
3191 register pressure will be increased because of extended live
3192 range of output. However, register pressure will be decreased
3193 if the live ranges of inputs are shrunk.
3194 3. After knowing how hoisting affects register pressure, GCC prefers
3195 to hoist the expression if it can decrease register pressure, by
3196 increasing DISTANCE of the corresponding expression.
3197 4. If hoisting the expression increases register pressure, GCC checks
3198 register pressure of the basic block and decrease DISTANCE only if
3199 the register pressure is high. In other words, expression will be
3200 hoisted through at no cost if the basic block has low register
3202 5. Update register pressure information for basic blocks through
3203 which expression is hoisted. */
3208 basic_block bb
, dominated
;
3209 vec
<basic_block
> dom_tree_walk
;
3210 unsigned int dom_tree_walk_index
;
3211 vec
<basic_block
> domby
;
3212 unsigned int i
, j
, k
;
3213 struct expr
**index_map
;
3218 struct bb_data
*data
;
3219 /* Basic blocks that have occurrences reachable from BB. */
3221 /* Basic blocks through which expr is hoisted. */
3222 bitmap hoisted_bbs
= NULL
;
3225 /* Compute a mapping from expression number (`bitmap_index') to
3226 hash table entry. */
3228 index_map
= XCNEWVEC (struct expr
*, expr_hash_table
.n_elems
);
3229 for (i
= 0; i
< expr_hash_table
.size
; i
++)
3230 for (expr
= expr_hash_table
.table
[i
]; expr
; expr
= expr
->next_same_hash
)
3231 index_map
[expr
->bitmap_index
] = expr
;
3233 /* Calculate sizes of basic blocks and note how far
3234 each instruction is from the start of its block. We then use this
3235 data to restrict distance an expression can travel. */
3237 to_bb_head
= XCNEWVEC (int, get_max_uid ());
3238 bb_size
= XCNEWVEC (int, last_basic_block_for_fn (cfun
));
3240 FOR_EACH_BB_FN (bb
, cfun
)
3246 FOR_BB_INSNS (bb
, insn
)
3248 /* Don't count debug instructions to avoid them affecting
3249 decision choices. */
3250 if (NONDEBUG_INSN_P (insn
))
3251 to_bb_head
[INSN_UID (insn
)] = to_head
++;
3254 bb_size
[bb
->index
] = to_head
;
3257 gcc_assert (EDGE_COUNT (ENTRY_BLOCK_PTR_FOR_FN (cfun
)->succs
) == 1
3258 && (EDGE_SUCC (ENTRY_BLOCK_PTR_FOR_FN (cfun
), 0)->dest
3259 == ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
));
3261 from_bbs
= BITMAP_ALLOC (NULL
);
3262 if (flag_ira_hoist_pressure
)
3263 hoisted_bbs
= BITMAP_ALLOC (NULL
);
3265 dom_tree_walk
= get_all_dominated_blocks (CDI_DOMINATORS
,
3266 ENTRY_BLOCK_PTR_FOR_FN (cfun
)->next_bb
);
3268 /* Walk over each basic block looking for potentially hoistable
3269 expressions, nothing gets hoisted from the entry block. */
3270 FOR_EACH_VEC_ELT (dom_tree_walk
, dom_tree_walk_index
, bb
)
3272 domby
= get_dominated_to_depth (CDI_DOMINATORS
, bb
, MAX_HOIST_DEPTH
);
3274 if (domby
.length () == 0)
3277 /* Examine each expression that is very busy at the exit of this
3278 block. These are the potentially hoistable expressions. */
3279 for (i
= 0; i
< SBITMAP_SIZE (hoist_vbeout
[bb
->index
]); i
++)
3281 if (bitmap_bit_p (hoist_vbeout
[bb
->index
], i
))
3284 enum reg_class pressure_class
= NO_REGS
;
3285 /* Current expression. */
3286 struct expr
*expr
= index_map
[i
];
3287 /* Number of occurrences of EXPR that can be hoisted to BB. */
3289 /* Occurrences reachable from BB. */
3290 vec
<occr_t
> occrs_to_hoist
= vNULL
;
3291 /* We want to insert the expression into BB only once, so
3292 note when we've inserted it. */
3293 int insn_inserted_p
;
3296 /* If an expression is computed in BB and is available at end of
3297 BB, hoist all occurrences dominated by BB to BB. */
3298 if (bitmap_bit_p (comp
[bb
->index
], i
))
3300 occr
= find_occr_in_bb (expr
->antic_occr
, bb
);
3304 /* An occurrence might've been already deleted
3305 while processing a dominator of BB. */
3306 if (!occr
->deleted_p
)
3308 gcc_assert (NONDEBUG_INSN_P (occr
->insn
));
3316 /* We've found a potentially hoistable expression, now
3317 we look at every block BB dominates to see if it
3318 computes the expression. */
3319 FOR_EACH_VEC_ELT (domby
, j
, dominated
)
3323 /* Ignore self dominance. */
3324 if (bb
== dominated
)
3326 /* We've found a dominated block, now see if it computes
3327 the busy expression and whether or not moving that
3328 expression to the "beginning" of that block is safe. */
3329 if (!bitmap_bit_p (antloc
[dominated
->index
], i
))
3332 occr
= find_occr_in_bb (expr
->antic_occr
, dominated
);
3335 /* An occurrence might've been already deleted
3336 while processing a dominator of BB. */
3337 if (occr
->deleted_p
)
3339 gcc_assert (NONDEBUG_INSN_P (occr
->insn
));
3341 max_distance
= expr
->max_distance
;
3342 if (max_distance
> 0)
3343 /* Adjust MAX_DISTANCE to account for the fact that
3344 OCCR won't have to travel all of DOMINATED, but
3346 max_distance
+= (bb_size
[dominated
->index
]
3347 - to_bb_head
[INSN_UID (occr
->insn
)]);
3349 pressure_class
= get_pressure_class_and_nregs (occr
->insn
,
3352 /* Note if the expression should be hoisted from the dominated
3353 block to BB if it can reach DOMINATED unimpared.
3355 Keep track of how many times this expression is hoistable
3356 from a dominated block into BB. */
3357 if (should_hoist_expr_to_dom (bb
, expr
, dominated
, NULL
,
3358 max_distance
, bb_size
,
3359 pressure_class
, &nregs
,
3360 hoisted_bbs
, occr
->insn
))
3363 occrs_to_hoist
.safe_push (occr
);
3364 bitmap_set_bit (from_bbs
, dominated
->index
);
3368 /* If we found more than one hoistable occurrence of this
3369 expression, then note it in the vector of expressions to
3370 hoist. It makes no sense to hoist things which are computed
3371 in only one BB, and doing so tends to pessimize register
3372 allocation. One could increase this value to try harder
3373 to avoid any possible code expansion due to register
3374 allocation issues; however experiments have shown that
3375 the vast majority of hoistable expressions are only movable
3376 from two successors, so raising this threshold is likely
3377 to nullify any benefit we get from code hoisting. */
3378 if (hoistable
> 1 && dbg_cnt (hoist_insn
))
3380 /* If (hoistable != vec::length), then there is
3381 an occurrence of EXPR in BB itself. Don't waste
3382 time looking for LCA in this case. */
3383 if ((unsigned) hoistable
== occrs_to_hoist
.length ())
3387 lca
= nearest_common_dominator_for_set (CDI_DOMINATORS
,
3390 /* Punt, it's better to hoist these occurrences to
3392 occrs_to_hoist
.release ();
3396 /* Punt, no point hoisting a single occurrence. */
3397 occrs_to_hoist
.release ();
3399 if (flag_ira_hoist_pressure
3400 && !occrs_to_hoist
.is_empty ())
3402 /* Increase register pressure of basic blocks to which
3403 expr is hoisted because of extended live range of
3405 data
= BB_DATA (bb
);
3406 data
->max_reg_pressure
[pressure_class
] += nregs
;
3407 EXECUTE_IF_SET_IN_BITMAP (hoisted_bbs
, 0, k
, bi
)
3409 data
= BB_DATA (BASIC_BLOCK_FOR_FN (cfun
, k
));
3410 data
->max_reg_pressure
[pressure_class
] += nregs
;
3413 else if (flag_ira_hoist_pressure
)
3415 /* Restore register pressure and live_in info for basic
3416 blocks recorded in hoisted_bbs when expr will not be
3418 EXECUTE_IF_SET_IN_BITMAP (hoisted_bbs
, 0, k
, bi
)
3420 data
= BB_DATA (BASIC_BLOCK_FOR_FN (cfun
, k
));
3421 bitmap_copy (data
->live_in
, data
->backup
);
3422 data
->max_reg_pressure
[pressure_class
]
3423 = data
->old_pressure
;
3427 if (flag_ira_hoist_pressure
)
3428 bitmap_clear (hoisted_bbs
);
3430 insn_inserted_p
= 0;
3432 /* Walk through occurrences of I'th expressions we want
3433 to hoist to BB and make the transformations. */
3434 FOR_EACH_VEC_ELT (occrs_to_hoist
, j
, occr
)
3439 gcc_assert (!occr
->deleted_p
);
3442 set
= single_set_gcse (insn
);
3444 /* Create a pseudo-reg to store the result of reaching
3445 expressions into. Get the mode for the new pseudo
3446 from the mode of the original destination pseudo.
3448 It is important to use new pseudos whenever we
3449 emit a set. This will allow reload to use
3450 rematerialization for such registers. */
3451 if (!insn_inserted_p
)
3453 = gen_reg_rtx_and_attrs (SET_DEST (set
));
3455 gcse_emit_move_after (SET_DEST (set
), expr
->reaching_reg
,
3458 occr
->deleted_p
= 1;
3462 if (!insn_inserted_p
)
3464 insert_insn_end_basic_block (expr
, bb
);
3465 insn_inserted_p
= 1;
3469 occrs_to_hoist
.release ();
3470 bitmap_clear (from_bbs
);
3476 dom_tree_walk
.release ();
3477 BITMAP_FREE (from_bbs
);
3478 if (flag_ira_hoist_pressure
)
3479 BITMAP_FREE (hoisted_bbs
);
3488 /* Return pressure class and number of needed hard registers (through
3489 *NREGS) of register REGNO. */
3490 static enum reg_class
3491 get_regno_pressure_class (int regno
, int *nregs
)
3493 if (regno
>= FIRST_PSEUDO_REGISTER
)
3495 enum reg_class pressure_class
;
3497 pressure_class
= reg_allocno_class (regno
);
3498 pressure_class
= ira_pressure_class_translate
[pressure_class
];
3500 = ira_reg_class_max_nregs
[pressure_class
][PSEUDO_REGNO_MODE (regno
)];
3501 return pressure_class
;
3503 else if (! TEST_HARD_REG_BIT (ira_no_alloc_regs
, regno
)
3504 && ! TEST_HARD_REG_BIT (eliminable_regset
, regno
))
3507 return ira_pressure_class_translate
[REGNO_REG_CLASS (regno
)];
3516 /* Return pressure class and number of hard registers (through *NREGS)
3517 for destination of INSN. */
3518 static enum reg_class
3519 get_pressure_class_and_nregs (rtx insn
, int *nregs
)
3522 enum reg_class pressure_class
;
3523 const_rtx set
= single_set_gcse (insn
);
3525 reg
= SET_DEST (set
);
3526 if (GET_CODE (reg
) == SUBREG
)
3527 reg
= SUBREG_REG (reg
);
3531 pressure_class
= NO_REGS
;
3535 gcc_assert (REG_P (reg
));
3536 pressure_class
= reg_allocno_class (REGNO (reg
));
3537 pressure_class
= ira_pressure_class_translate
[pressure_class
];
3539 = ira_reg_class_max_nregs
[pressure_class
][GET_MODE (SET_SRC (set
))];
3541 return pressure_class
;
3544 /* Increase (if INCR_P) or decrease current register pressure for
3547 change_pressure (int regno
, bool incr_p
)
3550 enum reg_class pressure_class
;
3552 pressure_class
= get_regno_pressure_class (regno
, &nregs
);
3554 curr_reg_pressure
[pressure_class
] -= nregs
;
3557 curr_reg_pressure
[pressure_class
] += nregs
;
3558 if (BB_DATA (curr_bb
)->max_reg_pressure
[pressure_class
]
3559 < curr_reg_pressure
[pressure_class
])
3560 BB_DATA (curr_bb
)->max_reg_pressure
[pressure_class
]
3561 = curr_reg_pressure
[pressure_class
];
3565 /* Calculate register pressure for each basic block by walking insns
3566 from last to first. */
3568 calculate_bb_reg_pressure (void)
3574 bitmap curr_regs_live
;
3578 ira_setup_eliminable_regset ();
3579 curr_regs_live
= BITMAP_ALLOC (®_obstack
);
3580 FOR_EACH_BB_FN (bb
, cfun
)
3583 BB_DATA (bb
)->live_in
= BITMAP_ALLOC (NULL
);
3584 BB_DATA (bb
)->backup
= BITMAP_ALLOC (NULL
);
3585 bitmap_copy (BB_DATA (bb
)->live_in
, df_get_live_in (bb
));
3586 bitmap_copy (curr_regs_live
, df_get_live_out (bb
));
3587 for (i
= 0; i
< ira_pressure_classes_num
; i
++)
3588 curr_reg_pressure
[ira_pressure_classes
[i
]] = 0;
3589 EXECUTE_IF_SET_IN_BITMAP (curr_regs_live
, 0, j
, bi
)
3590 change_pressure (j
, true);
3592 FOR_BB_INSNS_REVERSE (bb
, insn
)
3598 if (! NONDEBUG_INSN_P (insn
))
3601 FOR_EACH_INSN_DEF (def
, insn
)
3603 dreg
= DF_REF_REAL_REG (def
);
3604 gcc_assert (REG_P (dreg
));
3605 regno
= REGNO (dreg
);
3606 if (!(DF_REF_FLAGS (def
)
3607 & (DF_REF_PARTIAL
| DF_REF_CONDITIONAL
)))
3609 if (bitmap_clear_bit (curr_regs_live
, regno
))
3610 change_pressure (regno
, false);
3614 FOR_EACH_INSN_USE (use
, insn
)
3616 dreg
= DF_REF_REAL_REG (use
);
3617 gcc_assert (REG_P (dreg
));
3618 regno
= REGNO (dreg
);
3619 if (bitmap_set_bit (curr_regs_live
, regno
))
3620 change_pressure (regno
, true);
3624 BITMAP_FREE (curr_regs_live
);
3626 if (dump_file
== NULL
)
3629 fprintf (dump_file
, "\nRegister Pressure: \n");
3630 FOR_EACH_BB_FN (bb
, cfun
)
3632 fprintf (dump_file
, " Basic block %d: \n", bb
->index
);
3633 for (i
= 0; (int) i
< ira_pressure_classes_num
; i
++)
3635 enum reg_class pressure_class
;
3637 pressure_class
= ira_pressure_classes
[i
];
3638 if (BB_DATA (bb
)->max_reg_pressure
[pressure_class
] == 0)
3641 fprintf (dump_file
, " %s=%d\n", reg_class_names
[pressure_class
],
3642 BB_DATA (bb
)->max_reg_pressure
[pressure_class
]);
3645 fprintf (dump_file
, "\n");
3648 /* Top level routine to perform one code hoisting (aka unification) pass
3650 Return nonzero if a change was made. */
3653 one_code_hoisting_pass (void)
3657 gcse_subst_count
= 0;
3658 gcse_create_count
= 0;
3660 /* Return if there's nothing to do, or it is too expensive. */
3661 if (n_basic_blocks_for_fn (cfun
) <= NUM_FIXED_BLOCKS
+ 1
3662 || is_too_expensive (_("GCSE disabled")))
3665 doing_code_hoisting_p
= true;
3667 /* Calculate register pressure for each basic block. */
3668 if (flag_ira_hoist_pressure
)
3670 regstat_init_n_sets_and_refs ();
3671 ira_set_pseudo_classes (false, dump_file
);
3672 alloc_aux_for_blocks (sizeof (struct bb_data
));
3673 calculate_bb_reg_pressure ();
3674 regstat_free_n_sets_and_refs ();
3677 /* We need alias. */
3678 init_alias_analysis ();
3681 gcc_obstack_init (&gcse_obstack
);
3684 alloc_hash_table (&expr_hash_table
);
3685 compute_hash_table (&expr_hash_table
);
3687 dump_hash_table (dump_file
, "Code Hosting Expressions", &expr_hash_table
);
3689 if (expr_hash_table
.n_elems
> 0)
3691 alloc_code_hoist_mem (last_basic_block_for_fn (cfun
),
3692 expr_hash_table
.n_elems
);
3693 compute_code_hoist_data ();
3694 changed
= hoist_code ();
3695 free_code_hoist_mem ();
3698 if (flag_ira_hoist_pressure
)
3700 free_aux_for_blocks ();
3703 free_hash_table (&expr_hash_table
);
3705 obstack_free (&gcse_obstack
, NULL
);
3707 /* We are finished with alias. */
3708 end_alias_analysis ();
3712 fprintf (dump_file
, "HOIST of %s, %d basic blocks, %d bytes needed, ",
3713 current_function_name (), n_basic_blocks_for_fn (cfun
),
3715 fprintf (dump_file
, "%d substs, %d insns created\n",
3716 gcse_subst_count
, gcse_create_count
);
3719 doing_code_hoisting_p
= false;
3724 /* Here we provide the things required to do store motion towards the exit.
3725 In order for this to be effective, gcse also needed to be taught how to
3726 move a load when it is killed only by a store to itself.
3731 void foo(float scale)
3733 for (i=0; i<10; i++)
3737 'i' is both loaded and stored to in the loop. Normally, gcse cannot move
3738 the load out since its live around the loop, and stored at the bottom
3741 The 'Load Motion' referred to and implemented in this file is
3742 an enhancement to gcse which when using edge based LCM, recognizes
3743 this situation and allows gcse to move the load out of the loop.
3745 Once gcse has hoisted the load, store motion can then push this
3746 load towards the exit, and we end up with no loads or stores of 'i'
3749 /* This will search the ldst list for a matching expression. If it
3750 doesn't find one, we create one and initialize it. */
3752 static struct ls_expr
*
3755 int do_not_record_p
= 0;
3756 struct ls_expr
* ptr
;
3761 hash
= hash_rtx (x
, GET_MODE (x
), &do_not_record_p
,
3762 NULL
, /*have_reg_qty=*/false);
3765 slot
= pre_ldst_table
->find_slot_with_hash (&e
, hash
, INSERT
);
3769 ptr
= XNEW (struct ls_expr
);
3771 ptr
->next
= pre_ldst_mems
;
3774 ptr
->pattern_regs
= NULL_RTX
;
3775 ptr
->loads
= NULL_RTX
;
3776 ptr
->stores
= NULL_RTX
;
3777 ptr
->reaching_reg
= NULL_RTX
;
3780 ptr
->hash_index
= hash
;
3781 pre_ldst_mems
= ptr
;
3787 /* Free up an individual ldst entry. */
3790 free_ldst_entry (struct ls_expr
* ptr
)
3792 free_INSN_LIST_list (& ptr
->loads
);
3793 free_INSN_LIST_list (& ptr
->stores
);
3798 /* Free up all memory associated with the ldst list. */
3801 free_ld_motion_mems (void)
3803 delete pre_ldst_table
;
3804 pre_ldst_table
= NULL
;
3806 while (pre_ldst_mems
)
3808 struct ls_expr
* tmp
= pre_ldst_mems
;
3810 pre_ldst_mems
= pre_ldst_mems
->next
;
3812 free_ldst_entry (tmp
);
3815 pre_ldst_mems
= NULL
;
3818 /* Dump debugging info about the ldst list. */
3821 print_ldst_list (FILE * file
)
3823 struct ls_expr
* ptr
;
3825 fprintf (file
, "LDST list: \n");
3827 for (ptr
= pre_ldst_mems
; ptr
!= NULL
; ptr
= ptr
->next
)
3829 fprintf (file
, " Pattern (%3d): ", ptr
->index
);
3831 print_rtl (file
, ptr
->pattern
);
3833 fprintf (file
, "\n Loads : ");
3836 print_rtl (file
, ptr
->loads
);
3838 fprintf (file
, "(nil)");
3840 fprintf (file
, "\n Stores : ");
3843 print_rtl (file
, ptr
->stores
);
3845 fprintf (file
, "(nil)");
3847 fprintf (file
, "\n\n");
3850 fprintf (file
, "\n");
3853 /* Returns 1 if X is in the list of ldst only expressions. */
3855 static struct ls_expr
*
3856 find_rtx_in_ldst (rtx x
)
3860 if (!pre_ldst_table
)
3863 slot
= pre_ldst_table
->find_slot (&e
, NO_INSERT
);
3864 if (!slot
|| (*slot
)->invalid
)
3869 /* Load Motion for loads which only kill themselves. */
3871 /* Return true if x, a MEM, is a simple access with no side effects.
3872 These are the types of loads we consider for the ld_motion list,
3873 otherwise we let the usual aliasing take care of it. */
3876 simple_mem (const_rtx x
)
3878 if (MEM_VOLATILE_P (x
))
3881 if (GET_MODE (x
) == BLKmode
)
3884 /* If we are handling exceptions, we must be careful with memory references
3885 that may trap. If we are not, the behavior is undefined, so we may just
3887 if (cfun
->can_throw_non_call_exceptions
&& may_trap_p (x
))
3890 if (side_effects_p (x
))
3893 /* Do not consider function arguments passed on stack. */
3894 if (reg_mentioned_p (stack_pointer_rtx
, x
))
3897 if (flag_float_store
&& FLOAT_MODE_P (GET_MODE (x
)))
3903 /* Make sure there isn't a buried reference in this pattern anywhere.
3904 If there is, invalidate the entry for it since we're not capable
3905 of fixing it up just yet.. We have to be sure we know about ALL
3906 loads since the aliasing code will allow all entries in the
3907 ld_motion list to not-alias itself. If we miss a load, we will get
3908 the wrong value since gcse might common it and we won't know to
3912 invalidate_any_buried_refs (rtx x
)
3916 struct ls_expr
* ptr
;
3918 /* Invalidate it in the list. */
3919 if (MEM_P (x
) && simple_mem (x
))
3921 ptr
= ldst_entry (x
);
3925 /* Recursively process the insn. */
3926 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
3928 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
3931 invalidate_any_buried_refs (XEXP (x
, i
));
3932 else if (fmt
[i
] == 'E')
3933 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
3934 invalidate_any_buried_refs (XVECEXP (x
, i
, j
));
3938 /* Find all the 'simple' MEMs which are used in LOADs and STORES. Simple
3939 being defined as MEM loads and stores to symbols, with no side effects
3940 and no registers in the expression. For a MEM destination, we also
3941 check that the insn is still valid if we replace the destination with a
3942 REG, as is done in update_ld_motion_stores. If there are any uses/defs
3943 which don't match this criteria, they are invalidated and trimmed out
3947 compute_ld_motion_mems (void)
3949 struct ls_expr
* ptr
;
3953 pre_ldst_mems
= NULL
;
3954 pre_ldst_table
= new hash_table
<pre_ldst_expr_hasher
> (13);
3956 FOR_EACH_BB_FN (bb
, cfun
)
3958 FOR_BB_INSNS (bb
, insn
)
3960 if (NONDEBUG_INSN_P (insn
))
3962 if (GET_CODE (PATTERN (insn
)) == SET
)
3964 rtx src
= SET_SRC (PATTERN (insn
));
3965 rtx dest
= SET_DEST (PATTERN (insn
));
3966 rtx note
= find_reg_equal_equiv_note (insn
);
3969 /* Check for a simple LOAD... */
3970 if (MEM_P (src
) && simple_mem (src
))
3972 ptr
= ldst_entry (src
);
3974 ptr
->loads
= alloc_INSN_LIST (insn
, ptr
->loads
);
3980 /* Make sure there isn't a buried load somewhere. */
3981 invalidate_any_buried_refs (src
);
3984 if (note
!= 0 && REG_NOTE_KIND (note
) == REG_EQUAL
)
3985 src_eq
= XEXP (note
, 0);
3989 if (src_eq
!= NULL_RTX
3990 && !(MEM_P (src_eq
) && simple_mem (src_eq
)))
3991 invalidate_any_buried_refs (src_eq
);
3993 /* Check for stores. Don't worry about aliased ones, they
3994 will block any movement we might do later. We only care
3995 about this exact pattern since those are the only
3996 circumstance that we will ignore the aliasing info. */
3997 if (MEM_P (dest
) && simple_mem (dest
))
3999 ptr
= ldst_entry (dest
);
4002 && GET_CODE (src
) != ASM_OPERANDS
4003 /* Check for REG manually since want_to_gcse_p
4004 returns 0 for all REGs. */
4005 && can_assign_to_reg_without_clobbers_p (src
))
4006 ptr
->stores
= alloc_INSN_LIST (insn
, ptr
->stores
);
4012 invalidate_any_buried_refs (PATTERN (insn
));
4018 /* Remove any references that have been either invalidated or are not in the
4019 expression list for pre gcse. */
4022 trim_ld_motion_mems (void)
4024 struct ls_expr
* * last
= & pre_ldst_mems
;
4025 struct ls_expr
* ptr
= pre_ldst_mems
;
4031 /* Delete if entry has been made invalid. */
4034 /* Delete if we cannot find this mem in the expression list. */
4035 unsigned int hash
= ptr
->hash_index
% expr_hash_table
.size
;
4037 for (expr
= expr_hash_table
.table
[hash
];
4039 expr
= expr
->next_same_hash
)
4040 if (expr_equiv_p (expr
->expr
, ptr
->pattern
))
4044 expr
= (struct expr
*) 0;
4048 /* Set the expression field if we are keeping it. */
4056 pre_ldst_table
->remove_elt_with_hash (ptr
, ptr
->hash_index
);
4057 free_ldst_entry (ptr
);
4062 /* Show the world what we've found. */
4063 if (dump_file
&& pre_ldst_mems
!= NULL
)
4064 print_ldst_list (dump_file
);
4067 /* This routine will take an expression which we are replacing with
4068 a reaching register, and update any stores that are needed if
4069 that expression is in the ld_motion list. Stores are updated by
4070 copying their SRC to the reaching register, and then storing
4071 the reaching register into the store location. These keeps the
4072 correct value in the reaching register for the loads. */
4075 update_ld_motion_stores (struct expr
* expr
)
4077 struct ls_expr
* mem_ptr
;
4079 if ((mem_ptr
= find_rtx_in_ldst (expr
->expr
)))
4081 /* We can try to find just the REACHED stores, but is shouldn't
4082 matter to set the reaching reg everywhere... some might be
4083 dead and should be eliminated later. */
4085 /* We replace (set mem expr) with (set reg expr) (set mem reg)
4086 where reg is the reaching reg used in the load. We checked in
4087 compute_ld_motion_mems that we can replace (set mem expr) with
4088 (set reg expr) in that insn. */
4089 rtx list
= mem_ptr
->stores
;
4091 for ( ; list
!= NULL_RTX
; list
= XEXP (list
, 1))
4093 rtx insn
= XEXP (list
, 0);
4094 rtx pat
= PATTERN (insn
);
4095 rtx src
= SET_SRC (pat
);
4096 rtx reg
= expr
->reaching_reg
;
4099 /* If we've already copied it, continue. */
4100 if (expr
->reaching_reg
== src
)
4105 fprintf (dump_file
, "PRE: store updated with reaching reg ");
4106 print_rtl (dump_file
, reg
);
4107 fprintf (dump_file
, ":\n ");
4108 print_inline_rtx (dump_file
, insn
, 8);
4109 fprintf (dump_file
, "\n");
4112 copy
= gen_move_insn (reg
, copy_rtx (SET_SRC (pat
)));
4113 emit_insn_before (copy
, insn
);
4114 SET_SRC (pat
) = reg
;
4115 df_insn_rescan (insn
);
4117 /* un-recognize this pattern since it's probably different now. */
4118 INSN_CODE (insn
) = -1;
4119 gcse_create_count
++;
4124 /* Return true if the graph is too expensive to optimize. PASS is the
4125 optimization about to be performed. */
4128 is_too_expensive (const char *pass
)
4130 /* Trying to perform global optimizations on flow graphs which have
4131 a high connectivity will take a long time and is unlikely to be
4132 particularly useful.
4134 In normal circumstances a cfg should have about twice as many
4135 edges as blocks. But we do not want to punish small functions
4136 which have a couple switch statements. Rather than simply
4137 threshold the number of blocks, uses something with a more
4138 graceful degradation. */
4139 if (n_edges_for_fn (cfun
) > 20000 + n_basic_blocks_for_fn (cfun
) * 4)
4141 warning (OPT_Wdisabled_optimization
,
4142 "%s: %d basic blocks and %d edges/basic block",
4143 pass
, n_basic_blocks_for_fn (cfun
),
4144 n_edges_for_fn (cfun
) / n_basic_blocks_for_fn (cfun
));
4149 /* If allocating memory for the dataflow bitmaps would take up too much
4150 storage it's better just to disable the optimization. */
4151 if ((n_basic_blocks_for_fn (cfun
)
4152 * SBITMAP_SET_SIZE (max_reg_num ())
4153 * sizeof (SBITMAP_ELT_TYPE
)) > MAX_GCSE_MEMORY
)
4155 warning (OPT_Wdisabled_optimization
,
4156 "%s: %d basic blocks and %d registers",
4157 pass
, n_basic_blocks_for_fn (cfun
), max_reg_num ());
4166 execute_rtl_pre (void)
4169 delete_unreachable_blocks ();
4171 changed
= one_pre_gcse_pass ();
4172 flag_rerun_cse_after_global_opts
|= changed
;
4179 execute_rtl_hoist (void)
4182 delete_unreachable_blocks ();
4184 changed
= one_code_hoisting_pass ();
4185 flag_rerun_cse_after_global_opts
|= changed
;
4193 const pass_data pass_data_rtl_pre
=
4195 RTL_PASS
, /* type */
4196 "rtl pre", /* name */
4197 OPTGROUP_NONE
, /* optinfo_flags */
4199 PROP_cfglayout
, /* properties_required */
4200 0, /* properties_provided */
4201 0, /* properties_destroyed */
4202 0, /* todo_flags_start */
4203 TODO_df_finish
, /* todo_flags_finish */
4206 class pass_rtl_pre
: public rtl_opt_pass
4209 pass_rtl_pre (gcc::context
*ctxt
)
4210 : rtl_opt_pass (pass_data_rtl_pre
, ctxt
)
4213 /* opt_pass methods: */
4214 virtual bool gate (function
*);
4215 virtual unsigned int execute (function
*) { return execute_rtl_pre (); }
4217 }; // class pass_rtl_pre
4219 /* We do not construct an accurate cfg in functions which call
4220 setjmp, so none of these passes runs if the function calls
4222 FIXME: Should just handle setjmp via REG_SETJMP notes. */
4225 pass_rtl_pre::gate (function
*fun
)
4227 return optimize
> 0 && flag_gcse
4228 && !fun
->calls_setjmp
4229 && optimize_function_for_speed_p (fun
)
4236 make_pass_rtl_pre (gcc::context
*ctxt
)
4238 return new pass_rtl_pre (ctxt
);
4243 const pass_data pass_data_rtl_hoist
=
4245 RTL_PASS
, /* type */
4247 OPTGROUP_NONE
, /* optinfo_flags */
4248 TV_HOIST
, /* tv_id */
4249 PROP_cfglayout
, /* properties_required */
4250 0, /* properties_provided */
4251 0, /* properties_destroyed */
4252 0, /* todo_flags_start */
4253 TODO_df_finish
, /* todo_flags_finish */
4256 class pass_rtl_hoist
: public rtl_opt_pass
4259 pass_rtl_hoist (gcc::context
*ctxt
)
4260 : rtl_opt_pass (pass_data_rtl_hoist
, ctxt
)
4263 /* opt_pass methods: */
4264 virtual bool gate (function
*);
4265 virtual unsigned int execute (function
*) { return execute_rtl_hoist (); }
4267 }; // class pass_rtl_hoist
4270 pass_rtl_hoist::gate (function
*)
4272 return optimize
> 0 && flag_gcse
4273 && !cfun
->calls_setjmp
4274 /* It does not make sense to run code hoisting unless we are optimizing
4275 for code size -- it rarely makes programs faster, and can make then
4276 bigger if we did PRE (when optimizing for space, we don't run PRE). */
4277 && optimize_function_for_size_p (cfun
)
4284 make_pass_rtl_hoist (gcc::context
*ctxt
)
4286 return new pass_rtl_hoist (ctxt
);
4289 #include "gt-gcse.h"