1 /* { dg-do compile } */
2 /* { dg-options "" } */
4 /* "p" modifier can't be used to generate a valid memory address with ILP32. */
5 /* { dg-skip-if "" { aarch64*-*-* && ilp32 } } */
6 /* { dg-skip-if "'p' is not supported for GCN" { amdgcn-*-* } } */
12 asm volatile ("test0 X%0Y%[arg]Z" : [arg
] "=g" (x
));
13 asm volatile ("test1 X%[out]Y%[in]Z" : [out
] "=g" (y
) : [in
] "0"(y
));
14 asm volatile ("test2 X%a0Y%a[arg]Z" : : [arg
] "p" (&z
));
15 asm volatile ("test3 %[in]" : [inout
] "=g"(x
) : "[inout]" (x
), [in
] "g" (y
));
18 /* { dg-final { scan-assembler {test0 X(.*)Y\1Z} } } */
19 /* { dg-final { scan-assembler {test1 X(.*)Y\1Z} } } */
20 /* { dg-final { scan-assembler {test2 X(.*)Y\1Z} } } */