2017-08-06 Andrew Pinski <apinski@cavium.com>
[official-gcc.git] / gcc / testsuite / gcc.target / aarch64 / target_attr_4.c
blobe0114084800cbb6b5abcdcd34f194fd0993ea02d
1 /* { dg-do assemble } */
2 /* { dg-options "-O2 -march=armv8-a+nocrc -mcpu=generic -save-temps" } */
4 #include "arm_acle.h"
6 /* Check that enabling an ISA feature using an attribute in a file
7 compiled without that attribute works. */
9 __attribute__ ((target ("+crc")))
10 uint32_t
11 foo (uint32_t a, uint8_t b)
13 return __crc32b (a, b);
16 __attribute__ ((target ("arch=armv8-a+crc")))
17 uint32_t
18 fooarch (uint32_t a, uint8_t b)
20 return __crc32b (a, b);
23 __attribute__ ((target ("cpu=cortex-a53+crc")))
24 uint32_t
25 foocpu (uint32_t a, uint8_t b)
27 return __crc32b (a, b);
30 /* { dg-final { scan-assembler-times "crc32b\tw..?, w..?, w..?\n" 3 } } */