combine.c (reversed_comparison): Fix typo in last patch.
[official-gcc.git] / gcc / resource.c
blobfa7e95730612cd55e6231138ed40aa32fee29dff
1 /* Definitions for computing resource usage of specific insns.
2 Copyright (C) 1999, 2000 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
9 any later version.
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
21 #include "config.h"
22 #include "system.h"
23 #include "toplev.h"
24 #include "rtl.h"
25 #include "tm_p.h"
26 #include "hard-reg-set.h"
27 #include "basic-block.h"
28 #include "function.h"
29 #include "regs.h"
30 #include "flags.h"
31 #include "output.h"
32 #include "resource.h"
33 #include "except.h"
34 #include "insn-attr.h"
36 /* This structure is used to record liveness information at the targets or
37 fallthrough insns of branches. We will most likely need the information
38 at targets again, so save them in a hash table rather than recomputing them
39 each time. */
41 struct target_info
43 int uid; /* INSN_UID of target. */
44 struct target_info *next; /* Next info for same hash bucket. */
45 HARD_REG_SET live_regs; /* Registers live at target. */
46 int block; /* Basic block number containing target. */
47 int bb_tick; /* Generation count of basic block info. */
50 #define TARGET_HASH_PRIME 257
52 /* Indicates what resources are required at the beginning of the epilogue. */
53 static struct resources start_of_epilogue_needs;
55 /* Indicates what resources are required at function end. */
56 static struct resources end_of_function_needs;
58 /* Define the hash table itself. */
59 static struct target_info **target_hash_table = NULL;
61 /* For each basic block, we maintain a generation number of its basic
62 block info, which is updated each time we move an insn from the
63 target of a jump. This is the generation number indexed by block
64 number. */
66 static int *bb_ticks;
68 /* Marks registers possibly live at the current place being scanned by
69 mark_target_live_regs. Used only by next two function. */
71 static HARD_REG_SET current_live_regs;
73 /* Marks registers for which we have seen a REG_DEAD note but no assignment.
74 Also only used by the next two functions. */
76 static HARD_REG_SET pending_dead_regs;
78 static void update_live_status PARAMS ((rtx, rtx, void *));
79 static int find_basic_block PARAMS ((rtx));
80 static rtx next_insn_no_annul PARAMS ((rtx));
81 static rtx find_dead_or_set_registers PARAMS ((rtx, struct resources*,
82 rtx*, int, struct resources,
83 struct resources));
85 /* Utility function called from mark_target_live_regs via note_stores.
86 It deadens any CLOBBERed registers and livens any SET registers. */
88 static void
89 update_live_status (dest, x, data)
90 rtx dest;
91 rtx x;
92 void *data ATTRIBUTE_UNUSED;
94 int first_regno, last_regno;
95 int i;
97 if (GET_CODE (dest) != REG
98 && (GET_CODE (dest) != SUBREG || GET_CODE (SUBREG_REG (dest)) != REG))
99 return;
101 if (GET_CODE (dest) == SUBREG)
102 first_regno = REGNO (SUBREG_REG (dest)) + SUBREG_WORD (dest);
103 else
104 first_regno = REGNO (dest);
106 last_regno = first_regno + HARD_REGNO_NREGS (first_regno, GET_MODE (dest));
108 if (GET_CODE (x) == CLOBBER)
109 for (i = first_regno; i < last_regno; i++)
110 CLEAR_HARD_REG_BIT (current_live_regs, i);
111 else
112 for (i = first_regno; i < last_regno; i++)
114 SET_HARD_REG_BIT (current_live_regs, i);
115 CLEAR_HARD_REG_BIT (pending_dead_regs, i);
118 /* Find the number of the basic block that starts closest to INSN. Return -1
119 if we couldn't find such a basic block. */
121 static int
122 find_basic_block (insn)
123 rtx insn;
125 int i;
127 /* Scan backwards to the previous BARRIER. Then see if we can find a
128 label that starts a basic block. Return the basic block number. */
130 for (insn = prev_nonnote_insn (insn);
131 insn && GET_CODE (insn) != BARRIER;
132 insn = prev_nonnote_insn (insn))
135 /* The start of the function is basic block zero. */
136 if (insn == 0)
137 return 0;
139 /* See if any of the upcoming CODE_LABELs start a basic block. If we reach
140 anything other than a CODE_LABEL or note, we can't find this code. */
141 for (insn = next_nonnote_insn (insn);
142 insn && GET_CODE (insn) == CODE_LABEL;
143 insn = next_nonnote_insn (insn))
145 for (i = 0; i < n_basic_blocks; i++)
146 if (insn == BLOCK_HEAD (i))
147 return i;
150 return -1;
153 /* Similar to next_insn, but ignores insns in the delay slots of
154 an annulled branch. */
156 static rtx
157 next_insn_no_annul (insn)
158 rtx insn;
160 if (insn)
162 /* If INSN is an annulled branch, skip any insns from the target
163 of the branch. */
164 if (INSN_ANNULLED_BRANCH_P (insn)
165 && NEXT_INSN (PREV_INSN (insn)) != insn)
166 while (INSN_FROM_TARGET_P (NEXT_INSN (insn)))
167 insn = NEXT_INSN (insn);
169 insn = NEXT_INSN (insn);
170 if (insn && GET_CODE (insn) == INSN
171 && GET_CODE (PATTERN (insn)) == SEQUENCE)
172 insn = XVECEXP (PATTERN (insn), 0, 0);
175 return insn;
178 /* Given X, some rtl, and RES, a pointer to a `struct resource', mark
179 which resources are references by the insn. If INCLUDE_DELAYED_EFFECTS
180 is TRUE, resources used by the called routine will be included for
181 CALL_INSNs. */
183 void
184 mark_referenced_resources (x, res, include_delayed_effects)
185 register rtx x;
186 register struct resources *res;
187 register int include_delayed_effects;
189 enum rtx_code code = GET_CODE (x);
190 int i, j;
191 unsigned int r;
192 register const char *format_ptr;
194 /* Handle leaf items for which we set resource flags. Also, special-case
195 CALL, SET and CLOBBER operators. */
196 switch (code)
198 case CONST:
199 case CONST_INT:
200 case CONST_DOUBLE:
201 case PC:
202 case SYMBOL_REF:
203 case LABEL_REF:
204 return;
206 case SUBREG:
207 if (GET_CODE (SUBREG_REG (x)) != REG)
208 mark_referenced_resources (SUBREG_REG (x), res, 0);
209 else
211 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
212 unsigned int last_regno
213 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
215 if (last_regno > FIRST_PSEUDO_REGISTER)
216 abort ();
217 for (r = regno; r < last_regno; r++)
218 SET_HARD_REG_BIT (res->regs, r);
220 return;
222 case REG:
224 unsigned int regno = REGNO (x);
225 unsigned int last_regno
226 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
228 if (last_regno > FIRST_PSEUDO_REGISTER)
229 abort ();
230 for (r = regno; r < last_regno; r++)
231 SET_HARD_REG_BIT (res->regs, r);
233 return;
235 case MEM:
236 /* If this memory shouldn't change, it really isn't referencing
237 memory. */
238 if (RTX_UNCHANGING_P (x))
239 res->unch_memory = 1;
240 else
241 res->memory = 1;
242 res->volatil |= MEM_VOLATILE_P (x);
244 /* Mark registers used to access memory. */
245 mark_referenced_resources (XEXP (x, 0), res, 0);
246 return;
248 case CC0:
249 res->cc = 1;
250 return;
252 case UNSPEC_VOLATILE:
253 case ASM_INPUT:
254 /* Traditional asm's are always volatile. */
255 res->volatil = 1;
256 return;
258 case TRAP_IF:
259 res->volatil = 1;
260 break;
262 case ASM_OPERANDS:
263 res->volatil |= MEM_VOLATILE_P (x);
265 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
266 We can not just fall through here since then we would be confused
267 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
268 traditional asms unlike their normal usage. */
270 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
271 mark_referenced_resources (ASM_OPERANDS_INPUT (x, i), res, 0);
272 return;
274 case CALL:
275 /* The first operand will be a (MEM (xxx)) but doesn't really reference
276 memory. The second operand may be referenced, though. */
277 mark_referenced_resources (XEXP (XEXP (x, 0), 0), res, 0);
278 mark_referenced_resources (XEXP (x, 1), res, 0);
279 return;
281 case SET:
282 /* Usually, the first operand of SET is set, not referenced. But
283 registers used to access memory are referenced. SET_DEST is
284 also referenced if it is a ZERO_EXTRACT or SIGN_EXTRACT. */
286 mark_referenced_resources (SET_SRC (x), res, 0);
288 x = SET_DEST (x);
289 if (GET_CODE (x) == SIGN_EXTRACT
290 || GET_CODE (x) == ZERO_EXTRACT
291 || GET_CODE (x) == STRICT_LOW_PART)
292 mark_referenced_resources (x, res, 0);
293 else if (GET_CODE (x) == SUBREG)
294 x = SUBREG_REG (x);
295 if (GET_CODE (x) == MEM)
296 mark_referenced_resources (XEXP (x, 0), res, 0);
297 return;
299 case CLOBBER:
300 return;
302 case CALL_INSN:
303 if (include_delayed_effects)
305 /* A CALL references memory, the frame pointer if it exists, the
306 stack pointer, any global registers and any registers given in
307 USE insns immediately in front of the CALL.
309 However, we may have moved some of the parameter loading insns
310 into the delay slot of this CALL. If so, the USE's for them
311 don't count and should be skipped. */
312 rtx insn = PREV_INSN (x);
313 rtx sequence = 0;
314 int seq_size = 0;
315 rtx next = NEXT_INSN (x);
316 int i;
318 /* If we are part of a delay slot sequence, point at the SEQUENCE. */
319 if (NEXT_INSN (insn) != x)
321 next = NEXT_INSN (NEXT_INSN (insn));
322 sequence = PATTERN (NEXT_INSN (insn));
323 seq_size = XVECLEN (sequence, 0);
324 if (GET_CODE (sequence) != SEQUENCE)
325 abort ();
328 res->memory = 1;
329 SET_HARD_REG_BIT (res->regs, STACK_POINTER_REGNUM);
330 if (frame_pointer_needed)
332 SET_HARD_REG_BIT (res->regs, FRAME_POINTER_REGNUM);
333 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
334 SET_HARD_REG_BIT (res->regs, HARD_FRAME_POINTER_REGNUM);
335 #endif
338 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
339 if (global_regs[i])
340 SET_HARD_REG_BIT (res->regs, i);
342 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
343 assume that this call can need any register.
345 This is done to be more conservative about how we handle setjmp.
346 We assume that they both use and set all registers. Using all
347 registers ensures that a register will not be considered dead
348 just because it crosses a setjmp call. A register should be
349 considered dead only if the setjmp call returns non-zero. */
350 if (next && GET_CODE (next) == NOTE
351 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
352 SET_HARD_REG_SET (res->regs);
355 rtx link;
357 for (link = CALL_INSN_FUNCTION_USAGE (x);
358 link;
359 link = XEXP (link, 1))
360 if (GET_CODE (XEXP (link, 0)) == USE)
362 for (i = 1; i < seq_size; i++)
364 rtx slot_pat = PATTERN (XVECEXP (sequence, 0, i));
365 if (GET_CODE (slot_pat) == SET
366 && rtx_equal_p (SET_DEST (slot_pat),
367 XEXP (XEXP (link, 0), 0)))
368 break;
370 if (i >= seq_size)
371 mark_referenced_resources (XEXP (XEXP (link, 0), 0),
372 res, 0);
377 /* ... fall through to other INSN processing ... */
379 case INSN:
380 case JUMP_INSN:
382 #ifdef INSN_REFERENCES_ARE_DELAYED
383 if (! include_delayed_effects
384 && INSN_REFERENCES_ARE_DELAYED (x))
385 return;
386 #endif
388 /* No special processing, just speed up. */
389 mark_referenced_resources (PATTERN (x), res, include_delayed_effects);
390 return;
392 default:
393 break;
396 /* Process each sub-expression and flag what it needs. */
397 format_ptr = GET_RTX_FORMAT (code);
398 for (i = 0; i < GET_RTX_LENGTH (code); i++)
399 switch (*format_ptr++)
401 case 'e':
402 mark_referenced_resources (XEXP (x, i), res, include_delayed_effects);
403 break;
405 case 'E':
406 for (j = 0; j < XVECLEN (x, i); j++)
407 mark_referenced_resources (XVECEXP (x, i, j), res,
408 include_delayed_effects);
409 break;
413 /* A subroutine of mark_target_live_regs. Search forward from TARGET
414 looking for registers that are set before they are used. These are dead.
415 Stop after passing a few conditional jumps, and/or a small
416 number of unconditional branches. */
418 static rtx
419 find_dead_or_set_registers (target, res, jump_target, jump_count, set, needed)
420 rtx target;
421 struct resources *res;
422 rtx *jump_target;
423 int jump_count;
424 struct resources set, needed;
426 HARD_REG_SET scratch;
427 rtx insn, next;
428 rtx jump_insn = 0;
429 int i;
431 for (insn = target; insn; insn = next)
433 rtx this_jump_insn = insn;
435 next = NEXT_INSN (insn);
437 /* If this instruction can throw an exception, then we don't
438 know where we might end up next. That means that we have to
439 assume that whatever we have already marked as live really is
440 live. */
441 if (can_throw (insn))
442 break;
444 switch (GET_CODE (insn))
446 case CODE_LABEL:
447 /* After a label, any pending dead registers that weren't yet
448 used can be made dead. */
449 AND_COMPL_HARD_REG_SET (pending_dead_regs, needed.regs);
450 AND_COMPL_HARD_REG_SET (res->regs, pending_dead_regs);
451 CLEAR_HARD_REG_SET (pending_dead_regs);
453 continue;
455 case BARRIER:
456 case NOTE:
457 continue;
459 case INSN:
460 if (GET_CODE (PATTERN (insn)) == USE)
462 /* If INSN is a USE made by update_block, we care about the
463 underlying insn. Any registers set by the underlying insn
464 are live since the insn is being done somewhere else. */
465 if (INSN_P (XEXP (PATTERN (insn), 0)))
466 mark_set_resources (XEXP (PATTERN (insn), 0), res, 0,
467 MARK_SRC_DEST_CALL);
469 /* All other USE insns are to be ignored. */
470 continue;
472 else if (GET_CODE (PATTERN (insn)) == CLOBBER)
473 continue;
474 else if (GET_CODE (PATTERN (insn)) == SEQUENCE)
476 /* An unconditional jump can be used to fill the delay slot
477 of a call, so search for a JUMP_INSN in any position. */
478 for (i = 0; i < XVECLEN (PATTERN (insn), 0); i++)
480 this_jump_insn = XVECEXP (PATTERN (insn), 0, i);
481 if (GET_CODE (this_jump_insn) == JUMP_INSN)
482 break;
486 default:
487 break;
490 if (GET_CODE (this_jump_insn) == JUMP_INSN)
492 if (jump_count++ < 10)
494 if (any_uncondjump_p (this_jump_insn)
495 || GET_CODE (PATTERN (this_jump_insn)) == RETURN)
497 next = JUMP_LABEL (this_jump_insn);
498 if (jump_insn == 0)
500 jump_insn = insn;
501 if (jump_target)
502 *jump_target = JUMP_LABEL (this_jump_insn);
505 else if (any_condjump_p (this_jump_insn))
507 struct resources target_set, target_res;
508 struct resources fallthrough_res;
510 /* We can handle conditional branches here by following
511 both paths, and then IOR the results of the two paths
512 together, which will give us registers that are dead
513 on both paths. Since this is expensive, we give it
514 a much higher cost than unconditional branches. The
515 cost was chosen so that we will follow at most 1
516 conditional branch. */
518 jump_count += 4;
519 if (jump_count >= 10)
520 break;
522 mark_referenced_resources (insn, &needed, 1);
524 /* For an annulled branch, mark_set_resources ignores slots
525 filled by instructions from the target. This is correct
526 if the branch is not taken. Since we are following both
527 paths from the branch, we must also compute correct info
528 if the branch is taken. We do this by inverting all of
529 the INSN_FROM_TARGET_P bits, calling mark_set_resources,
530 and then inverting the INSN_FROM_TARGET_P bits again. */
532 if (GET_CODE (PATTERN (insn)) == SEQUENCE
533 && INSN_ANNULLED_BRANCH_P (this_jump_insn))
535 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
536 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
537 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
539 target_set = set;
540 mark_set_resources (insn, &target_set, 0,
541 MARK_SRC_DEST_CALL);
543 for (i = 1; i < XVECLEN (PATTERN (insn), 0); i++)
544 INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i))
545 = ! INSN_FROM_TARGET_P (XVECEXP (PATTERN (insn), 0, i));
547 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
549 else
551 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
552 target_set = set;
555 target_res = *res;
556 COPY_HARD_REG_SET (scratch, target_set.regs);
557 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
558 AND_COMPL_HARD_REG_SET (target_res.regs, scratch);
560 fallthrough_res = *res;
561 COPY_HARD_REG_SET (scratch, set.regs);
562 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
563 AND_COMPL_HARD_REG_SET (fallthrough_res.regs, scratch);
565 find_dead_or_set_registers (JUMP_LABEL (this_jump_insn),
566 &target_res, 0, jump_count,
567 target_set, needed);
568 find_dead_or_set_registers (next,
569 &fallthrough_res, 0, jump_count,
570 set, needed);
571 IOR_HARD_REG_SET (fallthrough_res.regs, target_res.regs);
572 AND_HARD_REG_SET (res->regs, fallthrough_res.regs);
573 break;
575 else
576 break;
578 else
580 /* Don't try this optimization if we expired our jump count
581 above, since that would mean there may be an infinite loop
582 in the function being compiled. */
583 jump_insn = 0;
584 break;
588 mark_referenced_resources (insn, &needed, 1);
589 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
591 COPY_HARD_REG_SET (scratch, set.regs);
592 AND_COMPL_HARD_REG_SET (scratch, needed.regs);
593 AND_COMPL_HARD_REG_SET (res->regs, scratch);
596 return jump_insn;
599 /* Given X, a part of an insn, and a pointer to a `struct resource',
600 RES, indicate which resources are modified by the insn. If
601 MARK_TYPE is MARK_SRC_DEST_CALL, also mark resources potentially
602 set by the called routine. If MARK_TYPE is MARK_DEST, only mark SET_DESTs
604 If IN_DEST is nonzero, it means we are inside a SET. Otherwise,
605 objects are being referenced instead of set.
607 We never mark the insn as modifying the condition code unless it explicitly
608 SETs CC0 even though this is not totally correct. The reason for this is
609 that we require a SET of CC0 to immediately precede the reference to CC0.
610 So if some other insn sets CC0 as a side-effect, we know it cannot affect
611 our computation and thus may be placed in a delay slot. */
613 void
614 mark_set_resources (x, res, in_dest, mark_type)
615 register rtx x;
616 register struct resources *res;
617 int in_dest;
618 enum mark_resource_type mark_type;
620 enum rtx_code code;
621 int i, j;
622 unsigned int r;
623 const char *format_ptr;
625 restart:
627 code = GET_CODE (x);
629 switch (code)
631 case NOTE:
632 case BARRIER:
633 case CODE_LABEL:
634 case USE:
635 case CONST_INT:
636 case CONST_DOUBLE:
637 case LABEL_REF:
638 case SYMBOL_REF:
639 case CONST:
640 case PC:
641 /* These don't set any resources. */
642 return;
644 case CC0:
645 if (in_dest)
646 res->cc = 1;
647 return;
649 case CALL_INSN:
650 /* Called routine modifies the condition code, memory, any registers
651 that aren't saved across calls, global registers and anything
652 explicitly CLOBBERed immediately after the CALL_INSN. */
654 if (mark_type == MARK_SRC_DEST_CALL)
656 rtx next = NEXT_INSN (x);
657 rtx prev = PREV_INSN (x);
658 rtx link;
660 res->cc = res->memory = 1;
661 for (r = 0; r < FIRST_PSEUDO_REGISTER; r++)
662 if (call_used_regs[r] || global_regs[r])
663 SET_HARD_REG_BIT (res->regs, r);
665 /* If X is part of a delay slot sequence, then NEXT should be
666 the first insn after the sequence. */
667 if (NEXT_INSN (prev) != x)
668 next = NEXT_INSN (NEXT_INSN (prev));
670 for (link = CALL_INSN_FUNCTION_USAGE (x);
671 link; link = XEXP (link, 1))
672 if (GET_CODE (XEXP (link, 0)) == CLOBBER)
673 mark_set_resources (SET_DEST (XEXP (link, 0)), res, 1,
674 MARK_SRC_DEST);
676 /* Check for a NOTE_INSN_SETJMP. If it exists, then we must
677 assume that this call can clobber any register. */
678 if (next && GET_CODE (next) == NOTE
679 && NOTE_LINE_NUMBER (next) == NOTE_INSN_SETJMP)
680 SET_HARD_REG_SET (res->regs);
683 /* ... and also what its RTL says it modifies, if anything. */
685 case JUMP_INSN:
686 case INSN:
688 /* An insn consisting of just a CLOBBER (or USE) is just for flow
689 and doesn't actually do anything, so we ignore it. */
691 #ifdef INSN_SETS_ARE_DELAYED
692 if (mark_type != MARK_SRC_DEST_CALL
693 && INSN_SETS_ARE_DELAYED (x))
694 return;
695 #endif
697 x = PATTERN (x);
698 if (GET_CODE (x) != USE && GET_CODE (x) != CLOBBER)
699 goto restart;
700 return;
702 case SET:
703 /* If the source of a SET is a CALL, this is actually done by
704 the called routine. So only include it if we are to include the
705 effects of the calling routine. */
707 mark_set_resources (SET_DEST (x), res,
708 (mark_type == MARK_SRC_DEST_CALL
709 || GET_CODE (SET_SRC (x)) != CALL),
710 mark_type);
712 if (mark_type != MARK_DEST)
713 mark_set_resources (SET_SRC (x), res, 0, MARK_SRC_DEST);
714 return;
716 case CLOBBER:
717 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
718 return;
720 case SEQUENCE:
721 for (i = 0; i < XVECLEN (x, 0); i++)
722 if (! (INSN_ANNULLED_BRANCH_P (XVECEXP (x, 0, 0))
723 && INSN_FROM_TARGET_P (XVECEXP (x, 0, i))))
724 mark_set_resources (XVECEXP (x, 0, i), res, 0, mark_type);
725 return;
727 case POST_INC:
728 case PRE_INC:
729 case POST_DEC:
730 case PRE_DEC:
731 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
732 return;
734 case PRE_MODIFY:
735 case POST_MODIFY:
736 mark_set_resources (XEXP (x, 0), res, 1, MARK_SRC_DEST);
737 mark_set_resources (XEXP (XEXP (x, 1), 0), res, 0, MARK_SRC_DEST);
738 mark_set_resources (XEXP (XEXP (x, 1), 1), res, 0, MARK_SRC_DEST);
739 return;
741 case SIGN_EXTRACT:
742 case ZERO_EXTRACT:
743 if (! (mark_type == MARK_DEST && in_dest))
745 mark_set_resources (XEXP (x, 0), res, in_dest, MARK_SRC_DEST);
746 mark_set_resources (XEXP (x, 1), res, 0, MARK_SRC_DEST);
747 mark_set_resources (XEXP (x, 2), res, 0, MARK_SRC_DEST);
749 return;
751 case MEM:
752 if (in_dest)
754 res->memory = 1;
755 res->unch_memory |= RTX_UNCHANGING_P (x);
756 res->volatil |= MEM_VOLATILE_P (x);
759 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
760 return;
762 case SUBREG:
763 if (in_dest)
765 if (GET_CODE (SUBREG_REG (x)) != REG)
766 mark_set_resources (SUBREG_REG (x), res, in_dest, mark_type);
767 else
769 unsigned int regno = REGNO (SUBREG_REG (x)) + SUBREG_WORD (x);
770 unsigned int last_regno
771 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
773 if (last_regno > FIRST_PSEUDO_REGISTER)
774 abort ();
775 for (r = regno; r < last_regno; r++)
776 SET_HARD_REG_BIT (res->regs, r);
779 return;
781 case REG:
782 if (in_dest)
784 unsigned int regno = REGNO (x);
785 unsigned int last_regno
786 = regno + HARD_REGNO_NREGS (regno, GET_MODE (x));
788 if (last_regno > FIRST_PSEUDO_REGISTER)
789 abort ();
790 for (r = regno; r < last_regno; r++)
791 SET_HARD_REG_BIT (res->regs, r);
793 return;
795 case STRICT_LOW_PART:
796 if (! (mark_type == MARK_DEST && in_dest))
798 mark_set_resources (XEXP (x, 0), res, 0, MARK_SRC_DEST);
799 return;
802 case UNSPEC_VOLATILE:
803 case ASM_INPUT:
804 /* Traditional asm's are always volatile. */
805 res->volatil = 1;
806 return;
808 case TRAP_IF:
809 res->volatil = 1;
810 break;
812 case ASM_OPERANDS:
813 res->volatil |= MEM_VOLATILE_P (x);
815 /* For all ASM_OPERANDS, we must traverse the vector of input operands.
816 We can not just fall through here since then we would be confused
817 by the ASM_INPUT rtx inside ASM_OPERANDS, which do not indicate
818 traditional asms unlike their normal usage. */
820 for (i = 0; i < ASM_OPERANDS_INPUT_LENGTH (x); i++)
821 mark_set_resources (ASM_OPERANDS_INPUT (x, i), res, in_dest,
822 MARK_SRC_DEST);
823 return;
825 default:
826 break;
829 /* Process each sub-expression and flag what it needs. */
830 format_ptr = GET_RTX_FORMAT (code);
831 for (i = 0; i < GET_RTX_LENGTH (code); i++)
832 switch (*format_ptr++)
834 case 'e':
835 mark_set_resources (XEXP (x, i), res, in_dest, mark_type);
836 break;
838 case 'E':
839 for (j = 0; j < XVECLEN (x, i); j++)
840 mark_set_resources (XVECEXP (x, i, j), res, in_dest, mark_type);
841 break;
845 /* Set the resources that are live at TARGET.
847 If TARGET is zero, we refer to the end of the current function and can
848 return our precomputed value.
850 Otherwise, we try to find out what is live by consulting the basic block
851 information. This is tricky, because we must consider the actions of
852 reload and jump optimization, which occur after the basic block information
853 has been computed.
855 Accordingly, we proceed as follows::
857 We find the previous BARRIER and look at all immediately following labels
858 (with no intervening active insns) to see if any of them start a basic
859 block. If we hit the start of the function first, we use block 0.
861 Once we have found a basic block and a corresponding first insns, we can
862 accurately compute the live status from basic_block_live_regs and
863 reg_renumber. (By starting at a label following a BARRIER, we are immune
864 to actions taken by reload and jump.) Then we scan all insns between
865 that point and our target. For each CLOBBER (or for call-clobbered regs
866 when we pass a CALL_INSN), mark the appropriate registers are dead. For
867 a SET, mark them as live.
869 We have to be careful when using REG_DEAD notes because they are not
870 updated by such things as find_equiv_reg. So keep track of registers
871 marked as dead that haven't been assigned to, and mark them dead at the
872 next CODE_LABEL since reload and jump won't propagate values across labels.
874 If we cannot find the start of a basic block (should be a very rare
875 case, if it can happen at all), mark everything as potentially live.
877 Next, scan forward from TARGET looking for things set or clobbered
878 before they are used. These are not live.
880 Because we can be called many times on the same target, save our results
881 in a hash table indexed by INSN_UID. This is only done if the function
882 init_resource_info () was invoked before we are called. */
884 void
885 mark_target_live_regs (insns, target, res)
886 rtx insns;
887 rtx target;
888 struct resources *res;
890 int b = -1;
891 int i;
892 struct target_info *tinfo = NULL;
893 rtx insn;
894 rtx jump_insn = 0;
895 rtx jump_target;
896 HARD_REG_SET scratch;
897 struct resources set, needed;
899 /* Handle end of function. */
900 if (target == 0)
902 *res = end_of_function_needs;
903 return;
906 /* We have to assume memory is needed, but the CC isn't. */
907 res->memory = 1;
908 res->volatil = res->unch_memory = 0;
909 res->cc = 0;
911 /* See if we have computed this value already. */
912 if (target_hash_table != NULL)
914 for (tinfo = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
915 tinfo; tinfo = tinfo->next)
916 if (tinfo->uid == INSN_UID (target))
917 break;
919 /* Start by getting the basic block number. If we have saved
920 information, we can get it from there unless the insn at the
921 start of the basic block has been deleted. */
922 if (tinfo && tinfo->block != -1
923 && ! INSN_DELETED_P (BLOCK_HEAD (tinfo->block)))
924 b = tinfo->block;
927 if (b == -1)
928 b = find_basic_block (target);
930 if (target_hash_table != NULL)
932 if (tinfo)
934 /* If the information is up-to-date, use it. Otherwise, we will
935 update it below. */
936 if (b == tinfo->block && b != -1 && tinfo->bb_tick == bb_ticks[b])
938 COPY_HARD_REG_SET (res->regs, tinfo->live_regs);
939 return;
942 else
944 /* Allocate a place to put our results and chain it into the
945 hash table. */
946 tinfo = (struct target_info *) xmalloc (sizeof (struct target_info));
947 tinfo->uid = INSN_UID (target);
948 tinfo->block = b;
949 tinfo->next = target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME];
950 target_hash_table[INSN_UID (target) % TARGET_HASH_PRIME] = tinfo;
954 CLEAR_HARD_REG_SET (pending_dead_regs);
956 /* If we found a basic block, get the live registers from it and update
957 them with anything set or killed between its start and the insn before
958 TARGET. Otherwise, we must assume everything is live. */
959 if (b != -1)
961 regset regs_live = BASIC_BLOCK (b)->global_live_at_start;
962 unsigned int j;
963 unsigned int regno;
964 rtx start_insn, stop_insn;
966 /* Compute hard regs live at start of block -- this is the real hard regs
967 marked live, plus live pseudo regs that have been renumbered to
968 hard regs. */
970 REG_SET_TO_HARD_REG_SET (current_live_regs, regs_live);
972 EXECUTE_IF_SET_IN_REG_SET
973 (regs_live, FIRST_PSEUDO_REGISTER, i,
975 if (reg_renumber[i] >= 0)
977 regno = reg_renumber[i];
978 for (j = regno;
979 j < regno + HARD_REGNO_NREGS (regno,
980 PSEUDO_REGNO_MODE (i));
981 j++)
982 SET_HARD_REG_BIT (current_live_regs, j);
986 /* Get starting and ending insn, handling the case where each might
987 be a SEQUENCE. */
988 start_insn = (b == 0 ? insns : BLOCK_HEAD (b));
989 stop_insn = target;
991 if (GET_CODE (start_insn) == INSN
992 && GET_CODE (PATTERN (start_insn)) == SEQUENCE)
993 start_insn = XVECEXP (PATTERN (start_insn), 0, 0);
995 if (GET_CODE (stop_insn) == INSN
996 && GET_CODE (PATTERN (stop_insn)) == SEQUENCE)
997 stop_insn = next_insn (PREV_INSN (stop_insn));
999 for (insn = start_insn; insn != stop_insn;
1000 insn = next_insn_no_annul (insn))
1002 rtx link;
1003 rtx real_insn = insn;
1005 /* If this insn is from the target of a branch, it isn't going to
1006 be used in the sequel. If it is used in both cases, this
1007 test will not be true. */
1008 if (INSN_FROM_TARGET_P (insn))
1009 continue;
1011 /* If this insn is a USE made by update_block, we care about the
1012 underlying insn. */
1013 if (GET_CODE (insn) == INSN && GET_CODE (PATTERN (insn)) == USE
1014 && INSN_P (XEXP (PATTERN (insn), 0)))
1015 real_insn = XEXP (PATTERN (insn), 0);
1017 if (GET_CODE (real_insn) == CALL_INSN)
1019 /* CALL clobbers all call-used regs that aren't fixed except
1020 sp, ap, and fp. Do this before setting the result of the
1021 call live. */
1022 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1023 if (call_used_regs[i]
1024 && i != STACK_POINTER_REGNUM && i != FRAME_POINTER_REGNUM
1025 && i != ARG_POINTER_REGNUM
1026 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1027 && i != HARD_FRAME_POINTER_REGNUM
1028 #endif
1029 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
1030 && ! (i == ARG_POINTER_REGNUM && fixed_regs[i])
1031 #endif
1032 #if defined (PIC_OFFSET_TABLE_REGNUM) && !defined (PIC_OFFSET_TABLE_REG_CALL_CLOBBERED)
1033 && ! (i == PIC_OFFSET_TABLE_REGNUM && flag_pic)
1034 #endif
1036 CLEAR_HARD_REG_BIT (current_live_regs, i);
1038 /* A CALL_INSN sets any global register live, since it may
1039 have been modified by the call. */
1040 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1041 if (global_regs[i])
1042 SET_HARD_REG_BIT (current_live_regs, i);
1045 /* Mark anything killed in an insn to be deadened at the next
1046 label. Ignore USE insns; the only REG_DEAD notes will be for
1047 parameters. But they might be early. A CALL_INSN will usually
1048 clobber registers used for parameters. It isn't worth bothering
1049 with the unlikely case when it won't. */
1050 if ((GET_CODE (real_insn) == INSN
1051 && GET_CODE (PATTERN (real_insn)) != USE
1052 && GET_CODE (PATTERN (real_insn)) != CLOBBER)
1053 || GET_CODE (real_insn) == JUMP_INSN
1054 || GET_CODE (real_insn) == CALL_INSN)
1056 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1057 if (REG_NOTE_KIND (link) == REG_DEAD
1058 && GET_CODE (XEXP (link, 0)) == REG
1059 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1061 int first_regno = REGNO (XEXP (link, 0));
1062 int last_regno
1063 = (first_regno
1064 + HARD_REGNO_NREGS (first_regno,
1065 GET_MODE (XEXP (link, 0))));
1067 for (i = first_regno; i < last_regno; i++)
1068 SET_HARD_REG_BIT (pending_dead_regs, i);
1071 note_stores (PATTERN (real_insn), update_live_status, NULL);
1073 /* If any registers were unused after this insn, kill them.
1074 These notes will always be accurate. */
1075 for (link = REG_NOTES (real_insn); link; link = XEXP (link, 1))
1076 if (REG_NOTE_KIND (link) == REG_UNUSED
1077 && GET_CODE (XEXP (link, 0)) == REG
1078 && REGNO (XEXP (link, 0)) < FIRST_PSEUDO_REGISTER)
1080 int first_regno = REGNO (XEXP (link, 0));
1081 int last_regno
1082 = (first_regno
1083 + HARD_REGNO_NREGS (first_regno,
1084 GET_MODE (XEXP (link, 0))));
1086 for (i = first_regno; i < last_regno; i++)
1087 CLEAR_HARD_REG_BIT (current_live_regs, i);
1091 else if (GET_CODE (real_insn) == CODE_LABEL)
1093 /* A label clobbers the pending dead registers since neither
1094 reload nor jump will propagate a value across a label. */
1095 AND_COMPL_HARD_REG_SET (current_live_regs, pending_dead_regs);
1096 CLEAR_HARD_REG_SET (pending_dead_regs);
1099 /* The beginning of the epilogue corresponds to the end of the
1100 RTL chain when there are no epilogue insns. Certain resources
1101 are implicitly required at that point. */
1102 else if (GET_CODE (real_insn) == NOTE
1103 && NOTE_LINE_NUMBER (real_insn) == NOTE_INSN_EPILOGUE_BEG)
1104 IOR_HARD_REG_SET (current_live_regs, start_of_epilogue_needs.regs);
1107 COPY_HARD_REG_SET (res->regs, current_live_regs);
1108 if (tinfo != NULL)
1110 tinfo->block = b;
1111 tinfo->bb_tick = bb_ticks[b];
1114 else
1115 /* We didn't find the start of a basic block. Assume everything
1116 in use. This should happen only extremely rarely. */
1117 SET_HARD_REG_SET (res->regs);
1119 CLEAR_RESOURCE (&set);
1120 CLEAR_RESOURCE (&needed);
1122 jump_insn = find_dead_or_set_registers (target, res, &jump_target, 0,
1123 set, needed);
1125 /* If we hit an unconditional branch, we have another way of finding out
1126 what is live: we can see what is live at the branch target and include
1127 anything used but not set before the branch. We add the live
1128 resources found using the test below to those found until now. */
1130 if (jump_insn)
1132 struct resources new_resources;
1133 rtx stop_insn = next_active_insn (jump_insn);
1135 mark_target_live_regs (insns, next_active_insn (jump_target),
1136 &new_resources);
1137 CLEAR_RESOURCE (&set);
1138 CLEAR_RESOURCE (&needed);
1140 /* Include JUMP_INSN in the needed registers. */
1141 for (insn = target; insn != stop_insn; insn = next_active_insn (insn))
1143 mark_referenced_resources (insn, &needed, 1);
1145 COPY_HARD_REG_SET (scratch, needed.regs);
1146 AND_COMPL_HARD_REG_SET (scratch, set.regs);
1147 IOR_HARD_REG_SET (new_resources.regs, scratch);
1149 mark_set_resources (insn, &set, 0, MARK_SRC_DEST_CALL);
1152 IOR_HARD_REG_SET (res->regs, new_resources.regs);
1155 if (tinfo != NULL)
1157 COPY_HARD_REG_SET (tinfo->live_regs, res->regs);
1161 /* Initialize the resources required by mark_target_live_regs ().
1162 This should be invoked before the first call to mark_target_live_regs. */
1164 void
1165 init_resource_info (epilogue_insn)
1166 rtx epilogue_insn;
1168 int i;
1170 /* Indicate what resources are required to be valid at the end of the current
1171 function. The condition code never is and memory always is. If the
1172 frame pointer is needed, it is and so is the stack pointer unless
1173 EXIT_IGNORE_STACK is non-zero. If the frame pointer is not needed, the
1174 stack pointer is. Registers used to return the function value are
1175 needed. Registers holding global variables are needed. */
1177 end_of_function_needs.cc = 0;
1178 end_of_function_needs.memory = 1;
1179 end_of_function_needs.unch_memory = 0;
1180 CLEAR_HARD_REG_SET (end_of_function_needs.regs);
1182 if (frame_pointer_needed)
1184 SET_HARD_REG_BIT (end_of_function_needs.regs, FRAME_POINTER_REGNUM);
1185 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
1186 SET_HARD_REG_BIT (end_of_function_needs.regs, HARD_FRAME_POINTER_REGNUM);
1187 #endif
1188 #ifdef EXIT_IGNORE_STACK
1189 if (! EXIT_IGNORE_STACK
1190 || current_function_sp_is_unchanging)
1191 #endif
1192 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1194 else
1195 SET_HARD_REG_BIT (end_of_function_needs.regs, STACK_POINTER_REGNUM);
1197 if (current_function_return_rtx != 0)
1198 mark_referenced_resources (current_function_return_rtx,
1199 &end_of_function_needs, 1);
1201 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
1202 if (global_regs[i]
1203 #ifdef EPILOGUE_USES
1204 || EPILOGUE_USES (i)
1205 #endif
1207 SET_HARD_REG_BIT (end_of_function_needs.regs, i);
1209 /* The registers required to be live at the end of the function are
1210 represented in the flow information as being dead just prior to
1211 reaching the end of the function. For example, the return of a value
1212 might be represented by a USE of the return register immediately
1213 followed by an unconditional jump to the return label where the
1214 return label is the end of the RTL chain. The end of the RTL chain
1215 is then taken to mean that the return register is live.
1217 This sequence is no longer maintained when epilogue instructions are
1218 added to the RTL chain. To reconstruct the original meaning, the
1219 start of the epilogue (NOTE_INSN_EPILOGUE_BEG) is regarded as the
1220 point where these registers become live (start_of_epilogue_needs).
1221 If epilogue instructions are present, the registers set by those
1222 instructions won't have been processed by flow. Thus, those
1223 registers are additionally required at the end of the RTL chain
1224 (end_of_function_needs). */
1226 start_of_epilogue_needs = end_of_function_needs;
1228 while ((epilogue_insn = next_nonnote_insn (epilogue_insn)))
1229 mark_set_resources (epilogue_insn, &end_of_function_needs, 0,
1230 MARK_SRC_DEST_CALL);
1232 /* Allocate and initialize the tables used by mark_target_live_regs. */
1233 target_hash_table = (struct target_info **)
1234 xcalloc (TARGET_HASH_PRIME, sizeof (struct target_info *));
1235 bb_ticks = (int *) xcalloc (n_basic_blocks, sizeof (int));
1238 /* Free up the resources allcated to mark_target_live_regs (). This
1239 should be invoked after the last call to mark_target_live_regs (). */
1241 void
1242 free_resource_info ()
1244 if (target_hash_table != NULL)
1246 int i;
1248 for (i = 0; i < TARGET_HASH_PRIME; ++i)
1250 struct target_info *ti = target_hash_table[i];
1252 while (ti)
1254 struct target_info *next = ti->next;
1255 free (ti);
1256 ti = next;
1260 free (target_hash_table);
1261 target_hash_table = NULL;
1264 if (bb_ticks != NULL)
1266 free (bb_ticks);
1267 bb_ticks = NULL;
1271 /* Clear any hashed information that we have stored for INSN. */
1273 void
1274 clear_hashed_info_for_insn (insn)
1275 rtx insn;
1277 struct target_info *tinfo;
1279 if (target_hash_table != NULL)
1281 for (tinfo = target_hash_table[INSN_UID (insn) % TARGET_HASH_PRIME];
1282 tinfo; tinfo = tinfo->next)
1283 if (tinfo->uid == INSN_UID (insn))
1284 break;
1286 if (tinfo)
1287 tinfo->block = -1;
1291 /* Increment the tick count for the basic block that contains INSN. */
1293 void
1294 incr_ticks_for_insn (insn)
1295 rtx insn;
1297 int b = find_basic_block (insn);
1299 if (b != -1)
1300 bb_ticks[b]++;
1303 /* Add TRIAL to the set of resources used at the end of the current
1304 function. */
1305 void
1306 mark_end_of_function_resources (trial, include_delayed_effects)
1307 rtx trial;
1308 int include_delayed_effects;
1310 mark_referenced_resources (trial, &end_of_function_needs,
1311 include_delayed_effects);