1 /* Convert tree expression to rtl instructions, for GNU compiler.
2 Copyright (C) 1988-2019 Free Software Foundation, Inc.
4 This file is part of GCC.
6 GCC is free software; you can redistribute it and/or modify it under
7 the terms of the GNU General Public License as published by the Free
8 Software Foundation; either version 3, or (at your option) any later
11 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
12 WARRANTY; without even the implied warranty of MERCHANTABILITY or
13 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 You should have received a copy of the GNU General Public License
17 along with GCC; see the file COPYING3. If not see
18 <http://www.gnu.org/licenses/>. */
22 #include "coretypes.h"
38 #include "diagnostic.h"
40 #include "fold-const.h"
41 #include "stor-layout.h"
45 #include "insn-attr.h"
50 /* Include expr.h after insn-config.h so we get HAVE_conditional_move. */
52 #include "optabs-tree.h"
55 #include "langhooks.h"
56 #include "common/common-target.h"
58 #include "tree-ssa-live.h"
59 #include "tree-outof-ssa.h"
60 #include "tree-ssa-address.h"
63 #include "gimple-fold.h"
64 #include "rtx-vector-builder.h"
67 /* If this is nonzero, we do not bother generating VOLATILE
68 around volatile memory references, and we are willing to
69 output indirect addresses. If cse is to follow, we reject
70 indirect addresses so a useful potential cse is generated;
71 if it is used only once, instruction combination will produce
72 the same indirect address eventually. */
75 static bool block_move_libcall_safe_for_call_parm (void);
76 static bool emit_block_move_via_cpymem (rtx
, rtx
, rtx
, unsigned, unsigned, HOST_WIDE_INT
,
77 unsigned HOST_WIDE_INT
, unsigned HOST_WIDE_INT
,
78 unsigned HOST_WIDE_INT
);
79 static void emit_block_move_via_loop (rtx
, rtx
, rtx
, unsigned);
80 static void clear_by_pieces (rtx
, unsigned HOST_WIDE_INT
, unsigned int);
81 static rtx_insn
*compress_float_constant (rtx
, rtx
);
82 static rtx
get_subtarget (rtx
);
83 static void store_constructor (tree
, rtx
, int, poly_int64
, bool);
84 static rtx
store_field (rtx
, poly_int64
, poly_int64
, poly_uint64
, poly_uint64
,
85 machine_mode
, tree
, alias_set_type
, bool, bool);
87 static unsigned HOST_WIDE_INT
highest_pow2_factor_for_target (const_tree
, const_tree
);
89 static int is_aligning_offset (const_tree
, const_tree
);
90 static rtx
reduce_to_bit_field_precision (rtx
, rtx
, tree
);
91 static rtx
do_store_flag (sepops
, rtx
, machine_mode
);
93 static void emit_single_push_insn (machine_mode
, rtx
, tree
);
95 static void do_tablejump (rtx
, machine_mode
, rtx
, rtx
, rtx
,
97 static rtx
const_vector_from_tree (tree
);
98 static rtx
const_scalar_mask_from_tree (scalar_int_mode
, tree
);
99 static tree
tree_expr_size (const_tree
);
100 static HOST_WIDE_INT
int_expr_size (tree
);
101 static void convert_mode_scalar (rtx
, rtx
, int);
104 /* This is run to set up which modes can be used
105 directly in memory and to initialize the block move optab. It is run
106 at the beginning of compilation and when the target is reinitialized. */
109 init_expr_target (void)
116 /* Try indexing by frame ptr and try by stack ptr.
117 It is known that on the Convex the stack ptr isn't a valid index.
118 With luck, one or the other is valid on any machine. */
119 mem
= gen_rtx_MEM (word_mode
, stack_pointer_rtx
);
120 mem1
= gen_rtx_MEM (word_mode
, frame_pointer_rtx
);
122 /* A scratch register we can modify in-place below to avoid
123 useless RTL allocations. */
124 reg
= gen_rtx_REG (word_mode
, LAST_VIRTUAL_REGISTER
+ 1);
126 rtx_insn
*insn
= as_a
<rtx_insn
*> (rtx_alloc (INSN
));
127 pat
= gen_rtx_SET (NULL_RTX
, NULL_RTX
);
128 PATTERN (insn
) = pat
;
130 for (machine_mode mode
= VOIDmode
; (int) mode
< NUM_MACHINE_MODES
;
131 mode
= (machine_mode
) ((int) mode
+ 1))
135 direct_load
[(int) mode
] = direct_store
[(int) mode
] = 0;
136 PUT_MODE (mem
, mode
);
137 PUT_MODE (mem1
, mode
);
139 /* See if there is some register that can be used in this mode and
140 directly loaded or stored from memory. */
142 if (mode
!= VOIDmode
&& mode
!= BLKmode
)
143 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
144 && (direct_load
[(int) mode
] == 0 || direct_store
[(int) mode
] == 0);
147 if (!targetm
.hard_regno_mode_ok (regno
, mode
))
150 set_mode_and_regno (reg
, mode
, regno
);
153 SET_DEST (pat
) = reg
;
154 if (recog (pat
, insn
, &num_clobbers
) >= 0)
155 direct_load
[(int) mode
] = 1;
157 SET_SRC (pat
) = mem1
;
158 SET_DEST (pat
) = reg
;
159 if (recog (pat
, insn
, &num_clobbers
) >= 0)
160 direct_load
[(int) mode
] = 1;
163 SET_DEST (pat
) = mem
;
164 if (recog (pat
, insn
, &num_clobbers
) >= 0)
165 direct_store
[(int) mode
] = 1;
168 SET_DEST (pat
) = mem1
;
169 if (recog (pat
, insn
, &num_clobbers
) >= 0)
170 direct_store
[(int) mode
] = 1;
174 mem
= gen_rtx_MEM (VOIDmode
, gen_raw_REG (Pmode
, LAST_VIRTUAL_REGISTER
+ 1));
176 opt_scalar_float_mode mode_iter
;
177 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_FLOAT
)
179 scalar_float_mode mode
= mode_iter
.require ();
180 scalar_float_mode srcmode
;
181 FOR_EACH_MODE_UNTIL (srcmode
, mode
)
185 ic
= can_extend_p (mode
, srcmode
, 0);
186 if (ic
== CODE_FOR_nothing
)
189 PUT_MODE (mem
, srcmode
);
191 if (insn_operand_matches (ic
, 1, mem
))
192 float_extend_from_mem
[mode
][srcmode
] = true;
197 /* This is run at the start of compiling a function. */
202 memset (&crtl
->expr
, 0, sizeof (crtl
->expr
));
205 /* Copy data from FROM to TO, where the machine modes are not the same.
206 Both modes may be integer, or both may be floating, or both may be
208 UNSIGNEDP should be nonzero if FROM is an unsigned type.
209 This causes zero-extension instead of sign-extension. */
212 convert_move (rtx to
, rtx from
, int unsignedp
)
214 machine_mode to_mode
= GET_MODE (to
);
215 machine_mode from_mode
= GET_MODE (from
);
217 gcc_assert (to_mode
!= BLKmode
);
218 gcc_assert (from_mode
!= BLKmode
);
220 /* If the source and destination are already the same, then there's
225 /* If FROM is a SUBREG that indicates that we have already done at least
226 the required extension, strip it. We don't handle such SUBREGs as
229 scalar_int_mode to_int_mode
;
230 if (GET_CODE (from
) == SUBREG
231 && SUBREG_PROMOTED_VAR_P (from
)
232 && is_a
<scalar_int_mode
> (to_mode
, &to_int_mode
)
233 && (GET_MODE_PRECISION (subreg_promoted_mode (from
))
234 >= GET_MODE_PRECISION (to_int_mode
))
235 && SUBREG_CHECK_PROMOTED_SIGN (from
, unsignedp
))
237 from
= gen_lowpart (to_int_mode
, SUBREG_REG (from
));
238 from_mode
= to_int_mode
;
241 gcc_assert (GET_CODE (to
) != SUBREG
|| !SUBREG_PROMOTED_VAR_P (to
));
243 if (to_mode
== from_mode
244 || (from_mode
== VOIDmode
&& CONSTANT_P (from
)))
246 emit_move_insn (to
, from
);
250 if (VECTOR_MODE_P (to_mode
) || VECTOR_MODE_P (from_mode
))
252 gcc_assert (known_eq (GET_MODE_BITSIZE (from_mode
),
253 GET_MODE_BITSIZE (to_mode
)));
255 if (VECTOR_MODE_P (to_mode
))
256 from
= simplify_gen_subreg (to_mode
, from
, GET_MODE (from
), 0);
258 to
= simplify_gen_subreg (from_mode
, to
, GET_MODE (to
), 0);
260 emit_move_insn (to
, from
);
264 if (GET_CODE (to
) == CONCAT
&& GET_CODE (from
) == CONCAT
)
266 convert_move (XEXP (to
, 0), XEXP (from
, 0), unsignedp
);
267 convert_move (XEXP (to
, 1), XEXP (from
, 1), unsignedp
);
271 convert_mode_scalar (to
, from
, unsignedp
);
274 /* Like convert_move, but deals only with scalar modes. */
277 convert_mode_scalar (rtx to
, rtx from
, int unsignedp
)
279 /* Both modes should be scalar types. */
280 scalar_mode from_mode
= as_a
<scalar_mode
> (GET_MODE (from
));
281 scalar_mode to_mode
= as_a
<scalar_mode
> (GET_MODE (to
));
282 bool to_real
= SCALAR_FLOAT_MODE_P (to_mode
);
283 bool from_real
= SCALAR_FLOAT_MODE_P (from_mode
);
287 gcc_assert (to_real
== from_real
);
289 /* rtx code for making an equivalent value. */
290 enum rtx_code equiv_code
= (unsignedp
< 0 ? UNKNOWN
291 : (unsignedp
? ZERO_EXTEND
: SIGN_EXTEND
));
299 gcc_assert ((GET_MODE_PRECISION (from_mode
)
300 != GET_MODE_PRECISION (to_mode
))
301 || (DECIMAL_FLOAT_MODE_P (from_mode
)
302 != DECIMAL_FLOAT_MODE_P (to_mode
)));
304 if (GET_MODE_PRECISION (from_mode
) == GET_MODE_PRECISION (to_mode
))
305 /* Conversion between decimal float and binary float, same size. */
306 tab
= DECIMAL_FLOAT_MODE_P (from_mode
) ? trunc_optab
: sext_optab
;
307 else if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
))
312 /* Try converting directly if the insn is supported. */
314 code
= convert_optab_handler (tab
, to_mode
, from_mode
);
315 if (code
!= CODE_FOR_nothing
)
317 emit_unop_insn (code
, to
, from
,
318 tab
== sext_optab
? FLOAT_EXTEND
: FLOAT_TRUNCATE
);
322 /* Otherwise use a libcall. */
323 libcall
= convert_optab_libfunc (tab
, to_mode
, from_mode
);
325 /* Is this conversion implemented yet? */
326 gcc_assert (libcall
);
329 value
= emit_library_call_value (libcall
, NULL_RTX
, LCT_CONST
, to_mode
,
331 insns
= get_insns ();
333 emit_libcall_block (insns
, to
, value
,
334 tab
== trunc_optab
? gen_rtx_FLOAT_TRUNCATE (to_mode
,
336 : gen_rtx_FLOAT_EXTEND (to_mode
, from
));
340 /* Handle pointer conversion. */ /* SPEE 900220. */
341 /* If the target has a converter from FROM_MODE to TO_MODE, use it. */
345 if (GET_MODE_PRECISION (from_mode
) > GET_MODE_PRECISION (to_mode
))
352 if (convert_optab_handler (ctab
, to_mode
, from_mode
)
355 emit_unop_insn (convert_optab_handler (ctab
, to_mode
, from_mode
),
361 /* Targets are expected to provide conversion insns between PxImode and
362 xImode for all MODE_PARTIAL_INT modes they use, but no others. */
363 if (GET_MODE_CLASS (to_mode
) == MODE_PARTIAL_INT
)
365 scalar_int_mode full_mode
366 = smallest_int_mode_for_size (GET_MODE_BITSIZE (to_mode
));
368 gcc_assert (convert_optab_handler (trunc_optab
, to_mode
, full_mode
)
369 != CODE_FOR_nothing
);
371 if (full_mode
!= from_mode
)
372 from
= convert_to_mode (full_mode
, from
, unsignedp
);
373 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, full_mode
),
377 if (GET_MODE_CLASS (from_mode
) == MODE_PARTIAL_INT
)
380 scalar_int_mode full_mode
381 = smallest_int_mode_for_size (GET_MODE_BITSIZE (from_mode
));
382 convert_optab ctab
= unsignedp
? zext_optab
: sext_optab
;
383 enum insn_code icode
;
385 icode
= convert_optab_handler (ctab
, full_mode
, from_mode
);
386 gcc_assert (icode
!= CODE_FOR_nothing
);
388 if (to_mode
== full_mode
)
390 emit_unop_insn (icode
, to
, from
, UNKNOWN
);
394 new_from
= gen_reg_rtx (full_mode
);
395 emit_unop_insn (icode
, new_from
, from
, UNKNOWN
);
397 /* else proceed to integer conversions below. */
398 from_mode
= full_mode
;
402 /* Make sure both are fixed-point modes or both are not. */
403 gcc_assert (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
) ==
404 ALL_SCALAR_FIXED_POINT_MODE_P (to_mode
));
405 if (ALL_SCALAR_FIXED_POINT_MODE_P (from_mode
))
407 /* If we widen from_mode to to_mode and they are in the same class,
408 we won't saturate the result.
409 Otherwise, always saturate the result to play safe. */
410 if (GET_MODE_CLASS (from_mode
) == GET_MODE_CLASS (to_mode
)
411 && GET_MODE_SIZE (from_mode
) < GET_MODE_SIZE (to_mode
))
412 expand_fixed_convert (to
, from
, 0, 0);
414 expand_fixed_convert (to
, from
, 0, 1);
418 /* Now both modes are integers. */
420 /* Handle expanding beyond a word. */
421 if (GET_MODE_PRECISION (from_mode
) < GET_MODE_PRECISION (to_mode
)
422 && GET_MODE_PRECISION (to_mode
) > BITS_PER_WORD
)
429 scalar_mode lowpart_mode
;
430 int nwords
= CEIL (GET_MODE_SIZE (to_mode
), UNITS_PER_WORD
);
432 /* Try converting directly if the insn is supported. */
433 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
436 /* If FROM is a SUBREG, put it into a register. Do this
437 so that we always generate the same set of insns for
438 better cse'ing; if an intermediate assignment occurred,
439 we won't be doing the operation directly on the SUBREG. */
440 if (optimize
> 0 && GET_CODE (from
) == SUBREG
)
441 from
= force_reg (from_mode
, from
);
442 emit_unop_insn (code
, to
, from
, equiv_code
);
445 /* Next, try converting via full word. */
446 else if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
447 && ((code
= can_extend_p (to_mode
, word_mode
, unsignedp
))
448 != CODE_FOR_nothing
))
450 rtx word_to
= gen_reg_rtx (word_mode
);
453 if (reg_overlap_mentioned_p (to
, from
))
454 from
= force_reg (from_mode
, from
);
457 convert_move (word_to
, from
, unsignedp
);
458 emit_unop_insn (code
, to
, word_to
, equiv_code
);
462 /* No special multiword conversion insn; do it by hand. */
465 /* Since we will turn this into a no conflict block, we must ensure
466 the source does not overlap the target so force it into an isolated
467 register when maybe so. Likewise for any MEM input, since the
468 conversion sequence might require several references to it and we
469 must ensure we're getting the same value every time. */
471 if (MEM_P (from
) || reg_overlap_mentioned_p (to
, from
))
472 from
= force_reg (from_mode
, from
);
474 /* Get a copy of FROM widened to a word, if necessary. */
475 if (GET_MODE_PRECISION (from_mode
) < BITS_PER_WORD
)
476 lowpart_mode
= word_mode
;
478 lowpart_mode
= from_mode
;
480 lowfrom
= convert_to_mode (lowpart_mode
, from
, unsignedp
);
482 lowpart
= gen_lowpart (lowpart_mode
, to
);
483 emit_move_insn (lowpart
, lowfrom
);
485 /* Compute the value to put in each remaining word. */
487 fill_value
= const0_rtx
;
489 fill_value
= emit_store_flag_force (gen_reg_rtx (word_mode
),
490 LT
, lowfrom
, const0_rtx
,
491 lowpart_mode
, 0, -1);
493 /* Fill the remaining words. */
494 for (i
= GET_MODE_SIZE (lowpart_mode
) / UNITS_PER_WORD
; i
< nwords
; i
++)
496 int index
= (WORDS_BIG_ENDIAN
? nwords
- i
- 1 : i
);
497 rtx subword
= operand_subword (to
, index
, 1, to_mode
);
499 gcc_assert (subword
);
501 if (fill_value
!= subword
)
502 emit_move_insn (subword
, fill_value
);
505 insns
= get_insns ();
512 /* Truncating multi-word to a word or less. */
513 if (GET_MODE_PRECISION (from_mode
) > BITS_PER_WORD
514 && GET_MODE_PRECISION (to_mode
) <= BITS_PER_WORD
)
517 && ! MEM_VOLATILE_P (from
)
518 && direct_load
[(int) to_mode
]
519 && ! mode_dependent_address_p (XEXP (from
, 0),
520 MEM_ADDR_SPACE (from
)))
522 || GET_CODE (from
) == SUBREG
))
523 from
= force_reg (from_mode
, from
);
524 convert_move (to
, gen_lowpart (word_mode
, from
), 0);
528 /* Now follow all the conversions between integers
529 no more than a word long. */
531 /* For truncation, usually we can just refer to FROM in a narrower mode. */
532 if (GET_MODE_BITSIZE (to_mode
) < GET_MODE_BITSIZE (from_mode
)
533 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
, from_mode
))
536 && ! MEM_VOLATILE_P (from
)
537 && direct_load
[(int) to_mode
]
538 && ! mode_dependent_address_p (XEXP (from
, 0),
539 MEM_ADDR_SPACE (from
)))
541 || GET_CODE (from
) == SUBREG
))
542 from
= force_reg (from_mode
, from
);
543 if (REG_P (from
) && REGNO (from
) < FIRST_PSEUDO_REGISTER
544 && !targetm
.hard_regno_mode_ok (REGNO (from
), to_mode
))
545 from
= copy_to_reg (from
);
546 emit_move_insn (to
, gen_lowpart (to_mode
, from
));
550 /* Handle extension. */
551 if (GET_MODE_PRECISION (to_mode
) > GET_MODE_PRECISION (from_mode
))
553 /* Convert directly if that works. */
554 if ((code
= can_extend_p (to_mode
, from_mode
, unsignedp
))
557 emit_unop_insn (code
, to
, from
, equiv_code
);
562 scalar_mode intermediate
;
566 /* Search for a mode to convert via. */
567 opt_scalar_mode intermediate_iter
;
568 FOR_EACH_MODE_FROM (intermediate_iter
, from_mode
)
570 scalar_mode intermediate
= intermediate_iter
.require ();
571 if (((can_extend_p (to_mode
, intermediate
, unsignedp
)
573 || (GET_MODE_SIZE (to_mode
) < GET_MODE_SIZE (intermediate
)
574 && TRULY_NOOP_TRUNCATION_MODES_P (to_mode
,
576 && (can_extend_p (intermediate
, from_mode
, unsignedp
)
577 != CODE_FOR_nothing
))
579 convert_move (to
, convert_to_mode (intermediate
, from
,
580 unsignedp
), unsignedp
);
585 /* No suitable intermediate mode.
586 Generate what we need with shifts. */
587 shift_amount
= (GET_MODE_PRECISION (to_mode
)
588 - GET_MODE_PRECISION (from_mode
));
589 from
= gen_lowpart (to_mode
, force_reg (from_mode
, from
));
590 tmp
= expand_shift (LSHIFT_EXPR
, to_mode
, from
, shift_amount
,
592 tmp
= expand_shift (RSHIFT_EXPR
, to_mode
, tmp
, shift_amount
,
595 emit_move_insn (to
, tmp
);
600 /* Support special truncate insns for certain modes. */
601 if (convert_optab_handler (trunc_optab
, to_mode
,
602 from_mode
) != CODE_FOR_nothing
)
604 emit_unop_insn (convert_optab_handler (trunc_optab
, to_mode
, from_mode
),
609 /* Handle truncation of volatile memrefs, and so on;
610 the things that couldn't be truncated directly,
611 and for which there was no special instruction.
613 ??? Code above formerly short-circuited this, for most integer
614 mode pairs, with a force_reg in from_mode followed by a recursive
615 call to this routine. Appears always to have been wrong. */
616 if (GET_MODE_PRECISION (to_mode
) < GET_MODE_PRECISION (from_mode
))
618 rtx temp
= force_reg (to_mode
, gen_lowpart (to_mode
, from
));
619 emit_move_insn (to
, temp
);
623 /* Mode combination is not recognized. */
627 /* Return an rtx for a value that would result
628 from converting X to mode MODE.
629 Both X and MODE may be floating, or both integer.
630 UNSIGNEDP is nonzero if X is an unsigned value.
631 This can be done by referring to a part of X in place
632 or by copying to a new temporary with conversion. */
635 convert_to_mode (machine_mode mode
, rtx x
, int unsignedp
)
637 return convert_modes (mode
, VOIDmode
, x
, unsignedp
);
640 /* Return an rtx for a value that would result
641 from converting X from mode OLDMODE to mode MODE.
642 Both modes may be floating, or both integer.
643 UNSIGNEDP is nonzero if X is an unsigned value.
645 This can be done by referring to a part of X in place
646 or by copying to a new temporary with conversion.
648 You can give VOIDmode for OLDMODE, if you are sure X has a nonvoid mode. */
651 convert_modes (machine_mode mode
, machine_mode oldmode
, rtx x
, int unsignedp
)
654 scalar_int_mode int_mode
;
656 /* If FROM is a SUBREG that indicates that we have already done at least
657 the required extension, strip it. */
659 if (GET_CODE (x
) == SUBREG
660 && SUBREG_PROMOTED_VAR_P (x
)
661 && is_a
<scalar_int_mode
> (mode
, &int_mode
)
662 && (GET_MODE_PRECISION (subreg_promoted_mode (x
))
663 >= GET_MODE_PRECISION (int_mode
))
664 && SUBREG_CHECK_PROMOTED_SIGN (x
, unsignedp
))
665 x
= gen_lowpart (int_mode
, SUBREG_REG (x
));
667 if (GET_MODE (x
) != VOIDmode
)
668 oldmode
= GET_MODE (x
);
673 if (CONST_SCALAR_INT_P (x
)
674 && is_int_mode (mode
, &int_mode
))
676 /* If the caller did not tell us the old mode, then there is not
677 much to do with respect to canonicalization. We have to
678 assume that all the bits are significant. */
679 if (GET_MODE_CLASS (oldmode
) != MODE_INT
)
680 oldmode
= MAX_MODE_INT
;
681 wide_int w
= wide_int::from (rtx_mode_t (x
, oldmode
),
682 GET_MODE_PRECISION (int_mode
),
683 unsignedp
? UNSIGNED
: SIGNED
);
684 return immed_wide_int_const (w
, int_mode
);
687 /* We can do this with a gen_lowpart if both desired and current modes
688 are integer, and this is either a constant integer, a register, or a
690 scalar_int_mode int_oldmode
;
691 if (is_int_mode (mode
, &int_mode
)
692 && is_int_mode (oldmode
, &int_oldmode
)
693 && GET_MODE_PRECISION (int_mode
) <= GET_MODE_PRECISION (int_oldmode
)
694 && ((MEM_P (x
) && !MEM_VOLATILE_P (x
) && direct_load
[(int) int_mode
])
695 || CONST_POLY_INT_P (x
)
697 && (!HARD_REGISTER_P (x
)
698 || targetm
.hard_regno_mode_ok (REGNO (x
), int_mode
))
699 && TRULY_NOOP_TRUNCATION_MODES_P (int_mode
, GET_MODE (x
)))))
700 return gen_lowpart (int_mode
, x
);
702 /* Converting from integer constant into mode is always equivalent to an
704 if (VECTOR_MODE_P (mode
) && GET_MODE (x
) == VOIDmode
)
706 gcc_assert (known_eq (GET_MODE_BITSIZE (mode
),
707 GET_MODE_BITSIZE (oldmode
)));
708 return simplify_gen_subreg (mode
, x
, oldmode
, 0);
711 temp
= gen_reg_rtx (mode
);
712 convert_move (temp
, x
, unsignedp
);
716 /* Return the largest alignment we can use for doing a move (or store)
717 of MAX_PIECES. ALIGN is the largest alignment we could use. */
720 alignment_for_piecewise_move (unsigned int max_pieces
, unsigned int align
)
722 scalar_int_mode tmode
723 = int_mode_for_size (max_pieces
* BITS_PER_UNIT
, 1).require ();
725 if (align
>= GET_MODE_ALIGNMENT (tmode
))
726 align
= GET_MODE_ALIGNMENT (tmode
);
729 scalar_int_mode xmode
= NARROWEST_INT_MODE
;
730 opt_scalar_int_mode mode_iter
;
731 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
733 tmode
= mode_iter
.require ();
734 if (GET_MODE_SIZE (tmode
) > max_pieces
735 || targetm
.slow_unaligned_access (tmode
, align
))
740 align
= MAX (align
, GET_MODE_ALIGNMENT (xmode
));
746 /* Return the widest integer mode that is narrower than SIZE bytes. */
748 static scalar_int_mode
749 widest_int_mode_for_size (unsigned int size
)
751 scalar_int_mode result
= NARROWEST_INT_MODE
;
753 gcc_checking_assert (size
> 1);
755 opt_scalar_int_mode tmode
;
756 FOR_EACH_MODE_IN_CLASS (tmode
, MODE_INT
)
757 if (GET_MODE_SIZE (tmode
.require ()) < size
)
758 result
= tmode
.require ();
763 /* Determine whether an operation OP on LEN bytes with alignment ALIGN can
764 and should be performed piecewise. */
767 can_do_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
,
768 enum by_pieces_operation op
)
770 return targetm
.use_by_pieces_infrastructure_p (len
, align
, op
,
771 optimize_insn_for_speed_p ());
774 /* Determine whether the LEN bytes can be moved by using several move
775 instructions. Return nonzero if a call to move_by_pieces should
779 can_move_by_pieces (unsigned HOST_WIDE_INT len
, unsigned int align
)
781 return can_do_by_pieces (len
, align
, MOVE_BY_PIECES
);
784 /* Return number of insns required to perform operation OP by pieces
785 for L bytes. ALIGN (in bits) is maximum alignment we can assume. */
787 unsigned HOST_WIDE_INT
788 by_pieces_ninsns (unsigned HOST_WIDE_INT l
, unsigned int align
,
789 unsigned int max_size
, by_pieces_operation op
)
791 unsigned HOST_WIDE_INT n_insns
= 0;
793 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
795 while (max_size
> 1 && l
> 0)
797 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
798 enum insn_code icode
;
800 unsigned int modesize
= GET_MODE_SIZE (mode
);
802 icode
= optab_handler (mov_optab
, mode
);
803 if (icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
))
805 unsigned HOST_WIDE_INT n_pieces
= l
/ modesize
;
813 case COMPARE_BY_PIECES
:
814 int batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
815 int batch_ops
= 4 * batch
- 1;
816 unsigned HOST_WIDE_INT full
= n_pieces
/ batch
;
817 n_insns
+= full
* batch_ops
;
818 if (n_pieces
% batch
!= 0)
831 /* Used when performing piecewise block operations, holds information
832 about one of the memory objects involved. The member functions
833 can be used to generate code for loading from the object and
834 updating the address when iterating. */
838 /* The object being referenced, a MEM. Can be NULL_RTX to indicate
841 /* The address of the object. Can differ from that seen in the
842 MEM rtx if we copied the address to a register. */
844 /* Nonzero if the address on the object has an autoincrement already,
845 signifies whether that was an increment or decrement. */
846 signed char m_addr_inc
;
847 /* Nonzero if we intend to use autoinc without the address already
848 having autoinc form. We will insert add insns around each memory
849 reference, expecting later passes to form autoinc addressing modes.
850 The only supported options are predecrement and postincrement. */
851 signed char m_explicit_inc
;
852 /* True if we have either of the two possible cases of using
855 /* True if this is an address to be used for load operations rather
859 /* Optionally, a function to obtain constants for any given offset into
860 the objects, and data associated with it. */
861 by_pieces_constfn m_constfn
;
864 pieces_addr (rtx
, bool, by_pieces_constfn
, void *);
865 rtx
adjust (scalar_int_mode
, HOST_WIDE_INT
);
866 void increment_address (HOST_WIDE_INT
);
867 void maybe_predec (HOST_WIDE_INT
);
868 void maybe_postinc (HOST_WIDE_INT
);
869 void decide_autoinc (machine_mode
, bool, HOST_WIDE_INT
);
876 /* Initialize a pieces_addr structure from an object OBJ. IS_LOAD is
877 true if the operation to be performed on this object is a load
878 rather than a store. For stores, OBJ can be NULL, in which case we
879 assume the operation is a stack push. For loads, the optional
880 CONSTFN and its associated CFNDATA can be used in place of the
883 pieces_addr::pieces_addr (rtx obj
, bool is_load
, by_pieces_constfn constfn
,
885 : m_obj (obj
), m_is_load (is_load
), m_constfn (constfn
), m_cfndata (cfndata
)
891 rtx addr
= XEXP (obj
, 0);
892 rtx_code code
= GET_CODE (addr
);
894 bool dec
= code
== PRE_DEC
|| code
== POST_DEC
;
895 bool inc
= code
== PRE_INC
|| code
== POST_INC
;
898 m_addr_inc
= dec
? -1 : 1;
900 /* While we have always looked for these codes here, the code
901 implementing the memory operation has never handled them.
902 Support could be added later if necessary or beneficial. */
903 gcc_assert (code
!= PRE_INC
&& code
!= POST_DEC
);
911 if (STACK_GROWS_DOWNWARD
)
917 gcc_assert (constfn
!= NULL
);
921 gcc_assert (is_load
);
924 /* Decide whether to use autoinc for an address involved in a memory op.
925 MODE is the mode of the accesses, REVERSE is true if we've decided to
926 perform the operation starting from the end, and LEN is the length of
927 the operation. Don't override an earlier decision to set m_auto. */
930 pieces_addr::decide_autoinc (machine_mode
ARG_UNUSED (mode
), bool reverse
,
933 if (m_auto
|| m_obj
== NULL_RTX
)
936 bool use_predec
= (m_is_load
937 ? USE_LOAD_PRE_DECREMENT (mode
)
938 : USE_STORE_PRE_DECREMENT (mode
));
939 bool use_postinc
= (m_is_load
940 ? USE_LOAD_POST_INCREMENT (mode
)
941 : USE_STORE_POST_INCREMENT (mode
));
942 machine_mode addr_mode
= get_address_mode (m_obj
);
944 if (use_predec
&& reverse
)
946 m_addr
= copy_to_mode_reg (addr_mode
,
947 plus_constant (addr_mode
,
952 else if (use_postinc
&& !reverse
)
954 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
958 else if (CONSTANT_P (m_addr
))
959 m_addr
= copy_to_mode_reg (addr_mode
, m_addr
);
962 /* Adjust the address to refer to the data at OFFSET in MODE. If we
963 are using autoincrement for this address, we don't add the offset,
964 but we still modify the MEM's properties. */
967 pieces_addr::adjust (scalar_int_mode mode
, HOST_WIDE_INT offset
)
970 return m_constfn (m_cfndata
, offset
, mode
);
971 if (m_obj
== NULL_RTX
)
974 return adjust_automodify_address (m_obj
, mode
, m_addr
, offset
);
976 return adjust_address (m_obj
, mode
, offset
);
979 /* Emit an add instruction to increment the address by SIZE. */
982 pieces_addr::increment_address (HOST_WIDE_INT size
)
984 rtx amount
= gen_int_mode (size
, GET_MODE (m_addr
));
985 emit_insn (gen_add2_insn (m_addr
, amount
));
988 /* If we are supposed to decrement the address after each access, emit code
989 to do so now. Increment by SIZE (which has should have the correct sign
993 pieces_addr::maybe_predec (HOST_WIDE_INT size
)
995 if (m_explicit_inc
>= 0)
997 gcc_assert (HAVE_PRE_DECREMENT
);
998 increment_address (size
);
1001 /* If we are supposed to decrement the address after each access, emit code
1002 to do so now. Increment by SIZE. */
1005 pieces_addr::maybe_postinc (HOST_WIDE_INT size
)
1007 if (m_explicit_inc
<= 0)
1009 gcc_assert (HAVE_POST_INCREMENT
);
1010 increment_address (size
);
1013 /* This structure is used by do_op_by_pieces to describe the operation
1016 class op_by_pieces_d
1019 pieces_addr m_to
, m_from
;
1020 unsigned HOST_WIDE_INT m_len
;
1021 HOST_WIDE_INT m_offset
;
1022 unsigned int m_align
;
1023 unsigned int m_max_size
;
1026 /* Virtual functions, overriden by derived classes for the specific
1028 virtual void generate (rtx
, rtx
, machine_mode
) = 0;
1029 virtual bool prepare_mode (machine_mode
, unsigned int) = 0;
1030 virtual void finish_mode (machine_mode
)
1035 op_by_pieces_d (rtx
, bool, rtx
, bool, by_pieces_constfn
, void *,
1036 unsigned HOST_WIDE_INT
, unsigned int);
1040 /* The constructor for an op_by_pieces_d structure. We require two
1041 objects named TO and FROM, which are identified as loads or stores
1042 by TO_LOAD and FROM_LOAD. If FROM is a load, the optional FROM_CFN
1043 and its associated FROM_CFN_DATA can be used to replace loads with
1044 constant values. LEN describes the length of the operation. */
1046 op_by_pieces_d::op_by_pieces_d (rtx to
, bool to_load
,
1047 rtx from
, bool from_load
,
1048 by_pieces_constfn from_cfn
,
1049 void *from_cfn_data
,
1050 unsigned HOST_WIDE_INT len
,
1052 : m_to (to
, to_load
, NULL
, NULL
),
1053 m_from (from
, from_load
, from_cfn
, from_cfn_data
),
1054 m_len (len
), m_max_size (MOVE_MAX_PIECES
+ 1)
1056 int toi
= m_to
.get_addr_inc ();
1057 int fromi
= m_from
.get_addr_inc ();
1058 if (toi
>= 0 && fromi
>= 0)
1060 else if (toi
<= 0 && fromi
<= 0)
1065 m_offset
= m_reverse
? len
: 0;
1066 align
= MIN (to
? MEM_ALIGN (to
) : align
,
1067 from
? MEM_ALIGN (from
) : align
);
1069 /* If copying requires more than two move insns,
1070 copy addresses to registers (to make displacements shorter)
1071 and use post-increment if available. */
1072 if (by_pieces_ninsns (len
, align
, m_max_size
, MOVE_BY_PIECES
) > 2)
1074 /* Find the mode of the largest comparison. */
1075 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1077 m_from
.decide_autoinc (mode
, m_reverse
, len
);
1078 m_to
.decide_autoinc (mode
, m_reverse
, len
);
1081 align
= alignment_for_piecewise_move (MOVE_MAX_PIECES
, align
);
1085 /* This function contains the main loop used for expanding a block
1086 operation. First move what we can in the largest integer mode,
1087 then go to successively smaller modes. For every access, call
1088 GENFUN with the two operands and the EXTRA_DATA. */
1091 op_by_pieces_d::run ()
1093 while (m_max_size
> 1 && m_len
> 0)
1095 scalar_int_mode mode
= widest_int_mode_for_size (m_max_size
);
1097 if (prepare_mode (mode
, m_align
))
1099 unsigned int size
= GET_MODE_SIZE (mode
);
1100 rtx to1
= NULL_RTX
, from1
;
1102 while (m_len
>= size
)
1107 to1
= m_to
.adjust (mode
, m_offset
);
1108 from1
= m_from
.adjust (mode
, m_offset
);
1110 m_to
.maybe_predec (-(HOST_WIDE_INT
)size
);
1111 m_from
.maybe_predec (-(HOST_WIDE_INT
)size
);
1113 generate (to1
, from1
, mode
);
1115 m_to
.maybe_postinc (size
);
1116 m_from
.maybe_postinc (size
);
1127 m_max_size
= GET_MODE_SIZE (mode
);
1130 /* The code above should have handled everything. */
1131 gcc_assert (!m_len
);
1134 /* Derived class from op_by_pieces_d, providing support for block move
1137 class move_by_pieces_d
: public op_by_pieces_d
1139 insn_gen_fn m_gen_fun
;
1140 void generate (rtx
, rtx
, machine_mode
);
1141 bool prepare_mode (machine_mode
, unsigned int);
1144 move_by_pieces_d (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1146 : op_by_pieces_d (to
, false, from
, true, NULL
, NULL
, len
, align
)
1149 rtx
finish_retmode (memop_ret
);
1152 /* Return true if MODE can be used for a set of copies, given an
1153 alignment ALIGN. Prepare whatever data is necessary for later
1154 calls to generate. */
1157 move_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1159 insn_code icode
= optab_handler (mov_optab
, mode
);
1160 m_gen_fun
= GEN_FCN (icode
);
1161 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1164 /* A callback used when iterating for a compare_by_pieces_operation.
1165 OP0 and OP1 are the values that have been loaded and should be
1166 compared in MODE. If OP0 is NULL, this means we should generate a
1167 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1168 gen function that should be used to generate the mode. */
1171 move_by_pieces_d::generate (rtx op0
, rtx op1
,
1172 machine_mode mode ATTRIBUTE_UNUSED
)
1174 #ifdef PUSH_ROUNDING
1175 if (op0
== NULL_RTX
)
1177 emit_single_push_insn (mode
, op1
, NULL
);
1181 emit_insn (m_gen_fun (op0
, op1
));
1184 /* Perform the final adjustment at the end of a string to obtain the
1185 correct return value for the block operation.
1186 Return value is based on RETMODE argument. */
1189 move_by_pieces_d::finish_retmode (memop_ret retmode
)
1191 gcc_assert (!m_reverse
);
1192 if (retmode
== RETURN_END_MINUS_ONE
)
1194 m_to
.maybe_postinc (-1);
1197 return m_to
.adjust (QImode
, m_offset
);
1200 /* Generate several move instructions to copy LEN bytes from block FROM to
1201 block TO. (These are MEM rtx's with BLKmode).
1203 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1204 used to push FROM to the stack.
1206 ALIGN is maximum stack alignment we can assume.
1208 Return value is based on RETMODE argument. */
1211 move_by_pieces (rtx to
, rtx from
, unsigned HOST_WIDE_INT len
,
1212 unsigned int align
, memop_ret retmode
)
1214 #ifndef PUSH_ROUNDING
1219 move_by_pieces_d
data (to
, from
, len
, align
);
1223 if (retmode
!= RETURN_BEGIN
)
1224 return data
.finish_retmode (retmode
);
1229 /* Derived class from op_by_pieces_d, providing support for block move
1232 class store_by_pieces_d
: public op_by_pieces_d
1234 insn_gen_fn m_gen_fun
;
1235 void generate (rtx
, rtx
, machine_mode
);
1236 bool prepare_mode (machine_mode
, unsigned int);
1239 store_by_pieces_d (rtx to
, by_pieces_constfn cfn
, void *cfn_data
,
1240 unsigned HOST_WIDE_INT len
, unsigned int align
)
1241 : op_by_pieces_d (to
, false, NULL_RTX
, true, cfn
, cfn_data
, len
, align
)
1244 rtx
finish_retmode (memop_ret
);
1247 /* Return true if MODE can be used for a set of stores, given an
1248 alignment ALIGN. Prepare whatever data is necessary for later
1249 calls to generate. */
1252 store_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1254 insn_code icode
= optab_handler (mov_optab
, mode
);
1255 m_gen_fun
= GEN_FCN (icode
);
1256 return icode
!= CODE_FOR_nothing
&& align
>= GET_MODE_ALIGNMENT (mode
);
1259 /* A callback used when iterating for a store_by_pieces_operation.
1260 OP0 and OP1 are the values that have been loaded and should be
1261 compared in MODE. If OP0 is NULL, this means we should generate a
1262 push; otherwise EXTRA_DATA holds a pointer to a pointer to the insn
1263 gen function that should be used to generate the mode. */
1266 store_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode
)
1268 emit_insn (m_gen_fun (op0
, op1
));
1271 /* Perform the final adjustment at the end of a string to obtain the
1272 correct return value for the block operation.
1273 Return value is based on RETMODE argument. */
1276 store_by_pieces_d::finish_retmode (memop_ret retmode
)
1278 gcc_assert (!m_reverse
);
1279 if (retmode
== RETURN_END_MINUS_ONE
)
1281 m_to
.maybe_postinc (-1);
1284 return m_to
.adjust (QImode
, m_offset
);
1287 /* Determine whether the LEN bytes generated by CONSTFUN can be
1288 stored to memory using several move instructions. CONSTFUNDATA is
1289 a pointer which will be passed as argument in every CONSTFUN call.
1290 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1291 a memset operation and false if it's a copy of a constant string.
1292 Return nonzero if a call to store_by_pieces should succeed. */
1295 can_store_by_pieces (unsigned HOST_WIDE_INT len
,
1296 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1297 void *constfundata
, unsigned int align
, bool memsetp
)
1299 unsigned HOST_WIDE_INT l
;
1300 unsigned int max_size
;
1301 HOST_WIDE_INT offset
= 0;
1302 enum insn_code icode
;
1304 /* cst is set but not used if LEGITIMATE_CONSTANT doesn't use it. */
1305 rtx cst ATTRIBUTE_UNUSED
;
1310 if (!targetm
.use_by_pieces_infrastructure_p (len
, align
,
1314 optimize_insn_for_speed_p ()))
1317 align
= alignment_for_piecewise_move (STORE_MAX_PIECES
, align
);
1319 /* We would first store what we can in the largest integer mode, then go to
1320 successively smaller modes. */
1323 reverse
<= (HAVE_PRE_DECREMENT
|| HAVE_POST_DECREMENT
);
1327 max_size
= STORE_MAX_PIECES
+ 1;
1328 while (max_size
> 1 && l
> 0)
1330 scalar_int_mode mode
= widest_int_mode_for_size (max_size
);
1332 icode
= optab_handler (mov_optab
, mode
);
1333 if (icode
!= CODE_FOR_nothing
1334 && align
>= GET_MODE_ALIGNMENT (mode
))
1336 unsigned int size
= GET_MODE_SIZE (mode
);
1343 cst
= (*constfun
) (constfundata
, offset
, mode
);
1344 if (!targetm
.legitimate_constant_p (mode
, cst
))
1354 max_size
= GET_MODE_SIZE (mode
);
1357 /* The code above should have handled everything. */
1364 /* Generate several move instructions to store LEN bytes generated by
1365 CONSTFUN to block TO. (A MEM rtx with BLKmode). CONSTFUNDATA is a
1366 pointer which will be passed as argument in every CONSTFUN call.
1367 ALIGN is maximum alignment we can assume. MEMSETP is true if this is
1368 a memset operation and false if it's a copy of a constant string.
1369 Return value is based on RETMODE argument. */
1372 store_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
,
1373 rtx (*constfun
) (void *, HOST_WIDE_INT
, scalar_int_mode
),
1374 void *constfundata
, unsigned int align
, bool memsetp
,
1379 gcc_assert (retmode
!= RETURN_END_MINUS_ONE
);
1383 gcc_assert (targetm
.use_by_pieces_infrastructure_p
1385 memsetp
? SET_BY_PIECES
: STORE_BY_PIECES
,
1386 optimize_insn_for_speed_p ()));
1388 store_by_pieces_d
data (to
, constfun
, constfundata
, len
, align
);
1391 if (retmode
!= RETURN_BEGIN
)
1392 return data
.finish_retmode (retmode
);
1397 /* Callback routine for clear_by_pieces.
1398 Return const0_rtx unconditionally. */
1401 clear_by_pieces_1 (void *, HOST_WIDE_INT
, scalar_int_mode
)
1406 /* Generate several move instructions to clear LEN bytes of block TO. (A MEM
1407 rtx with BLKmode). ALIGN is maximum alignment we can assume. */
1410 clear_by_pieces (rtx to
, unsigned HOST_WIDE_INT len
, unsigned int align
)
1415 store_by_pieces_d
data (to
, clear_by_pieces_1
, NULL
, len
, align
);
1419 /* Context used by compare_by_pieces_genfn. It stores the fail label
1420 to jump to in case of miscomparison, and for branch ratios greater than 1,
1421 it stores an accumulator and the current and maximum counts before
1422 emitting another branch. */
1424 class compare_by_pieces_d
: public op_by_pieces_d
1426 rtx_code_label
*m_fail_label
;
1428 int m_count
, m_batch
;
1430 void generate (rtx
, rtx
, machine_mode
);
1431 bool prepare_mode (machine_mode
, unsigned int);
1432 void finish_mode (machine_mode
);
1434 compare_by_pieces_d (rtx op0
, rtx op1
, by_pieces_constfn op1_cfn
,
1435 void *op1_cfn_data
, HOST_WIDE_INT len
, int align
,
1436 rtx_code_label
*fail_label
)
1437 : op_by_pieces_d (op0
, true, op1
, true, op1_cfn
, op1_cfn_data
, len
, align
)
1439 m_fail_label
= fail_label
;
1443 /* A callback used when iterating for a compare_by_pieces_operation.
1444 OP0 and OP1 are the values that have been loaded and should be
1445 compared in MODE. DATA holds a pointer to the compare_by_pieces_data
1446 context structure. */
1449 compare_by_pieces_d::generate (rtx op0
, rtx op1
, machine_mode mode
)
1453 rtx temp
= expand_binop (mode
, sub_optab
, op0
, op1
, NULL_RTX
,
1454 true, OPTAB_LIB_WIDEN
);
1456 temp
= expand_binop (mode
, ior_optab
, m_accumulator
, temp
, temp
,
1457 true, OPTAB_LIB_WIDEN
);
1458 m_accumulator
= temp
;
1460 if (++m_count
< m_batch
)
1464 op0
= m_accumulator
;
1466 m_accumulator
= NULL_RTX
;
1468 do_compare_rtx_and_jump (op0
, op1
, NE
, true, mode
, NULL_RTX
, NULL
,
1469 m_fail_label
, profile_probability::uninitialized ());
1472 /* Return true if MODE can be used for a set of moves and comparisons,
1473 given an alignment ALIGN. Prepare whatever data is necessary for
1474 later calls to generate. */
1477 compare_by_pieces_d::prepare_mode (machine_mode mode
, unsigned int align
)
1479 insn_code icode
= optab_handler (mov_optab
, mode
);
1480 if (icode
== CODE_FOR_nothing
1481 || align
< GET_MODE_ALIGNMENT (mode
)
1482 || !can_compare_p (EQ
, mode
, ccp_jump
))
1484 m_batch
= targetm
.compare_by_pieces_branch_ratio (mode
);
1487 m_accumulator
= NULL_RTX
;
1492 /* Called after expanding a series of comparisons in MODE. If we have
1493 accumulated results for which we haven't emitted a branch yet, do
1497 compare_by_pieces_d::finish_mode (machine_mode mode
)
1499 if (m_accumulator
!= NULL_RTX
)
1500 do_compare_rtx_and_jump (m_accumulator
, const0_rtx
, NE
, true, mode
,
1501 NULL_RTX
, NULL
, m_fail_label
,
1502 profile_probability::uninitialized ());
1505 /* Generate several move instructions to compare LEN bytes from blocks
1506 ARG0 and ARG1. (These are MEM rtx's with BLKmode).
1508 If PUSH_ROUNDING is defined and TO is NULL, emit_single_push_insn is
1509 used to push FROM to the stack.
1511 ALIGN is maximum stack alignment we can assume.
1513 Optionally, the caller can pass a constfn and associated data in A1_CFN
1514 and A1_CFN_DATA. describing that the second operand being compared is a
1515 known constant and how to obtain its data. */
1518 compare_by_pieces (rtx arg0
, rtx arg1
, unsigned HOST_WIDE_INT len
,
1519 rtx target
, unsigned int align
,
1520 by_pieces_constfn a1_cfn
, void *a1_cfn_data
)
1522 rtx_code_label
*fail_label
= gen_label_rtx ();
1523 rtx_code_label
*end_label
= gen_label_rtx ();
1525 if (target
== NULL_RTX
1526 || !REG_P (target
) || REGNO (target
) < FIRST_PSEUDO_REGISTER
)
1527 target
= gen_reg_rtx (TYPE_MODE (integer_type_node
));
1529 compare_by_pieces_d
data (arg0
, arg1
, a1_cfn
, a1_cfn_data
, len
, align
,
1534 emit_move_insn (target
, const0_rtx
);
1535 emit_jump (end_label
);
1537 emit_label (fail_label
);
1538 emit_move_insn (target
, const1_rtx
);
1539 emit_label (end_label
);
1544 /* Emit code to move a block Y to a block X. This may be done with
1545 string-move instructions, with multiple scalar move instructions,
1546 or with a library call.
1548 Both X and Y must be MEM rtx's (perhaps inside VOLATILE) with mode BLKmode.
1549 SIZE is an rtx that says how long they are.
1550 ALIGN is the maximum alignment we can assume they have.
1551 METHOD describes what kind of copy this is, and what mechanisms may be used.
1552 MIN_SIZE is the minimal size of block to move
1553 MAX_SIZE is the maximal size of block to move, if it cannot be represented
1554 in unsigned HOST_WIDE_INT, than it is mask of all ones.
1556 Return the address of the new block, if memcpy is called and returns it,
1560 emit_block_move_hints (rtx x
, rtx y
, rtx size
, enum block_op_methods method
,
1561 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1562 unsigned HOST_WIDE_INT min_size
,
1563 unsigned HOST_WIDE_INT max_size
,
1564 unsigned HOST_WIDE_INT probable_max_size
,
1565 bool bail_out_libcall
, bool *is_move_done
)
1572 *is_move_done
= true;
1575 if (CONST_INT_P (size
) && INTVAL (size
) == 0)
1580 case BLOCK_OP_NORMAL
:
1581 case BLOCK_OP_TAILCALL
:
1585 case BLOCK_OP_CALL_PARM
:
1586 may_use_call
= block_move_libcall_safe_for_call_parm ();
1588 /* Make inhibit_defer_pop nonzero around the library call
1589 to force it to pop the arguments right away. */
1593 case BLOCK_OP_NO_LIBCALL
:
1597 case BLOCK_OP_NO_LIBCALL_RET
:
1605 gcc_assert (MEM_P (x
) && MEM_P (y
));
1606 align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1607 gcc_assert (align
>= BITS_PER_UNIT
);
1609 /* Make sure we've got BLKmode addresses; store_one_arg can decide that
1610 block copy is more efficient for other large modes, e.g. DCmode. */
1611 x
= adjust_address (x
, BLKmode
, 0);
1612 y
= adjust_address (y
, BLKmode
, 0);
1614 /* Set MEM_SIZE as appropriate for this block copy. The main place this
1615 can be incorrect is coming from __builtin_memcpy. */
1616 poly_int64 const_size
;
1617 if (poly_int_rtx_p (size
, &const_size
))
1619 x
= shallow_copy_rtx (x
);
1620 y
= shallow_copy_rtx (y
);
1621 set_mem_size (x
, const_size
);
1622 set_mem_size (y
, const_size
);
1625 if (CONST_INT_P (size
) && can_move_by_pieces (INTVAL (size
), align
))
1626 move_by_pieces (x
, y
, INTVAL (size
), align
, RETURN_BEGIN
);
1627 else if (emit_block_move_via_cpymem (x
, y
, size
, align
,
1628 expected_align
, expected_size
,
1629 min_size
, max_size
, probable_max_size
))
1631 else if (may_use_call
1632 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (x
))
1633 && ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (y
)))
1635 if (bail_out_libcall
)
1638 *is_move_done
= false;
1642 if (may_use_call
< 0)
1645 retval
= emit_block_copy_via_libcall (x
, y
, size
,
1646 method
== BLOCK_OP_TAILCALL
);
1650 emit_block_move_via_loop (x
, y
, size
, align
);
1652 if (method
== BLOCK_OP_CALL_PARM
)
1659 emit_block_move (rtx x
, rtx y
, rtx size
, enum block_op_methods method
)
1661 unsigned HOST_WIDE_INT max
, min
= 0;
1662 if (GET_CODE (size
) == CONST_INT
)
1663 min
= max
= UINTVAL (size
);
1665 max
= GET_MODE_MASK (GET_MODE (size
));
1666 return emit_block_move_hints (x
, y
, size
, method
, 0, -1,
1670 /* A subroutine of emit_block_move. Returns true if calling the
1671 block move libcall will not clobber any parameters which may have
1672 already been placed on the stack. */
1675 block_move_libcall_safe_for_call_parm (void)
1677 #if defined (REG_PARM_STACK_SPACE)
1681 /* If arguments are pushed on the stack, then they're safe. */
1685 /* If registers go on the stack anyway, any argument is sure to clobber
1686 an outgoing argument. */
1687 #if defined (REG_PARM_STACK_SPACE)
1688 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1689 /* Avoid set but not used warning if *REG_PARM_STACK_SPACE doesn't
1690 depend on its argument. */
1692 if (OUTGOING_REG_PARM_STACK_SPACE ((!fn
? NULL_TREE
: TREE_TYPE (fn
)))
1693 && REG_PARM_STACK_SPACE (fn
) != 0)
1697 /* If any argument goes in memory, then it might clobber an outgoing
1700 CUMULATIVE_ARGS args_so_far_v
;
1701 cumulative_args_t args_so_far
;
1704 fn
= builtin_decl_implicit (BUILT_IN_MEMCPY
);
1705 INIT_CUMULATIVE_ARGS (args_so_far_v
, TREE_TYPE (fn
), NULL_RTX
, 0, 3);
1706 args_so_far
= pack_cumulative_args (&args_so_far_v
);
1708 arg
= TYPE_ARG_TYPES (TREE_TYPE (fn
));
1709 for ( ; arg
!= void_list_node
; arg
= TREE_CHAIN (arg
))
1711 machine_mode mode
= TYPE_MODE (TREE_VALUE (arg
));
1712 rtx tmp
= targetm
.calls
.function_arg (args_so_far
, mode
,
1714 if (!tmp
|| !REG_P (tmp
))
1716 if (targetm
.calls
.arg_partial_bytes (args_so_far
, mode
, NULL
, 1))
1718 targetm
.calls
.function_arg_advance (args_so_far
, mode
,
1725 /* A subroutine of emit_block_move. Expand a cpymem pattern;
1726 return true if successful. */
1729 emit_block_move_via_cpymem (rtx x
, rtx y
, rtx size
, unsigned int align
,
1730 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
1731 unsigned HOST_WIDE_INT min_size
,
1732 unsigned HOST_WIDE_INT max_size
,
1733 unsigned HOST_WIDE_INT probable_max_size
)
1735 int save_volatile_ok
= volatile_ok
;
1737 if (expected_align
< align
)
1738 expected_align
= align
;
1739 if (expected_size
!= -1)
1741 if ((unsigned HOST_WIDE_INT
)expected_size
> probable_max_size
)
1742 expected_size
= probable_max_size
;
1743 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
1744 expected_size
= min_size
;
1747 /* Since this is a move insn, we don't care about volatility. */
1750 /* Try the most limited insn first, because there's no point
1751 including more than one in the machine description unless
1752 the more limited one has some advantage. */
1754 opt_scalar_int_mode mode_iter
;
1755 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
1757 scalar_int_mode mode
= mode_iter
.require ();
1758 enum insn_code code
= direct_optab_handler (cpymem_optab
, mode
);
1760 if (code
!= CODE_FOR_nothing
1761 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
1762 here because if SIZE is less than the mode mask, as it is
1763 returned by the macro, it will definitely be less than the
1764 actual mode mask. Since SIZE is within the Pmode address
1765 space, we limit MODE to Pmode. */
1766 && ((CONST_INT_P (size
)
1767 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
1768 <= (GET_MODE_MASK (mode
) >> 1)))
1769 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
1770 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
1772 struct expand_operand ops
[9];
1775 /* ??? When called via emit_block_move_for_call, it'd be
1776 nice if there were some way to inform the backend, so
1777 that it doesn't fail the expansion because it thinks
1778 emitting the libcall would be more efficient. */
1779 nops
= insn_data
[(int) code
].n_generator_args
;
1780 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
1782 create_fixed_operand (&ops
[0], x
);
1783 create_fixed_operand (&ops
[1], y
);
1784 /* The check above guarantees that this size conversion is valid. */
1785 create_convert_operand_to (&ops
[2], size
, mode
, true);
1786 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
1789 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
1790 create_integer_operand (&ops
[5], expected_size
);
1794 create_integer_operand (&ops
[6], min_size
);
1795 /* If we cannot represent the maximal size,
1796 make parameter NULL. */
1797 if ((HOST_WIDE_INT
) max_size
!= -1)
1798 create_integer_operand (&ops
[7], max_size
);
1800 create_fixed_operand (&ops
[7], NULL
);
1804 /* If we cannot represent the maximal size,
1805 make parameter NULL. */
1806 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
1807 create_integer_operand (&ops
[8], probable_max_size
);
1809 create_fixed_operand (&ops
[8], NULL
);
1811 if (maybe_expand_insn (code
, nops
, ops
))
1813 volatile_ok
= save_volatile_ok
;
1819 volatile_ok
= save_volatile_ok
;
1823 /* A subroutine of emit_block_move. Copy the data via an explicit
1824 loop. This is used only when libcalls are forbidden. */
1825 /* ??? It'd be nice to copy in hunks larger than QImode. */
1828 emit_block_move_via_loop (rtx x
, rtx y
, rtx size
,
1829 unsigned int align ATTRIBUTE_UNUSED
)
1831 rtx_code_label
*cmp_label
, *top_label
;
1832 rtx iter
, x_addr
, y_addr
, tmp
;
1833 machine_mode x_addr_mode
= get_address_mode (x
);
1834 machine_mode y_addr_mode
= get_address_mode (y
);
1835 machine_mode iter_mode
;
1837 iter_mode
= GET_MODE (size
);
1838 if (iter_mode
== VOIDmode
)
1839 iter_mode
= word_mode
;
1841 top_label
= gen_label_rtx ();
1842 cmp_label
= gen_label_rtx ();
1843 iter
= gen_reg_rtx (iter_mode
);
1845 emit_move_insn (iter
, const0_rtx
);
1847 x_addr
= force_operand (XEXP (x
, 0), NULL_RTX
);
1848 y_addr
= force_operand (XEXP (y
, 0), NULL_RTX
);
1849 do_pending_stack_adjust ();
1851 emit_jump (cmp_label
);
1852 emit_label (top_label
);
1854 tmp
= convert_modes (x_addr_mode
, iter_mode
, iter
, true);
1855 x_addr
= simplify_gen_binary (PLUS
, x_addr_mode
, x_addr
, tmp
);
1857 if (x_addr_mode
!= y_addr_mode
)
1858 tmp
= convert_modes (y_addr_mode
, iter_mode
, iter
, true);
1859 y_addr
= simplify_gen_binary (PLUS
, y_addr_mode
, y_addr
, tmp
);
1861 x
= change_address (x
, QImode
, x_addr
);
1862 y
= change_address (y
, QImode
, y_addr
);
1864 emit_move_insn (x
, y
);
1866 tmp
= expand_simple_binop (iter_mode
, PLUS
, iter
, const1_rtx
, iter
,
1867 true, OPTAB_LIB_WIDEN
);
1869 emit_move_insn (iter
, tmp
);
1871 emit_label (cmp_label
);
1873 emit_cmp_and_jump_insns (iter
, size
, LT
, NULL_RTX
, iter_mode
,
1875 profile_probability::guessed_always ()
1876 .apply_scale (9, 10));
1879 /* Expand a call to memcpy or memmove or memcmp, and return the result.
1880 TAILCALL is true if this is a tail call. */
1883 emit_block_op_via_libcall (enum built_in_function fncode
, rtx dst
, rtx src
,
1884 rtx size
, bool tailcall
)
1886 rtx dst_addr
, src_addr
;
1887 tree call_expr
, dst_tree
, src_tree
, size_tree
;
1888 machine_mode size_mode
;
1890 /* Since dst and src are passed to a libcall, mark the corresponding
1891 tree EXPR as addressable. */
1892 tree dst_expr
= MEM_EXPR (dst
);
1893 tree src_expr
= MEM_EXPR (src
);
1895 mark_addressable (dst_expr
);
1897 mark_addressable (src_expr
);
1899 dst_addr
= copy_addr_to_reg (XEXP (dst
, 0));
1900 dst_addr
= convert_memory_address (ptr_mode
, dst_addr
);
1901 dst_tree
= make_tree (ptr_type_node
, dst_addr
);
1903 src_addr
= copy_addr_to_reg (XEXP (src
, 0));
1904 src_addr
= convert_memory_address (ptr_mode
, src_addr
);
1905 src_tree
= make_tree (ptr_type_node
, src_addr
);
1907 size_mode
= TYPE_MODE (sizetype
);
1908 size
= convert_to_mode (size_mode
, size
, 1);
1909 size
= copy_to_mode_reg (size_mode
, size
);
1910 size_tree
= make_tree (sizetype
, size
);
1912 /* It is incorrect to use the libcall calling conventions for calls to
1913 memcpy/memmove/memcmp because they can be provided by the user. */
1914 tree fn
= builtin_decl_implicit (fncode
);
1915 call_expr
= build_call_expr (fn
, 3, dst_tree
, src_tree
, size_tree
);
1916 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
1918 return expand_call (call_expr
, NULL_RTX
, false);
1921 /* Try to expand cmpstrn or cmpmem operation ICODE with the given operands.
1922 ARG3_TYPE is the type of ARG3_RTX. Return the result rtx on success,
1923 otherwise return null. */
1926 expand_cmpstrn_or_cmpmem (insn_code icode
, rtx target
, rtx arg1_rtx
,
1927 rtx arg2_rtx
, tree arg3_type
, rtx arg3_rtx
,
1928 HOST_WIDE_INT align
)
1930 machine_mode insn_mode
= insn_data
[icode
].operand
[0].mode
;
1932 if (target
&& (!REG_P (target
) || HARD_REGISTER_P (target
)))
1935 struct expand_operand ops
[5];
1936 create_output_operand (&ops
[0], target
, insn_mode
);
1937 create_fixed_operand (&ops
[1], arg1_rtx
);
1938 create_fixed_operand (&ops
[2], arg2_rtx
);
1939 create_convert_operand_from (&ops
[3], arg3_rtx
, TYPE_MODE (arg3_type
),
1940 TYPE_UNSIGNED (arg3_type
));
1941 create_integer_operand (&ops
[4], align
);
1942 if (maybe_expand_insn (icode
, 5, ops
))
1943 return ops
[0].value
;
1947 /* Expand a block compare between X and Y with length LEN using the
1948 cmpmem optab, placing the result in TARGET. LEN_TYPE is the type
1949 of the expression that was used to calculate the length. ALIGN
1950 gives the known minimum common alignment. */
1953 emit_block_cmp_via_cmpmem (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1956 /* Note: The cmpstrnsi pattern, if it exists, is not suitable for
1957 implementing memcmp because it will stop if it encounters two
1959 insn_code icode
= direct_optab_handler (cmpmem_optab
, SImode
);
1961 if (icode
== CODE_FOR_nothing
)
1964 return expand_cmpstrn_or_cmpmem (icode
, target
, x
, y
, len_type
, len
, align
);
1967 /* Emit code to compare a block Y to a block X. This may be done with
1968 string-compare instructions, with multiple scalar instructions,
1969 or with a library call.
1971 Both X and Y must be MEM rtx's. LEN is an rtx that says how long
1972 they are. LEN_TYPE is the type of the expression that was used to
1975 If EQUALITY_ONLY is true, it means we don't have to return the tri-state
1976 value of a normal memcmp call, instead we can just compare for equality.
1977 If FORCE_LIBCALL is true, we should emit a call to memcmp rather than
1980 Optionally, the caller can pass a constfn and associated data in Y_CFN
1981 and Y_CFN_DATA. describing that the second operand being compared is a
1982 known constant and how to obtain its data.
1983 Return the result of the comparison, or NULL_RTX if we failed to
1984 perform the operation. */
1987 emit_block_cmp_hints (rtx x
, rtx y
, rtx len
, tree len_type
, rtx target
,
1988 bool equality_only
, by_pieces_constfn y_cfn
,
1993 if (CONST_INT_P (len
) && INTVAL (len
) == 0)
1996 gcc_assert (MEM_P (x
) && MEM_P (y
));
1997 unsigned int align
= MIN (MEM_ALIGN (x
), MEM_ALIGN (y
));
1998 gcc_assert (align
>= BITS_PER_UNIT
);
2000 x
= adjust_address (x
, BLKmode
, 0);
2001 y
= adjust_address (y
, BLKmode
, 0);
2004 && CONST_INT_P (len
)
2005 && can_do_by_pieces (INTVAL (len
), align
, COMPARE_BY_PIECES
))
2006 result
= compare_by_pieces (x
, y
, INTVAL (len
), target
, align
,
2009 result
= emit_block_cmp_via_cmpmem (x
, y
, len
, len_type
, target
, align
);
2014 /* Copy all or part of a value X into registers starting at REGNO.
2015 The number of registers to be filled is NREGS. */
2018 move_block_to_reg (int regno
, rtx x
, int nregs
, machine_mode mode
)
2023 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
2024 x
= validize_mem (force_const_mem (mode
, x
));
2026 /* See if the machine can do this with a load multiple insn. */
2027 if (targetm
.have_load_multiple ())
2029 rtx_insn
*last
= get_last_insn ();
2030 rtx first
= gen_rtx_REG (word_mode
, regno
);
2031 if (rtx_insn
*pat
= targetm
.gen_load_multiple (first
, x
,
2038 delete_insns_since (last
);
2041 for (int i
= 0; i
< nregs
; i
++)
2042 emit_move_insn (gen_rtx_REG (word_mode
, regno
+ i
),
2043 operand_subword_force (x
, i
, mode
));
2046 /* Copy all or part of a BLKmode value X out of registers starting at REGNO.
2047 The number of registers to be filled is NREGS. */
2050 move_block_from_reg (int regno
, rtx x
, int nregs
)
2055 /* See if the machine can do this with a store multiple insn. */
2056 if (targetm
.have_store_multiple ())
2058 rtx_insn
*last
= get_last_insn ();
2059 rtx first
= gen_rtx_REG (word_mode
, regno
);
2060 if (rtx_insn
*pat
= targetm
.gen_store_multiple (x
, first
,
2067 delete_insns_since (last
);
2070 for (int i
= 0; i
< nregs
; i
++)
2072 rtx tem
= operand_subword (x
, i
, 1, BLKmode
);
2076 emit_move_insn (tem
, gen_rtx_REG (word_mode
, regno
+ i
));
2080 /* Generate a PARALLEL rtx for a new non-consecutive group of registers from
2081 ORIG, where ORIG is a non-consecutive group of registers represented by
2082 a PARALLEL. The clone is identical to the original except in that the
2083 original set of registers is replaced by a new set of pseudo registers.
2084 The new set has the same modes as the original set. */
2087 gen_group_rtx (rtx orig
)
2092 gcc_assert (GET_CODE (orig
) == PARALLEL
);
2094 length
= XVECLEN (orig
, 0);
2095 tmps
= XALLOCAVEC (rtx
, length
);
2097 /* Skip a NULL entry in first slot. */
2098 i
= XEXP (XVECEXP (orig
, 0, 0), 0) ? 0 : 1;
2103 for (; i
< length
; i
++)
2105 machine_mode mode
= GET_MODE (XEXP (XVECEXP (orig
, 0, i
), 0));
2106 rtx offset
= XEXP (XVECEXP (orig
, 0, i
), 1);
2108 tmps
[i
] = gen_rtx_EXPR_LIST (VOIDmode
, gen_reg_rtx (mode
), offset
);
2111 return gen_rtx_PARALLEL (GET_MODE (orig
), gen_rtvec_v (length
, tmps
));
2114 /* A subroutine of emit_group_load. Arguments as for emit_group_load,
2115 except that values are placed in TMPS[i], and must later be moved
2116 into corresponding XEXP (XVECEXP (DST, 0, i), 0) element. */
2119 emit_group_load_1 (rtx
*tmps
, rtx dst
, rtx orig_src
, tree type
,
2124 machine_mode m
= GET_MODE (orig_src
);
2126 gcc_assert (GET_CODE (dst
) == PARALLEL
);
2129 && !SCALAR_INT_MODE_P (m
)
2130 && !MEM_P (orig_src
)
2131 && GET_CODE (orig_src
) != CONCAT
)
2133 scalar_int_mode imode
;
2134 if (int_mode_for_mode (GET_MODE (orig_src
)).exists (&imode
))
2136 src
= gen_reg_rtx (imode
);
2137 emit_move_insn (gen_lowpart (GET_MODE (orig_src
), src
), orig_src
);
2141 src
= assign_stack_temp (GET_MODE (orig_src
), ssize
);
2142 emit_move_insn (src
, orig_src
);
2144 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2148 /* Check for a NULL entry, used to indicate that the parameter goes
2149 both on the stack and in registers. */
2150 if (XEXP (XVECEXP (dst
, 0, 0), 0))
2155 /* Process the pieces. */
2156 for (i
= start
; i
< XVECLEN (dst
, 0); i
++)
2158 machine_mode mode
= GET_MODE (XEXP (XVECEXP (dst
, 0, i
), 0));
2159 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (dst
, 0, i
), 1));
2160 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2161 poly_int64 shift
= 0;
2163 /* Handle trailing fragments that run over the size of the struct.
2164 It's the target's responsibility to make sure that the fragment
2165 cannot be strictly smaller in some cases and strictly larger
2167 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2168 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2170 /* Arrange to shift the fragment to where it belongs.
2171 extract_bit_field loads to the lsb of the reg. */
2173 #ifdef BLOCK_REG_PADDING
2174 BLOCK_REG_PADDING (GET_MODE (orig_src
), type
, i
== start
)
2175 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2180 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2181 bytelen
= ssize
- bytepos
;
2182 gcc_assert (maybe_gt (bytelen
, 0));
2185 /* If we won't be loading directly from memory, protect the real source
2186 from strange tricks we might play; but make sure that the source can
2187 be loaded directly into the destination. */
2189 if (!MEM_P (orig_src
)
2190 && (!CONSTANT_P (orig_src
)
2191 || (GET_MODE (orig_src
) != mode
2192 && GET_MODE (orig_src
) != VOIDmode
)))
2194 if (GET_MODE (orig_src
) == VOIDmode
)
2195 src
= gen_reg_rtx (mode
);
2197 src
= gen_reg_rtx (GET_MODE (orig_src
));
2199 emit_move_insn (src
, orig_src
);
2202 /* Optimize the access just a bit. */
2204 && (! targetm
.slow_unaligned_access (mode
, MEM_ALIGN (src
))
2205 || MEM_ALIGN (src
) >= GET_MODE_ALIGNMENT (mode
))
2206 && multiple_p (bytepos
* BITS_PER_UNIT
, GET_MODE_ALIGNMENT (mode
))
2207 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2209 tmps
[i
] = gen_reg_rtx (mode
);
2210 emit_move_insn (tmps
[i
], adjust_address (src
, mode
, bytepos
));
2212 else if (COMPLEX_MODE_P (mode
)
2213 && GET_MODE (src
) == mode
2214 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2215 /* Let emit_move_complex do the bulk of the work. */
2217 else if (GET_CODE (src
) == CONCAT
)
2219 poly_int64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2220 poly_int64 slen0
= GET_MODE_SIZE (GET_MODE (XEXP (src
, 0)));
2224 if (can_div_trunc_p (bytepos
, slen0
, &elt
, &subpos
)
2225 && known_le (subpos
+ bytelen
, slen0
))
2227 /* The following assumes that the concatenated objects all
2228 have the same size. In this case, a simple calculation
2229 can be used to determine the object and the bit field
2231 tmps
[i
] = XEXP (src
, elt
);
2232 if (maybe_ne (subpos
, 0)
2233 || maybe_ne (subpos
+ bytelen
, slen0
)
2234 || (!CONSTANT_P (tmps
[i
])
2235 && (!REG_P (tmps
[i
]) || GET_MODE (tmps
[i
]) != mode
)))
2236 tmps
[i
] = extract_bit_field (tmps
[i
], bytelen
* BITS_PER_UNIT
,
2237 subpos
* BITS_PER_UNIT
,
2238 1, NULL_RTX
, mode
, mode
, false,
2245 gcc_assert (known_eq (bytepos
, 0));
2246 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2247 emit_move_insn (mem
, src
);
2248 tmps
[i
] = extract_bit_field (mem
, bytelen
* BITS_PER_UNIT
,
2249 0, 1, NULL_RTX
, mode
, mode
, false,
2253 /* FIXME: A SIMD parallel will eventually lead to a subreg of a
2254 SIMD register, which is currently broken. While we get GCC
2255 to emit proper RTL for these cases, let's dump to memory. */
2256 else if (VECTOR_MODE_P (GET_MODE (dst
))
2259 poly_uint64 slen
= GET_MODE_SIZE (GET_MODE (src
));
2262 mem
= assign_stack_temp (GET_MODE (src
), slen
);
2263 emit_move_insn (mem
, src
);
2264 tmps
[i
] = adjust_address (mem
, mode
, bytepos
);
2266 else if (CONSTANT_P (src
) && GET_MODE (dst
) != BLKmode
2267 && XVECLEN (dst
, 0) > 1)
2268 tmps
[i
] = simplify_gen_subreg (mode
, src
, GET_MODE (dst
), bytepos
);
2269 else if (CONSTANT_P (src
))
2271 if (known_eq (bytelen
, ssize
))
2277 /* TODO: const_wide_int can have sizes other than this... */
2278 gcc_assert (known_eq (2 * bytelen
, ssize
));
2279 split_double (src
, &first
, &second
);
2286 else if (REG_P (src
) && GET_MODE (src
) == mode
)
2289 tmps
[i
] = extract_bit_field (src
, bytelen
* BITS_PER_UNIT
,
2290 bytepos
* BITS_PER_UNIT
, 1, NULL_RTX
,
2291 mode
, mode
, false, NULL
);
2293 if (maybe_ne (shift
, 0))
2294 tmps
[i
] = expand_shift (LSHIFT_EXPR
, mode
, tmps
[i
],
2299 /* Emit code to move a block SRC of type TYPE to a block DST,
2300 where DST is non-consecutive registers represented by a PARALLEL.
2301 SSIZE represents the total size of block ORIG_SRC in bytes, or -1
2305 emit_group_load (rtx dst
, rtx src
, tree type
, poly_int64 ssize
)
2310 tmps
= XALLOCAVEC (rtx
, XVECLEN (dst
, 0));
2311 emit_group_load_1 (tmps
, dst
, src
, type
, ssize
);
2313 /* Copy the extracted pieces into the proper (probable) hard regs. */
2314 for (i
= 0; i
< XVECLEN (dst
, 0); i
++)
2316 rtx d
= XEXP (XVECEXP (dst
, 0, i
), 0);
2319 emit_move_insn (d
, tmps
[i
]);
2323 /* Similar, but load SRC into new pseudos in a format that looks like
2324 PARALLEL. This can later be fed to emit_group_move to get things
2325 in the right place. */
2328 emit_group_load_into_temps (rtx parallel
, rtx src
, tree type
, poly_int64 ssize
)
2333 vec
= rtvec_alloc (XVECLEN (parallel
, 0));
2334 emit_group_load_1 (&RTVEC_ELT (vec
, 0), parallel
, src
, type
, ssize
);
2336 /* Convert the vector to look just like the original PARALLEL, except
2337 with the computed values. */
2338 for (i
= 0; i
< XVECLEN (parallel
, 0); i
++)
2340 rtx e
= XVECEXP (parallel
, 0, i
);
2341 rtx d
= XEXP (e
, 0);
2345 d
= force_reg (GET_MODE (d
), RTVEC_ELT (vec
, i
));
2346 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), d
, XEXP (e
, 1));
2348 RTVEC_ELT (vec
, i
) = e
;
2351 return gen_rtx_PARALLEL (GET_MODE (parallel
), vec
);
2354 /* Emit code to move a block SRC to block DST, where SRC and DST are
2355 non-consecutive groups of registers, each represented by a PARALLEL. */
2358 emit_group_move (rtx dst
, rtx src
)
2362 gcc_assert (GET_CODE (src
) == PARALLEL
2363 && GET_CODE (dst
) == PARALLEL
2364 && XVECLEN (src
, 0) == XVECLEN (dst
, 0));
2366 /* Skip first entry if NULL. */
2367 for (i
= XEXP (XVECEXP (src
, 0, 0), 0) ? 0 : 1; i
< XVECLEN (src
, 0); i
++)
2368 emit_move_insn (XEXP (XVECEXP (dst
, 0, i
), 0),
2369 XEXP (XVECEXP (src
, 0, i
), 0));
2372 /* Move a group of registers represented by a PARALLEL into pseudos. */
2375 emit_group_move_into_temps (rtx src
)
2377 rtvec vec
= rtvec_alloc (XVECLEN (src
, 0));
2380 for (i
= 0; i
< XVECLEN (src
, 0); i
++)
2382 rtx e
= XVECEXP (src
, 0, i
);
2383 rtx d
= XEXP (e
, 0);
2386 e
= alloc_EXPR_LIST (REG_NOTE_KIND (e
), copy_to_reg (d
), XEXP (e
, 1));
2387 RTVEC_ELT (vec
, i
) = e
;
2390 return gen_rtx_PARALLEL (GET_MODE (src
), vec
);
2393 /* Emit code to move a block SRC to a block ORIG_DST of type TYPE,
2394 where SRC is non-consecutive registers represented by a PARALLEL.
2395 SSIZE represents the total size of block ORIG_DST, or -1 if not
2399 emit_group_store (rtx orig_dst
, rtx src
, tree type ATTRIBUTE_UNUSED
,
2403 int start
, finish
, i
;
2404 machine_mode m
= GET_MODE (orig_dst
);
2406 gcc_assert (GET_CODE (src
) == PARALLEL
);
2408 if (!SCALAR_INT_MODE_P (m
)
2409 && !MEM_P (orig_dst
) && GET_CODE (orig_dst
) != CONCAT
)
2411 scalar_int_mode imode
;
2412 if (int_mode_for_mode (GET_MODE (orig_dst
)).exists (&imode
))
2414 dst
= gen_reg_rtx (imode
);
2415 emit_group_store (dst
, src
, type
, ssize
);
2416 dst
= gen_lowpart (GET_MODE (orig_dst
), dst
);
2420 dst
= assign_stack_temp (GET_MODE (orig_dst
), ssize
);
2421 emit_group_store (dst
, src
, type
, ssize
);
2423 emit_move_insn (orig_dst
, dst
);
2427 /* Check for a NULL entry, used to indicate that the parameter goes
2428 both on the stack and in registers. */
2429 if (XEXP (XVECEXP (src
, 0, 0), 0))
2433 finish
= XVECLEN (src
, 0);
2435 tmps
= XALLOCAVEC (rtx
, finish
);
2437 /* Copy the (probable) hard regs into pseudos. */
2438 for (i
= start
; i
< finish
; i
++)
2440 rtx reg
= XEXP (XVECEXP (src
, 0, i
), 0);
2441 if (!REG_P (reg
) || REGNO (reg
) < FIRST_PSEUDO_REGISTER
)
2443 tmps
[i
] = gen_reg_rtx (GET_MODE (reg
));
2444 emit_move_insn (tmps
[i
], reg
);
2450 /* If we won't be storing directly into memory, protect the real destination
2451 from strange tricks we might play. */
2453 if (GET_CODE (dst
) == PARALLEL
)
2457 /* We can get a PARALLEL dst if there is a conditional expression in
2458 a return statement. In that case, the dst and src are the same,
2459 so no action is necessary. */
2460 if (rtx_equal_p (dst
, src
))
2463 /* It is unclear if we can ever reach here, but we may as well handle
2464 it. Allocate a temporary, and split this into a store/load to/from
2466 temp
= assign_stack_temp (GET_MODE (dst
), ssize
);
2467 emit_group_store (temp
, src
, type
, ssize
);
2468 emit_group_load (dst
, temp
, type
, ssize
);
2471 else if (!MEM_P (dst
) && GET_CODE (dst
) != CONCAT
)
2473 machine_mode outer
= GET_MODE (dst
);
2479 if (!REG_P (dst
) || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
2480 dst
= gen_reg_rtx (outer
);
2482 /* Make life a bit easier for combine. */
2483 /* If the first element of the vector is the low part
2484 of the destination mode, use a paradoxical subreg to
2485 initialize the destination. */
2488 inner
= GET_MODE (tmps
[start
]);
2489 bytepos
= subreg_lowpart_offset (inner
, outer
);
2490 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, start
), 1)),
2493 temp
= simplify_gen_subreg (outer
, tmps
[start
],
2497 emit_move_insn (dst
, temp
);
2504 /* If the first element wasn't the low part, try the last. */
2506 && start
< finish
- 1)
2508 inner
= GET_MODE (tmps
[finish
- 1]);
2509 bytepos
= subreg_lowpart_offset (inner
, outer
);
2510 if (known_eq (rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0,
2514 temp
= simplify_gen_subreg (outer
, tmps
[finish
- 1],
2518 emit_move_insn (dst
, temp
);
2525 /* Otherwise, simply initialize the result to zero. */
2527 emit_move_insn (dst
, CONST0_RTX (outer
));
2530 /* Process the pieces. */
2531 for (i
= start
; i
< finish
; i
++)
2533 poly_int64 bytepos
= rtx_to_poly_int64 (XEXP (XVECEXP (src
, 0, i
), 1));
2534 machine_mode mode
= GET_MODE (tmps
[i
]);
2535 poly_int64 bytelen
= GET_MODE_SIZE (mode
);
2536 poly_uint64 adj_bytelen
;
2539 /* Handle trailing fragments that run over the size of the struct.
2540 It's the target's responsibility to make sure that the fragment
2541 cannot be strictly smaller in some cases and strictly larger
2543 gcc_checking_assert (ordered_p (bytepos
+ bytelen
, ssize
));
2544 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2545 adj_bytelen
= ssize
- bytepos
;
2547 adj_bytelen
= bytelen
;
2549 if (GET_CODE (dst
) == CONCAT
)
2551 if (known_le (bytepos
+ adj_bytelen
,
2552 GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2553 dest
= XEXP (dst
, 0);
2554 else if (known_ge (bytepos
, GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)))))
2556 bytepos
-= GET_MODE_SIZE (GET_MODE (XEXP (dst
, 0)));
2557 dest
= XEXP (dst
, 1);
2561 machine_mode dest_mode
= GET_MODE (dest
);
2562 machine_mode tmp_mode
= GET_MODE (tmps
[i
]);
2564 gcc_assert (known_eq (bytepos
, 0) && XVECLEN (src
, 0));
2566 if (GET_MODE_ALIGNMENT (dest_mode
)
2567 >= GET_MODE_ALIGNMENT (tmp_mode
))
2569 dest
= assign_stack_temp (dest_mode
,
2570 GET_MODE_SIZE (dest_mode
));
2571 emit_move_insn (adjust_address (dest
,
2579 dest
= assign_stack_temp (tmp_mode
,
2580 GET_MODE_SIZE (tmp_mode
));
2581 emit_move_insn (dest
, tmps
[i
]);
2582 dst
= adjust_address (dest
, dest_mode
, bytepos
);
2588 /* Handle trailing fragments that run over the size of the struct. */
2589 if (known_size_p (ssize
) && maybe_gt (bytepos
+ bytelen
, ssize
))
2591 /* store_bit_field always takes its value from the lsb.
2592 Move the fragment to the lsb if it's not already there. */
2594 #ifdef BLOCK_REG_PADDING
2595 BLOCK_REG_PADDING (GET_MODE (orig_dst
), type
, i
== start
)
2596 == (BYTES_BIG_ENDIAN
? PAD_UPWARD
: PAD_DOWNWARD
)
2602 poly_int64 shift
= (bytelen
- (ssize
- bytepos
)) * BITS_PER_UNIT
;
2603 tmps
[i
] = expand_shift (RSHIFT_EXPR
, mode
, tmps
[i
],
2607 /* Make sure not to write past the end of the struct. */
2608 store_bit_field (dest
,
2609 adj_bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2610 bytepos
* BITS_PER_UNIT
, ssize
* BITS_PER_UNIT
- 1,
2611 VOIDmode
, tmps
[i
], false);
2614 /* Optimize the access just a bit. */
2615 else if (MEM_P (dest
)
2616 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (dest
))
2617 || MEM_ALIGN (dest
) >= GET_MODE_ALIGNMENT (mode
))
2618 && multiple_p (bytepos
* BITS_PER_UNIT
,
2619 GET_MODE_ALIGNMENT (mode
))
2620 && known_eq (bytelen
, GET_MODE_SIZE (mode
)))
2621 emit_move_insn (adjust_address (dest
, mode
, bytepos
), tmps
[i
]);
2624 store_bit_field (dest
, bytelen
* BITS_PER_UNIT
, bytepos
* BITS_PER_UNIT
,
2625 0, 0, mode
, tmps
[i
], false);
2628 /* Copy from the pseudo into the (probable) hard reg. */
2629 if (orig_dst
!= dst
)
2630 emit_move_insn (orig_dst
, dst
);
2633 /* Return a form of X that does not use a PARALLEL. TYPE is the type
2634 of the value stored in X. */
2637 maybe_emit_group_store (rtx x
, tree type
)
2639 machine_mode mode
= TYPE_MODE (type
);
2640 gcc_checking_assert (GET_MODE (x
) == VOIDmode
|| GET_MODE (x
) == mode
);
2641 if (GET_CODE (x
) == PARALLEL
)
2643 rtx result
= gen_reg_rtx (mode
);
2644 emit_group_store (result
, x
, type
, int_size_in_bytes (type
));
2650 /* Copy a BLKmode object of TYPE out of a register SRCREG into TARGET.
2652 This is used on targets that return BLKmode values in registers. */
2655 copy_blkmode_from_reg (rtx target
, rtx srcreg
, tree type
)
2657 unsigned HOST_WIDE_INT bytes
= int_size_in_bytes (type
);
2658 rtx src
= NULL
, dst
= NULL
;
2659 unsigned HOST_WIDE_INT bitsize
= MIN (TYPE_ALIGN (type
), BITS_PER_WORD
);
2660 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0;
2661 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2662 fixed_size_mode mode
= as_a
<fixed_size_mode
> (GET_MODE (srcreg
));
2663 fixed_size_mode tmode
= as_a
<fixed_size_mode
> (GET_MODE (target
));
2664 fixed_size_mode copy_mode
;
2666 /* BLKmode registers created in the back-end shouldn't have survived. */
2667 gcc_assert (mode
!= BLKmode
);
2669 /* If the structure doesn't take up a whole number of words, see whether
2670 SRCREG is padded on the left or on the right. If it's on the left,
2671 set PADDING_CORRECTION to the number of bits to skip.
2673 In most ABIs, the structure will be returned at the least end of
2674 the register, which translates to right padding on little-endian
2675 targets and left padding on big-endian targets. The opposite
2676 holds if the structure is returned at the most significant
2677 end of the register. */
2678 if (bytes
% UNITS_PER_WORD
!= 0
2679 && (targetm
.calls
.return_in_msb (type
)
2681 : BYTES_BIG_ENDIAN
))
2683 = (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
) * BITS_PER_UNIT
));
2685 /* We can use a single move if we have an exact mode for the size. */
2686 else if (MEM_P (target
)
2687 && (!targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
))
2688 || MEM_ALIGN (target
) >= GET_MODE_ALIGNMENT (mode
))
2689 && bytes
== GET_MODE_SIZE (mode
))
2691 emit_move_insn (adjust_address (target
, mode
, 0), srcreg
);
2695 /* And if we additionally have the same mode for a register. */
2696 else if (REG_P (target
)
2697 && GET_MODE (target
) == mode
2698 && bytes
== GET_MODE_SIZE (mode
))
2700 emit_move_insn (target
, srcreg
);
2704 /* This code assumes srcreg is at least a full word. If it isn't, copy it
2705 into a new pseudo which is a full word. */
2706 if (GET_MODE_SIZE (mode
) < UNITS_PER_WORD
)
2708 srcreg
= convert_to_mode (word_mode
, srcreg
, TYPE_UNSIGNED (type
));
2712 /* Copy the structure BITSIZE bits at a time. If the target lives in
2713 memory, take care of not reading/writing past its end by selecting
2714 a copy mode suited to BITSIZE. This should always be possible given
2717 If the target lives in register, make sure not to select a copy mode
2718 larger than the mode of the register.
2720 We could probably emit more efficient code for machines which do not use
2721 strict alignment, but it doesn't seem worth the effort at the current
2724 copy_mode
= word_mode
;
2727 opt_scalar_int_mode mem_mode
= int_mode_for_size (bitsize
, 1);
2728 if (mem_mode
.exists ())
2729 copy_mode
= mem_mode
.require ();
2731 else if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2734 for (bitpos
= 0, xbitpos
= padding_correction
;
2735 bitpos
< bytes
* BITS_PER_UNIT
;
2736 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2738 /* We need a new source operand each time xbitpos is on a
2739 word boundary and when xbitpos == padding_correction
2740 (the first time through). */
2741 if (xbitpos
% BITS_PER_WORD
== 0 || xbitpos
== padding_correction
)
2742 src
= operand_subword_force (srcreg
, xbitpos
/ BITS_PER_WORD
, mode
);
2744 /* We need a new destination operand each time bitpos is on
2746 if (REG_P (target
) && GET_MODE_BITSIZE (tmode
) < BITS_PER_WORD
)
2748 else if (bitpos
% BITS_PER_WORD
== 0)
2749 dst
= operand_subword (target
, bitpos
/ BITS_PER_WORD
, 1, tmode
);
2751 /* Use xbitpos for the source extraction (right justified) and
2752 bitpos for the destination store (left justified). */
2753 store_bit_field (dst
, bitsize
, bitpos
% BITS_PER_WORD
, 0, 0, copy_mode
,
2754 extract_bit_field (src
, bitsize
,
2755 xbitpos
% BITS_PER_WORD
, 1,
2756 NULL_RTX
, copy_mode
, copy_mode
,
2762 /* Copy BLKmode value SRC into a register of mode MODE_IN. Return the
2763 register if it contains any data, otherwise return null.
2765 This is used on targets that return BLKmode values in registers. */
2768 copy_blkmode_to_reg (machine_mode mode_in
, tree src
)
2771 unsigned HOST_WIDE_INT bitpos
, xbitpos
, padding_correction
= 0, bytes
;
2772 unsigned int bitsize
;
2773 rtx
*dst_words
, dst
, x
, src_word
= NULL_RTX
, dst_word
= NULL_RTX
;
2774 /* No current ABI uses variable-sized modes to pass a BLKmnode type. */
2775 fixed_size_mode mode
= as_a
<fixed_size_mode
> (mode_in
);
2776 fixed_size_mode dst_mode
;
2777 scalar_int_mode min_mode
;
2779 gcc_assert (TYPE_MODE (TREE_TYPE (src
)) == BLKmode
);
2781 x
= expand_normal (src
);
2783 bytes
= arg_int_size_in_bytes (TREE_TYPE (src
));
2787 /* If the structure doesn't take up a whole number of words, see
2788 whether the register value should be padded on the left or on
2789 the right. Set PADDING_CORRECTION to the number of padding
2790 bits needed on the left side.
2792 In most ABIs, the structure will be returned at the least end of
2793 the register, which translates to right padding on little-endian
2794 targets and left padding on big-endian targets. The opposite
2795 holds if the structure is returned at the most significant
2796 end of the register. */
2797 if (bytes
% UNITS_PER_WORD
!= 0
2798 && (targetm
.calls
.return_in_msb (TREE_TYPE (src
))
2800 : BYTES_BIG_ENDIAN
))
2801 padding_correction
= (BITS_PER_WORD
- ((bytes
% UNITS_PER_WORD
)
2804 n_regs
= (bytes
+ UNITS_PER_WORD
- 1) / UNITS_PER_WORD
;
2805 dst_words
= XALLOCAVEC (rtx
, n_regs
);
2806 bitsize
= MIN (TYPE_ALIGN (TREE_TYPE (src
)), BITS_PER_WORD
);
2807 min_mode
= smallest_int_mode_for_size (bitsize
);
2809 /* Copy the structure BITSIZE bits at a time. */
2810 for (bitpos
= 0, xbitpos
= padding_correction
;
2811 bitpos
< bytes
* BITS_PER_UNIT
;
2812 bitpos
+= bitsize
, xbitpos
+= bitsize
)
2814 /* We need a new destination pseudo each time xbitpos is
2815 on a word boundary and when xbitpos == padding_correction
2816 (the first time through). */
2817 if (xbitpos
% BITS_PER_WORD
== 0
2818 || xbitpos
== padding_correction
)
2820 /* Generate an appropriate register. */
2821 dst_word
= gen_reg_rtx (word_mode
);
2822 dst_words
[xbitpos
/ BITS_PER_WORD
] = dst_word
;
2824 /* Clear the destination before we move anything into it. */
2825 emit_move_insn (dst_word
, CONST0_RTX (word_mode
));
2828 /* Find the largest integer mode that can be used to copy all or as
2829 many bits as possible of the structure if the target supports larger
2830 copies. There are too many corner cases here w.r.t to alignments on
2831 the read/writes. So if there is any padding just use single byte
2833 opt_scalar_int_mode mode_iter
;
2834 if (padding_correction
== 0 && !STRICT_ALIGNMENT
)
2836 FOR_EACH_MODE_FROM (mode_iter
, min_mode
)
2838 unsigned int msize
= GET_MODE_BITSIZE (mode_iter
.require ());
2839 if (msize
<= ((bytes
* BITS_PER_UNIT
) - bitpos
)
2840 && msize
<= BITS_PER_WORD
)
2847 /* We need a new source operand each time bitpos is on a word
2849 if (bitpos
% BITS_PER_WORD
== 0)
2850 src_word
= operand_subword_force (x
, bitpos
/ BITS_PER_WORD
, BLKmode
);
2852 /* Use bitpos for the source extraction (left justified) and
2853 xbitpos for the destination store (right justified). */
2854 store_bit_field (dst_word
, bitsize
, xbitpos
% BITS_PER_WORD
,
2856 extract_bit_field (src_word
, bitsize
,
2857 bitpos
% BITS_PER_WORD
, 1,
2858 NULL_RTX
, word_mode
, word_mode
,
2863 if (mode
== BLKmode
)
2865 /* Find the smallest integer mode large enough to hold the
2866 entire structure. */
2867 opt_scalar_int_mode mode_iter
;
2868 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
2869 if (GET_MODE_SIZE (mode_iter
.require ()) >= bytes
)
2872 /* A suitable mode should have been found. */
2873 mode
= mode_iter
.require ();
2876 if (GET_MODE_SIZE (mode
) < GET_MODE_SIZE (word_mode
))
2877 dst_mode
= word_mode
;
2880 dst
= gen_reg_rtx (dst_mode
);
2882 for (i
= 0; i
< n_regs
; i
++)
2883 emit_move_insn (operand_subword (dst
, i
, 0, dst_mode
), dst_words
[i
]);
2885 if (mode
!= dst_mode
)
2886 dst
= gen_lowpart (mode
, dst
);
2891 /* Add a USE expression for REG to the (possibly empty) list pointed
2892 to by CALL_FUSAGE. REG must denote a hard register. */
2895 use_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2897 gcc_assert (REG_P (reg
));
2899 if (!HARD_REGISTER_P (reg
))
2903 = gen_rtx_EXPR_LIST (mode
, gen_rtx_USE (VOIDmode
, reg
), *call_fusage
);
2906 /* Add a CLOBBER expression for REG to the (possibly empty) list pointed
2907 to by CALL_FUSAGE. REG must denote a hard register. */
2910 clobber_reg_mode (rtx
*call_fusage
, rtx reg
, machine_mode mode
)
2912 gcc_assert (REG_P (reg
) && REGNO (reg
) < FIRST_PSEUDO_REGISTER
);
2915 = gen_rtx_EXPR_LIST (mode
, gen_rtx_CLOBBER (VOIDmode
, reg
), *call_fusage
);
2918 /* Add USE expressions to *CALL_FUSAGE for each of NREGS consecutive regs,
2919 starting at REGNO. All of these registers must be hard registers. */
2922 use_regs (rtx
*call_fusage
, int regno
, int nregs
)
2926 gcc_assert (regno
+ nregs
<= FIRST_PSEUDO_REGISTER
);
2928 for (i
= 0; i
< nregs
; i
++)
2929 use_reg (call_fusage
, regno_reg_rtx
[regno
+ i
]);
2932 /* Add USE expressions to *CALL_FUSAGE for each REG contained in the
2933 PARALLEL REGS. This is for calls that pass values in multiple
2934 non-contiguous locations. The Irix 6 ABI has examples of this. */
2937 use_group_regs (rtx
*call_fusage
, rtx regs
)
2941 for (i
= 0; i
< XVECLEN (regs
, 0); i
++)
2943 rtx reg
= XEXP (XVECEXP (regs
, 0, i
), 0);
2945 /* A NULL entry means the parameter goes both on the stack and in
2946 registers. This can also be a MEM for targets that pass values
2947 partially on the stack and partially in registers. */
2948 if (reg
!= 0 && REG_P (reg
))
2949 use_reg (call_fusage
, reg
);
2953 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2954 assigment and the code of the expresion on the RHS is CODE. Return
2958 get_def_for_expr (tree name
, enum tree_code code
)
2962 if (TREE_CODE (name
) != SSA_NAME
)
2965 def_stmt
= get_gimple_for_ssa_name (name
);
2967 || gimple_assign_rhs_code (def_stmt
) != code
)
2973 /* Return the defining gimple statement for SSA_NAME NAME if it is an
2974 assigment and the class of the expresion on the RHS is CLASS. Return
2978 get_def_for_expr_class (tree name
, enum tree_code_class tclass
)
2982 if (TREE_CODE (name
) != SSA_NAME
)
2985 def_stmt
= get_gimple_for_ssa_name (name
);
2987 || TREE_CODE_CLASS (gimple_assign_rhs_code (def_stmt
)) != tclass
)
2993 /* Write zeros through the storage of OBJECT. If OBJECT has BLKmode, SIZE is
2994 its length in bytes. */
2997 clear_storage_hints (rtx object
, rtx size
, enum block_op_methods method
,
2998 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
2999 unsigned HOST_WIDE_INT min_size
,
3000 unsigned HOST_WIDE_INT max_size
,
3001 unsigned HOST_WIDE_INT probable_max_size
)
3003 machine_mode mode
= GET_MODE (object
);
3006 gcc_assert (method
== BLOCK_OP_NORMAL
|| method
== BLOCK_OP_TAILCALL
);
3008 /* If OBJECT is not BLKmode and SIZE is the same size as its mode,
3009 just move a zero. Otherwise, do this a piece at a time. */
3010 poly_int64 size_val
;
3012 && poly_int_rtx_p (size
, &size_val
)
3013 && known_eq (size_val
, GET_MODE_SIZE (mode
)))
3015 rtx zero
= CONST0_RTX (mode
);
3018 emit_move_insn (object
, zero
);
3022 if (COMPLEX_MODE_P (mode
))
3024 zero
= CONST0_RTX (GET_MODE_INNER (mode
));
3027 write_complex_part (object
, zero
, 0);
3028 write_complex_part (object
, zero
, 1);
3034 if (size
== const0_rtx
)
3037 align
= MEM_ALIGN (object
);
3039 if (CONST_INT_P (size
)
3040 && targetm
.use_by_pieces_infrastructure_p (INTVAL (size
), align
,
3042 optimize_insn_for_speed_p ()))
3043 clear_by_pieces (object
, INTVAL (size
), align
);
3044 else if (set_storage_via_setmem (object
, size
, const0_rtx
, align
,
3045 expected_align
, expected_size
,
3046 min_size
, max_size
, probable_max_size
))
3048 else if (ADDR_SPACE_GENERIC_P (MEM_ADDR_SPACE (object
)))
3049 return set_storage_via_libcall (object
, size
, const0_rtx
,
3050 method
== BLOCK_OP_TAILCALL
);
3058 clear_storage (rtx object
, rtx size
, enum block_op_methods method
)
3060 unsigned HOST_WIDE_INT max
, min
= 0;
3061 if (GET_CODE (size
) == CONST_INT
)
3062 min
= max
= UINTVAL (size
);
3064 max
= GET_MODE_MASK (GET_MODE (size
));
3065 return clear_storage_hints (object
, size
, method
, 0, -1, min
, max
, max
);
3069 /* A subroutine of clear_storage. Expand a call to memset.
3070 Return the return value of memset, 0 otherwise. */
3073 set_storage_via_libcall (rtx object
, rtx size
, rtx val
, bool tailcall
)
3075 tree call_expr
, fn
, object_tree
, size_tree
, val_tree
;
3076 machine_mode size_mode
;
3078 object
= copy_addr_to_reg (XEXP (object
, 0));
3079 object_tree
= make_tree (ptr_type_node
, object
);
3081 if (!CONST_INT_P (val
))
3082 val
= convert_to_mode (TYPE_MODE (integer_type_node
), val
, 1);
3083 val_tree
= make_tree (integer_type_node
, val
);
3085 size_mode
= TYPE_MODE (sizetype
);
3086 size
= convert_to_mode (size_mode
, size
, 1);
3087 size
= copy_to_mode_reg (size_mode
, size
);
3088 size_tree
= make_tree (sizetype
, size
);
3090 /* It is incorrect to use the libcall calling conventions for calls to
3091 memset because it can be provided by the user. */
3092 fn
= builtin_decl_implicit (BUILT_IN_MEMSET
);
3093 call_expr
= build_call_expr (fn
, 3, object_tree
, val_tree
, size_tree
);
3094 CALL_EXPR_TAILCALL (call_expr
) = tailcall
;
3096 return expand_call (call_expr
, NULL_RTX
, false);
3099 /* Expand a setmem pattern; return true if successful. */
3102 set_storage_via_setmem (rtx object
, rtx size
, rtx val
, unsigned int align
,
3103 unsigned int expected_align
, HOST_WIDE_INT expected_size
,
3104 unsigned HOST_WIDE_INT min_size
,
3105 unsigned HOST_WIDE_INT max_size
,
3106 unsigned HOST_WIDE_INT probable_max_size
)
3108 /* Try the most limited insn first, because there's no point
3109 including more than one in the machine description unless
3110 the more limited one has some advantage. */
3112 if (expected_align
< align
)
3113 expected_align
= align
;
3114 if (expected_size
!= -1)
3116 if ((unsigned HOST_WIDE_INT
)expected_size
> max_size
)
3117 expected_size
= max_size
;
3118 if ((unsigned HOST_WIDE_INT
)expected_size
< min_size
)
3119 expected_size
= min_size
;
3122 opt_scalar_int_mode mode_iter
;
3123 FOR_EACH_MODE_IN_CLASS (mode_iter
, MODE_INT
)
3125 scalar_int_mode mode
= mode_iter
.require ();
3126 enum insn_code code
= direct_optab_handler (setmem_optab
, mode
);
3128 if (code
!= CODE_FOR_nothing
3129 /* We don't need MODE to be narrower than BITS_PER_HOST_WIDE_INT
3130 here because if SIZE is less than the mode mask, as it is
3131 returned by the macro, it will definitely be less than the
3132 actual mode mask. Since SIZE is within the Pmode address
3133 space, we limit MODE to Pmode. */
3134 && ((CONST_INT_P (size
)
3135 && ((unsigned HOST_WIDE_INT
) INTVAL (size
)
3136 <= (GET_MODE_MASK (mode
) >> 1)))
3137 || max_size
<= (GET_MODE_MASK (mode
) >> 1)
3138 || GET_MODE_BITSIZE (mode
) >= GET_MODE_BITSIZE (Pmode
)))
3140 struct expand_operand ops
[9];
3143 nops
= insn_data
[(int) code
].n_generator_args
;
3144 gcc_assert (nops
== 4 || nops
== 6 || nops
== 8 || nops
== 9);
3146 create_fixed_operand (&ops
[0], object
);
3147 /* The check above guarantees that this size conversion is valid. */
3148 create_convert_operand_to (&ops
[1], size
, mode
, true);
3149 create_convert_operand_from (&ops
[2], val
, byte_mode
, true);
3150 create_integer_operand (&ops
[3], align
/ BITS_PER_UNIT
);
3153 create_integer_operand (&ops
[4], expected_align
/ BITS_PER_UNIT
);
3154 create_integer_operand (&ops
[5], expected_size
);
3158 create_integer_operand (&ops
[6], min_size
);
3159 /* If we cannot represent the maximal size,
3160 make parameter NULL. */
3161 if ((HOST_WIDE_INT
) max_size
!= -1)
3162 create_integer_operand (&ops
[7], max_size
);
3164 create_fixed_operand (&ops
[7], NULL
);
3168 /* If we cannot represent the maximal size,
3169 make parameter NULL. */
3170 if ((HOST_WIDE_INT
) probable_max_size
!= -1)
3171 create_integer_operand (&ops
[8], probable_max_size
);
3173 create_fixed_operand (&ops
[8], NULL
);
3175 if (maybe_expand_insn (code
, nops
, ops
))
3184 /* Write to one of the components of the complex value CPLX. Write VAL to
3185 the real part if IMAG_P is false, and the imaginary part if its true. */
3188 write_complex_part (rtx cplx
, rtx val
, bool imag_p
)
3194 if (GET_CODE (cplx
) == CONCAT
)
3196 emit_move_insn (XEXP (cplx
, imag_p
), val
);
3200 cmode
= GET_MODE (cplx
);
3201 imode
= GET_MODE_INNER (cmode
);
3202 ibitsize
= GET_MODE_BITSIZE (imode
);
3204 /* For MEMs simplify_gen_subreg may generate an invalid new address
3205 because, e.g., the original address is considered mode-dependent
3206 by the target, which restricts simplify_subreg from invoking
3207 adjust_address_nv. Instead of preparing fallback support for an
3208 invalid address, we call adjust_address_nv directly. */
3211 emit_move_insn (adjust_address_nv (cplx
, imode
,
3212 imag_p
? GET_MODE_SIZE (imode
) : 0),
3217 /* If the sub-object is at least word sized, then we know that subregging
3218 will work. This special case is important, since store_bit_field
3219 wants to operate on integer modes, and there's rarely an OImode to
3220 correspond to TCmode. */
3221 if (ibitsize
>= BITS_PER_WORD
3222 /* For hard regs we have exact predicates. Assume we can split
3223 the original object if it spans an even number of hard regs.
3224 This special case is important for SCmode on 64-bit platforms
3225 where the natural size of floating-point regs is 32-bit. */
3227 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3228 && REG_NREGS (cplx
) % 2 == 0))
3230 rtx part
= simplify_gen_subreg (imode
, cplx
, cmode
,
3231 imag_p
? GET_MODE_SIZE (imode
) : 0);
3234 emit_move_insn (part
, val
);
3238 /* simplify_gen_subreg may fail for sub-word MEMs. */
3239 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3242 store_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0, 0, 0, imode
, val
,
3246 /* Extract one of the components of the complex value CPLX. Extract the
3247 real part if IMAG_P is false, and the imaginary part if it's true. */
3250 read_complex_part (rtx cplx
, bool imag_p
)
3256 if (GET_CODE (cplx
) == CONCAT
)
3257 return XEXP (cplx
, imag_p
);
3259 cmode
= GET_MODE (cplx
);
3260 imode
= GET_MODE_INNER (cmode
);
3261 ibitsize
= GET_MODE_BITSIZE (imode
);
3263 /* Special case reads from complex constants that got spilled to memory. */
3264 if (MEM_P (cplx
) && GET_CODE (XEXP (cplx
, 0)) == SYMBOL_REF
)
3266 tree decl
= SYMBOL_REF_DECL (XEXP (cplx
, 0));
3267 if (decl
&& TREE_CODE (decl
) == COMPLEX_CST
)
3269 tree part
= imag_p
? TREE_IMAGPART (decl
) : TREE_REALPART (decl
);
3270 if (CONSTANT_CLASS_P (part
))
3271 return expand_expr (part
, NULL_RTX
, imode
, EXPAND_NORMAL
);
3275 /* For MEMs simplify_gen_subreg may generate an invalid new address
3276 because, e.g., the original address is considered mode-dependent
3277 by the target, which restricts simplify_subreg from invoking
3278 adjust_address_nv. Instead of preparing fallback support for an
3279 invalid address, we call adjust_address_nv directly. */
3281 return adjust_address_nv (cplx
, imode
,
3282 imag_p
? GET_MODE_SIZE (imode
) : 0);
3284 /* If the sub-object is at least word sized, then we know that subregging
3285 will work. This special case is important, since extract_bit_field
3286 wants to operate on integer modes, and there's rarely an OImode to
3287 correspond to TCmode. */
3288 if (ibitsize
>= BITS_PER_WORD
3289 /* For hard regs we have exact predicates. Assume we can split
3290 the original object if it spans an even number of hard regs.
3291 This special case is important for SCmode on 64-bit platforms
3292 where the natural size of floating-point regs is 32-bit. */
3294 && REGNO (cplx
) < FIRST_PSEUDO_REGISTER
3295 && REG_NREGS (cplx
) % 2 == 0))
3297 rtx ret
= simplify_gen_subreg (imode
, cplx
, cmode
,
3298 imag_p
? GET_MODE_SIZE (imode
) : 0);
3302 /* simplify_gen_subreg may fail for sub-word MEMs. */
3303 gcc_assert (MEM_P (cplx
) && ibitsize
< BITS_PER_WORD
);
3306 return extract_bit_field (cplx
, ibitsize
, imag_p
? ibitsize
: 0,
3307 true, NULL_RTX
, imode
, imode
, false, NULL
);
3310 /* A subroutine of emit_move_insn_1. Yet another lowpart generator.
3311 NEW_MODE and OLD_MODE are the same size. Return NULL if X cannot be
3312 represented in NEW_MODE. If FORCE is true, this will never happen, as
3313 we'll force-create a SUBREG if needed. */
3316 emit_move_change_mode (machine_mode new_mode
,
3317 machine_mode old_mode
, rtx x
, bool force
)
3321 if (push_operand (x
, GET_MODE (x
)))
3323 ret
= gen_rtx_MEM (new_mode
, XEXP (x
, 0));
3324 MEM_COPY_ATTRIBUTES (ret
, x
);
3328 /* We don't have to worry about changing the address since the
3329 size in bytes is supposed to be the same. */
3330 if (reload_in_progress
)
3332 /* Copy the MEM to change the mode and move any
3333 substitutions from the old MEM to the new one. */
3334 ret
= adjust_address_nv (x
, new_mode
, 0);
3335 copy_replacements (x
, ret
);
3338 ret
= adjust_address (x
, new_mode
, 0);
3342 /* Note that we do want simplify_subreg's behavior of validating
3343 that the new mode is ok for a hard register. If we were to use
3344 simplify_gen_subreg, we would create the subreg, but would
3345 probably run into the target not being able to implement it. */
3346 /* Except, of course, when FORCE is true, when this is exactly what
3347 we want. Which is needed for CCmodes on some targets. */
3349 ret
= simplify_gen_subreg (new_mode
, x
, old_mode
, 0);
3351 ret
= simplify_subreg (new_mode
, x
, old_mode
, 0);
3357 /* A subroutine of emit_move_insn_1. Generate a move from Y into X using
3358 an integer mode of the same size as MODE. Returns the instruction
3359 emitted, or NULL if such a move could not be generated. */
3362 emit_move_via_integer (machine_mode mode
, rtx x
, rtx y
, bool force
)
3364 scalar_int_mode imode
;
3365 enum insn_code code
;
3367 /* There must exist a mode of the exact size we require. */
3368 if (!int_mode_for_mode (mode
).exists (&imode
))
3371 /* The target must support moves in this mode. */
3372 code
= optab_handler (mov_optab
, imode
);
3373 if (code
== CODE_FOR_nothing
)
3376 x
= emit_move_change_mode (imode
, mode
, x
, force
);
3379 y
= emit_move_change_mode (imode
, mode
, y
, force
);
3382 return emit_insn (GEN_FCN (code
) (x
, y
));
3385 /* A subroutine of emit_move_insn_1. X is a push_operand in MODE.
3386 Return an equivalent MEM that does not use an auto-increment. */
3389 emit_move_resolve_push (machine_mode mode
, rtx x
)
3391 enum rtx_code code
= GET_CODE (XEXP (x
, 0));
3394 poly_int64 adjust
= GET_MODE_SIZE (mode
);
3395 #ifdef PUSH_ROUNDING
3396 adjust
= PUSH_ROUNDING (adjust
);
3398 if (code
== PRE_DEC
|| code
== POST_DEC
)
3400 else if (code
== PRE_MODIFY
|| code
== POST_MODIFY
)
3402 rtx expr
= XEXP (XEXP (x
, 0), 1);
3404 gcc_assert (GET_CODE (expr
) == PLUS
|| GET_CODE (expr
) == MINUS
);
3405 poly_int64 val
= rtx_to_poly_int64 (XEXP (expr
, 1));
3406 if (GET_CODE (expr
) == MINUS
)
3408 gcc_assert (known_eq (adjust
, val
) || known_eq (adjust
, -val
));
3412 /* Do not use anti_adjust_stack, since we don't want to update
3413 stack_pointer_delta. */
3414 temp
= expand_simple_binop (Pmode
, PLUS
, stack_pointer_rtx
,
3415 gen_int_mode (adjust
, Pmode
), stack_pointer_rtx
,
3416 0, OPTAB_LIB_WIDEN
);
3417 if (temp
!= stack_pointer_rtx
)
3418 emit_move_insn (stack_pointer_rtx
, temp
);
3425 temp
= stack_pointer_rtx
;
3430 temp
= plus_constant (Pmode
, stack_pointer_rtx
, -adjust
);
3436 return replace_equiv_address (x
, temp
);
3439 /* A subroutine of emit_move_complex. Generate a move from Y into X.
3440 X is known to satisfy push_operand, and MODE is known to be complex.
3441 Returns the last instruction emitted. */
3444 emit_move_complex_push (machine_mode mode
, rtx x
, rtx y
)
3446 scalar_mode submode
= GET_MODE_INNER (mode
);
3449 #ifdef PUSH_ROUNDING
3450 poly_int64 submodesize
= GET_MODE_SIZE (submode
);
3452 /* In case we output to the stack, but the size is smaller than the
3453 machine can push exactly, we need to use move instructions. */
3454 if (maybe_ne (PUSH_ROUNDING (submodesize
), submodesize
))
3456 x
= emit_move_resolve_push (mode
, x
);
3457 return emit_move_insn (x
, y
);
3461 /* Note that the real part always precedes the imag part in memory
3462 regardless of machine's endianness. */
3463 switch (GET_CODE (XEXP (x
, 0)))
3477 emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3478 read_complex_part (y
, imag_first
));
3479 return emit_move_insn (gen_rtx_MEM (submode
, XEXP (x
, 0)),
3480 read_complex_part (y
, !imag_first
));
3483 /* A subroutine of emit_move_complex. Perform the move from Y to X
3484 via two moves of the parts. Returns the last instruction emitted. */
3487 emit_move_complex_parts (rtx x
, rtx y
)
3489 /* Show the output dies here. This is necessary for SUBREGs
3490 of pseudos since we cannot track their lifetimes correctly;
3491 hard regs shouldn't appear here except as return values. */
3492 if (!reload_completed
&& !reload_in_progress
3493 && REG_P (x
) && !reg_overlap_mentioned_p (x
, y
))
3496 write_complex_part (x
, read_complex_part (y
, false), false);
3497 write_complex_part (x
, read_complex_part (y
, true), true);
3499 return get_last_insn ();
3502 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3503 MODE is known to be complex. Returns the last instruction emitted. */
3506 emit_move_complex (machine_mode mode
, rtx x
, rtx y
)
3510 /* Need to take special care for pushes, to maintain proper ordering
3511 of the data, and possibly extra padding. */
3512 if (push_operand (x
, mode
))
3513 return emit_move_complex_push (mode
, x
, y
);
3515 /* See if we can coerce the target into moving both values at once, except
3516 for floating point where we favor moving as parts if this is easy. */
3517 if (GET_MODE_CLASS (mode
) == MODE_COMPLEX_FLOAT
3518 && optab_handler (mov_optab
, GET_MODE_INNER (mode
)) != CODE_FOR_nothing
3520 && HARD_REGISTER_P (x
)
3521 && REG_NREGS (x
) == 1)
3523 && HARD_REGISTER_P (y
)
3524 && REG_NREGS (y
) == 1))
3526 /* Not possible if the values are inherently not adjacent. */
3527 else if (GET_CODE (x
) == CONCAT
|| GET_CODE (y
) == CONCAT
)
3529 /* Is possible if both are registers (or subregs of registers). */
3530 else if (register_operand (x
, mode
) && register_operand (y
, mode
))
3532 /* If one of the operands is a memory, and alignment constraints
3533 are friendly enough, we may be able to do combined memory operations.
3534 We do not attempt this if Y is a constant because that combination is
3535 usually better with the by-parts thing below. */
3536 else if ((MEM_P (x
) ? !CONSTANT_P (y
) : MEM_P (y
))
3537 && (!STRICT_ALIGNMENT
3538 || get_mode_alignment (mode
) == BIGGEST_ALIGNMENT
))
3547 /* For memory to memory moves, optimal behavior can be had with the
3548 existing block move logic. */
3549 if (MEM_P (x
) && MEM_P (y
))
3551 emit_block_move (x
, y
, gen_int_mode (GET_MODE_SIZE (mode
), Pmode
),
3552 BLOCK_OP_NO_LIBCALL
);
3553 return get_last_insn ();
3556 ret
= emit_move_via_integer (mode
, x
, y
, true);
3561 return emit_move_complex_parts (x
, y
);
3564 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3565 MODE is known to be MODE_CC. Returns the last instruction emitted. */
3568 emit_move_ccmode (machine_mode mode
, rtx x
, rtx y
)
3572 /* Assume all MODE_CC modes are equivalent; if we have movcc, use it. */
3575 enum insn_code code
= optab_handler (mov_optab
, CCmode
);
3576 if (code
!= CODE_FOR_nothing
)
3578 x
= emit_move_change_mode (CCmode
, mode
, x
, true);
3579 y
= emit_move_change_mode (CCmode
, mode
, y
, true);
3580 return emit_insn (GEN_FCN (code
) (x
, y
));
3584 /* Otherwise, find the MODE_INT mode of the same width. */
3585 ret
= emit_move_via_integer (mode
, x
, y
, false);
3586 gcc_assert (ret
!= NULL
);
3590 /* Return true if word I of OP lies entirely in the
3591 undefined bits of a paradoxical subreg. */
3594 undefined_operand_subword_p (const_rtx op
, int i
)
3596 if (GET_CODE (op
) != SUBREG
)
3598 machine_mode innermostmode
= GET_MODE (SUBREG_REG (op
));
3599 poly_int64 offset
= i
* UNITS_PER_WORD
+ subreg_memory_offset (op
);
3600 return (known_ge (offset
, GET_MODE_SIZE (innermostmode
))
3601 || known_le (offset
, -UNITS_PER_WORD
));
3604 /* A subroutine of emit_move_insn_1. Generate a move from Y into X.
3605 MODE is any multi-word or full-word mode that lacks a move_insn
3606 pattern. Note that you will get better code if you define such
3607 patterns, even if they must turn into multiple assembler instructions. */
3610 emit_move_multi_word (machine_mode mode
, rtx x
, rtx y
)
3612 rtx_insn
*last_insn
= 0;
3618 /* This function can only handle cases where the number of words is
3619 known at compile time. */
3620 mode_size
= GET_MODE_SIZE (mode
).to_constant ();
3621 gcc_assert (mode_size
>= UNITS_PER_WORD
);
3623 /* If X is a push on the stack, do the push now and replace
3624 X with a reference to the stack pointer. */
3625 if (push_operand (x
, mode
))
3626 x
= emit_move_resolve_push (mode
, x
);
3628 /* If we are in reload, see if either operand is a MEM whose address
3629 is scheduled for replacement. */
3630 if (reload_in_progress
&& MEM_P (x
)
3631 && (inner
= find_replacement (&XEXP (x
, 0))) != XEXP (x
, 0))
3632 x
= replace_equiv_address_nv (x
, inner
);
3633 if (reload_in_progress
&& MEM_P (y
)
3634 && (inner
= find_replacement (&XEXP (y
, 0))) != XEXP (y
, 0))
3635 y
= replace_equiv_address_nv (y
, inner
);
3639 need_clobber
= false;
3640 for (i
= 0; i
< CEIL (mode_size
, UNITS_PER_WORD
); i
++)
3642 rtx xpart
= operand_subword (x
, i
, 1, mode
);
3645 /* Do not generate code for a move if it would come entirely
3646 from the undefined bits of a paradoxical subreg. */
3647 if (undefined_operand_subword_p (y
, i
))
3650 ypart
= operand_subword (y
, i
, 1, mode
);
3652 /* If we can't get a part of Y, put Y into memory if it is a
3653 constant. Otherwise, force it into a register. Then we must
3654 be able to get a part of Y. */
3655 if (ypart
== 0 && CONSTANT_P (y
))
3657 y
= use_anchored_address (force_const_mem (mode
, y
));
3658 ypart
= operand_subword (y
, i
, 1, mode
);
3660 else if (ypart
== 0)
3661 ypart
= operand_subword_force (y
, i
, mode
);
3663 gcc_assert (xpart
&& ypart
);
3665 need_clobber
|= (GET_CODE (xpart
) == SUBREG
);
3667 last_insn
= emit_move_insn (xpart
, ypart
);
3673 /* Show the output dies here. This is necessary for SUBREGs
3674 of pseudos since we cannot track their lifetimes correctly;
3675 hard regs shouldn't appear here except as return values.
3676 We never want to emit such a clobber after reload. */
3678 && ! (reload_in_progress
|| reload_completed
)
3679 && need_clobber
!= 0)
3687 /* Low level part of emit_move_insn.
3688 Called just like emit_move_insn, but assumes X and Y
3689 are basically valid. */
3692 emit_move_insn_1 (rtx x
, rtx y
)
3694 machine_mode mode
= GET_MODE (x
);
3695 enum insn_code code
;
3697 gcc_assert ((unsigned int) mode
< (unsigned int) MAX_MACHINE_MODE
);
3699 code
= optab_handler (mov_optab
, mode
);
3700 if (code
!= CODE_FOR_nothing
)
3701 return emit_insn (GEN_FCN (code
) (x
, y
));
3703 /* Expand complex moves by moving real part and imag part. */
3704 if (COMPLEX_MODE_P (mode
))
3705 return emit_move_complex (mode
, x
, y
);
3707 if (GET_MODE_CLASS (mode
) == MODE_DECIMAL_FLOAT
3708 || ALL_FIXED_POINT_MODE_P (mode
))
3710 rtx_insn
*result
= emit_move_via_integer (mode
, x
, y
, true);
3712 /* If we can't find an integer mode, use multi words. */
3716 return emit_move_multi_word (mode
, x
, y
);
3719 if (GET_MODE_CLASS (mode
) == MODE_CC
)
3720 return emit_move_ccmode (mode
, x
, y
);
3722 /* Try using a move pattern for the corresponding integer mode. This is
3723 only safe when simplify_subreg can convert MODE constants into integer
3724 constants. At present, it can only do this reliably if the value
3725 fits within a HOST_WIDE_INT. */
3727 || known_le (GET_MODE_BITSIZE (mode
), HOST_BITS_PER_WIDE_INT
))
3729 rtx_insn
*ret
= emit_move_via_integer (mode
, x
, y
, lra_in_progress
);
3733 if (! lra_in_progress
|| recog (PATTERN (ret
), ret
, 0) >= 0)
3738 return emit_move_multi_word (mode
, x
, y
);
3741 /* Generate code to copy Y into X.
3742 Both Y and X must have the same mode, except that
3743 Y can be a constant with VOIDmode.
3744 This mode cannot be BLKmode; use emit_block_move for that.
3746 Return the last instruction emitted. */
3749 emit_move_insn (rtx x
, rtx y
)
3751 machine_mode mode
= GET_MODE (x
);
3752 rtx y_cst
= NULL_RTX
;
3753 rtx_insn
*last_insn
;
3756 gcc_assert (mode
!= BLKmode
3757 && (GET_MODE (y
) == mode
|| GET_MODE (y
) == VOIDmode
));
3762 && SCALAR_FLOAT_MODE_P (GET_MODE (x
))
3763 && (last_insn
= compress_float_constant (x
, y
)))
3768 if (!targetm
.legitimate_constant_p (mode
, y
))
3770 y
= force_const_mem (mode
, y
);
3772 /* If the target's cannot_force_const_mem prevented the spill,
3773 assume that the target's move expanders will also take care
3774 of the non-legitimate constant. */
3778 y
= use_anchored_address (y
);
3782 /* If X or Y are memory references, verify that their addresses are valid
3785 && (! memory_address_addr_space_p (GET_MODE (x
), XEXP (x
, 0),
3787 && ! push_operand (x
, GET_MODE (x
))))
3788 x
= validize_mem (x
);
3791 && ! memory_address_addr_space_p (GET_MODE (y
), XEXP (y
, 0),
3792 MEM_ADDR_SPACE (y
)))
3793 y
= validize_mem (y
);
3795 gcc_assert (mode
!= BLKmode
);
3797 last_insn
= emit_move_insn_1 (x
, y
);
3799 if (y_cst
&& REG_P (x
)
3800 && (set
= single_set (last_insn
)) != NULL_RTX
3801 && SET_DEST (set
) == x
3802 && ! rtx_equal_p (y_cst
, SET_SRC (set
)))
3803 set_unique_reg_note (last_insn
, REG_EQUAL
, copy_rtx (y_cst
));
3808 /* Generate the body of an instruction to copy Y into X.
3809 It may be a list of insns, if one insn isn't enough. */
3812 gen_move_insn (rtx x
, rtx y
)
3817 emit_move_insn_1 (x
, y
);
3823 /* If Y is representable exactly in a narrower mode, and the target can
3824 perform the extension directly from constant or memory, then emit the
3825 move as an extension. */
3828 compress_float_constant (rtx x
, rtx y
)
3830 machine_mode dstmode
= GET_MODE (x
);
3831 machine_mode orig_srcmode
= GET_MODE (y
);
3832 machine_mode srcmode
;
3833 const REAL_VALUE_TYPE
*r
;
3834 int oldcost
, newcost
;
3835 bool speed
= optimize_insn_for_speed_p ();
3837 r
= CONST_DOUBLE_REAL_VALUE (y
);
3839 if (targetm
.legitimate_constant_p (dstmode
, y
))
3840 oldcost
= set_src_cost (y
, orig_srcmode
, speed
);
3842 oldcost
= set_src_cost (force_const_mem (dstmode
, y
), dstmode
, speed
);
3844 FOR_EACH_MODE_UNTIL (srcmode
, orig_srcmode
)
3848 rtx_insn
*last_insn
;
3850 /* Skip if the target can't extend this way. */
3851 ic
= can_extend_p (dstmode
, srcmode
, 0);
3852 if (ic
== CODE_FOR_nothing
)
3855 /* Skip if the narrowed value isn't exact. */
3856 if (! exact_real_truncate (srcmode
, r
))
3859 trunc_y
= const_double_from_real_value (*r
, srcmode
);
3861 if (targetm
.legitimate_constant_p (srcmode
, trunc_y
))
3863 /* Skip if the target needs extra instructions to perform
3865 if (!insn_operand_matches (ic
, 1, trunc_y
))
3867 /* This is valid, but may not be cheaper than the original. */
3868 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3870 if (oldcost
< newcost
)
3873 else if (float_extend_from_mem
[dstmode
][srcmode
])
3875 trunc_y
= force_const_mem (srcmode
, trunc_y
);
3876 /* This is valid, but may not be cheaper than the original. */
3877 newcost
= set_src_cost (gen_rtx_FLOAT_EXTEND (dstmode
, trunc_y
),
3879 if (oldcost
< newcost
)
3881 trunc_y
= validize_mem (trunc_y
);
3886 /* For CSE's benefit, force the compressed constant pool entry
3887 into a new pseudo. This constant may be used in different modes,
3888 and if not, combine will put things back together for us. */
3889 trunc_y
= force_reg (srcmode
, trunc_y
);
3891 /* If x is a hard register, perform the extension into a pseudo,
3892 so that e.g. stack realignment code is aware of it. */
3894 if (REG_P (x
) && HARD_REGISTER_P (x
))
3895 target
= gen_reg_rtx (dstmode
);
3897 emit_unop_insn (ic
, target
, trunc_y
, UNKNOWN
);
3898 last_insn
= get_last_insn ();
3901 set_unique_reg_note (last_insn
, REG_EQUAL
, y
);
3904 return emit_move_insn (x
, target
);
3911 /* Pushing data onto the stack. */
3913 /* Push a block of length SIZE (perhaps variable)
3914 and return an rtx to address the beginning of the block.
3915 The value may be virtual_outgoing_args_rtx.
3917 EXTRA is the number of bytes of padding to push in addition to SIZE.
3918 BELOW nonzero means this padding comes at low addresses;
3919 otherwise, the padding comes at high addresses. */
3922 push_block (rtx size
, poly_int64 extra
, int below
)
3926 size
= convert_modes (Pmode
, ptr_mode
, size
, 1);
3927 if (CONSTANT_P (size
))
3928 anti_adjust_stack (plus_constant (Pmode
, size
, extra
));
3929 else if (REG_P (size
) && known_eq (extra
, 0))
3930 anti_adjust_stack (size
);
3933 temp
= copy_to_mode_reg (Pmode
, size
);
3934 if (maybe_ne (extra
, 0))
3935 temp
= expand_binop (Pmode
, add_optab
, temp
,
3936 gen_int_mode (extra
, Pmode
),
3937 temp
, 0, OPTAB_LIB_WIDEN
);
3938 anti_adjust_stack (temp
);
3941 if (STACK_GROWS_DOWNWARD
)
3943 temp
= virtual_outgoing_args_rtx
;
3944 if (maybe_ne (extra
, 0) && below
)
3945 temp
= plus_constant (Pmode
, temp
, extra
);
3950 if (poly_int_rtx_p (size
, &csize
))
3951 temp
= plus_constant (Pmode
, virtual_outgoing_args_rtx
,
3952 -csize
- (below
? 0 : extra
));
3953 else if (maybe_ne (extra
, 0) && !below
)
3954 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3955 negate_rtx (Pmode
, plus_constant (Pmode
, size
,
3958 temp
= gen_rtx_PLUS (Pmode
, virtual_outgoing_args_rtx
,
3959 negate_rtx (Pmode
, size
));
3962 return memory_address (NARROWEST_INT_MODE
, temp
);
3965 /* A utility routine that returns the base of an auto-inc memory, or NULL. */
3968 mem_autoinc_base (rtx mem
)
3972 rtx addr
= XEXP (mem
, 0);
3973 if (GET_RTX_CLASS (GET_CODE (addr
)) == RTX_AUTOINC
)
3974 return XEXP (addr
, 0);
3979 /* A utility routine used here, in reload, and in try_split. The insns
3980 after PREV up to and including LAST are known to adjust the stack,
3981 with a final value of END_ARGS_SIZE. Iterate backward from LAST
3982 placing notes as appropriate. PREV may be NULL, indicating the
3983 entire insn sequence prior to LAST should be scanned.
3985 The set of allowed stack pointer modifications is small:
3986 (1) One or more auto-inc style memory references (aka pushes),
3987 (2) One or more addition/subtraction with the SP as destination,
3988 (3) A single move insn with the SP as destination,
3989 (4) A call_pop insn,
3990 (5) Noreturn call insns if !ACCUMULATE_OUTGOING_ARGS.
3992 Insns in the sequence that do not modify the SP are ignored,
3993 except for noreturn calls.
3995 The return value is the amount of adjustment that can be trivially
3996 verified, via immediate operand or auto-inc. If the adjustment
3997 cannot be trivially extracted, the return value is HOST_WIDE_INT_MIN. */
4000 find_args_size_adjust (rtx_insn
*insn
)
4005 pat
= PATTERN (insn
);
4008 /* Look for a call_pop pattern. */
4011 /* We have to allow non-call_pop patterns for the case
4012 of emit_single_push_insn of a TLS address. */
4013 if (GET_CODE (pat
) != PARALLEL
)
4016 /* All call_pop have a stack pointer adjust in the parallel.
4017 The call itself is always first, and the stack adjust is
4018 usually last, so search from the end. */
4019 for (i
= XVECLEN (pat
, 0) - 1; i
> 0; --i
)
4021 set
= XVECEXP (pat
, 0, i
);
4022 if (GET_CODE (set
) != SET
)
4024 dest
= SET_DEST (set
);
4025 if (dest
== stack_pointer_rtx
)
4028 /* We'd better have found the stack pointer adjust. */
4031 /* Fall through to process the extracted SET and DEST
4032 as if it was a standalone insn. */
4034 else if (GET_CODE (pat
) == SET
)
4036 else if ((set
= single_set (insn
)) != NULL
)
4038 else if (GET_CODE (pat
) == PARALLEL
)
4040 /* ??? Some older ports use a parallel with a stack adjust
4041 and a store for a PUSH_ROUNDING pattern, rather than a
4042 PRE/POST_MODIFY rtx. Don't force them to update yet... */
4043 /* ??? See h8300 and m68k, pushqi1. */
4044 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; --i
)
4046 set
= XVECEXP (pat
, 0, i
);
4047 if (GET_CODE (set
) != SET
)
4049 dest
= SET_DEST (set
);
4050 if (dest
== stack_pointer_rtx
)
4053 /* We do not expect an auto-inc of the sp in the parallel. */
4054 gcc_checking_assert (mem_autoinc_base (dest
) != stack_pointer_rtx
);
4055 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4056 != stack_pointer_rtx
);
4064 dest
= SET_DEST (set
);
4066 /* Look for direct modifications of the stack pointer. */
4067 if (REG_P (dest
) && REGNO (dest
) == STACK_POINTER_REGNUM
)
4069 /* Look for a trivial adjustment, otherwise assume nothing. */
4070 /* Note that the SPU restore_stack_block pattern refers to
4071 the stack pointer in V4SImode. Consider that non-trivial. */
4073 if (SCALAR_INT_MODE_P (GET_MODE (dest
))
4074 && strip_offset (SET_SRC (set
), &offset
) == stack_pointer_rtx
)
4076 /* ??? Reload can generate no-op moves, which will be cleaned
4077 up later. Recognize it and continue searching. */
4078 else if (rtx_equal_p (dest
, SET_SRC (set
)))
4081 return HOST_WIDE_INT_MIN
;
4087 /* Otherwise only think about autoinc patterns. */
4088 if (mem_autoinc_base (dest
) == stack_pointer_rtx
)
4091 gcc_checking_assert (mem_autoinc_base (SET_SRC (set
))
4092 != stack_pointer_rtx
);
4094 else if (mem_autoinc_base (SET_SRC (set
)) == stack_pointer_rtx
)
4095 mem
= SET_SRC (set
);
4099 addr
= XEXP (mem
, 0);
4100 switch (GET_CODE (addr
))
4104 return GET_MODE_SIZE (GET_MODE (mem
));
4107 return -GET_MODE_SIZE (GET_MODE (mem
));
4110 addr
= XEXP (addr
, 1);
4111 gcc_assert (GET_CODE (addr
) == PLUS
);
4112 gcc_assert (XEXP (addr
, 0) == stack_pointer_rtx
);
4113 return rtx_to_poly_int64 (XEXP (addr
, 1));
4121 fixup_args_size_notes (rtx_insn
*prev
, rtx_insn
*last
,
4122 poly_int64 end_args_size
)
4124 poly_int64 args_size
= end_args_size
;
4125 bool saw_unknown
= false;
4128 for (insn
= last
; insn
!= prev
; insn
= PREV_INSN (insn
))
4130 if (!NONDEBUG_INSN_P (insn
))
4133 /* We might have existing REG_ARGS_SIZE notes, e.g. when pushing
4134 a call argument containing a TLS address that itself requires
4135 a call to __tls_get_addr. The handling of stack_pointer_delta
4136 in emit_single_push_insn is supposed to ensure that any such
4137 notes are already correct. */
4138 rtx note
= find_reg_note (insn
, REG_ARGS_SIZE
, NULL_RTX
);
4139 gcc_assert (!note
|| known_eq (args_size
, get_args_size (note
)));
4141 poly_int64 this_delta
= find_args_size_adjust (insn
);
4142 if (known_eq (this_delta
, 0))
4145 || ACCUMULATE_OUTGOING_ARGS
4146 || find_reg_note (insn
, REG_NORETURN
, NULL_RTX
) == NULL_RTX
)
4150 gcc_assert (!saw_unknown
);
4151 if (known_eq (this_delta
, HOST_WIDE_INT_MIN
))
4155 add_args_size_note (insn
, args_size
);
4156 if (STACK_GROWS_DOWNWARD
)
4157 this_delta
= -poly_uint64 (this_delta
);
4160 args_size
= HOST_WIDE_INT_MIN
;
4162 args_size
-= this_delta
;
4168 #ifdef PUSH_ROUNDING
4169 /* Emit single push insn. */
4172 emit_single_push_insn_1 (machine_mode mode
, rtx x
, tree type
)
4175 poly_int64 rounded_size
= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4177 enum insn_code icode
;
4179 /* If there is push pattern, use it. Otherwise try old way of throwing
4180 MEM representing push operation to move expander. */
4181 icode
= optab_handler (push_optab
, mode
);
4182 if (icode
!= CODE_FOR_nothing
)
4184 struct expand_operand ops
[1];
4186 create_input_operand (&ops
[0], x
, mode
);
4187 if (maybe_expand_insn (icode
, 1, ops
))
4190 if (known_eq (GET_MODE_SIZE (mode
), rounded_size
))
4191 dest_addr
= gen_rtx_fmt_e (STACK_PUSH_CODE
, Pmode
, stack_pointer_rtx
);
4192 /* If we are to pad downward, adjust the stack pointer first and
4193 then store X into the stack location using an offset. This is
4194 because emit_move_insn does not know how to pad; it does not have
4196 else if (targetm
.calls
.function_arg_padding (mode
, type
) == PAD_DOWNWARD
)
4198 emit_move_insn (stack_pointer_rtx
,
4199 expand_binop (Pmode
,
4200 STACK_GROWS_DOWNWARD
? sub_optab
4203 gen_int_mode (rounded_size
, Pmode
),
4204 NULL_RTX
, 0, OPTAB_LIB_WIDEN
));
4206 poly_int64 offset
= rounded_size
- GET_MODE_SIZE (mode
);
4207 if (STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_DEC
)
4208 /* We have already decremented the stack pointer, so get the
4210 offset
+= rounded_size
;
4212 if (!STACK_GROWS_DOWNWARD
&& STACK_PUSH_CODE
== POST_INC
)
4213 /* We have already incremented the stack pointer, so get the
4215 offset
-= rounded_size
;
4217 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, offset
);
4221 if (STACK_GROWS_DOWNWARD
)
4222 /* ??? This seems wrong if STACK_PUSH_CODE == POST_DEC. */
4223 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, -rounded_size
);
4225 /* ??? This seems wrong if STACK_PUSH_CODE == POST_INC. */
4226 dest_addr
= plus_constant (Pmode
, stack_pointer_rtx
, rounded_size
);
4228 dest_addr
= gen_rtx_PRE_MODIFY (Pmode
, stack_pointer_rtx
, dest_addr
);
4231 dest
= gen_rtx_MEM (mode
, dest_addr
);
4235 set_mem_attributes (dest
, type
, 1);
4237 if (cfun
->tail_call_marked
)
4238 /* Function incoming arguments may overlap with sibling call
4239 outgoing arguments and we cannot allow reordering of reads
4240 from function arguments with stores to outgoing arguments
4241 of sibling calls. */
4242 set_mem_alias_set (dest
, 0);
4244 emit_move_insn (dest
, x
);
4247 /* Emit and annotate a single push insn. */
4250 emit_single_push_insn (machine_mode mode
, rtx x
, tree type
)
4252 poly_int64 delta
, old_delta
= stack_pointer_delta
;
4253 rtx_insn
*prev
= get_last_insn ();
4256 emit_single_push_insn_1 (mode
, x
, type
);
4258 /* Adjust stack_pointer_delta to describe the situation after the push
4259 we just performed. Note that we must do this after the push rather
4260 than before the push in case calculating X needs pushes and pops of
4261 its own (e.g. if calling __tls_get_addr). The REG_ARGS_SIZE notes
4262 for such pushes and pops must not include the effect of the future
4264 stack_pointer_delta
+= PUSH_ROUNDING (GET_MODE_SIZE (mode
));
4266 last
= get_last_insn ();
4268 /* Notice the common case where we emitted exactly one insn. */
4269 if (PREV_INSN (last
) == prev
)
4271 add_args_size_note (last
, stack_pointer_delta
);
4275 delta
= fixup_args_size_notes (prev
, last
, stack_pointer_delta
);
4276 gcc_assert (known_eq (delta
, HOST_WIDE_INT_MIN
)
4277 || known_eq (delta
, old_delta
));
4281 /* If reading SIZE bytes from X will end up reading from
4282 Y return the number of bytes that overlap. Return -1
4283 if there is no overlap or -2 if we can't determine
4284 (for example when X and Y have different base registers). */
4287 memory_load_overlap (rtx x
, rtx y
, HOST_WIDE_INT size
)
4289 rtx tmp
= plus_constant (Pmode
, x
, size
);
4290 rtx sub
= simplify_gen_binary (MINUS
, Pmode
, tmp
, y
);
4292 if (!CONST_INT_P (sub
))
4295 HOST_WIDE_INT val
= INTVAL (sub
);
4297 return IN_RANGE (val
, 1, size
) ? val
: -1;
4300 /* Generate code to push X onto the stack, assuming it has mode MODE and
4302 MODE is redundant except when X is a CONST_INT (since they don't
4304 SIZE is an rtx for the size of data to be copied (in bytes),
4305 needed only if X is BLKmode.
4306 Return true if successful. May return false if asked to push a
4307 partial argument during a sibcall optimization (as specified by
4308 SIBCALL_P) and the incoming and outgoing pointers cannot be shown
4311 ALIGN (in bits) is maximum alignment we can assume.
4313 If PARTIAL and REG are both nonzero, then copy that many of the first
4314 bytes of X into registers starting with REG, and push the rest of X.
4315 The amount of space pushed is decreased by PARTIAL bytes.
4316 REG must be a hard register in this case.
4317 If REG is zero but PARTIAL is not, take any all others actions for an
4318 argument partially in registers, but do not actually load any
4321 EXTRA is the amount in bytes of extra space to leave next to this arg.
4322 This is ignored if an argument block has already been allocated.
4324 On a machine that lacks real push insns, ARGS_ADDR is the address of
4325 the bottom of the argument block for this call. We use indexing off there
4326 to store the arg. On machines with push insns, ARGS_ADDR is 0 when a
4327 argument block has not been preallocated.
4329 ARGS_SO_FAR is the size of args previously pushed for this call.
4331 REG_PARM_STACK_SPACE is nonzero if functions require stack space
4332 for arguments passed in registers. If nonzero, it will be the number
4333 of bytes required. */
4336 emit_push_insn (rtx x
, machine_mode mode
, tree type
, rtx size
,
4337 unsigned int align
, int partial
, rtx reg
, poly_int64 extra
,
4338 rtx args_addr
, rtx args_so_far
, int reg_parm_stack_space
,
4339 rtx alignment_pad
, bool sibcall_p
)
4342 pad_direction stack_direction
4343 = STACK_GROWS_DOWNWARD
? PAD_DOWNWARD
: PAD_UPWARD
;
4345 /* Decide where to pad the argument: PAD_DOWNWARD for below,
4346 PAD_UPWARD for above, or PAD_NONE for don't pad it.
4347 Default is below for small data on big-endian machines; else above. */
4348 pad_direction where_pad
= targetm
.calls
.function_arg_padding (mode
, type
);
4350 /* Invert direction if stack is post-decrement.
4352 if (STACK_PUSH_CODE
== POST_DEC
)
4353 if (where_pad
!= PAD_NONE
)
4354 where_pad
= (where_pad
== PAD_DOWNWARD
? PAD_UPWARD
: PAD_DOWNWARD
);
4358 int nregs
= partial
/ UNITS_PER_WORD
;
4359 rtx
*tmp_regs
= NULL
;
4360 int overlapping
= 0;
4363 || (STRICT_ALIGNMENT
&& align
< GET_MODE_ALIGNMENT (mode
)))
4365 /* Copy a block into the stack, entirely or partially. */
4372 offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4373 used
= partial
- offset
;
4375 if (mode
!= BLKmode
)
4377 /* A value is to be stored in an insufficiently aligned
4378 stack slot; copy via a suitably aligned slot if
4380 size
= gen_int_mode (GET_MODE_SIZE (mode
), Pmode
);
4381 if (!MEM_P (xinner
))
4383 temp
= assign_temp (type
, 1, 1);
4384 emit_move_insn (temp
, xinner
);
4391 /* USED is now the # of bytes we need not copy to the stack
4392 because registers will take care of them. */
4395 xinner
= adjust_address (xinner
, BLKmode
, used
);
4397 /* If the partial register-part of the arg counts in its stack size,
4398 skip the part of stack space corresponding to the registers.
4399 Otherwise, start copying to the beginning of the stack space,
4400 by setting SKIP to 0. */
4401 skip
= (reg_parm_stack_space
== 0) ? 0 : used
;
4403 #ifdef PUSH_ROUNDING
4404 /* Do it with several push insns if that doesn't take lots of insns
4405 and if there is no difficulty with push insns that skip bytes
4406 on the stack for alignment purposes. */
4409 && CONST_INT_P (size
)
4411 && MEM_ALIGN (xinner
) >= align
4412 && can_move_by_pieces ((unsigned) INTVAL (size
) - used
, align
)
4413 /* Here we avoid the case of a structure whose weak alignment
4414 forces many pushes of a small amount of data,
4415 and such small pushes do rounding that causes trouble. */
4416 && ((!targetm
.slow_unaligned_access (word_mode
, align
))
4417 || align
>= BIGGEST_ALIGNMENT
4418 || known_eq (PUSH_ROUNDING (align
/ BITS_PER_UNIT
),
4419 align
/ BITS_PER_UNIT
))
4420 && known_eq (PUSH_ROUNDING (INTVAL (size
)), INTVAL (size
)))
4422 /* Push padding now if padding above and stack grows down,
4423 or if padding below and stack grows up.
4424 But if space already allocated, this has already been done. */
4425 if (maybe_ne (extra
, 0)
4427 && where_pad
!= PAD_NONE
4428 && where_pad
!= stack_direction
)
4429 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4431 move_by_pieces (NULL
, xinner
, INTVAL (size
) - used
, align
,
4435 #endif /* PUSH_ROUNDING */
4439 /* Otherwise make space on the stack and copy the data
4440 to the address of that space. */
4442 /* Deduct words put into registers from the size we must copy. */
4445 if (CONST_INT_P (size
))
4446 size
= GEN_INT (INTVAL (size
) - used
);
4448 size
= expand_binop (GET_MODE (size
), sub_optab
, size
,
4449 gen_int_mode (used
, GET_MODE (size
)),
4450 NULL_RTX
, 0, OPTAB_LIB_WIDEN
);
4453 /* Get the address of the stack space.
4454 In this case, we do not deal with EXTRA separately.
4455 A single stack adjust will do. */
4459 temp
= push_block (size
, extra
, where_pad
== PAD_DOWNWARD
);
4462 else if (poly_int_rtx_p (args_so_far
, &offset
))
4463 temp
= memory_address (BLKmode
,
4464 plus_constant (Pmode
, args_addr
,
4467 temp
= memory_address (BLKmode
,
4468 plus_constant (Pmode
,
4469 gen_rtx_PLUS (Pmode
,
4474 if (!ACCUMULATE_OUTGOING_ARGS
)
4476 /* If the source is referenced relative to the stack pointer,
4477 copy it to another register to stabilize it. We do not need
4478 to do this if we know that we won't be changing sp. */
4480 if (reg_mentioned_p (virtual_stack_dynamic_rtx
, temp
)
4481 || reg_mentioned_p (virtual_outgoing_args_rtx
, temp
))
4482 temp
= copy_to_reg (temp
);
4485 target
= gen_rtx_MEM (BLKmode
, temp
);
4487 /* We do *not* set_mem_attributes here, because incoming arguments
4488 may overlap with sibling call outgoing arguments and we cannot
4489 allow reordering of reads from function arguments with stores
4490 to outgoing arguments of sibling calls. We do, however, want
4491 to record the alignment of the stack slot. */
4492 /* ALIGN may well be better aligned than TYPE, e.g. due to
4493 PARM_BOUNDARY. Assume the caller isn't lying. */
4494 set_mem_align (target
, align
);
4496 /* If part should go in registers and pushing to that part would
4497 overwrite some of the values that need to go into regs, load the
4498 overlapping values into temporary pseudos to be moved into the hard
4499 regs at the end after the stack pushing has completed.
4500 We cannot load them directly into the hard regs here because
4501 they can be clobbered by the block move expansions.
4504 if (partial
> 0 && reg
!= 0 && mode
== BLKmode
4505 && GET_CODE (reg
) != PARALLEL
)
4507 overlapping
= memory_load_overlap (XEXP (x
, 0), temp
, partial
);
4508 if (overlapping
> 0)
4510 gcc_assert (overlapping
% UNITS_PER_WORD
== 0);
4511 overlapping
/= UNITS_PER_WORD
;
4513 tmp_regs
= XALLOCAVEC (rtx
, overlapping
);
4515 for (int i
= 0; i
< overlapping
; i
++)
4516 tmp_regs
[i
] = gen_reg_rtx (word_mode
);
4518 for (int i
= 0; i
< overlapping
; i
++)
4519 emit_move_insn (tmp_regs
[i
],
4520 operand_subword_force (target
, i
, mode
));
4522 else if (overlapping
== -1)
4524 /* Could not determine whether there is overlap.
4525 Fail the sibcall. */
4533 emit_block_move (target
, xinner
, size
, BLOCK_OP_CALL_PARM
);
4536 else if (partial
> 0)
4538 /* Scalar partly in registers. This case is only supported
4539 for fixed-wdth modes. */
4540 int size
= GET_MODE_SIZE (mode
).to_constant ();
4541 size
/= UNITS_PER_WORD
;
4544 /* # bytes of start of argument
4545 that we must make space for but need not store. */
4546 int offset
= partial
% (PARM_BOUNDARY
/ BITS_PER_UNIT
);
4547 int args_offset
= INTVAL (args_so_far
);
4550 /* Push padding now if padding above and stack grows down,
4551 or if padding below and stack grows up.
4552 But if space already allocated, this has already been done. */
4553 if (maybe_ne (extra
, 0)
4555 && where_pad
!= PAD_NONE
4556 && where_pad
!= stack_direction
)
4557 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4559 /* If we make space by pushing it, we might as well push
4560 the real data. Otherwise, we can leave OFFSET nonzero
4561 and leave the space uninitialized. */
4565 /* Now NOT_STACK gets the number of words that we don't need to
4566 allocate on the stack. Convert OFFSET to words too. */
4567 not_stack
= (partial
- offset
) / UNITS_PER_WORD
;
4568 offset
/= UNITS_PER_WORD
;
4570 /* If the partial register-part of the arg counts in its stack size,
4571 skip the part of stack space corresponding to the registers.
4572 Otherwise, start copying to the beginning of the stack space,
4573 by setting SKIP to 0. */
4574 skip
= (reg_parm_stack_space
== 0) ? 0 : not_stack
;
4576 if (CONSTANT_P (x
) && !targetm
.legitimate_constant_p (mode
, x
))
4577 x
= validize_mem (force_const_mem (mode
, x
));
4579 /* If X is a hard register in a non-integer mode, copy it into a pseudo;
4580 SUBREGs of such registers are not allowed. */
4581 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
4582 && GET_MODE_CLASS (GET_MODE (x
)) != MODE_INT
))
4583 x
= copy_to_reg (x
);
4585 /* Loop over all the words allocated on the stack for this arg. */
4586 /* We can do it by words, because any scalar bigger than a word
4587 has a size a multiple of a word. */
4588 for (i
= size
- 1; i
>= not_stack
; i
--)
4589 if (i
>= not_stack
+ offset
)
4590 if (!emit_push_insn (operand_subword_force (x
, i
, mode
),
4591 word_mode
, NULL_TREE
, NULL_RTX
, align
, 0, NULL_RTX
,
4593 GEN_INT (args_offset
+ ((i
- not_stack
+ skip
)
4595 reg_parm_stack_space
, alignment_pad
, sibcall_p
))
4603 /* Push padding now if padding above and stack grows down,
4604 or if padding below and stack grows up.
4605 But if space already allocated, this has already been done. */
4606 if (maybe_ne (extra
, 0)
4608 && where_pad
!= PAD_NONE
4609 && where_pad
!= stack_direction
)
4610 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4612 #ifdef PUSH_ROUNDING
4613 if (args_addr
== 0 && PUSH_ARGS
)
4614 emit_single_push_insn (mode
, x
, type
);
4618 addr
= simplify_gen_binary (PLUS
, Pmode
, args_addr
, args_so_far
);
4619 dest
= gen_rtx_MEM (mode
, memory_address (mode
, addr
));
4621 /* We do *not* set_mem_attributes here, because incoming arguments
4622 may overlap with sibling call outgoing arguments and we cannot
4623 allow reordering of reads from function arguments with stores
4624 to outgoing arguments of sibling calls. We do, however, want
4625 to record the alignment of the stack slot. */
4626 /* ALIGN may well be better aligned than TYPE, e.g. due to
4627 PARM_BOUNDARY. Assume the caller isn't lying. */
4628 set_mem_align (dest
, align
);
4630 emit_move_insn (dest
, x
);
4634 /* Move the partial arguments into the registers and any overlapping
4635 values that we moved into the pseudos in tmp_regs. */
4636 if (partial
> 0 && reg
!= 0)
4638 /* Handle calls that pass values in multiple non-contiguous locations.
4639 The Irix 6 ABI has examples of this. */
4640 if (GET_CODE (reg
) == PARALLEL
)
4641 emit_group_load (reg
, x
, type
, -1);
4644 gcc_assert (partial
% UNITS_PER_WORD
== 0);
4645 move_block_to_reg (REGNO (reg
), x
, nregs
- overlapping
, mode
);
4647 for (int i
= 0; i
< overlapping
; i
++)
4648 emit_move_insn (gen_rtx_REG (word_mode
, REGNO (reg
)
4649 + nregs
- overlapping
+ i
),
4655 if (maybe_ne (extra
, 0) && args_addr
== 0 && where_pad
== stack_direction
)
4656 anti_adjust_stack (gen_int_mode (extra
, Pmode
));
4658 if (alignment_pad
&& args_addr
== 0)
4659 anti_adjust_stack (alignment_pad
);
4664 /* Return X if X can be used as a subtarget in a sequence of arithmetic
4668 get_subtarget (rtx x
)
4672 /* Only registers can be subtargets. */
4674 /* Don't use hard regs to avoid extending their life. */
4675 || REGNO (x
) < FIRST_PSEUDO_REGISTER
4679 /* A subroutine of expand_assignment. Optimize FIELD op= VAL, where
4680 FIELD is a bitfield. Returns true if the optimization was successful,
4681 and there's nothing else to do. */
4684 optimize_bitfield_assignment_op (poly_uint64 pbitsize
,
4685 poly_uint64 pbitpos
,
4686 poly_uint64 pbitregion_start
,
4687 poly_uint64 pbitregion_end
,
4688 machine_mode mode1
, rtx str_rtx
,
4689 tree to
, tree src
, bool reverse
)
4691 /* str_mode is not guaranteed to be a scalar type. */
4692 machine_mode str_mode
= GET_MODE (str_rtx
);
4693 unsigned int str_bitsize
;
4698 enum tree_code code
;
4700 unsigned HOST_WIDE_INT bitsize
, bitpos
, bitregion_start
, bitregion_end
;
4701 if (mode1
!= VOIDmode
4702 || !pbitsize
.is_constant (&bitsize
)
4703 || !pbitpos
.is_constant (&bitpos
)
4704 || !pbitregion_start
.is_constant (&bitregion_start
)
4705 || !pbitregion_end
.is_constant (&bitregion_end
)
4706 || bitsize
>= BITS_PER_WORD
4707 || !GET_MODE_BITSIZE (str_mode
).is_constant (&str_bitsize
)
4708 || str_bitsize
> BITS_PER_WORD
4709 || TREE_SIDE_EFFECTS (to
)
4710 || TREE_THIS_VOLATILE (to
))
4714 if (TREE_CODE (src
) != SSA_NAME
)
4716 if (TREE_CODE (TREE_TYPE (src
)) != INTEGER_TYPE
)
4719 srcstmt
= get_gimple_for_ssa_name (src
);
4721 || TREE_CODE_CLASS (gimple_assign_rhs_code (srcstmt
)) != tcc_binary
)
4724 code
= gimple_assign_rhs_code (srcstmt
);
4726 op0
= gimple_assign_rhs1 (srcstmt
);
4728 /* If OP0 is an SSA_NAME, then we want to walk the use-def chain
4729 to find its initialization. Hopefully the initialization will
4730 be from a bitfield load. */
4731 if (TREE_CODE (op0
) == SSA_NAME
)
4733 gimple
*op0stmt
= get_gimple_for_ssa_name (op0
);
4735 /* We want to eventually have OP0 be the same as TO, which
4736 should be a bitfield. */
4738 || !is_gimple_assign (op0stmt
)
4739 || gimple_assign_rhs_code (op0stmt
) != TREE_CODE (to
))
4741 op0
= gimple_assign_rhs1 (op0stmt
);
4744 op1
= gimple_assign_rhs2 (srcstmt
);
4746 if (!operand_equal_p (to
, op0
, 0))
4749 if (MEM_P (str_rtx
))
4751 unsigned HOST_WIDE_INT offset1
;
4753 if (str_bitsize
== 0 || str_bitsize
> BITS_PER_WORD
)
4754 str_bitsize
= BITS_PER_WORD
;
4756 scalar_int_mode best_mode
;
4757 if (!get_best_mode (bitsize
, bitpos
, bitregion_start
, bitregion_end
,
4758 MEM_ALIGN (str_rtx
), str_bitsize
, false, &best_mode
))
4760 str_mode
= best_mode
;
4761 str_bitsize
= GET_MODE_BITSIZE (best_mode
);
4764 bitpos
%= str_bitsize
;
4765 offset1
= (offset1
- bitpos
) / BITS_PER_UNIT
;
4766 str_rtx
= adjust_address (str_rtx
, str_mode
, offset1
);
4768 else if (!REG_P (str_rtx
) && GET_CODE (str_rtx
) != SUBREG
)
4771 /* If the bit field covers the whole REG/MEM, store_field
4772 will likely generate better code. */
4773 if (bitsize
>= str_bitsize
)
4776 /* We can't handle fields split across multiple entities. */
4777 if (bitpos
+ bitsize
> str_bitsize
)
4780 if (reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
4781 bitpos
= str_bitsize
- bitpos
- bitsize
;
4787 /* For now, just optimize the case of the topmost bitfield
4788 where we don't need to do any masking and also
4789 1 bit bitfields where xor can be used.
4790 We might win by one instruction for the other bitfields
4791 too if insv/extv instructions aren't used, so that
4792 can be added later. */
4793 if ((reverse
|| bitpos
+ bitsize
!= str_bitsize
)
4794 && (bitsize
!= 1 || TREE_CODE (op1
) != INTEGER_CST
))
4797 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4798 value
= convert_modes (str_mode
,
4799 TYPE_MODE (TREE_TYPE (op1
)), value
,
4800 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4802 /* We may be accessing data outside the field, which means
4803 we can alias adjacent data. */
4804 if (MEM_P (str_rtx
))
4806 str_rtx
= shallow_copy_rtx (str_rtx
);
4807 set_mem_alias_set (str_rtx
, 0);
4808 set_mem_expr (str_rtx
, 0);
4811 if (bitsize
== 1 && (reverse
|| bitpos
+ bitsize
!= str_bitsize
))
4813 value
= expand_and (str_mode
, value
, const1_rtx
, NULL
);
4817 binop
= code
== PLUS_EXPR
? add_optab
: sub_optab
;
4819 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4821 value
= flip_storage_order (str_mode
, value
);
4822 result
= expand_binop (str_mode
, binop
, str_rtx
,
4823 value
, str_rtx
, 1, OPTAB_WIDEN
);
4824 if (result
!= str_rtx
)
4825 emit_move_insn (str_rtx
, result
);
4830 if (TREE_CODE (op1
) != INTEGER_CST
)
4832 value
= expand_expr (op1
, NULL_RTX
, str_mode
, EXPAND_NORMAL
);
4833 value
= convert_modes (str_mode
,
4834 TYPE_MODE (TREE_TYPE (op1
)), value
,
4835 TYPE_UNSIGNED (TREE_TYPE (op1
)));
4837 /* We may be accessing data outside the field, which means
4838 we can alias adjacent data. */
4839 if (MEM_P (str_rtx
))
4841 str_rtx
= shallow_copy_rtx (str_rtx
);
4842 set_mem_alias_set (str_rtx
, 0);
4843 set_mem_expr (str_rtx
, 0);
4846 binop
= code
== BIT_IOR_EXPR
? ior_optab
: xor_optab
;
4847 if (bitpos
+ bitsize
!= str_bitsize
)
4849 rtx mask
= gen_int_mode ((HOST_WIDE_INT_1U
<< bitsize
) - 1,
4851 value
= expand_and (str_mode
, value
, mask
, NULL_RTX
);
4853 value
= expand_shift (LSHIFT_EXPR
, str_mode
, value
, bitpos
, NULL_RTX
, 1);
4855 value
= flip_storage_order (str_mode
, value
);
4856 result
= expand_binop (str_mode
, binop
, str_rtx
,
4857 value
, str_rtx
, 1, OPTAB_WIDEN
);
4858 if (result
!= str_rtx
)
4859 emit_move_insn (str_rtx
, result
);
4869 /* In the C++ memory model, consecutive bit fields in a structure are
4870 considered one memory location.
4872 Given a COMPONENT_REF EXP at position (BITPOS, OFFSET), this function
4873 returns the bit range of consecutive bits in which this COMPONENT_REF
4874 belongs. The values are returned in *BITSTART and *BITEND. *BITPOS
4875 and *OFFSET may be adjusted in the process.
4877 If the access does not need to be restricted, 0 is returned in both
4878 *BITSTART and *BITEND. */
4881 get_bit_range (poly_uint64_pod
*bitstart
, poly_uint64_pod
*bitend
, tree exp
,
4882 poly_int64_pod
*bitpos
, tree
*offset
)
4884 poly_int64 bitoffset
;
4887 gcc_assert (TREE_CODE (exp
) == COMPONENT_REF
);
4889 field
= TREE_OPERAND (exp
, 1);
4890 repr
= DECL_BIT_FIELD_REPRESENTATIVE (field
);
4891 /* If we do not have a DECL_BIT_FIELD_REPRESENTATIVE there is no
4892 need to limit the range we can access. */
4895 *bitstart
= *bitend
= 0;
4899 /* If we have a DECL_BIT_FIELD_REPRESENTATIVE but the enclosing record is
4900 part of a larger bit field, then the representative does not serve any
4901 useful purpose. This can occur in Ada. */
4902 if (handled_component_p (TREE_OPERAND (exp
, 0)))
4905 poly_int64 rbitsize
, rbitpos
;
4907 int unsignedp
, reversep
, volatilep
= 0;
4908 get_inner_reference (TREE_OPERAND (exp
, 0), &rbitsize
, &rbitpos
,
4909 &roffset
, &rmode
, &unsignedp
, &reversep
,
4911 if (!multiple_p (rbitpos
, BITS_PER_UNIT
))
4913 *bitstart
= *bitend
= 0;
4918 /* Compute the adjustment to bitpos from the offset of the field
4919 relative to the representative. DECL_FIELD_OFFSET of field and
4920 repr are the same by construction if they are not constants,
4921 see finish_bitfield_layout. */
4922 poly_uint64 field_offset
, repr_offset
;
4923 if (poly_int_tree_p (DECL_FIELD_OFFSET (field
), &field_offset
)
4924 && poly_int_tree_p (DECL_FIELD_OFFSET (repr
), &repr_offset
))
4925 bitoffset
= (field_offset
- repr_offset
) * BITS_PER_UNIT
;
4928 bitoffset
+= (tree_to_uhwi (DECL_FIELD_BIT_OFFSET (field
))
4929 - tree_to_uhwi (DECL_FIELD_BIT_OFFSET (repr
)));
4931 /* If the adjustment is larger than bitpos, we would have a negative bit
4932 position for the lower bound and this may wreak havoc later. Adjust
4933 offset and bitpos to make the lower bound non-negative in that case. */
4934 if (maybe_gt (bitoffset
, *bitpos
))
4936 poly_int64 adjust_bits
= upper_bound (bitoffset
, *bitpos
) - *bitpos
;
4937 poly_int64 adjust_bytes
= exact_div (adjust_bits
, BITS_PER_UNIT
);
4939 *bitpos
+= adjust_bits
;
4940 if (*offset
== NULL_TREE
)
4941 *offset
= size_int (-adjust_bytes
);
4943 *offset
= size_binop (MINUS_EXPR
, *offset
, size_int (adjust_bytes
));
4947 *bitstart
= *bitpos
- bitoffset
;
4949 *bitend
= *bitstart
+ tree_to_poly_uint64 (DECL_SIZE (repr
)) - 1;
4952 /* Returns true if ADDR is an ADDR_EXPR of a DECL that does not reside
4953 in memory and has non-BLKmode. DECL_RTL must not be a MEM; if
4954 DECL_RTL was not set yet, return NORTL. */
4957 addr_expr_of_non_mem_decl_p_1 (tree addr
, bool nortl
)
4959 if (TREE_CODE (addr
) != ADDR_EXPR
)
4962 tree base
= TREE_OPERAND (addr
, 0);
4965 || TREE_ADDRESSABLE (base
)
4966 || DECL_MODE (base
) == BLKmode
)
4969 if (!DECL_RTL_SET_P (base
))
4972 return (!MEM_P (DECL_RTL (base
)));
4975 /* Returns true if the MEM_REF REF refers to an object that does not
4976 reside in memory and has non-BLKmode. */
4979 mem_ref_refers_to_non_mem_p (tree ref
)
4981 tree base
= TREE_OPERAND (ref
, 0);
4982 return addr_expr_of_non_mem_decl_p_1 (base
, false);
4985 /* Expand an assignment that stores the value of FROM into TO. If NONTEMPORAL
4986 is true, try generating a nontemporal store. */
4989 expand_assignment (tree to
, tree from
, bool nontemporal
)
4995 enum insn_code icode
;
4997 /* Don't crash if the lhs of the assignment was erroneous. */
4998 if (TREE_CODE (to
) == ERROR_MARK
)
5000 expand_normal (from
);
5004 /* Optimize away no-op moves without side-effects. */
5005 if (operand_equal_p (to
, from
, 0))
5008 /* Handle misaligned stores. */
5009 mode
= TYPE_MODE (TREE_TYPE (to
));
5010 if ((TREE_CODE (to
) == MEM_REF
5011 || TREE_CODE (to
) == TARGET_MEM_REF
)
5013 && !mem_ref_refers_to_non_mem_p (to
)
5014 && ((align
= get_object_alignment (to
))
5015 < GET_MODE_ALIGNMENT (mode
))
5016 && (((icode
= optab_handler (movmisalign_optab
, mode
))
5017 != CODE_FOR_nothing
)
5018 || targetm
.slow_unaligned_access (mode
, align
)))
5022 reg
= expand_expr (from
, NULL_RTX
, VOIDmode
, EXPAND_NORMAL
);
5023 reg
= force_not_mem (reg
);
5024 mem
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5025 if (TREE_CODE (to
) == MEM_REF
&& REF_REVERSE_STORAGE_ORDER (to
))
5026 reg
= flip_storage_order (mode
, reg
);
5028 if (icode
!= CODE_FOR_nothing
)
5030 struct expand_operand ops
[2];
5032 create_fixed_operand (&ops
[0], mem
);
5033 create_input_operand (&ops
[1], reg
, mode
);
5034 /* The movmisalign<mode> pattern cannot fail, else the assignment
5035 would silently be omitted. */
5036 expand_insn (icode
, 2, ops
);
5039 store_bit_field (mem
, GET_MODE_BITSIZE (mode
), 0, 0, 0, mode
, reg
,
5044 /* Assignment of a structure component needs special treatment
5045 if the structure component's rtx is not simply a MEM.
5046 Assignment of an array element at a constant index, and assignment of
5047 an array element in an unaligned packed structure field, has the same
5048 problem. Same for (partially) storing into a non-memory object. */
5049 if (handled_component_p (to
)
5050 || (TREE_CODE (to
) == MEM_REF
5051 && (REF_REVERSE_STORAGE_ORDER (to
)
5052 || mem_ref_refers_to_non_mem_p (to
)))
5053 || TREE_CODE (TREE_TYPE (to
)) == ARRAY_TYPE
)
5056 poly_int64 bitsize
, bitpos
;
5057 poly_uint64 bitregion_start
= 0;
5058 poly_uint64 bitregion_end
= 0;
5060 int unsignedp
, reversep
, volatilep
= 0;
5064 tem
= get_inner_reference (to
, &bitsize
, &bitpos
, &offset
, &mode1
,
5065 &unsignedp
, &reversep
, &volatilep
);
5067 /* Make sure bitpos is not negative, it can wreak havoc later. */
5068 if (maybe_lt (bitpos
, 0))
5070 gcc_assert (offset
== NULL_TREE
);
5071 offset
= size_int (bits_to_bytes_round_down (bitpos
));
5072 bitpos
= num_trailing_bits (bitpos
);
5075 if (TREE_CODE (to
) == COMPONENT_REF
5076 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (to
, 1)))
5077 get_bit_range (&bitregion_start
, &bitregion_end
, to
, &bitpos
, &offset
);
5078 /* The C++ memory model naturally applies to byte-aligned fields.
5079 However, if we do not have a DECL_BIT_FIELD_TYPE but BITPOS or
5080 BITSIZE are not byte-aligned, there is no need to limit the range
5081 we can access. This can occur with packed structures in Ada. */
5082 else if (maybe_gt (bitsize
, 0)
5083 && multiple_p (bitsize
, BITS_PER_UNIT
)
5084 && multiple_p (bitpos
, BITS_PER_UNIT
))
5086 bitregion_start
= bitpos
;
5087 bitregion_end
= bitpos
+ bitsize
- 1;
5090 to_rtx
= expand_expr (tem
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5092 /* If the field has a mode, we want to access it in the
5093 field's mode, not the computed mode.
5094 If a MEM has VOIDmode (external with incomplete type),
5095 use BLKmode for it instead. */
5098 if (mode1
!= VOIDmode
)
5099 to_rtx
= adjust_address (to_rtx
, mode1
, 0);
5100 else if (GET_MODE (to_rtx
) == VOIDmode
)
5101 to_rtx
= adjust_address (to_rtx
, BLKmode
, 0);
5106 machine_mode address_mode
;
5109 if (!MEM_P (to_rtx
))
5111 /* We can get constant negative offsets into arrays with broken
5112 user code. Translate this to a trap instead of ICEing. */
5113 gcc_assert (TREE_CODE (offset
) == INTEGER_CST
);
5114 expand_builtin_trap ();
5115 to_rtx
= gen_rtx_MEM (BLKmode
, const0_rtx
);
5118 offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
5119 address_mode
= get_address_mode (to_rtx
);
5120 if (GET_MODE (offset_rtx
) != address_mode
)
5122 /* We cannot be sure that the RTL in offset_rtx is valid outside
5123 of a memory address context, so force it into a register
5124 before attempting to convert it to the desired mode. */
5125 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
5126 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
5129 /* If we have an expression in OFFSET_RTX and a non-zero
5130 byte offset in BITPOS, adding the byte offset before the
5131 OFFSET_RTX results in better intermediate code, which makes
5132 later rtl optimization passes perform better.
5134 We prefer intermediate code like this:
5136 r124:DI=r123:DI+0x18
5141 r124:DI=r123:DI+0x10
5142 [r124:DI+0x8]=r121:DI
5144 This is only done for aligned data values, as these can
5145 be expected to result in single move instructions. */
5147 if (mode1
!= VOIDmode
5148 && maybe_ne (bitpos
, 0)
5149 && maybe_gt (bitsize
, 0)
5150 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
5151 && multiple_p (bitpos
, bitsize
)
5152 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
5153 && MEM_ALIGN (to_rtx
) >= GET_MODE_ALIGNMENT (mode1
))
5155 to_rtx
= adjust_address (to_rtx
, mode1
, bytepos
);
5156 bitregion_start
= 0;
5157 if (known_ge (bitregion_end
, poly_uint64 (bitpos
)))
5158 bitregion_end
-= bitpos
;
5162 to_rtx
= offset_address (to_rtx
, offset_rtx
,
5163 highest_pow2_factor_for_target (to
,
5167 /* No action is needed if the target is not a memory and the field
5168 lies completely outside that target. This can occur if the source
5169 code contains an out-of-bounds access to a small array. */
5171 && GET_MODE (to_rtx
) != BLKmode
5172 && known_ge (bitpos
, GET_MODE_PRECISION (GET_MODE (to_rtx
))))
5174 expand_normal (from
);
5177 /* Handle expand_expr of a complex value returning a CONCAT. */
5178 else if (GET_CODE (to_rtx
) == CONCAT
)
5180 machine_mode to_mode
= GET_MODE (to_rtx
);
5181 gcc_checking_assert (COMPLEX_MODE_P (to_mode
));
5182 poly_int64 mode_bitsize
= GET_MODE_BITSIZE (to_mode
);
5183 unsigned short inner_bitsize
= GET_MODE_UNIT_BITSIZE (to_mode
);
5184 if (TYPE_MODE (TREE_TYPE (from
)) == to_mode
5185 && known_eq (bitpos
, 0)
5186 && known_eq (bitsize
, mode_bitsize
))
5187 result
= store_expr (from
, to_rtx
, false, nontemporal
, reversep
);
5188 else if (TYPE_MODE (TREE_TYPE (from
)) == GET_MODE_INNER (to_mode
)
5189 && known_eq (bitsize
, inner_bitsize
)
5190 && (known_eq (bitpos
, 0)
5191 || known_eq (bitpos
, inner_bitsize
)))
5192 result
= store_expr (from
, XEXP (to_rtx
, maybe_ne (bitpos
, 0)),
5193 false, nontemporal
, reversep
);
5194 else if (known_le (bitpos
+ bitsize
, inner_bitsize
))
5195 result
= store_field (XEXP (to_rtx
, 0), bitsize
, bitpos
,
5196 bitregion_start
, bitregion_end
,
5197 mode1
, from
, get_alias_set (to
),
5198 nontemporal
, reversep
);
5199 else if (known_ge (bitpos
, inner_bitsize
))
5200 result
= store_field (XEXP (to_rtx
, 1), bitsize
,
5201 bitpos
- inner_bitsize
,
5202 bitregion_start
, bitregion_end
,
5203 mode1
, from
, get_alias_set (to
),
5204 nontemporal
, reversep
);
5205 else if (known_eq (bitpos
, 0) && known_eq (bitsize
, mode_bitsize
))
5207 result
= expand_normal (from
);
5208 if (GET_CODE (result
) == CONCAT
)
5210 to_mode
= GET_MODE_INNER (to_mode
);
5211 machine_mode from_mode
= GET_MODE_INNER (GET_MODE (result
));
5213 = simplify_gen_subreg (to_mode
, XEXP (result
, 0),
5216 = simplify_gen_subreg (to_mode
, XEXP (result
, 1),
5218 if (!from_real
|| !from_imag
)
5219 goto concat_store_slow
;
5220 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5221 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5227 from_rtx
= change_address (result
, to_mode
, NULL_RTX
);
5230 = simplify_gen_subreg (to_mode
, result
,
5231 TYPE_MODE (TREE_TYPE (from
)), 0);
5234 emit_move_insn (XEXP (to_rtx
, 0),
5235 read_complex_part (from_rtx
, false));
5236 emit_move_insn (XEXP (to_rtx
, 1),
5237 read_complex_part (from_rtx
, true));
5241 machine_mode to_mode
5242 = GET_MODE_INNER (GET_MODE (to_rtx
));
5244 = simplify_gen_subreg (to_mode
, result
,
5245 TYPE_MODE (TREE_TYPE (from
)),
5248 = simplify_gen_subreg (to_mode
, result
,
5249 TYPE_MODE (TREE_TYPE (from
)),
5250 GET_MODE_SIZE (to_mode
));
5251 if (!from_real
|| !from_imag
)
5252 goto concat_store_slow
;
5253 emit_move_insn (XEXP (to_rtx
, 0), from_real
);
5254 emit_move_insn (XEXP (to_rtx
, 1), from_imag
);
5261 rtx temp
= assign_stack_temp (to_mode
,
5262 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5263 write_complex_part (temp
, XEXP (to_rtx
, 0), false);
5264 write_complex_part (temp
, XEXP (to_rtx
, 1), true);
5265 result
= store_field (temp
, bitsize
, bitpos
,
5266 bitregion_start
, bitregion_end
,
5267 mode1
, from
, get_alias_set (to
),
5268 nontemporal
, reversep
);
5269 emit_move_insn (XEXP (to_rtx
, 0), read_complex_part (temp
, false));
5270 emit_move_insn (XEXP (to_rtx
, 1), read_complex_part (temp
, true));
5273 /* For calls to functions returning variable length structures, if TO_RTX
5274 is not a MEM, go through a MEM because we must not create temporaries
5276 else if (!MEM_P (to_rtx
)
5277 && TREE_CODE (from
) == CALL_EXPR
5278 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5279 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) != INTEGER_CST
)
5281 rtx temp
= assign_stack_temp (GET_MODE (to_rtx
),
5282 GET_MODE_SIZE (GET_MODE (to_rtx
)));
5283 result
= store_field (temp
, bitsize
, bitpos
, bitregion_start
,
5284 bitregion_end
, mode1
, from
, get_alias_set (to
),
5285 nontemporal
, reversep
);
5286 emit_move_insn (to_rtx
, temp
);
5292 /* If the field is at offset zero, we could have been given the
5293 DECL_RTX of the parent struct. Don't munge it. */
5294 to_rtx
= shallow_copy_rtx (to_rtx
);
5295 set_mem_attributes_minus_bitpos (to_rtx
, to
, 0, bitpos
);
5297 MEM_VOLATILE_P (to_rtx
) = 1;
5300 gcc_checking_assert (known_ge (bitpos
, 0));
5301 if (optimize_bitfield_assignment_op (bitsize
, bitpos
,
5302 bitregion_start
, bitregion_end
,
5303 mode1
, to_rtx
, to
, from
,
5307 result
= store_field (to_rtx
, bitsize
, bitpos
,
5308 bitregion_start
, bitregion_end
,
5309 mode1
, from
, get_alias_set (to
),
5310 nontemporal
, reversep
);
5314 preserve_temp_slots (result
);
5319 /* If the rhs is a function call and its value is not an aggregate,
5320 call the function before we start to compute the lhs.
5321 This is needed for correct code for cases such as
5322 val = setjmp (buf) on machines where reference to val
5323 requires loading up part of an address in a separate insn.
5325 Don't do this if TO is a VAR_DECL or PARM_DECL whose DECL_RTL is REG
5326 since it might be a promoted variable where the zero- or sign- extension
5327 needs to be done. Handling this in the normal way is safe because no
5328 computation is done before the call. The same is true for SSA names. */
5329 if (TREE_CODE (from
) == CALL_EXPR
&& ! aggregate_value_p (from
, from
)
5330 && COMPLETE_TYPE_P (TREE_TYPE (from
))
5331 && TREE_CODE (TYPE_SIZE (TREE_TYPE (from
))) == INTEGER_CST
5333 || TREE_CODE (to
) == PARM_DECL
5334 || TREE_CODE (to
) == RESULT_DECL
)
5335 && REG_P (DECL_RTL (to
)))
5336 || TREE_CODE (to
) == SSA_NAME
))
5341 value
= expand_normal (from
);
5344 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5346 /* Handle calls that return values in multiple non-contiguous locations.
5347 The Irix 6 ABI has examples of this. */
5348 if (GET_CODE (to_rtx
) == PARALLEL
)
5350 if (GET_CODE (value
) == PARALLEL
)
5351 emit_group_move (to_rtx
, value
);
5353 emit_group_load (to_rtx
, value
, TREE_TYPE (from
),
5354 int_size_in_bytes (TREE_TYPE (from
)));
5356 else if (GET_CODE (value
) == PARALLEL
)
5357 emit_group_store (to_rtx
, value
, TREE_TYPE (from
),
5358 int_size_in_bytes (TREE_TYPE (from
)));
5359 else if (GET_MODE (to_rtx
) == BLKmode
)
5361 /* Handle calls that return BLKmode values in registers. */
5363 copy_blkmode_from_reg (to_rtx
, value
, TREE_TYPE (from
));
5365 emit_block_move (to_rtx
, value
, expr_size (from
), BLOCK_OP_NORMAL
);
5369 if (POINTER_TYPE_P (TREE_TYPE (to
)))
5370 value
= convert_memory_address_addr_space
5371 (as_a
<scalar_int_mode
> (GET_MODE (to_rtx
)), value
,
5372 TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (to
))));
5374 emit_move_insn (to_rtx
, value
);
5377 preserve_temp_slots (to_rtx
);
5382 /* Ordinary treatment. Expand TO to get a REG or MEM rtx. */
5383 to_rtx
= expand_expr (to
, NULL_RTX
, VOIDmode
, EXPAND_WRITE
);
5385 /* Don't move directly into a return register. */
5386 if (TREE_CODE (to
) == RESULT_DECL
5387 && (REG_P (to_rtx
) || GET_CODE (to_rtx
) == PARALLEL
))
5393 /* If the source is itself a return value, it still is in a pseudo at
5394 this point so we can move it back to the return register directly. */
5396 && TYPE_MODE (TREE_TYPE (from
)) == BLKmode
5397 && TREE_CODE (from
) != CALL_EXPR
)
5398 temp
= copy_blkmode_to_reg (GET_MODE (to_rtx
), from
);
5400 temp
= expand_expr (from
, NULL_RTX
, GET_MODE (to_rtx
), EXPAND_NORMAL
);
5402 /* Handle calls that return values in multiple non-contiguous locations.
5403 The Irix 6 ABI has examples of this. */
5404 if (GET_CODE (to_rtx
) == PARALLEL
)
5406 if (GET_CODE (temp
) == PARALLEL
)
5407 emit_group_move (to_rtx
, temp
);
5409 emit_group_load (to_rtx
, temp
, TREE_TYPE (from
),
5410 int_size_in_bytes (TREE_TYPE (from
)));
5413 emit_move_insn (to_rtx
, temp
);
5415 preserve_temp_slots (to_rtx
);
5420 /* In case we are returning the contents of an object which overlaps
5421 the place the value is being stored, use a safe function when copying
5422 a value through a pointer into a structure value return block. */
5423 if (TREE_CODE (to
) == RESULT_DECL
5424 && TREE_CODE (from
) == INDIRECT_REF
5425 && ADDR_SPACE_GENERIC_P
5426 (TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (from
, 0)))))
5427 && refs_may_alias_p (to
, from
)
5428 && cfun
->returns_struct
5429 && !cfun
->returns_pcc_struct
)
5434 size
= expr_size (from
);
5435 from_rtx
= expand_normal (from
);
5437 emit_block_move_via_libcall (XEXP (to_rtx
, 0), XEXP (from_rtx
, 0), size
);
5439 preserve_temp_slots (to_rtx
);
5444 /* Compute FROM and store the value in the rtx we got. */
5447 result
= store_expr (from
, to_rtx
, 0, nontemporal
, false);
5448 preserve_temp_slots (result
);
5453 /* Emits nontemporal store insn that moves FROM to TO. Returns true if this
5454 succeeded, false otherwise. */
5457 emit_storent_insn (rtx to
, rtx from
)
5459 struct expand_operand ops
[2];
5460 machine_mode mode
= GET_MODE (to
);
5461 enum insn_code code
= optab_handler (storent_optab
, mode
);
5463 if (code
== CODE_FOR_nothing
)
5466 create_fixed_operand (&ops
[0], to
);
5467 create_input_operand (&ops
[1], from
, mode
);
5468 return maybe_expand_insn (code
, 2, ops
);
5471 /* Helper function for store_expr storing of STRING_CST. */
5474 string_cst_read_str (void *data
, HOST_WIDE_INT offset
, scalar_int_mode mode
)
5476 tree str
= (tree
) data
;
5478 gcc_assert (offset
>= 0);
5479 if (offset
>= TREE_STRING_LENGTH (str
))
5482 if ((unsigned HOST_WIDE_INT
) offset
+ GET_MODE_SIZE (mode
)
5483 > (unsigned HOST_WIDE_INT
) TREE_STRING_LENGTH (str
))
5485 char *p
= XALLOCAVEC (char, GET_MODE_SIZE (mode
));
5486 size_t l
= TREE_STRING_LENGTH (str
) - offset
;
5487 memcpy (p
, TREE_STRING_POINTER (str
) + offset
, l
);
5488 memset (p
+ l
, '\0', GET_MODE_SIZE (mode
) - l
);
5489 return c_readstr (p
, mode
, false);
5492 return c_readstr (TREE_STRING_POINTER (str
) + offset
, mode
, false);
5495 /* Generate code for computing expression EXP,
5496 and storing the value into TARGET.
5498 If the mode is BLKmode then we may return TARGET itself.
5499 It turns out that in BLKmode it doesn't cause a problem.
5500 because C has no operators that could combine two different
5501 assignments into the same BLKmode object with different values
5502 with no sequence point. Will other languages need this to
5505 If CALL_PARAM_P is nonzero, this is a store into a call param on the
5506 stack, and block moves may need to be treated specially.
5508 If NONTEMPORAL is true, try using a nontemporal store instruction.
5510 If REVERSE is true, the store is to be done in reverse order. */
5513 store_expr (tree exp
, rtx target
, int call_param_p
,
5514 bool nontemporal
, bool reverse
)
5517 rtx alt_rtl
= NULL_RTX
;
5518 location_t loc
= curr_insn_location ();
5520 if (VOID_TYPE_P (TREE_TYPE (exp
)))
5522 /* C++ can generate ?: expressions with a throw expression in one
5523 branch and an rvalue in the other. Here, we resolve attempts to
5524 store the throw expression's nonexistent result. */
5525 gcc_assert (!call_param_p
);
5526 expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
5529 if (TREE_CODE (exp
) == COMPOUND_EXPR
)
5531 /* Perform first part of compound expression, then assign from second
5533 expand_expr (TREE_OPERAND (exp
, 0), const0_rtx
, VOIDmode
,
5534 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5535 return store_expr (TREE_OPERAND (exp
, 1), target
,
5536 call_param_p
, nontemporal
, reverse
);
5538 else if (TREE_CODE (exp
) == COND_EXPR
&& GET_MODE (target
) == BLKmode
)
5540 /* For conditional expression, get safe form of the target. Then
5541 test the condition, doing the appropriate assignment on either
5542 side. This avoids the creation of unnecessary temporaries.
5543 For non-BLKmode, it is more efficient not to do this. */
5545 rtx_code_label
*lab1
= gen_label_rtx (), *lab2
= gen_label_rtx ();
5547 do_pending_stack_adjust ();
5549 jumpifnot (TREE_OPERAND (exp
, 0), lab1
,
5550 profile_probability::uninitialized ());
5551 store_expr (TREE_OPERAND (exp
, 1), target
, call_param_p
,
5552 nontemporal
, reverse
);
5553 emit_jump_insn (targetm
.gen_jump (lab2
));
5556 store_expr (TREE_OPERAND (exp
, 2), target
, call_param_p
,
5557 nontemporal
, reverse
);
5563 else if (GET_CODE (target
) == SUBREG
&& SUBREG_PROMOTED_VAR_P (target
))
5564 /* If this is a scalar in a register that is stored in a wider mode
5565 than the declared mode, compute the result into its declared mode
5566 and then convert to the wider mode. Our value is the computed
5569 rtx inner_target
= 0;
5570 scalar_int_mode outer_mode
= subreg_unpromoted_mode (target
);
5571 scalar_int_mode inner_mode
= subreg_promoted_mode (target
);
5573 /* We can do the conversion inside EXP, which will often result
5574 in some optimizations. Do the conversion in two steps: first
5575 change the signedness, if needed, then the extend. But don't
5576 do this if the type of EXP is a subtype of something else
5577 since then the conversion might involve more than just
5578 converting modes. */
5579 if (INTEGRAL_TYPE_P (TREE_TYPE (exp
))
5580 && TREE_TYPE (TREE_TYPE (exp
)) == 0
5581 && GET_MODE_PRECISION (outer_mode
)
5582 == TYPE_PRECISION (TREE_TYPE (exp
)))
5584 if (!SUBREG_CHECK_PROMOTED_SIGN (target
,
5585 TYPE_UNSIGNED (TREE_TYPE (exp
))))
5587 /* Some types, e.g. Fortran's logical*4, won't have a signed
5588 version, so use the mode instead. */
5590 = (signed_or_unsigned_type_for
5591 (SUBREG_PROMOTED_SIGN (target
), TREE_TYPE (exp
)));
5593 ntype
= lang_hooks
.types
.type_for_mode
5594 (TYPE_MODE (TREE_TYPE (exp
)),
5595 SUBREG_PROMOTED_SIGN (target
));
5597 exp
= fold_convert_loc (loc
, ntype
, exp
);
5600 exp
= fold_convert_loc (loc
, lang_hooks
.types
.type_for_mode
5601 (inner_mode
, SUBREG_PROMOTED_SIGN (target
)),
5604 inner_target
= SUBREG_REG (target
);
5607 temp
= expand_expr (exp
, inner_target
, VOIDmode
,
5608 call_param_p
? EXPAND_STACK_PARM
: EXPAND_NORMAL
);
5611 /* If TEMP is a VOIDmode constant, use convert_modes to make
5612 sure that we properly convert it. */
5613 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
)
5615 temp
= convert_modes (outer_mode
, TYPE_MODE (TREE_TYPE (exp
)),
5616 temp
, SUBREG_PROMOTED_SIGN (target
));
5617 temp
= convert_modes (inner_mode
, outer_mode
, temp
,
5618 SUBREG_PROMOTED_SIGN (target
));
5621 convert_move (SUBREG_REG (target
), temp
,
5622 SUBREG_PROMOTED_SIGN (target
));
5626 else if ((TREE_CODE (exp
) == STRING_CST
5627 || (TREE_CODE (exp
) == MEM_REF
5628 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
5629 && TREE_CODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
5631 && integer_zerop (TREE_OPERAND (exp
, 1))))
5632 && !nontemporal
&& !call_param_p
5635 /* Optimize initialization of an array with a STRING_CST. */
5636 HOST_WIDE_INT exp_len
, str_copy_len
;
5638 tree str
= TREE_CODE (exp
) == STRING_CST
5639 ? exp
: TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
5641 exp_len
= int_expr_size (exp
);
5645 if (TREE_STRING_LENGTH (str
) <= 0)
5648 if (can_store_by_pieces (exp_len
, string_cst_read_str
, (void *) str
,
5649 MEM_ALIGN (target
), false))
5651 store_by_pieces (target
, exp_len
, string_cst_read_str
, (void *) str
,
5652 MEM_ALIGN (target
), false, RETURN_BEGIN
);
5656 str_copy_len
= TREE_STRING_LENGTH (str
);
5657 if ((STORE_MAX_PIECES
& (STORE_MAX_PIECES
- 1)) == 0)
5659 str_copy_len
+= STORE_MAX_PIECES
- 1;
5660 str_copy_len
&= ~(STORE_MAX_PIECES
- 1);
5662 if (str_copy_len
>= exp_len
)
5665 if (!can_store_by_pieces (str_copy_len
, string_cst_read_str
,
5666 (void *) str
, MEM_ALIGN (target
), false))
5669 dest_mem
= store_by_pieces (target
, str_copy_len
, string_cst_read_str
,
5670 (void *) str
, MEM_ALIGN (target
), false,
5672 clear_storage (adjust_address_1 (dest_mem
, BLKmode
, 0, 1, 1, 0,
5673 exp_len
- str_copy_len
),
5674 GEN_INT (exp_len
- str_copy_len
), BLOCK_OP_NORMAL
);
5682 /* If we want to use a nontemporal or a reverse order store, force the
5683 value into a register first. */
5684 tmp_target
= nontemporal
|| reverse
? NULL_RTX
: target
;
5685 temp
= expand_expr_real (exp
, tmp_target
, GET_MODE (target
),
5687 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
),
5691 /* If TEMP is a VOIDmode constant and the mode of the type of EXP is not
5692 the same as that of TARGET, adjust the constant. This is needed, for
5693 example, in case it is a CONST_DOUBLE or CONST_WIDE_INT and we want
5694 only a word-sized value. */
5695 if (CONSTANT_P (temp
) && GET_MODE (temp
) == VOIDmode
5696 && TREE_CODE (exp
) != ERROR_MARK
5697 && GET_MODE (target
) != TYPE_MODE (TREE_TYPE (exp
)))
5699 if (GET_MODE_CLASS (GET_MODE (target
))
5700 != GET_MODE_CLASS (TYPE_MODE (TREE_TYPE (exp
)))
5701 && known_eq (GET_MODE_BITSIZE (GET_MODE (target
)),
5702 GET_MODE_BITSIZE (TYPE_MODE (TREE_TYPE (exp
)))))
5704 rtx t
= simplify_gen_subreg (GET_MODE (target
), temp
,
5705 TYPE_MODE (TREE_TYPE (exp
)), 0);
5709 if (GET_MODE (temp
) == VOIDmode
)
5710 temp
= convert_modes (GET_MODE (target
), TYPE_MODE (TREE_TYPE (exp
)),
5711 temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5714 /* If value was not generated in the target, store it there.
5715 Convert the value to TARGET's type first if necessary and emit the
5716 pending incrementations that have been queued when expanding EXP.
5717 Note that we cannot emit the whole queue blindly because this will
5718 effectively disable the POST_INC optimization later.
5720 If TEMP and TARGET compare equal according to rtx_equal_p, but
5721 one or both of them are volatile memory refs, we have to distinguish
5723 - expand_expr has used TARGET. In this case, we must not generate
5724 another copy. This can be detected by TARGET being equal according
5726 - expand_expr has not used TARGET - that means that the source just
5727 happens to have the same RTX form. Since temp will have been created
5728 by expand_expr, it will compare unequal according to == .
5729 We must generate a copy in this case, to reach the correct number
5730 of volatile memory references. */
5732 if ((! rtx_equal_p (temp
, target
)
5733 || (temp
!= target
&& (side_effects_p (temp
)
5734 || side_effects_p (target
))))
5735 && TREE_CODE (exp
) != ERROR_MARK
5736 /* If store_expr stores a DECL whose DECL_RTL(exp) == TARGET,
5737 but TARGET is not valid memory reference, TEMP will differ
5738 from TARGET although it is really the same location. */
5740 && rtx_equal_p (alt_rtl
, target
)
5741 && !side_effects_p (alt_rtl
)
5742 && !side_effects_p (target
))
5743 /* If there's nothing to copy, don't bother. Don't call
5744 expr_size unless necessary, because some front-ends (C++)
5745 expr_size-hook must not be given objects that are not
5746 supposed to be bit-copied or bit-initialized. */
5747 && expr_size (exp
) != const0_rtx
)
5749 if (GET_MODE (temp
) != GET_MODE (target
) && GET_MODE (temp
) != VOIDmode
)
5751 if (GET_MODE (target
) == BLKmode
)
5753 /* Handle calls that return BLKmode values in registers. */
5754 if (REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
5755 copy_blkmode_from_reg (target
, temp
, TREE_TYPE (exp
));
5757 store_bit_field (target
,
5758 INTVAL (expr_size (exp
)) * BITS_PER_UNIT
,
5759 0, 0, 0, GET_MODE (temp
), temp
, reverse
);
5762 convert_move (target
, temp
, TYPE_UNSIGNED (TREE_TYPE (exp
)));
5765 else if (GET_MODE (temp
) == BLKmode
&& TREE_CODE (exp
) == STRING_CST
)
5767 /* Handle copying a string constant into an array. The string
5768 constant may be shorter than the array. So copy just the string's
5769 actual length, and clear the rest. First get the size of the data
5770 type of the string, which is actually the size of the target. */
5771 rtx size
= expr_size (exp
);
5773 if (CONST_INT_P (size
)
5774 && INTVAL (size
) < TREE_STRING_LENGTH (exp
))
5775 emit_block_move (target
, temp
, size
,
5777 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5780 machine_mode pointer_mode
5781 = targetm
.addr_space
.pointer_mode (MEM_ADDR_SPACE (target
));
5782 machine_mode address_mode
= get_address_mode (target
);
5784 /* Compute the size of the data to copy from the string. */
5786 = size_binop_loc (loc
, MIN_EXPR
,
5787 make_tree (sizetype
, size
),
5788 size_int (TREE_STRING_LENGTH (exp
)));
5790 = expand_expr (copy_size
, NULL_RTX
, VOIDmode
,
5792 ? EXPAND_STACK_PARM
: EXPAND_NORMAL
));
5793 rtx_code_label
*label
= 0;
5795 /* Copy that much. */
5796 copy_size_rtx
= convert_to_mode (pointer_mode
, copy_size_rtx
,
5797 TYPE_UNSIGNED (sizetype
));
5798 emit_block_move (target
, temp
, copy_size_rtx
,
5800 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5802 /* Figure out how much is left in TARGET that we have to clear.
5803 Do all calculations in pointer_mode. */
5804 poly_int64 const_copy_size
;
5805 if (poly_int_rtx_p (copy_size_rtx
, &const_copy_size
))
5807 size
= plus_constant (address_mode
, size
, -const_copy_size
);
5808 target
= adjust_address (target
, BLKmode
, const_copy_size
);
5812 size
= expand_binop (TYPE_MODE (sizetype
), sub_optab
, size
,
5813 copy_size_rtx
, NULL_RTX
, 0,
5816 if (GET_MODE (copy_size_rtx
) != address_mode
)
5817 copy_size_rtx
= convert_to_mode (address_mode
,
5819 TYPE_UNSIGNED (sizetype
));
5821 target
= offset_address (target
, copy_size_rtx
,
5822 highest_pow2_factor (copy_size
));
5823 label
= gen_label_rtx ();
5824 emit_cmp_and_jump_insns (size
, const0_rtx
, LT
, NULL_RTX
,
5825 GET_MODE (size
), 0, label
);
5828 if (size
!= const0_rtx
)
5829 clear_storage (target
, size
, BLOCK_OP_NORMAL
);
5835 /* Handle calls that return values in multiple non-contiguous locations.
5836 The Irix 6 ABI has examples of this. */
5837 else if (GET_CODE (target
) == PARALLEL
)
5839 if (GET_CODE (temp
) == PARALLEL
)
5840 emit_group_move (target
, temp
);
5842 emit_group_load (target
, temp
, TREE_TYPE (exp
),
5843 int_size_in_bytes (TREE_TYPE (exp
)));
5845 else if (GET_CODE (temp
) == PARALLEL
)
5846 emit_group_store (target
, temp
, TREE_TYPE (exp
),
5847 int_size_in_bytes (TREE_TYPE (exp
)));
5848 else if (GET_MODE (temp
) == BLKmode
)
5849 emit_block_move (target
, temp
, expr_size (exp
),
5851 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
5852 /* If we emit a nontemporal store, there is nothing else to do. */
5853 else if (nontemporal
&& emit_storent_insn (target
, temp
))
5858 temp
= flip_storage_order (GET_MODE (target
), temp
);
5859 temp
= force_operand (temp
, target
);
5861 emit_move_insn (target
, temp
);
5868 /* Return true if field F of structure TYPE is a flexible array. */
5871 flexible_array_member_p (const_tree f
, const_tree type
)
5876 return (DECL_CHAIN (f
) == NULL
5877 && TREE_CODE (tf
) == ARRAY_TYPE
5879 && TYPE_MIN_VALUE (TYPE_DOMAIN (tf
))
5880 && integer_zerop (TYPE_MIN_VALUE (TYPE_DOMAIN (tf
)))
5881 && !TYPE_MAX_VALUE (TYPE_DOMAIN (tf
))
5882 && int_size_in_bytes (type
) >= 0);
5885 /* If FOR_CTOR_P, return the number of top-level elements that a constructor
5886 must have in order for it to completely initialize a value of type TYPE.
5887 Return -1 if the number isn't known.
5889 If !FOR_CTOR_P, return an estimate of the number of scalars in TYPE. */
5891 static HOST_WIDE_INT
5892 count_type_elements (const_tree type
, bool for_ctor_p
)
5894 switch (TREE_CODE (type
))
5900 nelts
= array_type_nelts (type
);
5901 if (nelts
&& tree_fits_uhwi_p (nelts
))
5903 unsigned HOST_WIDE_INT n
;
5905 n
= tree_to_uhwi (nelts
) + 1;
5906 if (n
== 0 || for_ctor_p
)
5909 return n
* count_type_elements (TREE_TYPE (type
), false);
5911 return for_ctor_p
? -1 : 1;
5916 unsigned HOST_WIDE_INT n
;
5920 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5921 if (TREE_CODE (f
) == FIELD_DECL
)
5924 n
+= count_type_elements (TREE_TYPE (f
), false);
5925 else if (!flexible_array_member_p (f
, type
))
5926 /* Don't count flexible arrays, which are not supposed
5927 to be initialized. */
5935 case QUAL_UNION_TYPE
:
5940 gcc_assert (!for_ctor_p
);
5941 /* Estimate the number of scalars in each field and pick the
5942 maximum. Other estimates would do instead; the idea is simply
5943 to make sure that the estimate is not sensitive to the ordering
5946 for (f
= TYPE_FIELDS (type
); f
; f
= DECL_CHAIN (f
))
5947 if (TREE_CODE (f
) == FIELD_DECL
)
5949 m
= count_type_elements (TREE_TYPE (f
), false);
5950 /* If the field doesn't span the whole union, add an extra
5951 scalar for the rest. */
5952 if (simple_cst_equal (TYPE_SIZE (TREE_TYPE (f
)),
5953 TYPE_SIZE (type
)) != 1)
5966 unsigned HOST_WIDE_INT nelts
;
5967 if (TYPE_VECTOR_SUBPARTS (type
).is_constant (&nelts
))
5975 case FIXED_POINT_TYPE
:
5980 case REFERENCE_TYPE
:
5996 /* Helper for categorize_ctor_elements. Identical interface. */
5999 categorize_ctor_elements_1 (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6000 HOST_WIDE_INT
*p_unique_nz_elts
,
6001 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6003 unsigned HOST_WIDE_INT idx
;
6004 HOST_WIDE_INT nz_elts
, unique_nz_elts
, init_elts
, num_fields
;
6005 tree value
, purpose
, elt_type
;
6007 /* Whether CTOR is a valid constant initializer, in accordance with what
6008 initializer_constant_valid_p does. If inferred from the constructor
6009 elements, true until proven otherwise. */
6010 bool const_from_elts_p
= constructor_static_from_elts_p (ctor
);
6011 bool const_p
= const_from_elts_p
? true : TREE_STATIC (ctor
);
6017 elt_type
= NULL_TREE
;
6019 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (ctor
), idx
, purpose
, value
)
6021 HOST_WIDE_INT mult
= 1;
6023 if (purpose
&& TREE_CODE (purpose
) == RANGE_EXPR
)
6025 tree lo_index
= TREE_OPERAND (purpose
, 0);
6026 tree hi_index
= TREE_OPERAND (purpose
, 1);
6028 if (tree_fits_uhwi_p (lo_index
) && tree_fits_uhwi_p (hi_index
))
6029 mult
= (tree_to_uhwi (hi_index
)
6030 - tree_to_uhwi (lo_index
) + 1);
6033 elt_type
= TREE_TYPE (value
);
6035 switch (TREE_CODE (value
))
6039 HOST_WIDE_INT nz
= 0, unz
= 0, ic
= 0;
6041 bool const_elt_p
= categorize_ctor_elements_1 (value
, &nz
, &unz
,
6044 nz_elts
+= mult
* nz
;
6045 unique_nz_elts
+= unz
;
6046 init_elts
+= mult
* ic
;
6048 if (const_from_elts_p
&& const_p
)
6049 const_p
= const_elt_p
;
6056 if (!initializer_zerop (value
))
6065 nz_elts
+= mult
* TREE_STRING_LENGTH (value
);
6066 unique_nz_elts
+= TREE_STRING_LENGTH (value
);
6067 init_elts
+= mult
* TREE_STRING_LENGTH (value
);
6071 if (!initializer_zerop (TREE_REALPART (value
)))
6076 if (!initializer_zerop (TREE_IMAGPART (value
)))
6081 init_elts
+= 2 * mult
;
6086 /* We can only construct constant-length vectors using
6088 unsigned int nunits
= VECTOR_CST_NELTS (value
).to_constant ();
6089 for (unsigned int i
= 0; i
< nunits
; ++i
)
6091 tree v
= VECTOR_CST_ELT (value
, i
);
6092 if (!initializer_zerop (v
))
6104 HOST_WIDE_INT tc
= count_type_elements (elt_type
, false);
6105 nz_elts
+= mult
* tc
;
6106 unique_nz_elts
+= tc
;
6107 init_elts
+= mult
* tc
;
6109 if (const_from_elts_p
&& const_p
)
6111 = initializer_constant_valid_p (value
,
6113 TYPE_REVERSE_STORAGE_ORDER
6121 if (*p_complete
&& !complete_ctor_at_level_p (TREE_TYPE (ctor
),
6122 num_fields
, elt_type
))
6123 *p_complete
= false;
6125 *p_nz_elts
+= nz_elts
;
6126 *p_unique_nz_elts
+= unique_nz_elts
;
6127 *p_init_elts
+= init_elts
;
6132 /* Examine CTOR to discover:
6133 * how many scalar fields are set to nonzero values,
6134 and place it in *P_NZ_ELTS;
6135 * the same, but counting RANGE_EXPRs as multiplier of 1 instead of
6136 high - low + 1 (this can be useful for callers to determine ctors
6137 that could be cheaply initialized with - perhaps nested - loops
6138 compared to copied from huge read-only data),
6139 and place it in *P_UNIQUE_NZ_ELTS;
6140 * how many scalar fields in total are in CTOR,
6141 and place it in *P_ELT_COUNT.
6142 * whether the constructor is complete -- in the sense that every
6143 meaningful byte is explicitly given a value --
6144 and place it in *P_COMPLETE.
6146 Return whether or not CTOR is a valid static constant initializer, the same
6147 as "initializer_constant_valid_p (CTOR, TREE_TYPE (CTOR)) != 0". */
6150 categorize_ctor_elements (const_tree ctor
, HOST_WIDE_INT
*p_nz_elts
,
6151 HOST_WIDE_INT
*p_unique_nz_elts
,
6152 HOST_WIDE_INT
*p_init_elts
, bool *p_complete
)
6155 *p_unique_nz_elts
= 0;
6159 return categorize_ctor_elements_1 (ctor
, p_nz_elts
, p_unique_nz_elts
,
6160 p_init_elts
, p_complete
);
6163 /* TYPE is initialized by a constructor with NUM_ELTS elements, the last
6164 of which had type LAST_TYPE. Each element was itself a complete
6165 initializer, in the sense that every meaningful byte was explicitly
6166 given a value. Return true if the same is true for the constructor
6170 complete_ctor_at_level_p (const_tree type
, HOST_WIDE_INT num_elts
,
6171 const_tree last_type
)
6173 if (TREE_CODE (type
) == UNION_TYPE
6174 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6179 gcc_assert (num_elts
== 1 && last_type
);
6181 /* ??? We could look at each element of the union, and find the
6182 largest element. Which would avoid comparing the size of the
6183 initialized element against any tail padding in the union.
6184 Doesn't seem worth the effort... */
6185 return simple_cst_equal (TYPE_SIZE (type
), TYPE_SIZE (last_type
)) == 1;
6188 return count_type_elements (type
, true) == num_elts
;
6191 /* Return 1 if EXP contains mostly (3/4) zeros. */
6194 mostly_zeros_p (const_tree exp
)
6196 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6198 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6201 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6203 return !complete_p
|| nz_elts
< init_elts
/ 4;
6206 return initializer_zerop (exp
);
6209 /* Return 1 if EXP contains all zeros. */
6212 all_zeros_p (const_tree exp
)
6214 if (TREE_CODE (exp
) == CONSTRUCTOR
)
6216 HOST_WIDE_INT nz_elts
, unz_elts
, init_elts
;
6219 categorize_ctor_elements (exp
, &nz_elts
, &unz_elts
, &init_elts
,
6221 return nz_elts
== 0;
6224 return initializer_zerop (exp
);
6227 /* Helper function for store_constructor.
6228 TARGET, BITSIZE, BITPOS, MODE, EXP are as for store_field.
6229 CLEARED is as for store_constructor.
6230 ALIAS_SET is the alias set to use for any stores.
6231 If REVERSE is true, the store is to be done in reverse order.
6233 This provides a recursive shortcut back to store_constructor when it isn't
6234 necessary to go through store_field. This is so that we can pass through
6235 the cleared field to let store_constructor know that we may not have to
6236 clear a substructure if the outer structure has already been cleared. */
6239 store_constructor_field (rtx target
, poly_uint64 bitsize
, poly_int64 bitpos
,
6240 poly_uint64 bitregion_start
,
6241 poly_uint64 bitregion_end
,
6243 tree exp
, int cleared
,
6244 alias_set_type alias_set
, bool reverse
)
6247 poly_uint64 bytesize
;
6248 if (TREE_CODE (exp
) == CONSTRUCTOR
6249 /* We can only call store_constructor recursively if the size and
6250 bit position are on a byte boundary. */
6251 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
6252 && maybe_ne (bitsize
, 0U)
6253 && multiple_p (bitsize
, BITS_PER_UNIT
, &bytesize
)
6254 /* If we have a nonzero bitpos for a register target, then we just
6255 let store_field do the bitfield handling. This is unlikely to
6256 generate unnecessary clear instructions anyways. */
6257 && (known_eq (bitpos
, 0) || MEM_P (target
)))
6261 machine_mode target_mode
= GET_MODE (target
);
6262 if (target_mode
!= BLKmode
6263 && !multiple_p (bitpos
, GET_MODE_ALIGNMENT (target_mode
)))
6264 target_mode
= BLKmode
;
6265 target
= adjust_address (target
, target_mode
, bytepos
);
6269 /* Update the alias set, if required. */
6270 if (MEM_P (target
) && ! MEM_KEEP_ALIAS_SET_P (target
)
6271 && MEM_ALIAS_SET (target
) != 0)
6273 target
= copy_rtx (target
);
6274 set_mem_alias_set (target
, alias_set
);
6277 store_constructor (exp
, target
, cleared
, bytesize
, reverse
);
6280 store_field (target
, bitsize
, bitpos
, bitregion_start
, bitregion_end
, mode
,
6281 exp
, alias_set
, false, reverse
);
6285 /* Returns the number of FIELD_DECLs in TYPE. */
6288 fields_length (const_tree type
)
6290 tree t
= TYPE_FIELDS (type
);
6293 for (; t
; t
= DECL_CHAIN (t
))
6294 if (TREE_CODE (t
) == FIELD_DECL
)
6301 /* Store the value of constructor EXP into the rtx TARGET.
6302 TARGET is either a REG or a MEM; we know it cannot conflict, since
6303 safe_from_p has been called.
6304 CLEARED is true if TARGET is known to have been zero'd.
6305 SIZE is the number of bytes of TARGET we are allowed to modify: this
6306 may not be the same as the size of EXP if we are assigning to a field
6307 which has been packed to exclude padding bits.
6308 If REVERSE is true, the store is to be done in reverse order. */
6311 store_constructor (tree exp
, rtx target
, int cleared
, poly_int64 size
,
6314 tree type
= TREE_TYPE (exp
);
6315 HOST_WIDE_INT exp_size
= int_size_in_bytes (type
);
6316 poly_int64 bitregion_end
= known_gt (size
, 0) ? size
* BITS_PER_UNIT
- 1 : 0;
6318 switch (TREE_CODE (type
))
6322 case QUAL_UNION_TYPE
:
6324 unsigned HOST_WIDE_INT idx
;
6327 /* The storage order is specified for every aggregate type. */
6328 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6330 /* If size is zero or the target is already cleared, do nothing. */
6331 if (known_eq (size
, 0) || cleared
)
6333 /* We either clear the aggregate or indicate the value is dead. */
6334 else if ((TREE_CODE (type
) == UNION_TYPE
6335 || TREE_CODE (type
) == QUAL_UNION_TYPE
)
6336 && ! CONSTRUCTOR_ELTS (exp
))
6337 /* If the constructor is empty, clear the union. */
6339 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
6343 /* If we are building a static constructor into a register,
6344 set the initial value as zero so we can fold the value into
6345 a constant. But if more than one register is involved,
6346 this probably loses. */
6347 else if (REG_P (target
) && TREE_STATIC (exp
)
6348 && known_le (GET_MODE_SIZE (GET_MODE (target
)),
6349 REGMODE_NATURAL_SIZE (GET_MODE (target
))))
6351 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6355 /* If the constructor has fewer fields than the structure or
6356 if we are initializing the structure to mostly zeros, clear
6357 the whole structure first. Don't do this if TARGET is a
6358 register whose mode size isn't equal to SIZE since
6359 clear_storage can't handle this case. */
6360 else if (known_size_p (size
)
6361 && (((int) CONSTRUCTOR_NELTS (exp
) != fields_length (type
))
6362 || mostly_zeros_p (exp
))
6364 || known_eq (GET_MODE_SIZE (GET_MODE (target
)), size
)))
6366 clear_storage (target
, gen_int_mode (size
, Pmode
),
6371 if (REG_P (target
) && !cleared
)
6372 emit_clobber (target
);
6374 /* Store each element of the constructor into the
6375 corresponding field of TARGET. */
6376 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, field
, value
)
6379 HOST_WIDE_INT bitsize
;
6380 HOST_WIDE_INT bitpos
= 0;
6382 rtx to_rtx
= target
;
6384 /* Just ignore missing fields. We cleared the whole
6385 structure, above, if any fields are missing. */
6389 if (cleared
&& initializer_zerop (value
))
6392 if (tree_fits_uhwi_p (DECL_SIZE (field
)))
6393 bitsize
= tree_to_uhwi (DECL_SIZE (field
));
6397 mode
= DECL_MODE (field
);
6398 if (DECL_BIT_FIELD (field
))
6401 offset
= DECL_FIELD_OFFSET (field
);
6402 if (tree_fits_shwi_p (offset
)
6403 && tree_fits_shwi_p (bit_position (field
)))
6405 bitpos
= int_bit_position (field
);
6411 /* If this initializes a field that is smaller than a
6412 word, at the start of a word, try to widen it to a full
6413 word. This special case allows us to output C++ member
6414 function initializations in a form that the optimizers
6416 if (WORD_REGISTER_OPERATIONS
6418 && bitsize
< BITS_PER_WORD
6419 && bitpos
% BITS_PER_WORD
== 0
6420 && GET_MODE_CLASS (mode
) == MODE_INT
6421 && TREE_CODE (value
) == INTEGER_CST
6423 && bitpos
+ BITS_PER_WORD
<= exp_size
* BITS_PER_UNIT
)
6425 tree type
= TREE_TYPE (value
);
6427 if (TYPE_PRECISION (type
) < BITS_PER_WORD
)
6429 type
= lang_hooks
.types
.type_for_mode
6430 (word_mode
, TYPE_UNSIGNED (type
));
6431 value
= fold_convert (type
, value
);
6432 /* Make sure the bits beyond the original bitsize are zero
6433 so that we can correctly avoid extra zeroing stores in
6434 later constructor elements. */
6436 = wide_int_to_tree (type
, wi::mask (bitsize
, false,
6438 value
= fold_build2 (BIT_AND_EXPR
, type
, value
, bitsize_mask
);
6441 if (BYTES_BIG_ENDIAN
)
6443 = fold_build2 (LSHIFT_EXPR
, type
, value
,
6444 build_int_cst (type
,
6445 BITS_PER_WORD
- bitsize
));
6446 bitsize
= BITS_PER_WORD
;
6450 if (MEM_P (to_rtx
) && !MEM_KEEP_ALIAS_SET_P (to_rtx
)
6451 && DECL_NONADDRESSABLE_P (field
))
6453 to_rtx
= copy_rtx (to_rtx
);
6454 MEM_KEEP_ALIAS_SET_P (to_rtx
) = 1;
6457 store_constructor_field (to_rtx
, bitsize
, bitpos
,
6458 0, bitregion_end
, mode
,
6460 get_alias_set (TREE_TYPE (field
)),
6468 unsigned HOST_WIDE_INT i
;
6471 tree elttype
= TREE_TYPE (type
);
6473 HOST_WIDE_INT minelt
= 0;
6474 HOST_WIDE_INT maxelt
= 0;
6476 /* The storage order is specified for every aggregate type. */
6477 reverse
= TYPE_REVERSE_STORAGE_ORDER (type
);
6479 domain
= TYPE_DOMAIN (type
);
6480 const_bounds_p
= (TYPE_MIN_VALUE (domain
)
6481 && TYPE_MAX_VALUE (domain
)
6482 && tree_fits_shwi_p (TYPE_MIN_VALUE (domain
))
6483 && tree_fits_shwi_p (TYPE_MAX_VALUE (domain
)));
6485 /* If we have constant bounds for the range of the type, get them. */
6488 minelt
= tree_to_shwi (TYPE_MIN_VALUE (domain
));
6489 maxelt
= tree_to_shwi (TYPE_MAX_VALUE (domain
));
6492 /* If the constructor has fewer elements than the array, clear
6493 the whole array first. Similarly if this is static
6494 constructor of a non-BLKmode object. */
6497 else if (REG_P (target
) && TREE_STATIC (exp
))
6501 unsigned HOST_WIDE_INT idx
;
6503 HOST_WIDE_INT count
= 0, zero_count
= 0;
6504 need_to_clear
= ! const_bounds_p
;
6506 /* This loop is a more accurate version of the loop in
6507 mostly_zeros_p (it handles RANGE_EXPR in an index). It
6508 is also needed to check for missing elements. */
6509 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), idx
, index
, value
)
6511 HOST_WIDE_INT this_node_count
;
6516 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6518 tree lo_index
= TREE_OPERAND (index
, 0);
6519 tree hi_index
= TREE_OPERAND (index
, 1);
6521 if (! tree_fits_uhwi_p (lo_index
)
6522 || ! tree_fits_uhwi_p (hi_index
))
6528 this_node_count
= (tree_to_uhwi (hi_index
)
6529 - tree_to_uhwi (lo_index
) + 1);
6532 this_node_count
= 1;
6534 count
+= this_node_count
;
6535 if (mostly_zeros_p (value
))
6536 zero_count
+= this_node_count
;
6539 /* Clear the entire array first if there are any missing
6540 elements, or if the incidence of zero elements is >=
6543 && (count
< maxelt
- minelt
+ 1
6544 || 4 * zero_count
>= 3 * count
))
6548 if (need_to_clear
&& maybe_gt (size
, 0))
6551 emit_move_insn (target
, CONST0_RTX (GET_MODE (target
)));
6553 clear_storage (target
, gen_int_mode (size
, Pmode
),
6558 if (!cleared
&& REG_P (target
))
6559 /* Inform later passes that the old value is dead. */
6560 emit_clobber (target
);
6562 /* Store each element of the constructor into the
6563 corresponding element of TARGET, determined by counting the
6565 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (exp
), i
, index
, value
)
6569 HOST_WIDE_INT bitpos
;
6570 rtx xtarget
= target
;
6572 if (cleared
&& initializer_zerop (value
))
6575 mode
= TYPE_MODE (elttype
);
6576 if (mode
!= BLKmode
)
6577 bitsize
= GET_MODE_BITSIZE (mode
);
6578 else if (!poly_int_tree_p (TYPE_SIZE (elttype
), &bitsize
))
6581 if (index
!= NULL_TREE
&& TREE_CODE (index
) == RANGE_EXPR
)
6583 tree lo_index
= TREE_OPERAND (index
, 0);
6584 tree hi_index
= TREE_OPERAND (index
, 1);
6585 rtx index_r
, pos_rtx
;
6586 HOST_WIDE_INT lo
, hi
, count
;
6589 /* If the range is constant and "small", unroll the loop. */
6591 && tree_fits_shwi_p (lo_index
)
6592 && tree_fits_shwi_p (hi_index
)
6593 && (lo
= tree_to_shwi (lo_index
),
6594 hi
= tree_to_shwi (hi_index
),
6595 count
= hi
- lo
+ 1,
6598 || (tree_fits_uhwi_p (TYPE_SIZE (elttype
))
6599 && (tree_to_uhwi (TYPE_SIZE (elttype
)) * count
6602 lo
-= minelt
; hi
-= minelt
;
6603 for (; lo
<= hi
; lo
++)
6605 bitpos
= lo
* tree_to_shwi (TYPE_SIZE (elttype
));
6608 && !MEM_KEEP_ALIAS_SET_P (target
)
6609 && TREE_CODE (type
) == ARRAY_TYPE
6610 && TYPE_NONALIASED_COMPONENT (type
))
6612 target
= copy_rtx (target
);
6613 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6616 store_constructor_field
6617 (target
, bitsize
, bitpos
, 0, bitregion_end
,
6618 mode
, value
, cleared
,
6619 get_alias_set (elttype
), reverse
);
6624 rtx_code_label
*loop_start
= gen_label_rtx ();
6625 rtx_code_label
*loop_end
= gen_label_rtx ();
6628 expand_normal (hi_index
);
6630 index
= build_decl (EXPR_LOCATION (exp
),
6631 VAR_DECL
, NULL_TREE
, domain
);
6632 index_r
= gen_reg_rtx (promote_decl_mode (index
, NULL
));
6633 SET_DECL_RTL (index
, index_r
);
6634 store_expr (lo_index
, index_r
, 0, false, reverse
);
6636 /* Build the head of the loop. */
6637 do_pending_stack_adjust ();
6638 emit_label (loop_start
);
6640 /* Assign value to element index. */
6642 fold_convert (ssizetype
,
6643 fold_build2 (MINUS_EXPR
,
6646 TYPE_MIN_VALUE (domain
)));
6649 size_binop (MULT_EXPR
, position
,
6650 fold_convert (ssizetype
,
6651 TYPE_SIZE_UNIT (elttype
)));
6653 pos_rtx
= expand_normal (position
);
6654 xtarget
= offset_address (target
, pos_rtx
,
6655 highest_pow2_factor (position
));
6656 xtarget
= adjust_address (xtarget
, mode
, 0);
6657 if (TREE_CODE (value
) == CONSTRUCTOR
)
6658 store_constructor (value
, xtarget
, cleared
,
6659 exact_div (bitsize
, BITS_PER_UNIT
),
6662 store_expr (value
, xtarget
, 0, false, reverse
);
6664 /* Generate a conditional jump to exit the loop. */
6665 exit_cond
= build2 (LT_EXPR
, integer_type_node
,
6667 jumpif (exit_cond
, loop_end
,
6668 profile_probability::uninitialized ());
6670 /* Update the loop counter, and jump to the head of
6672 expand_assignment (index
,
6673 build2 (PLUS_EXPR
, TREE_TYPE (index
),
6674 index
, integer_one_node
),
6677 emit_jump (loop_start
);
6679 /* Build the end of the loop. */
6680 emit_label (loop_end
);
6683 else if ((index
!= 0 && ! tree_fits_shwi_p (index
))
6684 || ! tree_fits_uhwi_p (TYPE_SIZE (elttype
)))
6689 index
= ssize_int (1);
6692 index
= fold_convert (ssizetype
,
6693 fold_build2 (MINUS_EXPR
,
6696 TYPE_MIN_VALUE (domain
)));
6699 size_binop (MULT_EXPR
, index
,
6700 fold_convert (ssizetype
,
6701 TYPE_SIZE_UNIT (elttype
)));
6702 xtarget
= offset_address (target
,
6703 expand_normal (position
),
6704 highest_pow2_factor (position
));
6705 xtarget
= adjust_address (xtarget
, mode
, 0);
6706 store_expr (value
, xtarget
, 0, false, reverse
);
6711 bitpos
= ((tree_to_shwi (index
) - minelt
)
6712 * tree_to_uhwi (TYPE_SIZE (elttype
)));
6714 bitpos
= (i
* tree_to_uhwi (TYPE_SIZE (elttype
)));
6716 if (MEM_P (target
) && !MEM_KEEP_ALIAS_SET_P (target
)
6717 && TREE_CODE (type
) == ARRAY_TYPE
6718 && TYPE_NONALIASED_COMPONENT (type
))
6720 target
= copy_rtx (target
);
6721 MEM_KEEP_ALIAS_SET_P (target
) = 1;
6723 store_constructor_field (target
, bitsize
, bitpos
, 0,
6724 bitregion_end
, mode
, value
,
6725 cleared
, get_alias_set (elttype
),
6734 unsigned HOST_WIDE_INT idx
;
6735 constructor_elt
*ce
;
6738 insn_code icode
= CODE_FOR_nothing
;
6740 tree elttype
= TREE_TYPE (type
);
6741 int elt_size
= tree_to_uhwi (TYPE_SIZE (elttype
));
6742 machine_mode eltmode
= TYPE_MODE (elttype
);
6743 HOST_WIDE_INT bitsize
;
6744 HOST_WIDE_INT bitpos
;
6745 rtvec vector
= NULL
;
6747 unsigned HOST_WIDE_INT const_n_elts
;
6748 alias_set_type alias
;
6749 bool vec_vec_init_p
= false;
6750 machine_mode mode
= GET_MODE (target
);
6752 gcc_assert (eltmode
!= BLKmode
);
6754 /* Try using vec_duplicate_optab for uniform vectors. */
6755 if (!TREE_SIDE_EFFECTS (exp
)
6756 && VECTOR_MODE_P (mode
)
6757 && eltmode
== GET_MODE_INNER (mode
)
6758 && ((icode
= optab_handler (vec_duplicate_optab
, mode
))
6759 != CODE_FOR_nothing
)
6760 && (elt
= uniform_vector_p (exp
)))
6762 struct expand_operand ops
[2];
6763 create_output_operand (&ops
[0], target
, mode
);
6764 create_input_operand (&ops
[1], expand_normal (elt
), eltmode
);
6765 expand_insn (icode
, 2, ops
);
6766 if (!rtx_equal_p (target
, ops
[0].value
))
6767 emit_move_insn (target
, ops
[0].value
);
6771 n_elts
= TYPE_VECTOR_SUBPARTS (type
);
6773 && VECTOR_MODE_P (mode
)
6774 && n_elts
.is_constant (&const_n_elts
))
6776 machine_mode emode
= eltmode
;
6778 if (CONSTRUCTOR_NELTS (exp
)
6779 && (TREE_CODE (TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
))
6782 tree etype
= TREE_TYPE (CONSTRUCTOR_ELT (exp
, 0)->value
);
6783 gcc_assert (known_eq (CONSTRUCTOR_NELTS (exp
)
6784 * TYPE_VECTOR_SUBPARTS (etype
),
6786 emode
= TYPE_MODE (etype
);
6788 icode
= convert_optab_handler (vec_init_optab
, mode
, emode
);
6789 if (icode
!= CODE_FOR_nothing
)
6791 unsigned int i
, n
= const_n_elts
;
6793 if (emode
!= eltmode
)
6795 n
= CONSTRUCTOR_NELTS (exp
);
6796 vec_vec_init_p
= true;
6798 vector
= rtvec_alloc (n
);
6799 for (i
= 0; i
< n
; i
++)
6800 RTVEC_ELT (vector
, i
) = CONST0_RTX (emode
);
6804 /* If the constructor has fewer elements than the vector,
6805 clear the whole array first. Similarly if this is static
6806 constructor of a non-BLKmode object. */
6809 else if (REG_P (target
) && TREE_STATIC (exp
))
6813 unsigned HOST_WIDE_INT count
= 0, zero_count
= 0;
6816 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
6818 tree sz
= TYPE_SIZE (TREE_TYPE (value
));
6820 = tree_to_uhwi (int_const_binop (TRUNC_DIV_EXPR
, sz
,
6821 TYPE_SIZE (elttype
)));
6823 count
+= n_elts_here
;
6824 if (mostly_zeros_p (value
))
6825 zero_count
+= n_elts_here
;
6828 /* Clear the entire vector first if there are any missing elements,
6829 or if the incidence of zero elements is >= 75%. */
6830 need_to_clear
= (maybe_lt (count
, n_elts
)
6831 || 4 * zero_count
>= 3 * count
);
6834 if (need_to_clear
&& maybe_gt (size
, 0) && !vector
)
6837 emit_move_insn (target
, CONST0_RTX (mode
));
6839 clear_storage (target
, gen_int_mode (size
, Pmode
),
6844 /* Inform later passes that the old value is dead. */
6845 if (!cleared
&& !vector
&& REG_P (target
))
6846 emit_move_insn (target
, CONST0_RTX (mode
));
6849 alias
= MEM_ALIAS_SET (target
);
6851 alias
= get_alias_set (elttype
);
6853 /* Store each element of the constructor into the corresponding
6854 element of TARGET, determined by counting the elements. */
6855 for (idx
= 0, i
= 0;
6856 vec_safe_iterate (CONSTRUCTOR_ELTS (exp
), idx
, &ce
);
6857 idx
++, i
+= bitsize
/ elt_size
)
6859 HOST_WIDE_INT eltpos
;
6860 tree value
= ce
->value
;
6862 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (value
)));
6863 if (cleared
&& initializer_zerop (value
))
6867 eltpos
= tree_to_uhwi (ce
->index
);
6875 gcc_assert (ce
->index
== NULL_TREE
);
6876 gcc_assert (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
);
6880 gcc_assert (TREE_CODE (TREE_TYPE (value
)) != VECTOR_TYPE
);
6881 RTVEC_ELT (vector
, eltpos
) = expand_normal (value
);
6885 machine_mode value_mode
6886 = (TREE_CODE (TREE_TYPE (value
)) == VECTOR_TYPE
6887 ? TYPE_MODE (TREE_TYPE (value
)) : eltmode
);
6888 bitpos
= eltpos
* elt_size
;
6889 store_constructor_field (target
, bitsize
, bitpos
, 0,
6890 bitregion_end
, value_mode
,
6891 value
, cleared
, alias
, reverse
);
6896 emit_insn (GEN_FCN (icode
) (target
,
6897 gen_rtx_PARALLEL (mode
, vector
)));
6906 /* Store the value of EXP (an expression tree)
6907 into a subfield of TARGET which has mode MODE and occupies
6908 BITSIZE bits, starting BITPOS bits from the start of TARGET.
6909 If MODE is VOIDmode, it means that we are storing into a bit-field.
6911 BITREGION_START is bitpos of the first bitfield in this region.
6912 BITREGION_END is the bitpos of the ending bitfield in this region.
6913 These two fields are 0, if the C++ memory model does not apply,
6914 or we are not interested in keeping track of bitfield regions.
6916 Always return const0_rtx unless we have something particular to
6919 ALIAS_SET is the alias set for the destination. This value will
6920 (in general) be different from that for TARGET, since TARGET is a
6921 reference to the containing structure.
6923 If NONTEMPORAL is true, try generating a nontemporal store.
6925 If REVERSE is true, the store is to be done in reverse order. */
6928 store_field (rtx target
, poly_int64 bitsize
, poly_int64 bitpos
,
6929 poly_uint64 bitregion_start
, poly_uint64 bitregion_end
,
6930 machine_mode mode
, tree exp
,
6931 alias_set_type alias_set
, bool nontemporal
, bool reverse
)
6933 if (TREE_CODE (exp
) == ERROR_MARK
)
6936 /* If we have nothing to store, do nothing unless the expression has
6937 side-effects. Don't do that for zero sized addressable lhs of
6939 if (known_eq (bitsize
, 0)
6940 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6941 || TREE_CODE (exp
) != CALL_EXPR
))
6942 return expand_expr (exp
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
6944 if (GET_CODE (target
) == CONCAT
)
6946 /* We're storing into a struct containing a single __complex. */
6948 gcc_assert (known_eq (bitpos
, 0));
6949 return store_expr (exp
, target
, 0, nontemporal
, reverse
);
6952 /* If the structure is in a register or if the component
6953 is a bit field, we cannot use addressing to access it.
6954 Use bit-field techniques or SUBREG to store in it. */
6956 poly_int64 decl_bitsize
;
6957 if (mode
== VOIDmode
6958 || (mode
!= BLKmode
&& ! direct_store
[(int) mode
]
6959 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
6960 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
)
6962 || GET_CODE (target
) == SUBREG
6963 /* If the field isn't aligned enough to store as an ordinary memref,
6964 store it as a bit field. */
6966 && ((((MEM_ALIGN (target
) < GET_MODE_ALIGNMENT (mode
))
6967 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
6968 && targetm
.slow_unaligned_access (mode
, MEM_ALIGN (target
)))
6969 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
6970 || (known_size_p (bitsize
)
6972 && maybe_gt (GET_MODE_BITSIZE (mode
), bitsize
))
6973 /* If the RHS and field are a constant size and the size of the
6974 RHS isn't the same size as the bitfield, we must use bitfield
6976 || (known_size_p (bitsize
)
6977 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
6978 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
6980 /* Except for initialization of full bytes from a CONSTRUCTOR, which
6981 we will handle specially below. */
6982 && !(TREE_CODE (exp
) == CONSTRUCTOR
6983 && multiple_p (bitsize
, BITS_PER_UNIT
))
6984 /* And except for bitwise copying of TREE_ADDRESSABLE types,
6985 where the FIELD_DECL has the right bitsize, but TREE_TYPE (exp)
6986 includes some extra padding. store_expr / expand_expr will in
6987 that case call get_inner_reference that will have the bitsize
6988 we check here and thus the block move will not clobber the
6989 padding that shouldn't be clobbered. In the future we could
6990 replace the TREE_ADDRESSABLE check with a check that
6991 get_base_address needs to live in memory. */
6992 && (!TREE_ADDRESSABLE (TREE_TYPE (exp
))
6993 || TREE_CODE (exp
) != COMPONENT_REF
6994 || !multiple_p (bitsize
, BITS_PER_UNIT
)
6995 || !multiple_p (bitpos
, BITS_PER_UNIT
)
6996 || !poly_int_tree_p (DECL_SIZE (TREE_OPERAND (exp
, 1)),
6998 || maybe_ne (decl_bitsize
, bitsize
)))
6999 /* If we are expanding a MEM_REF of a non-BLKmode non-addressable
7000 decl we must use bitfield operations. */
7001 || (known_size_p (bitsize
)
7002 && TREE_CODE (exp
) == MEM_REF
7003 && TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
7004 && DECL_P (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7005 && !TREE_ADDRESSABLE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0))
7006 && DECL_MODE (TREE_OPERAND (TREE_OPERAND (exp
, 0), 0)) != BLKmode
))
7011 /* If EXP is a NOP_EXPR of precision less than its mode, then that
7012 implies a mask operation. If the precision is the same size as
7013 the field we're storing into, that mask is redundant. This is
7014 particularly common with bit field assignments generated by the
7016 nop_def
= get_def_for_expr (exp
, NOP_EXPR
);
7019 tree type
= TREE_TYPE (exp
);
7020 if (INTEGRAL_TYPE_P (type
)
7021 && maybe_ne (TYPE_PRECISION (type
),
7022 GET_MODE_BITSIZE (TYPE_MODE (type
)))
7023 && known_eq (bitsize
, TYPE_PRECISION (type
)))
7025 tree op
= gimple_assign_rhs1 (nop_def
);
7026 type
= TREE_TYPE (op
);
7027 if (INTEGRAL_TYPE_P (type
)
7028 && known_ge (TYPE_PRECISION (type
), bitsize
))
7033 temp
= expand_normal (exp
);
7035 /* We don't support variable-sized BLKmode bitfields, since our
7036 handling of BLKmode is bound up with the ability to break
7037 things into words. */
7038 gcc_assert (mode
!= BLKmode
|| bitsize
.is_constant ());
7040 /* Handle calls that return values in multiple non-contiguous locations.
7041 The Irix 6 ABI has examples of this. */
7042 if (GET_CODE (temp
) == PARALLEL
)
7044 HOST_WIDE_INT size
= int_size_in_bytes (TREE_TYPE (exp
));
7045 machine_mode temp_mode
= GET_MODE (temp
);
7046 if (temp_mode
== BLKmode
|| temp_mode
== VOIDmode
)
7047 temp_mode
= smallest_int_mode_for_size (size
* BITS_PER_UNIT
);
7048 rtx temp_target
= gen_reg_rtx (temp_mode
);
7049 emit_group_store (temp_target
, temp
, TREE_TYPE (exp
), size
);
7053 /* Handle calls that return BLKmode values in registers. */
7054 else if (mode
== BLKmode
&& REG_P (temp
) && TREE_CODE (exp
) == CALL_EXPR
)
7056 rtx temp_target
= gen_reg_rtx (GET_MODE (temp
));
7057 copy_blkmode_from_reg (temp_target
, temp
, TREE_TYPE (exp
));
7061 /* If the value has aggregate type and an integral mode then, if BITSIZE
7062 is narrower than this mode and this is for big-endian data, we first
7063 need to put the value into the low-order bits for store_bit_field,
7064 except when MODE is BLKmode and BITSIZE larger than the word size
7065 (see the handling of fields larger than a word in store_bit_field).
7066 Moreover, the field may be not aligned on a byte boundary; in this
7067 case, if it has reverse storage order, it needs to be accessed as a
7068 scalar field with reverse storage order and we must first put the
7069 value into target order. */
7070 scalar_int_mode temp_mode
;
7071 if (AGGREGATE_TYPE_P (TREE_TYPE (exp
))
7072 && is_int_mode (GET_MODE (temp
), &temp_mode
))
7074 HOST_WIDE_INT size
= GET_MODE_BITSIZE (temp_mode
);
7076 reverse
= TYPE_REVERSE_STORAGE_ORDER (TREE_TYPE (exp
));
7079 temp
= flip_storage_order (temp_mode
, temp
);
7081 gcc_checking_assert (known_le (bitsize
, size
));
7082 if (maybe_lt (bitsize
, size
)
7083 && reverse
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
7084 /* Use of to_constant for BLKmode was checked above. */
7085 && !(mode
== BLKmode
&& bitsize
.to_constant () > BITS_PER_WORD
))
7086 temp
= expand_shift (RSHIFT_EXPR
, temp_mode
, temp
,
7087 size
- bitsize
, NULL_RTX
, 1);
7090 /* Unless MODE is VOIDmode or BLKmode, convert TEMP to MODE. */
7091 if (mode
!= VOIDmode
&& mode
!= BLKmode
7092 && mode
!= TYPE_MODE (TREE_TYPE (exp
)))
7093 temp
= convert_modes (mode
, TYPE_MODE (TREE_TYPE (exp
)), temp
, 1);
7095 /* If the mode of TEMP and TARGET is BLKmode, both must be in memory
7096 and BITPOS must be aligned on a byte boundary. If so, we simply do
7097 a block copy. Likewise for a BLKmode-like TARGET. */
7098 if (GET_MODE (temp
) == BLKmode
7099 && (GET_MODE (target
) == BLKmode
7101 && GET_MODE_CLASS (GET_MODE (target
)) == MODE_INT
7102 && multiple_p (bitpos
, BITS_PER_UNIT
)
7103 && multiple_p (bitsize
, BITS_PER_UNIT
))))
7105 gcc_assert (MEM_P (target
) && MEM_P (temp
));
7106 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
7107 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
7109 target
= adjust_address (target
, VOIDmode
, bytepos
);
7110 emit_block_move (target
, temp
,
7111 gen_int_mode (bytesize
, Pmode
),
7117 /* If the mode of TEMP is still BLKmode and BITSIZE not larger than the
7118 word size, we need to load the value (see again store_bit_field). */
7119 if (GET_MODE (temp
) == BLKmode
&& known_le (bitsize
, BITS_PER_WORD
))
7121 scalar_int_mode temp_mode
= smallest_int_mode_for_size (bitsize
);
7122 temp
= extract_bit_field (temp
, bitsize
, 0, 1, NULL_RTX
, temp_mode
,
7123 temp_mode
, false, NULL
);
7126 /* Store the value in the bitfield. */
7127 gcc_checking_assert (known_ge (bitpos
, 0));
7128 store_bit_field (target
, bitsize
, bitpos
,
7129 bitregion_start
, bitregion_end
,
7130 mode
, temp
, reverse
);
7136 /* Now build a reference to just the desired component. */
7137 rtx to_rtx
= adjust_address (target
, mode
,
7138 exact_div (bitpos
, BITS_PER_UNIT
));
7140 if (to_rtx
== target
)
7141 to_rtx
= copy_rtx (to_rtx
);
7143 if (!MEM_KEEP_ALIAS_SET_P (to_rtx
) && MEM_ALIAS_SET (to_rtx
) != 0)
7144 set_mem_alias_set (to_rtx
, alias_set
);
7146 /* Above we avoided using bitfield operations for storing a CONSTRUCTOR
7147 into a target smaller than its type; handle that case now. */
7148 if (TREE_CODE (exp
) == CONSTRUCTOR
&& known_size_p (bitsize
))
7150 poly_int64 bytesize
= exact_div (bitsize
, BITS_PER_UNIT
);
7151 store_constructor (exp
, to_rtx
, 0, bytesize
, reverse
);
7155 return store_expr (exp
, to_rtx
, 0, nontemporal
, reverse
);
7159 /* Given an expression EXP that may be a COMPONENT_REF, a BIT_FIELD_REF,
7160 an ARRAY_REF, or an ARRAY_RANGE_REF, look for nested operations of these
7161 codes and find the ultimate containing object, which we return.
7163 We set *PBITSIZE to the size in bits that we want, *PBITPOS to the
7164 bit position, *PUNSIGNEDP to the signedness and *PREVERSEP to the
7165 storage order of the field.
7166 If the position of the field is variable, we store a tree
7167 giving the variable offset (in units) in *POFFSET.
7168 This offset is in addition to the bit position.
7169 If the position is not variable, we store 0 in *POFFSET.
7171 If any of the extraction expressions is volatile,
7172 we store 1 in *PVOLATILEP. Otherwise we don't change that.
7174 If the field is a non-BLKmode bit-field, *PMODE is set to VOIDmode.
7175 Otherwise, it is a mode that can be used to access the field.
7177 If the field describes a variable-sized object, *PMODE is set to
7178 BLKmode and *PBITSIZE is set to -1. An access cannot be made in
7179 this case, but the address of the object can be found. */
7182 get_inner_reference (tree exp
, poly_int64_pod
*pbitsize
,
7183 poly_int64_pod
*pbitpos
, tree
*poffset
,
7184 machine_mode
*pmode
, int *punsignedp
,
7185 int *preversep
, int *pvolatilep
)
7188 machine_mode mode
= VOIDmode
;
7189 bool blkmode_bitfield
= false;
7190 tree offset
= size_zero_node
;
7191 poly_offset_int bit_offset
= 0;
7193 /* First get the mode, signedness, storage order and size. We do this from
7194 just the outermost expression. */
7196 if (TREE_CODE (exp
) == COMPONENT_REF
)
7198 tree field
= TREE_OPERAND (exp
, 1);
7199 size_tree
= DECL_SIZE (field
);
7200 if (flag_strict_volatile_bitfields
> 0
7201 && TREE_THIS_VOLATILE (exp
)
7202 && DECL_BIT_FIELD_TYPE (field
)
7203 && DECL_MODE (field
) != BLKmode
)
7204 /* Volatile bitfields should be accessed in the mode of the
7205 field's type, not the mode computed based on the bit
7207 mode
= TYPE_MODE (DECL_BIT_FIELD_TYPE (field
));
7208 else if (!DECL_BIT_FIELD (field
))
7210 mode
= DECL_MODE (field
);
7211 /* For vector fields re-check the target flags, as DECL_MODE
7212 could have been set with different target flags than
7213 the current function has. */
7215 && VECTOR_TYPE_P (TREE_TYPE (field
))
7216 && VECTOR_MODE_P (TYPE_MODE_RAW (TREE_TYPE (field
))))
7217 mode
= TYPE_MODE (TREE_TYPE (field
));
7219 else if (DECL_MODE (field
) == BLKmode
)
7220 blkmode_bitfield
= true;
7222 *punsignedp
= DECL_UNSIGNED (field
);
7224 else if (TREE_CODE (exp
) == BIT_FIELD_REF
)
7226 size_tree
= TREE_OPERAND (exp
, 1);
7227 *punsignedp
= (! INTEGRAL_TYPE_P (TREE_TYPE (exp
))
7228 || TYPE_UNSIGNED (TREE_TYPE (exp
)));
7230 /* For vector types, with the correct size of access, use the mode of
7232 if (TREE_CODE (TREE_TYPE (TREE_OPERAND (exp
, 0))) == VECTOR_TYPE
7233 && TREE_TYPE (exp
) == TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0)))
7234 && tree_int_cst_equal (size_tree
, TYPE_SIZE (TREE_TYPE (exp
))))
7235 mode
= TYPE_MODE (TREE_TYPE (exp
));
7239 mode
= TYPE_MODE (TREE_TYPE (exp
));
7240 *punsignedp
= TYPE_UNSIGNED (TREE_TYPE (exp
));
7242 if (mode
== BLKmode
)
7243 size_tree
= TYPE_SIZE (TREE_TYPE (exp
));
7245 *pbitsize
= GET_MODE_BITSIZE (mode
);
7250 if (! tree_fits_uhwi_p (size_tree
))
7251 mode
= BLKmode
, *pbitsize
= -1;
7253 *pbitsize
= tree_to_uhwi (size_tree
);
7256 *preversep
= reverse_storage_order_for_component_p (exp
);
7258 /* Compute cumulative bit-offset for nested component-refs and array-refs,
7259 and find the ultimate containing object. */
7262 switch (TREE_CODE (exp
))
7265 bit_offset
+= wi::to_poly_offset (TREE_OPERAND (exp
, 2));
7270 tree field
= TREE_OPERAND (exp
, 1);
7271 tree this_offset
= component_ref_field_offset (exp
);
7273 /* If this field hasn't been filled in yet, don't go past it.
7274 This should only happen when folding expressions made during
7275 type construction. */
7276 if (this_offset
== 0)
7279 offset
= size_binop (PLUS_EXPR
, offset
, this_offset
);
7280 bit_offset
+= wi::to_poly_offset (DECL_FIELD_BIT_OFFSET (field
));
7282 /* ??? Right now we don't do anything with DECL_OFFSET_ALIGN. */
7287 case ARRAY_RANGE_REF
:
7289 tree index
= TREE_OPERAND (exp
, 1);
7290 tree low_bound
= array_ref_low_bound (exp
);
7291 tree unit_size
= array_ref_element_size (exp
);
7293 /* We assume all arrays have sizes that are a multiple of a byte.
7294 First subtract the lower bound, if any, in the type of the
7295 index, then convert to sizetype and multiply by the size of
7296 the array element. */
7297 if (! integer_zerop (low_bound
))
7298 index
= fold_build2 (MINUS_EXPR
, TREE_TYPE (index
),
7301 offset
= size_binop (PLUS_EXPR
, offset
,
7302 size_binop (MULT_EXPR
,
7303 fold_convert (sizetype
, index
),
7312 bit_offset
+= *pbitsize
;
7315 case VIEW_CONVERT_EXPR
:
7319 /* Hand back the decl for MEM[&decl, off]. */
7320 if (TREE_CODE (TREE_OPERAND (exp
, 0)) == ADDR_EXPR
)
7322 tree off
= TREE_OPERAND (exp
, 1);
7323 if (!integer_zerop (off
))
7325 poly_offset_int boff
= mem_ref_offset (exp
);
7326 boff
<<= LOG2_BITS_PER_UNIT
;
7329 exp
= TREE_OPERAND (TREE_OPERAND (exp
, 0), 0);
7337 /* If any reference in the chain is volatile, the effect is volatile. */
7338 if (TREE_THIS_VOLATILE (exp
))
7341 exp
= TREE_OPERAND (exp
, 0);
7345 /* If OFFSET is constant, see if we can return the whole thing as a
7346 constant bit position. Make sure to handle overflow during
7348 if (poly_int_tree_p (offset
))
7350 poly_offset_int tem
= wi::sext (wi::to_poly_offset (offset
),
7351 TYPE_PRECISION (sizetype
));
7352 tem
<<= LOG2_BITS_PER_UNIT
;
7354 if (tem
.to_shwi (pbitpos
))
7355 *poffset
= offset
= NULL_TREE
;
7358 /* Otherwise, split it up. */
7361 /* Avoid returning a negative bitpos as this may wreak havoc later. */
7362 if (!bit_offset
.to_shwi (pbitpos
) || maybe_lt (*pbitpos
, 0))
7364 *pbitpos
= num_trailing_bits (bit_offset
.force_shwi ());
7365 poly_offset_int bytes
= bits_to_bytes_round_down (bit_offset
);
7366 offset
= size_binop (PLUS_EXPR
, offset
,
7367 build_int_cst (sizetype
, bytes
.force_shwi ()));
7373 /* We can use BLKmode for a byte-aligned BLKmode bitfield. */
7374 if (mode
== VOIDmode
7376 && multiple_p (*pbitpos
, BITS_PER_UNIT
)
7377 && multiple_p (*pbitsize
, BITS_PER_UNIT
))
7385 /* Alignment in bits the TARGET of an assignment may be assumed to have. */
7387 static unsigned HOST_WIDE_INT
7388 target_align (const_tree target
)
7390 /* We might have a chain of nested references with intermediate misaligning
7391 bitfields components, so need to recurse to find out. */
7393 unsigned HOST_WIDE_INT this_align
, outer_align
;
7395 switch (TREE_CODE (target
))
7401 this_align
= DECL_ALIGN (TREE_OPERAND (target
, 1));
7402 outer_align
= target_align (TREE_OPERAND (target
, 0));
7403 return MIN (this_align
, outer_align
);
7406 case ARRAY_RANGE_REF
:
7407 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7408 outer_align
= target_align (TREE_OPERAND (target
, 0));
7409 return MIN (this_align
, outer_align
);
7412 case NON_LVALUE_EXPR
:
7413 case VIEW_CONVERT_EXPR
:
7414 this_align
= TYPE_ALIGN (TREE_TYPE (target
));
7415 outer_align
= target_align (TREE_OPERAND (target
, 0));
7416 return MAX (this_align
, outer_align
);
7419 return TYPE_ALIGN (TREE_TYPE (target
));
7424 /* Given an rtx VALUE that may contain additions and multiplications, return
7425 an equivalent value that just refers to a register, memory, or constant.
7426 This is done by generating instructions to perform the arithmetic and
7427 returning a pseudo-register containing the value.
7429 The returned value may be a REG, SUBREG, MEM or constant. */
7432 force_operand (rtx value
, rtx target
)
7435 /* Use subtarget as the target for operand 0 of a binary operation. */
7436 rtx subtarget
= get_subtarget (target
);
7437 enum rtx_code code
= GET_CODE (value
);
7439 /* Check for subreg applied to an expression produced by loop optimizer. */
7441 && !REG_P (SUBREG_REG (value
))
7442 && !MEM_P (SUBREG_REG (value
)))
7445 = simplify_gen_subreg (GET_MODE (value
),
7446 force_reg (GET_MODE (SUBREG_REG (value
)),
7447 force_operand (SUBREG_REG (value
),
7449 GET_MODE (SUBREG_REG (value
)),
7450 SUBREG_BYTE (value
));
7451 code
= GET_CODE (value
);
7454 /* Check for a PIC address load. */
7455 if ((code
== PLUS
|| code
== MINUS
)
7456 && XEXP (value
, 0) == pic_offset_table_rtx
7457 && (GET_CODE (XEXP (value
, 1)) == SYMBOL_REF
7458 || GET_CODE (XEXP (value
, 1)) == LABEL_REF
7459 || GET_CODE (XEXP (value
, 1)) == CONST
))
7462 subtarget
= gen_reg_rtx (GET_MODE (value
));
7463 emit_move_insn (subtarget
, value
);
7467 if (ARITHMETIC_P (value
))
7469 op2
= XEXP (value
, 1);
7470 if (!CONSTANT_P (op2
) && !(REG_P (op2
) && op2
!= subtarget
))
7472 if (code
== MINUS
&& CONST_INT_P (op2
))
7475 op2
= negate_rtx (GET_MODE (value
), op2
);
7478 /* Check for an addition with OP2 a constant integer and our first
7479 operand a PLUS of a virtual register and something else. In that
7480 case, we want to emit the sum of the virtual register and the
7481 constant first and then add the other value. This allows virtual
7482 register instantiation to simply modify the constant rather than
7483 creating another one around this addition. */
7484 if (code
== PLUS
&& CONST_INT_P (op2
)
7485 && GET_CODE (XEXP (value
, 0)) == PLUS
7486 && REG_P (XEXP (XEXP (value
, 0), 0))
7487 && REGNO (XEXP (XEXP (value
, 0), 0)) >= FIRST_VIRTUAL_REGISTER
7488 && REGNO (XEXP (XEXP (value
, 0), 0)) <= LAST_VIRTUAL_REGISTER
)
7490 rtx temp
= expand_simple_binop (GET_MODE (value
), code
,
7491 XEXP (XEXP (value
, 0), 0), op2
,
7492 subtarget
, 0, OPTAB_LIB_WIDEN
);
7493 return expand_simple_binop (GET_MODE (value
), code
, temp
,
7494 force_operand (XEXP (XEXP (value
,
7496 target
, 0, OPTAB_LIB_WIDEN
);
7499 op1
= force_operand (XEXP (value
, 0), subtarget
);
7500 op2
= force_operand (op2
, NULL_RTX
);
7504 return expand_mult (GET_MODE (value
), op1
, op2
, target
, 1);
7506 if (!INTEGRAL_MODE_P (GET_MODE (value
)))
7507 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7508 target
, 1, OPTAB_LIB_WIDEN
);
7510 return expand_divmod (0,
7511 FLOAT_MODE_P (GET_MODE (value
))
7512 ? RDIV_EXPR
: TRUNC_DIV_EXPR
,
7513 GET_MODE (value
), op1
, op2
, target
, 0);
7515 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7518 return expand_divmod (0, TRUNC_DIV_EXPR
, GET_MODE (value
), op1
, op2
,
7521 return expand_divmod (1, TRUNC_MOD_EXPR
, GET_MODE (value
), op1
, op2
,
7524 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7525 target
, 0, OPTAB_LIB_WIDEN
);
7527 return expand_simple_binop (GET_MODE (value
), code
, op1
, op2
,
7528 target
, 1, OPTAB_LIB_WIDEN
);
7531 if (UNARY_P (value
))
7534 target
= gen_reg_rtx (GET_MODE (value
));
7535 op1
= force_operand (XEXP (value
, 0), NULL_RTX
);
7542 case FLOAT_TRUNCATE
:
7543 convert_move (target
, op1
, code
== ZERO_EXTEND
);
7548 expand_fix (target
, op1
, code
== UNSIGNED_FIX
);
7552 case UNSIGNED_FLOAT
:
7553 expand_float (target
, op1
, code
== UNSIGNED_FLOAT
);
7557 return expand_simple_unop (GET_MODE (value
), code
, op1
, target
, 0);
7561 #ifdef INSN_SCHEDULING
7562 /* On machines that have insn scheduling, we want all memory reference to be
7563 explicit, so we need to deal with such paradoxical SUBREGs. */
7564 if (paradoxical_subreg_p (value
) && MEM_P (SUBREG_REG (value
)))
7566 = simplify_gen_subreg (GET_MODE (value
),
7567 force_reg (GET_MODE (SUBREG_REG (value
)),
7568 force_operand (SUBREG_REG (value
),
7570 GET_MODE (SUBREG_REG (value
)),
7571 SUBREG_BYTE (value
));
7577 /* Subroutine of expand_expr: return nonzero iff there is no way that
7578 EXP can reference X, which is being modified. TOP_P is nonzero if this
7579 call is going to be used to determine whether we need a temporary
7580 for EXP, as opposed to a recursive call to this function.
7582 It is always safe for this routine to return zero since it merely
7583 searches for optimization opportunities. */
7586 safe_from_p (const_rtx x
, tree exp
, int top_p
)
7592 /* If EXP has varying size, we MUST use a target since we currently
7593 have no way of allocating temporaries of variable size
7594 (except for arrays that have TYPE_ARRAY_MAX_SIZE set).
7595 So we assume here that something at a higher level has prevented a
7596 clash. This is somewhat bogus, but the best we can do. Only
7597 do this when X is BLKmode and when we are at the top level. */
7598 || (top_p
&& TREE_TYPE (exp
) != 0 && COMPLETE_TYPE_P (TREE_TYPE (exp
))
7599 && TREE_CODE (TYPE_SIZE (TREE_TYPE (exp
))) != INTEGER_CST
7600 && (TREE_CODE (TREE_TYPE (exp
)) != ARRAY_TYPE
7601 || TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)) == NULL_TREE
7602 || TREE_CODE (TYPE_ARRAY_MAX_SIZE (TREE_TYPE (exp
)))
7604 && GET_MODE (x
) == BLKmode
)
7605 /* If X is in the outgoing argument area, it is always safe. */
7607 && (XEXP (x
, 0) == virtual_outgoing_args_rtx
7608 || (GET_CODE (XEXP (x
, 0)) == PLUS
7609 && XEXP (XEXP (x
, 0), 0) == virtual_outgoing_args_rtx
))))
7612 /* If this is a subreg of a hard register, declare it unsafe, otherwise,
7613 find the underlying pseudo. */
7614 if (GET_CODE (x
) == SUBREG
)
7617 if (REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7621 /* Now look at our tree code and possibly recurse. */
7622 switch (TREE_CODE_CLASS (TREE_CODE (exp
)))
7624 case tcc_declaration
:
7625 exp_rtl
= DECL_RTL_IF_SET (exp
);
7631 case tcc_exceptional
:
7632 if (TREE_CODE (exp
) == TREE_LIST
)
7636 if (TREE_VALUE (exp
) && !safe_from_p (x
, TREE_VALUE (exp
), 0))
7638 exp
= TREE_CHAIN (exp
);
7641 if (TREE_CODE (exp
) != TREE_LIST
)
7642 return safe_from_p (x
, exp
, 0);
7645 else if (TREE_CODE (exp
) == CONSTRUCTOR
)
7647 constructor_elt
*ce
;
7648 unsigned HOST_WIDE_INT idx
;
7650 FOR_EACH_VEC_SAFE_ELT (CONSTRUCTOR_ELTS (exp
), idx
, ce
)
7651 if ((ce
->index
!= NULL_TREE
&& !safe_from_p (x
, ce
->index
, 0))
7652 || !safe_from_p (x
, ce
->value
, 0))
7656 else if (TREE_CODE (exp
) == ERROR_MARK
)
7657 return 1; /* An already-visited SAVE_EXPR? */
7662 /* The only case we look at here is the DECL_INITIAL inside a
7664 return (TREE_CODE (exp
) != DECL_EXPR
7665 || TREE_CODE (DECL_EXPR_DECL (exp
)) != VAR_DECL
7666 || !DECL_INITIAL (DECL_EXPR_DECL (exp
))
7667 || safe_from_p (x
, DECL_INITIAL (DECL_EXPR_DECL (exp
)), 0));
7670 case tcc_comparison
:
7671 if (!safe_from_p (x
, TREE_OPERAND (exp
, 1), 0))
7676 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7678 case tcc_expression
:
7681 /* Now do code-specific tests. EXP_RTL is set to any rtx we find in
7682 the expression. If it is set, we conflict iff we are that rtx or
7683 both are in memory. Otherwise, we check all operands of the
7684 expression recursively. */
7686 switch (TREE_CODE (exp
))
7689 /* If the operand is static or we are static, we can't conflict.
7690 Likewise if we don't conflict with the operand at all. */
7691 if (staticp (TREE_OPERAND (exp
, 0))
7692 || TREE_STATIC (exp
)
7693 || safe_from_p (x
, TREE_OPERAND (exp
, 0), 0))
7696 /* Otherwise, the only way this can conflict is if we are taking
7697 the address of a DECL a that address if part of X, which is
7699 exp
= TREE_OPERAND (exp
, 0);
7702 if (!DECL_RTL_SET_P (exp
)
7703 || !MEM_P (DECL_RTL (exp
)))
7706 exp_rtl
= XEXP (DECL_RTL (exp
), 0);
7712 && alias_sets_conflict_p (MEM_ALIAS_SET (x
),
7713 get_alias_set (exp
)))
7718 /* Assume that the call will clobber all hard registers and
7720 if ((REG_P (x
) && REGNO (x
) < FIRST_PSEUDO_REGISTER
)
7725 case WITH_CLEANUP_EXPR
:
7726 case CLEANUP_POINT_EXPR
:
7727 /* Lowered by gimplify.c. */
7731 return safe_from_p (x
, TREE_OPERAND (exp
, 0), 0);
7737 /* If we have an rtx, we do not need to scan our operands. */
7741 nops
= TREE_OPERAND_LENGTH (exp
);
7742 for (i
= 0; i
< nops
; i
++)
7743 if (TREE_OPERAND (exp
, i
) != 0
7744 && ! safe_from_p (x
, TREE_OPERAND (exp
, i
), 0))
7750 /* Should never get a type here. */
7754 /* If we have an rtl, find any enclosed object. Then see if we conflict
7758 if (GET_CODE (exp_rtl
) == SUBREG
)
7760 exp_rtl
= SUBREG_REG (exp_rtl
);
7762 && REGNO (exp_rtl
) < FIRST_PSEUDO_REGISTER
)
7766 /* If the rtl is X, then it is not safe. Otherwise, it is unless both
7767 are memory and they conflict. */
7768 return ! (rtx_equal_p (x
, exp_rtl
)
7769 || (MEM_P (x
) && MEM_P (exp_rtl
)
7770 && true_dependence (exp_rtl
, VOIDmode
, x
)));
7773 /* If we reach here, it is safe. */
7778 /* Return the highest power of two that EXP is known to be a multiple of.
7779 This is used in updating alignment of MEMs in array references. */
7781 unsigned HOST_WIDE_INT
7782 highest_pow2_factor (const_tree exp
)
7784 unsigned HOST_WIDE_INT ret
;
7785 int trailing_zeros
= tree_ctz (exp
);
7786 if (trailing_zeros
>= HOST_BITS_PER_WIDE_INT
)
7787 return BIGGEST_ALIGNMENT
;
7788 ret
= HOST_WIDE_INT_1U
<< trailing_zeros
;
7789 if (ret
> BIGGEST_ALIGNMENT
)
7790 return BIGGEST_ALIGNMENT
;
7794 /* Similar, except that the alignment requirements of TARGET are
7795 taken into account. Assume it is at least as aligned as its
7796 type, unless it is a COMPONENT_REF in which case the layout of
7797 the structure gives the alignment. */
7799 static unsigned HOST_WIDE_INT
7800 highest_pow2_factor_for_target (const_tree target
, const_tree exp
)
7802 unsigned HOST_WIDE_INT talign
= target_align (target
) / BITS_PER_UNIT
;
7803 unsigned HOST_WIDE_INT factor
= highest_pow2_factor (exp
);
7805 return MAX (factor
, talign
);
7808 /* Convert the tree comparison code TCODE to the rtl one where the
7809 signedness is UNSIGNEDP. */
7811 static enum rtx_code
7812 convert_tree_comp_to_rtx (enum tree_code tcode
, int unsignedp
)
7824 code
= unsignedp
? LTU
: LT
;
7827 code
= unsignedp
? LEU
: LE
;
7830 code
= unsignedp
? GTU
: GT
;
7833 code
= unsignedp
? GEU
: GE
;
7835 case UNORDERED_EXPR
:
7866 /* Subroutine of expand_expr. Expand the two operands of a binary
7867 expression EXP0 and EXP1 placing the results in OP0 and OP1.
7868 The value may be stored in TARGET if TARGET is nonzero. The
7869 MODIFIER argument is as documented by expand_expr. */
7872 expand_operands (tree exp0
, tree exp1
, rtx target
, rtx
*op0
, rtx
*op1
,
7873 enum expand_modifier modifier
)
7875 if (! safe_from_p (target
, exp1
, 1))
7877 if (operand_equal_p (exp0
, exp1
, 0))
7879 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7880 *op1
= copy_rtx (*op0
);
7884 *op0
= expand_expr (exp0
, target
, VOIDmode
, modifier
);
7885 *op1
= expand_expr (exp1
, NULL_RTX
, VOIDmode
, modifier
);
7890 /* Return a MEM that contains constant EXP. DEFER is as for
7891 output_constant_def and MODIFIER is as for expand_expr. */
7894 expand_expr_constant (tree exp
, int defer
, enum expand_modifier modifier
)
7898 mem
= output_constant_def (exp
, defer
);
7899 if (modifier
!= EXPAND_INITIALIZER
)
7900 mem
= use_anchored_address (mem
);
7904 /* A subroutine of expand_expr_addr_expr. Evaluate the address of EXP.
7905 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
7908 expand_expr_addr_expr_1 (tree exp
, rtx target
, scalar_int_mode tmode
,
7909 enum expand_modifier modifier
, addr_space_t as
)
7911 rtx result
, subtarget
;
7913 poly_int64 bitsize
, bitpos
;
7914 int unsignedp
, reversep
, volatilep
= 0;
7917 /* If we are taking the address of a constant and are at the top level,
7918 we have to use output_constant_def since we can't call force_const_mem
7920 /* ??? This should be considered a front-end bug. We should not be
7921 generating ADDR_EXPR of something that isn't an LVALUE. The only
7922 exception here is STRING_CST. */
7923 if (CONSTANT_CLASS_P (exp
))
7925 result
= XEXP (expand_expr_constant (exp
, 0, modifier
), 0);
7926 if (modifier
< EXPAND_SUM
)
7927 result
= force_operand (result
, target
);
7931 /* Everything must be something allowed by is_gimple_addressable. */
7932 switch (TREE_CODE (exp
))
7935 /* This case will happen via recursion for &a->b. */
7936 return expand_expr (TREE_OPERAND (exp
, 0), target
, tmode
, modifier
);
7940 tree tem
= TREE_OPERAND (exp
, 0);
7941 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
7942 tem
= fold_build_pointer_plus (tem
, TREE_OPERAND (exp
, 1));
7943 return expand_expr (tem
, target
, tmode
, modifier
);
7946 case TARGET_MEM_REF
:
7947 return addr_for_mem_ref (exp
, as
, true);
7950 /* Expand the initializer like constants above. */
7951 result
= XEXP (expand_expr_constant (DECL_INITIAL (exp
),
7953 if (modifier
< EXPAND_SUM
)
7954 result
= force_operand (result
, target
);
7958 /* The real part of the complex number is always first, therefore
7959 the address is the same as the address of the parent object. */
7962 inner
= TREE_OPERAND (exp
, 0);
7966 /* The imaginary part of the complex number is always second.
7967 The expression is therefore always offset by the size of the
7970 bitpos
= GET_MODE_BITSIZE (SCALAR_TYPE_MODE (TREE_TYPE (exp
)));
7971 inner
= TREE_OPERAND (exp
, 0);
7974 case COMPOUND_LITERAL_EXPR
:
7975 /* Allow COMPOUND_LITERAL_EXPR in initializers or coming from
7976 initializers, if e.g. rtl_for_decl_init is called on DECL_INITIAL
7977 with COMPOUND_LITERAL_EXPRs in it, or ARRAY_REF on a const static
7978 array with address of COMPOUND_LITERAL_EXPR in DECL_INITIAL;
7979 the initializers aren't gimplified. */
7980 if (COMPOUND_LITERAL_EXPR_DECL (exp
)
7981 && TREE_STATIC (COMPOUND_LITERAL_EXPR_DECL (exp
)))
7982 return expand_expr_addr_expr_1 (COMPOUND_LITERAL_EXPR_DECL (exp
),
7983 target
, tmode
, modifier
, as
);
7986 /* If the object is a DECL, then expand it for its rtl. Don't bypass
7987 expand_expr, as that can have various side effects; LABEL_DECLs for
7988 example, may not have their DECL_RTL set yet. Expand the rtl of
7989 CONSTRUCTORs too, which should yield a memory reference for the
7990 constructor's contents. Assume language specific tree nodes can
7991 be expanded in some interesting way. */
7992 gcc_assert (TREE_CODE (exp
) < LAST_AND_UNUSED_TREE_CODE
);
7994 || TREE_CODE (exp
) == CONSTRUCTOR
7995 || TREE_CODE (exp
) == COMPOUND_LITERAL_EXPR
)
7997 result
= expand_expr (exp
, target
, tmode
,
7998 modifier
== EXPAND_INITIALIZER
7999 ? EXPAND_INITIALIZER
: EXPAND_CONST_ADDRESS
);
8001 /* If the DECL isn't in memory, then the DECL wasn't properly
8002 marked TREE_ADDRESSABLE, which will be either a front-end
8003 or a tree optimizer bug. */
8005 gcc_assert (MEM_P (result
));
8006 result
= XEXP (result
, 0);
8008 /* ??? Is this needed anymore? */
8010 TREE_USED (exp
) = 1;
8012 if (modifier
!= EXPAND_INITIALIZER
8013 && modifier
!= EXPAND_CONST_ADDRESS
8014 && modifier
!= EXPAND_SUM
)
8015 result
= force_operand (result
, target
);
8019 /* Pass FALSE as the last argument to get_inner_reference although
8020 we are expanding to RTL. The rationale is that we know how to
8021 handle "aligning nodes" here: we can just bypass them because
8022 they won't change the final object whose address will be returned
8023 (they actually exist only for that purpose). */
8024 inner
= get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
8025 &unsignedp
, &reversep
, &volatilep
);
8029 /* We must have made progress. */
8030 gcc_assert (inner
!= exp
);
8032 subtarget
= offset
|| maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8033 /* For VIEW_CONVERT_EXPR, where the outer alignment is bigger than
8034 inner alignment, force the inner to be sufficiently aligned. */
8035 if (CONSTANT_CLASS_P (inner
)
8036 && TYPE_ALIGN (TREE_TYPE (inner
)) < TYPE_ALIGN (TREE_TYPE (exp
)))
8038 inner
= copy_node (inner
);
8039 TREE_TYPE (inner
) = copy_node (TREE_TYPE (inner
));
8040 SET_TYPE_ALIGN (TREE_TYPE (inner
), TYPE_ALIGN (TREE_TYPE (exp
)));
8041 TYPE_USER_ALIGN (TREE_TYPE (inner
)) = 1;
8043 result
= expand_expr_addr_expr_1 (inner
, subtarget
, tmode
, modifier
, as
);
8049 if (modifier
!= EXPAND_NORMAL
)
8050 result
= force_operand (result
, NULL
);
8051 tmp
= expand_expr (offset
, NULL_RTX
, tmode
,
8052 modifier
== EXPAND_INITIALIZER
8053 ? EXPAND_INITIALIZER
: EXPAND_NORMAL
);
8055 /* expand_expr is allowed to return an object in a mode other
8056 than TMODE. If it did, we need to convert. */
8057 if (GET_MODE (tmp
) != VOIDmode
&& tmode
!= GET_MODE (tmp
))
8058 tmp
= convert_modes (tmode
, GET_MODE (tmp
),
8059 tmp
, TYPE_UNSIGNED (TREE_TYPE (offset
)));
8060 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8061 tmp
= convert_memory_address_addr_space (tmode
, tmp
, as
);
8063 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8064 result
= simplify_gen_binary (PLUS
, tmode
, result
, tmp
);
8067 subtarget
= maybe_ne (bitpos
, 0) ? NULL_RTX
: target
;
8068 result
= expand_simple_binop (tmode
, PLUS
, result
, tmp
, subtarget
,
8069 1, OPTAB_LIB_WIDEN
);
8073 if (maybe_ne (bitpos
, 0))
8075 /* Someone beforehand should have rejected taking the address
8076 of an object that isn't byte-aligned. */
8077 poly_int64 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
8078 result
= convert_memory_address_addr_space (tmode
, result
, as
);
8079 result
= plus_constant (tmode
, result
, bytepos
);
8080 if (modifier
< EXPAND_SUM
)
8081 result
= force_operand (result
, target
);
8087 /* A subroutine of expand_expr. Evaluate EXP, which is an ADDR_EXPR.
8088 The TARGET, TMODE and MODIFIER arguments are as for expand_expr. */
8091 expand_expr_addr_expr (tree exp
, rtx target
, machine_mode tmode
,
8092 enum expand_modifier modifier
)
8094 addr_space_t as
= ADDR_SPACE_GENERIC
;
8095 scalar_int_mode address_mode
= Pmode
;
8096 scalar_int_mode pointer_mode
= ptr_mode
;
8100 /* Target mode of VOIDmode says "whatever's natural". */
8101 if (tmode
== VOIDmode
)
8102 tmode
= TYPE_MODE (TREE_TYPE (exp
));
8104 if (POINTER_TYPE_P (TREE_TYPE (exp
)))
8106 as
= TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (exp
)));
8107 address_mode
= targetm
.addr_space
.address_mode (as
);
8108 pointer_mode
= targetm
.addr_space
.pointer_mode (as
);
8111 /* We can get called with some Weird Things if the user does silliness
8112 like "(short) &a". In that case, convert_memory_address won't do
8113 the right thing, so ignore the given target mode. */
8114 scalar_int_mode new_tmode
= (tmode
== pointer_mode
8118 result
= expand_expr_addr_expr_1 (TREE_OPERAND (exp
, 0), target
,
8119 new_tmode
, modifier
, as
);
8121 /* Despite expand_expr claims concerning ignoring TMODE when not
8122 strictly convenient, stuff breaks if we don't honor it. Note
8123 that combined with the above, we only do this for pointer modes. */
8124 rmode
= GET_MODE (result
);
8125 if (rmode
== VOIDmode
)
8127 if (rmode
!= new_tmode
)
8128 result
= convert_memory_address_addr_space (new_tmode
, result
, as
);
8133 /* Generate code for computing CONSTRUCTOR EXP.
8134 An rtx for the computed value is returned. If AVOID_TEMP_MEM
8135 is TRUE, instead of creating a temporary variable in memory
8136 NULL is returned and the caller needs to handle it differently. */
8139 expand_constructor (tree exp
, rtx target
, enum expand_modifier modifier
,
8140 bool avoid_temp_mem
)
8142 tree type
= TREE_TYPE (exp
);
8143 machine_mode mode
= TYPE_MODE (type
);
8145 /* Try to avoid creating a temporary at all. This is possible
8146 if all of the initializer is zero.
8147 FIXME: try to handle all [0..255] initializers we can handle
8149 if (TREE_STATIC (exp
)
8150 && !TREE_ADDRESSABLE (exp
)
8151 && target
!= 0 && mode
== BLKmode
8152 && all_zeros_p (exp
))
8154 clear_storage (target
, expr_size (exp
), BLOCK_OP_NORMAL
);
8158 /* All elts simple constants => refer to a constant in memory. But
8159 if this is a non-BLKmode mode, let it store a field at a time
8160 since that should make a CONST_INT, CONST_WIDE_INT or
8161 CONST_DOUBLE when we fold. Likewise, if we have a target we can
8162 use, it is best to store directly into the target unless the type
8163 is large enough that memcpy will be used. If we are making an
8164 initializer and all operands are constant, put it in memory as
8167 FIXME: Avoid trying to fill vector constructors piece-meal.
8168 Output them with output_constant_def below unless we're sure
8169 they're zeros. This should go away when vector initializers
8170 are treated like VECTOR_CST instead of arrays. */
8171 if ((TREE_STATIC (exp
)
8172 && ((mode
== BLKmode
8173 && ! (target
!= 0 && safe_from_p (target
, exp
, 1)))
8174 || TREE_ADDRESSABLE (exp
)
8175 || (tree_fits_uhwi_p (TYPE_SIZE_UNIT (type
))
8176 && (! can_move_by_pieces
8177 (tree_to_uhwi (TYPE_SIZE_UNIT (type
)),
8179 && ! mostly_zeros_p (exp
))))
8180 || ((modifier
== EXPAND_INITIALIZER
|| modifier
== EXPAND_CONST_ADDRESS
)
8181 && TREE_CONSTANT (exp
)))
8188 constructor
= expand_expr_constant (exp
, 1, modifier
);
8190 if (modifier
!= EXPAND_CONST_ADDRESS
8191 && modifier
!= EXPAND_INITIALIZER
8192 && modifier
!= EXPAND_SUM
)
8193 constructor
= validize_mem (constructor
);
8198 /* Handle calls that pass values in multiple non-contiguous
8199 locations. The Irix 6 ABI has examples of this. */
8200 if (target
== 0 || ! safe_from_p (target
, exp
, 1)
8201 || GET_CODE (target
) == PARALLEL
|| modifier
== EXPAND_STACK_PARM
)
8206 target
= assign_temp (type
, TREE_ADDRESSABLE (exp
), 1);
8209 store_constructor (exp
, target
, 0, int_expr_size (exp
), false);
8214 /* expand_expr: generate code for computing expression EXP.
8215 An rtx for the computed value is returned. The value is never null.
8216 In the case of a void EXP, const0_rtx is returned.
8218 The value may be stored in TARGET if TARGET is nonzero.
8219 TARGET is just a suggestion; callers must assume that
8220 the rtx returned may not be the same as TARGET.
8222 If TARGET is CONST0_RTX, it means that the value will be ignored.
8224 If TMODE is not VOIDmode, it suggests generating the
8225 result in mode TMODE. But this is done only when convenient.
8226 Otherwise, TMODE is ignored and the value generated in its natural mode.
8227 TMODE is just a suggestion; callers must assume that
8228 the rtx returned may not have mode TMODE.
8230 Note that TARGET may have neither TMODE nor MODE. In that case, it
8231 probably will not be used.
8233 If MODIFIER is EXPAND_SUM then when EXP is an addition
8234 we can return an rtx of the form (MULT (REG ...) (CONST_INT ...))
8235 or a nest of (PLUS ...) and (MINUS ...) where the terms are
8236 products as above, or REG or MEM, or constant.
8237 Ordinarily in such cases we would output mul or add instructions
8238 and then return a pseudo reg containing the sum.
8240 EXPAND_INITIALIZER is much like EXPAND_SUM except that
8241 it also marks a label as absolutely required (it can't be dead).
8242 It also makes a ZERO_EXTEND or SIGN_EXTEND instead of emitting extend insns.
8243 This is used for outputting expressions used in initializers.
8245 EXPAND_CONST_ADDRESS says that it is okay to return a MEM
8246 with a constant address even if that address is not normally legitimate.
8247 EXPAND_INITIALIZER and EXPAND_SUM also have this effect.
8249 EXPAND_STACK_PARM is used when expanding to a TARGET on the stack for
8250 a call parameter. Such targets require special care as we haven't yet
8251 marked TARGET so that it's safe from being trashed by libcalls. We
8252 don't want to use TARGET for anything but the final result;
8253 Intermediate values must go elsewhere. Additionally, calls to
8254 emit_block_move will be flagged with BLOCK_OP_CALL_PARM.
8256 If EXP is a VAR_DECL whose DECL_RTL was a MEM with an invalid
8257 address, and ALT_RTL is non-NULL, then *ALT_RTL is set to the
8258 DECL_RTL of the VAR_DECL. *ALT_RTL is also set if EXP is a
8259 COMPOUND_EXPR whose second argument is such a VAR_DECL, and so on
8262 If INNER_REFERENCE_P is true, we are expanding an inner reference.
8263 In this case, we don't adjust a returned MEM rtx that wouldn't be
8264 sufficiently aligned for its mode; instead, it's up to the caller
8265 to deal with it afterwards. This is used to make sure that unaligned
8266 base objects for which out-of-bounds accesses are supported, for
8267 example record types with trailing arrays, aren't realigned behind
8268 the back of the caller.
8269 The normal operating mode is to pass FALSE for this parameter. */
8272 expand_expr_real (tree exp
, rtx target
, machine_mode tmode
,
8273 enum expand_modifier modifier
, rtx
*alt_rtl
,
8274 bool inner_reference_p
)
8278 /* Handle ERROR_MARK before anybody tries to access its type. */
8279 if (TREE_CODE (exp
) == ERROR_MARK
8280 || (TREE_CODE (TREE_TYPE (exp
)) == ERROR_MARK
))
8282 ret
= CONST0_RTX (tmode
);
8283 return ret
? ret
: const0_rtx
;
8286 ret
= expand_expr_real_1 (exp
, target
, tmode
, modifier
, alt_rtl
,
8291 /* Try to expand the conditional expression which is represented by
8292 TREEOP0 ? TREEOP1 : TREEOP2 using conditonal moves. If it succeeds
8293 return the rtl reg which represents the result. Otherwise return
8297 expand_cond_expr_using_cmove (tree treeop0 ATTRIBUTE_UNUSED
,
8298 tree treeop1 ATTRIBUTE_UNUSED
,
8299 tree treeop2 ATTRIBUTE_UNUSED
)
8302 rtx op00
, op01
, op1
, op2
;
8303 enum rtx_code comparison_code
;
8304 machine_mode comparison_mode
;
8307 tree type
= TREE_TYPE (treeop1
);
8308 int unsignedp
= TYPE_UNSIGNED (type
);
8309 machine_mode mode
= TYPE_MODE (type
);
8310 machine_mode orig_mode
= mode
;
8311 static bool expanding_cond_expr_using_cmove
= false;
8313 /* Conditional move expansion can end up TERing two operands which,
8314 when recursively hitting conditional expressions can result in
8315 exponential behavior if the cmove expansion ultimatively fails.
8316 It's hardly profitable to TER a cmove into a cmove so avoid doing
8317 that by failing early if we end up recursing. */
8318 if (expanding_cond_expr_using_cmove
)
8321 /* If we cannot do a conditional move on the mode, try doing it
8322 with the promoted mode. */
8323 if (!can_conditionally_move_p (mode
))
8325 mode
= promote_mode (type
, mode
, &unsignedp
);
8326 if (!can_conditionally_move_p (mode
))
8328 temp
= assign_temp (type
, 0, 0); /* Use promoted mode for temp. */
8331 temp
= assign_temp (type
, 0, 1);
8333 expanding_cond_expr_using_cmove
= true;
8335 expand_operands (treeop1
, treeop2
,
8336 temp
, &op1
, &op2
, EXPAND_NORMAL
);
8338 if (TREE_CODE (treeop0
) == SSA_NAME
8339 && (srcstmt
= get_def_for_expr_class (treeop0
, tcc_comparison
)))
8341 tree type
= TREE_TYPE (gimple_assign_rhs1 (srcstmt
));
8342 enum tree_code cmpcode
= gimple_assign_rhs_code (srcstmt
);
8343 op00
= expand_normal (gimple_assign_rhs1 (srcstmt
));
8344 op01
= expand_normal (gimple_assign_rhs2 (srcstmt
));
8345 comparison_mode
= TYPE_MODE (type
);
8346 unsignedp
= TYPE_UNSIGNED (type
);
8347 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8349 else if (COMPARISON_CLASS_P (treeop0
))
8351 tree type
= TREE_TYPE (TREE_OPERAND (treeop0
, 0));
8352 enum tree_code cmpcode
= TREE_CODE (treeop0
);
8353 op00
= expand_normal (TREE_OPERAND (treeop0
, 0));
8354 op01
= expand_normal (TREE_OPERAND (treeop0
, 1));
8355 unsignedp
= TYPE_UNSIGNED (type
);
8356 comparison_mode
= TYPE_MODE (type
);
8357 comparison_code
= convert_tree_comp_to_rtx (cmpcode
, unsignedp
);
8361 op00
= expand_normal (treeop0
);
8363 comparison_code
= NE
;
8364 comparison_mode
= GET_MODE (op00
);
8365 if (comparison_mode
== VOIDmode
)
8366 comparison_mode
= TYPE_MODE (TREE_TYPE (treeop0
));
8368 expanding_cond_expr_using_cmove
= false;
8370 if (GET_MODE (op1
) != mode
)
8371 op1
= gen_lowpart (mode
, op1
);
8373 if (GET_MODE (op2
) != mode
)
8374 op2
= gen_lowpart (mode
, op2
);
8376 /* Try to emit the conditional move. */
8377 insn
= emit_conditional_move (temp
, comparison_code
,
8378 op00
, op01
, comparison_mode
,
8382 /* If we could do the conditional move, emit the sequence,
8386 rtx_insn
*seq
= get_insns ();
8389 return convert_modes (orig_mode
, mode
, temp
, 0);
8392 /* Otherwise discard the sequence and fall back to code with
8399 expand_expr_real_2 (sepops ops
, rtx target
, machine_mode tmode
,
8400 enum expand_modifier modifier
)
8402 rtx op0
, op1
, op2
, temp
;
8403 rtx_code_label
*lab
;
8407 scalar_int_mode int_mode
;
8408 enum tree_code code
= ops
->code
;
8410 rtx subtarget
, original_target
;
8412 bool reduce_bit_field
;
8413 location_t loc
= ops
->location
;
8414 tree treeop0
, treeop1
, treeop2
;
8415 #define REDUCE_BIT_FIELD(expr) (reduce_bit_field \
8416 ? reduce_to_bit_field_precision ((expr), \
8422 mode
= TYPE_MODE (type
);
8423 unsignedp
= TYPE_UNSIGNED (type
);
8429 /* We should be called only on simple (binary or unary) expressions,
8430 exactly those that are valid in gimple expressions that aren't
8431 GIMPLE_SINGLE_RHS (or invalid). */
8432 gcc_assert (get_gimple_rhs_class (code
) == GIMPLE_UNARY_RHS
8433 || get_gimple_rhs_class (code
) == GIMPLE_BINARY_RHS
8434 || get_gimple_rhs_class (code
) == GIMPLE_TERNARY_RHS
);
8436 ignore
= (target
== const0_rtx
8437 || ((CONVERT_EXPR_CODE_P (code
)
8438 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
8439 && TREE_CODE (type
) == VOID_TYPE
));
8441 /* We should be called only if we need the result. */
8442 gcc_assert (!ignore
);
8444 /* An operation in what may be a bit-field type needs the
8445 result to be reduced to the precision of the bit-field type,
8446 which is narrower than that of the type's mode. */
8447 reduce_bit_field
= (INTEGRAL_TYPE_P (type
)
8448 && !type_has_mode_precision_p (type
));
8450 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
8453 /* Use subtarget as the target for operand 0 of a binary operation. */
8454 subtarget
= get_subtarget (target
);
8455 original_target
= target
;
8459 case NON_LVALUE_EXPR
:
8462 if (treeop0
== error_mark_node
)
8465 if (TREE_CODE (type
) == UNION_TYPE
)
8467 tree valtype
= TREE_TYPE (treeop0
);
8469 /* If both input and output are BLKmode, this conversion isn't doing
8470 anything except possibly changing memory attribute. */
8471 if (mode
== BLKmode
&& TYPE_MODE (valtype
) == BLKmode
)
8473 rtx result
= expand_expr (treeop0
, target
, tmode
,
8476 result
= copy_rtx (result
);
8477 set_mem_attributes (result
, type
, 0);
8483 if (TYPE_MODE (type
) != BLKmode
)
8484 target
= gen_reg_rtx (TYPE_MODE (type
));
8486 target
= assign_temp (type
, 1, 1);
8490 /* Store data into beginning of memory target. */
8491 store_expr (treeop0
,
8492 adjust_address (target
, TYPE_MODE (valtype
), 0),
8493 modifier
== EXPAND_STACK_PARM
,
8494 false, TYPE_REVERSE_STORAGE_ORDER (type
));
8498 gcc_assert (REG_P (target
)
8499 && !TYPE_REVERSE_STORAGE_ORDER (type
));
8501 /* Store this field into a union of the proper type. */
8502 poly_uint64 op0_size
8503 = tree_to_poly_uint64 (TYPE_SIZE (TREE_TYPE (treeop0
)));
8504 poly_uint64 union_size
= GET_MODE_BITSIZE (mode
);
8505 store_field (target
,
8506 /* The conversion must be constructed so that
8507 we know at compile time how many bits
8509 ordered_min (op0_size
, union_size
),
8510 0, 0, 0, TYPE_MODE (valtype
), treeop0
, 0,
8514 /* Return the entire union. */
8518 if (mode
== TYPE_MODE (TREE_TYPE (treeop0
)))
8520 op0
= expand_expr (treeop0
, target
, VOIDmode
,
8523 /* If the signedness of the conversion differs and OP0 is
8524 a promoted SUBREG, clear that indication since we now
8525 have to do the proper extension. */
8526 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)) != unsignedp
8527 && GET_CODE (op0
) == SUBREG
)
8528 SUBREG_PROMOTED_VAR_P (op0
) = 0;
8530 return REDUCE_BIT_FIELD (op0
);
8533 op0
= expand_expr (treeop0
, NULL_RTX
, mode
,
8534 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
);
8535 if (GET_MODE (op0
) == mode
)
8538 /* If OP0 is a constant, just convert it into the proper mode. */
8539 else if (CONSTANT_P (op0
))
8541 tree inner_type
= TREE_TYPE (treeop0
);
8542 machine_mode inner_mode
= GET_MODE (op0
);
8544 if (inner_mode
== VOIDmode
)
8545 inner_mode
= TYPE_MODE (inner_type
);
8547 if (modifier
== EXPAND_INITIALIZER
)
8548 op0
= lowpart_subreg (mode
, op0
, inner_mode
);
8550 op0
= convert_modes (mode
, inner_mode
, op0
,
8551 TYPE_UNSIGNED (inner_type
));
8554 else if (modifier
== EXPAND_INITIALIZER
)
8555 op0
= gen_rtx_fmt_e (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8556 ? ZERO_EXTEND
: SIGN_EXTEND
, mode
, op0
);
8558 else if (target
== 0)
8559 op0
= convert_to_mode (mode
, op0
,
8560 TYPE_UNSIGNED (TREE_TYPE
8564 convert_move (target
, op0
,
8565 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
8569 return REDUCE_BIT_FIELD (op0
);
8571 case ADDR_SPACE_CONVERT_EXPR
:
8573 tree treeop0_type
= TREE_TYPE (treeop0
);
8575 gcc_assert (POINTER_TYPE_P (type
));
8576 gcc_assert (POINTER_TYPE_P (treeop0_type
));
8578 addr_space_t as_to
= TYPE_ADDR_SPACE (TREE_TYPE (type
));
8579 addr_space_t as_from
= TYPE_ADDR_SPACE (TREE_TYPE (treeop0_type
));
8581 /* Conversions between pointers to the same address space should
8582 have been implemented via CONVERT_EXPR / NOP_EXPR. */
8583 gcc_assert (as_to
!= as_from
);
8585 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
8587 /* Ask target code to handle conversion between pointers
8588 to overlapping address spaces. */
8589 if (targetm
.addr_space
.subset_p (as_to
, as_from
)
8590 || targetm
.addr_space
.subset_p (as_from
, as_to
))
8592 op0
= targetm
.addr_space
.convert (op0
, treeop0_type
, type
);
8596 /* For disjoint address spaces, converting anything but a null
8597 pointer invokes undefined behavior. We truncate or extend the
8598 value as if we'd converted via integers, which handles 0 as
8599 required, and all others as the programmer likely expects. */
8600 #ifndef POINTERS_EXTEND_UNSIGNED
8601 const int POINTERS_EXTEND_UNSIGNED
= 1;
8603 op0
= convert_modes (mode
, TYPE_MODE (treeop0_type
),
8604 op0
, POINTERS_EXTEND_UNSIGNED
);
8610 case POINTER_PLUS_EXPR
:
8611 /* Even though the sizetype mode and the pointer's mode can be different
8612 expand is able to handle this correctly and get the correct result out
8613 of the PLUS_EXPR code. */
8614 /* Make sure to sign-extend the sizetype offset in a POINTER_PLUS_EXPR
8615 if sizetype precision is smaller than pointer precision. */
8616 if (TYPE_PRECISION (sizetype
) < TYPE_PRECISION (type
))
8617 treeop1
= fold_convert_loc (loc
, type
,
8618 fold_convert_loc (loc
, ssizetype
,
8620 /* If sizetype precision is larger than pointer precision, truncate the
8621 offset to have matching modes. */
8622 else if (TYPE_PRECISION (sizetype
) > TYPE_PRECISION (type
))
8623 treeop1
= fold_convert_loc (loc
, type
, treeop1
);
8627 /* If we are adding a constant, a VAR_DECL that is sp, fp, or ap, and
8628 something else, make sure we add the register to the constant and
8629 then to the other thing. This case can occur during strength
8630 reduction and doing it this way will produce better code if the
8631 frame pointer or argument pointer is eliminated.
8633 fold-const.c will ensure that the constant is always in the inner
8634 PLUS_EXPR, so the only case we need to do anything about is if
8635 sp, ap, or fp is our second argument, in which case we must swap
8636 the innermost first argument and our second argument. */
8638 if (TREE_CODE (treeop0
) == PLUS_EXPR
8639 && TREE_CODE (TREE_OPERAND (treeop0
, 1)) == INTEGER_CST
8641 && (DECL_RTL (treeop1
) == frame_pointer_rtx
8642 || DECL_RTL (treeop1
) == stack_pointer_rtx
8643 || DECL_RTL (treeop1
) == arg_pointer_rtx
))
8648 /* If the result is to be ptr_mode and we are adding an integer to
8649 something, we might be forming a constant. So try to use
8650 plus_constant. If it produces a sum and we can't accept it,
8651 use force_operand. This allows P = &ARR[const] to generate
8652 efficient code on machines where a SYMBOL_REF is not a valid
8655 If this is an EXPAND_SUM call, always return the sum. */
8656 if (modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
8657 || (mode
== ptr_mode
&& (unsignedp
|| ! flag_trapv
)))
8659 if (modifier
== EXPAND_STACK_PARM
)
8661 if (TREE_CODE (treeop0
) == INTEGER_CST
8662 && HWI_COMPUTABLE_MODE_P (mode
)
8663 && TREE_CONSTANT (treeop1
))
8667 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop1
));
8669 op1
= expand_expr (treeop1
, subtarget
, VOIDmode
,
8671 /* Use wi::shwi to ensure that the constant is
8672 truncated according to the mode of OP1, then sign extended
8673 to a HOST_WIDE_INT. Using the constant directly can result
8674 in non-canonical RTL in a 64x32 cross compile. */
8675 wc
= TREE_INT_CST_LOW (treeop0
);
8677 immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8678 op1
= plus_constant (mode
, op1
, INTVAL (constant_part
));
8679 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8680 op1
= force_operand (op1
, target
);
8681 return REDUCE_BIT_FIELD (op1
);
8684 else if (TREE_CODE (treeop1
) == INTEGER_CST
8685 && HWI_COMPUTABLE_MODE_P (mode
)
8686 && TREE_CONSTANT (treeop0
))
8690 machine_mode wmode
= TYPE_MODE (TREE_TYPE (treeop0
));
8692 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8693 (modifier
== EXPAND_INITIALIZER
8694 ? EXPAND_INITIALIZER
: EXPAND_SUM
));
8695 if (! CONSTANT_P (op0
))
8697 op1
= expand_expr (treeop1
, NULL_RTX
,
8698 VOIDmode
, modifier
);
8699 /* Return a PLUS if modifier says it's OK. */
8700 if (modifier
== EXPAND_SUM
8701 || modifier
== EXPAND_INITIALIZER
)
8702 return simplify_gen_binary (PLUS
, mode
, op0
, op1
);
8705 /* Use wi::shwi to ensure that the constant is
8706 truncated according to the mode of OP1, then sign extended
8707 to a HOST_WIDE_INT. Using the constant directly can result
8708 in non-canonical RTL in a 64x32 cross compile. */
8709 wc
= TREE_INT_CST_LOW (treeop1
);
8711 = immed_wide_int_const (wi::shwi (wc
, wmode
), wmode
);
8712 op0
= plus_constant (mode
, op0
, INTVAL (constant_part
));
8713 if (modifier
!= EXPAND_SUM
&& modifier
!= EXPAND_INITIALIZER
)
8714 op0
= force_operand (op0
, target
);
8715 return REDUCE_BIT_FIELD (op0
);
8719 /* Use TER to expand pointer addition of a negated value
8720 as pointer subtraction. */
8721 if ((POINTER_TYPE_P (TREE_TYPE (treeop0
))
8722 || (TREE_CODE (TREE_TYPE (treeop0
)) == VECTOR_TYPE
8723 && POINTER_TYPE_P (TREE_TYPE (TREE_TYPE (treeop0
)))))
8724 && TREE_CODE (treeop1
) == SSA_NAME
8725 && TYPE_MODE (TREE_TYPE (treeop0
))
8726 == TYPE_MODE (TREE_TYPE (treeop1
)))
8728 gimple
*def
= get_def_for_expr (treeop1
, NEGATE_EXPR
);
8731 treeop1
= gimple_assign_rhs1 (def
);
8737 /* No sense saving up arithmetic to be done
8738 if it's all in the wrong mode to form part of an address.
8739 And force_operand won't know whether to sign-extend or
8741 if (modifier
!= EXPAND_INITIALIZER
8742 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8744 expand_operands (treeop0
, treeop1
,
8745 subtarget
, &op0
, &op1
, modifier
);
8746 if (op0
== const0_rtx
)
8748 if (op1
== const0_rtx
)
8753 expand_operands (treeop0
, treeop1
,
8754 subtarget
, &op0
, &op1
, modifier
);
8755 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8758 case POINTER_DIFF_EXPR
:
8760 /* For initializers, we are allowed to return a MINUS of two
8761 symbolic constants. Here we handle all cases when both operands
8763 /* Handle difference of two symbolic constants,
8764 for the sake of an initializer. */
8765 if ((modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
8766 && really_constant_p (treeop0
)
8767 && really_constant_p (treeop1
))
8769 expand_operands (treeop0
, treeop1
,
8770 NULL_RTX
, &op0
, &op1
, modifier
);
8771 return simplify_gen_binary (MINUS
, mode
, op0
, op1
);
8774 /* No sense saving up arithmetic to be done
8775 if it's all in the wrong mode to form part of an address.
8776 And force_operand won't know whether to sign-extend or
8778 if (modifier
!= EXPAND_INITIALIZER
8779 && (modifier
!= EXPAND_SUM
|| mode
!= ptr_mode
))
8782 expand_operands (treeop0
, treeop1
,
8783 subtarget
, &op0
, &op1
, modifier
);
8785 /* Convert A - const to A + (-const). */
8786 if (CONST_INT_P (op1
))
8788 op1
= negate_rtx (mode
, op1
);
8789 return REDUCE_BIT_FIELD (simplify_gen_binary (PLUS
, mode
, op0
, op1
));
8794 case WIDEN_MULT_PLUS_EXPR
:
8795 case WIDEN_MULT_MINUS_EXPR
:
8796 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
8797 op2
= expand_normal (treeop2
);
8798 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
8802 case WIDEN_MULT_EXPR
:
8803 /* If first operand is constant, swap them.
8804 Thus the following special case checks need only
8805 check the second operand. */
8806 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8807 std::swap (treeop0
, treeop1
);
8809 /* First, check if we have a multiplication of one signed and one
8810 unsigned operand. */
8811 if (TREE_CODE (treeop1
) != INTEGER_CST
8812 && (TYPE_UNSIGNED (TREE_TYPE (treeop0
))
8813 != TYPE_UNSIGNED (TREE_TYPE (treeop1
))))
8815 machine_mode innermode
= TYPE_MODE (TREE_TYPE (treeop0
));
8816 this_optab
= usmul_widen_optab
;
8817 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8818 != CODE_FOR_nothing
)
8820 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
8821 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8824 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op1
, &op0
,
8826 /* op0 and op1 might still be constant, despite the above
8827 != INTEGER_CST check. Handle it. */
8828 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8830 op0
= convert_modes (mode
, innermode
, op0
, true);
8831 op1
= convert_modes (mode
, innermode
, op1
, false);
8832 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8833 target
, unsignedp
));
8838 /* Check for a multiplication with matching signedness. */
8839 else if ((TREE_CODE (treeop1
) == INTEGER_CST
8840 && int_fits_type_p (treeop1
, TREE_TYPE (treeop0
)))
8841 || (TYPE_UNSIGNED (TREE_TYPE (treeop1
))
8842 == TYPE_UNSIGNED (TREE_TYPE (treeop0
))))
8844 tree op0type
= TREE_TYPE (treeop0
);
8845 machine_mode innermode
= TYPE_MODE (op0type
);
8846 bool zextend_p
= TYPE_UNSIGNED (op0type
);
8847 optab other_optab
= zextend_p
? smul_widen_optab
: umul_widen_optab
;
8848 this_optab
= zextend_p
? umul_widen_optab
: smul_widen_optab
;
8850 if (TREE_CODE (treeop0
) != INTEGER_CST
)
8852 if (find_widening_optab_handler (this_optab
, mode
, innermode
)
8853 != CODE_FOR_nothing
)
8855 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
,
8857 /* op0 and op1 might still be constant, despite the above
8858 != INTEGER_CST check. Handle it. */
8859 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8862 op0
= convert_modes (mode
, innermode
, op0
, zextend_p
);
8864 = convert_modes (mode
, innermode
, op1
,
8865 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8866 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
,
8870 temp
= expand_widening_mult (mode
, op0
, op1
, target
,
8871 unsignedp
, this_optab
);
8872 return REDUCE_BIT_FIELD (temp
);
8874 if (find_widening_optab_handler (other_optab
, mode
, innermode
)
8876 && innermode
== word_mode
)
8879 op0
= expand_normal (treeop0
);
8880 op1
= expand_normal (treeop1
);
8881 /* op0 and op1 might be constants, despite the above
8882 != INTEGER_CST check. Handle it. */
8883 if (GET_MODE (op0
) == VOIDmode
&& GET_MODE (op1
) == VOIDmode
)
8884 goto widen_mult_const
;
8885 if (TREE_CODE (treeop1
) == INTEGER_CST
)
8886 op1
= convert_modes (mode
, word_mode
, op1
,
8887 TYPE_UNSIGNED (TREE_TYPE (treeop1
)));
8888 temp
= expand_binop (mode
, other_optab
, op0
, op1
, target
,
8889 unsignedp
, OPTAB_LIB_WIDEN
);
8890 hipart
= gen_highpart (word_mode
, temp
);
8891 htem
= expand_mult_highpart_adjust (word_mode
, hipart
,
8895 emit_move_insn (hipart
, htem
);
8896 return REDUCE_BIT_FIELD (temp
);
8900 treeop0
= fold_build1 (CONVERT_EXPR
, type
, treeop0
);
8901 treeop1
= fold_build1 (CONVERT_EXPR
, type
, treeop1
);
8902 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8903 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8906 /* If this is a fixed-point operation, then we cannot use the code
8907 below because "expand_mult" doesn't support sat/no-sat fixed-point
8909 if (ALL_FIXED_POINT_MODE_P (mode
))
8912 /* If first operand is constant, swap them.
8913 Thus the following special case checks need only
8914 check the second operand. */
8915 if (TREE_CODE (treeop0
) == INTEGER_CST
)
8916 std::swap (treeop0
, treeop1
);
8918 /* Attempt to return something suitable for generating an
8919 indexed address, for machines that support that. */
8921 if (modifier
== EXPAND_SUM
&& mode
== ptr_mode
8922 && tree_fits_shwi_p (treeop1
))
8924 tree exp1
= treeop1
;
8926 op0
= expand_expr (treeop0
, subtarget
, VOIDmode
,
8930 op0
= force_operand (op0
, NULL_RTX
);
8932 op0
= copy_to_mode_reg (mode
, op0
);
8934 return REDUCE_BIT_FIELD (gen_rtx_MULT (mode
, op0
,
8935 gen_int_mode (tree_to_shwi (exp1
),
8936 TYPE_MODE (TREE_TYPE (exp1
)))));
8939 if (modifier
== EXPAND_STACK_PARM
)
8942 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8943 return REDUCE_BIT_FIELD (expand_mult (mode
, op0
, op1
, target
, unsignedp
));
8945 case TRUNC_MOD_EXPR
:
8946 case FLOOR_MOD_EXPR
:
8948 case ROUND_MOD_EXPR
:
8950 case TRUNC_DIV_EXPR
:
8951 case FLOOR_DIV_EXPR
:
8953 case ROUND_DIV_EXPR
:
8954 case EXACT_DIV_EXPR
:
8956 /* If this is a fixed-point operation, then we cannot use the code
8957 below because "expand_divmod" doesn't support sat/no-sat fixed-point
8959 if (ALL_FIXED_POINT_MODE_P (mode
))
8962 if (modifier
== EXPAND_STACK_PARM
)
8964 /* Possible optimization: compute the dividend with EXPAND_SUM
8965 then if the divisor is constant can optimize the case
8966 where some terms of the dividend have coeffs divisible by it. */
8967 expand_operands (treeop0
, treeop1
,
8968 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
8969 bool mod_p
= code
== TRUNC_MOD_EXPR
|| code
== FLOOR_MOD_EXPR
8970 || code
== CEIL_MOD_EXPR
|| code
== ROUND_MOD_EXPR
;
8971 if (SCALAR_INT_MODE_P (mode
)
8973 && get_range_pos_neg (treeop0
) == 1
8974 && get_range_pos_neg (treeop1
) == 1)
8976 /* If both arguments are known to be positive when interpreted
8977 as signed, we can expand it as both signed and unsigned
8978 division or modulo. Choose the cheaper sequence in that case. */
8979 bool speed_p
= optimize_insn_for_speed_p ();
8980 do_pending_stack_adjust ();
8982 rtx uns_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 1);
8983 rtx_insn
*uns_insns
= get_insns ();
8986 rtx sgn_ret
= expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, 0);
8987 rtx_insn
*sgn_insns
= get_insns ();
8989 unsigned uns_cost
= seq_cost (uns_insns
, speed_p
);
8990 unsigned sgn_cost
= seq_cost (sgn_insns
, speed_p
);
8992 /* If costs are the same then use as tie breaker the other
8994 if (uns_cost
== sgn_cost
)
8996 uns_cost
= seq_cost (uns_insns
, !speed_p
);
8997 sgn_cost
= seq_cost (sgn_insns
, !speed_p
);
9000 if (uns_cost
< sgn_cost
|| (uns_cost
== sgn_cost
&& unsignedp
))
9002 emit_insn (uns_insns
);
9005 emit_insn (sgn_insns
);
9008 return expand_divmod (mod_p
, code
, mode
, op0
, op1
, target
, unsignedp
);
9013 case MULT_HIGHPART_EXPR
:
9014 expand_operands (treeop0
, treeop1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9015 temp
= expand_mult_highpart (mode
, op0
, op1
, target
, unsignedp
);
9019 case FIXED_CONVERT_EXPR
:
9020 op0
= expand_normal (treeop0
);
9021 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9022 target
= gen_reg_rtx (mode
);
9024 if ((TREE_CODE (TREE_TYPE (treeop0
)) == INTEGER_TYPE
9025 && TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9026 || (TREE_CODE (type
) == INTEGER_TYPE
&& TYPE_UNSIGNED (type
)))
9027 expand_fixed_convert (target
, op0
, 1, TYPE_SATURATING (type
));
9029 expand_fixed_convert (target
, op0
, 0, TYPE_SATURATING (type
));
9032 case FIX_TRUNC_EXPR
:
9033 op0
= expand_normal (treeop0
);
9034 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9035 target
= gen_reg_rtx (mode
);
9036 expand_fix (target
, op0
, unsignedp
);
9040 op0
= expand_normal (treeop0
);
9041 if (target
== 0 || modifier
== EXPAND_STACK_PARM
)
9042 target
= gen_reg_rtx (mode
);
9043 /* expand_float can't figure out what to do if FROM has VOIDmode.
9044 So give it the correct mode. With -O, cse will optimize this. */
9045 if (GET_MODE (op0
) == VOIDmode
)
9046 op0
= copy_to_mode_reg (TYPE_MODE (TREE_TYPE (treeop0
)),
9048 expand_float (target
, op0
,
9049 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9053 op0
= expand_expr (treeop0
, subtarget
,
9054 VOIDmode
, EXPAND_NORMAL
);
9055 if (modifier
== EXPAND_STACK_PARM
)
9057 temp
= expand_unop (mode
,
9058 optab_for_tree_code (NEGATE_EXPR
, type
,
9062 return REDUCE_BIT_FIELD (temp
);
9066 op0
= expand_expr (treeop0
, subtarget
,
9067 VOIDmode
, EXPAND_NORMAL
);
9068 if (modifier
== EXPAND_STACK_PARM
)
9071 /* ABS_EXPR is not valid for complex arguments. */
9072 gcc_assert (GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
9073 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
);
9075 /* Unsigned abs is simply the operand. Testing here means we don't
9076 risk generating incorrect code below. */
9077 if (TYPE_UNSIGNED (TREE_TYPE (treeop0
)))
9080 return expand_abs (mode
, op0
, target
, unsignedp
,
9081 safe_from_p (target
, treeop0
, 1));
9085 target
= original_target
;
9087 || modifier
== EXPAND_STACK_PARM
9088 || (MEM_P (target
) && MEM_VOLATILE_P (target
))
9089 || GET_MODE (target
) != mode
9091 && REGNO (target
) < FIRST_PSEUDO_REGISTER
))
9092 target
= gen_reg_rtx (mode
);
9093 expand_operands (treeop0
, treeop1
,
9094 target
, &op0
, &op1
, EXPAND_NORMAL
);
9096 /* First try to do it with a special MIN or MAX instruction.
9097 If that does not win, use a conditional jump to select the proper
9099 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9100 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
, unsignedp
,
9105 /* For vector MIN <x, y>, expand it a VEC_COND_EXPR <x <= y, x, y>
9106 and similarly for MAX <x, y>. */
9107 if (VECTOR_TYPE_P (type
))
9109 tree t0
= make_tree (type
, op0
);
9110 tree t1
= make_tree (type
, op1
);
9111 tree comparison
= build2 (code
== MIN_EXPR
? LE_EXPR
: GE_EXPR
,
9113 return expand_vec_cond_expr (type
, comparison
, t0
, t1
,
9117 /* At this point, a MEM target is no longer useful; we will get better
9120 if (! REG_P (target
))
9121 target
= gen_reg_rtx (mode
);
9123 /* If op1 was placed in target, swap op0 and op1. */
9124 if (target
!= op0
&& target
== op1
)
9125 std::swap (op0
, op1
);
9127 /* We generate better code and avoid problems with op1 mentioning
9128 target by forcing op1 into a pseudo if it isn't a constant. */
9129 if (! CONSTANT_P (op1
))
9130 op1
= force_reg (mode
, op1
);
9133 enum rtx_code comparison_code
;
9136 if (code
== MAX_EXPR
)
9137 comparison_code
= unsignedp
? GEU
: GE
;
9139 comparison_code
= unsignedp
? LEU
: LE
;
9141 /* Canonicalize to comparisons against 0. */
9142 if (op1
== const1_rtx
)
9144 /* Converting (a >= 1 ? a : 1) into (a > 0 ? a : 1)
9145 or (a != 0 ? a : 1) for unsigned.
9146 For MIN we are safe converting (a <= 1 ? a : 1)
9147 into (a <= 0 ? a : 1) */
9148 cmpop1
= const0_rtx
;
9149 if (code
== MAX_EXPR
)
9150 comparison_code
= unsignedp
? NE
: GT
;
9152 if (op1
== constm1_rtx
&& !unsignedp
)
9154 /* Converting (a >= -1 ? a : -1) into (a >= 0 ? a : -1)
9155 and (a <= -1 ? a : -1) into (a < 0 ? a : -1) */
9156 cmpop1
= const0_rtx
;
9157 if (code
== MIN_EXPR
)
9158 comparison_code
= LT
;
9161 /* Use a conditional move if possible. */
9162 if (can_conditionally_move_p (mode
))
9168 /* Try to emit the conditional move. */
9169 insn
= emit_conditional_move (target
, comparison_code
,
9174 /* If we could do the conditional move, emit the sequence,
9178 rtx_insn
*seq
= get_insns ();
9184 /* Otherwise discard the sequence and fall back to code with
9190 emit_move_insn (target
, op0
);
9192 lab
= gen_label_rtx ();
9193 do_compare_rtx_and_jump (target
, cmpop1
, comparison_code
,
9194 unsignedp
, mode
, NULL_RTX
, NULL
, lab
,
9195 profile_probability::uninitialized ());
9197 emit_move_insn (target
, op1
);
9202 op0
= expand_expr (treeop0
, subtarget
,
9203 VOIDmode
, EXPAND_NORMAL
);
9204 if (modifier
== EXPAND_STACK_PARM
)
9206 /* In case we have to reduce the result to bitfield precision
9207 for unsigned bitfield expand this as XOR with a proper constant
9209 if (reduce_bit_field
&& TYPE_UNSIGNED (type
))
9211 int_mode
= SCALAR_INT_TYPE_MODE (type
);
9212 wide_int mask
= wi::mask (TYPE_PRECISION (type
),
9213 false, GET_MODE_PRECISION (int_mode
));
9215 temp
= expand_binop (int_mode
, xor_optab
, op0
,
9216 immed_wide_int_const (mask
, int_mode
),
9217 target
, 1, OPTAB_LIB_WIDEN
);
9220 temp
= expand_unop (mode
, one_cmpl_optab
, op0
, target
, 1);
9224 /* ??? Can optimize bitwise operations with one arg constant.
9225 Can optimize (a bitwise1 n) bitwise2 (a bitwise3 b)
9226 and (a bitwise1 b) bitwise2 b (etc)
9227 but that is probably not worth while. */
9236 gcc_assert (VECTOR_MODE_P (TYPE_MODE (type
))
9237 || type_has_mode_precision_p (type
));
9243 /* If this is a fixed-point operation, then we cannot use the code
9244 below because "expand_shift" doesn't support sat/no-sat fixed-point
9246 if (ALL_FIXED_POINT_MODE_P (mode
))
9249 if (! safe_from_p (subtarget
, treeop1
, 1))
9251 if (modifier
== EXPAND_STACK_PARM
)
9253 op0
= expand_expr (treeop0
, subtarget
,
9254 VOIDmode
, EXPAND_NORMAL
);
9256 /* Left shift optimization when shifting across word_size boundary.
9258 If mode == GET_MODE_WIDER_MODE (word_mode), then normally
9259 there isn't native instruction to support this wide mode
9260 left shift. Given below scenario:
9262 Type A = (Type) B << C
9265 | dest_high | dest_low |
9269 If the shift amount C caused we shift B to across the word
9270 size boundary, i.e part of B shifted into high half of
9271 destination register, and part of B remains in the low
9272 half, then GCC will use the following left shift expand
9275 1. Initialize dest_low to B.
9276 2. Initialize every bit of dest_high to the sign bit of B.
9277 3. Logic left shift dest_low by C bit to finalize dest_low.
9278 The value of dest_low before this shift is kept in a temp D.
9279 4. Logic left shift dest_high by C.
9280 5. Logic right shift D by (word_size - C).
9281 6. Or the result of 4 and 5 to finalize dest_high.
9283 While, by checking gimple statements, if operand B is
9284 coming from signed extension, then we can simplify above
9287 1. dest_high = src_low >> (word_size - C).
9288 2. dest_low = src_low << C.
9290 We can use one arithmetic right shift to finish all the
9291 purpose of steps 2, 4, 5, 6, thus we reduce the steps
9292 needed from 6 into 2.
9294 The case is similar for zero extension, except that we
9295 initialize dest_high to zero rather than copies of the sign
9296 bit from B. Furthermore, we need to use a logical right shift
9299 The choice of sign-extension versus zero-extension is
9300 determined entirely by whether or not B is signed and is
9301 independent of the current setting of unsignedp. */
9304 if (code
== LSHIFT_EXPR
9307 && GET_MODE_2XWIDER_MODE (word_mode
).exists (&int_mode
)
9309 && TREE_CONSTANT (treeop1
)
9310 && TREE_CODE (treeop0
) == SSA_NAME
)
9312 gimple
*def
= SSA_NAME_DEF_STMT (treeop0
);
9313 if (is_gimple_assign (def
)
9314 && gimple_assign_rhs_code (def
) == NOP_EXPR
)
9316 scalar_int_mode rmode
= SCALAR_INT_TYPE_MODE
9317 (TREE_TYPE (gimple_assign_rhs1 (def
)));
9319 if (GET_MODE_SIZE (rmode
) < GET_MODE_SIZE (int_mode
)
9320 && TREE_INT_CST_LOW (treeop1
) < GET_MODE_BITSIZE (word_mode
)
9321 && ((TREE_INT_CST_LOW (treeop1
) + GET_MODE_BITSIZE (rmode
))
9322 >= GET_MODE_BITSIZE (word_mode
)))
9324 rtx_insn
*seq
, *seq_old
;
9325 poly_uint64 high_off
= subreg_highpart_offset (word_mode
,
9327 bool extend_unsigned
9328 = TYPE_UNSIGNED (TREE_TYPE (gimple_assign_rhs1 (def
)));
9329 rtx low
= lowpart_subreg (word_mode
, op0
, int_mode
);
9330 rtx dest_low
= lowpart_subreg (word_mode
, target
, int_mode
);
9331 rtx dest_high
= simplify_gen_subreg (word_mode
, target
,
9332 int_mode
, high_off
);
9333 HOST_WIDE_INT ramount
= (BITS_PER_WORD
9334 - TREE_INT_CST_LOW (treeop1
));
9335 tree rshift
= build_int_cst (TREE_TYPE (treeop1
), ramount
);
9338 /* dest_high = src_low >> (word_size - C). */
9339 temp
= expand_variable_shift (RSHIFT_EXPR
, word_mode
, low
,
9342 if (temp
!= dest_high
)
9343 emit_move_insn (dest_high
, temp
);
9345 /* dest_low = src_low << C. */
9346 temp
= expand_variable_shift (LSHIFT_EXPR
, word_mode
, low
,
9347 treeop1
, dest_low
, unsignedp
);
9348 if (temp
!= dest_low
)
9349 emit_move_insn (dest_low
, temp
);
9355 if (have_insn_for (ASHIFT
, int_mode
))
9357 bool speed_p
= optimize_insn_for_speed_p ();
9359 rtx ret_old
= expand_variable_shift (code
, int_mode
,
9364 seq_old
= get_insns ();
9366 if (seq_cost (seq
, speed_p
)
9367 >= seq_cost (seq_old
, speed_p
))
9378 if (temp
== NULL_RTX
)
9379 temp
= expand_variable_shift (code
, mode
, op0
, treeop1
, target
,
9381 if (code
== LSHIFT_EXPR
)
9382 temp
= REDUCE_BIT_FIELD (temp
);
9386 /* Could determine the answer when only additive constants differ. Also,
9387 the addition of one can be handled by changing the condition. */
9394 case UNORDERED_EXPR
:
9403 temp
= do_store_flag (ops
,
9404 modifier
!= EXPAND_STACK_PARM
? target
: NULL_RTX
,
9405 tmode
!= VOIDmode
? tmode
: mode
);
9409 /* Use a compare and a jump for BLKmode comparisons, or for function
9410 type comparisons is have_canonicalize_funcptr_for_compare. */
9413 || modifier
== EXPAND_STACK_PARM
9414 || ! safe_from_p (target
, treeop0
, 1)
9415 || ! safe_from_p (target
, treeop1
, 1)
9416 /* Make sure we don't have a hard reg (such as function's return
9417 value) live across basic blocks, if not optimizing. */
9418 || (!optimize
&& REG_P (target
)
9419 && REGNO (target
) < FIRST_PSEUDO_REGISTER
)))
9420 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
9422 emit_move_insn (target
, const0_rtx
);
9424 rtx_code_label
*lab1
= gen_label_rtx ();
9425 jumpifnot_1 (code
, treeop0
, treeop1
, lab1
,
9426 profile_probability::uninitialized ());
9428 if (TYPE_PRECISION (type
) == 1 && !TYPE_UNSIGNED (type
))
9429 emit_move_insn (target
, constm1_rtx
);
9431 emit_move_insn (target
, const1_rtx
);
9437 /* Get the rtx code of the operands. */
9438 op0
= expand_normal (treeop0
);
9439 op1
= expand_normal (treeop1
);
9442 target
= gen_reg_rtx (TYPE_MODE (type
));
9444 /* If target overlaps with op1, then either we need to force
9445 op1 into a pseudo (if target also overlaps with op0),
9446 or write the complex parts in reverse order. */
9447 switch (GET_CODE (target
))
9450 if (reg_overlap_mentioned_p (XEXP (target
, 0), op1
))
9452 if (reg_overlap_mentioned_p (XEXP (target
, 1), op0
))
9454 complex_expr_force_op1
:
9455 temp
= gen_reg_rtx (GET_MODE_INNER (GET_MODE (target
)));
9456 emit_move_insn (temp
, op1
);
9460 complex_expr_swap_order
:
9461 /* Move the imaginary (op1) and real (op0) parts to their
9463 write_complex_part (target
, op1
, true);
9464 write_complex_part (target
, op0
, false);
9470 temp
= adjust_address_nv (target
,
9471 GET_MODE_INNER (GET_MODE (target
)), 0);
9472 if (reg_overlap_mentioned_p (temp
, op1
))
9474 scalar_mode imode
= GET_MODE_INNER (GET_MODE (target
));
9475 temp
= adjust_address_nv (target
, imode
,
9476 GET_MODE_SIZE (imode
));
9477 if (reg_overlap_mentioned_p (temp
, op0
))
9478 goto complex_expr_force_op1
;
9479 goto complex_expr_swap_order
;
9483 if (reg_overlap_mentioned_p (target
, op1
))
9485 if (reg_overlap_mentioned_p (target
, op0
))
9486 goto complex_expr_force_op1
;
9487 goto complex_expr_swap_order
;
9492 /* Move the real (op0) and imaginary (op1) parts to their location. */
9493 write_complex_part (target
, op0
, false);
9494 write_complex_part (target
, op1
, true);
9498 case WIDEN_SUM_EXPR
:
9500 tree oprnd0
= treeop0
;
9501 tree oprnd1
= treeop1
;
9503 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9504 target
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, op1
,
9509 case VEC_UNPACK_HI_EXPR
:
9510 case VEC_UNPACK_LO_EXPR
:
9511 case VEC_UNPACK_FIX_TRUNC_HI_EXPR
:
9512 case VEC_UNPACK_FIX_TRUNC_LO_EXPR
:
9514 op0
= expand_normal (treeop0
);
9515 temp
= expand_widen_pattern_expr (ops
, op0
, NULL_RTX
, NULL_RTX
,
9521 case VEC_UNPACK_FLOAT_HI_EXPR
:
9522 case VEC_UNPACK_FLOAT_LO_EXPR
:
9524 op0
= expand_normal (treeop0
);
9525 /* The signedness is determined from input operand. */
9526 temp
= expand_widen_pattern_expr
9527 (ops
, op0
, NULL_RTX
, NULL_RTX
,
9528 target
, TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
9534 case VEC_WIDEN_MULT_HI_EXPR
:
9535 case VEC_WIDEN_MULT_LO_EXPR
:
9536 case VEC_WIDEN_MULT_EVEN_EXPR
:
9537 case VEC_WIDEN_MULT_ODD_EXPR
:
9538 case VEC_WIDEN_LSHIFT_HI_EXPR
:
9539 case VEC_WIDEN_LSHIFT_LO_EXPR
:
9540 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9541 target
= expand_widen_pattern_expr (ops
, op0
, op1
, NULL_RTX
,
9543 gcc_assert (target
);
9546 case VEC_PACK_SAT_EXPR
:
9547 case VEC_PACK_FIX_TRUNC_EXPR
:
9548 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9551 case VEC_PACK_TRUNC_EXPR
:
9552 if (VECTOR_BOOLEAN_TYPE_P (type
)
9553 && VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (treeop0
))
9554 && mode
== TYPE_MODE (TREE_TYPE (treeop0
))
9555 && SCALAR_INT_MODE_P (mode
))
9557 struct expand_operand eops
[4];
9558 machine_mode imode
= TYPE_MODE (TREE_TYPE (treeop0
));
9559 expand_operands (treeop0
, treeop1
,
9560 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9561 this_optab
= vec_pack_sbool_trunc_optab
;
9562 enum insn_code icode
= optab_handler (this_optab
, imode
);
9563 create_output_operand (&eops
[0], target
, mode
);
9564 create_convert_operand_from (&eops
[1], op0
, imode
, false);
9565 create_convert_operand_from (&eops
[2], op1
, imode
, false);
9566 temp
= GEN_INT (TYPE_VECTOR_SUBPARTS (type
).to_constant ());
9567 create_input_operand (&eops
[3], temp
, imode
);
9568 expand_insn (icode
, 4, eops
);
9569 return eops
[0].value
;
9571 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9574 case VEC_PACK_FLOAT_EXPR
:
9575 mode
= TYPE_MODE (TREE_TYPE (treeop0
));
9576 expand_operands (treeop0
, treeop1
,
9577 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9578 this_optab
= optab_for_tree_code (code
, TREE_TYPE (treeop0
),
9580 target
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9581 TYPE_UNSIGNED (TREE_TYPE (treeop0
)),
9583 gcc_assert (target
);
9588 expand_operands (treeop0
, treeop1
, target
, &op0
, &op1
, EXPAND_NORMAL
);
9589 vec_perm_builder sel
;
9590 if (TREE_CODE (treeop2
) == VECTOR_CST
9591 && tree_to_vec_perm_builder (&sel
, treeop2
))
9593 machine_mode sel_mode
= TYPE_MODE (TREE_TYPE (treeop2
));
9594 temp
= expand_vec_perm_const (mode
, op0
, op1
, sel
,
9599 op2
= expand_normal (treeop2
);
9600 temp
= expand_vec_perm_var (mode
, op0
, op1
, op2
, target
);
9608 tree oprnd0
= treeop0
;
9609 tree oprnd1
= treeop1
;
9610 tree oprnd2
= treeop2
;
9613 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9614 op2
= expand_normal (oprnd2
);
9615 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9622 tree oprnd0
= treeop0
;
9623 tree oprnd1
= treeop1
;
9624 tree oprnd2
= treeop2
;
9627 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9628 op2
= expand_normal (oprnd2
);
9629 target
= expand_widen_pattern_expr (ops
, op0
, op1
, op2
,
9634 case REALIGN_LOAD_EXPR
:
9636 tree oprnd0
= treeop0
;
9637 tree oprnd1
= treeop1
;
9638 tree oprnd2
= treeop2
;
9641 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9642 expand_operands (oprnd0
, oprnd1
, NULL_RTX
, &op0
, &op1
, EXPAND_NORMAL
);
9643 op2
= expand_normal (oprnd2
);
9644 temp
= expand_ternary_op (mode
, this_optab
, op0
, op1
, op2
,
9652 /* A COND_EXPR with its type being VOID_TYPE represents a
9653 conditional jump and is handled in
9654 expand_gimple_cond_expr. */
9655 gcc_assert (!VOID_TYPE_P (type
));
9657 /* Note that COND_EXPRs whose type is a structure or union
9658 are required to be constructed to contain assignments of
9659 a temporary variable, so that we can evaluate them here
9660 for side effect only. If type is void, we must do likewise. */
9662 gcc_assert (!TREE_ADDRESSABLE (type
)
9664 && TREE_TYPE (treeop1
) != void_type_node
9665 && TREE_TYPE (treeop2
) != void_type_node
);
9667 temp
= expand_cond_expr_using_cmove (treeop0
, treeop1
, treeop2
);
9671 /* If we are not to produce a result, we have no target. Otherwise,
9672 if a target was specified use it; it will not be used as an
9673 intermediate target unless it is safe. If no target, use a
9676 if (modifier
!= EXPAND_STACK_PARM
9678 && safe_from_p (original_target
, treeop0
, 1)
9679 && GET_MODE (original_target
) == mode
9680 && !MEM_P (original_target
))
9681 temp
= original_target
;
9683 temp
= assign_temp (type
, 0, 1);
9685 do_pending_stack_adjust ();
9687 rtx_code_label
*lab0
= gen_label_rtx ();
9688 rtx_code_label
*lab1
= gen_label_rtx ();
9689 jumpifnot (treeop0
, lab0
,
9690 profile_probability::uninitialized ());
9691 store_expr (treeop1
, temp
,
9692 modifier
== EXPAND_STACK_PARM
,
9695 emit_jump_insn (targetm
.gen_jump (lab1
));
9698 store_expr (treeop2
, temp
,
9699 modifier
== EXPAND_STACK_PARM
,
9708 target
= expand_vec_cond_expr (type
, treeop0
, treeop1
, treeop2
, target
);
9711 case VEC_DUPLICATE_EXPR
:
9712 op0
= expand_expr (treeop0
, NULL_RTX
, VOIDmode
, modifier
);
9713 target
= expand_vector_broadcast (mode
, op0
);
9714 gcc_assert (target
);
9717 case VEC_SERIES_EXPR
:
9718 expand_operands (treeop0
, treeop1
, NULL_RTX
, &op0
, &op1
, modifier
);
9719 return expand_vec_series_expr (mode
, op0
, op1
, target
);
9721 case BIT_INSERT_EXPR
:
9723 unsigned bitpos
= tree_to_uhwi (treeop2
);
9725 if (INTEGRAL_TYPE_P (TREE_TYPE (treeop1
)))
9726 bitsize
= TYPE_PRECISION (TREE_TYPE (treeop1
));
9728 bitsize
= tree_to_uhwi (TYPE_SIZE (TREE_TYPE (treeop1
)));
9729 rtx op0
= expand_normal (treeop0
);
9730 rtx op1
= expand_normal (treeop1
);
9731 rtx dst
= gen_reg_rtx (mode
);
9732 emit_move_insn (dst
, op0
);
9733 store_bit_field (dst
, bitsize
, bitpos
, 0, 0,
9734 TYPE_MODE (TREE_TYPE (treeop1
)), op1
, false);
9742 /* Here to do an ordinary binary operator. */
9744 expand_operands (treeop0
, treeop1
,
9745 subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
9747 this_optab
= optab_for_tree_code (code
, type
, optab_default
);
9749 if (modifier
== EXPAND_STACK_PARM
)
9751 temp
= expand_binop (mode
, this_optab
, op0
, op1
, target
,
9752 unsignedp
, OPTAB_LIB_WIDEN
);
9754 /* Bitwise operations do not need bitfield reduction as we expect their
9755 operands being properly truncated. */
9756 if (code
== BIT_XOR_EXPR
9757 || code
== BIT_AND_EXPR
9758 || code
== BIT_IOR_EXPR
)
9760 return REDUCE_BIT_FIELD (temp
);
9762 #undef REDUCE_BIT_FIELD
9765 /* Return TRUE if expression STMT is suitable for replacement.
9766 Never consider memory loads as replaceable, because those don't ever lead
9767 into constant expressions. */
9770 stmt_is_replaceable_p (gimple
*stmt
)
9772 if (ssa_is_replaceable_p (stmt
))
9774 /* Don't move around loads. */
9775 if (!gimple_assign_single_p (stmt
)
9776 || is_gimple_val (gimple_assign_rhs1 (stmt
)))
9783 expand_expr_real_1 (tree exp
, rtx target
, machine_mode tmode
,
9784 enum expand_modifier modifier
, rtx
*alt_rtl
,
9785 bool inner_reference_p
)
9787 rtx op0
, op1
, temp
, decl_rtl
;
9790 machine_mode mode
, dmode
;
9791 enum tree_code code
= TREE_CODE (exp
);
9792 rtx subtarget
, original_target
;
9795 bool reduce_bit_field
;
9796 location_t loc
= EXPR_LOCATION (exp
);
9797 struct separate_ops ops
;
9798 tree treeop0
, treeop1
, treeop2
;
9799 tree ssa_name
= NULL_TREE
;
9802 type
= TREE_TYPE (exp
);
9803 mode
= TYPE_MODE (type
);
9804 unsignedp
= TYPE_UNSIGNED (type
);
9806 treeop0
= treeop1
= treeop2
= NULL_TREE
;
9807 if (!VL_EXP_CLASS_P (exp
))
9808 switch (TREE_CODE_LENGTH (code
))
9811 case 3: treeop2
= TREE_OPERAND (exp
, 2); /* FALLTHRU */
9812 case 2: treeop1
= TREE_OPERAND (exp
, 1); /* FALLTHRU */
9813 case 1: treeop0
= TREE_OPERAND (exp
, 0); /* FALLTHRU */
9823 ignore
= (target
== const0_rtx
9824 || ((CONVERT_EXPR_CODE_P (code
)
9825 || code
== COND_EXPR
|| code
== VIEW_CONVERT_EXPR
)
9826 && TREE_CODE (type
) == VOID_TYPE
));
9828 /* An operation in what may be a bit-field type needs the
9829 result to be reduced to the precision of the bit-field type,
9830 which is narrower than that of the type's mode. */
9831 reduce_bit_field
= (!ignore
9832 && INTEGRAL_TYPE_P (type
)
9833 && !type_has_mode_precision_p (type
));
9835 /* If we are going to ignore this result, we need only do something
9836 if there is a side-effect somewhere in the expression. If there
9837 is, short-circuit the most common cases here. Note that we must
9838 not call expand_expr with anything but const0_rtx in case this
9839 is an initial expansion of a size that contains a PLACEHOLDER_EXPR. */
9843 if (! TREE_SIDE_EFFECTS (exp
))
9846 /* Ensure we reference a volatile object even if value is ignored, but
9847 don't do this if all we are doing is taking its address. */
9848 if (TREE_THIS_VOLATILE (exp
)
9849 && TREE_CODE (exp
) != FUNCTION_DECL
9850 && mode
!= VOIDmode
&& mode
!= BLKmode
9851 && modifier
!= EXPAND_CONST_ADDRESS
)
9853 temp
= expand_expr (exp
, NULL_RTX
, VOIDmode
, modifier
);
9859 if (TREE_CODE_CLASS (code
) == tcc_unary
9860 || code
== BIT_FIELD_REF
9861 || code
== COMPONENT_REF
9862 || code
== INDIRECT_REF
)
9863 return expand_expr (treeop0
, const0_rtx
, VOIDmode
,
9866 else if (TREE_CODE_CLASS (code
) == tcc_binary
9867 || TREE_CODE_CLASS (code
) == tcc_comparison
9868 || code
== ARRAY_REF
|| code
== ARRAY_RANGE_REF
)
9870 expand_expr (treeop0
, const0_rtx
, VOIDmode
, modifier
);
9871 expand_expr (treeop1
, const0_rtx
, VOIDmode
, modifier
);
9878 if (reduce_bit_field
&& modifier
== EXPAND_STACK_PARM
)
9881 /* Use subtarget as the target for operand 0 of a binary operation. */
9882 subtarget
= get_subtarget (target
);
9883 original_target
= target
;
9889 tree function
= decl_function_context (exp
);
9891 temp
= label_rtx (exp
);
9892 temp
= gen_rtx_LABEL_REF (Pmode
, temp
);
9894 if (function
!= current_function_decl
9896 LABEL_REF_NONLOCAL_P (temp
) = 1;
9898 temp
= gen_rtx_MEM (FUNCTION_MODE
, temp
);
9903 /* ??? ivopts calls expander, without any preparation from
9904 out-of-ssa. So fake instructions as if this was an access to the
9905 base variable. This unnecessarily allocates a pseudo, see how we can
9906 reuse it, if partition base vars have it set already. */
9907 if (!currently_expanding_to_rtl
)
9909 tree var
= SSA_NAME_VAR (exp
);
9910 if (var
&& DECL_RTL_SET_P (var
))
9911 return DECL_RTL (var
);
9912 return gen_raw_REG (TYPE_MODE (TREE_TYPE (exp
)),
9913 LAST_VIRTUAL_REGISTER
+ 1);
9916 g
= get_gimple_for_ssa_name (exp
);
9917 /* For EXPAND_INITIALIZER try harder to get something simpler. */
9919 && modifier
== EXPAND_INITIALIZER
9920 && !SSA_NAME_IS_DEFAULT_DEF (exp
)
9921 && (optimize
|| !SSA_NAME_VAR (exp
)
9922 || DECL_IGNORED_P (SSA_NAME_VAR (exp
)))
9923 && stmt_is_replaceable_p (SSA_NAME_DEF_STMT (exp
)))
9924 g
= SSA_NAME_DEF_STMT (exp
);
9928 location_t saved_loc
= curr_insn_location ();
9929 location_t loc
= gimple_location (g
);
9930 if (loc
!= UNKNOWN_LOCATION
)
9931 set_curr_insn_location (loc
);
9932 ops
.code
= gimple_assign_rhs_code (g
);
9933 switch (get_gimple_rhs_class (ops
.code
))
9935 case GIMPLE_TERNARY_RHS
:
9936 ops
.op2
= gimple_assign_rhs3 (g
);
9938 case GIMPLE_BINARY_RHS
:
9939 ops
.op1
= gimple_assign_rhs2 (g
);
9941 /* Try to expand conditonal compare. */
9942 if (targetm
.gen_ccmp_first
)
9944 gcc_checking_assert (targetm
.gen_ccmp_next
!= NULL
);
9945 r
= expand_ccmp_expr (g
, mode
);
9950 case GIMPLE_UNARY_RHS
:
9951 ops
.op0
= gimple_assign_rhs1 (g
);
9952 ops
.type
= TREE_TYPE (gimple_assign_lhs (g
));
9954 r
= expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
9956 case GIMPLE_SINGLE_RHS
:
9958 r
= expand_expr_real (gimple_assign_rhs1 (g
), target
,
9959 tmode
, modifier
, alt_rtl
,
9966 set_curr_insn_location (saved_loc
);
9967 if (REG_P (r
) && !REG_EXPR (r
))
9968 set_reg_attrs_for_decl_rtl (SSA_NAME_VAR (exp
), r
);
9973 decl_rtl
= get_rtx_for_ssa_name (ssa_name
);
9974 exp
= SSA_NAME_VAR (ssa_name
);
9975 goto expand_decl_rtl
;
9979 /* If a static var's type was incomplete when the decl was written,
9980 but the type is complete now, lay out the decl now. */
9981 if (DECL_SIZE (exp
) == 0
9982 && COMPLETE_OR_UNBOUND_ARRAY_TYPE_P (TREE_TYPE (exp
))
9983 && (TREE_STATIC (exp
) || DECL_EXTERNAL (exp
)))
9984 layout_decl (exp
, 0);
9990 decl_rtl
= DECL_RTL (exp
);
9992 gcc_assert (decl_rtl
);
9994 /* DECL_MODE might change when TYPE_MODE depends on attribute target
9995 settings for VECTOR_TYPE_P that might switch for the function. */
9996 if (currently_expanding_to_rtl
9997 && code
== VAR_DECL
&& MEM_P (decl_rtl
)
9998 && VECTOR_TYPE_P (type
) && exp
&& DECL_MODE (exp
) != mode
)
9999 decl_rtl
= change_address (decl_rtl
, TYPE_MODE (type
), 0);
10001 decl_rtl
= copy_rtx (decl_rtl
);
10003 /* Record writes to register variables. */
10004 if (modifier
== EXPAND_WRITE
10005 && REG_P (decl_rtl
)
10006 && HARD_REGISTER_P (decl_rtl
))
10007 add_to_hard_reg_set (&crtl
->asm_clobbers
,
10008 GET_MODE (decl_rtl
), REGNO (decl_rtl
));
10010 /* Ensure variable marked as used even if it doesn't go through
10011 a parser. If it hasn't be used yet, write out an external
10014 TREE_USED (exp
) = 1;
10016 /* Show we haven't gotten RTL for this yet. */
10019 /* Variables inherited from containing functions should have
10020 been lowered by this point. */
10022 context
= decl_function_context (exp
);
10024 || SCOPE_FILE_SCOPE_P (context
)
10025 || context
== current_function_decl
10026 || TREE_STATIC (exp
)
10027 || DECL_EXTERNAL (exp
)
10028 /* ??? C++ creates functions that are not TREE_STATIC. */
10029 || TREE_CODE (exp
) == FUNCTION_DECL
);
10031 /* This is the case of an array whose size is to be determined
10032 from its initializer, while the initializer is still being parsed.
10033 ??? We aren't parsing while expanding anymore. */
10035 if (MEM_P (decl_rtl
) && REG_P (XEXP (decl_rtl
, 0)))
10036 temp
= validize_mem (decl_rtl
);
10038 /* If DECL_RTL is memory, we are in the normal case and the
10039 address is not valid, get the address into a register. */
10041 else if (MEM_P (decl_rtl
) && modifier
!= EXPAND_INITIALIZER
)
10044 *alt_rtl
= decl_rtl
;
10045 decl_rtl
= use_anchored_address (decl_rtl
);
10046 if (modifier
!= EXPAND_CONST_ADDRESS
10047 && modifier
!= EXPAND_SUM
10048 && !memory_address_addr_space_p (exp
? DECL_MODE (exp
)
10049 : GET_MODE (decl_rtl
),
10050 XEXP (decl_rtl
, 0),
10051 MEM_ADDR_SPACE (decl_rtl
)))
10052 temp
= replace_equiv_address (decl_rtl
,
10053 copy_rtx (XEXP (decl_rtl
, 0)));
10056 /* If we got something, return it. But first, set the alignment
10057 if the address is a register. */
10060 if (exp
&& MEM_P (temp
) && REG_P (XEXP (temp
, 0)))
10061 mark_reg_pointer (XEXP (temp
, 0), DECL_ALIGN (exp
));
10067 dmode
= DECL_MODE (exp
);
10069 dmode
= TYPE_MODE (TREE_TYPE (ssa_name
));
10071 /* If the mode of DECL_RTL does not match that of the decl,
10072 there are two cases: we are dealing with a BLKmode value
10073 that is returned in a register, or we are dealing with
10074 a promoted value. In the latter case, return a SUBREG
10075 of the wanted mode, but mark it so that we know that it
10076 was already extended. */
10077 if (REG_P (decl_rtl
)
10078 && dmode
!= BLKmode
10079 && GET_MODE (decl_rtl
) != dmode
)
10081 machine_mode pmode
;
10083 /* Get the signedness to be used for this variable. Ensure we get
10084 the same mode we got when the variable was declared. */
10085 if (code
!= SSA_NAME
)
10086 pmode
= promote_decl_mode (exp
, &unsignedp
);
10087 else if ((g
= SSA_NAME_DEF_STMT (ssa_name
))
10088 && gimple_code (g
) == GIMPLE_CALL
10089 && !gimple_call_internal_p (g
))
10090 pmode
= promote_function_mode (type
, mode
, &unsignedp
,
10091 gimple_call_fntype (g
),
10094 pmode
= promote_ssa_mode (ssa_name
, &unsignedp
);
10095 gcc_assert (GET_MODE (decl_rtl
) == pmode
);
10097 temp
= gen_lowpart_SUBREG (mode
, decl_rtl
);
10098 SUBREG_PROMOTED_VAR_P (temp
) = 1;
10099 SUBREG_PROMOTED_SET (temp
, unsignedp
);
10107 /* Given that TYPE_PRECISION (type) is not always equal to
10108 GET_MODE_PRECISION (TYPE_MODE (type)), we need to extend from
10109 the former to the latter according to the signedness of the
10111 scalar_int_mode mode
= SCALAR_INT_TYPE_MODE (type
);
10112 temp
= immed_wide_int_const
10113 (wi::to_wide (exp
, GET_MODE_PRECISION (mode
)), mode
);
10119 tree tmp
= NULL_TREE
;
10120 if (VECTOR_MODE_P (mode
))
10121 return const_vector_from_tree (exp
);
10122 scalar_int_mode int_mode
;
10123 if (is_int_mode (mode
, &int_mode
))
10125 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
10126 return const_scalar_mask_from_tree (int_mode
, exp
);
10130 = lang_hooks
.types
.type_for_mode (int_mode
, 1);
10132 tmp
= fold_unary_loc (loc
, VIEW_CONVERT_EXPR
,
10133 type_for_mode
, exp
);
10138 vec
<constructor_elt
, va_gc
> *v
;
10139 /* Constructors need to be fixed-length. FIXME. */
10140 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
10141 vec_alloc (v
, nunits
);
10142 for (unsigned int i
= 0; i
< nunits
; ++i
)
10143 CONSTRUCTOR_APPEND_ELT (v
, NULL_TREE
, VECTOR_CST_ELT (exp
, i
));
10144 tmp
= build_constructor (type
, v
);
10146 return expand_expr (tmp
, ignore
? const0_rtx
: target
,
10151 if (modifier
== EXPAND_WRITE
)
10153 /* Writing into CONST_DECL is always invalid, but handle it
10155 addr_space_t as
= TYPE_ADDR_SPACE (TREE_TYPE (exp
));
10156 scalar_int_mode address_mode
= targetm
.addr_space
.address_mode (as
);
10157 op0
= expand_expr_addr_expr_1 (exp
, NULL_RTX
, address_mode
,
10158 EXPAND_NORMAL
, as
);
10159 op0
= memory_address_addr_space (mode
, op0
, as
);
10160 temp
= gen_rtx_MEM (mode
, op0
);
10161 set_mem_addr_space (temp
, as
);
10164 return expand_expr (DECL_INITIAL (exp
), target
, VOIDmode
, modifier
);
10167 /* If optimized, generate immediate CONST_DOUBLE
10168 which will be turned into memory by reload if necessary.
10170 We used to force a register so that loop.c could see it. But
10171 this does not allow gen_* patterns to perform optimizations with
10172 the constants. It also produces two insns in cases like "x = 1.0;".
10173 On most machines, floating-point constants are not permitted in
10174 many insns, so we'd end up copying it to a register in any case.
10176 Now, we do the copying in expand_binop, if appropriate. */
10177 return const_double_from_real_value (TREE_REAL_CST (exp
),
10178 TYPE_MODE (TREE_TYPE (exp
)));
10181 return CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (exp
),
10182 TYPE_MODE (TREE_TYPE (exp
)));
10185 /* Handle evaluating a complex constant in a CONCAT target. */
10186 if (original_target
&& GET_CODE (original_target
) == CONCAT
)
10188 machine_mode mode
= TYPE_MODE (TREE_TYPE (TREE_TYPE (exp
)));
10191 rtarg
= XEXP (original_target
, 0);
10192 itarg
= XEXP (original_target
, 1);
10194 /* Move the real and imaginary parts separately. */
10195 op0
= expand_expr (TREE_REALPART (exp
), rtarg
, mode
, EXPAND_NORMAL
);
10196 op1
= expand_expr (TREE_IMAGPART (exp
), itarg
, mode
, EXPAND_NORMAL
);
10199 emit_move_insn (rtarg
, op0
);
10201 emit_move_insn (itarg
, op1
);
10203 return original_target
;
10209 temp
= expand_expr_constant (exp
, 1, modifier
);
10211 /* temp contains a constant address.
10212 On RISC machines where a constant address isn't valid,
10213 make some insns to get that address into a register. */
10214 if (modifier
!= EXPAND_CONST_ADDRESS
10215 && modifier
!= EXPAND_INITIALIZER
10216 && modifier
!= EXPAND_SUM
10217 && ! memory_address_addr_space_p (mode
, XEXP (temp
, 0),
10218 MEM_ADDR_SPACE (temp
)))
10219 return replace_equiv_address (temp
,
10220 copy_rtx (XEXP (temp
, 0)));
10224 return immed_wide_int_const (poly_int_cst_value (exp
), mode
);
10228 tree val
= treeop0
;
10229 rtx ret
= expand_expr_real_1 (val
, target
, tmode
, modifier
, alt_rtl
,
10230 inner_reference_p
);
10232 if (!SAVE_EXPR_RESOLVED_P (exp
))
10234 /* We can indeed still hit this case, typically via builtin
10235 expanders calling save_expr immediately before expanding
10236 something. Assume this means that we only have to deal
10237 with non-BLKmode values. */
10238 gcc_assert (GET_MODE (ret
) != BLKmode
);
10240 val
= build_decl (curr_insn_location (),
10241 VAR_DECL
, NULL
, TREE_TYPE (exp
));
10242 DECL_ARTIFICIAL (val
) = 1;
10243 DECL_IGNORED_P (val
) = 1;
10245 TREE_OPERAND (exp
, 0) = treeop0
;
10246 SAVE_EXPR_RESOLVED_P (exp
) = 1;
10248 if (!CONSTANT_P (ret
))
10249 ret
= copy_to_reg (ret
);
10250 SET_DECL_RTL (val
, ret
);
10258 /* If we don't need the result, just ensure we evaluate any
10262 unsigned HOST_WIDE_INT idx
;
10265 FOR_EACH_CONSTRUCTOR_VALUE (CONSTRUCTOR_ELTS (exp
), idx
, value
)
10266 expand_expr (value
, const0_rtx
, VOIDmode
, EXPAND_NORMAL
);
10271 return expand_constructor (exp
, target
, modifier
, false);
10273 case TARGET_MEM_REF
:
10276 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10277 enum insn_code icode
;
10278 unsigned int align
;
10280 op0
= addr_for_mem_ref (exp
, as
, true);
10281 op0
= memory_address_addr_space (mode
, op0
, as
);
10282 temp
= gen_rtx_MEM (mode
, op0
);
10283 set_mem_attributes (temp
, exp
, 0);
10284 set_mem_addr_space (temp
, as
);
10285 align
= get_object_alignment (exp
);
10286 if (modifier
!= EXPAND_WRITE
10287 && modifier
!= EXPAND_MEMORY
10289 && align
< GET_MODE_ALIGNMENT (mode
)
10290 /* If the target does not have special handling for unaligned
10291 loads of mode then it can use regular moves for them. */
10292 && ((icode
= optab_handler (movmisalign_optab
, mode
))
10293 != CODE_FOR_nothing
))
10295 struct expand_operand ops
[2];
10297 /* We've already validated the memory, and we're creating a
10298 new pseudo destination. The predicates really can't fail,
10299 nor can the generator. */
10300 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10301 create_fixed_operand (&ops
[1], temp
);
10302 expand_insn (icode
, 2, ops
);
10303 temp
= ops
[0].value
;
10310 const bool reverse
= REF_REVERSE_STORAGE_ORDER (exp
);
10312 = TYPE_ADDR_SPACE (TREE_TYPE (TREE_TYPE (TREE_OPERAND (exp
, 0))));
10313 machine_mode address_mode
;
10314 tree base
= TREE_OPERAND (exp
, 0);
10316 enum insn_code icode
;
10318 /* Handle expansion of non-aliased memory with non-BLKmode. That
10319 might end up in a register. */
10320 if (mem_ref_refers_to_non_mem_p (exp
))
10322 poly_int64 offset
= mem_ref_offset (exp
).force_shwi ();
10323 base
= TREE_OPERAND (base
, 0);
10324 poly_uint64 type_size
;
10325 if (known_eq (offset
, 0)
10327 && poly_int_tree_p (TYPE_SIZE (type
), &type_size
)
10328 && known_eq (GET_MODE_BITSIZE (DECL_MODE (base
)), type_size
))
10329 return expand_expr (build1 (VIEW_CONVERT_EXPR
, type
, base
),
10330 target
, tmode
, modifier
);
10331 if (TYPE_MODE (type
) == BLKmode
)
10333 temp
= assign_stack_temp (DECL_MODE (base
),
10334 GET_MODE_SIZE (DECL_MODE (base
)));
10335 store_expr (base
, temp
, 0, false, false);
10336 temp
= adjust_address (temp
, BLKmode
, offset
);
10337 set_mem_size (temp
, int_size_in_bytes (type
));
10340 exp
= build3 (BIT_FIELD_REF
, type
, base
, TYPE_SIZE (type
),
10341 bitsize_int (offset
* BITS_PER_UNIT
));
10342 REF_REVERSE_STORAGE_ORDER (exp
) = reverse
;
10343 return expand_expr (exp
, target
, tmode
, modifier
);
10345 address_mode
= targetm
.addr_space
.address_mode (as
);
10346 base
= TREE_OPERAND (exp
, 0);
10347 if ((def_stmt
= get_def_for_expr (base
, BIT_AND_EXPR
)))
10349 tree mask
= gimple_assign_rhs2 (def_stmt
);
10350 base
= build2 (BIT_AND_EXPR
, TREE_TYPE (base
),
10351 gimple_assign_rhs1 (def_stmt
), mask
);
10352 TREE_OPERAND (exp
, 0) = base
;
10354 align
= get_object_alignment (exp
);
10355 op0
= expand_expr (base
, NULL_RTX
, VOIDmode
, EXPAND_SUM
);
10356 op0
= memory_address_addr_space (mode
, op0
, as
);
10357 if (!integer_zerop (TREE_OPERAND (exp
, 1)))
10359 rtx off
= immed_wide_int_const (mem_ref_offset (exp
), address_mode
);
10360 op0
= simplify_gen_binary (PLUS
, address_mode
, op0
, off
);
10361 op0
= memory_address_addr_space (mode
, op0
, as
);
10363 temp
= gen_rtx_MEM (mode
, op0
);
10364 set_mem_attributes (temp
, exp
, 0);
10365 set_mem_addr_space (temp
, as
);
10366 if (TREE_THIS_VOLATILE (exp
))
10367 MEM_VOLATILE_P (temp
) = 1;
10368 if (modifier
!= EXPAND_WRITE
10369 && modifier
!= EXPAND_MEMORY
10370 && !inner_reference_p
10372 && align
< GET_MODE_ALIGNMENT (mode
))
10374 if ((icode
= optab_handler (movmisalign_optab
, mode
))
10375 != CODE_FOR_nothing
)
10377 struct expand_operand ops
[2];
10379 /* We've already validated the memory, and we're creating a
10380 new pseudo destination. The predicates really can't fail,
10381 nor can the generator. */
10382 create_output_operand (&ops
[0], NULL_RTX
, mode
);
10383 create_fixed_operand (&ops
[1], temp
);
10384 expand_insn (icode
, 2, ops
);
10385 temp
= ops
[0].value
;
10387 else if (targetm
.slow_unaligned_access (mode
, align
))
10388 temp
= extract_bit_field (temp
, GET_MODE_BITSIZE (mode
),
10389 0, TYPE_UNSIGNED (TREE_TYPE (exp
)),
10390 (modifier
== EXPAND_STACK_PARM
10391 ? NULL_RTX
: target
),
10392 mode
, mode
, false, alt_rtl
);
10395 && modifier
!= EXPAND_MEMORY
10396 && modifier
!= EXPAND_WRITE
)
10397 temp
= flip_storage_order (mode
, temp
);
10404 tree array
= treeop0
;
10405 tree index
= treeop1
;
10408 /* Fold an expression like: "foo"[2].
10409 This is not done in fold so it won't happen inside &.
10410 Don't fold if this is for wide characters since it's too
10411 difficult to do correctly and this is a very rare case. */
10413 if (modifier
!= EXPAND_CONST_ADDRESS
10414 && modifier
!= EXPAND_INITIALIZER
10415 && modifier
!= EXPAND_MEMORY
)
10417 tree t
= fold_read_from_constant_string (exp
);
10420 return expand_expr (t
, target
, tmode
, modifier
);
10423 /* If this is a constant index into a constant array,
10424 just get the value from the array. Handle both the cases when
10425 we have an explicit constructor and when our operand is a variable
10426 that was declared const. */
10428 if (modifier
!= EXPAND_CONST_ADDRESS
10429 && modifier
!= EXPAND_INITIALIZER
10430 && modifier
!= EXPAND_MEMORY
10431 && TREE_CODE (array
) == CONSTRUCTOR
10432 && ! TREE_SIDE_EFFECTS (array
)
10433 && TREE_CODE (index
) == INTEGER_CST
)
10435 unsigned HOST_WIDE_INT ix
;
10438 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (array
), ix
,
10440 if (tree_int_cst_equal (field
, index
))
10442 if (!TREE_SIDE_EFFECTS (value
))
10443 return expand_expr (fold (value
), target
, tmode
, modifier
);
10448 else if (optimize
>= 1
10449 && modifier
!= EXPAND_CONST_ADDRESS
10450 && modifier
!= EXPAND_INITIALIZER
10451 && modifier
!= EXPAND_MEMORY
10452 && TREE_READONLY (array
) && ! TREE_SIDE_EFFECTS (array
)
10453 && TREE_CODE (index
) == INTEGER_CST
10454 && (VAR_P (array
) || TREE_CODE (array
) == CONST_DECL
)
10455 && (init
= ctor_for_folding (array
)) != error_mark_node
)
10457 if (init
== NULL_TREE
)
10459 tree value
= build_zero_cst (type
);
10460 if (TREE_CODE (value
) == CONSTRUCTOR
)
10462 /* If VALUE is a CONSTRUCTOR, this optimization is only
10463 useful if this doesn't store the CONSTRUCTOR into
10464 memory. If it does, it is more efficient to just
10465 load the data from the array directly. */
10466 rtx ret
= expand_constructor (value
, target
,
10468 if (ret
== NULL_RTX
)
10473 return expand_expr (value
, target
, tmode
, modifier
);
10475 else if (TREE_CODE (init
) == CONSTRUCTOR
)
10477 unsigned HOST_WIDE_INT ix
;
10480 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (init
), ix
,
10482 if (tree_int_cst_equal (field
, index
))
10484 if (TREE_SIDE_EFFECTS (value
))
10487 if (TREE_CODE (value
) == CONSTRUCTOR
)
10489 /* If VALUE is a CONSTRUCTOR, this
10490 optimization is only useful if
10491 this doesn't store the CONSTRUCTOR
10492 into memory. If it does, it is more
10493 efficient to just load the data from
10494 the array directly. */
10495 rtx ret
= expand_constructor (value
, target
,
10497 if (ret
== NULL_RTX
)
10502 expand_expr (fold (value
), target
, tmode
, modifier
);
10505 else if (TREE_CODE (init
) == STRING_CST
)
10507 tree low_bound
= array_ref_low_bound (exp
);
10508 tree index1
= fold_convert_loc (loc
, sizetype
, treeop1
);
10510 /* Optimize the special case of a zero lower bound.
10512 We convert the lower bound to sizetype to avoid problems
10513 with constant folding. E.g. suppose the lower bound is
10514 1 and its mode is QI. Without the conversion
10515 (ARRAY + (INDEX - (unsigned char)1))
10517 (ARRAY + (-(unsigned char)1) + INDEX)
10519 (ARRAY + 255 + INDEX). Oops! */
10520 if (!integer_zerop (low_bound
))
10521 index1
= size_diffop_loc (loc
, index1
,
10522 fold_convert_loc (loc
, sizetype
,
10525 if (tree_fits_uhwi_p (index1
)
10526 && compare_tree_int (index1
, TREE_STRING_LENGTH (init
)) < 0)
10528 tree type
= TREE_TYPE (TREE_TYPE (init
));
10529 scalar_int_mode mode
;
10531 if (is_int_mode (TYPE_MODE (type
), &mode
)
10532 && GET_MODE_SIZE (mode
) == 1)
10533 return gen_int_mode (TREE_STRING_POINTER (init
)
10534 [TREE_INT_CST_LOW (index1
)],
10540 goto normal_inner_ref
;
10542 case COMPONENT_REF
:
10543 /* If the operand is a CONSTRUCTOR, we can just extract the
10544 appropriate field if it is present. */
10545 if (TREE_CODE (treeop0
) == CONSTRUCTOR
)
10547 unsigned HOST_WIDE_INT idx
;
10549 scalar_int_mode field_mode
;
10551 FOR_EACH_CONSTRUCTOR_ELT (CONSTRUCTOR_ELTS (treeop0
),
10553 if (field
== treeop1
10554 /* We can normally use the value of the field in the
10555 CONSTRUCTOR. However, if this is a bitfield in
10556 an integral mode that we can fit in a HOST_WIDE_INT,
10557 we must mask only the number of bits in the bitfield,
10558 since this is done implicitly by the constructor. If
10559 the bitfield does not meet either of those conditions,
10560 we can't do this optimization. */
10561 && (! DECL_BIT_FIELD (field
)
10562 || (is_int_mode (DECL_MODE (field
), &field_mode
)
10563 && (GET_MODE_PRECISION (field_mode
)
10564 <= HOST_BITS_PER_WIDE_INT
))))
10566 if (DECL_BIT_FIELD (field
)
10567 && modifier
== EXPAND_STACK_PARM
)
10569 op0
= expand_expr (value
, target
, tmode
, modifier
);
10570 if (DECL_BIT_FIELD (field
))
10572 HOST_WIDE_INT bitsize
= TREE_INT_CST_LOW (DECL_SIZE (field
));
10573 scalar_int_mode imode
10574 = SCALAR_INT_TYPE_MODE (TREE_TYPE (field
));
10576 if (TYPE_UNSIGNED (TREE_TYPE (field
)))
10578 op1
= gen_int_mode ((HOST_WIDE_INT_1
<< bitsize
) - 1,
10580 op0
= expand_and (imode
, op0
, op1
, target
);
10584 int count
= GET_MODE_PRECISION (imode
) - bitsize
;
10586 op0
= expand_shift (LSHIFT_EXPR
, imode
, op0
, count
,
10588 op0
= expand_shift (RSHIFT_EXPR
, imode
, op0
, count
,
10596 goto normal_inner_ref
;
10598 case BIT_FIELD_REF
:
10599 case ARRAY_RANGE_REF
:
10602 machine_mode mode1
, mode2
;
10603 poly_int64 bitsize
, bitpos
, bytepos
;
10605 int reversep
, volatilep
= 0, must_force_mem
;
10607 = get_inner_reference (exp
, &bitsize
, &bitpos
, &offset
, &mode1
,
10608 &unsignedp
, &reversep
, &volatilep
);
10609 rtx orig_op0
, memloc
;
10610 bool clear_mem_expr
= false;
10612 /* If we got back the original object, something is wrong. Perhaps
10613 we are evaluating an expression too early. In any event, don't
10614 infinitely recurse. */
10615 gcc_assert (tem
!= exp
);
10617 /* If TEM's type is a union of variable size, pass TARGET to the inner
10618 computation, since it will need a temporary and TARGET is known
10619 to have to do. This occurs in unchecked conversion in Ada. */
10621 = expand_expr_real (tem
,
10622 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
10623 && COMPLETE_TYPE_P (TREE_TYPE (tem
))
10624 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
10626 && modifier
!= EXPAND_STACK_PARM
10627 ? target
: NULL_RTX
),
10629 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
10632 /* If the field has a mode, we want to access it in the
10633 field's mode, not the computed mode.
10634 If a MEM has VOIDmode (external with incomplete type),
10635 use BLKmode for it instead. */
10638 if (mode1
!= VOIDmode
)
10639 op0
= adjust_address (op0
, mode1
, 0);
10640 else if (GET_MODE (op0
) == VOIDmode
)
10641 op0
= adjust_address (op0
, BLKmode
, 0);
10645 = CONSTANT_P (op0
) ? TYPE_MODE (TREE_TYPE (tem
)) : GET_MODE (op0
);
10647 /* Make sure bitpos is not negative, it can wreak havoc later. */
10648 if (maybe_lt (bitpos
, 0))
10650 gcc_checking_assert (offset
== NULL_TREE
);
10651 offset
= size_int (bits_to_bytes_round_down (bitpos
));
10652 bitpos
= num_trailing_bits (bitpos
);
10655 /* If we have either an offset, a BLKmode result, or a reference
10656 outside the underlying object, we must force it to memory.
10657 Such a case can occur in Ada if we have unchecked conversion
10658 of an expression from a scalar type to an aggregate type or
10659 for an ARRAY_RANGE_REF whose type is BLKmode, or if we were
10660 passed a partially uninitialized object or a view-conversion
10661 to a larger size. */
10662 must_force_mem
= (offset
10663 || mode1
== BLKmode
10664 || (mode
== BLKmode
10665 && !int_mode_for_size (bitsize
, 1).exists ())
10666 || maybe_gt (bitpos
+ bitsize
,
10667 GET_MODE_BITSIZE (mode2
)));
10669 /* Handle CONCAT first. */
10670 if (GET_CODE (op0
) == CONCAT
&& !must_force_mem
)
10672 if (known_eq (bitpos
, 0)
10673 && known_eq (bitsize
, GET_MODE_BITSIZE (GET_MODE (op0
)))
10674 && COMPLEX_MODE_P (mode1
)
10675 && COMPLEX_MODE_P (GET_MODE (op0
))
10676 && (GET_MODE_PRECISION (GET_MODE_INNER (mode1
))
10677 == GET_MODE_PRECISION (GET_MODE_INNER (GET_MODE (op0
)))))
10680 op0
= flip_storage_order (GET_MODE (op0
), op0
);
10681 if (mode1
!= GET_MODE (op0
))
10684 for (int i
= 0; i
< 2; i
++)
10686 rtx op
= read_complex_part (op0
, i
!= 0);
10687 if (GET_CODE (op
) == SUBREG
)
10688 op
= force_reg (GET_MODE (op
), op
);
10689 rtx temp
= gen_lowpart_common (GET_MODE_INNER (mode1
),
10695 if (!REG_P (op
) && !MEM_P (op
))
10696 op
= force_reg (GET_MODE (op
), op
);
10697 op
= gen_lowpart (GET_MODE_INNER (mode1
), op
);
10701 op0
= gen_rtx_CONCAT (mode1
, parts
[0], parts
[1]);
10705 if (known_eq (bitpos
, 0)
10706 && known_eq (bitsize
,
10707 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10708 && maybe_ne (bitsize
, 0))
10710 op0
= XEXP (op0
, 0);
10711 mode2
= GET_MODE (op0
);
10713 else if (known_eq (bitpos
,
10714 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 0))))
10715 && known_eq (bitsize
,
10716 GET_MODE_BITSIZE (GET_MODE (XEXP (op0
, 1))))
10717 && maybe_ne (bitpos
, 0)
10718 && maybe_ne (bitsize
, 0))
10720 op0
= XEXP (op0
, 1);
10722 mode2
= GET_MODE (op0
);
10725 /* Otherwise force into memory. */
10726 must_force_mem
= 1;
10729 /* If this is a constant, put it in a register if it is a legitimate
10730 constant and we don't need a memory reference. */
10731 if (CONSTANT_P (op0
)
10732 && mode2
!= BLKmode
10733 && targetm
.legitimate_constant_p (mode2
, op0
)
10734 && !must_force_mem
)
10735 op0
= force_reg (mode2
, op0
);
10737 /* Otherwise, if this is a constant, try to force it to the constant
10738 pool. Note that back-ends, e.g. MIPS, may refuse to do so if it
10739 is a legitimate constant. */
10740 else if (CONSTANT_P (op0
) && (memloc
= force_const_mem (mode2
, op0
)))
10741 op0
= validize_mem (memloc
);
10743 /* Otherwise, if this is a constant or the object is not in memory
10744 and need be, put it there. */
10745 else if (CONSTANT_P (op0
) || (!MEM_P (op0
) && must_force_mem
))
10747 memloc
= assign_temp (TREE_TYPE (tem
), 1, 1);
10748 emit_move_insn (memloc
, op0
);
10750 clear_mem_expr
= true;
10755 machine_mode address_mode
;
10756 rtx offset_rtx
= expand_expr (offset
, NULL_RTX
, VOIDmode
,
10759 gcc_assert (MEM_P (op0
));
10761 address_mode
= get_address_mode (op0
);
10762 if (GET_MODE (offset_rtx
) != address_mode
)
10764 /* We cannot be sure that the RTL in offset_rtx is valid outside
10765 of a memory address context, so force it into a register
10766 before attempting to convert it to the desired mode. */
10767 offset_rtx
= force_operand (offset_rtx
, NULL_RTX
);
10768 offset_rtx
= convert_to_mode (address_mode
, offset_rtx
, 0);
10771 /* See the comment in expand_assignment for the rationale. */
10772 if (mode1
!= VOIDmode
10773 && maybe_ne (bitpos
, 0)
10774 && maybe_gt (bitsize
, 0)
10775 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
10776 && multiple_p (bitpos
, bitsize
)
10777 && multiple_p (bitsize
, GET_MODE_ALIGNMENT (mode1
))
10778 && MEM_ALIGN (op0
) >= GET_MODE_ALIGNMENT (mode1
))
10780 op0
= adjust_address (op0
, mode1
, bytepos
);
10784 op0
= offset_address (op0
, offset_rtx
,
10785 highest_pow2_factor (offset
));
10788 /* If OFFSET is making OP0 more aligned than BIGGEST_ALIGNMENT,
10789 record its alignment as BIGGEST_ALIGNMENT. */
10791 && known_eq (bitpos
, 0)
10793 && is_aligning_offset (offset
, tem
))
10794 set_mem_align (op0
, BIGGEST_ALIGNMENT
);
10796 /* Don't forget about volatility even if this is a bitfield. */
10797 if (MEM_P (op0
) && volatilep
&& ! MEM_VOLATILE_P (op0
))
10799 if (op0
== orig_op0
)
10800 op0
= copy_rtx (op0
);
10802 MEM_VOLATILE_P (op0
) = 1;
10805 /* In cases where an aligned union has an unaligned object
10806 as a field, we might be extracting a BLKmode value from
10807 an integer-mode (e.g., SImode) object. Handle this case
10808 by doing the extract into an object as wide as the field
10809 (which we know to be the width of a basic mode), then
10810 storing into memory, and changing the mode to BLKmode. */
10811 if (mode1
== VOIDmode
10812 || REG_P (op0
) || GET_CODE (op0
) == SUBREG
10813 || (mode1
!= BLKmode
&& ! direct_load
[(int) mode1
]
10814 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_INT
10815 && GET_MODE_CLASS (mode
) != MODE_COMPLEX_FLOAT
10816 && modifier
!= EXPAND_CONST_ADDRESS
10817 && modifier
!= EXPAND_INITIALIZER
10818 && modifier
!= EXPAND_MEMORY
)
10819 /* If the bitfield is volatile and the bitsize
10820 is narrower than the access size of the bitfield,
10821 we need to extract bitfields from the access. */
10822 || (volatilep
&& TREE_CODE (exp
) == COMPONENT_REF
10823 && DECL_BIT_FIELD_TYPE (TREE_OPERAND (exp
, 1))
10824 && mode1
!= BLKmode
10825 && maybe_lt (bitsize
, GET_MODE_SIZE (mode1
) * BITS_PER_UNIT
))
10826 /* If the field isn't aligned enough to fetch as a memref,
10827 fetch it as a bit field. */
10828 || (mode1
!= BLKmode
10830 ? MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode1
)
10831 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode1
))
10832 : TYPE_ALIGN (TREE_TYPE (tem
)) < GET_MODE_ALIGNMENT (mode
)
10833 || !multiple_p (bitpos
, GET_MODE_ALIGNMENT (mode
)))
10834 && modifier
!= EXPAND_MEMORY
10835 && ((modifier
== EXPAND_CONST_ADDRESS
10836 || modifier
== EXPAND_INITIALIZER
)
10838 : targetm
.slow_unaligned_access (mode1
,
10840 || !multiple_p (bitpos
, BITS_PER_UNIT
)))
10841 /* If the type and the field are a constant size and the
10842 size of the type isn't the same size as the bitfield,
10843 we must use bitfield operations. */
10844 || (known_size_p (bitsize
)
10845 && TYPE_SIZE (TREE_TYPE (exp
))
10846 && poly_int_tree_p (TYPE_SIZE (TREE_TYPE (exp
)))
10847 && maybe_ne (wi::to_poly_offset (TYPE_SIZE (TREE_TYPE (exp
))),
10850 machine_mode ext_mode
= mode
;
10852 if (ext_mode
== BLKmode
10853 && ! (target
!= 0 && MEM_P (op0
)
10855 && multiple_p (bitpos
, BITS_PER_UNIT
)))
10856 ext_mode
= int_mode_for_size (bitsize
, 1).else_blk ();
10858 if (ext_mode
== BLKmode
)
10861 target
= assign_temp (type
, 1, 1);
10863 /* ??? Unlike the similar test a few lines below, this one is
10864 very likely obsolete. */
10865 if (known_eq (bitsize
, 0))
10868 /* In this case, BITPOS must start at a byte boundary and
10869 TARGET, if specified, must be a MEM. */
10870 gcc_assert (MEM_P (op0
)
10871 && (!target
|| MEM_P (target
)));
10873 bytepos
= exact_div (bitpos
, BITS_PER_UNIT
);
10874 poly_int64 bytesize
= bits_to_bytes_round_up (bitsize
);
10875 emit_block_move (target
,
10876 adjust_address (op0
, VOIDmode
, bytepos
),
10877 gen_int_mode (bytesize
, Pmode
),
10878 (modifier
== EXPAND_STACK_PARM
10879 ? BLOCK_OP_CALL_PARM
: BLOCK_OP_NORMAL
));
10884 /* If we have nothing to extract, the result will be 0 for targets
10885 with SHIFT_COUNT_TRUNCATED == 0 and garbage otherwise. Always
10886 return 0 for the sake of consistency, as reading a zero-sized
10887 bitfield is valid in Ada and the value is fully specified. */
10888 if (known_eq (bitsize
, 0))
10891 op0
= validize_mem (op0
);
10893 if (MEM_P (op0
) && REG_P (XEXP (op0
, 0)))
10894 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10896 /* If the result has aggregate type and the extraction is done in
10897 an integral mode, then the field may be not aligned on a byte
10898 boundary; in this case, if it has reverse storage order, it
10899 needs to be extracted as a scalar field with reverse storage
10900 order and put back into memory order afterwards. */
10901 if (AGGREGATE_TYPE_P (type
)
10902 && GET_MODE_CLASS (ext_mode
) == MODE_INT
)
10903 reversep
= TYPE_REVERSE_STORAGE_ORDER (type
);
10905 gcc_checking_assert (known_ge (bitpos
, 0));
10906 op0
= extract_bit_field (op0
, bitsize
, bitpos
, unsignedp
,
10907 (modifier
== EXPAND_STACK_PARM
10908 ? NULL_RTX
: target
),
10909 ext_mode
, ext_mode
, reversep
, alt_rtl
);
10911 /* If the result has aggregate type and the mode of OP0 is an
10912 integral mode then, if BITSIZE is narrower than this mode
10913 and this is for big-endian data, we must put the field
10914 into the high-order bits. And we must also put it back
10915 into memory order if it has been previously reversed. */
10916 scalar_int_mode op0_mode
;
10917 if (AGGREGATE_TYPE_P (type
)
10918 && is_int_mode (GET_MODE (op0
), &op0_mode
))
10920 HOST_WIDE_INT size
= GET_MODE_BITSIZE (op0_mode
);
10922 gcc_checking_assert (known_le (bitsize
, size
));
10923 if (maybe_lt (bitsize
, size
)
10924 && reversep
? !BYTES_BIG_ENDIAN
: BYTES_BIG_ENDIAN
)
10925 op0
= expand_shift (LSHIFT_EXPR
, op0_mode
, op0
,
10926 size
- bitsize
, op0
, 1);
10929 op0
= flip_storage_order (op0_mode
, op0
);
10932 /* If the result type is BLKmode, store the data into a temporary
10933 of the appropriate type, but with the mode corresponding to the
10934 mode for the data we have (op0's mode). */
10935 if (mode
== BLKmode
)
10938 = assign_stack_temp_for_type (ext_mode
,
10939 GET_MODE_BITSIZE (ext_mode
),
10941 emit_move_insn (new_rtx
, op0
);
10942 op0
= copy_rtx (new_rtx
);
10943 PUT_MODE (op0
, BLKmode
);
10949 /* If the result is BLKmode, use that to access the object
10951 if (mode
== BLKmode
)
10954 /* Get a reference to just this component. */
10955 bytepos
= bits_to_bytes_round_down (bitpos
);
10956 if (modifier
== EXPAND_CONST_ADDRESS
10957 || modifier
== EXPAND_SUM
|| modifier
== EXPAND_INITIALIZER
)
10958 op0
= adjust_address_nv (op0
, mode1
, bytepos
);
10960 op0
= adjust_address (op0
, mode1
, bytepos
);
10962 if (op0
== orig_op0
)
10963 op0
= copy_rtx (op0
);
10965 /* Don't set memory attributes if the base expression is
10966 SSA_NAME that got expanded as a MEM. In that case, we should
10967 just honor its original memory attributes. */
10968 if (TREE_CODE (tem
) != SSA_NAME
|| !MEM_P (orig_op0
))
10969 set_mem_attributes (op0
, exp
, 0);
10971 if (REG_P (XEXP (op0
, 0)))
10972 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
10974 /* If op0 is a temporary because the original expressions was forced
10975 to memory, clear MEM_EXPR so that the original expression cannot
10976 be marked as addressable through MEM_EXPR of the temporary. */
10977 if (clear_mem_expr
)
10978 set_mem_expr (op0
, NULL_TREE
);
10980 MEM_VOLATILE_P (op0
) |= volatilep
;
10983 && modifier
!= EXPAND_MEMORY
10984 && modifier
!= EXPAND_WRITE
)
10985 op0
= flip_storage_order (mode1
, op0
);
10987 if (mode
== mode1
|| mode1
== BLKmode
|| mode1
== tmode
10988 || modifier
== EXPAND_CONST_ADDRESS
10989 || modifier
== EXPAND_INITIALIZER
)
10993 target
= gen_reg_rtx (tmode
!= VOIDmode
? tmode
: mode
);
10995 convert_move (target
, op0
, unsignedp
);
11000 return expand_expr (OBJ_TYPE_REF_EXPR (exp
), target
, tmode
, modifier
);
11003 /* All valid uses of __builtin_va_arg_pack () are removed during
11005 if (CALL_EXPR_VA_ARG_PACK (exp
))
11006 error ("%Kinvalid use of %<__builtin_va_arg_pack ()%>", exp
);
11008 tree fndecl
= get_callee_fndecl (exp
), attr
;
11011 /* Don't diagnose the error attribute in thunks, those are
11012 artificially created. */
11013 && !CALL_FROM_THUNK_P (exp
)
11014 && (attr
= lookup_attribute ("error",
11015 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11017 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11018 error ("%Kcall to %qs declared with attribute error: %s", exp
,
11019 identifier_to_locale (ident
),
11020 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11023 /* Don't diagnose the warning attribute in thunks, those are
11024 artificially created. */
11025 && !CALL_FROM_THUNK_P (exp
)
11026 && (attr
= lookup_attribute ("warning",
11027 DECL_ATTRIBUTES (fndecl
))) != NULL
)
11029 const char *ident
= lang_hooks
.decl_printable_name (fndecl
, 1);
11030 warning_at (tree_nonartificial_location (exp
),
11031 OPT_Wattribute_warning
,
11032 "%Kcall to %qs declared with attribute warning: %s",
11033 exp
, identifier_to_locale (ident
),
11034 TREE_STRING_POINTER (TREE_VALUE (TREE_VALUE (attr
))));
11037 /* Check for a built-in function. */
11038 if (fndecl
&& fndecl_built_in_p (fndecl
))
11040 gcc_assert (DECL_BUILT_IN_CLASS (fndecl
) != BUILT_IN_FRONTEND
);
11041 return expand_builtin (exp
, target
, subtarget
, tmode
, ignore
);
11044 return expand_call (exp
, target
, ignore
);
11046 case VIEW_CONVERT_EXPR
:
11049 /* If we are converting to BLKmode, try to avoid an intermediate
11050 temporary by fetching an inner memory reference. */
11051 if (mode
== BLKmode
11052 && poly_int_tree_p (TYPE_SIZE (type
))
11053 && TYPE_MODE (TREE_TYPE (treeop0
)) != BLKmode
11054 && handled_component_p (treeop0
))
11056 machine_mode mode1
;
11057 poly_int64 bitsize
, bitpos
, bytepos
;
11059 int unsignedp
, reversep
, volatilep
= 0;
11061 = get_inner_reference (treeop0
, &bitsize
, &bitpos
, &offset
, &mode1
,
11062 &unsignedp
, &reversep
, &volatilep
);
11065 /* ??? We should work harder and deal with non-zero offsets. */
11067 && multiple_p (bitpos
, BITS_PER_UNIT
, &bytepos
)
11069 && known_size_p (bitsize
)
11070 && known_eq (wi::to_poly_offset (TYPE_SIZE (type
)), bitsize
))
11072 /* See the normal_inner_ref case for the rationale. */
11074 = expand_expr_real (tem
,
11075 (TREE_CODE (TREE_TYPE (tem
)) == UNION_TYPE
11076 && (TREE_CODE (TYPE_SIZE (TREE_TYPE (tem
)))
11078 && modifier
!= EXPAND_STACK_PARM
11079 ? target
: NULL_RTX
),
11081 modifier
== EXPAND_SUM
? EXPAND_NORMAL
: modifier
,
11084 if (MEM_P (orig_op0
))
11088 /* Get a reference to just this component. */
11089 if (modifier
== EXPAND_CONST_ADDRESS
11090 || modifier
== EXPAND_SUM
11091 || modifier
== EXPAND_INITIALIZER
)
11092 op0
= adjust_address_nv (op0
, mode
, bytepos
);
11094 op0
= adjust_address (op0
, mode
, bytepos
);
11096 if (op0
== orig_op0
)
11097 op0
= copy_rtx (op0
);
11099 set_mem_attributes (op0
, treeop0
, 0);
11100 if (REG_P (XEXP (op0
, 0)))
11101 mark_reg_pointer (XEXP (op0
, 0), MEM_ALIGN (op0
));
11103 MEM_VOLATILE_P (op0
) |= volatilep
;
11109 op0
= expand_expr_real (treeop0
, NULL_RTX
, VOIDmode
, modifier
,
11110 NULL
, inner_reference_p
);
11112 /* If the input and output modes are both the same, we are done. */
11113 if (mode
== GET_MODE (op0
))
11115 /* If neither mode is BLKmode, and both modes are the same size
11116 then we can use gen_lowpart. */
11117 else if (mode
!= BLKmode
11118 && GET_MODE (op0
) != BLKmode
11119 && known_eq (GET_MODE_PRECISION (mode
),
11120 GET_MODE_PRECISION (GET_MODE (op0
)))
11121 && !COMPLEX_MODE_P (GET_MODE (op0
)))
11123 if (GET_CODE (op0
) == SUBREG
)
11124 op0
= force_reg (GET_MODE (op0
), op0
);
11125 temp
= gen_lowpart_common (mode
, op0
);
11130 if (!REG_P (op0
) && !MEM_P (op0
))
11131 op0
= force_reg (GET_MODE (op0
), op0
);
11132 op0
= gen_lowpart (mode
, op0
);
11135 /* If both types are integral, convert from one mode to the other. */
11136 else if (INTEGRAL_TYPE_P (type
) && INTEGRAL_TYPE_P (TREE_TYPE (treeop0
)))
11137 op0
= convert_modes (mode
, GET_MODE (op0
), op0
,
11138 TYPE_UNSIGNED (TREE_TYPE (treeop0
)));
11139 /* If the output type is a bit-field type, do an extraction. */
11140 else if (reduce_bit_field
)
11141 return extract_bit_field (op0
, TYPE_PRECISION (type
), 0,
11142 TYPE_UNSIGNED (type
), NULL_RTX
,
11143 mode
, mode
, false, NULL
);
11144 /* As a last resort, spill op0 to memory, and reload it in a
11146 else if (!MEM_P (op0
))
11148 /* If the operand is not a MEM, force it into memory. Since we
11149 are going to be changing the mode of the MEM, don't call
11150 force_const_mem for constants because we don't allow pool
11151 constants to change mode. */
11152 tree inner_type
= TREE_TYPE (treeop0
);
11154 gcc_assert (!TREE_ADDRESSABLE (exp
));
11156 if (target
== 0 || GET_MODE (target
) != TYPE_MODE (inner_type
))
11158 = assign_stack_temp_for_type
11159 (TYPE_MODE (inner_type
),
11160 GET_MODE_SIZE (TYPE_MODE (inner_type
)), inner_type
);
11162 emit_move_insn (target
, op0
);
11166 /* If OP0 is (now) a MEM, we need to deal with alignment issues. If the
11167 output type is such that the operand is known to be aligned, indicate
11168 that it is. Otherwise, we need only be concerned about alignment for
11169 non-BLKmode results. */
11172 enum insn_code icode
;
11174 if (modifier
!= EXPAND_WRITE
11175 && modifier
!= EXPAND_MEMORY
11176 && !inner_reference_p
11178 && MEM_ALIGN (op0
) < GET_MODE_ALIGNMENT (mode
))
11180 /* If the target does have special handling for unaligned
11181 loads of mode then use them. */
11182 if ((icode
= optab_handler (movmisalign_optab
, mode
))
11183 != CODE_FOR_nothing
)
11187 op0
= adjust_address (op0
, mode
, 0);
11188 /* We've already validated the memory, and we're creating a
11189 new pseudo destination. The predicates really can't
11191 reg
= gen_reg_rtx (mode
);
11193 /* Nor can the insn generator. */
11194 rtx_insn
*insn
= GEN_FCN (icode
) (reg
, op0
);
11198 else if (STRICT_ALIGNMENT
)
11200 poly_uint64 mode_size
= GET_MODE_SIZE (mode
);
11201 poly_uint64 temp_size
= mode_size
;
11202 if (GET_MODE (op0
) != BLKmode
)
11203 temp_size
= upper_bound (temp_size
,
11204 GET_MODE_SIZE (GET_MODE (op0
)));
11206 = assign_stack_temp_for_type (mode
, temp_size
, type
);
11207 rtx new_with_op0_mode
11208 = adjust_address (new_rtx
, GET_MODE (op0
), 0);
11210 gcc_assert (!TREE_ADDRESSABLE (exp
));
11212 if (GET_MODE (op0
) == BLKmode
)
11214 rtx size_rtx
= gen_int_mode (mode_size
, Pmode
);
11215 emit_block_move (new_with_op0_mode
, op0
, size_rtx
,
11216 (modifier
== EXPAND_STACK_PARM
11217 ? BLOCK_OP_CALL_PARM
11218 : BLOCK_OP_NORMAL
));
11221 emit_move_insn (new_with_op0_mode
, op0
);
11227 op0
= adjust_address (op0
, mode
, 0);
11234 tree lhs
= treeop0
;
11235 tree rhs
= treeop1
;
11236 gcc_assert (ignore
);
11238 /* Check for |= or &= of a bitfield of size one into another bitfield
11239 of size 1. In this case, (unless we need the result of the
11240 assignment) we can do this more efficiently with a
11241 test followed by an assignment, if necessary.
11243 ??? At this point, we can't get a BIT_FIELD_REF here. But if
11244 things change so we do, this code should be enhanced to
11246 if (TREE_CODE (lhs
) == COMPONENT_REF
11247 && (TREE_CODE (rhs
) == BIT_IOR_EXPR
11248 || TREE_CODE (rhs
) == BIT_AND_EXPR
)
11249 && TREE_OPERAND (rhs
, 0) == lhs
11250 && TREE_CODE (TREE_OPERAND (rhs
, 1)) == COMPONENT_REF
11251 && integer_onep (DECL_SIZE (TREE_OPERAND (lhs
, 1)))
11252 && integer_onep (DECL_SIZE (TREE_OPERAND (TREE_OPERAND (rhs
, 1), 1))))
11254 rtx_code_label
*label
= gen_label_rtx ();
11255 int value
= TREE_CODE (rhs
) == BIT_IOR_EXPR
;
11256 profile_probability prob
= profile_probability::uninitialized ();
11258 jumpifnot (TREE_OPERAND (rhs
, 1), label
, prob
);
11260 jumpif (TREE_OPERAND (rhs
, 1), label
, prob
);
11261 expand_assignment (lhs
, build_int_cst (TREE_TYPE (rhs
), value
),
11263 do_pending_stack_adjust ();
11264 emit_label (label
);
11268 expand_assignment (lhs
, rhs
, false);
11273 return expand_expr_addr_expr (exp
, target
, tmode
, modifier
);
11275 case REALPART_EXPR
:
11276 op0
= expand_normal (treeop0
);
11277 return read_complex_part (op0
, false);
11279 case IMAGPART_EXPR
:
11280 op0
= expand_normal (treeop0
);
11281 return read_complex_part (op0
, true);
11288 /* Expanded in cfgexpand.c. */
11289 gcc_unreachable ();
11291 case TRY_CATCH_EXPR
:
11293 case EH_FILTER_EXPR
:
11294 case TRY_FINALLY_EXPR
:
11295 /* Lowered by tree-eh.c. */
11296 gcc_unreachable ();
11298 case WITH_CLEANUP_EXPR
:
11299 case CLEANUP_POINT_EXPR
:
11301 case CASE_LABEL_EXPR
:
11306 case COMPOUND_EXPR
:
11307 case PREINCREMENT_EXPR
:
11308 case PREDECREMENT_EXPR
:
11309 case POSTINCREMENT_EXPR
:
11310 case POSTDECREMENT_EXPR
:
11313 case COMPOUND_LITERAL_EXPR
:
11314 /* Lowered by gimplify.c. */
11315 gcc_unreachable ();
11318 /* Function descriptors are not valid except for as
11319 initialization constants, and should not be expanded. */
11320 gcc_unreachable ();
11322 case WITH_SIZE_EXPR
:
11323 /* WITH_SIZE_EXPR expands to its first argument. The caller should
11324 have pulled out the size to use in whatever context it needed. */
11325 return expand_expr_real (treeop0
, original_target
, tmode
,
11326 modifier
, alt_rtl
, inner_reference_p
);
11329 return expand_expr_real_2 (&ops
, target
, tmode
, modifier
);
11333 /* Subroutine of above: reduce EXP to the precision of TYPE (in the
11334 signedness of TYPE), possibly returning the result in TARGET.
11335 TYPE is known to be a partial integer type. */
11337 reduce_to_bit_field_precision (rtx exp
, rtx target
, tree type
)
11339 HOST_WIDE_INT prec
= TYPE_PRECISION (type
);
11340 if (target
&& GET_MODE (target
) != GET_MODE (exp
))
11342 /* For constant values, reduce using build_int_cst_type. */
11343 poly_int64 const_exp
;
11344 if (poly_int_rtx_p (exp
, &const_exp
))
11346 tree t
= build_int_cst_type (type
, const_exp
);
11347 return expand_expr (t
, target
, VOIDmode
, EXPAND_NORMAL
);
11349 else if (TYPE_UNSIGNED (type
))
11351 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11352 rtx mask
= immed_wide_int_const
11353 (wi::mask (prec
, false, GET_MODE_PRECISION (mode
)), mode
);
11354 return expand_and (mode
, exp
, mask
, target
);
11358 scalar_int_mode mode
= as_a
<scalar_int_mode
> (GET_MODE (exp
));
11359 int count
= GET_MODE_PRECISION (mode
) - prec
;
11360 exp
= expand_shift (LSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11361 return expand_shift (RSHIFT_EXPR
, mode
, exp
, count
, target
, 0);
11365 /* Subroutine of above: returns 1 if OFFSET corresponds to an offset that
11366 when applied to the address of EXP produces an address known to be
11367 aligned more than BIGGEST_ALIGNMENT. */
11370 is_aligning_offset (const_tree offset
, const_tree exp
)
11372 /* Strip off any conversions. */
11373 while (CONVERT_EXPR_P (offset
))
11374 offset
= TREE_OPERAND (offset
, 0);
11376 /* We must now have a BIT_AND_EXPR with a constant that is one less than
11377 power of 2 and which is larger than BIGGEST_ALIGNMENT. */
11378 if (TREE_CODE (offset
) != BIT_AND_EXPR
11379 || !tree_fits_uhwi_p (TREE_OPERAND (offset
, 1))
11380 || compare_tree_int (TREE_OPERAND (offset
, 1),
11381 BIGGEST_ALIGNMENT
/ BITS_PER_UNIT
) <= 0
11382 || !pow2p_hwi (tree_to_uhwi (TREE_OPERAND (offset
, 1)) + 1))
11385 /* Look at the first operand of BIT_AND_EXPR and strip any conversion.
11386 It must be NEGATE_EXPR. Then strip any more conversions. */
11387 offset
= TREE_OPERAND (offset
, 0);
11388 while (CONVERT_EXPR_P (offset
))
11389 offset
= TREE_OPERAND (offset
, 0);
11391 if (TREE_CODE (offset
) != NEGATE_EXPR
)
11394 offset
= TREE_OPERAND (offset
, 0);
11395 while (CONVERT_EXPR_P (offset
))
11396 offset
= TREE_OPERAND (offset
, 0);
11398 /* This must now be the address of EXP. */
11399 return TREE_CODE (offset
) == ADDR_EXPR
&& TREE_OPERAND (offset
, 0) == exp
;
11402 /* Return the tree node if an ARG corresponds to a string constant or zero
11403 if it doesn't. If we return nonzero, set *PTR_OFFSET to the (possibly
11404 non-constant) offset in bytes within the string that ARG is accessing.
11405 If MEM_SIZE is non-zero the storage size of the memory is returned.
11406 If DECL is non-zero the constant declaration is returned if available. */
11409 string_constant (tree arg
, tree
*ptr_offset
, tree
*mem_size
, tree
*decl
)
11414 /* Non-constant index into the character array in an ARRAY_REF
11415 expression or null. */
11416 tree varidx
= NULL_TREE
;
11418 poly_int64 base_off
= 0;
11420 if (TREE_CODE (arg
) == ADDR_EXPR
)
11422 arg
= TREE_OPERAND (arg
, 0);
11424 if (TREE_CODE (arg
) == ARRAY_REF
)
11426 tree idx
= TREE_OPERAND (arg
, 1);
11427 if (TREE_CODE (idx
) != INTEGER_CST
)
11429 /* From a pointer (but not array) argument extract the variable
11430 index to prevent get_addr_base_and_unit_offset() from failing
11431 due to it. Use it later to compute the non-constant offset
11432 into the string and return it to the caller. */
11434 ref
= TREE_OPERAND (arg
, 0);
11436 if (TREE_CODE (TREE_TYPE (arg
)) == ARRAY_TYPE
)
11439 if (!integer_zerop (array_ref_low_bound (arg
)))
11442 if (!integer_onep (array_ref_element_size (arg
)))
11446 array
= get_addr_base_and_unit_offset (ref
, &base_off
);
11448 || (TREE_CODE (array
) != VAR_DECL
11449 && TREE_CODE (array
) != CONST_DECL
11450 && TREE_CODE (array
) != STRING_CST
))
11453 else if (TREE_CODE (arg
) == PLUS_EXPR
|| TREE_CODE (arg
) == POINTER_PLUS_EXPR
)
11455 tree arg0
= TREE_OPERAND (arg
, 0);
11456 tree arg1
= TREE_OPERAND (arg
, 1);
11459 tree str
= string_constant (arg0
, &offset
, mem_size
, decl
);
11462 str
= string_constant (arg1
, &offset
, mem_size
, decl
);
11468 /* Avoid pointers to arrays (see bug 86622). */
11469 if (POINTER_TYPE_P (TREE_TYPE (arg
))
11470 && TREE_CODE (TREE_TYPE (TREE_TYPE (arg
))) == ARRAY_TYPE
11471 && !(decl
&& !*decl
)
11472 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11473 && mem_size
&& tree_fits_uhwi_p (*mem_size
)
11474 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11477 tree type
= TREE_TYPE (offset
);
11478 arg1
= fold_convert (type
, arg1
);
11479 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, arg1
);
11484 else if (TREE_CODE (arg
) == SSA_NAME
)
11486 gimple
*stmt
= SSA_NAME_DEF_STMT (arg
);
11487 if (!is_gimple_assign (stmt
))
11490 tree rhs1
= gimple_assign_rhs1 (stmt
);
11491 tree_code code
= gimple_assign_rhs_code (stmt
);
11492 if (code
== ADDR_EXPR
)
11493 return string_constant (rhs1
, ptr_offset
, mem_size
, decl
);
11494 else if (code
!= POINTER_PLUS_EXPR
)
11498 if (tree str
= string_constant (rhs1
, &offset
, mem_size
, decl
))
11500 /* Avoid pointers to arrays (see bug 86622). */
11501 if (POINTER_TYPE_P (TREE_TYPE (rhs1
))
11502 && TREE_CODE (TREE_TYPE (TREE_TYPE (rhs1
))) == ARRAY_TYPE
11503 && !(decl
&& !*decl
)
11504 && !(decl
&& tree_fits_uhwi_p (DECL_SIZE_UNIT (*decl
))
11505 && mem_size
&& tree_fits_uhwi_p (*mem_size
)
11506 && tree_int_cst_equal (*mem_size
, DECL_SIZE_UNIT (*decl
))))
11509 tree rhs2
= gimple_assign_rhs2 (stmt
);
11510 tree type
= TREE_TYPE (offset
);
11511 rhs2
= fold_convert (type
, rhs2
);
11512 *ptr_offset
= fold_build2 (PLUS_EXPR
, type
, offset
, rhs2
);
11517 else if (DECL_P (arg
))
11522 tree offset
= wide_int_to_tree (sizetype
, base_off
);
11525 if (TREE_CODE (TREE_TYPE (array
)) != ARRAY_TYPE
)
11528 gcc_assert (TREE_CODE (arg
) == ARRAY_REF
);
11529 tree chartype
= TREE_TYPE (TREE_TYPE (TREE_OPERAND (arg
, 0)));
11530 if (TREE_CODE (chartype
) != INTEGER_TYPE
)
11533 offset
= fold_convert (sizetype
, varidx
);
11536 if (TREE_CODE (array
) == STRING_CST
)
11538 *ptr_offset
= fold_convert (sizetype
, offset
);
11540 *mem_size
= TYPE_SIZE_UNIT (TREE_TYPE (array
));
11543 gcc_checking_assert (tree_to_shwi (TYPE_SIZE_UNIT (TREE_TYPE (array
)))
11544 >= TREE_STRING_LENGTH (array
));
11548 if (!VAR_P (array
) && TREE_CODE (array
) != CONST_DECL
)
11551 tree init
= ctor_for_folding (array
);
11553 /* Handle variables initialized with string literals. */
11554 if (!init
|| init
== error_mark_node
)
11556 if (TREE_CODE (init
) == CONSTRUCTOR
)
11558 /* Convert the 64-bit constant offset to a wider type to avoid
11561 if (!base_off
.is_constant (&wioff
))
11564 wioff
*= BITS_PER_UNIT
;
11565 if (!wi::fits_uhwi_p (wioff
))
11568 base_off
= wioff
.to_uhwi ();
11569 unsigned HOST_WIDE_INT fieldoff
= 0;
11570 init
= fold_ctor_reference (NULL_TREE
, init
, base_off
, 0, array
,
11572 HOST_WIDE_INT cstoff
;
11573 if (!base_off
.is_constant (&cstoff
))
11576 cstoff
= (cstoff
- fieldoff
) / BITS_PER_UNIT
;
11577 tree off
= build_int_cst (sizetype
, cstoff
);
11579 offset
= fold_build2 (PLUS_EXPR
, TREE_TYPE (offset
), offset
, off
);
11587 *ptr_offset
= offset
;
11589 tree eltype
= TREE_TYPE (init
);
11590 tree initsize
= TYPE_SIZE_UNIT (eltype
);
11592 *mem_size
= initsize
;
11597 if (TREE_CODE (init
) == INTEGER_CST
11598 && (TREE_CODE (TREE_TYPE (array
)) == INTEGER_TYPE
11599 || TYPE_MAIN_VARIANT (eltype
) == char_type_node
))
11601 /* For a reference to (address of) a single constant character,
11602 store the native representation of the character in CHARBUF.
11603 If the reference is to an element of an array or a member
11604 of a struct, only consider narrow characters until ctors
11605 for wide character arrays are transformed to STRING_CSTs
11606 like those for narrow arrays. */
11607 unsigned char charbuf
[MAX_BITSIZE_MODE_ANY_MODE
/ BITS_PER_UNIT
];
11608 int len
= native_encode_expr (init
, charbuf
, sizeof charbuf
, 0);
11611 /* Construct a string literal with elements of ELTYPE and
11612 the representation above. Then strip
11613 the ADDR_EXPR (ARRAY_REF (...)) around the STRING_CST. */
11614 init
= build_string_literal (len
, (char *)charbuf
, eltype
);
11615 init
= TREE_OPERAND (TREE_OPERAND (init
, 0), 0);
11619 if (TREE_CODE (init
) != STRING_CST
)
11622 gcc_checking_assert (tree_to_shwi (initsize
) >= TREE_STRING_LENGTH (init
));
11627 /* Compute the modular multiplicative inverse of A modulo M
11628 using extended Euclid's algorithm. Assumes A and M are coprime. */
11630 mod_inv (const wide_int
&a
, const wide_int
&b
)
11632 /* Verify the assumption. */
11633 gcc_checking_assert (wi::eq_p (wi::gcd (a
, b
), 1));
11635 unsigned int p
= a
.get_precision () + 1;
11636 gcc_checking_assert (b
.get_precision () + 1 == p
);
11637 wide_int c
= wide_int::from (a
, p
, UNSIGNED
);
11638 wide_int d
= wide_int::from (b
, p
, UNSIGNED
);
11639 wide_int x0
= wide_int::from (0, p
, UNSIGNED
);
11640 wide_int x1
= wide_int::from (1, p
, UNSIGNED
);
11642 if (wi::eq_p (b
, 1))
11643 return wide_int::from (1, p
, UNSIGNED
);
11645 while (wi::gt_p (c
, 1, UNSIGNED
))
11648 wide_int q
= wi::divmod_trunc (c
, d
, UNSIGNED
, &d
);
11651 x0
= wi::sub (x1
, wi::mul (q
, x0
));
11654 if (wi::lt_p (x1
, 0, SIGNED
))
11659 /* Optimize x % C1 == C2 for signed modulo if C1 is a power of two and C2
11660 is non-zero and C3 ((1<<(prec-1)) | (C1 - 1)):
11661 for C2 > 0 to x & C3 == C2
11662 for C2 < 0 to x & C3 == (C2 & C3). */
11664 maybe_optimize_pow2p_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11666 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11667 tree treeop0
= gimple_assign_rhs1 (stmt
);
11668 tree treeop1
= gimple_assign_rhs2 (stmt
);
11669 tree type
= TREE_TYPE (*arg0
);
11670 scalar_int_mode mode
;
11671 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11673 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11674 || TYPE_PRECISION (type
) <= 1
11675 || TYPE_UNSIGNED (type
)
11676 /* Signed x % c == 0 should have been optimized into unsigned modulo
11678 || integer_zerop (*arg1
)
11679 /* If c is known to be non-negative, modulo will be expanded as unsigned
11681 || get_range_pos_neg (treeop0
) == 1)
11684 /* x % c == d where d < 0 && d <= -c should be always false. */
11685 if (tree_int_cst_sgn (*arg1
) == -1
11686 && -wi::to_widest (treeop1
) >= wi::to_widest (*arg1
))
11689 int prec
= TYPE_PRECISION (type
);
11690 wide_int w
= wi::to_wide (treeop1
) - 1;
11691 w
|= wi::shifted_mask (0, prec
- 1, true, prec
);
11692 tree c3
= wide_int_to_tree (type
, w
);
11694 if (tree_int_cst_sgn (*arg1
) == -1)
11695 c4
= wide_int_to_tree (type
, w
& wi::to_wide (*arg1
));
11697 rtx op0
= expand_normal (treeop0
);
11698 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11700 bool speed_p
= optimize_insn_for_speed_p ();
11702 do_pending_stack_adjust ();
11704 location_t loc
= gimple_location (stmt
);
11705 struct separate_ops ops
;
11706 ops
.code
= TRUNC_MOD_EXPR
;
11707 ops
.location
= loc
;
11708 ops
.type
= TREE_TYPE (treeop0
);
11711 ops
.op2
= NULL_TREE
;
11713 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11715 rtx_insn
*moinsns
= get_insns ();
11718 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11719 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11720 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11722 ops
.code
= BIT_AND_EXPR
;
11723 ops
.location
= loc
;
11724 ops
.type
= TREE_TYPE (treeop0
);
11727 ops
.op2
= NULL_TREE
;
11729 rtx mur
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11731 rtx_insn
*muinsns
= get_insns ();
11734 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11735 mucost
+= rtx_cost (mur
, mode
, EQ
, 0, speed_p
);
11736 mucost
+= rtx_cost (expand_normal (c4
), mode
, EQ
, 1, speed_p
);
11738 if (mocost
<= mucost
)
11740 emit_insn (moinsns
);
11741 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11745 emit_insn (muinsns
);
11746 *arg0
= make_tree (TREE_TYPE (*arg0
), mur
);
11751 /* Attempt to optimize unsigned (X % C1) == C2 (or (X % C1) != C2).
11753 (X - C2) * C3 <= C4 (or >), where
11754 C3 is modular multiplicative inverse of C1 and 1<<prec and
11755 C4 is ((1<<prec) - 1) / C1 or ((1<<prec) - 1) / C1 - 1 (the latter
11756 if C2 > ((1<<prec) - 1) % C1).
11757 If C1 is even, S = ctz (C1) and C2 is 0, use
11758 ((X * C3) r>> S) <= C4, where C3 is modular multiplicative
11759 inverse of C1>>S and 1<<prec and C4 is (((1<<prec) - 1) / (C1>>S)) >> S.
11761 For signed (X % C1) == 0 if C1 is odd to (all operations in it
11763 (X * C3) + C4 <= 2 * C4, where
11764 C3 is modular multiplicative inverse of (unsigned) C1 and 1<<prec and
11765 C4 is ((1<<(prec - 1) - 1) / C1).
11766 If C1 is even, S = ctz(C1), use
11767 ((X * C3) + C4) r>> S <= (C4 >> (S - 1))
11768 where C3 is modular multiplicative inverse of (unsigned)(C1>>S) and 1<<prec
11769 and C4 is ((1<<(prec - 1) - 1) / (C1>>S)) & (-1<<S).
11771 See the Hacker's Delight book, section 10-17. */
11773 maybe_optimize_mod_cmp (enum tree_code code
, tree
*arg0
, tree
*arg1
)
11775 gcc_checking_assert (code
== EQ_EXPR
|| code
== NE_EXPR
);
11776 gcc_checking_assert (TREE_CODE (*arg1
) == INTEGER_CST
);
11781 gimple
*stmt
= get_def_for_expr (*arg0
, TRUNC_MOD_EXPR
);
11785 tree treeop0
= gimple_assign_rhs1 (stmt
);
11786 tree treeop1
= gimple_assign_rhs2 (stmt
);
11787 if (TREE_CODE (treeop0
) != SSA_NAME
11788 || TREE_CODE (treeop1
) != INTEGER_CST
11789 /* Don't optimize the undefined behavior case x % 0;
11790 x % 1 should have been optimized into zero, punt if
11791 it makes it here for whatever reason;
11792 x % -c should have been optimized into x % c. */
11793 || compare_tree_int (treeop1
, 2) <= 0
11794 /* Likewise x % c == d where d >= c should be always false. */
11795 || tree_int_cst_le (treeop1
, *arg1
))
11798 /* Unsigned x % pow2 is handled right already, for signed
11799 modulo handle it in maybe_optimize_pow2p_mod_cmp. */
11800 if (integer_pow2p (treeop1
))
11801 return maybe_optimize_pow2p_mod_cmp (code
, arg0
, arg1
);
11803 tree type
= TREE_TYPE (*arg0
);
11804 scalar_int_mode mode
;
11805 if (!is_a
<scalar_int_mode
> (TYPE_MODE (type
), &mode
))
11807 if (GET_MODE_BITSIZE (mode
) != TYPE_PRECISION (type
)
11808 || TYPE_PRECISION (type
) <= 1)
11811 signop sgn
= UNSIGNED
;
11812 /* If both operands are known to have the sign bit clear, handle
11813 even the signed modulo case as unsigned. treeop1 is always
11814 positive >= 2, checked above. */
11815 if (!TYPE_UNSIGNED (type
) && get_range_pos_neg (treeop0
) != 1)
11818 if (!TYPE_UNSIGNED (type
))
11820 if (tree_int_cst_sgn (*arg1
) == -1)
11822 type
= unsigned_type_for (type
);
11823 if (!type
|| TYPE_MODE (type
) != TYPE_MODE (TREE_TYPE (*arg0
)))
11827 int prec
= TYPE_PRECISION (type
);
11828 wide_int w
= wi::to_wide (treeop1
);
11829 int shift
= wi::ctz (w
);
11830 /* Unsigned (X % C1) == C2 is equivalent to (X - C2) % C1 == 0 if
11831 C2 <= -1U % C1, because for any Z >= 0U - C2 in that case (Z % C1) != 0.
11832 If C1 is odd, we can handle all cases by subtracting
11833 C4 below. We could handle even the even C1 and C2 > -1U % C1 cases
11834 e.g. by testing for overflow on the subtraction, punt on that for now
11836 if ((sgn
== SIGNED
|| shift
) && !integer_zerop (*arg1
))
11840 wide_int x
= wi::umod_trunc (wi::mask (prec
, false, prec
), w
);
11841 if (wi::gtu_p (wi::to_wide (*arg1
), x
))
11845 imm_use_iterator imm_iter
;
11846 use_operand_p use_p
;
11847 FOR_EACH_IMM_USE_FAST (use_p
, imm_iter
, treeop0
)
11849 gimple
*use_stmt
= USE_STMT (use_p
);
11850 /* Punt if treeop0 is used in the same bb in a division
11851 or another modulo with the same divisor. We should expect
11852 the division and modulo combined together. */
11853 if (use_stmt
== stmt
11854 || gimple_bb (use_stmt
) != gimple_bb (stmt
))
11856 if (!is_gimple_assign (use_stmt
)
11857 || (gimple_assign_rhs_code (use_stmt
) != TRUNC_DIV_EXPR
11858 && gimple_assign_rhs_code (use_stmt
) != TRUNC_MOD_EXPR
))
11860 if (gimple_assign_rhs1 (use_stmt
) != treeop0
11861 || !operand_equal_p (gimple_assign_rhs2 (use_stmt
), treeop1
, 0))
11866 w
= wi::lrshift (w
, shift
);
11867 wide_int a
= wide_int::from (w
, prec
+ 1, UNSIGNED
);
11868 wide_int b
= wi::shifted_mask (prec
, 1, false, prec
+ 1);
11869 wide_int m
= wide_int::from (mod_inv (a
, b
), prec
, UNSIGNED
);
11870 tree c3
= wide_int_to_tree (type
, m
);
11871 tree c5
= NULL_TREE
;
11873 if (sgn
== UNSIGNED
)
11875 d
= wi::divmod_trunc (wi::mask (prec
, false, prec
), w
, UNSIGNED
, &e
);
11876 /* Use <= floor ((1<<prec) - 1) / C1 only if C2 <= ((1<<prec) - 1) % C1,
11877 otherwise use < or subtract one from C4. E.g. for
11878 x % 3U == 0 we transform this into x * 0xaaaaaaab <= 0x55555555, but
11879 x % 3U == 1 already needs to be
11880 (x - 1) * 0xaaaaaaabU <= 0x55555554. */
11881 if (!shift
&& wi::gtu_p (wi::to_wide (*arg1
), e
))
11884 d
= wi::lrshift (d
, shift
);
11888 e
= wi::udiv_trunc (wi::mask (prec
- 1, false, prec
), w
);
11890 d
= wi::lshift (e
, 1);
11893 e
= wi::bit_and (e
, wi::mask (shift
, true, prec
));
11894 d
= wi::lrshift (e
, shift
- 1);
11896 c5
= wide_int_to_tree (type
, e
);
11898 tree c4
= wide_int_to_tree (type
, d
);
11900 rtx op0
= expand_normal (treeop0
);
11901 treeop0
= make_tree (TREE_TYPE (treeop0
), op0
);
11903 bool speed_p
= optimize_insn_for_speed_p ();
11905 do_pending_stack_adjust ();
11907 location_t loc
= gimple_location (stmt
);
11908 struct separate_ops ops
;
11909 ops
.code
= TRUNC_MOD_EXPR
;
11910 ops
.location
= loc
;
11911 ops
.type
= TREE_TYPE (treeop0
);
11914 ops
.op2
= NULL_TREE
;
11916 rtx mor
= expand_expr_real_2 (&ops
, NULL_RTX
, TYPE_MODE (ops
.type
),
11918 rtx_insn
*moinsns
= get_insns ();
11921 unsigned mocost
= seq_cost (moinsns
, speed_p
);
11922 mocost
+= rtx_cost (mor
, mode
, EQ
, 0, speed_p
);
11923 mocost
+= rtx_cost (expand_normal (*arg1
), mode
, EQ
, 1, speed_p
);
11925 tree t
= fold_convert_loc (loc
, type
, treeop0
);
11926 if (!integer_zerop (*arg1
))
11927 t
= fold_build2_loc (loc
, MINUS_EXPR
, type
, t
, fold_convert (type
, *arg1
));
11928 t
= fold_build2_loc (loc
, MULT_EXPR
, type
, t
, c3
);
11930 t
= fold_build2_loc (loc
, PLUS_EXPR
, type
, t
, c5
);
11933 tree s
= build_int_cst (NULL_TREE
, shift
);
11934 t
= fold_build2_loc (loc
, RROTATE_EXPR
, type
, t
, s
);
11938 rtx mur
= expand_normal (t
);
11939 rtx_insn
*muinsns
= get_insns ();
11942 unsigned mucost
= seq_cost (muinsns
, speed_p
);
11943 mucost
+= rtx_cost (mur
, mode
, LE
, 0, speed_p
);
11944 mucost
+= rtx_cost (expand_normal (c4
), mode
, LE
, 1, speed_p
);
11946 if (mocost
<= mucost
)
11948 emit_insn (moinsns
);
11949 *arg0
= make_tree (TREE_TYPE (*arg0
), mor
);
11953 emit_insn (muinsns
);
11954 *arg0
= make_tree (type
, mur
);
11956 return code
== EQ_EXPR
? LE_EXPR
: GT_EXPR
;
11959 /* Generate code to calculate OPS, and exploded expression
11960 using a store-flag instruction and return an rtx for the result.
11961 OPS reflects a comparison.
11963 If TARGET is nonzero, store the result there if convenient.
11965 Return zero if there is no suitable set-flag instruction
11966 available on this machine.
11968 Once expand_expr has been called on the arguments of the comparison,
11969 we are committed to doing the store flag, since it is not safe to
11970 re-evaluate the expression. We emit the store-flag insn by calling
11971 emit_store_flag, but only expand the arguments if we have a reason
11972 to believe that emit_store_flag will be successful. If we think that
11973 it will, but it isn't, we have to simulate the store-flag with a
11974 set/jump/set sequence. */
11977 do_store_flag (sepops ops
, rtx target
, machine_mode mode
)
11979 enum rtx_code code
;
11980 tree arg0
, arg1
, type
;
11981 machine_mode operand_mode
;
11984 rtx subtarget
= target
;
11985 location_t loc
= ops
->location
;
11990 /* Don't crash if the comparison was erroneous. */
11991 if (arg0
== error_mark_node
|| arg1
== error_mark_node
)
11994 type
= TREE_TYPE (arg0
);
11995 operand_mode
= TYPE_MODE (type
);
11996 unsignedp
= TYPE_UNSIGNED (type
);
11998 /* We won't bother with BLKmode store-flag operations because it would mean
11999 passing a lot of information to emit_store_flag. */
12000 if (operand_mode
== BLKmode
)
12003 /* We won't bother with store-flag operations involving function pointers
12004 when function pointers must be canonicalized before comparisons. */
12005 if (targetm
.have_canonicalize_funcptr_for_compare ()
12006 && ((POINTER_TYPE_P (TREE_TYPE (arg0
))
12007 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg0
))))
12008 || (POINTER_TYPE_P (TREE_TYPE (arg1
))
12009 && FUNC_OR_METHOD_TYPE_P (TREE_TYPE (TREE_TYPE (arg1
))))))
12015 /* For vector typed comparisons emit code to generate the desired
12016 all-ones or all-zeros mask. Conveniently use the VEC_COND_EXPR
12017 expander for this. */
12018 if (TREE_CODE (ops
->type
) == VECTOR_TYPE
)
12020 tree ifexp
= build2 (ops
->code
, ops
->type
, arg0
, arg1
);
12021 if (VECTOR_BOOLEAN_TYPE_P (ops
->type
)
12022 && expand_vec_cmp_expr_p (TREE_TYPE (arg0
), ops
->type
, ops
->code
))
12023 return expand_vec_cmp_expr (ops
->type
, ifexp
, target
);
12026 tree if_true
= constant_boolean_node (true, ops
->type
);
12027 tree if_false
= constant_boolean_node (false, ops
->type
);
12028 return expand_vec_cond_expr (ops
->type
, ifexp
, if_true
,
12033 /* Optimize (x % C1) == C2 or (x % C1) != C2 if it is beneficial
12034 into (x - C2) * C3 < C4. */
12035 if ((ops
->code
== EQ_EXPR
|| ops
->code
== NE_EXPR
)
12036 && TREE_CODE (arg0
) == SSA_NAME
12037 && TREE_CODE (arg1
) == INTEGER_CST
)
12039 enum tree_code code
= maybe_optimize_mod_cmp (ops
->code
, &arg0
, &arg1
);
12040 if (code
!= ops
->code
)
12042 struct separate_ops nops
= *ops
;
12043 nops
.code
= ops
->code
= code
;
12046 nops
.type
= TREE_TYPE (arg0
);
12047 return do_store_flag (&nops
, target
, mode
);
12051 /* Get the rtx comparison code to use. We know that EXP is a comparison
12052 operation of some type. Some comparisons against 1 and -1 can be
12053 converted to comparisons with zero. Do so here so that the tests
12054 below will be aware that we have a comparison with zero. These
12055 tests will not catch constants in the first operand, but constants
12056 are rarely passed as the first operand. */
12067 if (integer_onep (arg1
))
12068 arg1
= integer_zero_node
, code
= unsignedp
? LEU
: LE
;
12070 code
= unsignedp
? LTU
: LT
;
12073 if (! unsignedp
&& integer_all_onesp (arg1
))
12074 arg1
= integer_zero_node
, code
= LT
;
12076 code
= unsignedp
? LEU
: LE
;
12079 if (! unsignedp
&& integer_all_onesp (arg1
))
12080 arg1
= integer_zero_node
, code
= GE
;
12082 code
= unsignedp
? GTU
: GT
;
12085 if (integer_onep (arg1
))
12086 arg1
= integer_zero_node
, code
= unsignedp
? GTU
: GT
;
12088 code
= unsignedp
? GEU
: GE
;
12091 case UNORDERED_EXPR
:
12117 gcc_unreachable ();
12120 /* Put a constant second. */
12121 if (TREE_CODE (arg0
) == REAL_CST
|| TREE_CODE (arg0
) == INTEGER_CST
12122 || TREE_CODE (arg0
) == FIXED_CST
)
12124 std::swap (arg0
, arg1
);
12125 code
= swap_condition (code
);
12128 /* If this is an equality or inequality test of a single bit, we can
12129 do this by shifting the bit being tested to the low-order bit and
12130 masking the result with the constant 1. If the condition was EQ,
12131 we xor it with 1. This does not require an scc insn and is faster
12132 than an scc insn even if we have it.
12134 The code to make this transformation was moved into fold_single_bit_test,
12135 so we just call into the folder and expand its result. */
12137 if ((code
== NE
|| code
== EQ
)
12138 && integer_zerop (arg1
)
12139 && (TYPE_PRECISION (ops
->type
) != 1 || TYPE_UNSIGNED (ops
->type
)))
12141 gimple
*srcstmt
= get_def_for_expr (arg0
, BIT_AND_EXPR
);
12143 && integer_pow2p (gimple_assign_rhs2 (srcstmt
)))
12145 enum tree_code tcode
= code
== NE
? NE_EXPR
: EQ_EXPR
;
12146 tree type
= lang_hooks
.types
.type_for_mode (mode
, unsignedp
);
12147 tree temp
= fold_build2_loc (loc
, BIT_AND_EXPR
, TREE_TYPE (arg1
),
12148 gimple_assign_rhs1 (srcstmt
),
12149 gimple_assign_rhs2 (srcstmt
));
12150 temp
= fold_single_bit_test (loc
, tcode
, temp
, arg1
, type
);
12152 return expand_expr (temp
, target
, VOIDmode
, EXPAND_NORMAL
);
12156 if (! get_subtarget (target
)
12157 || GET_MODE (subtarget
) != operand_mode
)
12160 expand_operands (arg0
, arg1
, subtarget
, &op0
, &op1
, EXPAND_NORMAL
);
12163 target
= gen_reg_rtx (mode
);
12165 /* Try a cstore if possible. */
12166 return emit_store_flag_force (target
, code
, op0
, op1
,
12167 operand_mode
, unsignedp
,
12168 (TYPE_PRECISION (ops
->type
) == 1
12169 && !TYPE_UNSIGNED (ops
->type
)) ? -1 : 1);
12172 /* Attempt to generate a casesi instruction. Returns 1 if successful,
12173 0 otherwise (i.e. if there is no casesi instruction).
12175 DEFAULT_PROBABILITY is the probability of jumping to the default
12178 try_casesi (tree index_type
, tree index_expr
, tree minval
, tree range
,
12179 rtx table_label
, rtx default_label
, rtx fallback_label
,
12180 profile_probability default_probability
)
12182 struct expand_operand ops
[5];
12183 scalar_int_mode index_mode
= SImode
;
12184 rtx op1
, op2
, index
;
12186 if (! targetm
.have_casesi ())
12189 /* The index must be some form of integer. Convert it to SImode. */
12190 scalar_int_mode omode
= SCALAR_INT_TYPE_MODE (index_type
);
12191 if (GET_MODE_BITSIZE (omode
) > GET_MODE_BITSIZE (index_mode
))
12193 rtx rangertx
= expand_normal (range
);
12195 /* We must handle the endpoints in the original mode. */
12196 index_expr
= build2 (MINUS_EXPR
, index_type
,
12197 index_expr
, minval
);
12198 minval
= integer_zero_node
;
12199 index
= expand_normal (index_expr
);
12201 emit_cmp_and_jump_insns (rangertx
, index
, LTU
, NULL_RTX
,
12202 omode
, 1, default_label
,
12203 default_probability
);
12204 /* Now we can safely truncate. */
12205 index
= convert_to_mode (index_mode
, index
, 0);
12209 if (omode
!= index_mode
)
12211 index_type
= lang_hooks
.types
.type_for_mode (index_mode
, 0);
12212 index_expr
= fold_convert (index_type
, index_expr
);
12215 index
= expand_normal (index_expr
);
12218 do_pending_stack_adjust ();
12220 op1
= expand_normal (minval
);
12221 op2
= expand_normal (range
);
12223 create_input_operand (&ops
[0], index
, index_mode
);
12224 create_convert_operand_from_type (&ops
[1], op1
, TREE_TYPE (minval
));
12225 create_convert_operand_from_type (&ops
[2], op2
, TREE_TYPE (range
));
12226 create_fixed_operand (&ops
[3], table_label
);
12227 create_fixed_operand (&ops
[4], (default_label
12229 : fallback_label
));
12230 expand_jump_insn (targetm
.code_for_casesi
, 5, ops
);
12234 /* Attempt to generate a tablejump instruction; same concept. */
12235 /* Subroutine of the next function.
12237 INDEX is the value being switched on, with the lowest value
12238 in the table already subtracted.
12239 MODE is its expected mode (needed if INDEX is constant).
12240 RANGE is the length of the jump table.
12241 TABLE_LABEL is a CODE_LABEL rtx for the table itself.
12243 DEFAULT_LABEL is a CODE_LABEL rtx to jump to if the
12244 index value is out of range.
12245 DEFAULT_PROBABILITY is the probability of jumping to
12246 the default label. */
12249 do_tablejump (rtx index
, machine_mode mode
, rtx range
, rtx table_label
,
12250 rtx default_label
, profile_probability default_probability
)
12254 if (INTVAL (range
) > cfun
->cfg
->max_jumptable_ents
)
12255 cfun
->cfg
->max_jumptable_ents
= INTVAL (range
);
12257 /* Do an unsigned comparison (in the proper mode) between the index
12258 expression and the value which represents the length of the range.
12259 Since we just finished subtracting the lower bound of the range
12260 from the index expression, this comparison allows us to simultaneously
12261 check that the original index expression value is both greater than
12262 or equal to the minimum value of the range and less than or equal to
12263 the maximum value of the range. */
12266 emit_cmp_and_jump_insns (index
, range
, GTU
, NULL_RTX
, mode
, 1,
12267 default_label
, default_probability
);
12269 /* If index is in range, it must fit in Pmode.
12270 Convert to Pmode so we can index with it. */
12273 unsigned int width
;
12275 /* We know the value of INDEX is between 0 and RANGE. If we have a
12276 sign-extended subreg, and RANGE does not have the sign bit set, then
12277 we have a value that is valid for both sign and zero extension. In
12278 this case, we get better code if we sign extend. */
12279 if (GET_CODE (index
) == SUBREG
12280 && SUBREG_PROMOTED_VAR_P (index
)
12281 && SUBREG_PROMOTED_SIGNED_P (index
)
12282 && ((width
= GET_MODE_PRECISION (as_a
<scalar_int_mode
> (mode
)))
12283 <= HOST_BITS_PER_WIDE_INT
)
12284 && ! (UINTVAL (range
) & (HOST_WIDE_INT_1U
<< (width
- 1))))
12285 index
= convert_to_mode (Pmode
, index
, 0);
12287 index
= convert_to_mode (Pmode
, index
, 1);
12290 /* Don't let a MEM slip through, because then INDEX that comes
12291 out of PIC_CASE_VECTOR_ADDRESS won't be a valid address,
12292 and break_out_memory_refs will go to work on it and mess it up. */
12293 #ifdef PIC_CASE_VECTOR_ADDRESS
12294 if (flag_pic
&& !REG_P (index
))
12295 index
= copy_to_mode_reg (Pmode
, index
);
12298 /* ??? The only correct use of CASE_VECTOR_MODE is the one inside the
12299 GET_MODE_SIZE, because this indicates how large insns are. The other
12300 uses should all be Pmode, because they are addresses. This code
12301 could fail if addresses and insns are not the same size. */
12302 index
= simplify_gen_binary (MULT
, Pmode
, index
,
12303 gen_int_mode (GET_MODE_SIZE (CASE_VECTOR_MODE
),
12305 index
= simplify_gen_binary (PLUS
, Pmode
, index
,
12306 gen_rtx_LABEL_REF (Pmode
, table_label
));
12308 #ifdef PIC_CASE_VECTOR_ADDRESS
12310 index
= PIC_CASE_VECTOR_ADDRESS (index
);
12313 index
= memory_address (CASE_VECTOR_MODE
, index
);
12314 temp
= gen_reg_rtx (CASE_VECTOR_MODE
);
12315 vector
= gen_const_mem (CASE_VECTOR_MODE
, index
);
12316 convert_move (temp
, vector
, 0);
12318 emit_jump_insn (targetm
.gen_tablejump (temp
, table_label
));
12320 /* If we are generating PIC code or if the table is PC-relative, the
12321 table and JUMP_INSN must be adjacent, so don't output a BARRIER. */
12322 if (! CASE_VECTOR_PC_RELATIVE
&& ! flag_pic
)
12327 try_tablejump (tree index_type
, tree index_expr
, tree minval
, tree range
,
12328 rtx table_label
, rtx default_label
,
12329 profile_probability default_probability
)
12333 if (! targetm
.have_tablejump ())
12336 index_expr
= fold_build2 (MINUS_EXPR
, index_type
,
12337 fold_convert (index_type
, index_expr
),
12338 fold_convert (index_type
, minval
));
12339 index
= expand_normal (index_expr
);
12340 do_pending_stack_adjust ();
12342 do_tablejump (index
, TYPE_MODE (index_type
),
12343 convert_modes (TYPE_MODE (index_type
),
12344 TYPE_MODE (TREE_TYPE (range
)),
12345 expand_normal (range
),
12346 TYPE_UNSIGNED (TREE_TYPE (range
))),
12347 table_label
, default_label
, default_probability
);
12351 /* Return a CONST_VECTOR rtx representing vector mask for
12352 a VECTOR_CST of booleans. */
12354 const_vector_mask_from_tree (tree exp
)
12356 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12357 machine_mode inner
= GET_MODE_INNER (mode
);
12359 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12360 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12361 unsigned int count
= builder
.encoded_nelts ();
12362 for (unsigned int i
= 0; i
< count
; ++i
)
12364 tree elt
= VECTOR_CST_ELT (exp
, i
);
12365 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12366 if (integer_zerop (elt
))
12367 builder
.quick_push (CONST0_RTX (inner
));
12368 else if (integer_onep (elt
)
12369 || integer_minus_onep (elt
))
12370 builder
.quick_push (CONSTM1_RTX (inner
));
12372 gcc_unreachable ();
12374 return builder
.build ();
12377 /* EXP is a VECTOR_CST in which each element is either all-zeros or all-ones.
12378 Return a constant scalar rtx of mode MODE in which bit X is set if element
12379 X of EXP is nonzero. */
12381 const_scalar_mask_from_tree (scalar_int_mode mode
, tree exp
)
12383 wide_int res
= wi::zero (GET_MODE_PRECISION (mode
));
12386 /* The result has a fixed number of bits so the input must too. */
12387 unsigned int nunits
= VECTOR_CST_NELTS (exp
).to_constant ();
12388 for (unsigned int i
= 0; i
< nunits
; ++i
)
12390 elt
= VECTOR_CST_ELT (exp
, i
);
12391 gcc_assert (TREE_CODE (elt
) == INTEGER_CST
);
12392 if (integer_all_onesp (elt
))
12393 res
= wi::set_bit (res
, i
);
12395 gcc_assert (integer_zerop (elt
));
12398 return immed_wide_int_const (res
, mode
);
12401 /* Return a CONST_VECTOR rtx for a VECTOR_CST tree. */
12403 const_vector_from_tree (tree exp
)
12405 machine_mode mode
= TYPE_MODE (TREE_TYPE (exp
));
12407 if (initializer_zerop (exp
))
12408 return CONST0_RTX (mode
);
12410 if (VECTOR_BOOLEAN_TYPE_P (TREE_TYPE (exp
)))
12411 return const_vector_mask_from_tree (exp
);
12413 machine_mode inner
= GET_MODE_INNER (mode
);
12415 rtx_vector_builder
builder (mode
, VECTOR_CST_NPATTERNS (exp
),
12416 VECTOR_CST_NELTS_PER_PATTERN (exp
));
12417 unsigned int count
= builder
.encoded_nelts ();
12418 for (unsigned int i
= 0; i
< count
; ++i
)
12420 tree elt
= VECTOR_CST_ELT (exp
, i
);
12421 if (TREE_CODE (elt
) == REAL_CST
)
12422 builder
.quick_push (const_double_from_real_value (TREE_REAL_CST (elt
),
12424 else if (TREE_CODE (elt
) == FIXED_CST
)
12425 builder
.quick_push (CONST_FIXED_FROM_FIXED_VALUE (TREE_FIXED_CST (elt
),
12428 builder
.quick_push (immed_wide_int_const (wi::to_poly_wide (elt
),
12431 return builder
.build ();
12434 /* Build a decl for a personality function given a language prefix. */
12437 build_personality_function (const char *lang
)
12439 const char *unwind_and_version
;
12443 switch (targetm_common
.except_unwind_info (&global_options
))
12448 unwind_and_version
= "_sj0";
12452 unwind_and_version
= "_v0";
12455 unwind_and_version
= "_seh0";
12458 gcc_unreachable ();
12461 name
= ACONCAT (("__", lang
, "_personality", unwind_and_version
, NULL
));
12463 type
= build_function_type_list (integer_type_node
, integer_type_node
,
12464 long_long_unsigned_type_node
,
12465 ptr_type_node
, ptr_type_node
, NULL_TREE
);
12466 decl
= build_decl (UNKNOWN_LOCATION
, FUNCTION_DECL
,
12467 get_identifier (name
), type
);
12468 DECL_ARTIFICIAL (decl
) = 1;
12469 DECL_EXTERNAL (decl
) = 1;
12470 TREE_PUBLIC (decl
) = 1;
12472 /* Zap the nonsensical SYMBOL_REF_DECL for this. What we're left with
12473 are the flags assigned by targetm.encode_section_info. */
12474 SET_SYMBOL_REF_DECL (XEXP (DECL_RTL (decl
), 0), NULL
);
12479 /* Extracts the personality function of DECL and returns the corresponding
12483 get_personality_function (tree decl
)
12485 tree personality
= DECL_FUNCTION_PERSONALITY (decl
);
12486 enum eh_personality_kind pk
;
12488 pk
= function_needs_eh_personality (DECL_STRUCT_FUNCTION (decl
));
12489 if (pk
== eh_personality_none
)
12493 && pk
== eh_personality_any
)
12494 personality
= lang_hooks
.eh_personality ();
12496 if (pk
== eh_personality_lang
)
12497 gcc_assert (personality
!= NULL_TREE
);
12499 return XEXP (DECL_RTL (personality
), 0);
12502 /* Returns a tree for the size of EXP in bytes. */
12505 tree_expr_size (const_tree exp
)
12508 && DECL_SIZE_UNIT (exp
) != 0)
12509 return DECL_SIZE_UNIT (exp
);
12511 return size_in_bytes (TREE_TYPE (exp
));
12514 /* Return an rtx for the size in bytes of the value of EXP. */
12517 expr_size (tree exp
)
12521 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12522 size
= TREE_OPERAND (exp
, 1);
12525 size
= tree_expr_size (exp
);
12527 gcc_assert (size
== SUBSTITUTE_PLACEHOLDER_IN_EXPR (size
, exp
));
12530 return expand_expr (size
, NULL_RTX
, TYPE_MODE (sizetype
), EXPAND_NORMAL
);
12533 /* Return a wide integer for the size in bytes of the value of EXP, or -1
12534 if the size can vary or is larger than an integer. */
12536 static HOST_WIDE_INT
12537 int_expr_size (tree exp
)
12541 if (TREE_CODE (exp
) == WITH_SIZE_EXPR
)
12542 size
= TREE_OPERAND (exp
, 1);
12545 size
= tree_expr_size (exp
);
12549 if (size
== 0 || !tree_fits_shwi_p (size
))
12552 return tree_to_shwi (size
);