1 /* { dg-require-effective-target vect_int } */
13 __attribute__ ((noinline
))
16 int i
, suma
= 0, sumb
= 0, sumc
= 0;
18 /* ib and ic have same misalignment, we peel to align them. */
19 for (i
= 0; i
<= N
; i
++)
27 if (suma
+ sumb
+ sumc
!= RES
)
39 for (i
= 0; i
< N
+10; i
++)
41 asm volatile ("" : "+r" (i
));
50 /* { dg-final { scan-tree-dump-times "vectorized 1 loops" 1 "vect" { xfail { vect_no_align && { ! vect_hw_misalign } } } } } */
51 /* { dg-final { scan-tree-dump-times "Vectorizing an unaligned access" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B } } } } } */
52 /* { dg-final { scan-tree-dump-times "Alignment of access forced using peeling" 1 "vect" { xfail { { vect_no_align && { ! vect_hw_misalign } } || {vect_sizes_32B_16B } } } } } */
53 /* { dg-final { cleanup-tree-dump "vect" } } */