Fix 50988 testsuite failures
[official-gcc.git] / gcc / reginfo.c
blobf6f91a9975b61a462869ad8b4bb089f38b4106c7
1 /* Compute different info about registers.
2 Copyright (C) 1987, 1988, 1991, 1992, 1993, 1994, 1995, 1996
3 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005, 2006, 2007, 2008,
4 2009, 2010, 2011 Free Software Foundation, Inc.
6 This file is part of GCC.
8 GCC is free software; you can redistribute it and/or modify it under
9 the terms of the GNU General Public License as published by the Free
10 Software Foundation; either version 3, or (at your option) any later
11 version.
13 GCC is distributed in the hope that it will be useful, but WITHOUT ANY
14 WARRANTY; without even the implied warranty of MERCHANTABILITY or
15 FITNESS FOR A PARTICULAR PURPOSE. See the GNU General Public License
16 for more details.
18 You should have received a copy of the GNU General Public License
19 along with GCC; see the file COPYING3. If not see
20 <http://www.gnu.org/licenses/>. */
23 /* This file contains regscan pass of the compiler and passes for
24 dealing with info about modes of pseudo-registers inside
25 subregisters. It also defines some tables of information about the
26 hardware registers, function init_reg_sets to initialize the
27 tables, and other auxiliary functions to deal with info about
28 registers and their classes. */
30 #include "config.h"
31 #include "system.h"
32 #include "coretypes.h"
33 #include "tm.h"
34 #include "hard-reg-set.h"
35 #include "rtl.h"
36 #include "expr.h"
37 #include "tm_p.h"
38 #include "flags.h"
39 #include "basic-block.h"
40 #include "regs.h"
41 #include "addresses.h"
42 #include "function.h"
43 #include "insn-config.h"
44 #include "recog.h"
45 #include "reload.h"
46 #include "diagnostic-core.h"
47 #include "output.h"
48 #include "timevar.h"
49 #include "hashtab.h"
50 #include "target.h"
51 #include "tree-pass.h"
52 #include "df.h"
53 #include "ira.h"
55 /* Maximum register number used in this function, plus one. */
57 int max_regno;
60 struct target_hard_regs default_target_hard_regs;
61 struct target_regs default_target_regs;
62 #if SWITCHABLE_TARGET
63 struct target_hard_regs *this_target_hard_regs = &default_target_hard_regs;
64 struct target_regs *this_target_regs = &default_target_regs;
65 #endif
67 /* Data for initializing fixed_regs. */
68 static const char initial_fixed_regs[] = FIXED_REGISTERS;
70 /* Data for initializing call_used_regs. */
71 static const char initial_call_used_regs[] = CALL_USED_REGISTERS;
73 #ifdef CALL_REALLY_USED_REGISTERS
74 /* Data for initializing call_really_used_regs. */
75 static const char initial_call_really_used_regs[] = CALL_REALLY_USED_REGISTERS;
76 #endif
78 #ifdef CALL_REALLY_USED_REGISTERS
79 #define CALL_REALLY_USED_REGNO_P(X) call_really_used_regs[X]
80 #else
81 #define CALL_REALLY_USED_REGNO_P(X) call_used_regs[X]
82 #endif
84 /* Indexed by hard register number, contains 1 for registers
85 that are being used for global register decls.
86 These must be exempt from ordinary flow analysis
87 and are also considered fixed. */
88 char global_regs[FIRST_PSEUDO_REGISTER];
90 /* Declaration for the global register. */
91 static tree GTY(()) global_regs_decl[FIRST_PSEUDO_REGISTER];
93 /* Same information as REGS_INVALIDATED_BY_CALL but in regset form to be used
94 in dataflow more conveniently. */
95 regset regs_invalidated_by_call_regset;
97 /* Same information as FIXED_REG_SET but in regset form. */
98 regset fixed_reg_set_regset;
100 /* The bitmap_obstack is used to hold some static variables that
101 should not be reset after each function is compiled. */
102 static bitmap_obstack persistent_obstack;
104 /* Used to initialize reg_alloc_order. */
105 #ifdef REG_ALLOC_ORDER
106 static int initial_reg_alloc_order[FIRST_PSEUDO_REGISTER] = REG_ALLOC_ORDER;
107 #endif
109 /* The same information, but as an array of unsigned ints. We copy from
110 these unsigned ints to the table above. We do this so the tm.h files
111 do not have to be aware of the wordsize for machines with <= 64 regs.
112 Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
113 #define N_REG_INTS \
114 ((FIRST_PSEUDO_REGISTER + (32 - 1)) / 32)
116 static const unsigned int_reg_class_contents[N_REG_CLASSES][N_REG_INTS]
117 = REG_CLASS_CONTENTS;
119 /* Array containing all of the register names. */
120 static const char *const initial_reg_names[] = REGISTER_NAMES;
122 /* Array containing all of the register class names. */
123 const char * reg_class_names[] = REG_CLASS_NAMES;
125 #define last_mode_for_init_move_cost \
126 (this_target_regs->x_last_mode_for_init_move_cost)
128 /* No more global register variables may be declared; true once
129 reginfo has been initialized. */
130 static int no_global_reg_vars = 0;
132 /* Given a register bitmap, turn on the bits in a HARD_REG_SET that
133 correspond to the hard registers, if any, set in that map. This
134 could be done far more efficiently by having all sorts of special-cases
135 with moving single words, but probably isn't worth the trouble. */
136 void
137 reg_set_to_hard_reg_set (HARD_REG_SET *to, const_bitmap from)
139 unsigned i;
140 bitmap_iterator bi;
142 EXECUTE_IF_SET_IN_BITMAP (from, 0, i, bi)
144 if (i >= FIRST_PSEUDO_REGISTER)
145 return;
146 SET_HARD_REG_BIT (*to, i);
150 /* Function called only once per target_globals to initialize the
151 target_hard_regs structure. Once this is done, various switches
152 may override. */
153 void
154 init_reg_sets (void)
156 int i, j;
158 /* First copy the register information from the initial int form into
159 the regsets. */
161 for (i = 0; i < N_REG_CLASSES; i++)
163 CLEAR_HARD_REG_SET (reg_class_contents[i]);
165 /* Note that we hard-code 32 here, not HOST_BITS_PER_INT. */
166 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
167 if (int_reg_class_contents[i][j / 32]
168 & ((unsigned) 1 << (j % 32)))
169 SET_HARD_REG_BIT (reg_class_contents[i], j);
172 /* Sanity check: make sure the target macros FIXED_REGISTERS and
173 CALL_USED_REGISTERS had the right number of initializers. */
174 gcc_assert (sizeof fixed_regs == sizeof initial_fixed_regs);
175 gcc_assert (sizeof call_used_regs == sizeof initial_call_used_regs);
176 #ifdef CALL_REALLY_USED_REGISTERS
177 gcc_assert (sizeof call_really_used_regs
178 == sizeof initial_call_really_used_regs);
179 #endif
180 #ifdef REG_ALLOC_ORDER
181 gcc_assert (sizeof reg_alloc_order == sizeof initial_reg_alloc_order);
182 #endif
183 gcc_assert (sizeof reg_names == sizeof initial_reg_names);
185 memcpy (fixed_regs, initial_fixed_regs, sizeof fixed_regs);
186 memcpy (call_used_regs, initial_call_used_regs, sizeof call_used_regs);
187 #ifdef CALL_REALLY_USED_REGISTERS
188 memcpy (call_really_used_regs, initial_call_really_used_regs,
189 sizeof call_really_used_regs);
190 #endif
191 #ifdef REG_ALLOC_ORDER
192 memcpy (reg_alloc_order, initial_reg_alloc_order, sizeof reg_alloc_order);
193 #endif
194 memcpy (reg_names, initial_reg_names, sizeof reg_names);
196 SET_HARD_REG_SET (accessible_reg_set);
197 SET_HARD_REG_SET (operand_reg_set);
200 /* Initialize may_move_cost and friends for mode M. */
201 void
202 init_move_cost (enum machine_mode m)
204 static unsigned short last_move_cost[N_REG_CLASSES][N_REG_CLASSES];
205 bool all_match = true;
206 unsigned int i, j;
208 gcc_assert (have_regs_of_mode[m]);
209 for (i = 0; i < N_REG_CLASSES; i++)
210 if (contains_reg_of_mode[i][m])
211 for (j = 0; j < N_REG_CLASSES; j++)
213 int cost;
214 if (!contains_reg_of_mode[j][m])
215 cost = 65535;
216 else
218 cost = register_move_cost (m, (enum reg_class) i,
219 (enum reg_class) j);
220 gcc_assert (cost < 65535);
222 all_match &= (last_move_cost[i][j] == cost);
223 last_move_cost[i][j] = cost;
225 if (all_match && last_mode_for_init_move_cost != -1)
227 move_cost[m] = move_cost[last_mode_for_init_move_cost];
228 may_move_in_cost[m] = may_move_in_cost[last_mode_for_init_move_cost];
229 may_move_out_cost[m] = may_move_out_cost[last_mode_for_init_move_cost];
230 return;
232 last_mode_for_init_move_cost = m;
233 move_cost[m] = (move_table *)xmalloc (sizeof (move_table)
234 * N_REG_CLASSES);
235 may_move_in_cost[m] = (move_table *)xmalloc (sizeof (move_table)
236 * N_REG_CLASSES);
237 may_move_out_cost[m] = (move_table *)xmalloc (sizeof (move_table)
238 * N_REG_CLASSES);
239 for (i = 0; i < N_REG_CLASSES; i++)
240 if (contains_reg_of_mode[i][m])
241 for (j = 0; j < N_REG_CLASSES; j++)
243 int cost;
244 enum reg_class *p1, *p2;
246 if (last_move_cost[i][j] == 65535)
248 move_cost[m][i][j] = 65535;
249 may_move_in_cost[m][i][j] = 65535;
250 may_move_out_cost[m][i][j] = 65535;
252 else
254 cost = last_move_cost[i][j];
256 for (p2 = &reg_class_subclasses[j][0];
257 *p2 != LIM_REG_CLASSES; p2++)
258 if (*p2 != i && contains_reg_of_mode[*p2][m])
259 cost = MAX (cost, move_cost[m][i][*p2]);
261 for (p1 = &reg_class_subclasses[i][0];
262 *p1 != LIM_REG_CLASSES; p1++)
263 if (*p1 != j && contains_reg_of_mode[*p1][m])
264 cost = MAX (cost, move_cost[m][*p1][j]);
266 gcc_assert (cost <= 65535);
267 move_cost[m][i][j] = cost;
269 if (reg_class_subset_p ((enum reg_class) i, (enum reg_class) j))
270 may_move_in_cost[m][i][j] = 0;
271 else
272 may_move_in_cost[m][i][j] = cost;
274 if (reg_class_subset_p ((enum reg_class) j, (enum reg_class) i))
275 may_move_out_cost[m][i][j] = 0;
276 else
277 may_move_out_cost[m][i][j] = cost;
280 else
281 for (j = 0; j < N_REG_CLASSES; j++)
283 move_cost[m][i][j] = 65535;
284 may_move_in_cost[m][i][j] = 65535;
285 may_move_out_cost[m][i][j] = 65535;
289 /* We need to save copies of some of the register information which
290 can be munged by command-line switches so we can restore it during
291 subsequent back-end reinitialization. */
292 static char saved_fixed_regs[FIRST_PSEUDO_REGISTER];
293 static char saved_call_used_regs[FIRST_PSEUDO_REGISTER];
294 #ifdef CALL_REALLY_USED_REGISTERS
295 static char saved_call_really_used_regs[FIRST_PSEUDO_REGISTER];
296 #endif
297 static const char *saved_reg_names[FIRST_PSEUDO_REGISTER];
298 static HARD_REG_SET saved_accessible_reg_set;
299 static HARD_REG_SET saved_operand_reg_set;
301 /* Save the register information. */
302 void
303 save_register_info (void)
305 /* Sanity check: make sure the target macros FIXED_REGISTERS and
306 CALL_USED_REGISTERS had the right number of initializers. */
307 gcc_assert (sizeof fixed_regs == sizeof saved_fixed_regs);
308 gcc_assert (sizeof call_used_regs == sizeof saved_call_used_regs);
309 memcpy (saved_fixed_regs, fixed_regs, sizeof fixed_regs);
310 memcpy (saved_call_used_regs, call_used_regs, sizeof call_used_regs);
312 /* Likewise for call_really_used_regs. */
313 #ifdef CALL_REALLY_USED_REGISTERS
314 gcc_assert (sizeof call_really_used_regs
315 == sizeof saved_call_really_used_regs);
316 memcpy (saved_call_really_used_regs, call_really_used_regs,
317 sizeof call_really_used_regs);
318 #endif
320 /* And similarly for reg_names. */
321 gcc_assert (sizeof reg_names == sizeof saved_reg_names);
322 memcpy (saved_reg_names, reg_names, sizeof reg_names);
323 COPY_HARD_REG_SET (saved_accessible_reg_set, accessible_reg_set);
324 COPY_HARD_REG_SET (saved_operand_reg_set, operand_reg_set);
327 /* Restore the register information. */
328 static void
329 restore_register_info (void)
331 memcpy (fixed_regs, saved_fixed_regs, sizeof fixed_regs);
332 memcpy (call_used_regs, saved_call_used_regs, sizeof call_used_regs);
334 #ifdef CALL_REALLY_USED_REGISTERS
335 memcpy (call_really_used_regs, saved_call_really_used_regs,
336 sizeof call_really_used_regs);
337 #endif
339 memcpy (reg_names, saved_reg_names, sizeof reg_names);
340 COPY_HARD_REG_SET (accessible_reg_set, saved_accessible_reg_set);
341 COPY_HARD_REG_SET (operand_reg_set, saved_operand_reg_set);
344 /* After switches have been processed, which perhaps alter
345 `fixed_regs' and `call_used_regs', convert them to HARD_REG_SETs. */
346 static void
347 init_reg_sets_1 (void)
349 unsigned int i, j;
350 unsigned int /* enum machine_mode */ m;
352 restore_register_info ();
354 #ifdef REG_ALLOC_ORDER
355 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
356 inv_reg_alloc_order[reg_alloc_order[i]] = i;
357 #endif
359 /* Let the target tweak things if necessary. */
361 targetm.conditional_register_usage ();
363 /* Compute number of hard regs in each class. */
365 memset (reg_class_size, 0, sizeof reg_class_size);
366 for (i = 0; i < N_REG_CLASSES; i++)
368 bool any_nonfixed = false;
369 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
370 if (TEST_HARD_REG_BIT (reg_class_contents[i], j))
372 reg_class_size[i]++;
373 if (!fixed_regs[j])
374 any_nonfixed = true;
376 class_only_fixed_regs[i] = !any_nonfixed;
379 /* Initialize the table of subunions.
380 reg_class_subunion[I][J] gets the largest-numbered reg-class
381 that is contained in the union of classes I and J. */
383 memset (reg_class_subunion, 0, sizeof reg_class_subunion);
384 for (i = 0; i < N_REG_CLASSES; i++)
386 for (j = 0; j < N_REG_CLASSES; j++)
388 HARD_REG_SET c;
389 int k;
391 COPY_HARD_REG_SET (c, reg_class_contents[i]);
392 IOR_HARD_REG_SET (c, reg_class_contents[j]);
393 for (k = 0; k < N_REG_CLASSES; k++)
394 if (hard_reg_set_subset_p (reg_class_contents[k], c)
395 && !hard_reg_set_subset_p (reg_class_contents[k],
396 reg_class_contents
397 [(int) reg_class_subunion[i][j]]))
398 reg_class_subunion[i][j] = (enum reg_class) k;
402 /* Initialize the table of superunions.
403 reg_class_superunion[I][J] gets the smallest-numbered reg-class
404 containing the union of classes I and J. */
406 memset (reg_class_superunion, 0, sizeof reg_class_superunion);
407 for (i = 0; i < N_REG_CLASSES; i++)
409 for (j = 0; j < N_REG_CLASSES; j++)
411 HARD_REG_SET c;
412 int k;
414 COPY_HARD_REG_SET (c, reg_class_contents[i]);
415 IOR_HARD_REG_SET (c, reg_class_contents[j]);
416 for (k = 0; k < N_REG_CLASSES; k++)
417 if (hard_reg_set_subset_p (c, reg_class_contents[k]))
418 break;
420 reg_class_superunion[i][j] = (enum reg_class) k;
424 /* Initialize the tables of subclasses and superclasses of each reg class.
425 First clear the whole table, then add the elements as they are found. */
427 for (i = 0; i < N_REG_CLASSES; i++)
429 for (j = 0; j < N_REG_CLASSES; j++)
430 reg_class_subclasses[i][j] = LIM_REG_CLASSES;
433 for (i = 0; i < N_REG_CLASSES; i++)
435 if (i == (int) NO_REGS)
436 continue;
438 for (j = i + 1; j < N_REG_CLASSES; j++)
439 if (hard_reg_set_subset_p (reg_class_contents[i],
440 reg_class_contents[j]))
442 /* Reg class I is a subclass of J.
443 Add J to the table of superclasses of I. */
444 enum reg_class *p;
446 /* Add I to the table of superclasses of J. */
447 p = &reg_class_subclasses[j][0];
448 while (*p != LIM_REG_CLASSES) p++;
449 *p = (enum reg_class) i;
453 /* Initialize "constant" tables. */
455 CLEAR_HARD_REG_SET (fixed_reg_set);
456 CLEAR_HARD_REG_SET (call_used_reg_set);
457 CLEAR_HARD_REG_SET (call_fixed_reg_set);
458 CLEAR_HARD_REG_SET (regs_invalidated_by_call);
459 if (!regs_invalidated_by_call_regset)
461 bitmap_obstack_initialize (&persistent_obstack);
462 regs_invalidated_by_call_regset = ALLOC_REG_SET (&persistent_obstack);
464 else
465 CLEAR_REG_SET (regs_invalidated_by_call_regset);
466 if (!fixed_reg_set_regset)
467 fixed_reg_set_regset = ALLOC_REG_SET (&persistent_obstack);
468 else
469 CLEAR_REG_SET (fixed_reg_set_regset);
471 AND_HARD_REG_SET (operand_reg_set, accessible_reg_set);
472 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
474 /* As a special exception, registers whose class is NO_REGS are
475 not accepted by `register_operand'. The reason for this change
476 is to allow the representation of special architecture artifacts
477 (such as a condition code register) without extending the rtl
478 definitions. Since registers of class NO_REGS cannot be used
479 as registers in any case where register classes are examined,
480 it is better to apply this exception in a target-independent way. */
481 if (REGNO_REG_CLASS (i) == NO_REGS)
482 CLEAR_HARD_REG_BIT (operand_reg_set, i);
484 /* If a register is too limited to be treated as a register operand,
485 then it should never be allocated to a pseudo. */
486 if (!TEST_HARD_REG_BIT (operand_reg_set, i))
488 fixed_regs[i] = 1;
489 call_used_regs[i] = 1;
492 /* call_used_regs must include fixed_regs. */
493 gcc_assert (!fixed_regs[i] || call_used_regs[i]);
494 #ifdef CALL_REALLY_USED_REGISTERS
495 /* call_used_regs must include call_really_used_regs. */
496 gcc_assert (!call_really_used_regs[i] || call_used_regs[i]);
497 #endif
499 if (fixed_regs[i])
501 SET_HARD_REG_BIT (fixed_reg_set, i);
502 SET_REGNO_REG_SET (fixed_reg_set_regset, i);
505 if (call_used_regs[i])
506 SET_HARD_REG_BIT (call_used_reg_set, i);
508 /* There are a couple of fixed registers that we know are safe to
509 exclude from being clobbered by calls:
511 The frame pointer is always preserved across calls. The arg
512 pointer is if it is fixed. The stack pointer usually is,
513 unless TARGET_RETURN_POPS_ARGS, in which case an explicit
514 CLOBBER will be present. If we are generating PIC code, the
515 PIC offset table register is preserved across calls, though the
516 target can override that. */
518 if (i == STACK_POINTER_REGNUM)
520 else if (global_regs[i])
522 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
523 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
525 else if (i == FRAME_POINTER_REGNUM)
527 #if !HARD_FRAME_POINTER_IS_FRAME_POINTER
528 else if (i == HARD_FRAME_POINTER_REGNUM)
530 #endif
531 #if ARG_POINTER_REGNUM != FRAME_POINTER_REGNUM
532 else if (i == ARG_POINTER_REGNUM && fixed_regs[i])
534 #endif
535 else if (!PIC_OFFSET_TABLE_REG_CALL_CLOBBERED
536 && i == (unsigned) PIC_OFFSET_TABLE_REGNUM && fixed_regs[i])
538 else if (CALL_REALLY_USED_REGNO_P (i))
540 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
541 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
545 COPY_HARD_REG_SET(call_fixed_reg_set, fixed_reg_set);
547 /* Preserve global registers if called more than once. */
548 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
550 if (global_regs[i])
552 fixed_regs[i] = call_used_regs[i] = 1;
553 SET_HARD_REG_BIT (fixed_reg_set, i);
554 SET_HARD_REG_BIT (call_used_reg_set, i);
555 SET_HARD_REG_BIT (call_fixed_reg_set, i);
559 memset (have_regs_of_mode, 0, sizeof (have_regs_of_mode));
560 memset (contains_reg_of_mode, 0, sizeof (contains_reg_of_mode));
561 for (m = 0; m < (unsigned int) MAX_MACHINE_MODE; m++)
563 HARD_REG_SET ok_regs;
564 CLEAR_HARD_REG_SET (ok_regs);
565 for (j = 0; j < FIRST_PSEUDO_REGISTER; j++)
566 if (!fixed_regs [j] && HARD_REGNO_MODE_OK (j, (enum machine_mode) m))
567 SET_HARD_REG_BIT (ok_regs, j);
569 for (i = 0; i < N_REG_CLASSES; i++)
570 if ((targetm.class_max_nregs ((reg_class_t) i, (enum machine_mode) m)
571 <= reg_class_size[i])
572 && hard_reg_set_intersect_p (ok_regs, reg_class_contents[i]))
574 contains_reg_of_mode [i][m] = 1;
575 have_regs_of_mode [m] = 1;
579 /* Reset move_cost and friends, making sure we only free shared
580 table entries once. */
581 for (i = 0; i < MAX_MACHINE_MODE; i++)
582 if (move_cost[i])
584 for (j = 0; j < i && move_cost[i] != move_cost[j]; j++)
586 if (i == j)
588 free (move_cost[i]);
589 free (may_move_in_cost[i]);
590 free (may_move_out_cost[i]);
593 memset (move_cost, 0, sizeof move_cost);
594 memset (may_move_in_cost, 0, sizeof may_move_in_cost);
595 memset (may_move_out_cost, 0, sizeof may_move_out_cost);
596 last_mode_for_init_move_cost = -1;
599 /* Compute the table of register modes.
600 These values are used to record death information for individual registers
601 (as opposed to a multi-register mode).
602 This function might be invoked more than once, if the target has support
603 for changing register usage conventions on a per-function basis.
605 void
606 init_reg_modes_target (void)
608 int i, j;
610 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
611 for (j = 0; j < MAX_MACHINE_MODE; j++)
612 hard_regno_nregs[i][j] = HARD_REGNO_NREGS(i, (enum machine_mode)j);
614 for (i = 0; i < FIRST_PSEUDO_REGISTER; i++)
616 reg_raw_mode[i] = choose_hard_reg_mode (i, 1, false);
618 /* If we couldn't find a valid mode, just use the previous mode.
619 ??? One situation in which we need to do this is on the mips where
620 HARD_REGNO_NREGS (fpreg, [SD]Fmode) returns 2. Ideally we'd like
621 to use DF mode for the even registers and VOIDmode for the odd
622 (for the cpu models where the odd ones are inaccessible). */
623 if (reg_raw_mode[i] == VOIDmode)
624 reg_raw_mode[i] = i == 0 ? word_mode : reg_raw_mode[i-1];
628 /* Finish initializing the register sets and initialize the register modes.
629 This function might be invoked more than once, if the target has support
630 for changing register usage conventions on a per-function basis.
632 void
633 init_regs (void)
635 /* This finishes what was started by init_reg_sets, but couldn't be done
636 until after register usage was specified. */
637 init_reg_sets_1 ();
640 /* The same as previous function plus initializing IRA. */
641 void
642 reinit_regs (void)
644 init_regs ();
645 /* caller_save needs to be re-initialized. */
646 caller_save_initialized_p = false;
647 ira_init ();
650 /* Initialize some fake stack-frame MEM references for use in
651 memory_move_secondary_cost. */
652 void
653 init_fake_stack_mems (void)
655 int i;
657 for (i = 0; i < MAX_MACHINE_MODE; i++)
658 top_of_stack[i] = gen_rtx_MEM ((enum machine_mode) i, stack_pointer_rtx);
662 /* Compute cost of moving data from a register of class FROM to one of
663 TO, using MODE. */
666 register_move_cost (enum machine_mode mode, reg_class_t from, reg_class_t to)
668 return targetm.register_move_cost (mode, from, to);
671 /* Compute cost of moving registers to/from memory. */
674 memory_move_cost (enum machine_mode mode, reg_class_t rclass, bool in)
676 return targetm.memory_move_cost (mode, rclass, in);
679 /* Compute extra cost of moving registers to/from memory due to reloads.
680 Only needed if secondary reloads are required for memory moves. */
682 memory_move_secondary_cost (enum machine_mode mode, reg_class_t rclass,
683 bool in)
685 reg_class_t altclass;
686 int partial_cost = 0;
687 /* We need a memory reference to feed to SECONDARY... macros. */
688 /* mem may be unused even if the SECONDARY_ macros are defined. */
689 rtx mem ATTRIBUTE_UNUSED = top_of_stack[(int) mode];
691 altclass = secondary_reload_class (in ? 1 : 0, rclass, mode, mem);
693 if (altclass == NO_REGS)
694 return 0;
696 if (in)
697 partial_cost = register_move_cost (mode, altclass, rclass);
698 else
699 partial_cost = register_move_cost (mode, rclass, altclass);
701 if (rclass == altclass)
702 /* This isn't simply a copy-to-temporary situation. Can't guess
703 what it is, so TARGET_MEMORY_MOVE_COST really ought not to be
704 calling here in that case.
706 I'm tempted to put in an assert here, but returning this will
707 probably only give poor estimates, which is what we would've
708 had before this code anyways. */
709 return partial_cost;
711 /* Check if the secondary reload register will also need a
712 secondary reload. */
713 return memory_move_secondary_cost (mode, altclass, in) + partial_cost;
716 /* Return a machine mode that is legitimate for hard reg REGNO and large
717 enough to save nregs. If we can't find one, return VOIDmode.
718 If CALL_SAVED is true, only consider modes that are call saved. */
719 enum machine_mode
720 choose_hard_reg_mode (unsigned int regno ATTRIBUTE_UNUSED,
721 unsigned int nregs, bool call_saved)
723 unsigned int /* enum machine_mode */ m;
724 enum machine_mode found_mode = VOIDmode, mode;
726 /* We first look for the largest integer mode that can be validly
727 held in REGNO. If none, we look for the largest floating-point mode.
728 If we still didn't find a valid mode, try CCmode. */
730 for (mode = GET_CLASS_NARROWEST_MODE (MODE_INT);
731 mode != VOIDmode;
732 mode = GET_MODE_WIDER_MODE (mode))
733 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
734 && HARD_REGNO_MODE_OK (regno, mode)
735 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
736 found_mode = mode;
738 if (found_mode != VOIDmode)
739 return found_mode;
741 for (mode = GET_CLASS_NARROWEST_MODE (MODE_FLOAT);
742 mode != VOIDmode;
743 mode = GET_MODE_WIDER_MODE (mode))
744 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
745 && HARD_REGNO_MODE_OK (regno, mode)
746 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
747 found_mode = mode;
749 if (found_mode != VOIDmode)
750 return found_mode;
752 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_FLOAT);
753 mode != VOIDmode;
754 mode = GET_MODE_WIDER_MODE (mode))
755 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
756 && HARD_REGNO_MODE_OK (regno, mode)
757 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
758 found_mode = mode;
760 if (found_mode != VOIDmode)
761 return found_mode;
763 for (mode = GET_CLASS_NARROWEST_MODE (MODE_VECTOR_INT);
764 mode != VOIDmode;
765 mode = GET_MODE_WIDER_MODE (mode))
766 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
767 && HARD_REGNO_MODE_OK (regno, mode)
768 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
769 found_mode = mode;
771 if (found_mode != VOIDmode)
772 return found_mode;
774 /* Iterate over all of the CCmodes. */
775 for (m = (unsigned int) CCmode; m < (unsigned int) NUM_MACHINE_MODES; ++m)
777 mode = (enum machine_mode) m;
778 if ((unsigned) hard_regno_nregs[regno][mode] == nregs
779 && HARD_REGNO_MODE_OK (regno, mode)
780 && (! call_saved || ! HARD_REGNO_CALL_PART_CLOBBERED (regno, mode)))
781 return mode;
784 /* We can't find a mode valid for this register. */
785 return VOIDmode;
788 /* Specify the usage characteristics of the register named NAME.
789 It should be a fixed register if FIXED and a
790 call-used register if CALL_USED. */
791 void
792 fix_register (const char *name, int fixed, int call_used)
794 int i;
795 int reg, nregs;
797 /* Decode the name and update the primary form of
798 the register info. */
800 if ((reg = decode_reg_name_and_count (name, &nregs)) >= 0)
802 gcc_assert (nregs >= 1);
803 for (i = reg; i < reg + nregs; i++)
805 if ((i == STACK_POINTER_REGNUM
806 #ifdef HARD_FRAME_POINTER_REGNUM
807 || i == HARD_FRAME_POINTER_REGNUM
808 #else
809 || i == FRAME_POINTER_REGNUM
810 #endif
812 && (fixed == 0 || call_used == 0))
814 switch (fixed)
816 case 0:
817 switch (call_used)
819 case 0:
820 error ("can%'t use %qs as a call-saved register", name);
821 break;
823 case 1:
824 error ("can%'t use %qs as a call-used register", name);
825 break;
827 default:
828 gcc_unreachable ();
830 break;
832 case 1:
833 switch (call_used)
835 case 1:
836 error ("can%'t use %qs as a fixed register", name);
837 break;
839 case 0:
840 default:
841 gcc_unreachable ();
843 break;
845 default:
846 gcc_unreachable ();
849 else
851 fixed_regs[i] = fixed;
852 call_used_regs[i] = call_used;
853 #ifdef CALL_REALLY_USED_REGISTERS
854 if (fixed == 0)
855 call_really_used_regs[i] = call_used;
856 #endif
860 else
862 warning (0, "unknown register name: %s", name);
866 /* Mark register number I as global. */
867 void
868 globalize_reg (tree decl, int i)
870 location_t loc = DECL_SOURCE_LOCATION (decl);
872 #ifdef STACK_REGS
873 if (IN_RANGE (i, FIRST_STACK_REG, LAST_STACK_REG))
875 error ("stack register used for global register variable");
876 return;
878 #endif
880 if (fixed_regs[i] == 0 && no_global_reg_vars)
881 error_at (loc, "global register variable follows a function definition");
883 if (global_regs[i])
885 warning_at (loc, 0,
886 "register of %qD used for multiple global register variables",
887 decl);
888 inform (DECL_SOURCE_LOCATION (global_regs_decl[i]),
889 "conflicts with %qD", global_regs_decl[i]);
890 return;
893 if (call_used_regs[i] && ! fixed_regs[i])
894 warning_at (loc, 0, "call-clobbered register used for global register variable");
896 global_regs[i] = 1;
897 global_regs_decl[i] = decl;
899 /* If we're globalizing the frame pointer, we need to set the
900 appropriate regs_invalidated_by_call bit, even if it's already
901 set in fixed_regs. */
902 if (i != STACK_POINTER_REGNUM)
904 SET_HARD_REG_BIT (regs_invalidated_by_call, i);
905 SET_REGNO_REG_SET (regs_invalidated_by_call_regset, i);
908 /* If already fixed, nothing else to do. */
909 if (fixed_regs[i])
910 return;
912 fixed_regs[i] = call_used_regs[i] = 1;
913 #ifdef CALL_REALLY_USED_REGISTERS
914 call_really_used_regs[i] = 1;
915 #endif
917 SET_HARD_REG_BIT (fixed_reg_set, i);
918 SET_HARD_REG_BIT (call_used_reg_set, i);
919 SET_HARD_REG_BIT (call_fixed_reg_set, i);
921 reinit_regs ();
925 /* Structure used to record preferences of given pseudo. */
926 struct reg_pref
928 /* (enum reg_class) prefclass is the preferred class. May be
929 NO_REGS if no class is better than memory. */
930 char prefclass;
932 /* altclass is a register class that we should use for allocating
933 pseudo if no register in the preferred class is available.
934 If no register in this class is available, memory is preferred.
936 It might appear to be more general to have a bitmask of classes here,
937 but since it is recommended that there be a class corresponding to the
938 union of most major pair of classes, that generality is not required. */
939 char altclass;
941 /* allocnoclass is a register class that IRA uses for allocating
942 the pseudo. */
943 char allocnoclass;
946 /* Record preferences of each pseudo. This is available after RA is
947 run. */
948 static struct reg_pref *reg_pref;
950 /* Current size of reg_info. */
951 static int reg_info_size;
953 /* Return the reg_class in which pseudo reg number REGNO is best allocated.
954 This function is sometimes called before the info has been computed.
955 When that happens, just return GENERAL_REGS, which is innocuous. */
956 enum reg_class
957 reg_preferred_class (int regno)
959 if (reg_pref == 0)
960 return GENERAL_REGS;
962 return (enum reg_class) reg_pref[regno].prefclass;
965 enum reg_class
966 reg_alternate_class (int regno)
968 if (reg_pref == 0)
969 return ALL_REGS;
971 return (enum reg_class) reg_pref[regno].altclass;
974 /* Return the reg_class which is used by IRA for its allocation. */
975 enum reg_class
976 reg_allocno_class (int regno)
978 if (reg_pref == 0)
979 return NO_REGS;
981 return (enum reg_class) reg_pref[regno].allocnoclass;
986 /* Allocate space for reg info. */
987 static void
988 allocate_reg_info (void)
990 reg_info_size = max_reg_num ();
991 gcc_assert (! reg_pref && ! reg_renumber);
992 reg_renumber = XNEWVEC (short, reg_info_size);
993 reg_pref = XCNEWVEC (struct reg_pref, reg_info_size);
994 memset (reg_renumber, -1, reg_info_size * sizeof (short));
998 /* Resize reg info. The new elements will be uninitialized. Return
999 TRUE if new elements (for new pseudos) were added. */
1000 bool
1001 resize_reg_info (void)
1003 int old;
1005 if (reg_pref == NULL)
1007 allocate_reg_info ();
1008 return true;
1010 if (reg_info_size == max_reg_num ())
1011 return false;
1012 old = reg_info_size;
1013 reg_info_size = max_reg_num ();
1014 gcc_assert (reg_pref && reg_renumber);
1015 reg_renumber = XRESIZEVEC (short, reg_renumber, reg_info_size);
1016 reg_pref = XRESIZEVEC (struct reg_pref, reg_pref, reg_info_size);
1017 memset (reg_pref + old, -1,
1018 (reg_info_size - old) * sizeof (struct reg_pref));
1019 memset (reg_renumber + old, -1, (reg_info_size - old) * sizeof (short));
1020 return true;
1024 /* Free up the space allocated by allocate_reg_info. */
1025 void
1026 free_reg_info (void)
1028 if (reg_pref)
1030 free (reg_pref);
1031 reg_pref = NULL;
1034 if (reg_renumber)
1036 free (reg_renumber);
1037 reg_renumber = NULL;
1041 /* Initialize some global data for this pass. */
1042 static unsigned int
1043 reginfo_init (void)
1045 if (df)
1046 df_compute_regs_ever_live (true);
1048 /* This prevents dump_flow_info from losing if called
1049 before reginfo is run. */
1050 reg_pref = NULL;
1051 /* No more global register variables may be declared. */
1052 no_global_reg_vars = 1;
1053 return 1;
1056 struct rtl_opt_pass pass_reginfo_init =
1059 RTL_PASS,
1060 "reginfo", /* name */
1061 NULL, /* gate */
1062 reginfo_init, /* execute */
1063 NULL, /* sub */
1064 NULL, /* next */
1065 0, /* static_pass_number */
1066 TV_NONE, /* tv_id */
1067 0, /* properties_required */
1068 0, /* properties_provided */
1069 0, /* properties_destroyed */
1070 0, /* todo_flags_start */
1071 0 /* todo_flags_finish */
1077 /* Set up preferred, alternate, and cover classes for REGNO as
1078 PREFCLASS, ALTCLASS, and ALLOCNOCLASS. */
1079 void
1080 setup_reg_classes (int regno,
1081 enum reg_class prefclass, enum reg_class altclass,
1082 enum reg_class allocnoclass)
1084 if (reg_pref == NULL)
1085 return;
1086 gcc_assert (reg_info_size == max_reg_num ());
1087 reg_pref[regno].prefclass = prefclass;
1088 reg_pref[regno].altclass = altclass;
1089 reg_pref[regno].allocnoclass = allocnoclass;
1093 /* This is the `regscan' pass of the compiler, run just before cse and
1094 again just before loop. It finds the first and last use of each
1095 pseudo-register. */
1097 static void reg_scan_mark_refs (rtx, rtx);
1099 void
1100 reg_scan (rtx f, unsigned int nregs ATTRIBUTE_UNUSED)
1102 rtx insn;
1104 timevar_push (TV_REG_SCAN);
1106 for (insn = f; insn; insn = NEXT_INSN (insn))
1107 if (INSN_P (insn))
1109 reg_scan_mark_refs (PATTERN (insn), insn);
1110 if (REG_NOTES (insn))
1111 reg_scan_mark_refs (REG_NOTES (insn), insn);
1114 timevar_pop (TV_REG_SCAN);
1118 /* X is the expression to scan. INSN is the insn it appears in.
1119 NOTE_FLAG is nonzero if X is from INSN's notes rather than its body.
1120 We should only record information for REGs with numbers
1121 greater than or equal to MIN_REGNO. */
1122 static void
1123 reg_scan_mark_refs (rtx x, rtx insn)
1125 enum rtx_code code;
1126 rtx dest;
1127 rtx note;
1129 if (!x)
1130 return;
1131 code = GET_CODE (x);
1132 switch (code)
1134 case CONST:
1135 case CONST_INT:
1136 case CONST_DOUBLE:
1137 case CONST_FIXED:
1138 case CONST_VECTOR:
1139 case CC0:
1140 case PC:
1141 case SYMBOL_REF:
1142 case LABEL_REF:
1143 case ADDR_VEC:
1144 case ADDR_DIFF_VEC:
1145 case REG:
1146 return;
1148 case EXPR_LIST:
1149 if (XEXP (x, 0))
1150 reg_scan_mark_refs (XEXP (x, 0), insn);
1151 if (XEXP (x, 1))
1152 reg_scan_mark_refs (XEXP (x, 1), insn);
1153 break;
1155 case INSN_LIST:
1156 if (XEXP (x, 1))
1157 reg_scan_mark_refs (XEXP (x, 1), insn);
1158 break;
1160 case CLOBBER:
1161 if (MEM_P (XEXP (x, 0)))
1162 reg_scan_mark_refs (XEXP (XEXP (x, 0), 0), insn);
1163 break;
1165 case SET:
1166 /* Count a set of the destination if it is a register. */
1167 for (dest = SET_DEST (x);
1168 GET_CODE (dest) == SUBREG || GET_CODE (dest) == STRICT_LOW_PART
1169 || GET_CODE (dest) == ZERO_EXTEND;
1170 dest = XEXP (dest, 0))
1173 /* If this is setting a pseudo from another pseudo or the sum of a
1174 pseudo and a constant integer and the other pseudo is known to be
1175 a pointer, set the destination to be a pointer as well.
1177 Likewise if it is setting the destination from an address or from a
1178 value equivalent to an address or to the sum of an address and
1179 something else.
1181 But don't do any of this if the pseudo corresponds to a user
1182 variable since it should have already been set as a pointer based
1183 on the type. */
1185 if (REG_P (SET_DEST (x))
1186 && REGNO (SET_DEST (x)) >= FIRST_PSEUDO_REGISTER
1187 /* If the destination pseudo is set more than once, then other
1188 sets might not be to a pointer value (consider access to a
1189 union in two threads of control in the presence of global
1190 optimizations). So only set REG_POINTER on the destination
1191 pseudo if this is the only set of that pseudo. */
1192 && DF_REG_DEF_COUNT (REGNO (SET_DEST (x))) == 1
1193 && ! REG_USERVAR_P (SET_DEST (x))
1194 && ! REG_POINTER (SET_DEST (x))
1195 && ((REG_P (SET_SRC (x))
1196 && REG_POINTER (SET_SRC (x)))
1197 || ((GET_CODE (SET_SRC (x)) == PLUS
1198 || GET_CODE (SET_SRC (x)) == LO_SUM)
1199 && CONST_INT_P (XEXP (SET_SRC (x), 1))
1200 && REG_P (XEXP (SET_SRC (x), 0))
1201 && REG_POINTER (XEXP (SET_SRC (x), 0)))
1202 || GET_CODE (SET_SRC (x)) == CONST
1203 || GET_CODE (SET_SRC (x)) == SYMBOL_REF
1204 || GET_CODE (SET_SRC (x)) == LABEL_REF
1205 || (GET_CODE (SET_SRC (x)) == HIGH
1206 && (GET_CODE (XEXP (SET_SRC (x), 0)) == CONST
1207 || GET_CODE (XEXP (SET_SRC (x), 0)) == SYMBOL_REF
1208 || GET_CODE (XEXP (SET_SRC (x), 0)) == LABEL_REF))
1209 || ((GET_CODE (SET_SRC (x)) == PLUS
1210 || GET_CODE (SET_SRC (x)) == LO_SUM)
1211 && (GET_CODE (XEXP (SET_SRC (x), 1)) == CONST
1212 || GET_CODE (XEXP (SET_SRC (x), 1)) == SYMBOL_REF
1213 || GET_CODE (XEXP (SET_SRC (x), 1)) == LABEL_REF))
1214 || ((note = find_reg_note (insn, REG_EQUAL, 0)) != 0
1215 && (GET_CODE (XEXP (note, 0)) == CONST
1216 || GET_CODE (XEXP (note, 0)) == SYMBOL_REF
1217 || GET_CODE (XEXP (note, 0)) == LABEL_REF))))
1218 REG_POINTER (SET_DEST (x)) = 1;
1220 /* If this is setting a register from a register or from a simple
1221 conversion of a register, propagate REG_EXPR. */
1222 if (REG_P (dest) && !REG_ATTRS (dest))
1224 rtx src = SET_SRC (x);
1226 while (GET_CODE (src) == SIGN_EXTEND
1227 || GET_CODE (src) == ZERO_EXTEND
1228 || GET_CODE (src) == TRUNCATE
1229 || (GET_CODE (src) == SUBREG && subreg_lowpart_p (src)))
1230 src = XEXP (src, 0);
1232 set_reg_attrs_from_value (dest, src);
1235 /* ... fall through ... */
1237 default:
1239 const char *fmt = GET_RTX_FORMAT (code);
1240 int i;
1241 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1243 if (fmt[i] == 'e')
1244 reg_scan_mark_refs (XEXP (x, i), insn);
1245 else if (fmt[i] == 'E' && XVEC (x, i) != 0)
1247 int j;
1248 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1249 reg_scan_mark_refs (XVECEXP (x, i, j), insn);
1257 /* Return nonzero if C1 is a subset of C2, i.e., if every register in C1
1258 is also in C2. */
1260 reg_class_subset_p (reg_class_t c1, reg_class_t c2)
1262 return (c1 == c2
1263 || c2 == ALL_REGS
1264 || hard_reg_set_subset_p (reg_class_contents[(int) c1],
1265 reg_class_contents[(int) c2]));
1268 /* Return nonzero if there is a register that is in both C1 and C2. */
1270 reg_classes_intersect_p (reg_class_t c1, reg_class_t c2)
1272 return (c1 == c2
1273 || c1 == ALL_REGS
1274 || c2 == ALL_REGS
1275 || hard_reg_set_intersect_p (reg_class_contents[(int) c1],
1276 reg_class_contents[(int) c2]));
1281 /* Passes for keeping and updating info about modes of registers
1282 inside subregisters. */
1284 #ifdef CANNOT_CHANGE_MODE_CLASS
1286 static bitmap invalid_mode_changes;
1288 static void
1289 record_subregs_of_mode (rtx subreg, bitmap subregs_of_mode)
1291 enum machine_mode mode;
1292 unsigned int regno;
1294 if (!REG_P (SUBREG_REG (subreg)))
1295 return;
1297 regno = REGNO (SUBREG_REG (subreg));
1298 mode = GET_MODE (subreg);
1300 if (regno < FIRST_PSEUDO_REGISTER)
1301 return;
1303 if (bitmap_set_bit (subregs_of_mode,
1304 regno * NUM_MACHINE_MODES + (unsigned int) mode))
1306 unsigned int rclass;
1307 for (rclass = 0; rclass < N_REG_CLASSES; rclass++)
1308 if (!bitmap_bit_p (invalid_mode_changes,
1309 regno * N_REG_CLASSES + rclass)
1310 && CANNOT_CHANGE_MODE_CLASS (PSEUDO_REGNO_MODE (regno),
1311 mode, (enum reg_class) rclass))
1312 bitmap_set_bit (invalid_mode_changes,
1313 regno * N_REG_CLASSES + rclass);
1317 /* Call record_subregs_of_mode for all the subregs in X. */
1318 static void
1319 find_subregs_of_mode (rtx x, bitmap subregs_of_mode)
1321 enum rtx_code code = GET_CODE (x);
1322 const char * const fmt = GET_RTX_FORMAT (code);
1323 int i;
1325 if (code == SUBREG)
1326 record_subregs_of_mode (x, subregs_of_mode);
1328 /* Time for some deep diving. */
1329 for (i = GET_RTX_LENGTH (code) - 1; i >= 0; i--)
1331 if (fmt[i] == 'e')
1332 find_subregs_of_mode (XEXP (x, i), subregs_of_mode);
1333 else if (fmt[i] == 'E')
1335 int j;
1336 for (j = XVECLEN (x, i) - 1; j >= 0; j--)
1337 find_subregs_of_mode (XVECEXP (x, i, j), subregs_of_mode);
1342 void
1343 init_subregs_of_mode (void)
1345 basic_block bb;
1346 rtx insn;
1347 bitmap_obstack srom_obstack;
1348 bitmap subregs_of_mode;
1350 gcc_assert (invalid_mode_changes == NULL);
1351 invalid_mode_changes = BITMAP_ALLOC (NULL);
1352 bitmap_obstack_initialize (&srom_obstack);
1353 subregs_of_mode = BITMAP_ALLOC (&srom_obstack);
1355 FOR_EACH_BB (bb)
1356 FOR_BB_INSNS (bb, insn)
1357 if (NONDEBUG_INSN_P (insn))
1358 find_subregs_of_mode (PATTERN (insn), subregs_of_mode);
1360 BITMAP_FREE (subregs_of_mode);
1361 bitmap_obstack_release (&srom_obstack);
1364 /* Return 1 if REGNO has had an invalid mode change in CLASS from FROM
1365 mode. */
1366 bool
1367 invalid_mode_change_p (unsigned int regno,
1368 enum reg_class rclass)
1370 return bitmap_bit_p (invalid_mode_changes,
1371 regno * N_REG_CLASSES + (unsigned) rclass);
1374 void
1375 finish_subregs_of_mode (void)
1377 BITMAP_FREE (invalid_mode_changes);
1379 #else
1380 void
1381 init_subregs_of_mode (void)
1384 void
1385 finish_subregs_of_mode (void)
1389 #endif /* CANNOT_CHANGE_MODE_CLASS */