gcc/config/mn10300/mn10300.h

   1 /* Definitions of target machine for GNU compiler.
   2    Matsushita MN10300 series
   3    Copyright (C) 1996, 1997, 1998, 1999, 2000, 2001, 2002, 2003, 2004, 2005,
   4    2007, 2008, 2009, 2010 Free Software Foundation, Inc.
   5    Contributed by Jeff Law (law@cygnus.com).
   6
   7    This file is part of GCC.
   8
   9    GCC is free software; you can redistribute it and/or modify
  10    it under the terms of the GNU General Public License as published by
  11    the Free Software Foundation; either version 3, or (at your option)
  12    any later version.
  13
  14    GCC is distributed in the hope that it will be useful,
  15    but WITHOUT ANY WARRANTY; without even the implied warranty of
  16    MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE.  See the
  17    GNU General Public License for more details.
  18
  19    You should have received a copy of the GNU General Public License
  20    along with GCC; see the file COPYING3.  If not see
  21    <http://www.gnu.org/licenses/>.  */
  22
  23 #undef ASM_SPEC
  24 #undef LIB_SPEC
  25 #undef ENDFILE_SPEC
  26 #undef  LINK_SPEC
  27 #define LINK_SPEC "%{mrelax:--relax}"
  28 #undef  STARTFILE_SPEC
  29 #define STARTFILE_SPEC "%{!mno-crt0:%{!shared:%{pg:gcrt0%O%s}%{!pg:%{p:mcrt0%O%s}%{!p:crt0%O%s}}}}"
  30
  31 /* Names to predefine in the preprocessor for this target machine.  */
  32
  33 #define TARGET_CPU_CPP_BUILTINS()               \
  34   do                                            \
  35     {                                           \
  36       builtin_define ("__mn10300__");           \
  37       builtin_define ("__MN10300__");           \
  38       builtin_assert ("cpu=mn10300");           \
  39       builtin_assert ("machine=mn10300");       \
  40                                                 \
  41       if (TARGET_AM33_2)                        \
  42         {                                       \
  43           builtin_define ("__AM33__=2");        \
  44           builtin_define ("__AM33_2__");        \
  45         }                                       \
  46       else if (TARGET_AM33)                     \
  47         builtin_define ("__AM33__=1");          \
  48     }                                           \
  49   while (0)
  50
  51 extern GTY(()) int mn10300_unspec_int_label_counter;
  52
  53 enum processor_type
  54 {
  55   PROCESSOR_MN10300,
  56   PROCESSOR_AM33,
  57   PROCESSOR_AM33_2
  58 };
  59
  60 extern enum processor_type mn10300_processor;
  61
  62 #define TARGET_AM33     (mn10300_processor >= PROCESSOR_AM33)
  63 #define TARGET_AM33_2   (mn10300_processor == PROCESSOR_AM33_2)
  64
  65 #ifndef PROCESSOR_DEFAULT
  66 #define PROCESSOR_DEFAULT PROCESSOR_MN10300
  67 #endif
  68
  69 /* Print subsidiary information on the compiler version in use.  */
  70
  71 #define TARGET_VERSION fprintf (stderr, " (MN10300)");
  72
  73 \f
  74 /* Target machine storage layout */
  75
  76 /* Define this if most significant bit is lowest numbered
  77    in instructions that operate on numbered bit-fields.
  78    This is not true on the Matsushita MN1003.  */
  79 #define BITS_BIG_ENDIAN 0
  80
  81 /* Define this if most significant byte of a word is the lowest numbered.  */
  82 /* This is not true on the Matsushita MN10300.  */
  83 #define BYTES_BIG_ENDIAN 0
  84
  85 /* Define this if most significant word of a multiword number is lowest
  86    numbered.
  87    This is not true on the Matsushita MN10300.  */
  88 #define WORDS_BIG_ENDIAN 0
  89
  90 /* Width of a word, in units (bytes).  */
  91 #define UNITS_PER_WORD          4
  92
  93 /* Allocation boundary (in *bits*) for storing arguments in argument list.  */
  94 #define PARM_BOUNDARY           32
  95
  96 /* The stack goes in 32-bit lumps.  */
  97 #define STACK_BOUNDARY          32
  98
  99 /* Allocation boundary (in *bits*) for the code of a function.
 100    8 is the minimum boundary; it's unclear if bigger alignments
 101    would improve performance.  */
 102 #define FUNCTION_BOUNDARY 8
 103
 104 /* No data type wants to be aligned rounder than this.  */
 105 #define BIGGEST_ALIGNMENT       32
 106
 107 /* Alignment of field after `int : 0' in a structure.  */
 108 #define EMPTY_FIELD_BOUNDARY    32
 109
 110 /* Define this if move instructions will actually fail to work
 111    when given unaligned data.  */
 112 #define STRICT_ALIGNMENT 1
 113
 114 /* Define this as 1 if `char' should by default be signed; else as 0.  */
 115 #define DEFAULT_SIGNED_CHAR 0
 116 \f
 117 /* Standard register usage.  */
 118
 119 /* Number of actual hardware registers.
 120    The hardware registers are assigned numbers for the compiler
 121    from 0 to just below FIRST_PSEUDO_REGISTER.
 122
 123    All registers that the compiler knows about must be given numbers,
 124    even those that are not normally considered general registers.  */
 125
 126 #define FIRST_PSEUDO_REGISTER 52
 127
 128 /* Specify machine-specific register numbers.  The commented out entries
 129    are defined in mn10300.md.  */
 130 #define FIRST_DATA_REGNUM      0
 131 #define LAST_DATA_REGNUM       3
 132 #define FIRST_ADDRESS_REGNUM   4
 133 /* #define PIC_REG             6 */
 134 #define LAST_ADDRESS_REGNUM    8
 135 /* #define SP_REG              9 */
 136 #define FIRST_EXTENDED_REGNUM 10
 137 #define LAST_EXTENDED_REGNUM  17
 138 #define FIRST_FP_REGNUM       18
 139 #define LAST_FP_REGNUM        49
 140 #define MDR_REGNUM            50
 141 /* #define CC_REG             51 */
 142 #define FIRST_ARGUMENT_REGNUM  0
 143
 144 /* Specify the registers used for certain standard purposes.
 145    The values of these macros are register numbers.  */
 146
 147 /* Register to use for pushing function arguments.  */
 148 #define STACK_POINTER_REGNUM (LAST_ADDRESS_REGNUM + 1)
 149
 150 /* Base register for access to local variables of the function.  */
 151 #define FRAME_POINTER_REGNUM (LAST_ADDRESS_REGNUM - 1)
 152
 153 /* Base register for access to arguments of the function.  This
 154    is a fake register and will be eliminated into either the frame
 155    pointer or stack pointer.  */
 156 #define ARG_POINTER_REGNUM LAST_ADDRESS_REGNUM
 157
 158 /* Register in which static-chain is passed to a function.  */
 159 #define STATIC_CHAIN_REGNUM (FIRST_ADDRESS_REGNUM + 1)
 160
 161 /* 1 for registers that have pervasive standard uses
 162    and are not available for the register allocator.  */
 163
 164 #define FIXED_REGISTERS \
 165   { 0, 0, 0, 0, 0, 0, 0, 0, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0 \
 166   , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0       \
 167   , 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 1, 1 \
 168   }
 169
 170 /* 1 for registers not available across function calls.
 171    These must include the FIXED_REGISTERS and also any
 172    registers that can be used without being saved.
 173    The latter must include the registers where values are returned
 174    and the register where structure-value addresses are passed.
 175    Aside from that, you can include as many other registers as you
 176    like.  */
 177
 178 #define CALL_USED_REGISTERS \
 179   { 1, 1, 0, 0, 1, 1, 0, 0, 1, 1, 1, 1, 1, 1, 0, 0, 0, 0 \
 180   , 1, 1, 1, 1, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0       \
 181   , 0, 0, 0, 0, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1, 1 \
 182   }
 183
 184 /* Note: The definition of CALL_REALLY_USED_REGISTERS is not
 185    redundant.  It is needed when compiling in PIC mode because
 186    the a2 register becomes fixed (and hence must be marked as
 187    call_used) but in order to preserve the ABI it is not marked
 188    as call_really_used.  */
 189 #define CALL_REALLY_USED_REGISTERS CALL_USED_REGISTERS
 190
 191 #define REG_ALLOC_ORDER \
 192   { 0, 1, 4, 5, 2, 3, 6, 7, 10, 11, 12, 13, 14, 15, 16, 17, 8, 9 \
 193   , 42, 43, 44, 45, 46, 47, 48, 49, 34, 35, 36, 37, 38, 39, 40, 41 \
 194   , 18, 19, 20, 21, 22, 23, 24, 25, 26, 27, 28, 29, 30, 31, 32, 33, 51 \
 195   }
 196
 197 #define CONDITIONAL_REGISTER_USAGE \
 198 {                                               \
 199   unsigned int i;                               \
 200                                                 \
 201   if (!TARGET_AM33)                             \
 202     {                                           \
 203       for (i = FIRST_EXTENDED_REGNUM;           \
 204            i <= LAST_EXTENDED_REGNUM; i++)      \
 205         fixed_regs[i] = call_used_regs[i] = 1;  \
 206     }                                           \
 207   if (!TARGET_AM33_2)                           \
 208     {                                           \
 209       for (i = FIRST_FP_REGNUM;                 \
 210            i <= LAST_FP_REGNUM; i++)            \
 211         fixed_regs[i] = call_used_regs[i] = 1;  \
 212     }                                           \
 213   if (flag_pic)                                 \
 214     fixed_regs[PIC_OFFSET_TABLE_REGNUM] =       \
 215     call_used_regs[PIC_OFFSET_TABLE_REGNUM] = 1;\
 216 }
 217
 218 /* Return number of consecutive hard regs needed starting at reg REGNO
 219    to hold something of mode MODE.
 220
 221    This is ordinarily the length in words of a value of mode MODE
 222    but can be less for certain modes in special long registers.  */
 223
 224 #define HARD_REGNO_NREGS(REGNO, MODE)   \
 225   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 226
 227 /* Value is 1 if hard register REGNO can hold a value of machine-mode
 228    MODE.  */
 229 #define HARD_REGNO_MODE_OK(REGNO, MODE) \
 230   mn10300_hard_regno_mode_ok ((REGNO), (MODE))
 231
 232 /* Value is 1 if it is a good idea to tie two pseudo registers
 233    when one has mode MODE1 and one has mode MODE2.
 234    If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
 235    for any hard reg, then this must be 0 for correct output.  */
 236 #define MODES_TIEABLE_P(MODE1, MODE2) \
 237   mn10300_modes_tieable ((MODE1), (MODE2))
 238
 239 /* 4 data, and effectively 3 address registers is small as far as I'm
 240    concerned.  */
 241 #define TARGET_SMALL_REGISTER_CLASSES_FOR_MODE_P hook_bool_mode_true
 242 \f
 243 /* Define the classes of registers for register constraints in the
 244    machine description.  Also define ranges of constants.
 245
 246    One of the classes must always be named ALL_REGS and include all hard regs.
 247    If there is more than one class, another class must be named NO_REGS
 248    and contain no registers.
 249
 250    The name GENERAL_REGS must be the name of a class (or an alias for
 251    another name such as ALL_REGS).  This is the class of registers
 252    that is allowed by "g" or "r" in a register constraint.
 253    Also, registers outside this class are allocated only when
 254    instructions express preferences for them.
 255
 256    The classes must be numbered in nondecreasing order; that is,
 257    a larger-numbered class must never be contained completely
 258    in a smaller-numbered class.
 259
 260    For any two classes, it is very desirable that there be another
 261    class that represents their union.  */
 262
 263 enum reg_class
 264 {
 265   NO_REGS, DATA_REGS, ADDRESS_REGS, SP_REGS,
 266   DATA_OR_ADDRESS_REGS, SP_OR_ADDRESS_REGS,
 267   EXTENDED_REGS, DATA_OR_EXTENDED_REGS, ADDRESS_OR_EXTENDED_REGS,
 268   SP_OR_EXTENDED_REGS, SP_OR_ADDRESS_OR_EXTENDED_REGS,
 269   FP_REGS, FP_ACC_REGS, CC_REGS,
 270   GENERAL_REGS, ALL_REGS, LIM_REG_CLASSES
 271 };
 272
 273 #define N_REG_CLASSES (int) LIM_REG_CLASSES
 274
 275 /* Give names of register classes as strings for dump file.  */
 276
 277 #define REG_CLASS_NAMES                                         \
 278 { "NO_REGS", "DATA_REGS", "ADDRESS_REGS",                       \
 279   "SP_REGS", "DATA_OR_ADDRESS_REGS", "SP_OR_ADDRESS_REGS",      \
 280   "EXTENDED_REGS",                                              \
 281   "DATA_OR_EXTENDED_REGS", "ADDRESS_OR_EXTENDED_REGS",          \
 282   "SP_OR_EXTENDED_REGS", "SP_OR_ADDRESS_OR_EXTENDED_REGS",      \
 283   "FP_REGS", "FP_ACC_REGS", "CC_REGS",                          \
 284   "GENERAL_REGS", "ALL_REGS", "LIM_REGS"                        \
 285 }
 286
 287 /* Define which registers fit in which classes.
 288    This is an initializer for a vector of HARD_REG_SET
 289    of length N_REG_CLASSES.  */
 290
 291 #define REG_CLASS_CONTENTS                                      \
 292 { { 0,          0 },      /* No regs      */                    \
 293   { 0x0000000f, 0 },      /* DATA_REGS */                       \
 294   { 0x000001f0, 0 },      /* ADDRESS_REGS */                    \
 295   { 0x00000200, 0 },      /* SP_REGS */                         \
 296   { 0x000001ff, 0 },      /* DATA_OR_ADDRESS_REGS */            \
 297   { 0x000003f0, 0 },      /* SP_OR_ADDRESS_REGS */              \
 298   { 0x0003fc00, 0 },      /* EXTENDED_REGS */                   \
 299   { 0x0003fc0f, 0 },      /* DATA_OR_EXTENDED_REGS */           \
 300   { 0x0003fdf0, 0 },      /* ADDRESS_OR_EXTENDED_REGS */        \
 301   { 0x0003fe00, 0 },      /* SP_OR_EXTENDED_REGS */             \
 302   { 0x0003fff0, 0 },      /* SP_OR_ADDRESS_OR_EXTENDED_REGS */  \
 303   { 0xfffc0000, 0x3ffff },/* FP_REGS */                         \
 304   { 0x03fc0000, 0 },      /* FP_ACC_REGS */                     \
 305   { 0x00000000, 0x80000 },/* CC_REGS */                         \
 306   { 0x0003fdff, 0 },      /* GENERAL_REGS */                    \
 307   { 0xffffffff, 0xfffff } /* ALL_REGS   */                      \
 308 }
 309
 310 /* The following macro defines cover classes for Integrated Register
 311    Allocator.  Cover classes is a set of non-intersected register
 312    classes covering all hard registers used for register allocation
 313    purpose.  Any move between two registers of a cover class should be
 314    cheaper than load or store of the registers.  The macro value is
 315    array of register classes with LIM_REG_CLASSES used as the end
 316    marker.  */
 317
 318 #define IRA_COVER_CLASSES                                       \
 319 {                                                               \
 320   GENERAL_REGS, FP_REGS, LIM_REG_CLASSES                        \
 321 }
 322
 323 /* The same information, inverted:
 324    Return the class number of the smallest class containing
 325    reg number REGNO.  This could be a conditional expression
 326    or could index an array.  */
 327
 328 #define REGNO_REG_CLASS(REGNO)                       \
 329   ((REGNO) <= LAST_DATA_REGNUM ? DATA_REGS :         \
 330    (REGNO) <= LAST_ADDRESS_REGNUM ? ADDRESS_REGS :   \
 331    (REGNO) == STACK_POINTER_REGNUM ? SP_REGS :       \
 332    (REGNO) <= LAST_EXTENDED_REGNUM ? EXTENDED_REGS : \
 333    (REGNO) <= LAST_FP_REGNUM ? FP_REGS :             \
 334    (REGNO) == CC_REG ? CC_REGS :                     \
 335    NO_REGS)
 336
 337 /* The class value for index registers, and the one for base regs.  */
 338 #define INDEX_REG_CLASS DATA_OR_EXTENDED_REGS
 339 #define BASE_REG_CLASS  SP_OR_ADDRESS_REGS
 340
 341 /* Macros to check register numbers against specific register classes.  */
 342
 343 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
 344    and check its validity for a certain class.
 345    We have two alternate definitions for each of them.
 346    The usual definition accepts all pseudo regs; the other rejects
 347    them unless they have been allocated suitable hard regs.
 348    The symbol REG_OK_STRICT causes the latter definition to be used.
 349
 350    Most source files want to accept pseudo regs in the hope that
 351    they will get allocated to the class that the insn wants them to be in.
 352    Source files for reload pass need to be strict.
 353    After reload, it makes no difference, since pseudo regs have
 354    been eliminated by then.  */
 355
 356 /* These assume that REGNO is a hard or pseudo reg number.
 357    They give nonzero only if REGNO is a hard reg of the suitable class
 358    or a pseudo reg currently allocated to a suitable hard reg.
 359    Since they use reg_renumber, they are safe only once reg_renumber
 360    has been allocated, which happens in local-alloc.c.  */
 361
 362 #ifndef REG_OK_STRICT
 363 # define REG_STRICT 0
 364 #else
 365 # define REG_STRICT 1
 366 #endif
 367
 368 # define REGNO_IN_RANGE_P(regno,min,max,strict) \
 369   (IN_RANGE ((regno), (min), (max))             \
 370    || ((strict)                                 \
 371        ? (reg_renumber                          \
 372           && reg_renumber[(regno)] >= (min)     \
 373           && reg_renumber[(regno)] <= (max))    \
 374        : (regno) >= FIRST_PSEUDO_REGISTER))
 375
 376 #define REGNO_DATA_P(regno, strict) \
 377   (REGNO_IN_RANGE_P ((regno), FIRST_DATA_REGNUM, LAST_DATA_REGNUM, \
 378                      (strict)))
 379 #define REGNO_ADDRESS_P(regno, strict) \
 380   (REGNO_IN_RANGE_P ((regno), FIRST_ADDRESS_REGNUM, LAST_ADDRESS_REGNUM, \
 381                      (strict)))
 382 #define REGNO_SP_P(regno, strict) \
 383   (REGNO_IN_RANGE_P ((regno), STACK_POINTER_REGNUM, STACK_POINTER_REGNUM, \
 384                      (strict)))
 385 #define REGNO_EXTENDED_P(regno, strict) \
 386   (REGNO_IN_RANGE_P ((regno), FIRST_EXTENDED_REGNUM, LAST_EXTENDED_REGNUM, \
 387                      (strict)))
 388 #define REGNO_AM33_P(regno, strict) \
 389   (REGNO_DATA_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)) \
 390    || REGNO_EXTENDED_P ((regno), (strict)))
 391 #define REGNO_FP_P(regno, strict) \
 392   (REGNO_IN_RANGE_P ((regno), FIRST_FP_REGNUM, LAST_FP_REGNUM, (strict)))
 393
 394 #define REGNO_STRICT_OK_FOR_BASE_P(regno, strict) \
 395   (REGNO_SP_P ((regno), (strict)) \
 396    || REGNO_ADDRESS_P ((regno), (strict)) \
 397    || REGNO_EXTENDED_P ((regno), (strict)))
 398 #define REGNO_OK_FOR_BASE_P(regno) \
 399   (REGNO_STRICT_OK_FOR_BASE_P ((regno), REG_STRICT))
 400 #define REG_OK_FOR_BASE_P(X) \
 401   (REGNO_OK_FOR_BASE_P (REGNO (X)))
 402
 403 #define REGNO_STRICT_OK_FOR_BIT_BASE_P(regno, strict) \
 404   (REGNO_SP_P ((regno), (strict)) || REGNO_ADDRESS_P ((regno), (strict)))
 405 #define REGNO_OK_FOR_BIT_BASE_P(regno) \
 406   (REGNO_STRICT_OK_FOR_BIT_BASE_P ((regno), REG_STRICT))
 407 #define REG_OK_FOR_BIT_BASE_P(X) \
 408   (REGNO_OK_FOR_BIT_BASE_P (REGNO (X)))
 409
 410 #define REGNO_STRICT_OK_FOR_INDEX_P(regno, strict) \
 411   (REGNO_DATA_P ((regno), (strict)) || REGNO_EXTENDED_P ((regno), (strict)))
 412 #define REGNO_OK_FOR_INDEX_P(regno) \
 413   (REGNO_STRICT_OK_FOR_INDEX_P ((regno), REG_STRICT))
 414 #define REG_OK_FOR_INDEX_P(X) \
 415   (REGNO_OK_FOR_INDEX_P (REGNO (X)))
 416
 417 /* Given an rtx X being reloaded into a reg required to be
 418    in class CLASS, return the class of reg to actually use.
 419    In general this is just CLASS; but on some machines
 420    in some cases it is preferable to use a more restrictive class.  */
 421
 422 #define PREFERRED_RELOAD_CLASS(X,CLASS)                         \
 423   ((X) == stack_pointer_rtx && (CLASS) != SP_REGS               \
 424    ? ADDRESS_OR_EXTENDED_REGS                                   \
 425    : (MEM_P (X)                                                 \
 426       || (REG_P (X)                                             \
 427           && REGNO (X) >= FIRST_PSEUDO_REGISTER)                \
 428       || (GET_CODE (X) == SUBREG                                \
 429           && REG_P (SUBREG_REG (X))                             \
 430           && REGNO (SUBREG_REG (X)) >= FIRST_PSEUDO_REGISTER)   \
 431       ? LIMIT_RELOAD_CLASS (GET_MODE (X), CLASS)                \
 432       : (CLASS)))
 433
 434 #define PREFERRED_OUTPUT_RELOAD_CLASS(X,CLASS) \
 435   (X == stack_pointer_rtx && CLASS != SP_REGS \
 436    ? ADDRESS_OR_EXTENDED_REGS : CLASS)
 437
 438 #define LIMIT_RELOAD_CLASS(MODE, CLASS) \
 439   (!TARGET_AM33 && (MODE == QImode || MODE == HImode) ? DATA_REGS : CLASS)
 440
 441 #define SECONDARY_RELOAD_CLASS(CLASS,MODE,IN) \
 442   mn10300_secondary_reload_class(CLASS,MODE,IN)
 443
 444 /* Return the maximum number of consecutive registers
 445    needed to represent mode MODE in a register of class CLASS.  */
 446
 447 #define CLASS_MAX_NREGS(CLASS, MODE)    \
 448   ((GET_MODE_SIZE (MODE) + UNITS_PER_WORD - 1) / UNITS_PER_WORD)
 449
 450 /* A class that contains registers which the compiler must always
 451    access in a mode that is the same size as the mode in which it
 452    loaded the register.  */
 453 #define CLASS_CANNOT_CHANGE_SIZE FP_REGS
 454
 455 /* Return 1 if VALUE is in the range specified.  */
 456
 457 #define INT_8_BITS(VALUE) ((unsigned) (VALUE) + 0x80 < 0x100)
 458 #define INT_16_BITS(VALUE) ((unsigned) (VALUE) + 0x8000 < 0x10000)
 459
 460 \f
 461 /* Stack layout; function entry, exit and calling.  */
 462
 463 /* Define this if pushing a word on the stack
 464    makes the stack pointer a smaller address.  */
 465
 466 #define STACK_GROWS_DOWNWARD
 467
 468 /* Define this to nonzero if the nominal address of the stack frame
 469    is at the high-address end of the local variables;
 470    that is, each additional local variable allocated
 471    goes at a more negative offset in the frame.  */
 472
 473 #define FRAME_GROWS_DOWNWARD 1
 474
 475 /* Offset within stack frame to start allocating local variables at.
 476    If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
 477    first local allocated.  Otherwise, it is the offset to the BEGINNING
 478    of the first local allocated.  */
 479
 480 #define STARTING_FRAME_OFFSET 0
 481
 482 /* Offset of first parameter from the argument pointer register value.  */
 483 /* Is equal to the size of the saved fp + pc, even if an fp isn't
 484    saved since the value is used before we know.  */
 485
 486 #define FIRST_PARM_OFFSET(FNDECL) 4
 487
 488 #define ELIMINABLE_REGS                         \
 489 {{ ARG_POINTER_REGNUM, STACK_POINTER_REGNUM},   \
 490  { ARG_POINTER_REGNUM, FRAME_POINTER_REGNUM},   \
 491  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM}}
 492
 493 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET) \
 494   OFFSET = mn10300_initial_offset (FROM, TO)
 495
 496 /* We use d0/d1 for passing parameters, so allocate 8 bytes of space
 497    for a register flushback area.  */
 498 #define REG_PARM_STACK_SPACE(DECL) 8
 499 #define OUTGOING_REG_PARM_STACK_SPACE(FNTYPE) 1
 500 #define ACCUMULATE_OUTGOING_ARGS 1
 501
 502 /* So we can allocate space for return pointers once for the function
 503    instead of around every call.  */
 504 #define STACK_POINTER_OFFSET 4
 505
 506 /* 1 if N is a possible register number for function argument passing.
 507    On the MN10300, d0 and d1 are used in this way.  */
 508
 509 #define FUNCTION_ARG_REGNO_P(N) ((N) <= 1)
 510
 511 \f
 512 /* Define a data type for recording info about an argument list
 513    during the scan of that argument list.  This data type should
 514    hold all necessary information about the function itself
 515    and about the args processed so far, enough to enable macros
 516    such as FUNCTION_ARG to determine where the next arg should go.
 517
 518    On the MN10300, this is a single integer, which is a number of bytes
 519    of arguments scanned so far.  */
 520
 521 #define CUMULATIVE_ARGS struct cum_arg
 522
 523 struct cum_arg
 524 {
 525   int nbytes;
 526 };
 527
 528 /* Initialize a variable CUM of type CUMULATIVE_ARGS
 529    for a call to a function whose data type is FNTYPE.
 530    For a library call, FNTYPE is 0.
 531
 532    On the MN10300, the offset starts at 0.  */
 533
 534 #define INIT_CUMULATIVE_ARGS(CUM, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 535  ((CUM).nbytes = 0)
 536
 537 /* Update the data in CUM to advance over an argument
 538    of mode MODE and data type TYPE.
 539    (TYPE is null for libcalls where that information may not be available.)  */
 540
 541 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED)    \
 542  ((CUM).nbytes += ((MODE) != BLKmode                    \
 543                    ? (GET_MODE_SIZE (MODE) + 3) & ~3    \
 544                    : (int_size_in_bytes (TYPE) + 3) & ~3))
 545
 546 /* Define where to put the arguments to a function.
 547    Value is zero to push the argument on the stack,
 548    or a hard register in which to store the argument.
 549
 550    MODE is the argument's machine mode.
 551    TYPE is the data type of the argument (as a tree).
 552     This is null for libcalls where that information may
 553     not be available.
 554    CUM is a variable of type CUMULATIVE_ARGS which gives info about
 555     the preceding args and about the function being called.
 556    NAMED is nonzero if this argument is a named parameter
 557     (otherwise it is an extra parameter matching an ellipsis).  */
 558
 559 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
 560   mn10300_function_arg (&(CUM), MODE, TYPE, NAMED)
 561
 562 #define FUNCTION_VALUE_REGNO_P(N)  mn10300_function_value_regno_p (N)
 563
 564 #define DEFAULT_PCC_STRUCT_RETURN 0
 565
 566 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
 567    the stack pointer does not matter.  The value is tested only in
 568    functions that have frame pointers.
 569    No definition is equivalent to always zero.  */
 570
 571 #define EXIT_IGNORE_STACK 1
 572
 573 /* Output assembler code to FILE to increment profiler label # LABELNO
 574    for profiling a function entry.  */
 575
 576 #define FUNCTION_PROFILER(FILE, LABELNO) ;
 577
 578 /* Length in units of the trampoline for entering a nested function.  */
 579
 580 #define TRAMPOLINE_SIZE 0x1b
 581
 582 #define TRAMPOLINE_ALIGNMENT 32
 583
 584 /* A C expression whose value is RTL representing the value of the return
 585    address for the frame COUNT steps up from the current frame.
 586
 587    On the mn10300, the return address is not at a constant location
 588    due to the frame layout.  Luckily, it is at a constant offset from
 589    the argument pointer, so we define RETURN_ADDR_RTX to return a
 590    MEM using arg_pointer_rtx.  Reload will replace arg_pointer_rtx
 591    with a reference to the stack/frame pointer + an appropriate offset.  */
 592
 593 #define RETURN_ADDR_RTX(COUNT, FRAME)   \
 594   ((COUNT == 0)                         \
 595    ? gen_rtx_MEM (Pmode, arg_pointer_rtx) \
 596    : (rtx) 0)
 597
 598 #define INCOMING_RETURN_ADDR_RTX gen_rtx_REG (Pmode, MDR_REGNUM)
 599 \f
 600 /* Maximum number of registers that can appear in a valid memory address.  */
 601
 602 #define MAX_REGS_PER_ADDRESS 2
 603
 604 \f
 605 #define HAVE_POST_INCREMENT (TARGET_AM33)
 606
 607 /* Accept either REG or SUBREG where a register is valid.  */
 608
 609 #define RTX_OK_FOR_BASE_P(X, strict)                            \
 610   ((REG_P (X) && REGNO_STRICT_OK_FOR_BASE_P (REGNO (X),         \
 611                                              (strict)))         \
 612    || (GET_CODE (X) == SUBREG && REG_P (SUBREG_REG (X))         \
 613        && REGNO_STRICT_OK_FOR_BASE_P (REGNO (SUBREG_REG (X)),   \
 614                                       (strict))))
 615
 616 \f
 617
 618 /* Nonzero if the constant value X is a legitimate general operand.
 619    It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE.  */
 620 #define LEGITIMATE_CONSTANT_P(X) mn10300_legitimate_constant_p (X)
 621
 622 /* Zero if this needs fixing up to become PIC.  */
 623
 624 #define LEGITIMATE_PIC_OPERAND_P(X) \
 625   mn10300_legitimate_pic_operand_p (X)
 626
 627 /* Register to hold the addressing base for
 628    position independent code access to data items.  */
 629 #define PIC_OFFSET_TABLE_REGNUM PIC_REG
 630
 631 /* The name of the pseudo-symbol representing the Global Offset Table.  */
 632 #define GOT_SYMBOL_NAME "*_GLOBAL_OFFSET_TABLE_"
 633
 634 #define SYMBOLIC_CONST_P(X)     \
 635 ((GET_CODE (X) == SYMBOL_REF || GET_CODE (X) == LABEL_REF)      \
 636   && ! LEGITIMATE_PIC_OPERAND_P (X))
 637
 638 /* Non-global SYMBOL_REFs have SYMBOL_REF_FLAG enabled.  */
 639 #define MN10300_GLOBAL_P(X) (! SYMBOL_REF_FLAG (X))
 640
 641 /* Recognize machine-specific patterns that may appear within
 642    constants.  Used for PIC-specific UNSPECs.  */
 643 #define OUTPUT_ADDR_CONST_EXTRA(STREAM, X, FAIL) \
 644   do                                                                    \
 645     if (GET_CODE (X) == UNSPEC)                                         \
 646       {                                                                 \
 647         switch (XINT ((X), 1))                                          \
 648           {                                                             \
 649           case UNSPEC_INT_LABEL:                                        \
 650             asm_fprintf ((STREAM), ".%LLIL" HOST_WIDE_INT_PRINT_DEC,    \
 651                          INTVAL (XVECEXP ((X), 0, 0)));                 \
 652             break;                                                      \
 653           case UNSPEC_PIC:                                              \
 654             /* GLOBAL_OFFSET_TABLE or local symbols, no suffix.  */     \
 655             output_addr_const ((STREAM), XVECEXP ((X), 0, 0));          \
 656             break;                                                      \
 657           case UNSPEC_GOT:                                              \
 658             output_addr_const ((STREAM), XVECEXP ((X), 0, 0));          \
 659             fputs ("@GOT", (STREAM));                                   \
 660             break;                                                      \
 661           case UNSPEC_GOTOFF:                                           \
 662             output_addr_const ((STREAM), XVECEXP ((X), 0, 0));          \
 663             fputs ("@GOTOFF", (STREAM));                                \
 664             break;                                                      \
 665           case UNSPEC_PLT:                                              \
 666             output_addr_const ((STREAM), XVECEXP ((X), 0, 0));          \
 667             fputs ("@PLT", (STREAM));                                   \
 668             break;                                                      \
 669           case UNSPEC_GOTSYM_OFF:                                       \
 670             assemble_name (STREAM, GOT_SYMBOL_NAME);                    \
 671             fputs ("-(", STREAM);                                       \
 672             output_addr_const (STREAM, XVECEXP (X, 0, 0));              \
 673             fputs ("-.)", STREAM);                                      \
 674             break;                                                      \
 675           default:                                                      \
 676             goto FAIL;                                                  \
 677           }                                                             \
 678         break;                                                          \
 679       }                                                                 \
 680     else                                                                \
 681       goto FAIL;                                                        \
 682   while (0)
 683 \f
 684 #define SELECT_CC_MODE(OP, X, Y)  mn10300_select_cc_mode (X)
 685 #define REVERSIBLE_CC_MODE(MODE)  0
 686 \f
 687 #define REGISTER_MOVE_COST(MODE, CLASS1, CLASS2) \
 688   ((CLASS1 == CLASS2 && (CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS)) ? 2 :\
 689    ((CLASS1 == ADDRESS_REGS || CLASS1 == DATA_REGS) && \
 690     (CLASS2 == ADDRESS_REGS || CLASS2 == DATA_REGS)) ? 4 : \
 691    (CLASS1 == SP_REGS && CLASS2 == ADDRESS_REGS) ? 2 : \
 692    (CLASS1 == ADDRESS_REGS && CLASS2 == SP_REGS) ? 4 : \
 693    ! TARGET_AM33 ? 6 : \
 694    (CLASS1 == SP_REGS || CLASS2 == SP_REGS) ? 6 : \
 695    (CLASS1 == CLASS2 && CLASS1 == EXTENDED_REGS) ? 6 : \
 696    (CLASS1 == FP_REGS || CLASS2 == FP_REGS) ? 6 : \
 697    (CLASS1 == EXTENDED_REGS || CLASS2 == EXTENDED_REGS) ? 4 : \
 698    4)
 699
 700 /* Nonzero if access to memory by bytes or half words is no faster
 701    than accessing full words.  */
 702 #define SLOW_BYTE_ACCESS 1
 703
 704 #define NO_FUNCTION_CSE
 705
 706 /* According expr.c, a value of around 6 should minimize code size, and
 707    for the MN10300 series, that's our primary concern.  */
 708 #define MOVE_RATIO(speed) 6
 709
 710 #define TEXT_SECTION_ASM_OP "\t.section .text"
 711 #define DATA_SECTION_ASM_OP "\t.section .data"
 712 #define BSS_SECTION_ASM_OP  "\t.section .bss"
 713
 714 #define ASM_COMMENT_START "#"
 715
 716 /* Output to assembler file text saying following lines
 717    may contain character constants, extra white space, comments, etc.  */
 718
 719 #define ASM_APP_ON "#APP\n"
 720
 721 /* Output to assembler file text saying following lines
 722    no longer contain unusual constructs.  */
 723
 724 #define ASM_APP_OFF "#NO_APP\n"
 725
 726 #undef  USER_LABEL_PREFIX
 727 #define USER_LABEL_PREFIX "_"
 728
 729 /* This says how to output the assembler to define a global
 730    uninitialized but not common symbol.
 731    Try to use asm_output_bss to implement this macro.  */
 732
 733 #define ASM_OUTPUT_ALIGNED_BSS(FILE, DECL, NAME, SIZE, ALIGN) \
 734   asm_output_aligned_bss ((FILE), (DECL), (NAME), (SIZE), (ALIGN))
 735
 736 /* Globalizing directive for a label.  */
 737 #define GLOBAL_ASM_OP "\t.global "
 738
 739 /* This is how to output a reference to a user-level label named NAME.
 740    `assemble_name' uses this.  */
 741
 742 #undef  ASM_OUTPUT_LABELREF
 743 #define ASM_OUTPUT_LABELREF(FILE, NAME) \
 744   asm_fprintf (FILE, "%U%s", (*targetm.strip_name_encoding) (NAME))
 745
 746 #define ASM_PN_FORMAT "%s___%lu"
 747
 748 /* This is how we tell the assembler that two symbols have the same value.  */
 749
 750 #define ASM_OUTPUT_DEF(FILE,NAME1,NAME2) \
 751   do                                     \
 752     {                                    \
 753       assemble_name (FILE, NAME1);       \
 754       fputs (" = ", FILE);               \
 755       assemble_name (FILE, NAME2);       \
 756       fputc ('\n', FILE);                \
 757     }                                    \
 758   while (0)
 759
 760 /* How to refer to registers in assembler output.
 761    This sequence is indexed by compiler's hard-register-number (see above).  */
 762
 763 #define REGISTER_NAMES                                                  \
 764 { "d0", "d1", "d2", "d3", "a0", "a1", "a2", "a3", "ap", "sp",           \
 765   "r0", "r1", "r2", "r3", "r4", "r5", "r6", "r7"                        \
 766 , "fs0", "fs1", "fs2", "fs3", "fs4", "fs5", "fs6", "fs7"                \
 767 , "fs8", "fs9", "fs10", "fs11", "fs12", "fs13", "fs14", "fs15"          \
 768 , "fs16", "fs17", "fs18", "fs19", "fs20", "fs21", "fs22", "fs23"        \
 769 , "fs24", "fs25", "fs26", "fs27", "fs28", "fs29", "fs30", "fs31"        \
 770 , "mdr", "EPSW"                                                         \
 771 }
 772
 773 #define ADDITIONAL_REGISTER_NAMES                               \
 774 { {"r8",  4}, {"r9",  5}, {"r10", 6}, {"r11", 7},               \
 775   {"r12", 0}, {"r13", 1}, {"r14", 2}, {"r15", 3},               \
 776   {"e0", 10}, {"e1", 11}, {"e2", 12}, {"e3", 13},               \
 777   {"e4", 14}, {"e5", 15}, {"e6", 16}, {"e7", 17}                \
 778 , {"fd0", 18}, {"fd2", 20}, {"fd4", 22}, {"fd6", 24}            \
 779 , {"fd8", 26}, {"fd10", 28}, {"fd12", 30}, {"fd14", 32}         \
 780 , {"fd16", 34}, {"fd18", 36}, {"fd20", 38}, {"fd22", 40}        \
 781 , {"fd24", 42}, {"fd26", 44}, {"fd28", 46}, {"fd30", 48}        \
 782 , {"cc", CC_REG}                                                \
 783 }
 784
 785 /* Print an instruction operand X on file FILE.
 786    look in mn10300.c for details */
 787
 788 #define PRINT_OPERAND(FILE, X, CODE) \
 789   mn10300_print_operand (FILE, X, CODE)
 790
 791 /* Print a memory operand whose address is X, on file FILE.
 792    This uses a function in output-vax.c.  */
 793
 794 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) \
 795   mn10300_print_operand_address (FILE, ADDR)
 796
 797 /* This is how to output an element of a case-vector that is absolute.  */
 798
 799 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
 800   fprintf (FILE, "\t%s .L%d\n", ".long", VALUE)
 801
 802 /* This is how to output an element of a case-vector that is relative.  */
 803
 804 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
 805   fprintf (FILE, "\t%s .L%d-.L%d\n", ".long", VALUE, REL)
 806
 807 #define ASM_OUTPUT_ALIGN(FILE,LOG)      \
 808   if ((LOG) != 0)                       \
 809     fprintf (FILE, "\t.align %d\n", (LOG))
 810
 811 /* We don't have to worry about dbx compatibility for the mn10300.  */
 812 #define DEFAULT_GDB_EXTENSIONS 1
 813
 814 /* Use dwarf2 debugging info by default.  */
 815 #undef  PREFERRED_DEBUGGING_TYPE
 816 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 817 #define DWARF2_DEBUGGING_INFO 1
 818
 819 #define DWARF2_ASM_LINE_DEBUG_INFO 1
 820
 821 /* GDB always assumes the current function's frame begins at the value
 822    of the stack pointer upon entry to the current function.  Accessing
 823    local variables and parameters passed on the stack is done using the
 824    base of the frame + an offset provided by GCC.
 825
 826    For functions which have frame pointers this method works fine;
 827    the (frame pointer) == (stack pointer at function entry) and GCC provides
 828    an offset relative to the frame pointer.
 829
 830    This loses for functions without a frame pointer; GCC provides an offset
 831    which is relative to the stack pointer after adjusting for the function's
 832    frame size.  GDB would prefer the offset to be relative to the value of
 833    the stack pointer at the function's entry.  Yuk!  */
 834 #define DEBUGGER_AUTO_OFFSET(X) \
 835   ((GET_CODE (X) == PLUS ? INTVAL (XEXP (X, 1)) : 0) \
 836     + (frame_pointer_needed \
 837        ? 0 : - mn10300_initial_offset (FRAME_POINTER_REGNUM, \
 838                                        STACK_POINTER_REGNUM)))
 839
 840 #define DEBUGGER_ARG_OFFSET(OFFSET, X) \
 841   ((GET_CODE (X) == PLUS ? OFFSET : 0) \
 842     + (frame_pointer_needed \
 843        ? 0 : - mn10300_initial_offset (ARG_POINTER_REGNUM, \
 844                                        STACK_POINTER_REGNUM)))
 845
 846 /* Specify the machine mode that this machine uses
 847    for the index in the tablejump instruction.  */
 848 #define CASE_VECTOR_MODE Pmode
 849
 850 /* Define if operations between registers always perform the operation
 851    on the full register even if a narrower mode is specified.  */
 852 #define WORD_REGISTER_OPERATIONS
 853
 854 #define LOAD_EXTEND_OP(MODE) ZERO_EXTEND
 855
 856 /* This flag, if defined, says the same insns that convert to a signed fixnum
 857    also convert validly to an unsigned one.  */
 858 #define FIXUNS_TRUNC_LIKE_FIX_TRUNC
 859
 860 /* Max number of bytes we can move from memory to memory
 861    in one reasonably fast instruction.  */
 862 #define MOVE_MAX        4
 863
 864 /* Define if shifts truncate the shift count
 865    which implies one can omit a sign-extension or zero-extension
 866    of a shift count.  */
 867 #define SHIFT_COUNT_TRUNCATED 1
 868
 869 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
 870    is done just by pretending it is already truncated.  */
 871 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
 872
 873 /* Specify the machine mode that pointers have.
 874    After generation of rtl, the compiler makes no further distinction
 875    between pointers and any other objects of this machine mode.  */
 876 #define Pmode SImode
 877
 878 /* A function address in a call instruction
 879    is a byte address (for indexing purposes)
 880    so give the MEM rtx a byte's mode.  */
 881 #define FUNCTION_MODE QImode
 882
 883 /* The assembler op to get a word.  */
 884
 885 #define FILE_ASM_OP "\t.file\n"
 886