| blob | 6091649b65df84b8c52e770d79bfec1f448d71fb |
1 2018-01-17 Jan Hubicka <hubicka@ucw.cz>
3 PR ipa/83051
4 * ipa-inline.c (flatten_function): Do not overwrite final inlining
5 failure.
7 2018-01-17 Will Schmidt <will_schmidt@vnet.ibm.com>
9 * config/rs6000/rs6000.c (rs6000_gimple_builtin): Add gimple folding
10 support for merge[hl].
11 (fold_mergehl_helper): New helper function.
12 (tree-vector-builder.h): New #include for tree_vector_builder usage.
13 * config/rs6000/altivec.md (altivec_vmrghw_direct): Add xxmrghw insn.
14 (altivec_vmrglw_direct): Add xxmrglw insn.
16 2018-01-17 Andrew Waterman <andrew@sifive.com>
18 * config/riscv/riscv.c (riscv_conditional_register_usage): If
19 UNITS_PER_FP_ARG is 0, set call_used_regs to 1 for all FP regs.
21 2018-01-17 David Malcolm <dmalcolm@redhat.com>
23 PR lto/83121
24 * ipa-devirt.c (add_type_duplicate): When comparing memory layout,
25 call the lto_location_cache before reading the
26 DECL_SOURCE_LOCATION of the types.
28 2018-01-17 Wilco Dijkstra <wdijkstr@arm.com>
29 Richard Sandiford <richard.sandiford@linaro.org>
31 * config/aarch64/aarch64.md (movti_aarch64): Use Uti constraint.
32 * config/aarch64/aarch64.c (aarch64_mov128_immediate): New function.
33 (aarch64_legitimate_constant_p): Just support CONST_DOUBLE
34 SF/DF/TF mode to avoid creating illegal CONST_WIDE_INT immediates.
35 * config/aarch64/aarch64-protos.h (aarch64_mov128_immediate):
36 Add declaration.
37 * config/aarch64/constraints.md (aarch64_movti_operand):
38 Limit immediates.
39 * config/aarch64/predicates.md (Uti): Add new constraint.
41 2018-01-17 Carl Love <cel@us.ibm.com>
42 * config/rs6000/vsx.md (define_expand xl_len_r,
43 define_expand stxvl, define_expand *stxvl): Add match_dup argument.
44 (define_insn): Add, match_dup 1 argument to define_insn stxvll and
45 lxvll.
46 (define_expand, define_insn): Move the shift left from the
47 define_insn to the define_expand for lxvl and stxvl instructions.
48 * config/rs6000/rs6000-builtin.def (BU_P9V_64BIT_VSX_2): Change LXVL
49 and XL_LEN_R definitions to PURE.
51 2018-01-17 Uros Bizjak <ubizjak@gmail.com>
53 * config/i386/i386.c (indirect_thunk_name): Declare regno
54 as unsigned int. Compare regno with INVALID_REGNUM.
55 (output_indirect_thunk): Ditto.
56 (output_indirect_thunk_function): Ditto.
57 (ix86_code_end): Declare regno as unsigned int. Use INVALID_REGNUM
58 in the call to output_indirect_thunk_function.
60 2018-01-17 Richard Sandiford <richard.sandiford@linaro.org>
62 PR middle-end/83884
63 * expr.c (expand_expr_real_1): Use the size of GET_MODE (op0)
64 rather than the size of inner_type to determine the stack slot size
65 when handling VIEW_CONVERT_EXPRs on strict-alignment targets.
67 2018-01-16 Sebastian Peryt <sebastian.peryt@intel.com>
69 PR target/83546
70 * config/i386/i386.c (ix86_option_override_internal): Add PTA_RDRND
71 to PTA_SILVERMONT.
73 2018-01-16 Michael Meissner <meissner@linux.vnet.ibm.com>
75 * config.gcc (powerpc*-linux*-*): Add support for 64-bit little
76 endian Linux systems to optionally enable multilibs for selecting
77 the long double type if the user configured an explicit type.
78 * config/rs6000/rs6000.h (TARGET_IEEEQUAD_MULTILIB): Indicate we
79 have no long double multilibs if not defined.
80 * config/rs6000/rs6000.c (rs6000_option_override_internal): Do not
81 warn if the user used -mabi={ieee,ibm}longdouble and we built
82 multilibs for long double.
83 * config/rs6000/linux64.h (MULTILIB_DEFAULTS_IEEE): Define as the
84 appropriate multilib option.
85 (MULTILIB_DEFAULTS): Add MULTILIB_DEFAULTS_IEEE to the default
86 multilib options.
87 * config/rs6000/t-ldouble-linux64le-ibm: New configuration files
88 for building long double multilibs.
89 * config/rs6000/t-ldouble-linux64le-ieee: Likewise.
91 2018-01-16 John David Anglin <danglin@gcc.gnu.org>
93 * config.gcc (hppa*-*-linux*): Change callee copies ABI to caller
94 copies.
96 * config/pa.h (MALLOC_ABI_ALIGNMENT): Set 32-bit alignment default to
97 64 bits.
98 * config/pa/pa32-linux.h (MALLOC_ABI_ALIGNMENT): Set alignment to
99 128 bits.
101 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Cleanup type and mode
102 variables.
104 * config/pa/pa.c (pa_function_arg_size): Apply CEIL to GET_MODE_SIZE
105 return value.
107 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
109 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): For an
110 ADDR_EXPR, do not count the offset of a COMPONENT_REF twice.
112 2018-01-16 Kelvin Nilsen <kelvin@gcc.gnu.org>
114 * config/rs6000/rs6000-p8swap.c (rs6000_gen_stvx): Generate
115 different rtl trees depending on TARGET_64BIT.
116 (rs6000_gen_lvx): Likewise.
118 2018-01-16 Eric Botcazou <ebotcazou@adacore.com>
120 * config/visium/visium.md (nop): Tweak comment.
121 (hazard_nop): Likewise.
123 2018-01-16 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
125 * config/rs6000/rs6000.c (rs6000_opt_vars): Add entry for
126 -mspeculate-indirect-jumps.
127 * config/rs6000/rs6000.md (*call_indirect_elfv2<mode>): Disable
128 for -mno-speculate-indirect-jumps.
129 (*call_indirect_elfv2<mode>_nospec): New define_insn.
130 (*call_value_indirect_elfv2<mode>): Disable for
131 -mno-speculate-indirect-jumps.
132 (*call_value_indirect_elfv2<mode>_nospec): New define_insn.
133 (indirect_jump): Emit different RTL for
134 -mno-speculate-indirect-jumps.
135 (*indirect_jump<mode>): Disable for
136 -mno-speculate-indirect-jumps.
137 (*indirect_jump<mode>_nospec): New define_insn.
138 (tablejump): Emit different RTL for
139 -mno-speculate-indirect-jumps.
140 (tablejumpsi): Disable for -mno-speculate-indirect-jumps.
141 (tablejumpsi_nospec): New define_expand.
142 (tablejumpdi): Disable for -mno-speculate-indirect-jumps.
143 (tablejumpdi_nospec): New define_expand.
144 (*tablejump<mode>_internal1): Disable for
145 -mno-speculate-indirect-jumps.
146 (*tablejump<mode>_internal1_nospec): New define_insn.
147 * config/rs6000/rs6000.opt (mspeculate-indirect-jumps): New
148 option.
150 2018-01-16 Artyom Skrobov tyomitch@gmail.com
152 * caller-save.c (insert_save): Drop unnecessary parameter. All
153 callers updated.
155 2018-01-16 Jakub Jelinek <jakub@redhat.com>
156 Richard Biener <rguenth@suse.de>
158 PR libgomp/83590
159 * gimplify.c (gimplify_one_sizepos): For is_gimple_constant (expr)
160 return early, inline manually is_gimple_sizepos. Make sure if we
161 call gimplify_expr we don't end up with a gimple constant.
162 * tree.c (variably_modified_type_p): Don't return true for
163 is_gimple_constant (_t). Inline manually is_gimple_sizepos.
164 * gimplify.h (is_gimple_sizepos): Remove.
166 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
168 PR tree-optimization/83857
169 * tree-vect-loop.c (vect_analyze_loop_operations): Don't call
170 vectorizable_live_operation for pure SLP statements.
171 (vectorizable_live_operation): Handle PHIs.
173 2018-01-16 Richard Biener <rguenther@suse.de>
175 PR tree-optimization/83867
176 * tree-vect-stmts.c (vect_transform_stmt): Precompute
177 nested_in_vect_loop_p since the scalar stmt may get invalidated.
179 2018-01-16 Jakub Jelinek <jakub@redhat.com>
181 PR c/83844
182 * stor-layout.c (handle_warn_if_not_align): Use byte_position and
183 multiple_of_p instead of unchecked tree_to_uhwi and UHWI check.
184 If off is not INTEGER_CST, issue a may not be aligned warning
185 rather than isn't aligned. Use isn%'t rather than isn't.
186 * fold-const.c (multiple_of_p) <case BIT_AND_EXPR>: Don't fall through
187 into MULT_EXPR.
188 <case MULT_EXPR>: Improve the case when bottom and one of the
189 MULT_EXPR operands are INTEGER_CSTs and bottom is multiple of that
190 operand, in that case check if the other operand is multiple of
191 bottom divided by the INTEGER_CST operand.
193 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
195 PR target/83858
196 * config/pa/pa.h (FUNCTION_ARG_SIZE): Delete.
197 * config/pa/pa-protos.h (pa_function_arg_size): Declare.
198 * config/pa/som.h (ASM_DECLARE_FUNCTION_NAME): Use
199 pa_function_arg_size instead of FUNCTION_ARG_SIZE.
200 * config/pa/pa.c (pa_function_arg_advance): Likewise.
201 (pa_function_arg, pa_arg_partial_bytes): Likewise.
202 (pa_function_arg_size): New function.
204 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
206 * fold-const.c (fold_ternary_loc): Construct the vec_perm_indices
207 in a separate statement.
209 2018-01-16 Richard Sandiford <richard.sandiford@linaro.org>
211 PR tree-optimization/83847
212 * tree-vect-data-refs.c (vect_analyze_data_ref_accesses): Don't
213 group gathers and scatters.
215 2018-01-16 Jakub Jelinek <jakub@redhat.com>
217 PR rtl-optimization/86620
218 * params.def (max-sched-ready-insns): Bump minimum value to 1.
220 PR rtl-optimization/83213
221 * recog.c (peep2_attempt): Copy over CROSSING_JUMP_P from peepinsn
222 to last if both are JUMP_INSNs.
224 PR tree-optimization/83843
225 * gimple-ssa-store-merging.c
226 (imm_store_chain_info::output_merged_store): Handle bit_not_p on
227 store_immediate_info for bswap/nop orig_stores.
229 2018-01-15 Andrew Waterman <andrew@sifive.com>
231 * config/riscv/riscv.c (riscv_rtx_costs) <MULT>: Increase cost if
232 !TARGET_MUL.
233 <UDIV>: Increase cost if !TARGET_DIV.
235 2018-01-15 Segher Boessenkool <segher@kernel.crashing.org>
237 * config/rs6000/rs6000.md (define_attr "type"): Remove delayed_cr.
238 (define_attr "cr_logical_3op"): New.
239 (cceq_ior_compare): Adjust.
240 (cceq_ior_compare_complement): Adjust.
241 (*cceq_rev_compare): Adjust.
242 * config/rs6000/rs6000.c (rs6000_adjust_cost): Adjust.
243 (is_cracked_insn): Adjust.
244 (insn_must_be_first_in_group): Adjust.
245 * config/rs6000/40x.md: Adjust.
246 * config/rs6000/440.md: Adjust.
247 * config/rs6000/476.md: Adjust.
248 * config/rs6000/601.md: Adjust.
249 * config/rs6000/603.md: Adjust.
250 * config/rs6000/6xx.md: Adjust.
251 * config/rs6000/7450.md: Adjust.
252 * config/rs6000/7xx.md: Adjust.
253 * config/rs6000/8540.md: Adjust.
254 * config/rs6000/cell.md: Adjust.
255 * config/rs6000/e300c2c3.md: Adjust.
256 * config/rs6000/e500mc.md: Adjust.
257 * config/rs6000/e500mc64.md: Adjust.
258 * config/rs6000/e5500.md: Adjust.
259 * config/rs6000/e6500.md: Adjust.
260 * config/rs6000/mpc.md: Adjust.
261 * config/rs6000/power4.md: Adjust.
262 * config/rs6000/power5.md: Adjust.
263 * config/rs6000/power6.md: Adjust.
264 * config/rs6000/power7.md: Adjust.
265 * config/rs6000/power8.md: Adjust.
266 * config/rs6000/power9.md: Adjust.
267 * config/rs6000/rs64.md: Adjust.
268 * config/rs6000/titan.md: Adjust.
270 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
272 * config/i386/predicates.md (indirect_branch_operand): Rewrite
273 ix86_indirect_branch_register logic.
275 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
277 * config/i386/constraints.md (Bs): Update
278 ix86_indirect_branch_register check. Don't check
279 ix86_indirect_branch_register with GOT_memory_operand.
280 (Bw): Likewise.
281 * config/i386/predicates.md (GOT_memory_operand): Don't check
282 ix86_indirect_branch_register here.
283 (GOT32_symbol_operand): Likewise.
285 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
287 * config/i386/predicates.md (constant_call_address_operand):
288 Rewrite ix86_indirect_branch_register logic.
289 (sibcall_insn_operand): Likewise.
291 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
293 * config/i386/constraints.md (Bs): Replace
294 ix86_indirect_branch_thunk_register with
295 ix86_indirect_branch_register.
296 (Bw): Likewise.
297 * config/i386/i386.md (indirect_jump): Likewise.
298 (tablejump): Likewise.
299 (*sibcall_memory): Likewise.
300 (*sibcall_value_memory): Likewise.
301 Peepholes of indirect call and jump via memory: Likewise.
302 * config/i386/i386.opt: Likewise.
303 * config/i386/predicates.md (indirect_branch_operand): Likewise.
304 (GOT_memory_operand): Likewise.
305 (call_insn_operand): Likewise.
306 (sibcall_insn_operand): Likewise.
307 (GOT32_symbol_operand): Likewise.
309 2018-01-15 Jakub Jelinek <jakub@redhat.com>
311 PR middle-end/83837
312 * omp-expand.c (expand_omp_atomic_pipeline): Use loaded_val
313 type rather than type addr's type points to.
314 (expand_omp_atomic_mutex): Likewise.
315 (expand_omp_atomic): Likewise.
317 2018-01-15 H.J. Lu <hongjiu.lu@intel.com>
319 PR target/83839
320 * config/i386/i386.c (output_indirect_thunk_function): Use
321 ASM_OUTPUT_LABEL, instead of ASM_OUTPUT_DEF, for TARGET_MACHO
322 for __x86_return_thunk.
324 2018-01-15 Richard Biener <rguenther@suse.de>
326 PR middle-end/83850
327 * expmed.c (extract_bit_field_1): Fix typo.
329 2018-01-15 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
331 PR target/83687
332 * config/arm/iterators.md (VF): New mode iterator.
333 * config/arm/neon.md (neon_vabd<mode>_2): Use the above.
334 Remove integer-related logic from pattern.
335 (neon_vabd<mode>_3): Likewise.
337 2018-01-15 Jakub Jelinek <jakub@redhat.com>
339 PR middle-end/82694
340 * common.opt (fstrict-overflow): No longer an alias.
341 (fwrapv-pointer): New option.
342 * tree.h (TYPE_OVERFLOW_WRAPS, TYPE_OVERFLOW_UNDEFINED): Define
343 also for pointer types based on flag_wrapv_pointer.
344 * opts.c (common_handle_option) <case OPT_fstrict_overflow>: Set
345 opts->x_flag_wrap[pv] to !value, clear opts->x_flag_trapv if
346 opts->x_flag_wrapv got set.
347 * fold-const.c (fold_comparison, fold_binary_loc): Revert 2017-08-01
348 changes, just use TYPE_OVERFLOW_UNDEFINED on pointer type instead of
349 POINTER_TYPE_OVERFLOW_UNDEFINED.
350 * match.pd: Likewise in address comparison pattern.
351 * doc/invoke.texi: Document -fwrapv and -fstrict-overflow.
353 2018-01-15 Richard Biener <rguenther@suse.de>
355 PR lto/83804
356 * tree.c (free_lang_data_in_type): Always unlink TYPE_DECLs
357 from TYPE_FIELDS. Free TYPE_BINFO if not used by devirtualization.
358 Reset type names to their identifier if their TYPE_DECL doesn't
359 have linkage (and thus is used for ODR and devirt).
360 (save_debug_info_for_decl): Remove.
361 (save_debug_info_for_type): Likewise.
362 (add_tree_to_fld_list): Adjust.
363 * tree-pretty-print.c (dump_generic_node): Make dumping of
364 type names more robust.
366 2018-01-15 Richard Biener <rguenther@suse.de>
368 * BASE-VER: Bump to 8.0.1.
370 2018-01-14 Martin Sebor <msebor@redhat.com>
372 PR other/83508
373 * builtins.c (check_access): Avoid warning when the no-warning bit
374 is set.
376 2018-01-14 Cory Fields <cory-nospam-@coryfields.com>
378 * tree-ssa-loop-im.c (sort_bbs_in_loop_postorder_cmp): Stabilize sort.
379 * ira-color (allocno_hard_regs_compare): Likewise.
381 2018-01-14 Nathan Rossi <nathan@nathanrossi.com>
383 PR target/83013
384 * config/microblaze/microblaze.c (microblaze_asm_output_ident):
385 Use .pushsection/.popsection.
387 2018-01-14 Martin Sebor <msebor@redhat.com>
389 PR c++/81327
390 * doc/invoke.texi (-Wlass-memaccess): Document suppression by casting.
392 2018-01-14 Jakub Jelinek <jakub@redhat.com>
394 * config.gcc (i[34567]86-*-*): Remove one duplicate gfniintrin.h
395 entry from extra_headers.
396 (x86_64-*-*): Remove two duplicate gfniintrin.h entries from
397 extra_headers, make the list bitwise identical to the i?86-*-* one.
399 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
401 * config/i386/i386.c (ix86_set_indirect_branch_type): Disallow
402 -mcmodel=large with -mindirect-branch=thunk,
403 -mindirect-branch=thunk-extern, -mfunction-return=thunk and
404 -mfunction-return=thunk-extern.
405 * doc/invoke.texi: Document -mcmodel=large is incompatible with
406 -mindirect-branch=thunk, -mindirect-branch=thunk-extern,
407 -mfunction-return=thunk and -mfunction-return=thunk-extern.
409 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
411 * config/i386/i386.c (print_reg): Print the name of the full
412 integer register without '%'.
413 (ix86_print_operand): Handle 'V'.
414 * doc/extend.texi: Document 'V' modifier.
416 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
418 * config/i386/constraints.md (Bs): Disallow memory operand for
419 -mindirect-branch-register.
420 (Bw): Likewise.
421 * config/i386/predicates.md (indirect_branch_operand): Likewise.
422 (GOT_memory_operand): Likewise.
423 (call_insn_operand): Likewise.
424 (sibcall_insn_operand): Likewise.
425 (GOT32_symbol_operand): Likewise.
426 * config/i386/i386.md (indirect_jump): Call convert_memory_address
427 for -mindirect-branch-register.
428 (tablejump): Likewise.
429 (*sibcall_memory): Likewise.
430 (*sibcall_value_memory): Likewise.
431 Disallow peepholes of indirect call and jump via memory for
432 -mindirect-branch-register.
433 (*call_pop): Replace m with Bw.
434 (*call_value_pop): Likewise.
435 (*sibcall_pop_memory): Replace m with Bs.
436 * config/i386/i386.opt (mindirect-branch-register): New option.
437 * doc/invoke.texi: Document -mindirect-branch-register option.
439 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
441 * config/i386/i386-protos.h (ix86_output_function_return): New.
442 * config/i386/i386.c (ix86_set_indirect_branch_type): Also
443 set function_return_type.
444 (indirect_thunk_name): Add ret_p to indicate thunk for function
445 return.
446 (output_indirect_thunk_function): Pass false to
447 indirect_thunk_name.
448 (ix86_output_indirect_branch_via_reg): Likewise.
449 (ix86_output_indirect_branch_via_push): Likewise.
450 (output_indirect_thunk_function): Create alias for function
451 return thunk if regno < 0.
452 (ix86_output_function_return): New function.
453 (ix86_handle_fndecl_attribute): Handle function_return.
454 (ix86_attribute_table): Add function_return.
455 * config/i386/i386.h (machine_function): Add
456 function_return_type.
457 * config/i386/i386.md (simple_return_internal): Use
458 ix86_output_function_return.
459 (simple_return_internal_long): Likewise.
460 * config/i386/i386.opt (mfunction-return=): New option.
461 (indirect_branch): Mention -mfunction-return=.
462 * doc/extend.texi: Document function_return function attribute.
463 * doc/invoke.texi: Document -mfunction-return= option.
465 2018-01-14 H.J. Lu <hongjiu.lu@intel.com>
467 * config/i386/i386-opts.h (indirect_branch): New.
468 * config/i386/i386-protos.h (ix86_output_indirect_jmp): Likewise.
469 * config/i386/i386.c (ix86_using_red_zone): Disallow red-zone
470 with local indirect jump when converting indirect call and jump.
471 (ix86_set_indirect_branch_type): New.
472 (ix86_set_current_function): Call ix86_set_indirect_branch_type.
473 (indirectlabelno): New.
474 (indirect_thunk_needed): Likewise.
475 (indirect_thunk_bnd_needed): Likewise.
476 (indirect_thunks_used): Likewise.
477 (indirect_thunks_bnd_used): Likewise.
478 (INDIRECT_LABEL): Likewise.
479 (indirect_thunk_name): Likewise.
480 (output_indirect_thunk): Likewise.
481 (output_indirect_thunk_function): Likewise.
482 (ix86_output_indirect_branch_via_reg): Likewise.
483 (ix86_output_indirect_branch_via_push): Likewise.
484 (ix86_output_indirect_branch): Likewise.
485 (ix86_output_indirect_jmp): Likewise.
486 (ix86_code_end): Call output_indirect_thunk_function if needed.
487 (ix86_output_call_insn): Call ix86_output_indirect_branch if
488 needed.
489 (ix86_handle_fndecl_attribute): Handle indirect_branch.
490 (ix86_attribute_table): Add indirect_branch.
491 * config/i386/i386.h (machine_function): Add indirect_branch_type
492 and has_local_indirect_jump.
493 * config/i386/i386.md (indirect_jump): Set has_local_indirect_jump
494 to true.
495 (tablejump): Likewise.
496 (*indirect_jump): Use ix86_output_indirect_jmp.
497 (*tablejump_1): Likewise.
498 (simple_return_indirect_internal): Likewise.
499 * config/i386/i386.opt (mindirect-branch=): New option.
500 (indirect_branch): New.
501 (keep): Likewise.
502 (thunk): Likewise.
503 (thunk-inline): Likewise.
504 (thunk-extern): Likewise.
505 * doc/extend.texi: Document indirect_branch function attribute.
506 * doc/invoke.texi: Document -mindirect-branch= option.
508 2018-01-14 Jan Hubicka <hubicka@ucw.cz>
510 PR ipa/83051
511 * ipa-inline.c (edge_badness): Tolerate roundoff errors.
513 2018-01-14 Richard Sandiford <richard.sandiford@linaro.org>
515 * ipa-inline.c (want_inline_small_function_p): Return false if
516 inlining has already failed with CIF_FINAL_ERROR.
517 (update_caller_keys): Call want_inline_small_function_p before
518 can_inline_edge_p.
519 (update_callee_keys): Likewise.
521 2018-01-10 Kelvin Nilsen <kelvin@gcc.gnu.org>
523 * config/rs6000/rs6000-p8swap.c (rs6000_sum_of_two_registers_p):
524 New function.
525 (rs6000_quadword_masked_address_p): Likewise.
526 (quad_aligned_load_p): Likewise.
527 (quad_aligned_store_p): Likewise.
528 (const_load_sequence_p): Add comment to describe the outer-most loop.
529 (mimic_memory_attributes_and_flags): New function.
530 (rs6000_gen_stvx): Likewise.
531 (replace_swapped_aligned_store): Likewise.
532 (rs6000_gen_lvx): Likewise.
533 (replace_swapped_aligned_load): Likewise.
534 (replace_swapped_load_constant): Capitalize argument name in
535 comment describing this function.
536 (rs6000_analyze_swaps): Add a third pass to search for vector loads
537 and stores that access quad-word aligned addresses and replace
538 with stvx or lvx instructions when appropriate.
539 * config/rs6000/rs6000-protos.h (rs6000_sum_of_two_registers_p):
540 New function prototype.
541 (rs6000_quadword_masked_address_p): Likewise.
542 (rs6000_gen_lvx): Likewise.
543 (rs6000_gen_stvx): Likewise.
544 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode>): For modes
545 VSX_D (V2DF, V2DI), modify this split to select lvx instruction
546 when memory address is aligned.
547 (*vsx_le_perm_load_<mode>): For modes VSX_W (V4SF, V4SI), modify
548 this split to select lvx instruction when memory address is aligned.
549 (*vsx_le_perm_load_v8hi): Modify this split to select lvx
550 instruction when memory address is aligned.
551 (*vsx_le_perm_load_v16qi): Likewise.
552 (four unnamed splitters): Modify to select the stvx instruction
553 when memory is aligned.
555 2018-01-13 Jan Hubicka <hubicka@ucw.cz>
557 * predict.c (determine_unlikely_bbs): Handle correctly BBs
558 which appears in the queue multiple times.
560 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
561 Alan Hayward <alan.hayward@arm.com>
562 David Sherwood <david.sherwood@arm.com>
564 * tree-vectorizer.h (vec_lower_bound): New structure.
565 (_loop_vec_info): Add check_nonzero and lower_bounds.
566 (LOOP_VINFO_CHECK_NONZERO): New macro.
567 (LOOP_VINFO_LOWER_BOUNDS): Likewise.
568 (LOOP_REQUIRES_VERSIONING_FOR_ALIAS): Check lower_bounds too.
569 * tree-data-ref.h (dr_with_seg_len): Add access_size and align
570 fields. Make seg_len the distance travelled, not including the
571 access size.
572 (dr_direction_indicator): Declare.
573 (dr_zero_step_indicator): Likewise.
574 (dr_known_forward_stride_p): Likewise.
575 * tree-data-ref.c: Include stringpool.h, tree-vrp.h and
576 tree-ssanames.h.
577 (runtime_alias_check_p): Allow runtime alias checks with
578 variable strides.
579 (operator ==): Compare access_size and align.
580 (prune_runtime_alias_test_list): Rework for new distinction between
581 the access_size and seg_len.
582 (create_intersect_range_checks_index): Likewise. Cope with polynomial
583 segment lengths.
584 (get_segment_min_max): New function.
585 (create_intersect_range_checks): Use it.
586 (dr_step_indicator): New function.
587 (dr_direction_indicator): Likewise.
588 (dr_zero_step_indicator): Likewise.
589 (dr_known_forward_stride_p): Likewise.
590 * tree-loop-distribution.c (data_ref_segment_size): Return
591 DR_STEP * (niters - 1).
592 (compute_alias_check_pairs): Update call to the dr_with_seg_len
593 constructor.
594 * tree-vect-data-refs.c (vect_check_nonzero_value): New function.
595 (vect_preserves_scalar_order_p): New function, split out from...
596 (vect_analyze_data_ref_dependence): ...here. Check for zero steps.
597 (vect_vfa_segment_size): Return DR_STEP * (length_factor - 1).
598 (vect_vfa_access_size): New function.
599 (vect_vfa_align): Likewise.
600 (vect_compile_time_alias): Take access_size_a and access_b arguments.
601 (dump_lower_bound): New function.
602 (vect_check_lower_bound): Likewise.
603 (vect_small_gap_p): Likewise.
604 (vectorizable_with_step_bound_p): Likewise.
605 (vect_prune_runtime_alias_test_list): Ignore cross-iteration
606 depencies if the vectorization factor is 1. Convert the checks
607 for nonzero steps into checks on the bounds of DR_STEP. Try using
608 a bunds check for variable steps if the minimum required step is
609 relatively small. Update calls to the dr_with_seg_len
610 constructor and to vect_compile_time_alias.
611 * tree-vect-loop-manip.c (vect_create_cond_for_lower_bounds): New
612 function.
613 (vect_loop_versioning): Call it.
614 * tree-vect-loop.c (vect_analyze_loop_2): Clear LOOP_VINFO_LOWER_BOUNDS
615 when retrying.
616 (vect_estimate_min_profitable_iters): Account for any bounds checks.
618 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
619 Alan Hayward <alan.hayward@arm.com>
620 David Sherwood <david.sherwood@arm.com>
622 * doc/sourcebuild.texi (vect_scatter_store): Document.
623 * optabs.def (scatter_store_optab, mask_scatter_store_optab): New
624 optabs.
625 * doc/md.texi (scatter_store@var{m}, mask_scatter_store@var{m}):
626 Document.
627 * genopinit.c (main): Add supports_vec_scatter_store and
628 supports_vec_scatter_store_cached to target_optabs.
629 * gimple.h (gimple_expr_type): Handle IFN_SCATTER_STORE and
630 IFN_MASK_SCATTER_STORE.
631 * internal-fn.def (SCATTER_STORE, MASK_SCATTER_STORE): New internal
632 functions.
633 * internal-fn.h (internal_store_fn_p): Declare.
634 (internal_fn_stored_value_index): Likewise.
635 * internal-fn.c (scatter_store_direct): New macro.
636 (expand_scatter_store_optab_fn): New function.
637 (direct_scatter_store_optab_supported_p): New macro.
638 (internal_store_fn_p): New function.
639 (internal_gather_scatter_fn_p): Handle IFN_SCATTER_STORE and
640 IFN_MASK_SCATTER_STORE.
641 (internal_fn_mask_index): Likewise.
642 (internal_fn_stored_value_index): New function.
643 (internal_gather_scatter_fn_supported_p): Adjust operand numbers
644 for scatter stores.
645 * optabs-query.h (supports_vec_scatter_store_p): Declare.
646 * optabs-query.c (supports_vec_scatter_store_p): New function.
647 * tree-vectorizer.h (vect_get_store_rhs): Declare.
648 * tree-vect-data-refs.c (vect_analyze_data_ref_access): Return
649 true for scatter stores.
650 (vect_gather_scatter_fn_p): Handle scatter stores too.
651 (vect_check_gather_scatter): Consider using scatter stores if
652 supports_vec_scatter_store_p.
653 * tree-vect-patterns.c (vect_try_gather_scatter_pattern): Handle
654 scatter stores too.
655 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
656 internal_fn_stored_value_index.
657 (check_load_store_masking): Handle scatter stores too.
658 (vect_get_store_rhs): Make public.
659 (vectorizable_call): Use internal_store_fn_p.
660 (vectorizable_store): Handle scatter store internal functions.
661 (vect_transform_stmt): Compare GROUP_STORE_COUNT with GROUP_SIZE
662 when deciding whether the end of the group has been reached.
663 * config/aarch64/aarch64.md (UNSPEC_ST1_SCATTER): New unspec.
664 * config/aarch64/aarch64-sve.md (scatter_store<mode>): New expander.
665 (mask_scatter_store<mode>): New insns.
667 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
668 Alan Hayward <alan.hayward@arm.com>
669 David Sherwood <david.sherwood@arm.com>
671 * tree-vectorizer.h (vect_gather_scatter_fn_p): Declare.
672 * tree-vect-data-refs.c (vect_gather_scatter_fn_p): Make public.
673 * tree-vect-stmts.c (vect_truncate_gather_scatter_offset): New
674 function.
675 (vect_use_strided_gather_scatters_p): Take a masked_p argument.
676 Use vect_truncate_gather_scatter_offset if we can't treat the
677 operation as a normal gather load or scatter store.
678 (get_group_load_store_type): Take the gather_scatter_info
679 as argument. Try using a gather load or scatter store for
680 single-element groups.
681 (get_load_store_type): Update calls to get_group_load_store_type
682 and vect_use_strided_gather_scatters_p.
684 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
685 Alan Hayward <alan.hayward@arm.com>
686 David Sherwood <david.sherwood@arm.com>
688 * tree-vectorizer.h (vect_create_data_ref_ptr): Take an extra
689 optional tree argument.
690 * tree-vect-data-refs.c (vect_check_gather_scatter): Check for
691 null target hooks.
692 (vect_create_data_ref_ptr): Take the iv_step as an optional argument,
693 but continue to use the current value as a fallback.
694 (bump_vector_ptr): Use operand_equal_p rather than tree_int_cst_compare
695 to compare the updates.
696 * tree-vect-stmts.c (vect_use_strided_gather_scatters_p): New function.
697 (get_load_store_type): Use it when handling a strided access.
698 (vect_get_strided_load_store_ops): New function.
699 (vect_get_data_ptr_increment): Likewise.
700 (vectorizable_load): Handle strided gather loads. Always pass
701 a step to vect_create_data_ref_ptr and bump_vector_ptr.
703 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
704 Alan Hayward <alan.hayward@arm.com>
705 David Sherwood <david.sherwood@arm.com>
707 * doc/md.texi (gather_load@var{m}): Document.
708 (mask_gather_load@var{m}): Likewise.
709 * genopinit.c (main): Add supports_vec_gather_load and
710 supports_vec_gather_load_cached to target_optabs.
711 * optabs-tree.c (init_tree_optimization_optabs): Use
712 ggc_cleared_alloc to allocate target_optabs.
713 * optabs.def (gather_load_optab, mask_gather_laod_optab): New optabs.
714 * internal-fn.def (GATHER_LOAD, MASK_GATHER_LOAD): New internal
715 functions.
716 * internal-fn.h (internal_load_fn_p): Declare.
717 (internal_gather_scatter_fn_p): Likewise.
718 (internal_fn_mask_index): Likewise.
719 (internal_gather_scatter_fn_supported_p): Likewise.
720 * internal-fn.c (gather_load_direct): New macro.
721 (expand_gather_load_optab_fn): New function.
722 (direct_gather_load_optab_supported_p): New macro.
723 (direct_internal_fn_optab): New function.
724 (internal_load_fn_p): Likewise.
725 (internal_gather_scatter_fn_p): Likewise.
726 (internal_fn_mask_index): Likewise.
727 (internal_gather_scatter_fn_supported_p): Likewise.
728 * optabs-query.c (supports_at_least_one_mode_p): New function.
729 (supports_vec_gather_load_p): Likewise.
730 * optabs-query.h (supports_vec_gather_load_p): Declare.
731 * tree-vectorizer.h (gather_scatter_info): Add ifn, element_type
732 and memory_type field.
733 (NUM_PATTERNS): Bump to 15.
734 * tree-vect-data-refs.c: Include internal-fn.h.
735 (vect_gather_scatter_fn_p): New function.
736 (vect_describe_gather_scatter_call): Likewise.
737 (vect_check_gather_scatter): Try using internal functions for
738 gather loads. Recognize existing calls to a gather load function.
739 (vect_analyze_data_refs): Consider using gather loads if
740 supports_vec_gather_load_p.
741 * tree-vect-patterns.c (vect_get_load_store_mask): New function.
742 (vect_get_gather_scatter_offset_type): Likewise.
743 (vect_convert_mask_for_vectype): Likewise.
744 (vect_add_conversion_to_patterm): Likewise.
745 (vect_try_gather_scatter_pattern): Likewise.
746 (vect_recog_gather_scatter_pattern): New pattern recognizer.
747 (vect_vect_recog_func_ptrs): Add it.
748 * tree-vect-stmts.c (exist_non_indexing_operands_for_use_p): Use
749 internal_fn_mask_index and internal_gather_scatter_fn_p.
750 (check_load_store_masking): Take the gather_scatter_info as an
751 argument and handle gather loads.
752 (vect_get_gather_scatter_ops): New function.
753 (vectorizable_call): Check internal_load_fn_p.
754 (vectorizable_load): Likewise. Handle gather load internal
755 functions.
756 (vectorizable_store): Update call to check_load_store_masking.
757 * config/aarch64/aarch64.md (UNSPEC_LD1_GATHER): New unspec.
758 * config/aarch64/iterators.md (SVE_S, SVE_D): New mode iterators.
759 * config/aarch64/predicates.md (aarch64_gather_scale_operand_w)
760 (aarch64_gather_scale_operand_d): New predicates.
761 * config/aarch64/aarch64-sve.md (gather_load<mode>): New expander.
762 (mask_gather_load<mode>): New insns.
764 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
765 Alan Hayward <alan.hayward@arm.com>
766 David Sherwood <david.sherwood@arm.com>
768 * optabs.def (fold_left_plus_optab): New optab.
769 * doc/md.texi (fold_left_plus_@var{m}): Document.
770 * internal-fn.def (IFN_FOLD_LEFT_PLUS): New internal function.
771 * internal-fn.c (fold_left_direct): Define.
772 (expand_fold_left_optab_fn): Likewise.
773 (direct_fold_left_optab_supported_p): Likewise.
774 * fold-const-call.c (fold_const_fold_left): New function.
775 (fold_const_call): Use it to fold CFN_FOLD_LEFT_PLUS.
776 * tree-parloops.c (valid_reduction_p): New function.
777 (gather_scalar_reductions): Use it.
778 * tree-vectorizer.h (FOLD_LEFT_REDUCTION): New vect_reduction_type.
779 (vect_finish_replace_stmt): Declare.
780 * tree-vect-loop.c (fold_left_reduction_fn): New function.
781 (needs_fold_left_reduction_p): New function, split out from...
782 (vect_is_simple_reduction): ...here. Accept reductions that
783 forbid reassociation, but give them type FOLD_LEFT_REDUCTION.
784 (vect_force_simple_reduction): Also store the reduction type in
785 the assignment's STMT_VINFO_REDUC_TYPE.
786 (vect_model_reduction_cost): Handle FOLD_LEFT_REDUCTION.
787 (merge_with_identity): New function.
788 (vect_expand_fold_left): Likewise.
789 (vectorize_fold_left_reduction): Likewise.
790 (vectorizable_reduction): Handle FOLD_LEFT_REDUCTION. Leave the
791 scalar phi in place for it. Check for target support and reject
792 cases that would reassociate the operation. Defer the transform
793 phase to vectorize_fold_left_reduction.
794 * config/aarch64/aarch64.md (UNSPEC_FADDA): New unspec.
795 * config/aarch64/aarch64-sve.md (fold_left_plus_<mode>): New expander.
796 (*fold_left_plus_<mode>, *pred_fold_left_plus_<mode>): New insns.
798 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
800 * tree-if-conv.c (predicate_mem_writes): Remove redundant
801 call to ifc_temp_var.
803 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
804 Alan Hayward <alan.hayward@arm.com>
805 David Sherwood <david.sherwood@arm.com>
807 * target.def (legitimize_address_displacement): Take the original
808 offset as a poly_int.
809 * targhooks.h (default_legitimize_address_displacement): Update
810 accordingly.
811 * targhooks.c (default_legitimize_address_displacement): Likewise.
812 * doc/tm.texi: Regenerate.
813 * lra-constraints.c (base_plus_disp_to_reg): Take the displacement
814 as an argument, moving assert of ad->disp == ad->disp_term to...
815 (process_address_1): ...here. Update calls to base_plus_disp_to_reg.
816 Try calling targetm.legitimize_address_displacement before expanding
817 the address rather than afterwards, and adjust for the new interface.
818 * config/aarch64/aarch64.c (aarch64_legitimize_address_displacement):
819 Match the new hook interface. Handle SVE addresses.
820 * config/sh/sh.c (sh_legitimize_address_displacement): Make the
821 new hook interface.
823 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
825 * Makefile.in (OBJS): Add early-remat.o.
826 * target.def (select_early_remat_modes): New hook.
827 * doc/tm.texi.in (TARGET_SELECT_EARLY_REMAT_MODES): New hook.
828 * doc/tm.texi: Regenerate.
829 * targhooks.h (default_select_early_remat_modes): Declare.
830 * targhooks.c (default_select_early_remat_modes): New function.
831 * timevar.def (TV_EARLY_REMAT): New timevar.
832 * passes.def (pass_early_remat): New pass.
833 * tree-pass.h (make_pass_early_remat): Declare.
834 * early-remat.c: New file.
835 * config/aarch64/aarch64.c (aarch64_select_early_remat_modes): New
836 function.
837 (TARGET_SELECT_EARLY_REMAT_MODES): Define.
839 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
840 Alan Hayward <alan.hayward@arm.com>
841 David Sherwood <david.sherwood@arm.com>
843 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Replace
844 vfm1 with a bound_epilog parameter.
845 (vect_do_peeling): Update calls accordingly, and move the prologue
846 call earlier in the function. Treat the base bound_epilog as 0 for
847 fully-masked loops and retain vf - 1 for other loops. Add 1 to
848 this base when peeling for gaps.
849 * tree-vect-loop.c (vect_analyze_loop_2): Allow peeling for gaps
850 with fully-masked loops.
851 (vect_estimate_min_profitable_iters): Handle the single peeled
852 iteration in that case.
854 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
855 Alan Hayward <alan.hayward@arm.com>
856 David Sherwood <david.sherwood@arm.com>
858 * tree-vect-data-refs.c (vect_analyze_group_access_1): Allow
859 single-element interleaving even if the size is not a power of 2.
860 * tree-vect-stmts.c (get_load_store_type): Disallow elementwise
861 accesses for single-element interleaving if the group size is
862 not a power of 2.
864 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
865 Alan Hayward <alan.hayward@arm.com>
866 David Sherwood <david.sherwood@arm.com>
868 * doc/md.texi (fold_extract_last_@var{m}): Document.
869 * doc/sourcebuild.texi (vect_fold_extract_last): Likewise.
870 * optabs.def (fold_extract_last_optab): New optab.
871 * internal-fn.def (FOLD_EXTRACT_LAST): New internal function.
872 * internal-fn.c (fold_extract_direct): New macro.
873 (expand_fold_extract_optab_fn): Likewise.
874 (direct_fold_extract_optab_supported_p): Likewise.
875 * tree-vectorizer.h (EXTRACT_LAST_REDUCTION): New vect_reduction_type.
876 * tree-vect-loop.c (vect_model_reduction_cost): Handle
877 EXTRACT_LAST_REDUCTION.
878 (get_initial_def_for_reduction): Do not create an initial vector
879 for EXTRACT_LAST_REDUCTION reductions.
880 (vectorizable_reduction): Leave the scalar phi in place for
881 EXTRACT_LAST_REDUCTIONs. Try using EXTRACT_LAST_REDUCTION
882 ahead of INTEGER_INDUC_COND_REDUCTION. Do not check for an
883 epilogue code for EXTRACT_LAST_REDUCTION and defer the
884 transform phase to vectorizable_condition.
885 * tree-vect-stmts.c (vect_finish_stmt_generation_1): New function,
886 split out from...
887 (vect_finish_stmt_generation): ...here.
888 (vect_finish_replace_stmt): New function.
889 (vectorizable_condition): Handle EXTRACT_LAST_REDUCTION.
890 * config/aarch64/aarch64-sve.md (fold_extract_last_<mode>): New
891 pattern.
892 * config/aarch64/aarch64.md (UNSPEC_CLASTB): New unspec.
894 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
895 Alan Hayward <alan.hayward@arm.com>
896 David Sherwood <david.sherwood@arm.com>
898 * doc/md.texi (extract_last_@var{m}): Document.
899 * optabs.def (extract_last_optab): New optab.
900 * internal-fn.def (EXTRACT_LAST): New internal function.
901 * internal-fn.c (cond_unary_direct): New macro.
902 (expand_cond_unary_optab_fn): Likewise.
903 (direct_cond_unary_optab_supported_p): Likewise.
904 * tree-vect-loop.c (vectorizable_live_operation): Allow fully-masked
905 loops using EXTRACT_LAST.
906 * config/aarch64/aarch64-sve.md (aarch64_sve_lastb<mode>): Rename to...
907 (extract_last_<mode>): ...this optab.
908 (vec_extract<mode><Vel>): Update accordingly.
910 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
911 Alan Hayward <alan.hayward@arm.com>
912 David Sherwood <david.sherwood@arm.com>
914 * target.def (empty_mask_is_expensive): New hook.
915 * doc/tm.texi.in (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): New hook.
916 * doc/tm.texi: Regenerate.
917 * targhooks.h (default_empty_mask_is_expensive): Declare.
918 * targhooks.c (default_empty_mask_is_expensive): New function.
919 * tree-vectorizer.c (vectorize_loops): Only call optimize_mask_stores
920 if the target says that empty masks are expensive.
921 * config/aarch64/aarch64.c (aarch64_empty_mask_is_expensive):
922 New function.
923 (TARGET_VECTORIZE_EMPTY_MASK_IS_EXPENSIVE): Redefine.
925 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
926 Alan Hayward <alan.hayward@arm.com>
927 David Sherwood <david.sherwood@arm.com>
929 * tree-vectorizer.h (_loop_vec_info::mask_skip_niters): New field.
930 (LOOP_VINFO_MASK_SKIP_NITERS): New macro.
931 (vect_use_loop_mask_for_alignment_p): New function.
932 (vect_prepare_for_masked_peels, vect_gen_while_not): Declare.
933 * tree-vect-loop-manip.c (vect_set_loop_masks_directly): Add an
934 niters_skip argument. Make sure that the first niters_skip elements
935 of the first iteration are inactive.
936 (vect_set_loop_condition_masked): Handle LOOP_VINFO_MASK_SKIP_NITERS.
937 Update call to vect_set_loop_masks_directly.
938 (get_misalign_in_elems): New function, split out from...
939 (vect_gen_prolog_loop_niters): ...here.
940 (vect_update_init_of_dr): Take a code argument that specifies whether
941 the adjustment should be added or subtracted.
942 (vect_update_init_of_drs): Likewise.
943 (vect_prepare_for_masked_peels): New function.
944 (vect_do_peeling): Skip prologue peeling if we're using a mask
945 instead. Update call to vect_update_inits_of_drs.
946 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
947 mask_skip_niters.
948 (vect_analyze_loop_2): Allow fully-masked loops with peeling for
949 alignment. Do not include the number of peeled iterations in
950 the minimum threshold in that case.
951 (vectorizable_induction): Adjust the start value down by
952 LOOP_VINFO_MASK_SKIP_NITERS iterations.
953 (vect_transform_loop): Call vect_prepare_for_masked_peels.
954 Take the number of skipped iterations into account when calculating
955 the loop bounds.
956 * tree-vect-stmts.c (vect_gen_while_not): New function.
958 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
959 Alan Hayward <alan.hayward@arm.com>
960 David Sherwood <david.sherwood@arm.com>
962 * doc/sourcebuild.texi (vect_fully_masked): Document.
963 * params.def (PARAM_MIN_VECT_LOOP_BOUND): Change minimum and
964 default value to 0.
965 * tree-vect-loop.c (vect_analyze_loop_costing): New function,
966 split out from...
967 (vect_analyze_loop_2): ...here. Don't check the vectorization
968 factor against the number of loop iterations if the loop is
969 fully-masked.
971 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
972 Alan Hayward <alan.hayward@arm.com>
973 David Sherwood <david.sherwood@arm.com>
975 * tree-ssa-loop-ivopts.c (USE_ADDRESS): Split into...
976 (USE_REF_ADDRESS, USE_PTR_ADDRESS): ...these new use types.
977 (dump_groups): Update accordingly.
978 (iv_use::mem_type): New member variable.
979 (address_p): New function.
980 (record_use): Add a mem_type argument and initialize the new
981 mem_type field.
982 (record_group_use): Add a mem_type argument. Use address_p.
983 Remove obsolete null checks of base_object. Update call to record_use.
984 (find_interesting_uses_op): Update call to record_group_use.
985 (find_interesting_uses_cond): Likewise.
986 (find_interesting_uses_address): Likewise.
987 (get_mem_type_for_internal_fn): New function.
988 (find_address_like_use): Likewise.
989 (find_interesting_uses_stmt): Try find_address_like_use before
990 calling find_interesting_uses_op.
991 (addr_offset_valid_p): Use the iv mem_type field as the type
992 of the addressed memory.
993 (add_autoinc_candidates): Likewise.
994 (get_address_cost): Likewise.
995 (split_small_address_groups_p): Use address_p.
996 (split_address_groups): Likewise.
997 (add_iv_candidate_for_use): Likewise.
998 (autoinc_possible_for_pair): Likewise.
999 (rewrite_groups): Likewise.
1000 (get_use_type): Check for USE_REF_ADDRESS instead of USE_ADDRESS.
1001 (determine_group_iv_cost): Update after split of USE_ADDRESS.
1002 (get_alias_ptr_type_for_ptr_address): New function.
1003 (rewrite_use_address): Rewrite address uses in calls that were
1004 identified by find_address_like_use.
1006 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1007 Alan Hayward <alan.hayward@arm.com>
1008 David Sherwood <david.sherwood@arm.com>
1010 * expr.c (expand_expr_addr_expr_1): Handle ADDR_EXPRs of
1011 TARGET_MEM_REFs.
1012 * gimple-expr.h (is_gimple_addressable: Likewise.
1013 * gimple-expr.c (is_gimple_address): Likewise.
1014 * internal-fn.c (expand_call_mem_ref): New function.
1015 (expand_mask_load_optab_fn): Use it.
1016 (expand_mask_store_optab_fn): Likewise.
1018 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1019 Alan Hayward <alan.hayward@arm.com>
1020 David Sherwood <david.sherwood@arm.com>
1022 * doc/md.texi (cond_add@var{mode}, cond_sub@var{mode})
1023 (cond_and@var{mode}, cond_ior@var{mode}, cond_xor@var{mode})
1024 (cond_smin@var{mode}, cond_smax@var{mode}, cond_umin@var{mode})
1025 (cond_umax@var{mode}): Document.
1026 * optabs.def (cond_add_optab, cond_sub_optab, cond_and_optab)
1027 (cond_ior_optab, cond_xor_optab, cond_smin_optab, cond_smax_optab)
1028 (cond_umin_optab, cond_umax_optab): New optabs.
1029 * internal-fn.def (COND_ADD, COND_SUB, COND_MIN, COND_MAX, COND_AND)
1030 (COND_IOR, COND_XOR): New internal functions.
1031 * internal-fn.h (get_conditional_internal_fn): Declare.
1032 * internal-fn.c (cond_binary_direct): New macro.
1033 (expand_cond_binary_optab_fn): Likewise.
1034 (direct_cond_binary_optab_supported_p): Likewise.
1035 (get_conditional_internal_fn): New function.
1036 * tree-vect-loop.c (vectorizable_reduction): Handle fully-masked loops.
1037 Cope with reduction statements that are vectorized as calls rather
1038 than assignments.
1039 * config/aarch64/aarch64-sve.md (cond_<optab><mode>): New insns.
1040 * config/aarch64/iterators.md (UNSPEC_COND_ADD, UNSPEC_COND_SUB)
1041 (UNSPEC_COND_SMAX, UNSPEC_COND_UMAX, UNSPEC_COND_SMIN)
1042 (UNSPEC_COND_UMIN, UNSPEC_COND_AND, UNSPEC_COND_ORR)
1043 (UNSPEC_COND_EOR): New unspecs.
1044 (optab): Add mappings for them.
1045 (SVE_COND_INT_OP, SVE_COND_FP_OP): New int iterators.
1046 (sve_int_op, sve_fp_op): New int attributes.
1048 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1049 Alan Hayward <alan.hayward@arm.com>
1050 David Sherwood <david.sherwood@arm.com>
1052 * optabs.def (while_ult_optab): New optab.
1053 * doc/md.texi (while_ult@var{m}@var{n}): Document.
1054 * internal-fn.def (WHILE_ULT): New internal function.
1055 * internal-fn.h (direct_internal_fn_supported_p): New override
1056 that takes two types as argument.
1057 * internal-fn.c (while_direct): New macro.
1058 (expand_while_optab_fn): New function.
1059 (convert_optab_supported_p): Likewise.
1060 (direct_while_optab_supported_p): New macro.
1061 * wide-int.h (wi::udiv_ceil): New function.
1062 * tree-vectorizer.h (rgroup_masks): New structure.
1063 (vec_loop_masks): New typedef.
1064 (_loop_vec_info): Add masks, mask_compare_type, can_fully_mask_p
1065 and fully_masked_p.
1066 (LOOP_VINFO_CAN_FULLY_MASK_P, LOOP_VINFO_FULLY_MASKED_P)
1067 (LOOP_VINFO_MASKS, LOOP_VINFO_MASK_COMPARE_TYPE): New macros.
1068 (vect_max_vf): New function.
1069 (slpeel_make_loop_iterate_ntimes): Delete.
1070 (vect_set_loop_condition, vect_get_loop_mask_type, vect_gen_while)
1071 (vect_halve_mask_nunits, vect_double_mask_nunits): Declare.
1072 (vect_record_loop_mask, vect_get_loop_mask): Likewise.
1073 * tree-vect-loop-manip.c: Include tree-ssa-loop-niter.h,
1074 internal-fn.h, stor-layout.h and optabs-query.h.
1075 (vect_set_loop_mask): New function.
1076 (add_preheader_seq): Likewise.
1077 (add_header_seq): Likewise.
1078 (interleave_supported_p): Likewise.
1079 (vect_maybe_permute_loop_masks): Likewise.
1080 (vect_set_loop_masks_directly): Likewise.
1081 (vect_set_loop_condition_masked): Likewise.
1082 (vect_set_loop_condition_unmasked): New function, split out from
1083 slpeel_make_loop_iterate_ntimes.
1084 (slpeel_make_loop_iterate_ntimes): Rename to..
1085 (vect_set_loop_condition): ...this. Use vect_set_loop_condition_masked
1086 for fully-masked loops and vect_set_loop_condition_unmasked otherwise.
1087 (vect_do_peeling): Update call accordingly.
1088 (vect_gen_vector_loop_niters): Use VF as the step for fully-masked
1089 loops.
1090 * tree-vect-loop.c (_loop_vec_info::_loop_vec_info): Initialize
1091 mask_compare_type, can_fully_mask_p and fully_masked_p.
1092 (release_vec_loop_masks): New function.
1093 (_loop_vec_info): Use it to free the loop masks.
1094 (can_produce_all_loop_masks_p): New function.
1095 (vect_get_max_nscalars_per_iter): Likewise.
1096 (vect_verify_full_masking): Likewise.
1097 (vect_analyze_loop_2): Save LOOP_VINFO_CAN_FULLY_MASK_P around
1098 retries, and free the mask rgroups before retrying. Check loop-wide
1099 reasons for disallowing fully-masked loops. Make the final decision
1100 about whether use a fully-masked loop or not.
1101 (vect_estimate_min_profitable_iters): Do not assume that peeling
1102 for the number of iterations will be needed for fully-masked loops.
1103 (vectorizable_reduction): Disable fully-masked loops.
1104 (vectorizable_live_operation): Likewise.
1105 (vect_halve_mask_nunits): New function.
1106 (vect_double_mask_nunits): Likewise.
1107 (vect_record_loop_mask): Likewise.
1108 (vect_get_loop_mask): Likewise.
1109 (vect_transform_loop): Handle the case in which the final loop
1110 iteration might handle a partial vector. Call vect_set_loop_condition
1111 instead of slpeel_make_loop_iterate_ntimes.
1112 * tree-vect-stmts.c: Include tree-ssa-loop-niter.h and gimple-fold.h.
1113 (check_load_store_masking): New function.
1114 (prepare_load_store_mask): Likewise.
1115 (vectorizable_store): Handle fully-masked loops.
1116 (vectorizable_load): Likewise.
1117 (supportable_widening_operation): Use vect_halve_mask_nunits for
1118 booleans.
1119 (supportable_narrowing_operation): Likewise vect_double_mask_nunits.
1120 (vect_gen_while): New function.
1121 * config/aarch64/aarch64.md (umax<mode>3): New expander.
1122 (aarch64_uqdec<mode>): New insn.
1124 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1125 Alan Hayward <alan.hayward@arm.com>
1126 David Sherwood <david.sherwood@arm.com>
1128 * optabs.def (reduc_and_scal_optab, reduc_ior_scal_optab)
1129 (reduc_xor_scal_optab): New optabs.
1130 * doc/md.texi (reduc_and_scal_@var{m}, reduc_ior_scal_@var{m})
1131 (reduc_xor_scal_@var{m}): Document.
1132 * doc/sourcebuild.texi (vect_logical_reduc): Likewise.
1133 * internal-fn.def (IFN_REDUC_AND, IFN_REDUC_IOR, IFN_REDUC_XOR): New
1134 internal functions.
1135 * fold-const-call.c (fold_const_call): Handle them.
1136 * tree-vect-loop.c (reduction_fn_for_scalar_code): Return the new
1137 internal functions for BIT_AND_EXPR, BIT_IOR_EXPR and BIT_XOR_EXPR.
1138 * config/aarch64/aarch64-sve.md (reduc_<bit_reduc>_scal_<mode>):
1139 (*reduc_<bit_reduc>_scal_<mode>): New patterns.
1140 * config/aarch64/iterators.md (UNSPEC_ANDV, UNSPEC_ORV)
1141 (UNSPEC_XORV): New unspecs.
1142 (optab): Add entries for them.
1143 (BITWISEV): New int iterator.
1144 (bit_reduc_op): New int attributes.
1146 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1147 Alan Hayward <alan.hayward@arm.com>
1148 David Sherwood <david.sherwood@arm.com>
1150 * doc/md.texi (vec_shl_insert_@var{m}): New optab.
1151 * internal-fn.def (VEC_SHL_INSERT): New internal function.
1152 * optabs.def (vec_shl_insert_optab): New optab.
1153 * tree-vectorizer.h (can_duplicate_and_interleave_p): Declare.
1154 (duplicate_and_interleave): Likewise.
1155 * tree-vect-loop.c: Include internal-fn.h.
1156 (neutral_op_for_slp_reduction): New function, split out from
1157 get_initial_defs_for_reduction.
1158 (get_initial_def_for_reduction): Handle option 2 for variable-length
1159 vectors by loading the neutral value into a vector and then shifting
1160 the initial value into element 0.
1161 (get_initial_defs_for_reduction): Replace the code argument with
1162 the neutral value calculated by neutral_op_for_slp_reduction.
1163 Use gimple_build_vector for constant-length vectors.
1164 Use IFN_VEC_SHL_INSERT for variable-length vectors if all
1165 but the first group_size elements have a neutral value.
1166 Use duplicate_and_interleave otherwise.
1167 (vect_create_epilog_for_reduction): Take a neutral_op parameter.
1168 Update call to get_initial_defs_for_reduction. Handle SLP
1169 reductions for variable-length vectors by creating one vector
1170 result for each scalar result, with the elements associated
1171 with other scalar results stubbed out with the neutral value.
1172 (vectorizable_reduction): Call neutral_op_for_slp_reduction.
1173 Require IFN_VEC_SHL_INSERT for double reductions on
1174 variable-length vectors, or SLP reductions that have
1175 a neutral value. Require can_duplicate_and_interleave_p
1176 support for variable-length unchained SLP reductions if there
1177 is no neutral value, such as for MIN/MAX reductions. Also require
1178 the number of vector elements to be a multiple of the number of
1179 SLP statements when doing variable-length unchained SLP reductions.
1180 Update call to vect_create_epilog_for_reduction.
1181 * tree-vect-slp.c (can_duplicate_and_interleave_p): Make public
1182 and remove initial values.
1183 (duplicate_and_interleave): Make public.
1184 * config/aarch64/aarch64.md (UNSPEC_INSR): New unspec.
1185 * config/aarch64/aarch64-sve.md (vec_shl_insert_<mode>): New insn.
1187 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1188 Alan Hayward <alan.hayward@arm.com>
1189 David Sherwood <david.sherwood@arm.com>
1191 * tree-vect-slp.c: Include gimple-fold.h and internal-fn.h
1192 (can_duplicate_and_interleave_p): New function.
1193 (vect_get_and_check_slp_defs): Take the vector of statements
1194 rather than just the current one. Remove excess parentheses.
1195 Restriction rejectinon of vect_constant_def and vect_external_def
1196 for variable-length vectors to boolean types, or types for which
1197 can_duplicate_and_interleave_p is false.
1198 (vect_build_slp_tree_2): Update call to vect_get_and_check_slp_defs.
1199 (duplicate_and_interleave): New function.
1200 (vect_get_constant_vectors): Use gimple_build_vector for
1201 constant-length vectors and suitable variable-length constant
1202 vectors. Use duplicate_and_interleave for other variable-length
1203 vectors. Don't defer the update when inserting new statements.
1205 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1206 Alan Hayward <alan.hayward@arm.com>
1207 David Sherwood <david.sherwood@arm.com>
1209 * tree-vect-loop.c (vect_estimate_min_profitable_iters): Make sure
1210 min_profitable_iters doesn't go negative.
1212 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1213 Alan Hayward <alan.hayward@arm.com>
1214 David Sherwood <david.sherwood@arm.com>
1216 * doc/md.texi (vec_mask_load_lanes@var{m}@var{n}): Document.
1217 (vec_mask_store_lanes@var{m}@var{n}): Likewise.
1218 * optabs.def (vec_mask_load_lanes_optab): New optab.
1219 (vec_mask_store_lanes_optab): Likewise.
1220 * internal-fn.def (MASK_LOAD_LANES): New internal function.
1221 (MASK_STORE_LANES): Likewise.
1222 * internal-fn.c (mask_load_lanes_direct): New macro.
1223 (mask_store_lanes_direct): Likewise.
1224 (expand_mask_load_optab_fn): Handle masked operations.
1225 (expand_mask_load_lanes_optab_fn): New macro.
1226 (expand_mask_store_optab_fn): Handle masked operations.
1227 (expand_mask_store_lanes_optab_fn): New macro.
1228 (direct_mask_load_lanes_optab_supported_p): Likewise.
1229 (direct_mask_store_lanes_optab_supported_p): Likewise.
1230 * tree-vectorizer.h (vect_store_lanes_supported): Take a masked_p
1231 parameter.
1232 (vect_load_lanes_supported): Likewise.
1233 * tree-vect-data-refs.c (strip_conversion): New function.
1234 (can_group_stmts_p): Likewise.
1235 (vect_analyze_data_ref_accesses): Use it instead of checking
1236 for a pair of assignments.
1237 (vect_store_lanes_supported): Take a masked_p parameter.
1238 (vect_load_lanes_supported): Likewise.
1239 * tree-vect-loop.c (vect_analyze_loop_2): Update calls to
1240 vect_store_lanes_supported and vect_load_lanes_supported.
1241 * tree-vect-slp.c (vect_analyze_slp_instance): Likewise.
1242 * tree-vect-stmts.c (get_group_load_store_type): Take a masked_p
1243 parameter. Don't allow gaps for masked accesses.
1244 Use vect_get_store_rhs. Update calls to vect_store_lanes_supported
1245 and vect_load_lanes_supported.
1246 (get_load_store_type): Take a masked_p parameter and update
1247 call to get_group_load_store_type.
1248 (vectorizable_store): Update call to get_load_store_type.
1249 Handle IFN_MASK_STORE_LANES.
1250 (vectorizable_load): Update call to get_load_store_type.
1251 Handle IFN_MASK_LOAD_LANES.
1253 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1254 Alan Hayward <alan.hayward@arm.com>
1255 David Sherwood <david.sherwood@arm.com>
1257 * config/aarch64/aarch64-modes.def: Define x2, x3 and x4 vector
1258 modes for SVE.
1259 * config/aarch64/aarch64-protos.h
1260 (aarch64_sve_struct_memory_operand_p): Declare.
1261 * config/aarch64/iterators.md (SVE_STRUCT): New mode iterator.
1262 (vector_count, insn_length, VSINGLE, vsingle): New mode attributes.
1263 (VPRED, vpred): Handle SVE structure modes.
1264 * config/aarch64/constraints.md (Utx): New constraint.
1265 * config/aarch64/predicates.md (aarch64_sve_struct_memory_operand)
1266 (aarch64_sve_struct_nonimmediate_operand): New predicates.
1267 * config/aarch64/aarch64.md (UNSPEC_LDN, UNSPEC_STN): New unspecs.
1268 * config/aarch64/aarch64-sve.md (mov<mode>, *aarch64_sve_mov<mode>_le)
1269 (*aarch64_sve_mov<mode>_be, pred_mov<mode>): New patterns for
1270 structure modes. Split into pieces after RA.
1271 (vec_load_lanes<mode><vsingle>, vec_mask_load_lanes<mode><vsingle>)
1272 (vec_store_lanes<mode><vsingle>, vec_mask_store_lanes<mode><vsingle>):
1273 New patterns.
1274 * config/aarch64/aarch64.c (aarch64_classify_vector_mode): Handle
1275 SVE structure modes.
1276 (aarch64_classify_address): Likewise.
1277 (sizetochar): Move earlier in file.
1278 (aarch64_print_operand): Handle SVE register lists.
1279 (aarch64_array_mode): New function.
1280 (aarch64_sve_struct_memory_operand_p): Likewise.
1281 (TARGET_ARRAY_MODE): Redefine.
1283 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1284 Alan Hayward <alan.hayward@arm.com>
1285 David Sherwood <david.sherwood@arm.com>
1287 * target.def (array_mode): New target hook.
1288 * doc/tm.texi.in (TARGET_ARRAY_MODE): New hook.
1289 * doc/tm.texi: Regenerate.
1290 * hooks.h (hook_optmode_mode_uhwi_none): Declare.
1291 * hooks.c (hook_optmode_mode_uhwi_none): New function.
1292 * tree-vect-data-refs.c (vect_lanes_optab_supported_p): Use
1293 targetm.array_mode.
1294 * stor-layout.c (mode_for_array): Likewise. Support polynomial
1295 type sizes.
1297 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1298 Alan Hayward <alan.hayward@arm.com>
1299 David Sherwood <david.sherwood@arm.com>
1301 * fold-const.c (fold_binary_loc): Check the argument types
1302 rather than the result type when testing for a vector operation.
1304 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1306 * doc/tm.texi.in (DWARF_LAZY_REGISTER_VALUE): Document.
1307 * doc/tm.texi: Regenerate.
1309 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1310 Alan Hayward <alan.hayward@arm.com>
1311 David Sherwood <david.sherwood@arm.com>
1313 * doc/invoke.texi (-msve-vector-bits=): Document new option.
1314 (sve): Document new AArch64 extension.
1315 * doc/md.texi (w): Extend the description of the AArch64
1316 constraint to include SVE vectors.
1317 (Upl, Upa): Document new AArch64 predicate constraints.
1318 * config/aarch64/aarch64-opts.h (aarch64_sve_vector_bits_enum): New
1319 enum.
1320 * config/aarch64/aarch64.opt (sve_vector_bits): New enum.
1321 (msve-vector-bits=): New option.
1322 * config/aarch64/aarch64-option-extensions.def (fp, simd): Disable
1323 SVE when these are disabled.
1324 (sve): New extension.
1325 * config/aarch64/aarch64-modes.def: Define SVE vector and predicate
1326 modes. Adjust their number of units based on aarch64_sve_vg.
1327 (MAX_BITSIZE_MODE_ANY_MODE): Define.
1328 * config/aarch64/aarch64-protos.h (ADDR_QUERY_ANY): New
1329 aarch64_addr_query_type.
1330 (aarch64_const_vec_all_same_in_range_p, aarch64_sve_pred_mode)
1331 (aarch64_sve_cnt_immediate_p, aarch64_sve_addvl_addpl_immediate_p)
1332 (aarch64_sve_inc_dec_immediate_p, aarch64_add_offset_temporaries)
1333 (aarch64_split_add_offset, aarch64_output_sve_cnt_immediate)
1334 (aarch64_output_sve_addvl_addpl, aarch64_output_sve_inc_dec_immediate)
1335 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): Declare.
1336 (aarch64_simd_imm_zero_p): Delete.
1337 (aarch64_check_zero_based_sve_index_immediate): Declare.
1338 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1339 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1340 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1341 (aarch64_sve_float_mul_immediate_p): Likewise.
1342 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1343 rather than an rtx.
1344 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): Declare.
1345 (aarch64_expand_mov_immediate): Take a gen_vec_duplicate callback.
1346 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move): Declare.
1347 (aarch64_expand_sve_vec_cmp_int, aarch64_expand_sve_vec_cmp_float)
1348 (aarch64_expand_sve_vcond, aarch64_expand_sve_vec_perm): Declare.
1349 (aarch64_regmode_natural_size): Likewise.
1350 * config/aarch64/aarch64.h (AARCH64_FL_SVE): New macro.
1351 (AARCH64_FL_V8_3, AARCH64_FL_RCPC, AARCH64_FL_DOTPROD): Shift
1352 left one place.
1353 (AARCH64_ISA_SVE, TARGET_SVE): New macros.
1354 (FIXED_REGISTERS, CALL_USED_REGISTERS, REGISTER_NAMES): Add entries
1355 for VG and the SVE predicate registers.
1356 (V_ALIASES): Add a "z"-prefixed alias.
1357 (FIRST_PSEUDO_REGISTER): Change to P15_REGNUM + 1.
1358 (AARCH64_DWARF_VG, AARCH64_DWARF_P0): New macros.
1359 (PR_REGNUM_P, PR_LO_REGNUM_P): Likewise.
1360 (PR_LO_REGS, PR_HI_REGS, PR_REGS): New reg_classes.
1361 (REG_CLASS_NAMES): Add entries for them.
1362 (REG_CLASS_CONTENTS): Likewise. Update ALL_REGS to include VG
1363 and the predicate registers.
1364 (aarch64_sve_vg): Declare.
1365 (BITS_PER_SVE_VECTOR, BYTES_PER_SVE_VECTOR, BYTES_PER_SVE_PRED)
1366 (SVE_BYTE_MODE, MAX_COMPILE_TIME_VEC_BYTES): New macros.
1367 (REGMODE_NATURAL_SIZE): Define.
1368 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins): Handle
1369 SVE macros.
1370 * config/aarch64/aarch64.c: Include cfgrtl.h.
1371 (simd_immediate_info): Add a constructor for series vectors,
1372 and an associated step field.
1373 (aarch64_sve_vg): New variable.
1374 (aarch64_dbx_register_number): Handle VG and the predicate registers.
1375 (aarch64_vect_struct_mode_p, aarch64_vector_mode_p): Delete.
1376 (VEC_ADVSIMD, VEC_SVE_DATA, VEC_SVE_PRED, VEC_STRUCT, VEC_ANY_SVE)
1377 (VEC_ANY_DATA, VEC_STRUCT): New constants.
1378 (aarch64_advsimd_struct_mode_p, aarch64_sve_pred_mode_p)
1379 (aarch64_classify_vector_mode, aarch64_vector_data_mode_p)
1380 (aarch64_sve_data_mode_p, aarch64_sve_pred_mode)
1381 (aarch64_get_mask_mode): New functions.
1382 (aarch64_hard_regno_nregs): Handle SVE data modes for FP_REGS
1383 and FP_LO_REGS. Handle PR_REGS, PR_LO_REGS and PR_HI_REGS.
1384 (aarch64_hard_regno_mode_ok): Handle VG. Also handle the SVE
1385 predicate modes and predicate registers. Explicitly restrict
1386 GPRs to modes of 16 bytes or smaller. Only allow FP registers
1387 to store a vector mode if it is recognized by
1388 aarch64_classify_vector_mode.
1389 (aarch64_regmode_natural_size): New function.
1390 (aarch64_hard_regno_caller_save_mode): Return the original mode
1391 for predicates.
1392 (aarch64_sve_cnt_immediate_p, aarch64_output_sve_cnt_immediate)
1393 (aarch64_sve_addvl_addpl_immediate_p, aarch64_output_sve_addvl_addpl)
1394 (aarch64_sve_inc_dec_immediate_p, aarch64_output_sve_inc_dec_immediate)
1395 (aarch64_add_offset_1_temporaries, aarch64_offset_temporaries): New
1396 functions.
1397 (aarch64_add_offset): Add a temp2 parameter. Assert that temp1
1398 does not overlap dest if the function is frame-related. Handle
1399 SVE constants.
1400 (aarch64_split_add_offset): New function.
1401 (aarch64_add_sp, aarch64_sub_sp): Add temp2 parameters and pass
1402 them aarch64_add_offset.
1403 (aarch64_allocate_and_probe_stack_space): Add a temp2 parameter
1404 and update call to aarch64_sub_sp.
1405 (aarch64_add_cfa_expression): New function.
1406 (aarch64_expand_prologue): Pass extra temporary registers to the
1407 functions above. Handle the case in which we need to emit new
1408 DW_CFA_expressions for registers that were originally saved
1409 relative to the stack pointer, but now have to be expressed
1410 relative to the frame pointer.
1411 (aarch64_output_mi_thunk): Pass extra temporary registers to the
1412 functions above.
1413 (aarch64_expand_epilogue): Likewise. Prevent inheritance of
1414 IP0 and IP1 values for SVE frames.
1415 (aarch64_expand_vec_series): New function.
1416 (aarch64_expand_sve_widened_duplicate): Likewise.
1417 (aarch64_expand_sve_const_vector): Likewise.
1418 (aarch64_expand_mov_immediate): Add a gen_vec_duplicate parameter.
1419 Handle SVE constants. Use emit_move_insn to move a force_const_mem
1420 into the register, rather than emitting a SET directly.
1421 (aarch64_emit_sve_pred_move, aarch64_expand_sve_mem_move)
1422 (aarch64_get_reg_raw_mode, offset_4bit_signed_scaled_p)
1423 (offset_6bit_unsigned_scaled_p, aarch64_offset_7bit_signed_scaled_p)
1424 (offset_9bit_signed_scaled_p): New functions.
1425 (aarch64_replicate_bitmask_imm): New function.
1426 (aarch64_bitmask_imm): Use it.
1427 (aarch64_cannot_force_const_mem): Reject expressions involving
1428 a CONST_POLY_INT. Update call to aarch64_classify_symbol.
1429 (aarch64_classify_index): Handle SVE indices, by requiring
1430 a plain register index with a scale that matches the element size.
1431 (aarch64_classify_address): Handle SVE addresses. Assert that
1432 the mode of the address is VOIDmode or an integer mode.
1433 Update call to aarch64_classify_symbol.
1434 (aarch64_classify_symbolic_expression): Update call to
1435 aarch64_classify_symbol.
1436 (aarch64_const_vec_all_in_range_p): New function.
1437 (aarch64_print_vector_float_operand): Likewise.
1438 (aarch64_print_operand): Handle 'N' and 'C'. Use "zN" rather than
1439 "vN" for FP registers with SVE modes. Handle (const ...) vectors
1440 and the FP immediates 1.0 and 0.5.
1441 (aarch64_print_address_internal): Handle SVE addresses.
1442 (aarch64_print_operand_address): Use ADDR_QUERY_ANY.
1443 (aarch64_regno_regclass): Handle predicate registers.
1444 (aarch64_secondary_reload): Handle big-endian reloads of SVE
1445 data modes.
1446 (aarch64_class_max_nregs): Handle SVE modes and predicate registers.
1447 (aarch64_rtx_costs): Check for ADDVL and ADDPL instructions.
1448 (aarch64_convert_sve_vector_bits): New function.
1449 (aarch64_override_options): Use it to handle -msve-vector-bits=.
1450 (aarch64_classify_symbol): Take the offset as a HOST_WIDE_INT
1451 rather than an rtx.
1452 (aarch64_legitimate_constant_p): Use aarch64_classify_vector_mode.
1453 Handle SVE vector and predicate modes. Accept VL-based constants
1454 that need only one temporary register, and VL offsets that require
1455 no temporary registers.
1456 (aarch64_conditional_register_usage): Mark the predicate registers
1457 as fixed if SVE isn't available.
1458 (aarch64_vector_mode_supported_p): Use aarch64_classify_vector_mode.
1459 Return true for SVE vector and predicate modes.
1460 (aarch64_simd_container_mode): Take the number of bits as a poly_int64
1461 rather than an unsigned int. Handle SVE modes.
1462 (aarch64_preferred_simd_mode): Update call accordingly. Handle
1463 SVE modes.
1464 (aarch64_autovectorize_vector_sizes): Add BYTES_PER_SVE_VECTOR
1465 if SVE is enabled.
1466 (aarch64_sve_index_immediate_p, aarch64_sve_arith_immediate_p)
1467 (aarch64_sve_bitmask_immediate_p, aarch64_sve_dup_immediate_p)
1468 (aarch64_sve_cmp_immediate_p, aarch64_sve_float_arith_immediate_p)
1469 (aarch64_sve_float_mul_immediate_p): New functions.
1470 (aarch64_sve_valid_immediate): New function.
1471 (aarch64_simd_valid_immediate): Use it as the fallback for SVE vectors.
1472 Explicitly reject structure modes. Check for INDEX constants.
1473 Handle PTRUE and PFALSE constants.
1474 (aarch64_check_zero_based_sve_index_immediate): New function.
1475 (aarch64_simd_imm_zero_p): Delete.
1476 (aarch64_mov_operand_p): Use aarch64_simd_valid_immediate for
1477 vector modes. Accept constants in the range of CNT[BHWD].
1478 (aarch64_simd_scalar_immediate_valid_for_move): Explicitly
1479 ask for an Advanced SIMD mode.
1480 (aarch64_sve_ld1r_operand_p, aarch64_sve_ldr_operand_p): New functions.
1481 (aarch64_simd_vector_alignment): Handle SVE predicates.
1482 (aarch64_vectorize_preferred_vector_alignment): New function.
1483 (aarch64_simd_vector_alignment_reachable): Use it instead of
1484 the vector size.
1485 (aarch64_shift_truncation_mask): Use aarch64_vector_data_mode_p.
1486 (aarch64_output_sve_mov_immediate, aarch64_output_ptrue): New
1487 functions.
1488 (MAX_VECT_LEN): Delete.
1489 (expand_vec_perm_d): Add a vec_flags field.
1490 (emit_unspec2, aarch64_expand_sve_vec_perm): New functions.
1491 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_zip)
1492 (aarch64_evpc_ext): Don't apply a big-endian lane correction
1493 for SVE modes.
1494 (aarch64_evpc_rev): Rename to...
1495 (aarch64_evpc_rev_local): ...this. Use a predicated operation for SVE.
1496 (aarch64_evpc_rev_global): New function.
1497 (aarch64_evpc_dup): Enforce a 64-byte range for SVE DUP.
1498 (aarch64_evpc_tbl): Use MAX_COMPILE_TIME_VEC_BYTES instead of
1499 MAX_VECT_LEN.
1500 (aarch64_evpc_sve_tbl): New function.
1501 (aarch64_expand_vec_perm_const_1): Update after rename of
1502 aarch64_evpc_rev. Handle SVE permutes too, trying
1503 aarch64_evpc_rev_global and using aarch64_evpc_sve_tbl rather
1504 than aarch64_evpc_tbl.
1505 (aarch64_vectorize_vec_perm_const): Initialize vec_flags.
1506 (aarch64_sve_cmp_operand_p, aarch64_unspec_cond_code)
1507 (aarch64_gen_unspec_cond, aarch64_expand_sve_vec_cmp_int)
1508 (aarch64_emit_unspec_cond, aarch64_emit_unspec_cond_or)
1509 (aarch64_emit_inverted_unspec_cond, aarch64_expand_sve_vec_cmp_float)
1510 (aarch64_expand_sve_vcond): New functions.
1511 (aarch64_modes_tieable_p): Use aarch64_vector_data_mode_p instead
1512 of aarch64_vector_mode_p.
1513 (aarch64_dwarf_poly_indeterminate_value): New function.
1514 (aarch64_compute_pressure_classes): Likewise.
1515 (aarch64_can_change_mode_class): Likewise.
1516 (TARGET_GET_RAW_RESULT_MODE, TARGET_GET_RAW_ARG_MODE): Redefine.
1517 (TARGET_VECTORIZE_PREFERRED_VECTOR_ALIGNMENT): Likewise.
1518 (TARGET_VECTORIZE_GET_MASK_MODE): Likewise.
1519 (TARGET_DWARF_POLY_INDETERMINATE_VALUE): Likewise.
1520 (TARGET_COMPUTE_PRESSURE_CLASSES): Likewise.
1521 (TARGET_CAN_CHANGE_MODE_CLASS): Likewise.
1522 * config/aarch64/constraints.md (Upa, Upl, Uav, Uat, Usv, Usi, Utr)
1523 (Uty, Dm, vsa, vsc, vsd, vsi, vsn, vsl, vsm, vsA, vsM, vsN): New
1524 constraints.
1525 (Dn, Dl, Dr): Accept const as well as const_vector.
1526 (Dz): Likewise. Compare against CONST0_RTX.
1527 * config/aarch64/iterators.md: Refer to "Advanced SIMD" instead
1528 of "vector" where appropriate.
1529 (SVE_ALL, SVE_BH, SVE_BHS, SVE_BHSI, SVE_HSDI, SVE_HSF, SVE_SD)
1530 (SVE_SDI, SVE_I, SVE_F, PRED_ALL, PRED_BHS): New mode iterators.
1531 (UNSPEC_SEL, UNSPEC_ANDF, UNSPEC_IORF, UNSPEC_XORF, UNSPEC_COND_LT)
1532 (UNSPEC_COND_LE, UNSPEC_COND_EQ, UNSPEC_COND_NE, UNSPEC_COND_GE)
1533 (UNSPEC_COND_GT, UNSPEC_COND_LO, UNSPEC_COND_LS, UNSPEC_COND_HS)
1534 (UNSPEC_COND_HI, UNSPEC_COND_UO): New unspecs.
1535 (Vetype, VEL, Vel, VWIDE, Vwide, vw, vwcore, V_INT_EQUIV)
1536 (v_int_equiv): Extend to SVE modes.
1537 (Vesize, V128, v128, Vewtype, V_FP_EQUIV, v_fp_equiv, VPRED): New
1538 mode attributes.
1539 (LOGICAL_OR, SVE_INT_UNARY, SVE_FP_UNARY): New code iterators.
1540 (optab): Handle popcount, smin, smax, umin, umax, abs and sqrt.
1541 (logical_nn, lr, sve_int_op, sve_fp_op): New code attributs.
1542 (LOGICALF, OPTAB_PERMUTE, UNPACK, UNPACK_UNSIGNED, SVE_COND_INT_CMP)
1543 (SVE_COND_FP_CMP): New int iterators.
1544 (perm_hilo): Handle the new unpack unspecs.
1545 (optab, logicalf_op, su, perm_optab, cmp_op, imm_con): New int
1546 attributes.
1547 * config/aarch64/predicates.md (aarch64_sve_cnt_immediate)
1548 (aarch64_sve_addvl_addpl_immediate, aarch64_split_add_offset_immediate)
1549 (aarch64_pluslong_or_poly_operand, aarch64_nonmemory_operand)
1550 (aarch64_equality_operator, aarch64_constant_vector_operand)
1551 (aarch64_sve_ld1r_operand, aarch64_sve_ldr_operand): New predicates.
1552 (aarch64_sve_nonimmediate_operand): Likewise.
1553 (aarch64_sve_general_operand): Likewise.
1554 (aarch64_sve_dup_operand, aarch64_sve_arith_immediate): Likewise.
1555 (aarch64_sve_sub_arith_immediate, aarch64_sve_inc_dec_immediate)
1556 (aarch64_sve_logical_immediate, aarch64_sve_mul_immediate): Likewise.
1557 (aarch64_sve_dup_immediate, aarch64_sve_cmp_vsc_immediate): Likewise.
1558 (aarch64_sve_cmp_vsd_immediate, aarch64_sve_index_immediate): Likewise.
1559 (aarch64_sve_float_arith_immediate): Likewise.
1560 (aarch64_sve_float_arith_with_sub_immediate): Likewise.
1561 (aarch64_sve_float_mul_immediate, aarch64_sve_arith_operand): Likewise.
1562 (aarch64_sve_add_operand, aarch64_sve_logical_operand): Likewise.
1563 (aarch64_sve_lshift_operand, aarch64_sve_rshift_operand): Likewise.
1564 (aarch64_sve_mul_operand, aarch64_sve_cmp_vsc_operand): Likewise.
1565 (aarch64_sve_cmp_vsd_operand, aarch64_sve_index_operand): Likewise.
1566 (aarch64_sve_float_arith_operand): Likewise.
1567 (aarch64_sve_float_arith_with_sub_operand): Likewise.
1568 (aarch64_sve_float_mul_operand): Likewise.
1569 (aarch64_sve_vec_perm_operand): Likewise.
1570 (aarch64_pluslong_operand): Include aarch64_sve_addvl_addpl_immediate.
1571 (aarch64_mov_operand): Accept const_poly_int and const_vector.
1572 (aarch64_simd_lshift_imm, aarch64_simd_rshift_imm): Accept const
1573 as well as const_vector.
1574 (aarch64_simd_imm_zero, aarch64_simd_imm_minus_one): Move earlier
1575 in file. Use CONST0_RTX and CONSTM1_RTX.
1576 (aarch64_simd_or_scalar_imm_zero): Likewise. Add match_codes.
1577 (aarch64_simd_reg_or_zero): Accept const as well as const_vector.
1578 Use aarch64_simd_imm_zero.
1579 * config/aarch64/aarch64-sve.md: New file.
1580 * config/aarch64/aarch64.md: Include it.
1581 (VG_REGNUM, P0_REGNUM, P7_REGNUM, P15_REGNUM): New register numbers.
1582 (UNSPEC_REV, UNSPEC_LD1_SVE, UNSPEC_ST1_SVE, UNSPEC_MERGE_PTRUE)
1583 (UNSPEC_PTEST_PTRUE, UNSPEC_UNPACKSHI, UNSPEC_UNPACKUHI)
1584 (UNSPEC_UNPACKSLO, UNSPEC_UNPACKULO, UNSPEC_PACK)
1585 (UNSPEC_FLOAT_CONVERT, UNSPEC_WHILE_LO): New unspec constants.
1586 (sve): New attribute.
1587 (enabled): Disable instructions with the sve attribute unless
1588 TARGET_SVE.
1589 (movqi, movhi): Pass CONST_POLY_INT operaneds through
1590 aarch64_expand_mov_immediate.
1591 (*mov<mode>_aarch64, *movsi_aarch64, *movdi_aarch64): Handle
1592 CNT[BHSD] immediates.
1593 (movti): Split CONST_POLY_INT moves into two halves.
1594 (add<mode>3): Accept aarch64_pluslong_or_poly_operand.
1595 Split additions that need a temporary here if the destination
1596 is the stack pointer.
1597 (*add<mode>3_aarch64): Handle ADDVL and ADDPL immediates.
1598 (*add<mode>3_poly_1): New instruction.
1599 (set_clobber_cc): New expander.
1601 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1603 * simplify-rtx.c (simplify_immed_subreg): Add an inner_bytes
1604 parameter and use it instead of GET_MODE_SIZE (innermode). Use
1605 inner_bytes * BITS_PER_UNIT instead of GET_MODE_BITSIZE (innermode).
1606 Use CEIL (inner_bytes, GET_MODE_UNIT_SIZE (innermode)) instead of
1607 GET_MODE_NUNITS (innermode). Also add a first_elem parameter.
1608 Change innermode from fixed_mode_size to machine_mode.
1609 (simplify_subreg): Update call accordingly. Handle a constant-sized
1610 subreg of a variable-length CONST_VECTOR.
1612 2018-01-13 Richard Sandiford <richard.sandiford@linaro.org>
1613 Alan Hayward <alan.hayward@arm.com>
1614 David Sherwood <david.sherwood@arm.com>
1616 * tree-ssa-address.c (mem_ref_valid_without_offset_p): New function.
1617 (add_offset_to_base): New function, split out from...
1618 (create_mem_ref): ...here. When handling a scale other than 1,
1619 check first whether the address is valid without the offset.
1620 Add it into the base if so, leaving the index and scale as-is.
1622 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1624 PR c++/83778
1625 * config/rs6000/rs6000-c.c (altivec_resolve_overloaded_builtin): Call
1626 fold_for_warn before checking if arg2 is INTEGER_CST.
1628 2018-01-12 Segher Boessenkool <segher@kernel.crashing.org>
1630 * config/rs6000/predicates.md (load_multiple_operation): Delete.
1631 (store_multiple_operation): Delete.
1632 * config/rs6000/rs6000-cpus.def (601): Remove MASK_STRING.
1633 * config/rs6000/rs6000-protos.h (rs6000_output_load_multiple): Delete.
1634 * config/rs6000/rs6000-string.c (expand_block_move): Delete everything
1635 guarded by TARGET_STRING.
1636 (rs6000_output_load_multiple): Delete.
1637 * config/rs6000/rs6000.c (rs6000_option_override_internal): Delete
1638 OPTION_MASK_STRING / TARGET_STRING handling.
1639 (print_operand) <'N', 'O'>: Add comment that these are unused now.
1640 (const rs6000_opt_masks) <"string">: Change mask to 0.
1641 * config/rs6000/rs6000.h (TARGET_DEFAULT): Remove MASK_STRING.
1642 (MASK_STRING): Delete.
1643 * config/rs6000/rs6000.md (*mov<mode>_string): Delete TARGET_STRING
1644 parts. Simplify.
1645 (load_multiple): Delete.
1646 (*ldmsi8): Delete.
1647 (*ldmsi7): Delete.
1648 (*ldmsi6): Delete.
1649 (*ldmsi5): Delete.
1650 (*ldmsi4): Delete.
1651 (*ldmsi3): Delete.
1652 (store_multiple): Delete.
1653 (*stmsi8): Delete.
1654 (*stmsi7): Delete.
1655 (*stmsi6): Delete.
1656 (*stmsi5): Delete.
1657 (*stmsi4): Delete.
1658 (*stmsi3): Delete.
1659 (movmemsi_8reg): Delete.
1660 (corresponding unnamed define_insn): Delete.
1661 (movmemsi_6reg): Delete.
1662 (corresponding unnamed define_insn): Delete.
1663 (movmemsi_4reg): Delete.
1664 (corresponding unnamed define_insn): Delete.
1665 (movmemsi_2reg): Delete.
1666 (corresponding unnamed define_insn): Delete.
1667 (movmemsi_1reg): Delete.
1668 (corresponding unnamed define_insn): Delete.
1669 * config/rs6000/rs6000.opt (mno-string): New.
1670 (mstring): Replace by deprecation warning stub.
1671 * doc/invoke.texi (RS/6000 and PowerPC Options): Delete -mstring.
1673 2018-01-12 Jakub Jelinek <jakub@redhat.com>
1675 * regrename.c (regrename_do_replace): If replacing the same
1676 reg multiple times, try to reuse last created gen_raw_REG.
1678 PR debug/81155
1679 * bb-reorder.c (pass_partition_blocks::gate): In lto don't partition
1680 main to workaround a bug in GDB.
1682 2018-01-12 Tom de Vries <tom@codesourcery.com>
1684 PR target/83737
1685 * config.gcc (nvptx*-*-*): Set use_gcc_stdint=wrap.
1687 2018-01-12 Vladimir Makarov <vmakarov@redhat.com>
1689 PR rtl-optimization/80481
1690 * ira-color.c (get_cap_member): New function.
1691 (allocnos_conflict_by_live_ranges_p): Use it.
1692 (slot_coalesced_allocno_live_ranges_intersect_p): Add assert.
1693 (setup_slot_coalesced_allocno_live_ranges): Ditto.
1695 2018-01-12 Uros Bizjak <ubizjak@gmail.com>
1697 PR target/83628
1698 * config/alpha/alpha.md (*saddsi_1): New insn_ans_split pattern.
1699 (*saddl_se_1): Ditto.
1700 (*ssubsi_1): Ditto.
1701 (*ssubl_se_1): Ditto.
1703 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1705 * tree-predcom.c (aff_combination_dr_offset): Use wi::to_poly_widest
1706 rather than wi::to_widest for DR_INITs.
1707 * tree-vect-data-refs.c (vect_find_same_alignment_drs): Use
1708 wi::to_poly_offset rather than wi::to_offset for DR_INIT.
1709 (vect_analyze_data_ref_accesses): Require both DR_INITs to be
1710 INTEGER_CSTs.
1711 (vect_analyze_group_access_1): Note that here.
1713 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1715 * tree-vectorizer.c (get_vec_alignment_for_array_type): Handle
1716 polynomial type sizes.
1718 2018-01-12 Richard Sandiford <richard.sandiford@linaro.org>
1720 * gimplify.c (gimple_add_tmp_var_fn): Allow variables to have a
1721 poly_uint64 size, rather than requiring an unsigned HOST_WIDE_INT size.
1722 (gimple_add_tmp_var): Likewise.
1724 2018-01-12 Martin Liska <mliska@suse.cz>
1726 * gimple.c (gimple_alloc_counts): Use uint64_t instead of int.
1727 (gimple_alloc_sizes): Likewise.
1728 (dump_gimple_statistics): Use PRIu64 in printf format.
1729 * gimple.h: Change uint64_t to int.
1731 2018-01-12 Martin Liska <mliska@suse.cz>
1733 * tree-core.h: Use uint64_t instead of int.
1734 * tree.c (tree_node_counts): Likewise.
1735 (tree_node_sizes): Likewise.
1736 (dump_tree_statistics): Use PRIu64 in printf format.
1738 2018-01-12 Martin Liska <mliska@suse.cz>
1740 * Makefile.in: As qsort_chk is implemented in vec.c, add
1741 vec.o to linkage of gencfn-macros.
1742 * tree.c (build_new_poly_int_cst): Add CXX_MEM_STAT_INFO as it's
1743 passing the info to record_node_allocation_statistics.
1744 (test_vector_cst_patterns): Add CXX_MEM_STAT_INFO to declaration
1745 and pass the info.
1746 * ggc-common.c (struct ggc_usage): Add operator== and use
1747 it in operator< and compare function.
1748 * mem-stats.h (struct mem_usage): Likewise.
1749 * vec.c (struct vec_usage): Remove operator< and compare
1750 function. Can be simply inherited.
1752 2018-01-12 Martin Jambor <mjambor@suse.cz>
1754 PR target/81616
1755 * params.def: New parameter PARAM_AVOID_FMA_MAX_BITS.
1756 * tree-ssa-math-opts.c: Include domwalk.h.
1757 (convert_mult_to_fma_1): New function.
1758 (fma_transformation_info): New type.
1759 (fma_deferring_state): Likewise.
1760 (cancel_fma_deferring): New function.
1761 (result_of_phi): Likewise.
1762 (last_fma_candidate_feeds_initial_phi): Likewise.
1763 (convert_mult_to_fma): Added deferring logic, split actual
1764 transformation to convert_mult_to_fma_1.
1765 (math_opts_dom_walker): New type.
1766 (math_opts_dom_walker::after_dom_children): New method, body moved
1767 here from pass_optimize_widening_mul::execute, added deferring logic
1768 bits.
1769 (pass_optimize_widening_mul::execute): Moved most of code to
1770 math_opts_dom_walker::after_dom_children.
1771 * config/i386/x86-tune.def (X86_TUNE_AVOID_128FMA_CHAINS): New.
1772 * config/i386/i386.c (ix86_option_override_internal): Added
1773 maybe_setting of PARAM_AVOID_FMA_MAX_BITS.
1775 2018-01-12 Richard Biener <rguenther@suse.de>
1777 PR debug/83157
1778 * dwarf2out.c (gen_variable_die): Do not reset old_die for
1779 inline instance vars.
1781 2018-01-12 Oleg Endo <olegendo@gcc.gnu.org>
1783 PR target/81819
1784 * config/rx/rx.c (rx_is_restricted_memory_address):
1785 Handle SUBREG case.
1787 2018-01-12 Richard Biener <rguenther@suse.de>
1789 PR tree-optimization/80846
1790 * target.def (split_reduction): New target hook.
1791 * targhooks.c (default_split_reduction): New function.
1792 * targhooks.h (default_split_reduction): Declare.
1793 * tree-vect-loop.c (vect_create_epilog_for_reduction): If the
1794 target requests first reduce vectors by combining low and high
1795 parts.
1796 * tree-vect-stmts.c (vect_gen_perm_mask_any): Adjust.
1797 (get_vectype_for_scalar_type_and_size): Export.
1798 * tree-vectorizer.h (get_vectype_for_scalar_type_and_size): Declare.
1799 * doc/tm.texi.in (TARGET_VECTORIZE_SPLIT_REDUCTION): Document.
1800 * doc/tm.texi: Regenerate.
1801 * config/i386/i386.c (ix86_split_reduction): Implement
1802 TARGET_VECTORIZE_SPLIT_REDUCTION.
1804 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1806 PR target/83368
1807 * config/sparc/sparc.h (PIC_OFFSET_TABLE_REGNUM): Set to INVALID_REGNUM
1808 in PIC mode except for TARGET_VXWORKS_RTP.
1809 * config/sparc/sparc.c: Include cfgrtl.h.
1810 (TARGET_INIT_PIC_REG): Define.
1811 (TARGET_USE_PSEUDO_PIC_REG): Likewise.
1812 (sparc_pic_register_p): New predicate.
1813 (sparc_legitimate_address_p): Use it.
1814 (sparc_legitimize_pic_address): Likewise.
1815 (sparc_delegitimize_address): Likewise.
1816 (sparc_mode_dependent_address_p): Likewise.
1817 (gen_load_pcrel_sym): Remove 4th parameter.
1818 (load_got_register): Adjust call to above. Remove obsolete stuff.
1819 (sparc_expand_prologue): Do not call load_got_register here.
1820 (sparc_flat_expand_prologue): Likewise.
1821 (sparc_output_mi_thunk): Set the pic_offset_table_rtx object.
1822 (sparc_use_pseudo_pic_reg): New function.
1823 (sparc_init_pic_reg): Likewise.
1824 * config/sparc/sparc.md (vxworks_load_got): Set the GOT register.
1825 (builtin_setjmp_receiver): Enable only for TARGET_VXWORKS_RTP.
1827 2018-01-12 Christophe Lyon <christophe.lyon@linaro.org>
1829 * doc/sourcebuild.texi (Effective-Target Keywords, Other attributes):
1830 Add item for branch_cost.
1832 2018-01-12 Eric Botcazou <ebotcazou@adacore.com>
1834 PR rtl-optimization/83565
1835 * rtlanal.c (nonzero_bits1): On WORD_REGISTER_OPERATIONS machines, do
1836 not extend the result to a larger mode for rotate operations.
1837 (num_sign_bit_copies1): Likewise.
1839 2018-01-12 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
1841 PR target/40411
1842 * config/sol2.h (STARTFILE_ARCH_SPEC): Don't use with -shared or
1843 -symbolic.
1844 Use values-Xc.o for -pedantic.
1845 Link with values-xpg4.o for C90, values-xpg6.o otherwise.
1847 2018-01-12 Martin Liska <mliska@suse.cz>
1849 PR ipa/83054
1850 * ipa-devirt.c (final_warning_record::grow_type_warnings):
1851 New function.
1852 (possible_polymorphic_call_targets): Use it.
1853 (ipa_devirt): Likewise.
1855 2018-01-12 Martin Liska <mliska@suse.cz>
1857 * profile-count.h (enum profile_quality): Use 0 as invalid
1858 enum value of profile_quality.
1860 2018-01-12 Chung-Ju Wu <jasonwucj@gmail.com>
1862 * doc/invoke.texi (NDS32 Options): Add -mext-perf, -mext-perf2 and
1863 -mext-string options.
1865 2018-01-12 Richard Biener <rguenther@suse.de>
1867 * lto-streamer-out.c (DFS::DFS_write_tree_body): Process
1868 DECL_DEBUG_EXPR conditional on DECL_HAS_DEBUG_EXPR_P.
1869 * tree-streamer-in.c (lto_input_ts_decl_common_tree_pointers):
1870 Likewise.
1871 * tree-streamer-out.c (write_ts_decl_common_tree_pointers): Likewise.
1873 2018-01-11 Michael Meissner <meissner@linux.vnet.ibm.com>
1875 * configure.ac (--with-long-double-format): Add support for the
1876 configuration option to change the default long double format on
1877 PowerPC systems.
1878 * config.gcc (powerpc*-linux*-*): Likewise.
1879 * configure: Regenerate.
1880 * config/rs6000/rs6000-c.c (rs6000_cpu_cpp_builtins): If long
1881 double is IEEE, define __KC__ and __KF__ to allow floatn.h to be
1882 used without modification.
1884 2018-01-11 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
1886 * config/rs6000/rs6000-builtin.def (BU_P7_MISC_X): New #define.
1887 (SPEC_BARRIER): New instantiation of BU_P7_MISC_X.
1888 * config/rs6000/rs6000.c (rs6000_expand_builtin): Handle
1889 MISC_BUILTIN_SPEC_BARRIER.
1890 (rs6000_init_builtins): Likewise.
1891 * config/rs6000/rs6000.md (UNSPECV_SPEC_BARRIER): New UNSPECV
1892 enum value.
1893 (speculation_barrier): New define_insn.
1894 * doc/extend.texi: Document __builtin_speculation_barrier.
1896 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1898 PR target/83203
1899 * config/i386/i386.c (ix86_expand_vector_init_one_nonzero): If one_var
1900 is 0, for V{8,16}S[IF] and V[48]D[IF]mode use gen_vec_set<mode>_0.
1901 * config/i386/sse.md (VI8_AVX_AVX512F, VI4F_256_512): New mode
1902 iterators.
1903 (ssescalarmodesuffix): Add 512-bit vectors. Use "d" or "q" for
1904 integral modes instead of "ss" and "sd".
1905 (vec_set<mode>_0): New define_insns for 256-bit and 512-bit
1906 vectors with 32-bit and 64-bit elements.
1907 (vecdupssescalarmodesuffix): New mode attribute.
1908 (vec_dup<mode>): Use it.
1910 2018-01-11 H.J. Lu <hongjiu.lu@intel.com>
1912 PR target/83330
1913 * config/i386/i386.c (ix86_compute_frame_layout): Align stack
1914 frame if argument is passed on stack.
1916 2018-01-11 Jakub Jelinek <jakub@redhat.com>
1918 PR target/82682
1919 * ree.c (combine_reaching_defs): Optimize also
1920 reg2=exp; reg1=reg2; reg2=any_extend(reg1); into
1921 reg2=any_extend(exp); reg1=reg2;, formatting fix.
1923 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1925 PR middle-end/83189
1926 * gimple-ssa-isolate-paths.c (isolate_path): Fix profile update.
1928 2018-01-11 Jan Hubicka <hubicka@ucw.cz>
1930 PR middle-end/83718
1931 * tree-inline.c (copy_cfg_body): Adjust num&den for scaling
1932 after they are computed.
1934 2018-01-11 Bin Cheng <bin.cheng@arm.com>
1936 PR tree-optimization/83695
1937 * gimple-loop-linterchange.cc
1938 (tree_loop_interchange::interchange_loops): Call scev_reset_htab to
1939 reset cached scev information after interchange.
1940 (pass_linterchange::execute): Remove call to scev_reset_htab.
1942 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1944 * config/arm/arm_neon.h (vfmlal_lane_low_u32, vfmlal_lane_high_u32,
1945 vfmlalq_laneq_low_u32, vfmlalq_lane_low_u32, vfmlal_laneq_low_u32,
1946 vfmlalq_laneq_high_u32, vfmlalq_lane_high_u32, vfmlal_laneq_high_u32,
1947 vfmlsl_lane_low_u32, vfmlsl_lane_high_u32, vfmlslq_laneq_low_u32,
1948 vfmlslq_lane_low_u32, vfmlsl_laneq_low_u32, vfmlslq_laneq_high_u32,
1949 vfmlslq_lane_high_u32, vfmlsl_laneq_high_u32): Define.
1950 * config/arm/arm_neon_builtins.def (vfmal_lane_low,
1951 vfmal_lane_lowv4hf, vfmal_lane_lowv8hf, vfmal_lane_high,
1952 vfmal_lane_highv4hf, vfmal_lane_highv8hf, vfmsl_lane_low,
1953 vfmsl_lane_lowv4hf, vfmsl_lane_lowv8hf, vfmsl_lane_high,
1954 vfmsl_lane_highv4hf, vfmsl_lane_highv8hf): New sets of builtins.
1955 * config/arm/iterators.md (VFMLSEL2, vfmlsel2): New mode attributes.
1956 (V_lane_reg): Likewise.
1957 * config/arm/neon.md (neon_vfm<vfml_op>l_lane_<vfml_half><VCVTF:mode>):
1958 New define_expand.
1959 (neon_vfm<vfml_op>l_lane_<vfml_half><vfmlsel2><mode>): Likewise.
1960 (vfmal_lane_low<mode>_intrinsic,
1961 vfmal_lane_low<vfmlsel2><mode>_intrinsic,
1962 vfmal_lane_high<vfmlsel2><mode>_intrinsic,
1963 vfmal_lane_high<mode>_intrinsic, vfmsl_lane_low<mode>_intrinsic,
1964 vfmsl_lane_low<vfmlsel2><mode>_intrinsic,
1965 vfmsl_lane_high<vfmlsel2><mode>_intrinsic,
1966 vfmsl_lane_high<mode>_intrinsic): New define_insns.
1968 2018-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
1970 * config/arm/arm-cpus.in (fp16fml): New feature.
1971 (ALL_SIMD): Add fp16fml.
1972 (armv8.2-a): Add fp16fml as an option.
1973 (armv8.3-a): Likewise.
1974 (armv8.4-a): Add fp16fml as part of fp16.
1975 * config/arm/arm.h (TARGET_FP16FML): Define.
1976 * config/arm/arm-c.c (arm_cpu_builtins): Define __ARM_FEATURE_FP16_FML
1977 when appropriate.
1978 * config/arm/arm-modes.def (V2HF): Define.
1979 * config/arm/arm_neon.h (vfmlal_low_u32, vfmlsl_low_u32,
1980 vfmlal_high_u32, vfmlsl_high_u32, vfmlalq_low_u32,
1981 vfmlslq_low_u32, vfmlalq_high_u32, vfmlslq_high_u32): Define.
1982 * config/arm/arm_neon_builtins.def (vfmal_low, vfmal_high,
1983 vfmsl_low, vfmsl_high): New set of builtins.
1984 * config/arm/iterators.md (PLUSMINUS): New code iterator.
1985 (vfml_op): New code attribute.
1986 (VFMLHALVES): New int iterator.
1987 (VFML, VFMLSEL): New mode attributes.
1988 (V_reg): Define mapping for V2HF.
1989 (V_hi, V_lo): New mode attributes.
1990 (VF_constraint): Likewise.
1991 (vfml_half, vfml_half_selector): New int attributes.
1992 * config/arm/neon.md (neon_vfm<vfml_op>l_<vfml_half><mode>): New
1993 define_expand.
1994 (vfmal_low<mode>_intrinsic, vfmsl_high<mode>_intrinsic,
1995 vfmal_high<mode>_intrinsic, vfmsl_low<mode>_intrinsic):
1996 New define_insn.
1997 * config/arm/t-arm-elf (v8_fps): Add fp16fml.
1998 * config/arm/t-multilib (v8_2_a_simd_variants): Add fp16fml.
1999 * config/arm/unspecs.md (UNSPEC_VFML_LO, UNSPEC_VFML_HI): New unspecs.
2000 * doc/invoke.texi (ARM Options): Document fp16fml. Update armv8.4-a
2001 documentation.
2002 * doc/sourcebuild.texi (arm_fp16fml_neon_ok, arm_fp16fml_neon):
2003 Document new effective target and option set.
2005 2017-01-11 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2007 * config/arm/arm-cpus.in (armv8_4): New feature.
2008 (ARMv8_4a): New fgroup.
2009 (armv8.4-a): New arch.
2010 * config/arm/arm-tables.opt: Regenerate.
2011 * config/arm/t-aprofile: Add matching rules for -march=armv8.4-a.
2012 * config/arm/t-arm-elf (all_v8_archs): Add armv8.4-a.
2013 * config/arm/t-multilib (v8_4_a_simd_variants): New variable.
2014 Add matching rules for -march=armv8.4-a and extensions.
2015 * doc/invoke.texi (ARM Options): Document -march=armv8.4-a.
2017 2018-01-11 Oleg Endo <olegendo@gcc.gnu.org>
2019 PR target/81821
2020 * config/rx/rx.md (BW): New mode attribute.
2021 (sync_lock_test_and_setsi): Add mode suffix to insn output.
2023 2018-01-11 Richard Biener <rguenther@suse.de>
2025 PR tree-optimization/83435
2026 * graphite.c (canonicalize_loop_form): Ignore fake loop exit edges.
2027 * graphite-scop-detection.c (scop_detection::get_sese): Likewise.
2028 * tree-vrp.c (add_assert_info): Drop TREE_OVERFLOW if they appear.
2030 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2031 Alan Hayward <alan.hayward@arm.com>
2032 David Sherwood <david.sherwood@arm.com>
2034 * config/aarch64/aarch64.c (aarch64_address_info): Add a const_offset
2035 field.
2036 (aarch64_classify_address): Initialize it. Track polynomial offsets.
2037 (aarch64_print_address_internal): Use it to check for a zero offset.
2039 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2040 Alan Hayward <alan.hayward@arm.com>
2041 David Sherwood <david.sherwood@arm.com>
2043 * config/aarch64/aarch64-modes.def (NUM_POLY_INT_COEFFS): Set to 2.
2044 * config/aarch64/aarch64-protos.h (aarch64_initial_elimination_offset):
2045 Return a poly_int64 rather than a HOST_WIDE_INT.
2046 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a poly_int64
2047 rather than a HOST_WIDE_INT.
2048 * config/aarch64/aarch64.h (aarch64_frame): Protect with
2049 HAVE_POLY_INT_H rather than HOST_WIDE_INT. Change locals_offset,
2050 hard_fp_offset, frame_size, initial_adjust, callee_offset and
2051 final_offset from HOST_WIDE_INT to poly_int64.
2052 * config/aarch64/aarch64-builtins.c (aarch64_simd_expand_args): Use
2053 to_constant when getting the number of units in an Advanced SIMD
2054 mode.
2055 (aarch64_builtin_vectorized_function): Check for a constant number
2056 of units.
2057 * config/aarch64/aarch64-simd.md (mov<mode>): Handle polynomial
2058 GET_MODE_SIZE.
2059 (aarch64_ld<VSTRUCT:nregs>_lane<VALLDIF:mode>): Use the nunits
2060 attribute instead of GET_MODE_NUNITS.
2061 * config/aarch64/aarch64.c (aarch64_hard_regno_nregs)
2062 (aarch64_class_max_nregs): Use the constant_lowest_bound of the
2063 GET_MODE_SIZE for fixed-size registers.
2064 (aarch64_const_vec_all_same_in_range_p): Use const_vec_duplicate_p.
2065 (aarch64_hard_regno_call_part_clobbered, aarch64_classify_index)
2066 (aarch64_mode_valid_for_sched_fusion_p, aarch64_classify_address)
2067 (aarch64_legitimize_address_displacement, aarch64_secondary_reload)
2068 (aarch64_print_operand, aarch64_print_address_internal)
2069 (aarch64_address_cost, aarch64_rtx_costs, aarch64_register_move_cost)
2070 (aarch64_short_vector_p, aapcs_vfp_sub_candidate)
2071 (aarch64_simd_attr_length_rglist, aarch64_operands_ok_for_ldpstp):
2072 Handle polynomial GET_MODE_SIZE.
2073 (aarch64_hard_regno_caller_save_mode): Likewise. Return modes
2074 wider than SImode without modification.
2075 (tls_symbolic_operand_type): Use strip_offset instead of split_const.
2076 (aarch64_pass_by_reference, aarch64_layout_arg, aarch64_pad_reg_upward)
2077 (aarch64_gimplify_va_arg_expr): Assert that we don't yet handle
2078 passing and returning SVE modes.
2079 (aarch64_function_value, aarch64_layout_arg): Use gen_int_mode
2080 rather than GEN_INT.
2081 (aarch64_emit_probe_stack_range): Take the size as a poly_int64
2082 rather than a HOST_WIDE_INT, but call sorry if it isn't constant.
2083 (aarch64_allocate_and_probe_stack_space): Likewise.
2084 (aarch64_layout_frame): Cope with polynomial offsets.
2085 (aarch64_save_callee_saves, aarch64_restore_callee_saves): Take the
2086 start_offset as a poly_int64 rather than a HOST_WIDE_INT. Track
2087 polynomial offsets.
2088 (offset_9bit_signed_unscaled_p, offset_12bit_unsigned_scaled_p)
2089 (aarch64_offset_7bit_signed_scaled_p): Take the offset as a
2090 poly_int64 rather than a HOST_WIDE_INT.
2091 (aarch64_get_separate_components, aarch64_process_components)
2092 (aarch64_expand_prologue, aarch64_expand_epilogue)
2093 (aarch64_use_return_insn_p): Handle polynomial frame offsets.
2094 (aarch64_anchor_offset): New function, split out from...
2095 (aarch64_legitimize_address): ...here.
2096 (aarch64_builtin_vectorization_cost): Handle polynomial
2097 TYPE_VECTOR_SUBPARTS.
2098 (aarch64_simd_check_vect_par_cnst_half): Handle polynomial
2099 GET_MODE_NUNITS.
2100 (aarch64_simd_make_constant, aarch64_expand_vector_init): Get the
2101 number of elements from the PARALLEL rather than the mode.
2102 (aarch64_shift_truncation_mask): Use GET_MODE_UNIT_BITSIZE
2103 rather than GET_MODE_BITSIZE.
2104 (aarch64_evpc_trn, aarch64_evpc_uzp, aarch64_evpc_ext)
2105 (aarch64_evpc_rev, aarch64_evpc_dup, aarch64_evpc_zip)
2106 (aarch64_expand_vec_perm_const_1): Handle polynomial
2107 d->perm.length () and d->perm elements.
2108 (aarch64_evpc_tbl): Likewise. Use nelt rather than GET_MODE_NUNITS.
2109 Apply to_constant to d->perm elements.
2110 (aarch64_simd_valid_immediate, aarch64_vec_fpconst_pow_of_2): Handle
2111 polynomial CONST_VECTOR_NUNITS.
2112 (aarch64_move_pointer): Take amount as a poly_int64 rather
2113 than an int.
2114 (aarch64_progress_pointer): Avoid temporary variable.
2115 * config/aarch64/aarch64.md (aarch64_<crc_variant>): Use
2116 the mode attribute instead of GET_MODE.
2118 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2119 Alan Hayward <alan.hayward@arm.com>
2120 David Sherwood <david.sherwood@arm.com>
2122 * config/aarch64/aarch64.c (aarch64_force_temporary): Assert that
2123 x exists before using it.
2124 (aarch64_add_constant_internal): Rename to...
2125 (aarch64_add_offset_1): ...this. Replace regnum with separate
2126 src and dest rtxes. Handle the case in which they're different,
2127 including when the offset is zero. Replace scratchreg with an rtx.
2128 Use 2 additions if there is no spare register into which we can
2129 move a 16-bit constant.
2130 (aarch64_add_constant): Delete.
2131 (aarch64_add_offset): Replace reg with separate src and dest
2132 rtxes. Take a poly_int64 offset instead of a HOST_WIDE_INT.
2133 Use aarch64_add_offset_1.
2134 (aarch64_add_sp, aarch64_sub_sp): Take the scratch register as
2135 an rtx rather than an int. Take the delta as a poly_int64
2136 rather than a HOST_WIDE_INT. Use aarch64_add_offset.
2137 (aarch64_expand_mov_immediate): Update uses of aarch64_add_offset.
2138 (aarch64_expand_prologue): Update calls to aarch64_sub_sp,
2139 aarch64_allocate_and_probe_stack_space and aarch64_add_offset.
2140 (aarch64_expand_epilogue): Update calls to aarch64_add_offset
2141 and aarch64_add_sp.
2142 (aarch64_output_mi_thunk): Use aarch64_add_offset rather than
2143 aarch64_add_constant.
2145 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2147 * config/aarch64/aarch64.c (aarch64_reinterpret_float_as_int):
2148 Use scalar_float_mode.
2150 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2152 * config/aarch64/aarch64-simd.md
2153 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): Avoid GET_MODE_NUNITS.
2154 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Likewise.
2155 (aarch64_fml<f16mac1>l_lane_lowv2sf): Likewise.
2156 (aarch64_fml<f16mac1>l_lane_highv2sf): Likewise.
2157 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Likewise.
2158 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Likewise.
2159 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Likewise.
2160 (aarch64_fml<f16mac1>l_laneq_highv2sf): Likewise.
2161 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Likewise.
2162 (aarch64_fml<f16mac1>lq_lane_highv4sf): Likewise.
2164 2018-01-11 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2166 PR target/83514
2167 * config/arm/arm.c (arm_declare_function_name): Set arch_to_print if
2168 targ_options->x_arm_arch_string is non NULL.
2170 2018-01-11 Tamar Christina <tamar.christina@arm.com>
2172 * config/aarch64/aarch64.h
2173 (AARCH64_FL_FOR_ARCH8_4): Add AARCH64_FL_DOTPROD.
2175 2018-01-11 Sudakshina Das <sudi.das@arm.com>
2177 PR target/82096
2178 * expmed.c (emit_store_flag_force): Swap if const op0
2179 and change VOIDmode to mode of op0.
2181 2018-01-11 Richard Sandiford <richard.sandiford@linaro.org>
2183 PR rtl-optimization/83761
2184 * caller-save.c (replace_reg_with_saved_mem): Pass bits rather
2185 than bytes to mode_for_size.
2187 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2189 PR middle-end/83189
2190 * gfortran.fortran-torture/compile/pr83189.f90: New testcase.
2191 * tree-ssa-loop-manip.c (tree_transform_and_unroll_loop): Handle zero
2192 profile.
2194 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2196 PR middle-end/83575
2197 * cfgrtl.c (rtl_verify_edges): Only verify fixability of partition
2198 when in layout mode.
2199 (cfg_layout_finalize): Do not verify cfg before we are out of layout.
2200 * cfgcleanup.c (try_optimize_cfg): Only verify flow info when doing
2201 partition fixup.
2203 2018-01-10 Michael Collison <michael.collison@arm.com>
2205 * config/aarch64/aarch64-modes.def (V2HF): New VECTOR_MODE.
2206 * config/aarch64/aarch64-option-extension.def: Add
2207 AARCH64_OPT_EXTENSION of 'fp16fml'.
2208 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2209 (__ARM_FEATURE_FP16_FML): Define if TARGET_F16FML is true.
2210 * config/aarch64/predicates.md (aarch64_lane_imm3): New predicate.
2211 * config/aarch64/constraints.md (Ui7): New constraint.
2212 * config/aarch64/iterators.md (VFMLA_W): New mode iterator.
2213 (VFMLA_SEL_W): Ditto.
2214 (f16quad): Ditto.
2215 (f16mac1): Ditto.
2216 (VFMLA16_LOW): New int iterator.
2217 (VFMLA16_HIGH): Ditto.
2218 (UNSPEC_FMLAL): New unspec.
2219 (UNSPEC_FMLSL): Ditto.
2220 (UNSPEC_FMLAL2): Ditto.
2221 (UNSPEC_FMLSL2): Ditto.
2222 (f16mac): New code attribute.
2223 * config/aarch64/aarch64-simd-builtins.def
2224 (aarch64_fmlal_lowv2sf): Ditto.
2225 (aarch64_fmlsl_lowv2sf): Ditto.
2226 (aarch64_fmlalq_lowv4sf): Ditto.
2227 (aarch64_fmlslq_lowv4sf): Ditto.
2228 (aarch64_fmlal_highv2sf): Ditto.
2229 (aarch64_fmlsl_highv2sf): Ditto.
2230 (aarch64_fmlalq_highv4sf): Ditto.
2231 (aarch64_fmlslq_highv4sf): Ditto.
2232 (aarch64_fmlal_lane_lowv2sf): Ditto.
2233 (aarch64_fmlsl_lane_lowv2sf): Ditto.
2234 (aarch64_fmlal_laneq_lowv2sf): Ditto.
2235 (aarch64_fmlsl_laneq_lowv2sf): Ditto.
2236 (aarch64_fmlalq_lane_lowv4sf): Ditto.
2237 (aarch64_fmlsl_lane_lowv4sf): Ditto.
2238 (aarch64_fmlalq_laneq_lowv4sf): Ditto.
2239 (aarch64_fmlsl_laneq_lowv4sf): Ditto.
2240 (aarch64_fmlal_lane_highv2sf): Ditto.
2241 (aarch64_fmlsl_lane_highv2sf): Ditto.
2242 (aarch64_fmlal_laneq_highv2sf): Ditto.
2243 (aarch64_fmlsl_laneq_highv2sf): Ditto.
2244 (aarch64_fmlalq_lane_highv4sf): Ditto.
2245 (aarch64_fmlsl_lane_highv4sf): Ditto.
2246 (aarch64_fmlalq_laneq_highv4sf): Ditto.
2247 (aarch64_fmlsl_laneq_highv4sf): Ditto.
2248 * config/aarch64/aarch64-simd.md:
2249 (aarch64_fml<f16mac1>l<f16quad>_low<mode>): New pattern.
2250 (aarch64_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2251 (aarch64_simd_fml<f16mac1>l<f16quad>_low<mode>): Ditto.
2252 (aarch64_simd_fml<f16mac1>l<f16quad>_high<mode>): Ditto.
2253 (aarch64_fml<f16mac1>l_lane_lowv2sf): Ditto.
2254 (aarch64_fml<f16mac1>l_lane_highv2sf): Ditto.
2255 (aarch64_simd_fml<f16mac>l_lane_lowv2sf): Ditto.
2256 (aarch64_simd_fml<f16mac>l_lane_highv2sf): Ditto.
2257 (aarch64_fml<f16mac1>lq_laneq_lowv4sf): Ditto.
2258 (aarch64_fml<f16mac1>lq_laneq_highv4sf): Ditto.
2259 (aarch64_simd_fml<f16mac>lq_laneq_lowv4sf): Ditto.
2260 (aarch64_simd_fml<f16mac>lq_laneq_highv4sf): Ditto.
2261 (aarch64_fml<f16mac1>l_laneq_lowv2sf): Ditto.
2262 (aarch64_fml<f16mac1>l_laneq_highv2sf): Ditto.
2263 (aarch64_simd_fml<f16mac>l_laneq_lowv2sf): Ditto.
2264 (aarch64_simd_fml<f16mac>l_laneq_highv2sf): Ditto.
2265 (aarch64_fml<f16mac1>lq_lane_lowv4sf): Ditto.
2266 (aarch64_fml<f16mac1>lq_lane_highv4sf): Ditto.
2267 (aarch64_simd_fml<f16mac>lq_lane_lowv4sf): Ditto.
2268 (aarch64_simd_fml<f16mac>lq_lane_highv4sf): Ditto.
2269 * config/aarch64/arm_neon.h (vfmlal_low_u32): New intrinsic.
2270 (vfmlsl_low_u32): Ditto.
2271 (vfmlalq_low_u32): Ditto.
2272 (vfmlslq_low_u32): Ditto.
2273 (vfmlal_high_u32): Ditto.
2274 (vfmlsl_high_u32): Ditto.
2275 (vfmlalq_high_u32): Ditto.
2276 (vfmlslq_high_u32): Ditto.
2277 (vfmlal_lane_low_u32): Ditto.
2278 (vfmlsl_lane_low_u32): Ditto.
2279 (vfmlal_laneq_low_u32): Ditto.
2280 (vfmlsl_laneq_low_u32): Ditto.
2281 (vfmlalq_lane_low_u32): Ditto.
2282 (vfmlslq_lane_low_u32): Ditto.
2283 (vfmlalq_laneq_low_u32): Ditto.
2284 (vfmlslq_laneq_low_u32): Ditto.
2285 (vfmlal_lane_high_u32): Ditto.
2286 (vfmlsl_lane_high_u32): Ditto.
2287 (vfmlal_laneq_high_u32): Ditto.
2288 (vfmlsl_laneq_high_u32): Ditto.
2289 (vfmlalq_lane_high_u32): Ditto.
2290 (vfmlslq_lane_high_u32): Ditto.
2291 (vfmlalq_laneq_high_u32): Ditto.
2292 (vfmlslq_laneq_high_u32): Ditto.
2293 * config/aarch64/aarch64.h (AARCH64_FL_F16SML): New flag.
2294 (AARCH64_FL_FOR_ARCH8_4): New.
2295 (AARCH64_ISA_F16FML): New ISA flag.
2296 (TARGET_F16FML): New feature flag for fp16fml.
2297 (doc/invoke.texi): Document new fp16fml option.
2299 2018-01-10 Michael Collison <michael.collison@arm.com>
2301 * config/aarch64/aarch64-builtins.c:
2302 (aarch64_types_ternopu_imm_qualifiers, TYPES_TERNOPUI): New.
2303 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2304 (__ARM_FEATURE_SHA3): Define if TARGET_SHA3 is true.
2305 * config/aarch64/aarch64.h (AARCH64_FL_SHA3): New flags.
2306 (AARCH64_ISA_SHA3): New ISA flag.
2307 (TARGET_SHA3): New feature flag for sha3.
2308 * config/aarch64/iterators.md (sha512_op): New int attribute.
2309 (CRYPTO_SHA512): New int iterator.
2310 (UNSPEC_SHA512H): New unspec.
2311 (UNSPEC_SHA512H2): Ditto.
2312 (UNSPEC_SHA512SU0): Ditto.
2313 (UNSPEC_SHA512SU1): Ditto.
2314 * config/aarch64/aarch64-simd-builtins.def
2315 (aarch64_crypto_sha512hqv2di): New builtin.
2316 (aarch64_crypto_sha512h2qv2di): Ditto.
2317 (aarch64_crypto_sha512su0qv2di): Ditto.
2318 (aarch64_crypto_sha512su1qv2di): Ditto.
2319 (aarch64_eor3qv8hi): Ditto.
2320 (aarch64_rax1qv2di): Ditto.
2321 (aarch64_xarqv2di): Ditto.
2322 (aarch64_bcaxqv8hi): Ditto.
2323 * config/aarch64/aarch64-simd.md:
2324 (aarch64_crypto_sha512h<sha512_op>qv2di): New pattern.
2325 (aarch64_crypto_sha512su0qv2di): Ditto.
2326 (aarch64_crypto_sha512su1qv2di): Ditto.
2327 (aarch64_eor3qv8hi): Ditto.
2328 (aarch64_rax1qv2di): Ditto.
2329 (aarch64_xarqv2di): Ditto.
2330 (aarch64_bcaxqv8hi): Ditto.
2331 * config/aarch64/arm_neon.h (vsha512hq_u64): New intrinsic.
2332 (vsha512h2q_u64): Ditto.
2333 (vsha512su0q_u64): Ditto.
2334 (vsha512su1q_u64): Ditto.
2335 (veor3q_u16): Ditto.
2336 (vrax1q_u64): Ditto.
2337 (vxarq_u64): Ditto.
2338 (vbcaxq_u16): Ditto.
2339 * config/arm/types.md (crypto_sha512): New type attribute.
2340 (crypto_sha3): Ditto.
2341 (doc/invoke.texi): Document new sha3 option.
2343 2018-01-10 Michael Collison <michael.collison@arm.com>
2345 * config/aarch64/aarch64-builtins.c:
2346 (aarch64_types_quadopu_imm_qualifiers, TYPES_QUADOPUI): New.
2347 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2348 (__ARM_FEATURE_SM3): Define if TARGET_SM4 is true.
2349 (__ARM_FEATURE_SM4): Define if TARGET_SM4 is true.
2350 * config/aarch64/aarch64.h (AARCH64_FL_SM4): New flags.
2351 (AARCH64_ISA_SM4): New ISA flag.
2352 (TARGET_SM4): New feature flag for sm4.
2353 * config/aarch64/aarch64-simd-builtins.def
2354 (aarch64_sm3ss1qv4si): Ditto.
2355 (aarch64_sm3tt1aq4si): Ditto.
2356 (aarch64_sm3tt1bq4si): Ditto.
2357 (aarch64_sm3tt2aq4si): Ditto.
2358 (aarch64_sm3tt2bq4si): Ditto.
2359 (aarch64_sm3partw1qv4si): Ditto.
2360 (aarch64_sm3partw2qv4si): Ditto.
2361 (aarch64_sm4eqv4si): Ditto.
2362 (aarch64_sm4ekeyqv4si): Ditto.
2363 * config/aarch64/aarch64-simd.md:
2364 (aarch64_sm3ss1qv4si): Ditto.
2365 (aarch64_sm3tt<sm3tt_op>qv4si): Ditto.
2366 (aarch64_sm3partw<sm3part_op>qv4si): Ditto.
2367 (aarch64_sm4eqv4si): Ditto.
2368 (aarch64_sm4ekeyqv4si): Ditto.
2369 * config/aarch64/iterators.md (sm3tt_op): New int iterator.
2370 (sm3part_op): Ditto.
2371 (CRYPTO_SM3TT): Ditto.
2372 (CRYPTO_SM3PART): Ditto.
2373 (UNSPEC_SM3SS1): New unspec.
2374 (UNSPEC_SM3TT1A): Ditto.
2375 (UNSPEC_SM3TT1B): Ditto.
2376 (UNSPEC_SM3TT2A): Ditto.
2377 (UNSPEC_SM3TT2B): Ditto.
2378 (UNSPEC_SM3PARTW1): Ditto.
2379 (UNSPEC_SM3PARTW2): Ditto.
2380 (UNSPEC_SM4E): Ditto.
2381 (UNSPEC_SM4EKEY): Ditto.
2382 * config/aarch64/constraints.md (Ui2): New constraint.
2383 * config/aarch64/predicates.md (aarch64_imm2): New predicate.
2384 * config/arm/types.md (crypto_sm3): New type attribute.
2385 (crypto_sm4): Ditto.
2386 * config/aarch64/arm_neon.h (vsm3ss1q_u32): New intrinsic.
2387 (vsm3tt1aq_u32): Ditto.
2388 (vsm3tt1bq_u32): Ditto.
2389 (vsm3tt2aq_u32): Ditto.
2390 (vsm3tt2bq_u32): Ditto.
2391 (vsm3partw1q_u32): Ditto.
2392 (vsm3partw2q_u32): Ditto.
2393 (vsm4eq_u32): Ditto.
2394 (vsm4ekeyq_u32): Ditto.
2395 (doc/invoke.texi): Document new sm4 option.
2397 2018-01-10 Michael Collison <michael.collison@arm.com>
2399 * config/aarch64/aarch64-arches.def (armv8.4-a): New architecture.
2400 * config/aarch64/aarch64.h (AARCH64_ISA_V8_4): New ISA flag.
2401 (AARCH64_FL_FOR_ARCH8_4): New.
2402 (AARCH64_FL_V8_4): New flag.
2403 (doc/invoke.texi): Document new armv8.4-a option.
2405 2018-01-10 Michael Collison <michael.collison@arm.com>
2407 * config/aarch64/aarch64-c.c (aarch64_update_cpp_builtins):
2408 (__ARM_FEATURE_AES): Define if TARGET_AES is true.
2409 (__ARM_FEATURE_SHA2): Define if TARGET_SHA2 is true.
2410 * config/aarch64/aarch64-option-extension.def: Add
2411 AARCH64_OPT_EXTENSION of 'sha2'.
2412 (aes): Add AARCH64_OPT_EXTENSION of 'aes'.
2413 (crypto): Disable sha2 and aes if crypto disabled.
2414 (crypto): Enable aes and sha2 if enabled.
2415 (simd): Disable sha2 and aes if simd disabled.
2416 * config/aarch64/aarch64.h (AARCH64_FL_AES, AARCH64_FL_SHA2):
2417 New flags.
2418 (AARCH64_ISA_AES, AARCH64_ISA_SHA2): New ISA flags.
2419 (TARGET_SHA2): New feature flag for sha2.
2420 (TARGET_AES): New feature flag for aes.
2421 * config/aarch64/aarch64-simd.md:
2422 (aarch64_crypto_aes<aes_op>v16qi): Make pattern
2423 conditional on TARGET_AES.
2424 (aarch64_crypto_aes<aesmc_op>v16qi): Ditto.
2425 (aarch64_crypto_sha1hsi): Make pattern conditional
2426 on TARGET_SHA2.
2427 (aarch64_crypto_sha1hv4si): Ditto.
2428 (aarch64_be_crypto_sha1hv4si): Ditto.
2429 (aarch64_crypto_sha1su1v4si): Ditto.
2430 (aarch64_crypto_sha1<sha1_op>v4si): Ditto.
2431 (aarch64_crypto_sha1su0v4si): Ditto.
2432 (aarch64_crypto_sha256h<sha256_op>v4si): Ditto.
2433 (aarch64_crypto_sha256su0v4si): Ditto.
2434 (aarch64_crypto_sha256su1v4si): Ditto.
2435 (doc/invoke.texi): Document new aes and sha2 options.
2437 2018-01-10 Martin Sebor <msebor@redhat.com>
2439 PR tree-optimization/83781
2440 * gimple-fold.c (get_range_strlen): Avoid treating arrays of pointers
2441 as string arrays.
2443 2018-01-11 Martin Sebor <msebor@gmail.com>
2444 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
2446 PR tree-optimization/83501
2447 PR tree-optimization/81703
2449 * tree-ssa-strlen.c (get_string_cst): Rename...
2450 (get_string_len): ...to this. Handle global constants.
2451 (handle_char_store): Adjust.
2453 2018-01-10 Kito Cheng <kito.cheng@gmail.com>
2454 Jim Wilson <jimw@sifive.com>
2456 * config/riscv/riscv-protos.h (riscv_output_return): New.
2457 * config/riscv/riscv.c (struct machine_function): New naked_p field.
2458 (riscv_attribute_table, riscv_output_return),
2459 (riscv_handle_fndecl_attribute, riscv_naked_function_p),
2460 (riscv_allocate_stack_slots_for_args, riscv_warn_func_return): New.
2461 (riscv_compute_frame_info): Only compute frame->mask if not a naked
2462 function.
2463 (riscv_expand_prologue): Add early return for naked function.
2464 (riscv_expand_epilogue): Likewise.
2465 (riscv_function_ok_for_sibcall): Return false for naked function.
2466 (riscv_set_current_function): New.
2467 (TARGET_SET_CURRENT_FUNCTION, TARGET_ALLOCATE_STACK_SLOTS_FOR_ARGS),
2468 (TARGET_ATTRIBUTE_TABLE, TARGET_WARN_FUNC_RETURN): New.
2469 * config/riscv/riscv.md (simple_return): Call riscv_output_return.
2470 * doc/extend.texi (RISC-V Function Attributes): New.
2472 2018-01-10 Michael Meissner <meissner@linux.vnet.ibm.com>
2474 * config/rs6000/rs6000.c (is_complex_IBM_long_double): Explicitly
2475 check for 128-bit long double before checking TCmode.
2476 * config/rs6000/rs6000.h (FLOAT128_IEEE_P): Explicitly check for
2477 128-bit long doubles before checking TFmode or TCmode.
2478 (FLOAT128_IBM_P): Likewise.
2480 2018-01-10 Martin Sebor <msebor@redhat.com>
2482 PR tree-optimization/83671
2483 * builtins.c (c_strlen): Unconditionally return zero for the empty
2484 string.
2485 Use -Warray-bounds for warnings.
2486 * gimple-fold.c (get_range_strlen): Handle non-constant lengths
2487 for non-constant array indices with COMPONENT_REF, arrays of
2488 arrays, and pointers to arrays.
2489 (gimple_fold_builtin_strlen): Determine and set length range for
2490 non-constant character arrays.
2492 2018-01-10 Aldy Hernandez <aldyh@redhat.com>
2494 PR middle-end/81897
2495 * tree-ssa-uninit.c (convert_control_dep_chain_into_preds): Skip
2496 empty blocks.
2498 2018-01-10 Eric Botcazou <ebotcazou@adacore.com>
2500 * dwarf2out.c (dwarf2out_var_location): Do not pass NULL to fprintf.
2502 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2504 PR target/83399
2505 * config/rs6000/rs6000.c (print_operand) <'y'>: Use
2506 VECTOR_MEM_ALTIVEC_OR_VSX_P.
2507 * config/rs6000/vsx.md (*vsx_le_perm_load_<mode> for VSX_D): Use
2508 indexed_or_indirect_operand predicate.
2509 (*vsx_le_perm_load_<mode> for VSX_W): Likewise.
2510 (*vsx_le_perm_load_v8hi): Likewise.
2511 (*vsx_le_perm_load_v16qi): Likewise.
2512 (*vsx_le_perm_store_<mode> for VSX_D): Likewise.
2513 (*vsx_le_perm_store_<mode> for VSX_W): Likewise.
2514 (*vsx_le_perm_store_v8hi): Likewise.
2515 (*vsx_le_perm_store_v16qi): Likewise.
2516 (eight unnamed splitters): Likewise.
2518 2018-01-10 Peter Bergner <bergner@vnet.ibm.com>
2520 * config/rs6000/x86intrin.h: Change #warning to #error. Update message.
2521 * config/rs6000/emmintrin.h: Likewise.
2522 * config/rs6000/mmintrin.h: Likewise.
2523 * config/rs6000/xmmintrin.h: Likewise.
2525 2018-01-10 David Malcolm <dmalcolm@redhat.com>
2527 PR c++/43486
2528 * tree-core.h: Document EXPR_LOCATION_WRAPPER_P's usage of
2529 "public_flag".
2530 * tree.c (tree_nop_conversion): Return true for location wrapper
2531 nodes.
2532 (maybe_wrap_with_location): New function.
2533 (selftest::check_strip_nops): New function.
2534 (selftest::test_location_wrappers): New function.
2535 (selftest::tree_c_tests): Call it.
2536 * tree.h (STRIP_ANY_LOCATION_WRAPPER): New macro.
2537 (maybe_wrap_with_location): New decl.
2538 (EXPR_LOCATION_WRAPPER_P): New macro.
2539 (location_wrapper_p): New inline function.
2540 (tree_strip_any_location_wrapper): New inline function.
2542 2018-01-10 H.J. Lu <hongjiu.lu@intel.com>
2544 PR target/83735
2545 * config/i386/i386.c (ix86_compute_frame_layout): Always adjust
2546 stack_realign_offset for the largest alignment of stack slot
2547 actually used.
2548 (ix86_find_max_used_stack_alignment): New function.
2549 (ix86_finalize_stack_frame_flags): Use it. Set
2550 max_used_stack_alignment if we don't realign stack.
2551 * config/i386/i386.h (machine_function): Add
2552 max_used_stack_alignment.
2554 2018-01-10 Christophe Lyon <christophe.lyon@linaro.org>
2556 * config/arm/arm.opt (-mbranch-cost): New option.
2557 * config/arm/arm.h (BRANCH_COST): Take arm_branch_cost into
2558 account.
2560 2018-01-10 Segher Boessenkool <segher@kernel.crashing.org>
2562 PR target/83629
2563 * config/rs6000/rs6000.md (load_toc_v4_PIC_2, load_toc_v4_PIC_3b,
2564 load_toc_v4_PIC_3c): Wrap const term in CONST RTL.
2566 2018-01-10 Richard Biener <rguenther@suse.de>
2568 PR debug/83765
2569 * dwarf2out.c (gen_subprogram_die): Hoist old_die && declaration
2570 early out so it also covers the case where we have a non-NULL
2571 origin.
2573 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2575 PR tree-optimization/83753
2576 * tree-vect-stmts.c (get_group_load_store_type): Use VMAT_CONTIGUOUS
2577 for non-strided grouped accesses if the number of elements is 1.
2579 2018-01-10 Jan Hubicka <hubicka@ucw.cz>
2581 PR target/81616
2582 * i386.c (ix86_vectorize_builtin_gather): Check TARGET_USE_GATHER.
2583 * i386.h (TARGET_USE_GATHER): Define.
2584 * x86-tune.def (X86_TUNE_USE_GATHER): New.
2586 2018-01-10 Martin Liska <mliska@suse.cz>
2588 PR bootstrap/82831
2589 * basic-block.h (CLEANUP_NO_PARTITIONING): New define.
2590 * bb-reorder.c (pass_reorder_blocks::execute): Do not clean up
2591 partitioning.
2592 * cfgcleanup.c (try_optimize_cfg): Fix up partitioning if
2593 CLEANUP_NO_PARTITIONING is not set.
2595 2018-01-10 Richard Sandiford <richard.sandiford@linaro.org>
2597 * doc/rtl.texi: Remove documentation of (const ...) wrappers
2598 for vectors, as a partial revert of r254296.
2599 * rtl.h (const_vec_p): Delete.
2600 (const_vec_duplicate_p): Don't test for vector CONSTs.
2601 (unwrap_const_vec_duplicate, const_vec_series_p): Likewise.
2602 * expmed.c (make_tree): Likewise.
2604 Revert:
2605 * common.md (E, F): Use CONSTANT_P instead of checking for
2606 CONST_VECTOR.
2607 * emit-rtl.c (gen_lowpart_common): Use const_vec_p instead of
2608 checking for CONST_VECTOR.
2610 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2612 PR middle-end/83575
2613 * predict.c (force_edge_cold): Handle in more sane way edges
2614 with no prediction.
2616 2018-01-09 Carl Love <cel@us.ibm.com>
2618 * config/rs6002/altivec.md (p8_vmrgow): Add support for V2DI, V2DF,
2619 V4SI, V4SF types.
2620 (p8_vmrgew): Add support for V2DI, V2DF, V4SF types.
2621 * config/rs6000/rs6000-builtin.def: Add definitions for FLOAT2_V2DF,
2622 VMRGEW_V2DI, VMRGEW_V2DF, VMRGEW_V4SF, VMRGOW_V4SI, VMRGOW_V4SF,
2623 VMRGOW_V2DI, VMRGOW_V2DF. Remove definition for VMRGOW.
2624 * config/rs6000/rs6000-c.c (VSX_BUILTIN_VEC_FLOAT2,
2625 P8V_BUILTIN_VEC_VMRGEW, P8V_BUILTIN_VEC_VMRGOW): Add definitions.
2626 * config/rs6000/rs6000-protos.h: Add extern defition for
2627 rs6000_generate_float2_double_code.
2628 * config/rs6000/rs6000.c (rs6000_generate_float2_double_code): Add
2629 function.
2630 * config/rs6000/vsx.md (vsx_xvcdpsp): Add define_insn.
2631 (float2_v2df): Add define_expand.
2633 2018-01-09 Uros Bizjak <ubizjak@gmail.com>
2635 PR target/83628
2636 * combine.c (force_int_to_mode) <case ASHIFT>: Use mode instead of
2637 op_mode in the force_to_mode call.
2639 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2641 * config/aarch64/aarch64.c (aarch64_evpc_trn): Use d.perm.series_p
2642 instead of checking each element individually.
2643 (aarch64_evpc_uzp): Likewise.
2644 (aarch64_evpc_zip): Likewise.
2645 (aarch64_evpc_ext): Likewise.
2646 (aarch64_evpc_rev): Likewise.
2647 (aarch64_evpc_dup): Test the encoding for a single duplicated element,
2648 instead of checking each element individually. Return true without
2649 generating rtl if
2650 (aarch64_vectorize_vec_perm_const): Use all_from_input_p to test
2651 whether all selected elements come from the same input, instead of
2652 checking each element individually. Remove calls to gen_rtx_REG,
2653 start_sequence and end_sequence and instead assert that no rtl is
2654 generated.
2656 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2658 * config/aarch64/aarch64.c (aarch64_legitimate_constant_p): Fix
2659 order of HIGH and CONST checks.
2661 2018-01-09 Richard Sandiford <richard.sandiford@linaro.org>
2663 * tree-vect-stmts.c (permute_vec_elements): Create a fresh variable
2664 if the destination isn't an SSA_NAME.
2666 2018-01-09 Richard Biener <rguenther@suse.de>
2668 PR tree-optimization/83668
2669 * graphite.c (canonicalize_loop_closed_ssa): Add edge argument,
2670 move prologue...
2671 (canonicalize_loop_form): ... here, renamed from ...
2672 (canonicalize_loop_closed_ssa_form): ... this and amended to
2673 swap successor edges for loop exit blocks to make us use
2674 the RPO order we need for initial schedule generation.
2676 2018-01-09 Joseph Myers <joseph@codesourcery.com>
2678 PR tree-optimization/64811
2679 * match.pd: When optimizing comparisons with Inf, avoid
2680 introducing or losing exceptions from comparisons with NaN.
2682 2018-01-09 Martin Liska <mliska@suse.cz>
2684 PR sanitizer/82517
2685 * asan.c (shadow_mem_size): Add gcc_assert.
2687 2018-01-09 Georg-Johann Lay <avr@gjlay.de>
2689 Don't save registers in main().
2691 PR target/83738
2692 * doc/invoke.texi (AVR Options) [-mmain-is-OS_task]: Document it.
2693 * config/avr/avr.opt (-mmain-is-OS_task): New target option.
2694 * config/avr/avr.c (avr_set_current_function): Don't error if
2695 naked, OS_task or OS_main are specified at the same time.
2696 (avr_function_ok_for_sibcall): Don't disable sibcalls for OS_task,
2697 OS_main.
2698 (avr_insert_attributes) [-mmain-is-OS_task] <main>: Add OS_task
2699 attribute.
2700 * common/config/avr/avr-common.c (avr_option_optimization_table):
2701 Switch on -mmain-is-OS_task for optimizing compilations.
2703 2018-01-09 Richard Biener <rguenther@suse.de>
2705 PR tree-optimization/83572
2706 * graphite.c: Include cfganal.h.
2707 (graphite_transform_loops): Connect infinite loops to exit
2708 and remove fake edges at the end.
2710 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2712 * ipa-inline.c (edge_badness): Revert accidental checkin.
2714 2018-01-09 Jan Hubicka <hubicka@ucw.cz>
2716 PR ipa/80763
2717 * ipa-comdats.c (set_comdat_group): Only set comdat group of real
2718 symbols; not inline clones.
2720 2018-01-09 Jakub Jelinek <jakub@redhat.com>
2722 PR target/83507
2723 * modulo-sched.c (schedule_reg_moves): Punt if we'd need to move
2724 hard registers. Formatting fixes.
2726 PR preprocessor/83722
2727 * gcc.c (try_generate_repro): Pass
2728 &temp_stderr_files[RETRY_ICE_ATTEMPTS - 1] rather than
2729 &temp_stdout_files[RETRY_ICE_ATTEMPTS - 1] as last argument to
2730 do_report_bug.
2732 2018-01-08 Monk Chiang <sh.chiang04@gmail.com>
2733 Kito Cheng <kito.cheng@gmail.com>
2735 * config/riscv/riscv.c (machine_function::is_leaf): Remove field.
2736 (riscv_leaf_function_p): Delete.
2737 (riscv_function_ok_for_sibcall): Return false when TARGET_SAVE_RESTORE.
2739 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2741 * config/rs6000/rs6000-string.c (do_load_for_compare_from_addr): New
2742 function.
2743 (do_ifelse): New function.
2744 (do_isel): New function.
2745 (do_sub3): New function.
2746 (do_add3): New function.
2747 (do_load_mask_compare): New function.
2748 (do_overlap_load_compare): New function.
2749 (expand_compare_loop): New function.
2750 (expand_block_compare): Call expand_compare_loop() when appropriate.
2751 * config/rs6000/rs6000.opt (-mblock-compare-inline-limit): Change
2752 option description.
2753 (-mblock-compare-inline-loop-limit): New option.
2755 2018-01-08 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
2757 PR target/83677
2758 * config/rs6000/altivec.md (*altivec_vpermr_<mode>_internal):
2759 Reverse order of second and third operands in first alternative.
2760 * config/rs6000/rs6000.c (rs6000_expand_vector_set): Reverse order
2761 of first and second elements in UNSPEC_VPERMR vector.
2762 (altivec_expand_vec_perm_le): Likewise.
2764 2017-01-08 Jeff Law <law@redhat.com>
2766 PR rtl-optimizatin/81308
2767 * tree-switch-conversion.c (cfg_altered): New file scoped static.
2768 (process_switch): If group_case_labels makes a change, then set
2769 cfg_altered.
2770 (pass_convert_switch::execute): If a switch is converted, then
2771 set cfg_altered. Return TODO_cfg_cleanup if cfg_altered is true.
2773 PR rtl-optimization/81308
2774 * recog.c (split_all_insns): Conditionally cleanup the CFG after
2775 splitting insns.
2777 2018-01-08 Vidya Praveen <vidyapraveen@arm.com>
2779 PR target/83663 - Revert r255946
2780 * config/aarch64/aarch64.c (aarch64_expand_vector_init): Modify code
2781 generation for cases where splatting a value is not useful.
2782 * simplify-rtx.c (simplify_ternary_operation): Simplify vec_merge
2783 across a vec_duplicate and a paradoxical subreg forming a vector
2784 mode to a vec_concat.
2786 2018-01-08 Kyrylo Tkachov <kyrylo.tkachov@arm.com>
2788 * config/arm/t-aprofile (MULTILIB_MATCHES): Add mapping rules for
2789 -march=armv8.3-a variants.
2790 * config/arm/t-multilib: Likewise.
2791 * config/arm/t-arm-elf: Likewise. Handle dotprod extension.
2793 2018-01-08 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
2795 * config/rs6000/rs6000.md (cceq_ior_compare): Remove * so I can use it
2796 to generate rtl.
2797 (cceq_ior_compare_complement): Give it a name so I can use it, and
2798 change boolean_or_operator predicate to boolean_operator so it can
2799 be used to generate a crand.
2800 (eqne): New code iterator.
2801 (bd/bd_neg): New code_attrs.
2802 (<bd>_<mode>): New name for ctr<mode>_internal[12] now combined into
2803 a single define_insn.
2804 (<bd>tf_<mode>): A new insn pattern for the conditional form branch
2805 decrement (bdnzt/bdnzf/bdzt/bdzf).
2806 * config/rs6000/rs6000.c (rs6000_legitimate_combined_insn): Updated
2807 with the new names of the branch decrement patterns, and added the
2808 names of the branch decrement conditional patterns.
2810 2018-01-08 Richard Biener <rguenther@suse.de>
2812 PR tree-optimization/83563
2813 * graphite.c (canonicalize_loop_closed_ssa_form): Reset the SCEV
2814 cache.
2816 2018-01-08 Richard Biener <rguenther@suse.de>
2818 PR middle-end/83713
2819 * convert.c (do_narrow): Properly guard TYPE_OVERFLOW_WRAPS checks.
2821 2018-01-08 Richard Biener <rguenther@suse.de>
2823 PR tree-optimization/83685
2824 * tree-ssa-pre.c (create_expression_by_pieces): Do not insert
2825 references to abnormals.
2827 2018-01-08 Richard Biener <rguenther@suse.de>
2829 PR lto/83719
2830 * dwarf2out.c (output_indirect_strings): Handle empty
2831 skeleton_debug_str_hash.
2832 (dwarf2out_early_finish): Index strings for -gsplit-dwarf.
2834 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2836 * config/arc/arc.c (TARGET_TRAMPOLINE_ADJUST_ADDRESS): Delete.
2837 (emit_store_direct): Likewise.
2838 (arc_trampoline_adjust_address): Likewise.
2839 (arc_asm_trampoline_template): New function.
2840 (arc_initialize_trampoline): Use asm_trampoline_template.
2841 (TARGET_ASM_TRAMPOLINE_TEMPLATE): Define.
2842 * config/arc/arc.h (TRAMPOLINE_SIZE): Adjust to 16.
2843 * config/arc/arc.md (flush_icache): Delete pattern.
2845 2018-01-08 Claudiu Zissulescu <claziss@synopsys.com>
2847 * config/arc/arc-c.def (__ARC_UNALIGNED__): New define.
2848 * config/arc/arc.h (STRICT_ALIGNMENT): Control this macro using
2849 munaligned-access.
2851 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2853 PR target/83681
2854 * config/epiphany/epiphany.h (make_pass_mode_switch_use): Guard
2855 by not USED_FOR_TARGET.
2856 (make_pass_resolve_sw_modes): Likewise.
2858 2018-01-08 Sebastian Huber <sebastian.huber@embedded-brains.de>
2860 * config/nios2/nios2.h (nios2_section_threshold): Guard by not
2861 USED_FOR_TARGET.
2863 2018-01-08 Richard Biener <rguenther@suse.de>
2865 PR middle-end/83580
2866 * tree-data-ref.c (split_constant_offset): Remove STRIP_NOPS.
2868 2018-01-08 Richard Biener <rguenther@suse.de>
2870 PR middle-end/83517
2871 * match.pd ((t * 2) / 2) -> t): Add missing :c.
2873 2018-01-06 Aldy Hernandez <aldyh@redhat.com>
2875 PR middle-end/81897
2876 * tree-ssa-uninit.c (compute_control_dep_chain): Do not bail on
2877 basic blocks with a small number of successors.
2878 (convert_control_dep_chain_into_preds): Improve handling of
2879 forwarder blocks.
2880 (dump_predicates): Split apart into...
2881 (dump_pred_chain): ...here...
2882 (dump_pred_info): ...and here.
2883 (can_one_predicate_be_invalidated_p): Add debugging printfs.
2884 (can_chain_union_be_invalidated_p): Improve check for invalidation
2885 of paths.
2886 (uninit_uses_cannot_happen): Avoid unnecessary if
2887 convert_control_dep_chain_into_preds yielded nothing.
2889 2018-01-06 Martin Sebor <msebor@redhat.com>
2891 PR tree-optimization/83640
2892 * gimple-ssa-warn-restrict.c (builtin_access::builtin_access): Avoid
2893 subtracting negative offset from size.
2894 (builtin_access::overlap): Adjust offset bounds of the access to fall
2895 within the size of the object if possible.
2897 2018-01-06 Richard Sandiford <richard.sandiford@linaro.org>
2899 PR rtl-optimization/83699
2900 * expmed.c (extract_bit_field_1): Restrict the vector usage of
2901 extract_bit_field_as_subreg to cases in which the extracted
2902 value is also a vector.
2904 * lra-constraints.c (process_alt_operands): Test for the equivalence
2905 substitutions when detecting a possible reload cycle.
2907 2018-01-06 Jakub Jelinek <jakub@redhat.com>
2909 PR debug/83480
2910 * toplev.c (process_options): Don't enable debug_nonbind_markers_p
2911 by default if flag_selective_schedling{,2}. Formatting fixes.
2913 PR rtl-optimization/83682
2914 * rtl.h (const_vec_duplicate_p): Only return true for VEC_DUPLICATE
2915 if it has non-VECTOR_MODE element mode.
2916 (vec_duplicate_p): Likewise.
2918 PR middle-end/83694
2919 * cfgexpand.c (expand_debug_expr): Punt if mode1 is VOIDmode
2920 and bitsize might be greater than MAX_BITSIZE_MODE_ANY_INT.
2922 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2924 PR target/83604
2925 * config/i386/i386-builtin.def
2926 (__builtin_ia32_vgf2p8affineinvqb_v64qi,
2927 __builtin_ia32_vgf2p8affineqb_v64qi, __builtin_ia32_vgf2p8mulb_v64qi):
2928 Require also OPTION_MASK_ISA_AVX512F in addition to
2929 OPTION_MASK_ISA_GFNI.
2930 (__builtin_ia32_vgf2p8affineinvqb_v16qi_mask,
2931 __builtin_ia32_vgf2p8affineqb_v16qi_mask): Require
2932 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_SSE in addition
2933 to OPTION_MASK_ISA_GFNI.
2934 (__builtin_ia32_vgf2p8mulb_v32qi_mask): Require
2935 OPTION_MASK_ISA_AVX512VL in addition to OPTION_MASK_ISA_GFNI and
2936 OPTION_MASK_ISA_AVX512BW.
2937 (__builtin_ia32_vgf2p8mulb_v16qi_mask): Require
2938 OPTION_MASK_ISA_AVX512VL instead of OPTION_MASK_ISA_AVX512BW in
2939 addition to OPTION_MASK_ISA_GFNI.
2940 (__builtin_ia32_vgf2p8affineinvqb_v16qi,
2941 __builtin_ia32_vgf2p8affineqb_v16qi, __builtin_ia32_vgf2p8mulb_v16qi):
2942 Require OPTION_MASK_ISA_SSE2 instead of OPTION_MASK_ISA_SSE in addition
2943 to OPTION_MASK_ISA_GFNI.
2944 * config/i386/i386.c (def_builtin): Change to builtin isa/isa2 being
2945 a requirement for all ISAs rather than any of them with a few
2946 exceptions.
2947 (ix86_add_new_builtins): Clear OPTION_MASK_ISA_64BIT from isa before
2948 processing.
2949 (ix86_expand_builtin): Require all ISAs from builtin's isa and isa2
2950 bitmasks to be enabled with 3 exceptions, instead of requiring any
2951 enabled ISA with lots of exceptions.
2952 * config/i386/sse.md (vgf2p8affineinvqb_<mode><mask_name>,
2953 vgf2p8affineqb_<mode><mask_name>, vgf2p8mulb_<mode><mask_name>):
2954 Change avx512bw in isa attribute to avx512f.
2955 * config/i386/sgxintrin.h: Add license boilerplate.
2956 * config/i386/vaesintrin.h: Likewise. Fix macro spelling __AVX512F
2957 to __AVX512F__ and __AVX512VL to __AVX512VL__.
2958 (_mm256_aesdec_epi128, _mm256_aesdeclast_epi128, _mm256_aesenc_epi128,
2959 _mm256_aesenclast_epi128): Enable temporarily avx if __AVX__ is not
2960 defined.
2961 * config/i386/gfniintrin.h (_mm_gf2p8mul_epi8,
2962 _mm_gf2p8affineinv_epi64_epi8, _mm_gf2p8affine_epi64_epi8): Enable
2963 temporarily sse2 rather than sse if not enabled already.
2965 PR target/83604
2966 * config/i386/sse.md (VI248_VLBW): Rename to ...
2967 (VI248_AVX512VL): ... this. Don't guard V32HI with TARGET_AVX512BW.
2968 (vpshrd_<mode><mask_name>, vpshld_<mode><mask_name>,
2969 vpshrdv_<mode>, vpshrdv_<mode>_mask, vpshrdv_<mode>_maskz,
2970 vpshrdv_<mode>_maskz_1, vpshldv_<mode>, vpshldv_<mode>_mask,
2971 vpshldv_<mode>_maskz, vpshldv_<mode>_maskz_1): Use VI248_AVX512VL
2972 mode iterator instead of VI248_VLBW.
2974 2018-01-05 Jan Hubicka <hubicka@ucw.cz>
2976 * ipa-fnsummary.c (record_modified_bb_info): Add OP.
2977 (record_modified): Skip clobbers; add debug output.
2978 (param_change_prob): Use sreal frequencies.
2980 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2982 * tree-vect-data-refs.c (vect_compute_data_ref_alignment): Don't
2983 punt for user-aligned variables.
2985 2018-01-05 Richard Sandiford <richard.sandiford@linaro.org>
2987 * tree-chrec.c (chrec_contains_symbols): Return true for
2988 POLY_INT_CST.
2990 2018-01-05 Sudakshina Das <sudi.das@arm.com>
2992 PR target/82439
2993 * simplify-rtx.c (simplify_relational_operation_1): Add simplifications
2994 of (x|y) == x for BICS pattern.
2996 2018-01-05 Jakub Jelinek <jakub@redhat.com>
2998 PR tree-optimization/83605
2999 * gimple-ssa-strength-reduction.c: Include tree-eh.h.
3000 (find_candidates_dom_walker::before_dom_children): Ignore stmts that
3001 can throw.
3003 2018-01-05 Sebastian Huber <sebastian.huber@embedded-brains.de>
3005 * config.gcc (epiphany-*-elf*): Add (epiphany-*-rtems*) configuration.
3006 * config/epiphany/rtems.h: New file.
3008 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3009 Uros Bizjak <ubizjak@gmail.com>
3011 PR target/83554
3012 * config/i386/i386.md (*<rotate_insn>hi3_1 splitter): Use
3013 QIreg_operand instead of register_operand predicate.
3014 * config/i386/i386.c (ix86_rop_should_change_byte_p,
3015 set_rop_modrm_reg_bits, ix86_mitigate_rop): Use -mmitigate-rop in
3016 comments instead of -fmitigate[-_]rop.
3018 2018-01-04 Rainer Orth <ro@CeBiTec.Uni-Bielefeld.DE>
3020 PR bootstrap/81926
3021 * cgraphunit.c (symbol_table::compile): Switch to text_section
3022 before calling assembly_start debug hook.
3023 * run-rtl-passes.c (run_rtl_passes): Likewise.
3024 Include output.h.
3026 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3028 * tree-vrp.c (extract_range_from_binary_expr_1): Check
3029 range_int_cst_p rather than !symbolic_range_p before calling
3030 extract_range_from_multiplicative_op_1.
3032 2017-01-04 Jeff Law <law@redhat.com>
3034 * tree-ssa-math-opts.c (execute_cse_reciprocals_1): Remove
3035 redundant test in assertion.
3037 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3039 * doc/rtl.texi: Document machine_mode wrapper classes.
3041 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3043 * fold-const.c (fold_ternary_loc): Check tree_fits_uhwi_p before
3044 using tree_to_uhwi.
3046 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3048 * tree-ssa-forwprop.c (is_combined_permutation_identity): Allow
3049 the VEC_PERM_EXPR fold to fail.
3051 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3053 PR debug/83585
3054 * bb-reorder.c (insert_section_boundary_note): Set has_bb_partition
3055 to switched_sections.
3057 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3059 PR target/83680
3060 * config/arm/arm.c (arm_vectorize_vec_perm_const): Fix inverted
3061 test for d.testing.
3063 2018-01-04 Peter Bergner <bergner@vnet.ibm.com>
3065 PR target/83387
3066 * config/rs6000/rs6000.c (rs6000_discover_homogeneous_aggregate): Do not
3067 allow arguments in FP registers if TARGET_HARD_FLOAT is false.
3069 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3071 PR debug/83666
3072 * cfgexpand.c (expand_debug_expr) <case BIT_FIELD_REF>: Punt if mode
3073 is BLKmode and bitpos not zero or mode change is needed.
3075 2018-01-04 Richard Sandiford <richard.sandiford@linaro.org>
3077 PR target/83675
3078 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): Require
3079 TARGET_VIS2.
3081 2018-01-04 Uros Bizjak <ubizjak@gmail.com>
3083 PR target/83628
3084 * config/alpha/alpha.md (*sadd<modesuffix>): Use ASHIFT
3085 instead of MULT rtx. Update all corresponding splitters.
3086 (*saddl_se): Ditto.
3087 (*ssub<modesuffix>): Ditto.
3088 (*ssubl_se): Ditto.
3089 (*cmp_sadd_di): Update split patterns.
3090 (*cmp_sadd_si): Ditto.
3091 (*cmp_sadd_sidi): Ditto.
3092 (*cmp_ssub_di): Ditto.
3093 (*cmp_ssub_si): Ditto.
3094 (*cmp_ssub_sidi): Ditto.
3095 * config/alpha/predicates.md (const23_operand): New predicate.
3096 * config/alpha/alpha.c (alpha_rtx_costs) [PLUS, MINUS]:
3097 Look for ASHIFT, not MULT inner operand.
3098 (alpha_split_conditional_move): Update for *sadd<modesuffix> change.
3100 2018-01-04 Martin Liska <mliska@suse.cz>
3102 PR gcov-profile/83669
3103 * gcov.c (output_intermediate_file): Add version to intermediate
3104 gcov file.
3105 * doc/gcov.texi: Document new field 'version' in intermediate
3106 file format. Fix location of '-k' option of gcov command.
3108 2018-01-04 Martin Liska <mliska@suse.cz>
3110 PR ipa/82352
3111 * ipa-icf.c (sem_function::merge): Do not cross comdat boundary.
3113 2018-01-04 Jakub Jelinek <jakub@redhat.com>
3115 * gimple-ssa-sprintf.c (parse_directive): Cast second dir.len to uhwi.
3117 2018-01-03 Martin Sebor <msebor@redhat.com>
3119 PR tree-optimization/83655
3120 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call): Avoid
3121 checking calls with invalid arguments.
3123 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3125 * tree-vect-stmts.c (vect_get_store_rhs): New function.
3126 (vectorizable_mask_load_store): Delete.
3127 (vectorizable_call): Return false for masked loads and stores.
3128 (vectorizable_store): Handle IFN_MASK_STORE. Use vect_get_store_rhs
3129 instead of gimple_assign_rhs1.
3130 (vectorizable_load): Handle IFN_MASK_LOAD.
3131 (vect_transform_stmt): Don't set is_store for call_vec_info_type.
3133 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3135 * tree-vect-stmts.c (vect_build_gather_load_calls): New function,
3136 split out from..,
3137 (vectorizable_mask_load_store): ...here.
3138 (vectorizable_load): ...and here.
3140 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3142 * tree-vect-stmts.c (vect_build_all_ones_mask)
3143 (vect_build_zero_merge_argument): New functions, split out from...
3144 (vectorizable_load): ...here.
3146 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3148 * tree-vect-stmts.c (vect_check_store_rhs): New function,
3149 split out from...
3150 (vectorizable_mask_load_store): ...here.
3151 (vectorizable_store): ...and here.
3153 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3155 * tree-vect-stmts.c (vect_check_load_store_mask): New function,
3156 split out from...
3157 (vectorizable_mask_load_store): ...here.
3159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3161 * tree-vectorizer.h (vec_load_store_type): Moved from tree-vec-stmts.c
3162 (vect_model_store_cost): Take a vec_load_store_type instead of a
3163 vect_def_type.
3164 * tree-vect-stmts.c (vec_load_store_type): Move to tree-vectorizer.h.
3165 (vect_model_store_cost): Take a vec_load_store_type instead of a
3166 vect_def_type.
3167 (vectorizable_mask_load_store): Update accordingly.
3168 (vectorizable_store): Likewise.
3169 * tree-vect-slp.c (vect_analyze_slp_cost_1): Update accordingly.
3171 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3173 * tree-vect-loop.c (vect_transform_loop): Stub out scalar
3174 IFN_MASK_LOAD calls here rather than...
3175 * tree-vect-stmts.c (vectorizable_mask_load_store): ...here.
3177 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3178 Alan Hayward <alan.hayward@arm.com>
3179 David Sherwood <david.sherwood@arm.com>
3181 * expmed.c (extract_bit_field_1): For vector extracts,
3182 fall back to extract_bit_field_as_subreg if vec_extract
3183 isn't available.
3185 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3186 Alan Hayward <alan.hayward@arm.com>
3187 David Sherwood <david.sherwood@arm.com>
3189 * lra-spills.c (pseudo_reg_slot_compare): Sort slots by whether
3190 they are variable or constant sized.
3191 (assign_stack_slot_num_and_sort_pseudos): Don't reuse variable-sized
3192 slots for constant-sized data.
3194 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3195 Alan Hayward <alan.hayward@arm.com>
3196 David Sherwood <david.sherwood@arm.com>
3198 * tree-vect-patterns.c (vect_recog_mask_conversion_pattern): When
3199 handling COND_EXPRs with boolean comparisons, try to find a better
3200 basis for the mask type than the boolean itself.
3202 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3204 * doc/rtl.texi (MAX_BITSIZE_MODE_ANY_MODE): Describe how the default
3205 is calculated and how it can be overridden.
3206 * genmodes.c (max_bitsize_mode_any_mode): New variable.
3207 (create_modes): Initialize it from MAX_BITSIZE_MODE_ANY_MODE,
3208 if defined.
3209 (emit_max_int): Use it to set the output MAX_BITSIZE_MODE_ANY_MODE,
3210 if nonzero.
3212 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3213 Alan Hayward <alan.hayward@arm.com>
3214 David Sherwood <david.sherwood@arm.com>
3216 * config/aarch64/aarch64-protos.h (aarch64_output_simd_mov_immediate):
3217 Remove the mode argument.
3218 (aarch64_simd_valid_immediate): Remove the mode and inverse
3219 arguments.
3220 * config/aarch64/iterators.md (bitsize): New iterator.
3221 * config/aarch64/aarch64-simd.md (*aarch64_simd_mov<mode>, and<mode>3)
3222 (ior<mode>3): Update calls to aarch64_output_simd_mov_immediate.
3223 * config/aarch64/constraints.md (Do, Db, Dn): Update calls to
3224 aarch64_simd_valid_immediate.
3225 * config/aarch64/predicates.md (aarch64_reg_or_orr_imm): Likewise.
3226 (aarch64_reg_or_bic_imm): Likewise.
3227 * config/aarch64/aarch64.c (simd_immediate_info): Replace mvn
3228 with an insn_type enum and msl with a modifier_type enum.
3229 Replace element_width with a scalar_mode. Change the shift
3230 to unsigned int. Add constructors for scalar_float_mode and
3231 scalar_int_mode elements.
3232 (aarch64_vect_float_const_representable_p): Delete.
3233 (aarch64_can_const_movi_rtx_p)
3234 (aarch64_simd_scalar_immediate_valid_for_move)
3235 (aarch64_simd_make_constant): Update call to
3236 aarch64_simd_valid_immediate.
3237 (aarch64_advsimd_valid_immediate_hs): New function.
3238 (aarch64_advsimd_valid_immediate): Likewise.
3239 (aarch64_simd_valid_immediate): Remove mode and inverse
3240 arguments. Rewrite to use the above. Use const_vec_duplicate_p
3241 to detect duplicated constants and use aarch64_float_const_zero_rtx_p
3242 and aarch64_float_const_representable_p on the result.
3243 (aarch64_output_simd_mov_immediate): Remove mode argument.
3244 Update call to aarch64_simd_valid_immediate and use of
3245 simd_immediate_info.
3246 (aarch64_output_scalar_simd_mov_immediate): Update call
3247 accordingly.
3249 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3250 Alan Hayward <alan.hayward@arm.com>
3251 David Sherwood <david.sherwood@arm.com>
3253 * machmode.h (mode_precision): Prefix with CONST_MODE_PRECISION.
3254 (mode_nunits): Likewise CONST_MODE_NUNITS.
3255 * machmode.def (ADJUST_NUNITS): Document.
3256 * genmodes.c (mode_data::need_nunits_adj): New field.
3257 (blank_mode): Update accordingly.
3258 (adj_nunits): New variable.
3259 (print_maybe_const_decl): Replace CATEGORY with a NEEDS_ADJ
3260 parameter.
3261 (emit_mode_size_inline): Set need_bytesize_adj for all modes
3262 listed in adj_nunits.
3263 (emit_mode_nunits_inline): Set need_nunits_adj for all modes
3264 listed in adj_nunits. Don't emit case statements for such modes.
3265 (emit_insn_modes_h): Emit definitions of CONST_MODE_NUNITS
3266 and CONST_MODE_PRECISION. Make CONST_MODE_SIZE expand to
3267 nothing if adj_nunits is nonnull.
3268 (emit_mode_precision, emit_mode_nunits): Use print_maybe_const_decl.
3269 (emit_mode_unit_size, emit_mode_base_align, emit_mode_ibit)
3270 (emit_mode_fbit): Update use of print_maybe_const_decl.
3271 (emit_move_size): Likewise. Treat the array as non-const
3272 if adj_nunits.
3273 (emit_mode_adjustments): Handle adj_nunits.
3275 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3277 * machmode.def (VECTOR_MODES_WITH_PREFIX): Document.
3278 * genmodes.c (VECTOR_MODES_WITH_PREFIX): New macro.
3279 (VECTOR_MODES): Use it.
3280 (make_vector_modes): Take the prefix as an argument.
3282 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3283 Alan Hayward <alan.hayward@arm.com>
3284 David Sherwood <david.sherwood@arm.com>
3286 * mode-classes.def (MODE_VECTOR_BOOL): New mode class.
3287 * machmode.h (INTEGRAL_MODE_P, VECTOR_MODE_P): Return true
3288 for MODE_VECTOR_BOOL.
3289 * machmode.def (VECTOR_BOOL_MODE): Document.
3290 * genmodes.c (VECTOR_BOOL_MODE): New macro.
3291 (make_vector_bool_mode): New function.
3292 (complete_mode, emit_mode_wider, emit_mode_adjustments): Handle
3293 MODE_VECTOR_BOOL.
3294 * lto-streamer-in.c (lto_input_mode_table): Likewise.
3295 * rtx-vector-builder.c (rtx_vector_builder::find_cached_value):
3296 Likewise.
3297 * stor-layout.c (int_mode_for_mode): Likewise.
3298 * tree.c (build_vector_type_for_mode): Likewise.
3299 * varasm.c (output_constant_pool_2): Likewise.
3300 * emit-rtl.c (init_emit_once): Make sure that CONST1_RTX (BImode) and
3301 CONSTM1_RTX (BImode) are the same thing. Initialize const_tiny_rtx
3302 for MODE_VECTOR_BOOL.
3303 * expr.c (expand_expr_real_1): Use VECTOR_MODE_P instead of a list
3304 of mode class checks.
3305 * tree-vect-generic.c (expand_vector_operation): Use VECTOR_MODE_P
3306 instead of a list of mode class checks.
3307 (expand_vector_scalar_condition): Likewise.
3308 (type_for_widest_vector_mode): Handle BImode as an inner mode.
3310 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3311 Alan Hayward <alan.hayward@arm.com>
3312 David Sherwood <david.sherwood@arm.com>
3314 * machmode.h (mode_size): Change from unsigned short to
3315 poly_uint16_pod.
3316 (mode_to_bytes): Return a poly_uint16 rather than an unsigned short.
3317 (GET_MODE_SIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3318 or if measurement_type is not polynomial.
3319 (fixed_size_mode::includes_p): Check for constant-sized modes.
3320 * genmodes.c (emit_mode_size_inline): Make mode_size_inline
3321 return a poly_uint16 rather than an unsigned short.
3322 (emit_mode_size): Change the type of mode_size from unsigned short
3323 to poly_uint16_pod. Use ZERO_COEFFS for the initializer.
3324 (emit_mode_adjustments): Cope with polynomial vector sizes.
3325 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3326 for GET_MODE_SIZE.
3327 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3328 for GET_MODE_SIZE.
3329 * auto-inc-dec.c (try_merge): Treat GET_MODE_SIZE as polynomial.
3330 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Likewise.
3331 * caller-save.c (setup_save_areas): Likewise.
3332 (replace_reg_with_saved_mem): Likewise.
3333 * calls.c (emit_library_call_value_1): Likewise.
3334 * combine-stack-adj.c (combine_stack_adjustments_for_block): Likewise.
3335 * combine.c (simplify_set, make_extraction, simplify_shift_const_1)
3336 (gen_lowpart_for_combine): Likewise.
3337 * convert.c (convert_to_integer_1): Likewise.
3338 * cse.c (equiv_constant, cse_insn): Likewise.
3339 * cselib.c (autoinc_split, cselib_hash_rtx): Likewise.
3340 (cselib_subst_to_values): Likewise.
3341 * dce.c (word_dce_process_block): Likewise.
3342 * df-problems.c (df_word_lr_mark_ref): Likewise.
3343 * dwarf2cfi.c (init_one_dwarf_reg_size): Likewise.
3344 * dwarf2out.c (multiple_reg_loc_descriptor, mem_loc_descriptor)
3345 (concat_loc_descriptor, concatn_loc_descriptor, loc_descriptor)
3346 (rtl_for_decl_location): Likewise.
3347 * emit-rtl.c (gen_highpart, widen_memory_access): Likewise.
3348 * expmed.c (extract_bit_field_1, extract_integral_bit_field): Likewise.
3349 * expr.c (emit_group_load_1, clear_storage_hints): Likewise.
3350 (emit_move_complex, emit_move_multi_word, emit_push_insn): Likewise.
3351 (expand_expr_real_1): Likewise.
3352 * function.c (assign_parm_setup_block_p, assign_parm_setup_block)
3353 (pad_below): Likewise.
3354 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3355 * gimple-ssa-store-merging.c (rhs_valid_for_store_merging_p): Likewise.
3356 * ira.c (get_subreg_tracking_sizes): Likewise.
3357 * ira-build.c (ira_create_allocno_objects): Likewise.
3358 * ira-color.c (coalesced_pseudo_reg_slot_compare): Likewise.
3359 (ira_sort_regnos_for_alter_reg): Likewise.
3360 * ira-costs.c (record_operand_costs): Likewise.
3361 * lower-subreg.c (interesting_mode_p, simplify_gen_subreg_concatn)
3362 (resolve_simple_move): Likewise.
3363 * lra-constraints.c (get_reload_reg, operands_match_p): Likewise.
3364 (process_addr_reg, simplify_operand_subreg, curr_insn_transform)
3365 (lra_constraints): Likewise.
3366 (CONST_POOL_OK_P): Reject variable-sized modes.
3367 * lra-spills.c (slot, assign_mem_slot, pseudo_reg_slot_compare)
3368 (add_pseudo_to_slot, lra_spill): Likewise.
3369 * omp-low.c (omp_clause_aligned_alignment): Likewise.
3370 * optabs-query.c (get_best_extraction_insn): Likewise.
3371 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3372 * optabs.c (expand_vec_perm_var, expand_vec_cond_expr): Likewise.
3373 (expand_mult_highpart, valid_multiword_target_p): Likewise.
3374 * recog.c (offsettable_address_addr_space_p): Likewise.
3375 * regcprop.c (maybe_mode_change): Likewise.
3376 * reginfo.c (choose_hard_reg_mode, record_subregs_of_mode): Likewise.
3377 * regrename.c (build_def_use): Likewise.
3378 * regstat.c (dump_reg_info): Likewise.
3379 * reload.c (complex_word_subreg_p, push_reload, find_dummy_reload)
3380 (find_reloads, find_reloads_subreg_address): Likewise.
3381 * reload1.c (eliminate_regs_1): Likewise.
3382 * rtlanal.c (for_each_inc_dec_find_inc_dec, rtx_cost): Likewise.
3383 * simplify-rtx.c (avoid_constant_pool_reference): Likewise.
3384 (simplify_binary_operation_1, simplify_subreg): Likewise.
3385 * targhooks.c (default_function_arg_padding): Likewise.
3386 (default_hard_regno_nregs, default_class_max_nregs): Likewise.
3387 * tree-cfg.c (verify_gimple_assign_binary): Likewise.
3388 (verify_gimple_assign_ternary): Likewise.
3389 * tree-inline.c (estimate_move_cost): Likewise.
3390 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3391 * tree-ssa-loop-ivopts.c (add_autoinc_candidates): Likewise.
3392 (get_address_cost_ainc): Likewise.
3393 * tree-vect-data-refs.c (vect_enhance_data_refs_alignment): Likewise.
3394 (vect_supportable_dr_alignment): Likewise.
3395 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3396 (vectorizable_reduction): Likewise.
3397 * tree-vect-stmts.c (vectorizable_assignment, vectorizable_shift)
3398 (vectorizable_operation, vectorizable_load): Likewise.
3399 * tree.c (build_same_sized_truth_vector_type): Likewise.
3400 * valtrack.c (cleanup_auto_inc_dec): Likewise.
3401 * var-tracking.c (emit_note_insn_var_location): Likewise.
3402 * config/arc/arc.h (ASM_OUTPUT_CASE_END): Use as_a <scalar_int_mode>.
3403 (ADDR_VEC_ALIGN): Likewise.
3405 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3406 Alan Hayward <alan.hayward@arm.com>
3407 David Sherwood <david.sherwood@arm.com>
3409 * machmode.h (mode_to_bits): Return a poly_uint16 rather than an
3410 unsigned short.
3411 (GET_MODE_BITSIZE): Return a constant if ONLY_FIXED_SIZE_MODES,
3412 or if measurement_type is polynomial.
3413 * calls.c (shift_return_value): Treat GET_MODE_BITSIZE as polynomial.
3414 * combine.c (make_extraction): Likewise.
3415 * dse.c (find_shift_sequence): Likewise.
3416 * dwarf2out.c (mem_loc_descriptor): Likewise.
3417 * expmed.c (store_integral_bit_field, extract_bit_field_1): Likewise.
3418 (extract_bit_field, extract_low_bits): Likewise.
3419 * expr.c (convert_move, convert_modes, emit_move_insn_1): Likewise.
3420 (optimize_bitfield_assignment_op, expand_assignment): Likewise.
3421 (store_expr_with_bounds, store_field, expand_expr_real_1): Likewise.
3422 * fold-const.c (optimize_bit_field_compare, merge_ranges): Likewise.
3423 * gimple-fold.c (optimize_atomic_compare_exchange_p): Likewise.
3424 * reload.c (find_reloads): Likewise.
3425 * reload1.c (alter_reg): Likewise.
3426 * stor-layout.c (bitwise_mode_for_mode, compute_record_mode): Likewise.
3427 * targhooks.c (default_secondary_memory_needed_mode): Likewise.
3428 * tree-if-conv.c (predicate_mem_writes): Likewise.
3429 * tree-ssa-strlen.c (handle_builtin_memcmp): Likewise.
3430 * tree-vect-patterns.c (adjust_bool_pattern): Likewise.
3431 * tree-vect-stmts.c (vectorizable_simd_clone_call): Likewise.
3432 * valtrack.c (dead_debug_insert_temp): Likewise.
3433 * varasm.c (mergeable_constant_section): Likewise.
3434 * config/sh/sh.h (LOCAL_ALIGNMENT): Use as_a <fixed_size_mode>.
3436 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3437 Alan Hayward <alan.hayward@arm.com>
3438 David Sherwood <david.sherwood@arm.com>
3440 * expr.c (expand_assignment): Cope with polynomial mode sizes
3441 when assigning to a CONCAT.
3443 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3444 Alan Hayward <alan.hayward@arm.com>
3445 David Sherwood <david.sherwood@arm.com>
3447 * machmode.h (mode_precision): Change from unsigned short to
3448 poly_uint16_pod.
3449 (mode_to_precision): Return a poly_uint16 rather than an unsigned
3450 short.
3451 (GET_MODE_PRECISION): Return a constant if ONLY_FIXED_SIZE_MODES,
3452 or if measurement_type is not polynomial.
3453 (HWI_COMPUTABLE_MODE_P): Turn into a function. Optimize the case
3454 in which the mode is already known to be a scalar_int_mode.
3455 * genmodes.c (emit_mode_precision): Change the type of mode_precision
3456 from unsigned short to poly_uint16_pod. Use ZERO_COEFFS for the
3457 initializer.
3458 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3459 for GET_MODE_PRECISION.
3460 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3461 for GET_MODE_PRECISION.
3462 * combine.c (update_rsp_from_reg_equal): Treat GET_MODE_PRECISION
3463 as polynomial.
3464 (try_combine, find_split_point, combine_simplify_rtx): Likewise.
3465 (expand_field_assignment, make_extraction): Likewise.
3466 (make_compound_operation_int, record_dead_and_set_regs_1): Likewise.
3467 (get_last_value): Likewise.
3468 * convert.c (convert_to_integer_1): Likewise.
3469 * cse.c (cse_insn): Likewise.
3470 * expr.c (expand_expr_real_1): Likewise.
3471 * lra-constraints.c (simplify_operand_subreg): Likewise.
3472 * optabs-query.c (can_atomic_load_p): Likewise.
3473 * optabs.c (expand_atomic_load): Likewise.
3474 (expand_atomic_store): Likewise.
3475 * ree.c (combine_reaching_defs): Likewise.
3476 * rtl.h (partial_subreg_p, paradoxical_subreg_p): Likewise.
3477 * rtlanal.c (nonzero_bits1, lsb_bitfield_op_p): Likewise.
3478 * tree.h (type_has_mode_precision_p): Likewise.
3479 * ubsan.c (instrument_si_overflow): Likewise.
3481 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3482 Alan Hayward <alan.hayward@arm.com>
3483 David Sherwood <david.sherwood@arm.com>
3485 * tree.h (TYPE_VECTOR_SUBPARTS): Turn into a function and handle
3486 polynomial numbers of units.
3487 (SET_TYPE_VECTOR_SUBPARTS): Likewise.
3488 (valid_vector_subparts_p): New function.
3489 (build_vector_type): Remove temporary shim and take the number
3490 of units as a poly_uint64 rather than an int.
3491 (build_opaque_vector_type): Take the number of units as a
3492 poly_uint64 rather than an int.
3493 * tree.c (build_vector_from_ctor): Handle polynomial
3494 TYPE_VECTOR_SUBPARTS.
3495 (type_hash_canon_hash, type_cache_hasher::equal): Likewise.
3496 (uniform_vector_p, vector_type_mode, build_vector): Likewise.
3497 (build_vector_from_val): If the number of units is variable,
3498 use build_vec_duplicate_cst for constant operands and
3499 VEC_DUPLICATE_EXPR otherwise.
3500 (make_vector_type): Remove temporary is_constant ().
3501 (build_vector_type, build_opaque_vector_type): Take the number of
3502 units as a poly_uint64 rather than an int.
3503 (check_vector_cst): Handle polynomial TYPE_VECTOR_SUBPARTS and
3504 VECTOR_CST_NELTS.
3505 * cfgexpand.c (expand_debug_expr): Likewise.
3506 * expr.c (count_type_elements, categorize_ctor_elements_1): Likewise.
3507 (store_constructor, expand_expr_real_1): Likewise.
3508 (const_scalar_mask_from_tree): Likewise.
3509 * fold-const-call.c (fold_const_reduction): Likewise.
3510 * fold-const.c (const_binop, const_unop, fold_convert_const): Likewise.
3511 (operand_equal_p, fold_vec_perm, fold_ternary_loc): Likewise.
3512 (native_encode_vector, vec_cst_ctor_to_array): Likewise.
3513 (fold_relational_const): Likewise.
3514 (native_interpret_vector): Likewise. Change the size from an
3515 int to an unsigned int.
3516 * gimple-fold.c (gimple_fold_stmt_to_constant_1): Handle polynomial
3517 TYPE_VECTOR_SUBPARTS.
3518 (gimple_fold_indirect_ref, gimple_build_vector): Likewise.
3519 (gimple_build_vector_from_val): Use VEC_DUPLICATE_EXPR when
3520 duplicating a non-constant operand into a variable-length vector.
3521 * hsa-brig.c (hsa_op_immed::emit_to_buffer): Handle polynomial
3522 TYPE_VECTOR_SUBPARTS and VECTOR_CST_NELTS.
3523 * ipa-icf.c (sem_variable::equals): Likewise.
3524 * match.pd: Likewise.
3525 * omp-simd-clone.c (simd_clone_subparts): Likewise.
3526 * print-tree.c (print_node): Likewise.
3527 * stor-layout.c (layout_type): Likewise.
3528 * targhooks.c (default_builtin_vectorization_cost): Likewise.
3529 * tree-cfg.c (verify_gimple_comparison): Likewise.
3530 (verify_gimple_assign_binary): Likewise.
3531 (verify_gimple_assign_ternary): Likewise.
3532 (verify_gimple_assign_single): Likewise.
3533 * tree-pretty-print.c (dump_generic_node): Likewise.
3534 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
3535 (simplify_bitfield_ref, is_combined_permutation_identity): Likewise.
3536 * tree-vect-data-refs.c (vect_permute_store_chain): Likewise.
3537 (vect_grouped_load_supported, vect_permute_load_chain): Likewise.
3538 (vect_shift_permute_load_chain): Likewise.
3539 * tree-vect-generic.c (nunits_for_known_piecewise_op): Likewise.
3540 (expand_vector_condition, optimize_vector_constructor): Likewise.
3541 (lower_vec_perm, get_compute_type): Likewise.
3542 * tree-vect-loop.c (vect_determine_vectorization_factor): Likewise.
3543 (get_initial_defs_for_reduction, vect_transform_loop): Likewise.
3544 * tree-vect-patterns.c (vect_recog_bool_pattern): Likewise.
3545 (vect_recog_mask_conversion_pattern): Likewise.
3546 * tree-vect-slp.c (vect_supported_load_permutation_p): Likewise.
3547 (vect_get_constant_vectors, vect_transform_slp_perm_load): Likewise.
3548 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
3549 (get_group_load_store_type, vectorizable_mask_load_store): Likewise.
3550 (vectorizable_bswap, simd_clone_subparts, vectorizable_assignment)
3551 (vectorizable_shift, vectorizable_operation, vectorizable_store)
3552 (vectorizable_load, vect_is_simple_cond, vectorizable_comparison)
3553 (supportable_widening_operation): Likewise.
3554 (supportable_narrowing_operation): Likewise.
3555 * tree-vector-builder.c (tree_vector_builder::binary_encoded_nelts):
3556 Likewise.
3557 * varasm.c (output_constant): Likewise.
3559 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3560 Alan Hayward <alan.hayward@arm.com>
3561 David Sherwood <david.sherwood@arm.com>
3563 * tree-vect-data-refs.c (vect_permute_store_chain): Reorganize
3564 so that both the length == 3 and length != 3 cases set up their
3565 own permute vectors. Add comments explaining why we know the
3566 number of elements is constant.
3567 (vect_permute_load_chain): Likewise.
3569 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3570 Alan Hayward <alan.hayward@arm.com>
3571 David Sherwood <david.sherwood@arm.com>
3573 * machmode.h (mode_nunits): Change from unsigned char to
3574 poly_uint16_pod.
3575 (ONLY_FIXED_SIZE_MODES): New macro.
3576 (pod_mode::measurement_type, scalar_int_mode::measurement_type)
3577 (scalar_float_mode::measurement_type, scalar_mode::measurement_type)
3578 (complex_mode::measurement_type, fixed_size_mode::measurement_type):
3579 New typedefs.
3580 (mode_to_nunits): Return a poly_uint16 rather than an unsigned short.
3581 (GET_MODE_NUNITS): Return a constant if ONLY_FIXED_SIZE_MODES,
3582 or if measurement_type is not polynomial.
3583 * genmodes.c (ZERO_COEFFS): New macro.
3584 (emit_mode_nunits_inline): Make mode_nunits_inline return a
3585 poly_uint16.
3586 (emit_mode_nunits): Change the type of mode_nunits to poly_uint16_pod.
3587 Use ZERO_COEFFS when emitting initializers.
3588 * data-streamer.h (bp_pack_poly_value): New function.
3589 (bp_unpack_poly_value): Likewise.
3590 * lto-streamer-in.c (lto_input_mode_table): Use bp_unpack_poly_value
3591 for GET_MODE_NUNITS.
3592 * lto-streamer-out.c (lto_write_mode_table): Use bp_pack_poly_value
3593 for GET_MODE_NUNITS.
3594 * tree.c (make_vector_type): Remove temporary shim and make
3595 the real function take the number of units as a poly_uint64
3596 rather than an int.
3597 (build_vector_type_for_mode): Handle polynomial nunits.
3598 * dwarf2out.c (loc_descriptor, add_const_value_attribute): Likewise.
3599 * emit-rtl.c (const_vec_series_p_1): Likewise.
3600 (gen_rtx_CONST_VECTOR): Likewise.
3601 * fold-const.c (test_vec_duplicate_folding): Likewise.
3602 * genrecog.c (validate_pattern): Likewise.
3603 * optabs-query.c (can_vec_perm_var_p, can_mult_highpart_p): Likewise.
3604 * optabs-tree.c (expand_vec_cond_expr_p): Likewise.
3605 * optabs.c (expand_vector_broadcast, expand_binop_directly): Likewise.
3606 (shift_amt_for_vec_perm_mask, expand_vec_perm_var): Likewise.
3607 (expand_vec_cond_expr, expand_mult_highpart): Likewise.
3608 * rtlanal.c (subreg_get_info): Likewise.
3609 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
3610 (vect_grouped_load_supported): Likewise.
3611 * tree-vect-generic.c (type_for_widest_vector_mode): Likewise.
3612 * tree-vect-loop.c (have_whole_vector_shift): Likewise.
3613 * simplify-rtx.c (simplify_unary_operation_1): Likewise.
3614 (simplify_const_unary_operation, simplify_binary_operation_1)
3615 (simplify_const_binary_operation, simplify_ternary_operation)
3616 (test_vector_ops_duplicate, test_vector_ops): Likewise.
3617 (simplify_immed_subreg): Use GET_MODE_NUNITS on a fixed_size_mode
3618 instead of CONST_VECTOR_NUNITS.
3619 * varasm.c (output_constant_pool_2): Likewise.
3620 * rtx-vector-builder.c (rtx_vector_builder::build): Only include the
3621 explicit-encoded elements in the XVEC for variable-length vectors.
3623 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3625 * lra-constraints.c (curr_insn_transform): Use partial_subreg_p.
3627 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3628 Alan Hayward <alan.hayward@arm.com>
3629 David Sherwood <david.sherwood@arm.com>
3631 * coretypes.h (fixed_size_mode): Declare.
3632 (fixed_size_mode_pod): New typedef.
3633 * builtins.h (target_builtins::x_apply_args_mode)
3634 (target_builtins::x_apply_result_mode): Change type to
3635 fixed_size_mode_pod.
3636 * builtins.c (apply_args_size, apply_result_size, result_vector)
3637 (expand_builtin_apply_args_1, expand_builtin_apply)
3638 (expand_builtin_return): Update accordingly.
3640 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3642 * cse.c (hash_rtx_cb): Hash only the encoded elements.
3643 * cselib.c (cselib_hash_rtx): Likewise.
3644 * expmed.c (make_tree): Build VECTOR_CSTs directly from the
3645 CONST_VECTOR encoding.
3647 2017-01-03 Jakub Jelinek <jakub@redhat.com>
3648 Jeff Law <law@redhat.com>
3650 PR target/83641
3651 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): For
3652 noreturn probe, use gen_pop instead of ix86_emit_restore_reg_using_pop,
3653 only set RTX_FRAME_RELATED_P on both the push and pop if cfa_reg is sp
3654 and add REG_CFA_ADJUST_CFA notes in that case to both insns.
3656 PR target/83641
3657 * config/i386/i386.c (ix86_adjust_stack_and_probe_stack_clash): Do not
3658 explicitly probe *sp in a noreturn function if there were any callee
3659 register saves or frame pointer is needed.
3661 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3663 PR debug/83621
3664 * cfgexpand.c (expand_debug_expr): Return NULL if mode is
3665 BLKmode for ternary, binary or unary expressions.
3667 PR debug/83645
3668 * var-tracking.c (delete_vta_debug_insn): New inline function.
3669 (delete_vta_debug_insns): Add USE_CFG argument, if true, walk just
3670 insns from get_insns () to NULL instead of each bb separately.
3671 Use delete_vta_debug_insn. No longer static.
3672 (vt_debug_insns_local, variable_tracking_main_1): Adjust
3673 delete_vta_debug_insns callers.
3674 * rtl.h (delete_vta_debug_insns): Declare.
3675 * final.c (rest_of_handle_final): Call delete_vta_debug_insns
3676 instead of variable_tracking_main.
3678 2018-01-03 Martin Sebor <msebor@redhat.com>
3680 PR tree-optimization/83603
3681 * calls.c (maybe_warn_nonstring_arg): Avoid accessing function
3682 arguments past the endof the argument list in functions declared
3683 without a prototype.
3684 * gimple-ssa-warn-restrict.c (wrestrict_dom_walker::check_call):
3685 Avoid checking when arguments are null.
3687 2018-01-03 Martin Sebor <msebor@redhat.com>
3689 PR c/83559
3690 * doc/extend.texi (attribute const): Fix a typo.
3691 * ipa-pure-const.c ((warn_function_const, warn_function_pure): Avoid
3692 issuing -Wsuggest-attribute for void functions.
3694 2018-01-03 Martin Sebor <msebor@redhat.com>
3696 * gimple-ssa-warn-restrict.c (builtin_memref::builtin_memref): Use
3697 offset_int::from instead of wide_int::to_shwi.
3698 (maybe_diag_overlap): Remove assertion.
3699 Use HOST_WIDE_INT_PRINT_DEC instead of %lli.
3700 * gimple-ssa-sprintf.c (format_directive): Same.
3701 (parse_directive): Same.
3702 (sprintf_dom_walker::compute_format_length): Same.
3703 (try_substitute_return_value): Same.
3705 2017-01-03 Jeff Law <law@redhat.com>
3707 PR middle-end/83654
3708 * explow.c (anti_adjust_stack_and_probe_stack_clash): Test a
3709 non-constant residual for zero at runtime and avoid probing in
3710 that case. Reorganize code for trailing problem to mirror handling
3711 of the residual.
3713 2018-01-03 Prathamesh Kulkarni <prathamesh.kulkarni@linaro.org>
3715 PR tree-optimization/83501
3716 * tree-ssa-strlen.c (get_string_cst): New.
3717 (handle_char_store): Call get_string_cst.
3719 2018-01-03 Martin Liska <mliska@suse.cz>
3721 PR tree-optimization/83593
3722 * tree-ssa-strlen.c: Include tree-cfg.h.
3723 (strlen_check_and_optimize_stmt): Add new argument cleanup_eh.
3724 (strlen_dom_walker): Add new member variable m_cleanup_cfg.
3725 (strlen_dom_walker::strlen_dom_walker): Initialize m_cleanup_cfg
3726 to false.
3727 (strlen_dom_walker::before_dom_children): Call
3728 gimple_purge_dead_eh_edges. Dump tranformation with details
3729 dump flags.
3730 (strlen_dom_walker::before_dom_children): Update call by adding
3731 new argument cleanup_eh.
3732 (pass_strlen::execute): Return TODO_cleanup_cfg if needed.
3734 2018-01-03 Martin Liska <mliska@suse.cz>
3736 PR ipa/83549
3737 * cif-code.def (VARIADIC_THUNK): New enum value.
3738 * ipa-fnsummary.c (compute_fn_summary): Do not inline variadic
3739 thunks.
3741 2018-01-03 Jan Beulich <jbeulich@suse.com>
3743 * sse.md (mov<mode>_internal): Tighten condition for when to use
3744 vmovdqu<ssescalarsize> for TI and OI modes.
3746 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3748 Update copyright years.
3750 2018-01-03 Martin Liska <mliska@suse.cz>
3752 PR ipa/83594
3753 * ipa-visibility.c (function_and_variable_visibility): Skip
3754 functions with noipa attribure.
3756 2018-01-03 Jakub Jelinek <jakub@redhat.com>
3758 * gcc.c (process_command): Update copyright notice dates.
3759 * gcov-dump.c (print_version): Ditto.
3760 * gcov.c (print_version): Ditto.
3761 * gcov-tool.c (print_version): Ditto.
3762 * gengtype.c (create_file): Ditto.
3763 * doc/cpp.texi: Bump @copying's copyright year.
3764 * doc/cppinternals.texi: Ditto.
3765 * doc/gcc.texi: Ditto.
3766 * doc/gccint.texi: Ditto.
3767 * doc/gcov.texi: Ditto.
3768 * doc/install.texi: Ditto.
3769 * doc/invoke.texi: Ditto.
3771 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3773 * vector-builder.h (vector_builder::m_full_nelts): Change from
3774 unsigned int to poly_uint64.
3775 (vector_builder::full_nelts): Update prototype accordingly.
3776 (vector_builder::new_vector): Likewise.
3777 (vector_builder::encoded_full_vector_p): Handle polynomial full_nelts.
3778 (vector_builder::operator ==): Likewise.
3779 (vector_builder::finalize): Likewise.
3780 * int-vector-builder.h (int_vector_builder::int_vector_builder):
3781 Take the number of elements as a poly_uint64 rather than an
3782 unsigned int.
3783 * vec-perm-indices.h (vec_perm_indices::m_nelts_per_input): Change
3784 from unsigned int to poly_uint64.
3785 (vec_perm_indices::vec_perm_indices): Update prototype accordingly.
3786 (vec_perm_indices::new_vector): Likewise.
3787 (vec_perm_indices::length): Likewise.
3788 (vec_perm_indices::nelts_per_input): Likewise.
3789 (vec_perm_indices::input_nelts): Likewise.
3790 * vec-perm-indices.c (vec_perm_indices::new_vector): Take the
3791 number of elements per input as a poly_uint64 rather than an
3792 unsigned int. Use the original encoding for variable-length
3793 vectors, rather than clamping each individual element.
3794 For the second and subsequent elements in each pattern,
3795 clamp the step and base before clamping their sum.
3796 (vec_perm_indices::series_p): Handle polynomial element counts.
3797 (vec_perm_indices::all_in_range_p): Likewise.
3798 (vec_perm_indices_to_tree): Likewise.
3799 (vec_perm_indices_to_rtx): Likewise.
3800 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise.
3801 * tree-vector-builder.c (tree_vector_builder::new_unary_operation)
3802 (tree_vector_builder::new_binary_operation): Handle polynomial
3803 element counts. Return false if we need to know the number
3804 of elements at compile time.
3805 * fold-const.c (fold_vec_perm): Punt if the number of elements
3806 isn't known at compile time.
3808 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3810 * vec-perm-indices.h (vec_perm_builder): Change element type
3811 from HOST_WIDE_INT to poly_int64.
3812 (vec_perm_indices::element_type): Update accordingly.
3813 (vec_perm_indices::clamp): Handle polynomial element_types.
3814 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
3815 (vec_perm_indices::all_in_range_p): Likewise.
3816 (tree_to_vec_perm_builder): Check for poly_int64 trees rather
3817 than shwi trees.
3818 * vector-builder.h (vector_builder::stepped_sequence_p): Handle
3819 polynomial vec_perm_indices element types.
3820 * int-vector-builder.h (int_vector_builder::equal_p): Likewise.
3821 * fold-const.c (fold_vec_perm): Likewise.
3822 * optabs.c (shift_amt_for_vec_perm_mask): Likewise.
3823 * tree-vect-generic.c (lower_vec_perm): Likewise.
3824 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
3825 * config/aarch64/aarch64.c (aarch64_evpc_tbl): Cast d->perm
3826 element type to HOST_WIDE_INT.
3828 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3829 Alan Hayward <alan.hayward@arm.com>
3830 David Sherwood <david.sherwood@arm.com>
3832 * alias.c (addr_side_effect_eval): Take the size as a poly_int64
3833 rather than an int. Use plus_constant.
3834 (memrefs_conflict_p): Take the sizes as poly_int64s rather than ints.
3835 Take the offset "c" as a poly_int64 rather than a HOST_WIDE_INT.
3837 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3838 Alan Hayward <alan.hayward@arm.com>
3839 David Sherwood <david.sherwood@arm.com>
3841 * calls.c (emit_call_1, expand_call): Change struct_value_size from
3842 a HOST_WIDE_INT to a poly_int64.
3844 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3845 Alan Hayward <alan.hayward@arm.com>
3846 David Sherwood <david.sherwood@arm.com>
3848 * calls.c (load_register_parameters): Cope with polynomial
3849 mode sizes. Require a constant size for BLKmode parameters
3850 that aren't described by a PARALLEL. If BLOCK_REG_PADDING
3851 forces a parameter to be padded at the lsb end in order to
3852 fill a complete number of words, require the parameter size
3853 to be ordered wrt UNITS_PER_WORD.
3855 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3856 Alan Hayward <alan.hayward@arm.com>
3857 David Sherwood <david.sherwood@arm.com>
3859 * reload1.c (spill_stack_slot_width): Change element type
3860 from unsigned int to poly_uint64_pod.
3861 (alter_reg): Treat mode sizes as polynomial.
3863 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3864 Alan Hayward <alan.hayward@arm.com>
3865 David Sherwood <david.sherwood@arm.com>
3867 * reload.c (complex_word_subreg_p): New function.
3868 (reload_inner_reg_of_subreg, push_reload): Use it.
3870 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3871 Alan Hayward <alan.hayward@arm.com>
3872 David Sherwood <david.sherwood@arm.com>
3874 * lra-constraints.c (process_alt_operands): Reject matched
3875 operands whose sizes aren't ordered.
3876 (match_reload): Refer to this check here.
3878 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3879 Alan Hayward <alan.hayward@arm.com>
3880 David Sherwood <david.sherwood@arm.com>
3882 * builtins.c (expand_ifn_atomic_compare_exchange_into_call): Assert
3883 that the mode size is in the set {1, 2, 4, 8, 16}.
3885 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3886 Alan Hayward <alan.hayward@arm.com>
3887 David Sherwood <david.sherwood@arm.com>
3889 * var-tracking.c (adjust_mems): Treat mode sizes as polynomial.
3890 Use plus_constant instead of gen_rtx_PLUS.
3892 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3893 Alan Hayward <alan.hayward@arm.com>
3894 David Sherwood <david.sherwood@arm.com>
3896 * config/cr16/cr16-protos.h (cr16_push_rounding): Declare.
3897 * config/cr16/cr16.h (PUSH_ROUNDING): Move implementation to...
3898 * config/cr16/cr16.c (cr16_push_rounding): ...this new function.
3899 * config/h8300/h8300-protos.h (h8300_push_rounding): Declare.
3900 * config/h8300/h8300.h (PUSH_ROUNDING): Move implementation to...
3901 * config/h8300/h8300.c (h8300_push_rounding): ...this new function.
3902 * config/i386/i386-protos.h (ix86_push_rounding): Declare.
3903 * config/i386/i386.h (PUSH_ROUNDING): Move implementation to...
3904 * config/i386/i386.c (ix86_push_rounding): ...this new function.
3905 * config/m32c/m32c-protos.h (m32c_push_rounding): Take and return
3906 a poly_int64.
3907 * config/m32c/m32c.c (m32c_push_rounding): Likewise.
3908 * config/m68k/m68k-protos.h (m68k_push_rounding): Declare.
3909 * config/m68k/m68k.h (PUSH_ROUNDING): Move implementation to...
3910 * config/m68k/m68k.c (m68k_push_rounding): ...this new function.
3911 * config/pdp11/pdp11-protos.h (pdp11_push_rounding): Declare.
3912 * config/pdp11/pdp11.h (PUSH_ROUNDING): Move implementation to...
3913 * config/pdp11/pdp11.c (pdp11_push_rounding): ...this new function.
3914 * config/stormy16/stormy16-protos.h (xstormy16_push_rounding): Declare.
3915 * config/stormy16/stormy16.h (PUSH_ROUNDING): Move implementation to...
3916 * config/stormy16/stormy16.c (xstormy16_push_rounding): ...this new
3917 function.
3918 * expr.c (emit_move_resolve_push): Treat the input and result
3919 of PUSH_ROUNDING as a poly_int64.
3920 (emit_move_complex_push, emit_single_push_insn_1): Likewise.
3921 (emit_push_insn): Likewise.
3922 * lra-eliminations.c (mark_not_eliminable): Likewise.
3923 * recog.c (push_operand): Likewise.
3924 * reload1.c (elimination_effects): Likewise.
3925 * rtlanal.c (nonzero_bits1): Likewise.
3926 * calls.c (store_one_arg): Likewise. Require the padding to be
3927 known at compile time.
3929 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3930 Alan Hayward <alan.hayward@arm.com>
3931 David Sherwood <david.sherwood@arm.com>
3933 * expr.c (emit_single_push_insn_1): Treat mode sizes as polynomial.
3934 Use plus_constant instead of gen_rtx_PLUS.
3936 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3937 Alan Hayward <alan.hayward@arm.com>
3938 David Sherwood <david.sherwood@arm.com>
3940 * auto-inc-dec.c (set_inc_state): Take the mode size as a poly_int64
3941 rather than an int.
3943 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3944 Alan Hayward <alan.hayward@arm.com>
3945 David Sherwood <david.sherwood@arm.com>
3947 * expr.c (expand_expr_real_1): Use tree_to_poly_uint64
3948 instead of int_size_in_bytes when handling VIEW_CONVERT_EXPRs
3949 via stack temporaries. Treat the mode size as polynomial too.
3951 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3952 Alan Hayward <alan.hayward@arm.com>
3953 David Sherwood <david.sherwood@arm.com>
3955 * expr.c (expand_expr_real_2): When handling conversions involving
3956 unions, apply tree_to_poly_uint64 to the TYPE_SIZE rather than
3957 multiplying int_size_in_bytes by BITS_PER_UNIT. Treat GET_MODE_BISIZE
3958 as a poly_uint64 too.
3960 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3961 Alan Hayward <alan.hayward@arm.com>
3962 David Sherwood <david.sherwood@arm.com>
3964 * rtlanal.c (subreg_get_info): Handle polynomial mode sizes.
3966 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3967 Alan Hayward <alan.hayward@arm.com>
3968 David Sherwood <david.sherwood@arm.com>
3970 * combine.c (can_change_dest_mode): Handle polynomial
3971 REGMODE_NATURAL_SIZE.
3972 * expmed.c (store_bit_field_1): Likewise.
3973 * expr.c (store_constructor): Likewise.
3974 * emit-rtl.c (validate_subreg): Operate on polynomial mode sizes
3975 and polynomial REGMODE_NATURAL_SIZE.
3976 (gen_lowpart_common): Likewise.
3977 * reginfo.c (record_subregs_of_mode): Likewise.
3978 * rtlanal.c (read_modify_subreg_p): Likewise.
3980 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3981 Alan Hayward <alan.hayward@arm.com>
3982 David Sherwood <david.sherwood@arm.com>
3984 * internal-fn.c (expand_vector_ubsan_overflow): Handle polynomial
3985 numbers of elements.
3987 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3988 Alan Hayward <alan.hayward@arm.com>
3989 David Sherwood <david.sherwood@arm.com>
3991 * match.pd: Cope with polynomial numbers of vector elements.
3993 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
3994 Alan Hayward <alan.hayward@arm.com>
3995 David Sherwood <david.sherwood@arm.com>
3997 * fold-const.c (fold_indirect_ref_1): Handle polynomial offsets
3998 in a POINTER_PLUS_EXPR.
4000 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4001 Alan Hayward <alan.hayward@arm.com>
4002 David Sherwood <david.sherwood@arm.com>
4004 * omp-simd-clone.c (simd_clone_subparts): New function.
4005 (simd_clone_init_simd_arrays): Use it instead of TYPE_VECTOR_SUBPARTS.
4006 (ipa_simd_modify_function_body): Likewise.
4008 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4009 Alan Hayward <alan.hayward@arm.com>
4010 David Sherwood <david.sherwood@arm.com>
4012 * tree-vect-generic.c (nunits_for_known_piecewise_op): New function.
4013 (expand_vector_piecewise): Use it instead of TYPE_VECTOR_SUBPARTS.
4014 (expand_vector_addition, add_rshift, expand_vector_divmod): Likewise.
4015 (expand_vector_condition, vector_element): Likewise.
4016 (subparts_gt): New function.
4017 (get_compute_type): Use subparts_gt.
4018 (count_type_subparts): Delete.
4019 (expand_vector_operations_1): Use subparts_gt instead of
4020 count_type_subparts.
4022 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4023 Alan Hayward <alan.hayward@arm.com>
4024 David Sherwood <david.sherwood@arm.com>
4026 * tree-vect-data-refs.c (vect_no_alias_p): Replace with...
4027 (vect_compile_time_alias): ...this new function. Do the calculation
4028 on poly_ints rather than trees.
4029 (vect_prune_runtime_alias_test_list): Update call accordingly.
4031 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4032 Alan Hayward <alan.hayward@arm.com>
4033 David Sherwood <david.sherwood@arm.com>
4035 * tree-vect-slp.c (vect_build_slp_tree_1): Handle polynomial
4036 numbers of units.
4037 (vect_schedule_slp_instance): Likewise.
4039 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4040 Alan Hayward <alan.hayward@arm.com>
4041 David Sherwood <david.sherwood@arm.com>
4043 * tree-vect-slp.c (vect_get_and_check_slp_defs): Reject
4044 constant and extern definitions for variable-length vectors.
4045 (vect_get_constant_vectors): Note that the number of units
4046 is known to be constant.
4048 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4049 Alan Hayward <alan.hayward@arm.com>
4050 David Sherwood <david.sherwood@arm.com>
4052 * tree-vect-stmts.c (vectorizable_conversion): Treat the number
4053 of units as polynomial. Choose between WIDE and NARROW based
4054 on multiple_p.
4056 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4057 Alan Hayward <alan.hayward@arm.com>
4058 David Sherwood <david.sherwood@arm.com>
4060 * tree-vect-stmts.c (simd_clone_subparts): New function.
4061 (vectorizable_simd_clone_call): Use it instead of TYPE_VECTOR_SUBPARTS.
4063 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4064 Alan Hayward <alan.hayward@arm.com>
4065 David Sherwood <david.sherwood@arm.com>
4067 * tree-vect-stmts.c (vectorizable_call): Treat the number of
4068 vectors as polynomial. Use build_index_vector for
4069 IFN_GOMP_SIMD_LANE.
4071 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4072 Alan Hayward <alan.hayward@arm.com>
4073 David Sherwood <david.sherwood@arm.com>
4075 * tree-vect-stmts.c (get_load_store_type): Treat the number of
4076 units as polynomial. Reject VMAT_ELEMENTWISE and VMAT_STRIDED_SLP
4077 for variable-length vectors.
4078 (vectorizable_mask_load_store): Treat the number of units as
4079 polynomial, asserting that it is constant if the condition has
4080 already been enforced.
4081 (vectorizable_store, vectorizable_load): Likewise.
4083 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4084 Alan Hayward <alan.hayward@arm.com>
4085 David Sherwood <david.sherwood@arm.com>
4087 * tree-vect-loop.c (vectorizable_live_operation): Treat the number
4088 of units as polynomial. Punt if we can't tell at compile time
4089 which vector contains the final result.
4091 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4092 Alan Hayward <alan.hayward@arm.com>
4093 David Sherwood <david.sherwood@arm.com>
4095 * tree-vect-loop.c (vectorizable_induction): Treat the number
4096 of units as polynomial. Punt on SLP inductions. Use an integer
4097 VEC_SERIES_EXPR for variable-length integer reductions. Use a
4098 cast of such a series for variable-length floating-point
4099 reductions.
4101 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4102 Alan Hayward <alan.hayward@arm.com>
4103 David Sherwood <david.sherwood@arm.com>
4105 * tree.h (build_index_vector): Declare.
4106 * tree.c (build_index_vector): New function.
4107 * tree-vect-loop.c (get_initial_defs_for_reduction): Treat the number
4108 of units as polynomial, forcibly converting it to a constant if
4109 vectorizable_reduction has already enforced the condition.
4110 (vect_create_epilog_for_reduction): Likewise. Use build_index_vector
4111 to create a {1,2,3,...} vector.
4112 (vectorizable_reduction): Treat the number of units as polynomial.
4113 Choose vectype_in based on the largest scalar element size rather
4114 than the smallest number of units. Enforce the restrictions
4115 relied on above.
4117 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4118 Alan Hayward <alan.hayward@arm.com>
4119 David Sherwood <david.sherwood@arm.com>
4121 * tree-vect-data-refs.c (vector_alignment_reachable_p): Treat the
4122 number of units as polynomial.
4124 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4125 Alan Hayward <alan.hayward@arm.com>
4126 David Sherwood <david.sherwood@arm.com>
4128 * target.h (vector_sizes, auto_vector_sizes): New typedefs.
4129 * target.def (autovectorize_vector_sizes): Return the vector sizes
4130 by pointer, using vector_sizes rather than a bitmask.
4131 * targhooks.h (default_autovectorize_vector_sizes): Update accordingly.
4132 * targhooks.c (default_autovectorize_vector_sizes): Likewise.
4133 * config/aarch64/aarch64.c (aarch64_autovectorize_vector_sizes):
4134 Likewise.
4135 * config/arc/arc.c (arc_autovectorize_vector_sizes): Likewise.
4136 * config/arm/arm.c (arm_autovectorize_vector_sizes): Likewise.
4137 * config/i386/i386.c (ix86_autovectorize_vector_sizes): Likewise.
4138 * config/mips/mips.c (mips_autovectorize_vector_sizes): Likewise.
4139 * omp-general.c (omp_max_vf): Likewise.
4140 * omp-low.c (omp_clause_aligned_alignment): Likewise.
4141 * optabs-query.c (can_vec_mask_load_store_p): Likewise.
4142 * tree-vect-loop.c (vect_analyze_loop): Likewise.
4143 * tree-vect-slp.c (vect_slp_bb): Likewise.
4144 * doc/tm.texi: Regenerate.
4145 * tree-vectorizer.h (current_vector_size): Change from an unsigned int
4146 to a poly_uint64.
4147 * tree-vect-stmts.c (get_vectype_for_scalar_type_and_size): Take
4148 the vector size as a poly_uint64 rather than an unsigned int.
4149 (current_vector_size): Change from an unsigned int to a poly_uint64.
4150 (get_vectype_for_scalar_type): Update accordingly.
4151 * tree.h (build_truth_vector_type): Take the size and number of
4152 units as a poly_uint64 rather than an unsigned int.
4153 (build_vector_type): Add a temporary overload that takes
4154 the number of units as a poly_uint64 rather than an unsigned int.
4155 * tree.c (make_vector_type): Likewise.
4156 (build_truth_vector_type): Take the number of units as a poly_uint64
4157 rather than an unsigned int.
4159 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4160 Alan Hayward <alan.hayward@arm.com>
4161 David Sherwood <david.sherwood@arm.com>
4163 * target.def (get_mask_mode): Take the number of units and length
4164 as poly_uint64s rather than unsigned ints.
4165 * targhooks.h (default_get_mask_mode): Update accordingly.
4166 * targhooks.c (default_get_mask_mode): Likewise.
4167 * config/i386/i386.c (ix86_get_mask_mode): Likewise.
4168 * doc/tm.texi: Regenerate.
4170 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4171 Alan Hayward <alan.hayward@arm.com>
4172 David Sherwood <david.sherwood@arm.com>
4174 * omp-general.h (omp_max_vf): Return a poly_uint64 instead of an int.
4175 * omp-general.c (omp_max_vf): Likewise.
4176 * omp-expand.c (omp_adjust_chunk_size): Update call to omp_max_vf.
4177 (expand_omp_simd): Handle polynomial safelen.
4178 * omp-low.c (omplow_simd_context): Add a default constructor.
4179 (omplow_simd_context::max_vf): Change from int to poly_uint64.
4180 (lower_rec_simd_input_clauses): Update accordingly.
4181 (lower_rec_input_clauses): Likewise.
4183 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4184 Alan Hayward <alan.hayward@arm.com>
4185 David Sherwood <david.sherwood@arm.com>
4187 * tree-vectorizer.h (vect_nunits_for_cost): New function.
4188 * tree-vect-loop.c (vect_model_reduction_cost): Use it.
4189 * tree-vect-slp.c (vect_analyze_slp_cost_1): Likewise.
4190 (vect_analyze_slp_cost): Likewise.
4191 * tree-vect-stmts.c (vect_model_store_cost): Likewise.
4192 (vect_model_load_cost): Likewise.
4194 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4195 Alan Hayward <alan.hayward@arm.com>
4196 David Sherwood <david.sherwood@arm.com>
4198 * tree-vect-slp.c (vect_record_max_nunits, vect_build_slp_tree_1)
4199 (vect_build_slp_tree_2, vect_build_slp_tree): Change max_nunits
4200 from an unsigned int * to a poly_uint64_pod *.
4201 (calculate_unrolling_factor): New function.
4202 (vect_analyze_slp_instance): Use it. Track polynomial max_nunits.
4204 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4205 Alan Hayward <alan.hayward@arm.com>
4206 David Sherwood <david.sherwood@arm.com>
4208 * tree-vectorizer.h (_slp_instance::unrolling_factor): Change
4209 from an unsigned int to a poly_uint64.
4210 (_loop_vec_info::slp_unrolling_factor): Likewise.
4211 (_loop_vec_info::vectorization_factor): Change from an int
4212 to a poly_uint64.
4213 (MAX_VECTORIZATION_FACTOR): Bump from 64 to INT_MAX.
4214 (vect_get_num_vectors): New function.
4215 (vect_update_max_nunits, vect_vf_for_cost): Likewise.
4216 (vect_get_num_copies): Use vect_get_num_vectors.
4217 (vect_analyze_data_ref_dependences): Change max_vf from an int *
4218 to an unsigned int *.
4219 (vect_analyze_data_refs): Change min_vf from an int * to a
4220 poly_uint64 *.
4221 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4222 than an unsigned HOST_WIDE_INT.
4223 * tree-vect-data-refs.c (vect_analyze_possibly_independent_ddr)
4224 (vect_analyze_data_ref_dependence): Change max_vf from an int *
4225 to an unsigned int *.
4226 (vect_analyze_data_ref_dependences): Likewise.
4227 (vect_compute_data_ref_alignment): Handle polynomial vf.
4228 (vect_enhance_data_refs_alignment): Likewise.
4229 (vect_prune_runtime_alias_test_list): Likewise.
4230 (vect_shift_permute_load_chain): Likewise.
4231 (vect_supportable_dr_alignment): Likewise.
4232 (dependence_distance_ge_vf): Take the vectorization factor as a
4233 poly_uint64 rather than an unsigned HOST_WIDE_INT.
4234 (vect_analyze_data_refs): Change min_vf from an int * to a
4235 poly_uint64 *.
4236 * tree-vect-loop-manip.c (vect_gen_scalar_loop_niters): Take
4237 vfm1 as a poly_uint64 rather than an int. Make the same change
4238 for the returned bound_scalar.
4239 (vect_gen_vector_loop_niters): Handle polynomial vf.
4240 (vect_do_peeling): Likewise. Update call to
4241 vect_gen_scalar_loop_niters and handle polynomial bound_scalars.
4242 (vect_gen_vector_loop_niters_mult_vf): Assert that the vf must
4243 be constant.
4244 * tree-vect-loop.c (vect_determine_vectorization_factor)
4245 (vect_update_vf_for_slp, vect_analyze_loop_2): Handle polynomial vf.
4246 (vect_get_known_peeling_cost): Likewise.
4247 (vect_estimate_min_profitable_iters, vectorizable_reduction): Likewise.
4248 (vect_worthwhile_without_simd_p, vectorizable_induction): Likewise.
4249 (vect_transform_loop): Likewise. Use the lowest possible VF when
4250 updating the upper bounds of the loop.
4251 (vect_min_worthwhile_factor): Make static. Return an unsigned int
4252 rather than an int.
4253 * tree-vect-slp.c (vect_attempt_slp_rearrange_stmts): Cope with
4254 polynomial unroll factors.
4255 (vect_analyze_slp_cost_1, vect_analyze_slp_instance): Likewise.
4256 (vect_make_slp_decision): Likewise.
4257 (vect_supported_load_permutation_p): Likewise, and polynomial
4258 vf too.
4259 (vect_analyze_slp_cost): Handle polynomial vf.
4260 (vect_slp_analyze_node_operations): Likewise.
4261 (vect_slp_analyze_bb_1): Likewise.
4262 (vect_transform_slp_perm_load): Take the vf as a poly_uint64 rather
4263 than an unsigned HOST_WIDE_INT.
4264 * tree-vect-stmts.c (vectorizable_simd_clone_call, vectorizable_store)
4265 (vectorizable_load): Handle polynomial vf.
4266 * tree-vectorizer.c (simduid_to_vf::vf): Change from an int to
4267 a poly_uint64.
4268 (adjust_simduid_builtins, shrink_simd_arrays): Update accordingly.
4270 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4271 Alan Hayward <alan.hayward@arm.com>
4272 David Sherwood <david.sherwood@arm.com>
4274 * match.pd: Handle bit operations involving three constants
4275 and try to fold one pair.
4277 2018-01-03 Richard Sandiford <richard.sandiford@linaro.org>
4279 * tree-vect-loop-manip.c: Include gimple-fold.h.
4280 (slpeel_make_loop_iterate_ntimes): Add step, final_iv and
4281 niters_maybe_zero parameters. Handle other cases besides a step of 1.
4282 (vect_gen_vector_loop_niters): Add a step_vector_ptr parameter.
4283 Add a path that uses a step of VF instead of 1, but disable it
4284 for now.
4285 (vect_do_peeling): Add step_vector, niters_vector_mult_vf_var
4286 and niters_no_overflow parameters. Update calls to
4287 slpeel_make_loop_iterate_ntimes and vect_gen_vector_loop_niters.
4288 Create a new SSA name if the latter choses to use a ste other
4289 than zero, and return it via niters_vector_mult_vf_var.
4290 * tree-vect-loop.c (vect_transform_loop): Update calls to
4291 vect_do_peeling, vect_gen_vector_loop_niters and
4292 slpeel_make_loop_iterate_ntimes.
4293 * tree-vectorizer.h (slpeel_make_loop_iterate_ntimes, vect_do_peeling)
4294 (vect_gen_vector_loop_niters): Update declarations after above changes.
4296 2018-01-02 Michael Meissner <meissner@linux.vnet.ibm.com>
4298 * config/rs6000/rs6000.md (floor<mode>2): Add support for IEEE
4299 128-bit round to integer instructions.
4300 (ceil<mode>2): Likewise.
4301 (btrunc<mode>2): Likewise.
4302 (round<mode>2): Likewise.
4304 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4306 * config/rs6000/rs6000-string.c (expand_block_move): Allow the use of
4307 unaligned VSX load/store on P8/P9.
4308 (expand_block_clear): Allow the use of unaligned VSX
4309 load/store on P8/P9.
4311 2018-01-02 Bill Schmidt <wschmidt@linux.vnet.ibm.com>
4313 * config/rs6000/rs6000-p8swap.c (swap_feeds_both_load_and_store):
4314 New function.
4315 (rs6000_analyze_swaps): Mark a web unoptimizable if it contains a
4316 swap associated with both a load and a store.
4318 2018-01-02 Andrew Waterman <andrew@sifive.com>
4320 * config/riscv/linux.h (ICACHE_FLUSH_FUNC): New.
4321 * config/riscv/riscv.md (clear_cache): Use it.
4323 2018-01-02 Artyom Skrobov <tyomitch@gmail.com>
4325 * web.c: Remove out-of-date comment.
4327 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4329 * expr.c (fixup_args_size_notes): Check that any existing
4330 REG_ARGS_SIZE notes are correct, and don't try to re-add them.
4331 (emit_single_push_insn_1): Move stack_pointer_delta adjustment to...
4332 (emit_single_push_insn): ...here.
4334 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4336 * rtl.h (CONST_VECTOR_ELT): Redefine to const_vector_elt.
4337 (const_vector_encoded_nelts): New function.
4338 (CONST_VECTOR_NUNITS): Redefine to use GET_MODE_NUNITS.
4339 (const_vector_int_elt, const_vector_elt): Declare.
4340 * emit-rtl.c (const_vector_int_elt_1): New function.
4341 (const_vector_elt): Likewise.
4342 * simplify-rtx.c (simplify_immed_subreg): Avoid taking the address
4343 of CONST_VECTOR_ELT.
4345 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4347 * expr.c: Include rtx-vector-builder.h.
4348 (const_vector_mask_from_tree): Use rtx_vector_builder and operate
4349 directly on the tree encoding.
4350 (const_vector_from_tree): Likewise.
4351 * optabs.c: Include rtx-vector-builder.h.
4352 (expand_vec_perm_var): Use rtx_vector_builder and create a repeating
4353 sequence of "u" values.
4354 * vec-perm-indices.c: Include rtx-vector-builder.h.
4355 (vec_perm_indices_to_rtx): Use rtx_vector_builder and operate
4356 directly on the vec_perm_indices encoding.
4358 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4360 * doc/rtl.texi (const_vector): Describe new encoding scheme.
4361 * Makefile.in (OBJS): Add rtx-vector-builder.o.
4362 * rtx-vector-builder.h: New file.
4363 * rtx-vector-builder.c: Likewise.
4364 * rtl.h (rtx_def::u2): Add a const_vector field.
4365 (CONST_VECTOR_NPATTERNS): New macro.
4366 (CONST_VECTOR_NELTS_PER_PATTERN): Likewise.
4367 (CONST_VECTOR_DUPLICATE_P): Likewise.
4368 (CONST_VECTOR_STEPPED_P): Likewise.
4369 (CONST_VECTOR_ENCODED_ELT): Likewise.
4370 (const_vec_duplicate_p): Check for a duplicated vector encoding.
4371 (unwrap_const_vec_duplicate): Likewise.
4372 (const_vec_series_p): Check for a non-duplicated vector encoding.
4373 Say that the function only returns true for integer vectors.
4374 * emit-rtl.c: Include rtx-vector-builder.h.
4375 (gen_const_vec_duplicate_1): Delete.
4376 (gen_const_vector): Call gen_const_vec_duplicate instead of
4377 gen_const_vec_duplicate_1.
4378 (const_vec_series_p_1): Operate directly on the CONST_VECTOR encoding.
4379 (gen_const_vec_duplicate): Use rtx_vector_builder.
4380 (gen_const_vec_series): Likewise.
4381 (gen_rtx_CONST_VECTOR): Likewise.
4382 * config/powerpcspe/powerpcspe.c: Include rtx-vector-builder.h.
4383 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4384 Build a new vector rather than modifying a CONST_VECTOR in-place.
4385 (handle_special_swappables): Update call accordingly.
4386 * config/rs6000/rs6000-p8swap.c: Include rtx-vector-builder.h.
4387 (swap_const_vector_halves): Take an rtx pointer rather than rtx.
4388 Build a new vector rather than modifying a CONST_VECTOR in-place.
4389 (handle_special_swappables): Update call accordingly.
4391 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4393 * simplify-rtx.c (simplify_const_binary_operation): Use
4394 CONST_VECTOR_ELT instead of XVECEXP.
4396 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4398 * tree-cfg.c (verify_gimple_assign_ternary): Allow the size of
4399 the selector elements to be different from the data elements
4400 if the selector is a VECTOR_CST.
4401 * tree-vect-stmts.c (vect_gen_perm_mask_any): Use a vector of
4402 ssizetype for the selector.
4404 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4406 * optabs.c (shift_amt_for_vec_perm_mask): Try using series_p
4407 before testing each element individually.
4408 * tree-vect-generic.c (lower_vec_perm): Likewise.
4410 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4412 * selftest.h (selftest::vec_perm_indices_c_tests): Declare.
4413 * selftest-run-tests.c (selftest::run_tests): Call it.
4414 * vector-builder.h (vector_builder::operator ==): New function.
4415 (vector_builder::operator !=): Likewise.
4416 * vec-perm-indices.h (vec_perm_indices::series_p): Declare.
4417 (vec_perm_indices::all_from_input_p): New function.
4418 * vec-perm-indices.c (vec_perm_indices::series_p): Likewise.
4419 (test_vec_perm_12, selftest::vec_perm_indices_c_tests): Likewise.
4420 * fold-const.c (fold_ternary_loc): Use tree_to_vec_perm_builder
4421 instead of reading the VECTOR_CST directly. Detect whether both
4422 vector inputs are the same before constructing the vec_perm_indices,
4423 and update the number of inputs argument accordingly. Use the
4424 utility functions added above. Only construct sel2 if we need to.
4426 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4428 * optabs.c (expand_vec_perm_var): Use an explicit encoding for
4429 the broadcast of the low byte.
4430 (expand_mult_highpart): Use an explicit encoding for the permutes.
4431 * optabs-query.c (can_mult_highpart_p): Likewise.
4432 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Likewise.
4433 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4434 (vectorizable_bswap): Likewise.
4435 * tree-vect-data-refs.c (vect_grouped_store_supported): Use an
4436 explicit encoding for the power-of-2 permutes.
4437 (vect_permute_store_chain): Likewise.
4438 (vect_grouped_load_supported): Likewise.
4439 (vect_permute_load_chain): Likewise.
4441 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4443 * vec-perm-indices.h (vec_perm_indices_to_tree): Declare.
4444 * vec-perm-indices.c (vec_perm_indices_to_tree): New function.
4445 * tree-ssa-forwprop.c (simplify_vector_constructor): Use it.
4446 * tree-vect-slp.c (vect_transform_slp_perm_load): Likewise.
4447 * tree-vect-stmts.c (vectorizable_bswap): Likewise.
4448 (vect_gen_perm_mask_any): Likewise.
4450 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4452 * int-vector-builder.h: New file.
4453 * vec-perm-indices.h: Include int-vector-builder.h.
4454 (vec_perm_indices): Redefine as an int_vector_builder.
4455 (auto_vec_perm_indices): Delete.
4456 (vec_perm_builder): Redefine as a stand-alone class.
4457 (vec_perm_indices::vec_perm_indices): New function.
4458 (vec_perm_indices::clamp): Likewise.
4459 * vec-perm-indices.c: Include fold-const.h and tree-vector-builder.h.
4460 (vec_perm_indices::new_vector): New function.
4461 (vec_perm_indices::new_expanded_vector): Update for new
4462 vec_perm_indices class.
4463 (vec_perm_indices::rotate_inputs): New function.
4464 (vec_perm_indices::all_in_range_p): Operate directly on the
4465 encoded form, without computing elided elements.
4466 (tree_to_vec_perm_builder): Operate directly on the VECTOR_CST
4467 encoding. Update for new vec_perm_indices class.
4468 * optabs.c (expand_vec_perm_const): Create a vec_perm_indices for
4469 the given vec_perm_builder.
4470 (expand_vec_perm_var): Update vec_perm_builder constructor.
4471 (expand_mult_highpart): Use vec_perm_builder instead of
4472 auto_vec_perm_indices.
4473 * optabs-query.c (can_mult_highpart_p): Use vec_perm_builder and
4474 vec_perm_indices instead of auto_vec_perm_indices. Use a single
4475 or double series encoding as appropriate.
4476 * fold-const.c (fold_ternary_loc): Use vec_perm_builder and
4477 vec_perm_indices instead of auto_vec_perm_indices.
4478 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4479 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4480 (vect_permute_store_chain): Likewise.
4481 (vect_grouped_load_supported): Likewise.
4482 (vect_permute_load_chain): Likewise.
4483 (vect_shift_permute_load_chain): Likewise.
4484 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4485 (vect_transform_slp_perm_load): Likewise.
4486 (vect_schedule_slp_instance): Likewise.
4487 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4488 (vectorizable_mask_load_store): Likewise.
4489 (vectorizable_bswap): Likewise.
4490 (vectorizable_store): Likewise.
4491 (vectorizable_load): Likewise.
4492 * tree-vect-generic.c (lower_vec_perm): Use vec_perm_builder and
4493 vec_perm_indices instead of auto_vec_perm_indices. Use
4494 tree_to_vec_perm_builder to read the vector from a tree.
4495 * tree-vect-loop.c (calc_vec_perm_mask_for_shift): Take a
4496 vec_perm_builder instead of a vec_perm_indices.
4497 (have_whole_vector_shift): Use vec_perm_builder and
4498 vec_perm_indices instead of auto_vec_perm_indices. Leave the
4499 truncation to calc_vec_perm_mask_for_shift.
4500 (vect_create_epilog_for_reduction): Likewise.
4501 * config/aarch64/aarch64.c (expand_vec_perm_d::perm): Change
4502 from auto_vec_perm_indices to vec_perm_indices.
4503 (aarch64_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4504 instead of changing individual elements.
4505 (aarch64_vectorize_vec_perm_const): Use new_vector to install
4506 the vector in d.perm.
4507 * config/arm/arm.c (expand_vec_perm_d::perm): Change
4508 from auto_vec_perm_indices to vec_perm_indices.
4509 (arm_expand_vec_perm_const_1): Use rotate_inputs on d.perm
4510 instead of changing individual elements.
4511 (arm_vectorize_vec_perm_const): Use new_vector to install
4512 the vector in d.perm.
4513 * config/powerpcspe/powerpcspe.c (rs6000_expand_extract_even):
4514 Update vec_perm_builder constructor.
4515 (rs6000_expand_interleave): Likewise.
4516 * config/rs6000/rs6000.c (rs6000_expand_extract_even): Likewise.
4517 (rs6000_expand_interleave): Likewise.
4519 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4521 * optabs-query.c (can_vec_perm_var_p): Check whether lowering
4522 to qimode could truncate the indices.
4523 * optabs.c (expand_vec_perm_var): Likewise.
4525 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4527 * Makefile.in (OBJS): Add vec-perm-indices.o.
4528 * vec-perm-indices.h: New file.
4529 * vec-perm-indices.c: Likewise.
4530 * target.h (vec_perm_indices): Replace with a forward class
4531 declaration.
4532 (auto_vec_perm_indices): Move to vec-perm-indices.h.
4533 * optabs.h: Include vec-perm-indices.h.
4534 (expand_vec_perm): Delete.
4535 (selector_fits_mode_p, expand_vec_perm_var): Declare.
4536 (expand_vec_perm_const): Declare.
4537 * target.def (vec_perm_const_ok): Replace with...
4538 (vec_perm_const): ...this new hook.
4539 * doc/tm.texi.in (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Replace with...
4540 (TARGET_VECTORIZE_VEC_PERM_CONST): ...this new hook.
4541 * doc/tm.texi: Regenerate.
4542 * optabs.def (vec_perm_const): Delete.
4543 * doc/md.texi (vec_perm_const): Likewise.
4544 (vec_perm): Refer to TARGET_VECTORIZE_VEC_PERM_CONST.
4545 * expr.c (expand_expr_real_2): Use expand_vec_perm_const rather than
4546 expand_vec_perm for constant permutation vectors. Assert that
4547 the mode of variable permutation vectors is the integer equivalent
4548 of the mode that is being permuted.
4549 * optabs-query.h (selector_fits_mode_p): Declare.
4550 * optabs-query.c: Include vec-perm-indices.h.
4551 (selector_fits_mode_p): New function.
4552 (can_vec_perm_const_p): Check whether targetm.vectorize.vec_perm_const
4553 is defined, instead of checking whether the vec_perm_const_optab
4554 exists. Use targetm.vectorize.vec_perm_const instead of
4555 targetm.vectorize.vec_perm_const_ok. Check whether the indices
4556 fit in the vector mode before using a variable permute.
4557 * optabs.c (shift_amt_for_vec_perm_mask): Take a mode and a
4558 vec_perm_indices instead of an rtx.
4559 (expand_vec_perm): Replace with...
4560 (expand_vec_perm_const): ...this new function. Take the selector
4561 as a vec_perm_indices rather than an rtx. Also take the mode of
4562 the selector. Update call to shift_amt_for_vec_perm_mask.
4563 Use targetm.vectorize.vec_perm_const instead of vec_perm_const_optab.
4564 Use vec_perm_indices::new_expanded_vector to expand the original
4565 selector into bytes. Check whether the indices fit in the vector
4566 mode before using a variable permute.
4567 (expand_vec_perm_var): Make global.
4568 (expand_mult_highpart): Use expand_vec_perm_const.
4569 * fold-const.c: Includes vec-perm-indices.h.
4570 * tree-ssa-forwprop.c: Likewise.
4571 * tree-vect-data-refs.c: Likewise.
4572 * tree-vect-generic.c: Likewise.
4573 * tree-vect-loop.c: Likewise.
4574 * tree-vect-slp.c: Likewise.
4575 * tree-vect-stmts.c: Likewise.
4576 * config/aarch64/aarch64-protos.h (aarch64_expand_vec_perm_const):
4577 Delete.
4578 * config/aarch64/aarch64-simd.md (vec_perm_const<mode>): Delete.
4579 * config/aarch64/aarch64.c (aarch64_expand_vec_perm_const)
4580 (aarch64_vectorize_vec_perm_const_ok): Fuse into...
4581 (aarch64_vectorize_vec_perm_const): ...this new function.
4582 (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4583 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4584 * config/arm/arm-protos.h (arm_expand_vec_perm_const): Delete.
4585 * config/arm/vec-common.md (vec_perm_const<mode>): Delete.
4586 * config/arm/arm.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4587 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4588 (arm_expand_vec_perm_const, arm_vectorize_vec_perm_const_ok): Merge
4589 into...
4590 (arm_vectorize_vec_perm_const): ...this new function. Explicitly
4591 check for NEON modes.
4592 * config/i386/i386-protos.h (ix86_expand_vec_perm_const): Delete.
4593 * config/i386/sse.md (VEC_PERM_CONST, vec_perm_const<mode>): Delete.
4594 * config/i386/i386.c (ix86_expand_vec_perm_const_1): Update comment.
4595 (ix86_expand_vec_perm_const, ix86_vectorize_vec_perm_const_ok): Merge
4596 into...
4597 (ix86_vectorize_vec_perm_const): ...this new function. Incorporate
4598 the old VEC_PERM_CONST conditions.
4599 * config/ia64/ia64-protos.h (ia64_expand_vec_perm_const): Delete.
4600 * config/ia64/vect.md (vec_perm_const<mode>): Delete.
4601 * config/ia64/ia64.c (ia64_expand_vec_perm_const)
4602 (ia64_vectorize_vec_perm_const_ok): Merge into...
4603 (ia64_vectorize_vec_perm_const): ...this new function.
4604 * config/mips/loongson.md (vec_perm_const<mode>): Delete.
4605 * config/mips/mips-msa.md (vec_perm_const<mode>): Delete.
4606 * config/mips/mips-ps-3d.md (vec_perm_constv2sf): Delete.
4607 * config/mips/mips-protos.h (mips_expand_vec_perm_const): Delete.
4608 * config/mips/mips.c (mips_expand_vec_perm_const)
4609 (mips_vectorize_vec_perm_const_ok): Merge into...
4610 (mips_vectorize_vec_perm_const): ...this new function.
4611 * config/powerpcspe/altivec.md (vec_perm_constv16qi): Delete.
4612 * config/powerpcspe/paired.md (vec_perm_constv2sf): Delete.
4613 * config/powerpcspe/spe.md (vec_perm_constv2si): Delete.
4614 * config/powerpcspe/vsx.md (vec_perm_const<mode>): Delete.
4615 * config/powerpcspe/powerpcspe-protos.h (altivec_expand_vec_perm_const)
4616 (rs6000_expand_vec_perm_const): Delete.
4617 * config/powerpcspe/powerpcspe.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK):
4618 Delete.
4619 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4620 (altivec_expand_vec_perm_const_le): Take each operand individually.
4621 Operate on constant selectors rather than rtxes.
4622 (altivec_expand_vec_perm_const): Likewise. Update call to
4623 altivec_expand_vec_perm_const_le.
4624 (rs6000_expand_vec_perm_const): Delete.
4625 (rs6000_vectorize_vec_perm_const_ok): Delete.
4626 (rs6000_vectorize_vec_perm_const): New function.
4627 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4628 an element count and rtx array.
4629 (rs6000_expand_extract_even): Update call accordingly.
4630 (rs6000_expand_interleave): Likewise.
4631 * config/rs6000/altivec.md (vec_perm_constv16qi): Delete.
4632 * config/rs6000/paired.md (vec_perm_constv2sf): Delete.
4633 * config/rs6000/vsx.md (vec_perm_const<mode>): Delete.
4634 * config/rs6000/rs6000-protos.h (altivec_expand_vec_perm_const)
4635 (rs6000_expand_vec_perm_const): Delete.
4636 * config/rs6000/rs6000.c (TARGET_VECTORIZE_VEC_PERM_CONST_OK): Delete.
4637 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4638 (altivec_expand_vec_perm_const_le): Take each operand individually.
4639 Operate on constant selectors rather than rtxes.
4640 (altivec_expand_vec_perm_const): Likewise. Update call to
4641 altivec_expand_vec_perm_const_le.
4642 (rs6000_expand_vec_perm_const): Delete.
4643 (rs6000_vectorize_vec_perm_const_ok): Delete.
4644 (rs6000_vectorize_vec_perm_const): New function. Remove stray
4645 reference to the SPE evmerge intructions.
4646 (rs6000_do_expand_vec_perm): Take a vec_perm_builder instead of
4647 an element count and rtx array.
4648 (rs6000_expand_extract_even): Update call accordingly.
4649 (rs6000_expand_interleave): Likewise.
4650 * config/sparc/sparc.md (vec_perm_constv8qi): Delete in favor of...
4651 * config/sparc/sparc.c (sparc_vectorize_vec_perm_const): ...this
4652 new function.
4653 (TARGET_VECTORIZE_VEC_PERM_CONST): Redefine.
4655 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4657 * optabs.c (expand_vec_perm_1): Assert that SEL has an integer
4658 vector mode and that that mode matches the mode of the data
4659 being permuted.
4660 (expand_vec_perm): Split handling of non-CONST_VECTOR selectors
4661 out into expand_vec_perm_var. Do all CONST_VECTOR handling here,
4662 directly using expand_vec_perm_1 when forcing selectors into
4663 registers.
4664 (expand_vec_perm_var): New function, split out from expand_vec_perm.
4666 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4668 * optabs-query.h (can_vec_perm_p): Delete.
4669 (can_vec_perm_var_p, can_vec_perm_const_p): Declare.
4670 * optabs-query.c (can_vec_perm_p): Split into...
4671 (can_vec_perm_var_p, can_vec_perm_const_p): ...these two functions.
4672 (can_mult_highpart_p): Use can_vec_perm_const_p to test whether a
4673 particular selector is valid.
4674 * tree-ssa-forwprop.c (simplify_vector_constructor): Likewise.
4675 * tree-vect-data-refs.c (vect_grouped_store_supported): Likewise.
4676 (vect_grouped_load_supported): Likewise.
4677 (vect_shift_permute_load_chain): Likewise.
4678 * tree-vect-slp.c (vect_build_slp_tree_1): Likewise.
4679 (vect_transform_slp_perm_load): Likewise.
4680 * tree-vect-stmts.c (perm_mask_for_reverse): Likewise.
4681 (vectorizable_bswap): Likewise.
4682 (vect_gen_perm_mask_checked): Likewise.
4683 * fold-const.c (fold_ternary_loc): Likewise. Don't take
4684 implementations of variable permutation vectors into account
4685 when deciding which selector to use.
4686 * tree-vect-loop.c (have_whole_vector_shift): Don't check whether
4687 vec_perm_const_optab is supported; instead use can_vec_perm_const_p
4688 with a false third argument.
4689 * tree-vect-generic.c (lower_vec_perm): Use can_vec_perm_const_p
4690 to test whether the constant selector is valid and can_vec_perm_var_p
4691 to test whether a variable selector is valid.
4693 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4695 * optabs-query.h (can_vec_perm_p): Take a const vec_perm_indices *.
4696 * optabs-query.c (can_vec_perm_p): Likewise.
4697 * fold-const.c (fold_vec_perm): Take a const vec_perm_indices &
4698 instead of vec_perm_indices.
4699 * tree-vectorizer.h (vect_gen_perm_mask_any): Likewise,
4700 (vect_gen_perm_mask_checked): Likewise,
4701 * tree-vect-stmts.c (vect_gen_perm_mask_any): Likewise,
4702 (vect_gen_perm_mask_checked): Likewise,
4704 2018-01-02 Richard Sandiford <richard.sandiford@linaro.org>
4706 * optabs-query.h (qimode_for_vec_perm): Declare.
4707 * optabs-query.c (can_vec_perm_p): Split out qimode search to...
4708 (qimode_for_vec_perm): ...this new function.
4709 * optabs.c (expand_vec_perm): Use qimode_for_vec_perm.
4711 2018-01-02 Aaron Sawdey <acsawdey@linux.vnet.ibm.com>
4713 * rtlanal.c (canonicalize_condition): Return 0 if final rtx
4714 does not have a conditional at the top.
4716 2018-01-02 Richard Biener <rguenther@suse.de>
4718 * ipa-inline.c (big_speedup_p): Fix expression.
4720 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4722 PR target/81616
4723 * config/i386/x86-tune-costs.h: Increase cost of integer load costs
4724 for generic 4->6.
4726 2018-01-02 Jan Hubicka <hubicka@ucw.cz>
4728 PR target/81616
4729 Generic tuning.
4730 * x86-tune-costs.h (generic_cost): Reduce cost of FDIV 20->17,
4731 cost of sqrt 20->14, DIVSS 18->13, DIVSD 32->17, SQRtSS 30->14
4732 and SQRTsD 58->18, cond_not_taken_branch_cost. 2->1. Increase
4733 cond_taken_branch_cost 3->4.
4735 2018-01-01 Jakub Jelinek <jakub@redhat.com>
4737 PR tree-optimization/83581
4738 * tree-loop-distribution.c (pass_loop_distribution::execute): Return
4739 TODO_cleanup_cfg if any changes have been made.
4741 PR middle-end/83608
4742 * expr.c (store_expr_with_bounds): Use simplify_gen_subreg instead of
4743 convert_modes if target mode has the right side, but different mode
4744 class.
4746 PR middle-end/83609
4747 * expr.c (expand_assignment): Fix up a typo in simplify_gen_subreg
4748 last argument when extracting from CONCAT. If either from_real or
4749 from_imag is NULL, use expansion through memory. If result is not
4750 a CONCAT and simplify_gen_subreg fails, try to simplify_gen_subreg
4751 the parts directly to inner mode, if even that fails, use expansion
4752 through memory.
4754 PR middle-end/83623
4755 * expmed.c (expand_shift_1): For 2-byte rotates by BITS_PER_UNIT,
4756 check for bswap in mode rather than HImode and use that in expand_unop
4757 too.
4758 \f
4759 Copyright (C) 2018 Free Software Foundation, Inc.
4761 Copying and distribution of this file, with or without modification,
4762 are permitted in any medium without royalty provided the copyright
4763 notice and this notice are preserved.