1 /* Move registers around to reduce number of move instructions needed.
2 Copyright (C) 1987, 88, 89, 92-98, 1999 Free Software Foundation, Inc.
4 This file is part of GNU CC.
6 GNU CC is free software; you can redistribute it and/or modify
7 it under the terms of the GNU General Public License as published by
8 the Free Software Foundation; either version 2, or (at your option)
11 GNU CC is distributed in the hope that it will be useful,
12 but WITHOUT ANY WARRANTY; without even the implied warranty of
13 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
14 GNU General Public License for more details.
16 You should have received a copy of the GNU General Public License
17 along with GNU CC; see the file COPYING. If not, write to
18 the Free Software Foundation, 59 Temple Place - Suite 330,
19 Boston, MA 02111-1307, USA. */
22 /* This module looks for cases where matching constraints would force
23 an instruction to need a reload, and this reload would be a register
24 to register move. It then attempts to change the registers used by the
25 instruction to avoid the move instruction. */
29 #include "rtl.h" /* stdio.h must precede rtl.h for FFS. */
31 #include "insn-config.h"
36 #include "hard-reg-set.h"
40 #include "insn-flags.h"
41 #include "basic-block.h"
44 static int optimize_reg_copy_1
PROTO((rtx
, rtx
, rtx
));
45 static void optimize_reg_copy_2
PROTO((rtx
, rtx
, rtx
));
46 static void optimize_reg_copy_3
PROTO((rtx
, rtx
, rtx
));
47 static rtx gen_add3_insn
PROTO((rtx
, rtx
, rtx
));
48 static void copy_src_to_dest
PROTO((rtx
, rtx
, rtx
, int, int));
49 static int *regmove_bb_head
;
52 int with
[MAX_RECOG_OPERANDS
];
53 enum { READ
, WRITE
, READWRITE
} use
[MAX_RECOG_OPERANDS
];
54 int commutative
[MAX_RECOG_OPERANDS
];
55 int early_clobber
[MAX_RECOG_OPERANDS
];
58 static rtx discover_flags_reg
PROTO((void));
59 static void mark_flags_life_zones
PROTO((rtx
));
60 static void flags_set_1
PROTO((rtx
, rtx
));
62 static int try_auto_increment
PROTO((rtx
, rtx
, rtx
, rtx
, HOST_WIDE_INT
, int));
63 static int find_matches
PROTO((rtx
, struct match
*));
64 static int fixup_match_1
PROTO((rtx
, rtx
, rtx
, rtx
, rtx
, int, int, int, FILE *))
66 static int reg_is_remote_constant_p
PROTO((rtx
, rtx
, rtx
));
67 static int stable_and_no_regs_but_for_p
PROTO((rtx
, rtx
, rtx
));
68 static int regclass_compatible_p
PROTO((int, int));
69 static int replacement_quality
PROTO((rtx
));
70 static int fixup_match_2
PROTO((rtx
, rtx
, rtx
, rtx
, FILE *));
71 static int loop_depth
;
73 /* Return non-zero if registers with CLASS1 and CLASS2 can be merged without
74 causing too much register allocation problems. */
76 regclass_compatible_p (class0
, class1
)
79 return (class0
== class1
80 || (reg_class_subset_p (class0
, class1
)
81 && ! CLASS_LIKELY_SPILLED_P (class0
))
82 || (reg_class_subset_p (class1
, class0
)
83 && ! CLASS_LIKELY_SPILLED_P (class1
)));
86 /* Generate and return an insn body to add r1 and c,
87 storing the result in r0. */
89 gen_add3_insn (r0
, r1
, c
)
92 int icode
= (int) add_optab
->handlers
[(int) GET_MODE (r0
)].insn_code
;
94 if (icode
== CODE_FOR_nothing
95 || ! ((*insn_data
[icode
].operand
[0].predicate
)
96 (r0
, insn_data
[icode
].operand
[0].mode
))
97 || ! ((*insn_data
[icode
].operand
[1].predicate
)
98 (r1
, insn_data
[icode
].operand
[1].mode
))
99 || ! ((*insn_data
[icode
].operand
[2].predicate
)
100 (c
, insn_data
[icode
].operand
[2].mode
)))
103 return (GEN_FCN (icode
) (r0
, r1
, c
));
107 /* INC_INSN is an instruction that adds INCREMENT to REG.
108 Try to fold INC_INSN as a post/pre in/decrement into INSN.
109 Iff INC_INSN_SET is nonzero, inc_insn has a destination different from src.
110 Return nonzero for success. */
112 try_auto_increment (insn
, inc_insn
, inc_insn_set
, reg
, increment
, pre
)
113 rtx reg
, insn
, inc_insn
,inc_insn_set
;
114 HOST_WIDE_INT increment
;
117 enum rtx_code inc_code
;
119 rtx pset
= single_set (insn
);
122 /* Can't use the size of SET_SRC, we might have something like
123 (sign_extend:SI (mem:QI ... */
124 rtx use
= find_use_as_address (pset
, reg
, 0);
125 if (use
!= 0 && use
!= (rtx
) 1)
127 int size
= GET_MODE_SIZE (GET_MODE (use
));
129 || (HAVE_POST_INCREMENT
130 && pre
== 0 && (inc_code
= POST_INC
, increment
== size
))
131 || (HAVE_PRE_INCREMENT
132 && pre
== 1 && (inc_code
= PRE_INC
, increment
== size
))
133 || (HAVE_POST_DECREMENT
134 && pre
== 0 && (inc_code
= POST_DEC
, increment
== -size
))
135 || (HAVE_PRE_DECREMENT
136 && pre
== 1 && (inc_code
= PRE_DEC
, increment
== -size
))
142 &SET_SRC (inc_insn_set
),
143 XEXP (SET_SRC (inc_insn_set
), 0), 1);
144 validate_change (insn
, &XEXP (use
, 0),
145 gen_rtx_fmt_e (inc_code
, Pmode
, reg
), 1);
146 if (apply_change_group ())
149 = gen_rtx_EXPR_LIST (REG_INC
,
150 reg
, REG_NOTES (insn
));
153 PUT_CODE (inc_insn
, NOTE
);
154 NOTE_LINE_NUMBER (inc_insn
) = NOTE_INSN_DELETED
;
155 NOTE_SOURCE_FILE (inc_insn
) = 0;
165 /* Determine if the pattern generated by add_optab has a clobber,
166 such as might be issued for a flags hard register. To make the
167 code elsewhere simpler, we handle cc0 in this same framework.
169 Return the register if one was discovered. Return NULL_RTX if
170 if no flags were found. Return pc_rtx if we got confused. */
173 discover_flags_reg ()
176 tmp
= gen_rtx_REG (word_mode
, 10000);
177 tmp
= gen_add3_insn (tmp
, tmp
, GEN_INT (2));
179 /* If we get something that isn't a simple set, or a
180 [(set ..) (clobber ..)], this whole function will go wrong. */
181 if (GET_CODE (tmp
) == SET
)
183 else if (GET_CODE (tmp
) == PARALLEL
)
187 if (XVECLEN (tmp
, 0) != 2)
189 tmp
= XVECEXP (tmp
, 0, 1);
190 if (GET_CODE (tmp
) != CLOBBER
)
194 /* Don't do anything foolish if the md wanted to clobber a
195 scratch or something. We only care about hard regs.
196 Moreover we don't like the notion of subregs of hard regs. */
197 if (GET_CODE (tmp
) == SUBREG
198 && GET_CODE (SUBREG_REG (tmp
)) == REG
199 && REGNO (SUBREG_REG (tmp
)) < FIRST_PSEUDO_REGISTER
)
201 found
= (GET_CODE (tmp
) == REG
&& REGNO (tmp
) < FIRST_PSEUDO_REGISTER
);
203 return (found
? tmp
: NULL_RTX
);
209 /* It is a tedious task identifying when the flags register is live and
210 when it is safe to optimize. Since we process the instruction stream
211 multiple times, locate and record these live zones by marking the
212 mode of the instructions --
214 QImode is used on the instruction at which the flags becomes live.
216 HImode is used within the range (exclusive) that the flags are
217 live. Thus the user of the flags is not marked.
219 All other instructions are cleared to VOIDmode. */
221 /* Used to communicate with flags_set_1. */
222 static rtx flags_set_1_rtx
;
223 static int flags_set_1_set
;
226 mark_flags_life_zones (flags
)
234 /* If we found a flags register on a cc0 host, bail. */
235 if (flags
== NULL_RTX
)
237 else if (flags
!= cc0_rtx
)
241 /* Simple cases first: if no flags, clear all modes. If confusing,
242 mark the entire function as being in a flags shadow. */
243 if (flags
== NULL_RTX
|| flags
== pc_rtx
)
245 enum machine_mode mode
= (flags
? HImode
: VOIDmode
);
247 for (insn
= get_insns(); insn
; insn
= NEXT_INSN (insn
))
248 PUT_MODE (insn
, mode
);
256 flags_regno
= REGNO (flags
);
257 flags_nregs
= HARD_REGNO_NREGS (flags_regno
, GET_MODE (flags
));
259 flags_set_1_rtx
= flags
;
261 /* Process each basic block. */
262 for (block
= n_basic_blocks
- 1; block
>= 0; block
--)
267 insn
= BLOCK_HEAD (block
);
268 end
= BLOCK_END (block
);
270 /* Look out for the (unlikely) case of flags being live across
271 basic block boundaries. */
276 for (i
= 0; i
< flags_nregs
; ++i
)
277 live
|= REGNO_REG_SET_P (BASIC_BLOCK (block
)->global_live_at_start
,
284 /* Process liveness in reverse order of importance --
285 alive, death, birth. This lets more important info
286 overwrite the mode of lesser info. */
288 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
291 /* In the cc0 case, death is not marked in reg notes,
292 but is instead the mere use of cc0 when it is alive. */
293 if (live
&& reg_mentioned_p (cc0_rtx
, PATTERN (insn
)))
296 /* In the hard reg case, we watch death notes. */
297 if (live
&& find_regno_note (insn
, REG_DEAD
, flags_regno
))
300 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
302 /* In either case, birth is denoted simply by it's presence
303 as the destination of a set. */
305 note_stores (PATTERN (insn
), flags_set_1
);
309 PUT_MODE (insn
, QImode
);
313 PUT_MODE (insn
, (live
? HImode
: VOIDmode
));
317 insn
= NEXT_INSN (insn
);
322 /* A subroutine of mark_flags_life_zones, called through note_stores. */
328 if (GET_CODE (pat
) == SET
329 && reg_overlap_mentioned_p (x
, flags_set_1_rtx
))
333 static int *regno_src_regno
;
335 /* Indicate how good a choice REG (which appears as a source) is to replace
336 a destination register with. The higher the returned value, the better
337 the choice. The main objective is to avoid using a register that is
338 a candidate for tying to a hard register, since the output might in
339 turn be a candidate to be tied to a different hard register. */
341 replacement_quality(reg
)
346 /* Bad if this isn't a register at all. */
347 if (GET_CODE (reg
) != REG
)
350 /* If this register is not meant to get a hard register,
351 it is a poor choice. */
352 if (REG_LIVE_LENGTH (REGNO (reg
)) < 0)
355 src_regno
= regno_src_regno
[REGNO (reg
)];
357 /* If it was not copied from another register, it is fine. */
361 /* Copied from a hard register? */
362 if (src_regno
< FIRST_PSEUDO_REGISTER
)
365 /* Copied from a pseudo register - not as bad as from a hard register,
366 yet still cumbersome, since the register live length will be lengthened
367 when the registers get tied. */
371 /* INSN is a copy from SRC to DEST, both registers, and SRC does not die
374 Search forward to see if SRC dies before either it or DEST is modified,
375 but don't scan past the end of a basic block. If so, we can replace SRC
376 with DEST and let SRC die in INSN.
378 This will reduce the number of registers live in that range and may enable
379 DEST to be tied to SRC, thus often saving one register in addition to a
380 register-register copy. */
383 optimize_reg_copy_1 (insn
, dest
, src
)
391 int sregno
= REGNO (src
);
392 int dregno
= REGNO (dest
);
394 /* We don't want to mess with hard regs if register classes are small. */
396 || (SMALL_REGISTER_CLASSES
397 && (sregno
< FIRST_PSEUDO_REGISTER
398 || dregno
< FIRST_PSEUDO_REGISTER
))
399 /* We don't see all updates to SP if they are in an auto-inc memory
400 reference, so we must disallow this optimization on them. */
401 || sregno
== STACK_POINTER_REGNUM
|| dregno
== STACK_POINTER_REGNUM
)
404 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
406 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
407 || (GET_CODE (p
) == NOTE
408 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
409 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
412 /* ??? We can't scan past the end of a basic block without updating
413 the register lifetime info (REG_DEAD/basic_block_live_at_start).
414 A CALL_INSN might be the last insn of a basic block, if it is inside
415 an EH region. There is no easy way to tell, so we just always break
416 when we see a CALL_INSN if flag_exceptions is nonzero. */
417 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
420 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
423 if (reg_set_p (src
, p
) || reg_set_p (dest
, p
)
424 /* Don't change a USE of a register. */
425 || (GET_CODE (PATTERN (p
)) == USE
426 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
429 /* See if all of SRC dies in P. This test is slightly more
430 conservative than it needs to be. */
431 if ((note
= find_regno_note (p
, REG_DEAD
, sregno
)) != 0
432 && GET_MODE (XEXP (note
, 0)) == GET_MODE (src
))
440 /* We can do the optimization. Scan forward from INSN again,
441 replacing regs as we go. Set FAILED if a replacement can't
442 be done. In that case, we can't move the death note for SRC.
443 This should be rare. */
445 /* Set to stop at next insn. */
446 for (q
= next_real_insn (insn
);
447 q
!= next_real_insn (p
);
448 q
= next_real_insn (q
))
450 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
452 /* If SRC is a hard register, we might miss some
453 overlapping registers with validate_replace_rtx,
454 so we would have to undo it. We can't if DEST is
455 present in the insn, so fail in that combination
457 if (sregno
< FIRST_PSEUDO_REGISTER
458 && reg_mentioned_p (dest
, PATTERN (q
)))
461 /* Replace all uses and make sure that the register
462 isn't still present. */
463 else if (validate_replace_rtx (src
, dest
, q
)
464 && (sregno
>= FIRST_PSEUDO_REGISTER
465 || ! reg_overlap_mentioned_p (src
,
468 /* We assume that a register is used exactly once per
469 insn in the REG_N_REFS updates below. If this is not
470 correct, no great harm is done.
472 Since we do not know if we will change the lifetime of
473 SREGNO or DREGNO, we must not update REG_LIVE_LENGTH
474 or REG_N_CALLS_CROSSED at this time. */
475 if (sregno
>= FIRST_PSEUDO_REGISTER
)
476 REG_N_REFS (sregno
) -= loop_depth
;
478 if (dregno
>= FIRST_PSEUDO_REGISTER
)
479 REG_N_REFS (dregno
) += loop_depth
;
483 validate_replace_rtx (dest
, src
, q
);
488 /* For SREGNO, count the total number of insns scanned.
489 For DREGNO, count the total number of insns scanned after
490 passing the death note for DREGNO. */
495 /* If the insn in which SRC dies is a CALL_INSN, don't count it
496 as a call that has been crossed. Otherwise, count it. */
497 if (q
!= p
&& GET_CODE (q
) == CALL_INSN
)
499 /* Similarly, total calls for SREGNO, total calls beyond
500 the death note for DREGNO. */
506 /* If DEST dies here, remove the death note and save it for
507 later. Make sure ALL of DEST dies here; again, this is
508 overly conservative. */
510 && (dest_death
= find_regno_note (q
, REG_DEAD
, dregno
)) != 0)
512 if (GET_MODE (XEXP (dest_death
, 0)) != GET_MODE (dest
))
513 failed
= 1, dest_death
= 0;
515 remove_note (q
, dest_death
);
521 /* These counters need to be updated if and only if we are
522 going to move the REG_DEAD note. */
523 if (sregno
>= FIRST_PSEUDO_REGISTER
)
525 if (REG_LIVE_LENGTH (sregno
) >= 0)
527 REG_LIVE_LENGTH (sregno
) -= s_length
;
528 /* REG_LIVE_LENGTH is only an approximation after
529 combine if sched is not run, so make sure that we
530 still have a reasonable value. */
531 if (REG_LIVE_LENGTH (sregno
) < 2)
532 REG_LIVE_LENGTH (sregno
) = 2;
535 REG_N_CALLS_CROSSED (sregno
) -= s_n_calls
;
538 /* Move death note of SRC from P to INSN. */
539 remove_note (p
, note
);
540 XEXP (note
, 1) = REG_NOTES (insn
);
541 REG_NOTES (insn
) = note
;
544 /* Put death note of DEST on P if we saw it die. */
547 XEXP (dest_death
, 1) = REG_NOTES (p
);
548 REG_NOTES (p
) = dest_death
;
550 if (dregno
>= FIRST_PSEUDO_REGISTER
)
552 /* If and only if we are moving the death note for DREGNO,
553 then we need to update its counters. */
554 if (REG_LIVE_LENGTH (dregno
) >= 0)
555 REG_LIVE_LENGTH (dregno
) += d_length
;
556 REG_N_CALLS_CROSSED (dregno
) += d_n_calls
;
563 /* If SRC is a hard register which is set or killed in some other
564 way, we can't do this optimization. */
565 else if (sregno
< FIRST_PSEUDO_REGISTER
566 && dead_or_set_p (p
, src
))
572 /* INSN is a copy of SRC to DEST, in which SRC dies. See if we now have
573 a sequence of insns that modify DEST followed by an insn that sets
574 SRC to DEST in which DEST dies, with no prior modification of DEST.
575 (There is no need to check if the insns in between actually modify
576 DEST. We should not have cases where DEST is not modified, but
577 the optimization is safe if no such modification is detected.)
578 In that case, we can replace all uses of DEST, starting with INSN and
579 ending with the set of SRC to DEST, with SRC. We do not do this
580 optimization if a CALL_INSN is crossed unless SRC already crosses a
581 call or if DEST dies before the copy back to SRC.
583 It is assumed that DEST and SRC are pseudos; it is too complicated to do
584 this for hard registers since the substitutions we may make might fail. */
587 optimize_reg_copy_2 (insn
, dest
, src
)
594 int sregno
= REGNO (src
);
595 int dregno
= REGNO (dest
);
597 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
599 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
600 || (GET_CODE (p
) == NOTE
601 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
602 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
605 /* ??? We can't scan past the end of a basic block without updating
606 the register lifetime info (REG_DEAD/basic_block_live_at_start).
607 A CALL_INSN might be the last insn of a basic block, if it is inside
608 an EH region. There is no easy way to tell, so we just always break
609 when we see a CALL_INSN if flag_exceptions is nonzero. */
610 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
613 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
616 set
= single_set (p
);
617 if (set
&& SET_SRC (set
) == dest
&& SET_DEST (set
) == src
618 && find_reg_note (p
, REG_DEAD
, dest
))
620 /* We can do the optimization. Scan forward from INSN again,
621 replacing regs as we go. */
623 /* Set to stop at next insn. */
624 for (q
= insn
; q
!= NEXT_INSN (p
); q
= NEXT_INSN (q
))
625 if (GET_RTX_CLASS (GET_CODE (q
)) == 'i')
627 if (reg_mentioned_p (dest
, PATTERN (q
)))
629 PATTERN (q
) = replace_rtx (PATTERN (q
), dest
, src
);
631 /* We assume that a register is used exactly once per
632 insn in the updates below. If this is not correct,
633 no great harm is done. */
634 REG_N_REFS (dregno
) -= loop_depth
;
635 REG_N_REFS (sregno
) += loop_depth
;
639 if (GET_CODE (q
) == CALL_INSN
)
641 REG_N_CALLS_CROSSED (dregno
)--;
642 REG_N_CALLS_CROSSED (sregno
)++;
646 remove_note (p
, find_reg_note (p
, REG_DEAD
, dest
));
647 REG_N_DEATHS (dregno
)--;
648 remove_note (insn
, find_reg_note (insn
, REG_DEAD
, src
));
649 REG_N_DEATHS (sregno
)--;
653 if (reg_set_p (src
, p
)
654 || find_reg_note (p
, REG_DEAD
, dest
)
655 || (GET_CODE (p
) == CALL_INSN
&& REG_N_CALLS_CROSSED (sregno
) == 0))
659 /* INSN is a ZERO_EXTEND or SIGN_EXTEND of SRC to DEST.
660 Look if SRC dies there, and if it is only set once, by loading
661 it from memory. If so, try to encorporate the zero/sign extension
662 into the memory read, change SRC to the mode of DEST, and alter
663 the remaining accesses to use the appropriate SUBREG. This allows
664 SRC and DEST to be tied later. */
666 optimize_reg_copy_3 (insn
, dest
, src
)
671 rtx src_reg
= XEXP (src
, 0);
672 int src_no
= REGNO (src_reg
);
673 int dst_no
= REGNO (dest
);
675 enum machine_mode old_mode
;
677 if (src_no
< FIRST_PSEUDO_REGISTER
678 || dst_no
< FIRST_PSEUDO_REGISTER
679 || ! find_reg_note (insn
, REG_DEAD
, src_reg
)
680 || REG_N_SETS (src_no
) != 1)
682 for (p
= PREV_INSN (insn
); ! reg_set_p (src_reg
, p
); p
= PREV_INSN (p
))
684 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
685 || (GET_CODE (p
) == NOTE
686 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
687 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
690 /* ??? We can't scan past the end of a basic block without updating
691 the register lifetime info (REG_DEAD/basic_block_live_at_start).
692 A CALL_INSN might be the last insn of a basic block, if it is inside
693 an EH region. There is no easy way to tell, so we just always break
694 when we see a CALL_INSN if flag_exceptions is nonzero. */
695 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
698 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
701 if (! (set
= single_set (p
))
702 || GET_CODE (SET_SRC (set
)) != MEM
703 || SET_DEST (set
) != src_reg
)
706 /* Be conserative: although this optimization is also valid for
707 volatile memory references, that could cause trouble in later passes. */
708 if (MEM_VOLATILE_P (SET_SRC (set
)))
711 /* Do not use a SUBREG to truncate from one mode to another if truncation
713 if (GET_MODE_BITSIZE (GET_MODE (src_reg
)) <= GET_MODE_BITSIZE (GET_MODE (src
))
714 && !TRULY_NOOP_TRUNCATION (GET_MODE_BITSIZE (GET_MODE (src
)),
715 GET_MODE_BITSIZE (GET_MODE (src_reg
))))
718 old_mode
= GET_MODE (src_reg
);
719 PUT_MODE (src_reg
, GET_MODE (src
));
720 XEXP (src
, 0) = SET_SRC (set
);
722 /* Include this change in the group so that it's easily undone if
723 one of the changes in the group is invalid. */
724 validate_change (p
, &SET_SRC (set
), src
, 1);
726 /* Now walk forward making additional replacements. We want to be able
727 to undo all the changes if a later substitution fails. */
728 subreg
= gen_rtx_SUBREG (old_mode
, src_reg
, 0);
729 while (p
= NEXT_INSN (p
), p
!= insn
)
731 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
734 /* Make a tenative change. */
735 validate_replace_rtx_group (src_reg
, subreg
, p
);
738 validate_replace_rtx_group (src
, src_reg
, insn
);
740 /* Now see if all the changes are valid. */
741 if (! apply_change_group ())
743 /* One or more changes were no good. Back out everything. */
744 PUT_MODE (src_reg
, old_mode
);
745 XEXP (src
, 0) = src_reg
;
750 /* If we were not able to update the users of src to use dest directly, try
751 instead moving the value to dest directly before the operation. */
754 copy_src_to_dest (insn
, src
, dest
, loop_depth
, old_max_uid
)
774 /* A REG_LIVE_LENGTH of -1 indicates the register is equivalent to a constant
775 or memory location and is used infrequently; a REG_LIVE_LENGTH of -2 is
776 parameter when there is no frame pointer that is not allocated a register.
777 For now, we just reject them, rather than incrementing the live length. */
779 if (GET_CODE (src
) == REG
780 && REG_LIVE_LENGTH (REGNO (src
)) > 0
781 && GET_CODE (dest
) == REG
782 && REG_LIVE_LENGTH (REGNO (dest
)) > 0
783 && (set
= single_set (insn
)) != NULL_RTX
784 && !reg_mentioned_p (dest
, SET_SRC (set
))
785 && GET_MODE (src
) == GET_MODE (dest
))
787 int old_num_regs
= reg_rtx_no
;
789 /* Generate the src->dest move. */
791 emit_move_insn (dest
, src
);
792 seq
= gen_sequence ();
794 /* If this sequence uses new registers, we may not use it. */
795 if (old_num_regs
!= reg_rtx_no
796 || ! validate_replace_rtx (src
, dest
, insn
))
798 /* We have to restore reg_rtx_no to its old value, lest
799 recompute_reg_usage will try to compute the usage of the
800 new regs, yet reg_n_info is not valid for them. */
801 reg_rtx_no
= old_num_regs
;
804 emit_insn_before (seq
, insn
);
805 move_insn
= PREV_INSN (insn
);
806 p_move_notes
= ®_NOTES (move_insn
);
807 p_insn_notes
= ®_NOTES (insn
);
809 /* Move any notes mentioning src to the move instruction */
810 for (link
= REG_NOTES (insn
); link
!= NULL_RTX
; link
= next
)
812 next
= XEXP (link
, 1);
813 if (XEXP (link
, 0) == src
)
815 *p_move_notes
= link
;
816 p_move_notes
= &XEXP (link
, 1);
820 *p_insn_notes
= link
;
821 p_insn_notes
= &XEXP (link
, 1);
825 *p_move_notes
= NULL_RTX
;
826 *p_insn_notes
= NULL_RTX
;
828 /* Is the insn the head of a basic block? If so extend it */
829 insn_uid
= INSN_UID (insn
);
830 move_uid
= INSN_UID (move_insn
);
831 if (insn_uid
< old_max_uid
)
833 bb
= regmove_bb_head
[insn_uid
];
836 BLOCK_HEAD (bb
) = move_insn
;
837 regmove_bb_head
[insn_uid
] = -1;
841 /* Update the various register tables. */
842 dest_regno
= REGNO (dest
);
843 REG_N_SETS (dest_regno
) += loop_depth
;
844 REG_N_REFS (dest_regno
) += loop_depth
;
845 REG_LIVE_LENGTH (dest_regno
)++;
846 if (REGNO_FIRST_UID (dest_regno
) == insn_uid
)
847 REGNO_FIRST_UID (dest_regno
) = move_uid
;
849 src_regno
= REGNO (src
);
850 if (! find_reg_note (move_insn
, REG_DEAD
, src
))
851 REG_LIVE_LENGTH (src_regno
)++;
853 if (REGNO_FIRST_UID (src_regno
) == insn_uid
)
854 REGNO_FIRST_UID (src_regno
) = move_uid
;
856 if (REGNO_LAST_UID (src_regno
) == insn_uid
)
857 REGNO_LAST_UID (src_regno
) = move_uid
;
859 if (REGNO_LAST_NOTE_UID (src_regno
) == insn_uid
)
860 REGNO_LAST_NOTE_UID (src_regno
) = move_uid
;
865 /* Return whether REG is set in only one location, and is set to a
866 constant, but is set in a different basic block from INSN (an
867 instructions which uses REG). In this case REG is equivalent to a
868 constant, and we don't want to break that equivalence, because that
869 may increase register pressure and make reload harder. If REG is
870 set in the same basic block as INSN, we don't worry about it,
871 because we'll probably need a register anyhow (??? but what if REG
872 is used in a different basic block as well as this one?). FIRST is
873 the first insn in the function. */
876 reg_is_remote_constant_p (reg
, insn
, first
)
883 if (REG_N_SETS (REGNO (reg
)) != 1)
886 /* Look for the set. */
887 for (p
= LOG_LINKS (insn
); p
; p
= XEXP (p
, 1))
891 if (REG_NOTE_KIND (p
) != 0)
893 s
= single_set (XEXP (p
, 0));
895 && GET_CODE (SET_DEST (s
)) == REG
896 && REGNO (SET_DEST (s
)) == REGNO (reg
))
898 /* The register is set in the same basic block. */
903 for (p
= first
; p
&& p
!= insn
; p
= NEXT_INSN (p
))
907 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
911 && GET_CODE (SET_DEST (s
)) == REG
912 && REGNO (SET_DEST (s
)) == REGNO (reg
))
914 /* This is the instruction which sets REG. If there is a
915 REG_EQUAL note, then REG is equivalent to a constant. */
916 if (find_reg_note (p
, REG_EQUAL
, NULL_RTX
))
925 /* INSN is adding a CONST_INT to a REG. We search backwards looking for
926 another add immediate instruction with the same source and dest registers,
927 and if we find one, we change INSN to an increment, and return 1. If
928 no changes are made, we return 0.
931 (set (reg100) (plus reg1 offset1))
933 (set (reg100) (plus reg1 offset2))
935 (set (reg100) (plus reg1 offset1))
937 (set (reg100) (plus reg100 offset2-offset1)) */
939 /* ??? What does this comment mean? */
940 /* cse disrupts preincrement / postdecrement squences when it finds a
941 hard register as ultimate source, like the frame pointer. */
944 fixup_match_2 (insn
, dst
, src
, offset
, regmove_dump_file
)
945 rtx insn
, dst
, src
, offset
;
946 FILE *regmove_dump_file
;
948 rtx p
, dst_death
= 0;
949 int length
, num_calls
= 0;
951 /* If SRC dies in INSN, we'd have to move the death note. This is
952 considered to be very unlikely, so we just skip the optimization
954 if (find_regno_note (insn
, REG_DEAD
, REGNO (src
)))
957 /* Scan backward to find the first instruction that sets DST. */
959 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
963 if (GET_CODE (p
) == CODE_LABEL
964 || GET_CODE (p
) == JUMP_INSN
965 || (GET_CODE (p
) == NOTE
966 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
967 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
970 /* ??? We can't scan past the end of a basic block without updating
971 the register lifetime info (REG_DEAD/basic_block_live_at_start).
972 A CALL_INSN might be the last insn of a basic block, if it is inside
973 an EH region. There is no easy way to tell, so we just always break
974 when we see a CALL_INSN if flag_exceptions is nonzero. */
975 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
978 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
981 if (find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
986 pset
= single_set (p
);
987 if (pset
&& SET_DEST (pset
) == dst
988 && GET_CODE (SET_SRC (pset
)) == PLUS
989 && XEXP (SET_SRC (pset
), 0) == src
990 && GET_CODE (XEXP (SET_SRC (pset
), 1)) == CONST_INT
)
992 HOST_WIDE_INT newconst
993 = INTVAL (offset
) - INTVAL (XEXP (SET_SRC (pset
), 1));
994 rtx add
= gen_add3_insn (dst
, dst
, GEN_INT (newconst
));
996 if (add
&& validate_change (insn
, &PATTERN (insn
), add
, 0))
998 /* Remove the death note for DST from DST_DEATH. */
1001 remove_death (REGNO (dst
), dst_death
);
1002 REG_LIVE_LENGTH (REGNO (dst
)) += length
;
1003 REG_N_CALLS_CROSSED (REGNO (dst
)) += num_calls
;
1006 REG_N_REFS (REGNO (dst
)) += loop_depth
;
1007 REG_N_REFS (REGNO (src
)) -= loop_depth
;
1009 if (regmove_dump_file
)
1010 fprintf (regmove_dump_file
,
1011 "Fixed operand of insn %d.\n",
1015 for (p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1017 if (GET_CODE (p
) == CODE_LABEL
1018 || GET_CODE (p
) == JUMP_INSN
1019 || (GET_CODE (p
) == NOTE
1020 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1021 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1023 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1025 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1027 if (try_auto_increment (p
, insn
, 0, dst
, newconst
, 0))
1032 for (p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1034 if (GET_CODE (p
) == CODE_LABEL
1035 || GET_CODE (p
) == JUMP_INSN
1036 || (GET_CODE (p
) == NOTE
1037 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1038 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1040 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1042 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1044 try_auto_increment (p
, insn
, 0, dst
, newconst
, 1);
1053 if (reg_set_p (dst
, PATTERN (p
)))
1056 /* If we have passed a call instruction, and the
1057 pseudo-reg SRC is not already live across a call,
1058 then don't perform the optimization. */
1059 /* reg_set_p is overly conservative for CALL_INSNS, thinks that all
1060 hard regs are clobbered. Thus, we only use it for src for
1062 if (GET_CODE (p
) == CALL_INSN
)
1067 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1070 if (call_used_regs
[REGNO (dst
)]
1071 || find_reg_fusage (p
, CLOBBER
, dst
))
1074 else if (reg_set_p (src
, PATTERN (p
)))
1082 regmove_optimize (f
, nregs
, regmove_dump_file
)
1085 FILE *regmove_dump_file
;
1087 int old_max_uid
= get_max_uid ();
1092 rtx copy_src
, copy_dst
;
1094 /* Find out where a potential flags register is live, and so that we
1095 can supress some optimizations in those zones. */
1096 mark_flags_life_zones (discover_flags_reg ());
1098 regno_src_regno
= (int *)alloca (sizeof *regno_src_regno
* nregs
);
1099 for (i
= nregs
; --i
>= 0; ) regno_src_regno
[i
] = -1;
1101 regmove_bb_head
= (int *)alloca (sizeof (int) * (old_max_uid
+ 1));
1102 for (i
= old_max_uid
; i
>= 0; i
--) regmove_bb_head
[i
] = -1;
1103 for (i
= 0; i
< n_basic_blocks
; i
++)
1104 regmove_bb_head
[INSN_UID (BLOCK_HEAD (i
))] = i
;
1106 /* A forward/backward pass. Replace output operands with input operands. */
1110 for (pass
= 0; pass
<= 2; pass
++)
1112 if (! flag_regmove
&& pass
>= flag_expensive_optimizations
)
1115 if (regmove_dump_file
)
1116 fprintf (regmove_dump_file
, "Starting %s pass...\n",
1117 pass
? "backward" : "forward");
1119 for (insn
= pass
? get_last_insn () : f
; insn
;
1120 insn
= pass
? PREV_INSN (insn
) : NEXT_INSN (insn
))
1123 int op_no
, match_no
;
1125 if (GET_CODE (insn
) == NOTE
)
1127 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
1129 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
1133 set
= single_set (insn
);
1137 if (flag_expensive_optimizations
&& ! pass
1138 && (GET_CODE (SET_SRC (set
)) == SIGN_EXTEND
1139 || GET_CODE (SET_SRC (set
)) == ZERO_EXTEND
)
1140 && GET_CODE (XEXP (SET_SRC (set
), 0)) == REG
1141 && GET_CODE (SET_DEST(set
)) == REG
)
1142 optimize_reg_copy_3 (insn
, SET_DEST (set
), SET_SRC (set
));
1144 if (flag_expensive_optimizations
&& ! pass
1145 && GET_CODE (SET_SRC (set
)) == REG
1146 && GET_CODE (SET_DEST(set
)) == REG
)
1148 /* If this is a register-register copy where SRC is not dead,
1149 see if we can optimize it. If this optimization succeeds,
1150 it will become a copy where SRC is dead. */
1151 if ((find_reg_note (insn
, REG_DEAD
, SET_SRC (set
))
1152 || optimize_reg_copy_1 (insn
, SET_DEST (set
), SET_SRC (set
)))
1153 && REGNO (SET_DEST (set
)) >= FIRST_PSEUDO_REGISTER
)
1155 /* Similarly for a pseudo-pseudo copy when SRC is dead. */
1156 if (REGNO (SET_SRC (set
)) >= FIRST_PSEUDO_REGISTER
)
1157 optimize_reg_copy_2 (insn
, SET_DEST (set
), SET_SRC (set
));
1158 if (regno_src_regno
[REGNO (SET_DEST (set
))] < 0
1159 && SET_SRC (set
) != SET_DEST (set
))
1161 int srcregno
= REGNO (SET_SRC(set
));
1162 if (regno_src_regno
[srcregno
] >= 0)
1163 srcregno
= regno_src_regno
[srcregno
];
1164 regno_src_regno
[REGNO (SET_DEST (set
))] = srcregno
;
1171 if (! find_matches (insn
, &match
))
1174 /* Now scan through the operands looking for a source operand
1175 which is supposed to match the destination operand.
1176 Then scan forward for an instruction which uses the dest
1178 If it dies there, then replace the dest in both operands with
1179 the source operand. */
1181 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1183 rtx src
, dst
, src_subreg
;
1184 enum reg_class src_class
, dst_class
;
1186 match_no
= match
.with
[op_no
];
1188 /* Nothing to do if the two operands aren't supposed to match. */
1192 src
= recog_data
.operand
[op_no
];
1193 dst
= recog_data
.operand
[match_no
];
1195 if (GET_CODE (src
) != REG
)
1199 if (GET_CODE (dst
) == SUBREG
1200 && GET_MODE_SIZE (GET_MODE (dst
))
1201 >= GET_MODE_SIZE (GET_MODE (SUBREG_REG (dst
))))
1204 = gen_rtx_SUBREG (GET_MODE (SUBREG_REG (dst
)),
1205 src
, SUBREG_WORD (dst
));
1206 dst
= SUBREG_REG (dst
);
1208 if (GET_CODE (dst
) != REG
1209 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
)
1212 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1214 if (match
.commutative
[op_no
] < op_no
)
1215 regno_src_regno
[REGNO (dst
)] = REGNO (src
);
1219 if (REG_LIVE_LENGTH (REGNO (src
)) < 0)
1222 /* op_no/src must be a read-only operand, and
1223 match_operand/dst must be a write-only operand. */
1224 if (match
.use
[op_no
] != READ
1225 || match
.use
[match_no
] != WRITE
)
1228 if (match
.early_clobber
[match_no
]
1229 && count_occurrences (PATTERN (insn
), src
) > 1)
1232 /* Make sure match_operand is the destination. */
1233 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1236 /* If the operands already match, then there is nothing to do. */
1237 if (operands_match_p (src
, dst
))
1240 /* But in the commutative case, we might find a better match. */
1241 if (match
.commutative
[op_no
] >= 0)
1243 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1244 if (operands_match_p (comm
, dst
)
1245 && (replacement_quality (comm
)
1246 >= replacement_quality (src
)))
1250 src_class
= reg_preferred_class (REGNO (src
));
1251 dst_class
= reg_preferred_class (REGNO (dst
));
1252 if (! regclass_compatible_p (src_class
, dst_class
))
1255 if (fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, pass
,
1263 /* A backward pass. Replace input operands with output operands. */
1265 if (regmove_dump_file
)
1266 fprintf (regmove_dump_file
, "Starting backward pass...\n");
1270 for (insn
= get_last_insn (); insn
; insn
= PREV_INSN (insn
))
1272 if (GET_CODE (insn
) == NOTE
)
1274 if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_END
)
1276 else if (NOTE_LINE_NUMBER (insn
) == NOTE_INSN_LOOP_BEG
)
1279 if (GET_RTX_CLASS (GET_CODE (insn
)) == 'i')
1281 int op_no
, match_no
;
1284 if (! find_matches (insn
, &match
))
1287 /* Now scan through the operands looking for a destination operand
1288 which is supposed to match a source operand.
1289 Then scan backward for an instruction which sets the source
1290 operand. If safe, then replace the source operand with the
1291 dest operand in both instructions. */
1293 copy_src
= NULL_RTX
;
1294 copy_dst
= NULL_RTX
;
1295 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1297 rtx set
, p
, src
, dst
;
1298 rtx src_note
, dst_note
;
1300 enum reg_class src_class
, dst_class
;
1303 match_no
= match
.with
[op_no
];
1305 /* Nothing to do if the two operands aren't supposed to match. */
1309 dst
= recog_data
.operand
[match_no
];
1310 src
= recog_data
.operand
[op_no
];
1312 if (GET_CODE (src
) != REG
)
1315 if (GET_CODE (dst
) != REG
1316 || REGNO (dst
) < FIRST_PSEUDO_REGISTER
1317 || REG_LIVE_LENGTH (REGNO (dst
)) < 0)
1320 /* If the operands already match, then there is nothing to do. */
1321 if (operands_match_p (src
, dst
))
1324 if (match
.commutative
[op_no
] >= 0)
1326 rtx comm
= recog_data
.operand
[match
.commutative
[op_no
]];
1327 if (operands_match_p (comm
, dst
))
1331 set
= single_set (insn
);
1335 /* match_no/dst must be a write-only operand, and
1336 operand_operand/src must be a read-only operand. */
1337 if (match
.use
[op_no
] != READ
1338 || match
.use
[match_no
] != WRITE
)
1341 if (match
.early_clobber
[match_no
]
1342 && count_occurrences (PATTERN (insn
), src
) > 1)
1345 /* Make sure match_no is the destination. */
1346 if (recog_data
.operand
[match_no
] != SET_DEST (set
))
1349 if (REGNO (src
) < FIRST_PSEUDO_REGISTER
)
1351 if (GET_CODE (SET_SRC (set
)) == PLUS
1352 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
1353 && XEXP (SET_SRC (set
), 0) == src
1354 && fixup_match_2 (insn
, dst
, src
,
1355 XEXP (SET_SRC (set
), 1),
1360 src_class
= reg_preferred_class (REGNO (src
));
1361 dst_class
= reg_preferred_class (REGNO (dst
));
1362 if (! regclass_compatible_p (src_class
, dst_class
))
1372 /* Can not modify an earlier insn to set dst if this insn
1373 uses an old value in the source. */
1374 if (reg_overlap_mentioned_p (dst
, SET_SRC (set
)))
1384 if (! (src_note
= find_reg_note (insn
, REG_DEAD
, src
)))
1395 /* If src is set once in a different basic block,
1396 and is set equal to a constant, then do not use
1397 it for this optimization, as this would make it
1398 no longer equivalent to a constant. */
1400 if (reg_is_remote_constant_p (src
, insn
, f
))
1411 if (regmove_dump_file
)
1412 fprintf (regmove_dump_file
,
1413 "Could fix operand %d of insn %d matching operand %d.\n",
1414 op_no
, INSN_UID (insn
), match_no
);
1416 /* Scan backward to find the first instruction that uses
1417 the input operand. If the operand is set here, then
1418 replace it in both instructions with match_no. */
1420 for (length
= 0, p
= PREV_INSN (insn
); p
; p
= PREV_INSN (p
))
1424 if (GET_CODE (p
) == CODE_LABEL
1425 || GET_CODE (p
) == JUMP_INSN
1426 || (GET_CODE (p
) == NOTE
1427 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1428 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1431 /* ??? We can't scan past the end of a basic block without
1432 updating the register lifetime info
1433 (REG_DEAD/basic_block_live_at_start).
1434 A CALL_INSN might be the last insn of a basic block, if
1435 it is inside an EH region. There is no easy way to tell,
1436 so we just always break when we see a CALL_INSN if
1437 flag_exceptions is nonzero. */
1438 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
1441 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1446 /* ??? See if all of SRC is set in P. This test is much
1447 more conservative than it needs to be. */
1448 pset
= single_set (p
);
1449 if (pset
&& SET_DEST (pset
) == src
)
1451 /* We use validate_replace_rtx, in case there
1452 are multiple identical source operands. All of
1453 them have to be changed at the same time. */
1454 if (validate_replace_rtx (src
, dst
, insn
))
1456 if (validate_change (p
, &SET_DEST (pset
),
1461 /* Change all source operands back.
1462 This modifies the dst as a side-effect. */
1463 validate_replace_rtx (dst
, src
, insn
);
1464 /* Now make sure the dst is right. */
1465 validate_change (insn
,
1466 recog_data
.operand_loc
[match_no
],
1473 if (reg_overlap_mentioned_p (src
, PATTERN (p
))
1474 || reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1477 /* If we have passed a call instruction, and the
1478 pseudo-reg DST is not already live across a call,
1479 then don't perform the optimization. */
1480 if (GET_CODE (p
) == CALL_INSN
)
1484 if (REG_N_CALLS_CROSSED (REGNO (dst
)) == 0)
1493 /* Remove the death note for SRC from INSN. */
1494 remove_note (insn
, src_note
);
1495 /* Move the death note for SRC to P if it is used
1497 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1499 XEXP (src_note
, 1) = REG_NOTES (p
);
1500 REG_NOTES (p
) = src_note
;
1502 /* If there is a REG_DEAD note for DST on P, then remove
1503 it, because DST is now set there. */
1504 if ((dst_note
= find_reg_note (p
, REG_DEAD
, dst
)))
1505 remove_note (p
, dst_note
);
1507 dstno
= REGNO (dst
);
1508 srcno
= REGNO (src
);
1510 REG_N_SETS (dstno
)++;
1511 REG_N_SETS (srcno
)--;
1513 REG_N_CALLS_CROSSED (dstno
) += num_calls
;
1514 REG_N_CALLS_CROSSED (srcno
) -= num_calls
;
1516 REG_LIVE_LENGTH (dstno
) += length
;
1517 if (REG_LIVE_LENGTH (srcno
) >= 0)
1519 REG_LIVE_LENGTH (srcno
) -= length
;
1520 /* REG_LIVE_LENGTH is only an approximation after
1521 combine if sched is not run, so make sure that we
1522 still have a reasonable value. */
1523 if (REG_LIVE_LENGTH (srcno
) < 2)
1524 REG_LIVE_LENGTH (srcno
) = 2;
1527 /* We assume that a register is used exactly once per
1528 insn in the updates above. If this is not correct,
1529 no great harm is done. */
1531 REG_N_REFS (dstno
) += 2 * loop_depth
;
1532 REG_N_REFS (srcno
) -= 2 * loop_depth
;
1534 /* If that was the only time src was set,
1535 and src was not live at the start of the
1536 function, we know that we have no more
1537 references to src; clear REG_N_REFS so it
1538 won't make reload do any work. */
1539 if (REG_N_SETS (REGNO (src
)) == 0
1540 && ! regno_uninitialized (REGNO (src
)))
1541 REG_N_REFS (REGNO (src
)) = 0;
1543 if (regmove_dump_file
)
1544 fprintf (regmove_dump_file
,
1545 "Fixed operand %d of insn %d matching operand %d.\n",
1546 op_no
, INSN_UID (insn
), match_no
);
1552 /* If we weren't able to replace any of the alternatives, try an
1553 alternative appoach of copying the source to the destination. */
1554 if (!success
&& copy_src
!= NULL_RTX
)
1555 copy_src_to_dest (insn
, copy_src
, copy_dst
, loop_depth
,
1561 /* In fixup_match_1, some insns may have been inserted after basic block
1562 ends. Fix that here. */
1563 for (i
= 0; i
< n_basic_blocks
; i
++)
1565 rtx end
= BLOCK_END (i
);
1567 rtx next
= NEXT_INSN (new);
1568 while (next
!= 0 && INSN_UID (next
) >= old_max_uid
1569 && (i
== n_basic_blocks
- 1 || BLOCK_HEAD (i
+ 1) != next
))
1570 new = next
, next
= NEXT_INSN (new);
1571 BLOCK_END (i
) = new;
1575 /* Returns nonzero if INSN's pattern has matching constraints for any operand.
1576 Returns 0 if INSN can't be recognized, or if the alternative can't be
1579 Initialize the info in MATCHP based on the constraints. */
1582 find_matches (insn
, matchp
)
1584 struct match
*matchp
;
1586 int likely_spilled
[MAX_RECOG_OPERANDS
];
1588 int any_matches
= 0;
1590 extract_insn (insn
);
1591 if (! constrain_operands (0))
1594 /* Must initialize this before main loop, because the code for
1595 the commutative case may set matches for operands other than
1597 for (op_no
= recog_data
.n_operands
; --op_no
>= 0; )
1598 matchp
->with
[op_no
] = matchp
->commutative
[op_no
] = -1;
1600 for (op_no
= 0; op_no
< recog_data
.n_operands
; op_no
++)
1606 p
= recog_data
.constraints
[op_no
];
1608 likely_spilled
[op_no
] = 0;
1609 matchp
->use
[op_no
] = READ
;
1610 matchp
->early_clobber
[op_no
] = 0;
1612 matchp
->use
[op_no
] = WRITE
;
1614 matchp
->use
[op_no
] = READWRITE
;
1616 for (;*p
&& i
< which_alternative
; p
++)
1620 while ((c
= *p
++) != '\0' && c
!= ',')
1628 matchp
->early_clobber
[op_no
] = 1;
1631 matchp
->commutative
[op_no
] = op_no
+ 1;
1632 matchp
->commutative
[op_no
+ 1] = op_no
;
1634 case '0': case '1': case '2': case '3': case '4':
1635 case '5': case '6': case '7': case '8': case '9':
1637 if (c
< op_no
&& likely_spilled
[(unsigned char) c
])
1639 matchp
->with
[op_no
] = c
;
1641 if (matchp
->commutative
[op_no
] >= 0)
1642 matchp
->with
[matchp
->commutative
[op_no
]] = c
;
1644 case 'a': case 'b': case 'c': case 'd': case 'e': case 'f': case 'h':
1645 case 'j': case 'k': case 'l': case 'p': case 'q': case 't': case 'u':
1646 case 'v': case 'w': case 'x': case 'y': case 'z': case 'A': case 'B':
1647 case 'C': case 'D': case 'W': case 'Y': case 'Z':
1648 if (CLASS_LIKELY_SPILLED_P (REG_CLASS_FROM_LETTER ((unsigned char)c
)))
1649 likely_spilled
[op_no
] = 1;
1656 /* Try to replace output operand DST in SET, with input operand SRC. SET is
1657 the only set in INSN. INSN has just been recognized and constrained.
1658 SRC is operand number OPERAND_NUMBER in INSN.
1659 DST is operand number MATCH_NUMBER in INSN.
1660 If BACKWARD is nonzero, we have been called in a backward pass.
1661 Return nonzero for success. */
1663 fixup_match_1 (insn
, set
, src
, src_subreg
, dst
, backward
, operand_number
,
1664 match_number
, regmove_dump_file
)
1665 rtx insn
, set
, src
, src_subreg
, dst
;
1666 int backward
, operand_number
, match_number
;
1667 FILE *regmove_dump_file
;
1670 rtx post_inc
= 0, post_inc_set
= 0, search_end
= 0;
1672 int num_calls
= 0, s_num_calls
= 0;
1673 enum rtx_code code
= NOTE
;
1674 HOST_WIDE_INT insn_const
, newconst
;
1675 rtx overlap
= 0; /* need to move insn ? */
1676 rtx src_note
= find_reg_note (insn
, REG_DEAD
, src
), dst_note
;
1677 int length
, s_length
, true_loop_depth
;
1679 /* If SRC is marked as unchanging, we may not change it.
1680 ??? Maybe we could get better code by removing the unchanging bit
1681 instead, and changing it back if we don't succeed? */
1682 if (RTX_UNCHANGING_P (src
))
1687 /* Look for (set (regX) (op regA constX))
1688 (set (regY) (op regA constY))
1690 (set (regA) (op regA constX)).
1691 (set (regY) (op regA constY-constX)).
1692 This works for add and shift operations, if
1693 regA is dead after or set by the second insn. */
1695 code
= GET_CODE (SET_SRC (set
));
1696 if ((code
== PLUS
|| code
== LSHIFTRT
1697 || code
== ASHIFT
|| code
== ASHIFTRT
)
1698 && XEXP (SET_SRC (set
), 0) == src
1699 && GET_CODE (XEXP (SET_SRC (set
), 1)) == CONST_INT
)
1700 insn_const
= INTVAL (XEXP (SET_SRC (set
), 1));
1701 else if (! stable_and_no_regs_but_for_p (SET_SRC (set
), src
, dst
))
1704 /* We might find a src_note while scanning. */
1708 if (regmove_dump_file
)
1709 fprintf (regmove_dump_file
,
1710 "Could fix operand %d of insn %d matching operand %d.\n",
1711 operand_number
, INSN_UID (insn
), match_number
);
1713 /* If SRC is equivalent to a constant set in a different basic block,
1714 then do not use it for this optimization. We want the equivalence
1715 so that if we have to reload this register, we can reload the
1716 constant, rather than extending the lifespan of the register. */
1717 if (reg_is_remote_constant_p (src
, insn
, get_insns ()))
1720 /* Scan forward to find the next instruction that
1721 uses the output operand. If the operand dies here,
1722 then replace it in both instructions with
1725 for (length
= s_length
= 0, p
= NEXT_INSN (insn
); p
; p
= NEXT_INSN (p
))
1727 if (GET_CODE (p
) == CODE_LABEL
|| GET_CODE (p
) == JUMP_INSN
1728 || (GET_CODE (p
) == NOTE
1729 && (NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_BEG
1730 || NOTE_LINE_NUMBER (p
) == NOTE_INSN_LOOP_END
)))
1733 /* ??? We can't scan past the end of a basic block without updating
1734 the register lifetime info (REG_DEAD/basic_block_live_at_start).
1735 A CALL_INSN might be the last insn of a basic block, if it is
1736 inside an EH region. There is no easy way to tell, so we just
1737 always break when we see a CALL_INSN if flag_exceptions is nonzero. */
1738 if (flag_exceptions
&& GET_CODE (p
) == CALL_INSN
)
1741 if (GET_RTX_CLASS (GET_CODE (p
)) != 'i')
1748 if (reg_set_p (src
, p
) || reg_set_p (dst
, p
)
1749 || (GET_CODE (PATTERN (p
)) == USE
1750 && reg_overlap_mentioned_p (src
, XEXP (PATTERN (p
), 0))))
1753 /* See if all of DST dies in P. This test is
1754 slightly more conservative than it needs to be. */
1755 if ((dst_note
= find_regno_note (p
, REG_DEAD
, REGNO (dst
)))
1756 && (GET_MODE (XEXP (dst_note
, 0)) == GET_MODE (dst
)))
1758 /* If we would be moving INSN, check that we won't move it
1759 into the shadow of a live a live flags register. */
1760 /* ??? We only try to move it in front of P, although
1761 we could move it anywhere between OVERLAP and P. */
1762 if (overlap
&& GET_MODE (PREV_INSN (p
)) != VOIDmode
)
1770 /* If an optimization is done, the value of SRC while P
1771 is executed will be changed. Check that this is OK. */
1772 if (reg_overlap_mentioned_p (src
, PATTERN (p
)))
1774 for (q
= p
; q
; q
= NEXT_INSN (q
))
1776 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1777 || (GET_CODE (q
) == NOTE
1778 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1779 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1785 /* ??? We can't scan past the end of a basic block without
1786 updating the register lifetime info
1787 (REG_DEAD/basic_block_live_at_start).
1788 A CALL_INSN might be the last insn of a basic block, if
1789 it is inside an EH region. There is no easy way to tell,
1790 so we just always break when we see a CALL_INSN if
1791 flag_exceptions is nonzero. */
1792 if (flag_exceptions
&& GET_CODE (q
) == CALL_INSN
)
1798 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1800 if (reg_overlap_mentioned_p (src
, PATTERN (q
))
1801 || reg_set_p (src
, q
))
1805 set2
= single_set (q
);
1806 if (! q
|| ! set2
|| GET_CODE (SET_SRC (set2
)) != code
1807 || XEXP (SET_SRC (set2
), 0) != src
1808 || GET_CODE (XEXP (SET_SRC (set2
), 1)) != CONST_INT
1809 || (SET_DEST (set2
) != src
1810 && ! find_reg_note (q
, REG_DEAD
, src
)))
1812 /* If this is a PLUS, we can still save a register by doing
1815 src -= insn_const; .
1816 This also gives opportunities for subsequent
1817 optimizations in the backward pass, so do it there. */
1818 if (code
== PLUS
&& backward
1819 /* Don't do this if we can likely tie DST to SET_DEST
1820 of P later; we can't do this tying here if we got a
1822 && ! (dst_note
&& ! REG_N_CALLS_CROSSED (REGNO (dst
))
1824 && GET_CODE (SET_DEST (single_set (p
))) == REG
1825 && (REGNO (SET_DEST (single_set (p
)))
1826 < FIRST_PSEUDO_REGISTER
))
1827 /* We may only emit an insn directly after P if we
1828 are not in the shadow of a live flags register. */
1829 && GET_MODE (p
) == VOIDmode
)
1834 newconst
= -insn_const
;
1842 newconst
= INTVAL (XEXP (SET_SRC (set2
), 1)) - insn_const
;
1843 /* Reject out of range shifts. */
1847 >= GET_MODE_BITSIZE (GET_MODE (SET_SRC (set2
))))))
1852 if (SET_DEST (set2
) != src
)
1853 post_inc_set
= set2
;
1856 /* We use 1 as last argument to validate_change so that all
1857 changes are accepted or rejected together by apply_change_group
1858 when it is called by validate_replace_rtx . */
1859 validate_change (q
, &XEXP (SET_SRC (set2
), 1),
1860 GEN_INT (newconst
), 1);
1862 validate_change (insn
, recog_data
.operand_loc
[match_number
], src
, 1);
1863 if (validate_replace_rtx (dst
, src_subreg
, p
))
1868 if (reg_overlap_mentioned_p (dst
, PATTERN (p
)))
1870 if (! src_note
&& reg_overlap_mentioned_p (src
, PATTERN (p
)))
1872 /* INSN was already checked to be movable wrt. the registers that it
1873 sets / uses when we found no REG_DEAD note for src on it, but it
1874 still might clobber the flags register. We'll have to check that
1875 we won't insert it into the shadow of a live flags register when
1876 we finally know where we are to move it. */
1878 src_note
= find_reg_note (p
, REG_DEAD
, src
);
1881 /* If we have passed a call instruction, and the pseudo-reg SRC is not
1882 already live across a call, then don't perform the optimization. */
1883 if (GET_CODE (p
) == CALL_INSN
)
1885 if (REG_N_CALLS_CROSSED (REGNO (src
)) == 0)
1899 true_loop_depth
= backward
? 2 - loop_depth
: loop_depth
;
1901 /* Remove the death note for DST from P. */
1902 remove_note (p
, dst_note
);
1905 post_inc
= emit_insn_after (copy_rtx (PATTERN (insn
)), p
);
1906 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
1908 && try_auto_increment (search_end
, post_inc
, 0, src
, newconst
, 1))
1910 validate_change (insn
, &XEXP (SET_SRC (set
), 1), GEN_INT (insn_const
), 0);
1911 REG_N_SETS (REGNO (src
))++;
1912 REG_N_REFS (REGNO (src
)) += true_loop_depth
;
1913 REG_LIVE_LENGTH (REGNO (src
))++;
1917 /* The lifetime of src and dest overlap,
1918 but we can change this by moving insn. */
1919 rtx pat
= PATTERN (insn
);
1921 remove_note (overlap
, src_note
);
1922 if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
1924 && try_auto_increment (overlap
, insn
, 0, src
, insn_const
, 0))
1928 rtx notes
= REG_NOTES (insn
);
1930 emit_insn_after_with_line_notes (pat
, PREV_INSN (p
), insn
);
1931 PUT_CODE (insn
, NOTE
);
1932 NOTE_LINE_NUMBER (insn
) = NOTE_INSN_DELETED
;
1933 NOTE_SOURCE_FILE (insn
) = 0;
1934 /* emit_insn_after_with_line_notes has no
1935 return value, so search for the new insn. */
1937 while (GET_RTX_CLASS (GET_CODE (insn
)) != 'i'
1938 || PATTERN (insn
) != pat
)
1939 insn
= PREV_INSN (insn
);
1941 REG_NOTES (insn
) = notes
;
1944 /* Sometimes we'd generate src = const; src += n;
1945 if so, replace the instruction that set src
1946 in the first place. */
1948 if (! overlap
&& (code
== PLUS
|| code
== MINUS
))
1950 rtx note
= find_reg_note (insn
, REG_EQUAL
, NULL_RTX
);
1952 int num_calls2
= 0, s_length2
= 0;
1954 if (note
&& CONSTANT_P (XEXP (note
, 0)))
1956 for (q
= PREV_INSN (insn
); q
; q
= PREV_INSN(q
))
1958 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
1959 || (GET_CODE (q
) == NOTE
1960 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
1961 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
1967 /* ??? We can't scan past the end of a basic block without
1968 updating the register lifetime info
1969 (REG_DEAD/basic_block_live_at_start).
1970 A CALL_INSN might be the last insn of a basic block, if
1971 it is inside an EH region. There is no easy way to tell,
1972 so we just always break when we see a CALL_INSN if
1973 flag_exceptions is nonzero. */
1974 if (flag_exceptions
&& GET_CODE (q
) == CALL_INSN
)
1980 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
1983 if (reg_set_p (src
, q
))
1985 set2
= single_set (q
);
1988 if (reg_overlap_mentioned_p (src
, PATTERN (q
)))
1993 if (GET_CODE (p
) == CALL_INSN
)
1996 if (q
&& set2
&& SET_DEST (set2
) == src
&& CONSTANT_P (SET_SRC (set2
))
1997 && validate_change (insn
, &SET_SRC (set
), XEXP (note
, 0), 0))
2000 NOTE_LINE_NUMBER (q
) = NOTE_INSN_DELETED
;
2001 NOTE_SOURCE_FILE (q
) = 0;
2002 REG_N_SETS (REGNO (src
))--;
2003 REG_N_CALLS_CROSSED (REGNO (src
)) -= num_calls2
;
2004 REG_N_REFS (REGNO (src
)) -= true_loop_depth
;
2005 REG_LIVE_LENGTH (REGNO (src
)) -= s_length2
;
2011 if ((HAVE_PRE_INCREMENT
|| HAVE_PRE_DECREMENT
)
2012 && (code
== PLUS
|| code
== MINUS
) && insn_const
2013 && try_auto_increment (p
, insn
, 0, src
, insn_const
, 1))
2015 else if ((HAVE_POST_INCREMENT
|| HAVE_POST_DECREMENT
)
2017 && try_auto_increment (p
, post_inc
, post_inc_set
, src
, newconst
, 0))
2019 /* If post_inc still prevails, try to find an
2020 insn where it can be used as a pre-in/decrement.
2021 If code is MINUS, this was already tried. */
2022 if (post_inc
&& code
== PLUS
2023 /* Check that newconst is likely to be usable
2024 in a pre-in/decrement before starting the search. */
2025 && ((HAVE_PRE_INCREMENT
&& newconst
> 0 && newconst
<= MOVE_MAX
)
2026 || (HAVE_PRE_DECREMENT
&& newconst
< 0 && newconst
>= -MOVE_MAX
))
2027 && exact_log2 (newconst
))
2031 inc_dest
= post_inc_set
? SET_DEST (post_inc_set
) : src
;
2032 for (q
= post_inc
; (q
= NEXT_INSN (q
)); )
2034 if (GET_CODE (q
) == CODE_LABEL
|| GET_CODE (q
) == JUMP_INSN
2035 || (GET_CODE (q
) == NOTE
2036 && (NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_BEG
2037 || NOTE_LINE_NUMBER (q
) == NOTE_INSN_LOOP_END
)))
2040 /* ??? We can't scan past the end of a basic block without updating
2041 the register lifetime info (REG_DEAD/basic_block_live_at_start).
2042 A CALL_INSN might be the last insn of a basic block, if it
2043 is inside an EH region. There is no easy way to tell so we
2044 just always break when we see a CALL_INSN if flag_exceptions
2046 if (flag_exceptions
&& GET_CODE (q
) == CALL_INSN
)
2049 if (GET_RTX_CLASS (GET_CODE (q
)) != 'i')
2051 if (src
!= inc_dest
&& (reg_overlap_mentioned_p (src
, PATTERN (q
))
2052 || reg_set_p (src
, q
)))
2054 if (reg_set_p (inc_dest
, q
))
2056 if (reg_overlap_mentioned_p (inc_dest
, PATTERN (q
)))
2058 try_auto_increment (q
, post_inc
,
2059 post_inc_set
, inc_dest
, newconst
, 1);
2064 /* Move the death note for DST to INSN if it is used
2066 if (reg_overlap_mentioned_p (dst
, PATTERN (insn
)))
2068 XEXP (dst_note
, 1) = REG_NOTES (insn
);
2069 REG_NOTES (insn
) = dst_note
;
2074 /* Move the death note for SRC from INSN to P. */
2076 remove_note (insn
, src_note
);
2077 XEXP (src_note
, 1) = REG_NOTES (p
);
2078 REG_NOTES (p
) = src_note
;
2080 REG_N_CALLS_CROSSED (REGNO (src
)) += s_num_calls
;
2083 REG_N_SETS (REGNO (src
))++;
2084 REG_N_SETS (REGNO (dst
))--;
2086 REG_N_CALLS_CROSSED (REGNO (dst
)) -= num_calls
;
2088 REG_LIVE_LENGTH (REGNO (src
)) += s_length
;
2089 if (REG_LIVE_LENGTH (REGNO (dst
)) >= 0)
2091 REG_LIVE_LENGTH (REGNO (dst
)) -= length
;
2092 /* REG_LIVE_LENGTH is only an approximation after
2093 combine if sched is not run, so make sure that we
2094 still have a reasonable value. */
2095 if (REG_LIVE_LENGTH (REGNO (dst
)) < 2)
2096 REG_LIVE_LENGTH (REGNO (dst
)) = 2;
2099 /* We assume that a register is used exactly once per
2100 insn in the updates above. If this is not correct,
2101 no great harm is done. */
2103 REG_N_REFS (REGNO (src
)) += 2 * true_loop_depth
;
2104 REG_N_REFS (REGNO (dst
)) -= 2 * true_loop_depth
;
2106 /* If that was the only time dst was set,
2107 and dst was not live at the start of the
2108 function, we know that we have no more
2109 references to dst; clear REG_N_REFS so it
2110 won't make reload do any work. */
2111 if (REG_N_SETS (REGNO (dst
)) == 0
2112 && ! regno_uninitialized (REGNO (dst
)))
2113 REG_N_REFS (REGNO (dst
)) = 0;
2115 if (regmove_dump_file
)
2116 fprintf (regmove_dump_file
,
2117 "Fixed operand %d of insn %d matching operand %d.\n",
2118 operand_number
, INSN_UID (insn
), match_number
);
2123 /* return nonzero if X is stable and mentions no regsiters but for
2124 mentioning SRC or mentioning / changing DST . If in doubt, presume
2126 The rationale is that we want to check if we can move an insn easily
2127 while just paying attention to SRC and DST. A register is considered
2128 stable if it has the RTX_UNCHANGING_P bit set, but that would still
2129 leave the burden to update REG_DEAD / REG_UNUSED notes, so we don't
2130 want any registers but SRC and DST. */
2132 stable_and_no_regs_but_for_p (x
, src
, dst
)
2135 RTX_CODE code
= GET_CODE (x
);
2136 switch (GET_RTX_CLASS (code
))
2138 case '<': case '1': case 'c': case '2': case 'b': case '3':
2141 const char *fmt
= GET_RTX_FORMAT (code
);
2142 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2144 && ! stable_and_no_regs_but_for_p (XEXP (x
, i
), src
, dst
))
2150 return x
== src
|| x
== dst
;
2151 /* If this is a MEM, look inside - there might be a register hidden in
2152 the address of an unchanging MEM. */
2154 && ! stable_and_no_regs_but_for_p (XEXP (x
, 0), src
, dst
))
2158 return ! rtx_unstable_p (x
);