1 /* Search an insn for pseudo regs that must be in hard regs and are not.
2 Copyright (C) 1987, 1988, 1989, 1992, 1993, 1994, 1995, 1996, 1997, 1998,
3 1999, 2000 Free Software Foundation, Inc.
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 2, or (at your option)
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
23 /* This file contains subroutines used only from the file reload1.c.
24 It knows how to scan one insn for operands and values
25 that need to be copied into registers to make valid code.
26 It also finds other operands and values which are valid
27 but for which equivalent values in registers exist and
28 ought to be used instead.
30 Before processing the first insn of the function, call `init_reload'.
32 To scan an insn, call `find_reloads'. This does two things:
33 1. sets up tables describing which values must be reloaded
34 for this insn, and what kind of hard regs they must be reloaded into;
35 2. optionally record the locations where those values appear in
36 the data, so they can be replaced properly later.
37 This is done only if the second arg to `find_reloads' is nonzero.
39 The third arg to `find_reloads' specifies the number of levels
40 of indirect addressing supported by the machine. If it is zero,
41 indirect addressing is not valid. If it is one, (MEM (REG n))
42 is valid even if (REG n) did not get a hard register; if it is two,
43 (MEM (MEM (REG n))) is also valid even if (REG n) did not get a
44 hard register, and similarly for higher values.
46 Then you must choose the hard regs to reload those pseudo regs into,
47 and generate appropriate load insns before this insn and perhaps
48 also store insns after this insn. Set up the array `reload_reg_rtx'
49 to contain the REG rtx's for the registers you used. In some
50 cases `find_reloads' will return a nonzero value in `reload_reg_rtx'
51 for certain reloads. Then that tells you which register to use,
52 so you do not need to allocate one. But you still do need to add extra
53 instructions to copy the value into and out of that register.
55 Finally you must call `subst_reloads' to substitute the reload reg rtx's
56 into the locations already recorded.
60 find_reloads can alter the operands of the instruction it is called on.
62 1. Two operands of any sort may be interchanged, if they are in a
63 commutative instruction.
64 This happens only if find_reloads thinks the instruction will compile
67 2. Pseudo-registers that are equivalent to constants are replaced
68 with those constants if they are not in hard registers.
70 1 happens every time find_reloads is called.
71 2 happens only when REPLACE is 1, which is only when
72 actually doing the reloads, not when just counting them.
75 Using a reload register for several reloads in one insn:
77 When an insn has reloads, it is considered as having three parts:
78 the input reloads, the insn itself after reloading, and the output reloads.
79 Reloads of values used in memory addresses are often needed for only one part.
81 When this is so, reload_when_needed records which part needs the reload.
82 Two reloads for different parts of the insn can share the same reload
85 When a reload is used for addresses in multiple parts, or when it is
86 an ordinary operand, it is classified as RELOAD_OTHER, and cannot share
87 a register with any other reload. */
95 #include "insn-config.h"
96 #include "insn-codes.h"
100 #include "hard-reg-set.h"
104 #include "function.h"
108 #ifndef REGISTER_MOVE_COST
109 #define REGISTER_MOVE_COST(x, y) 2
112 #ifndef REGNO_MODE_OK_FOR_BASE_P
113 #define REGNO_MODE_OK_FOR_BASE_P(REGNO, MODE) REGNO_OK_FOR_BASE_P (REGNO)
116 #ifndef REG_MODE_OK_FOR_BASE_P
117 #define REG_MODE_OK_FOR_BASE_P(REGNO, MODE) REG_OK_FOR_BASE_P (REGNO)
120 /* All reloads of the current insn are recorded here. See reload.h for
123 struct reload rld
[MAX_RELOADS
];
125 /* All the "earlyclobber" operands of the current insn
126 are recorded here. */
128 rtx reload_earlyclobbers
[MAX_RECOG_OPERANDS
];
130 int reload_n_operands
;
132 /* Replacing reloads.
134 If `replace_reloads' is nonzero, then as each reload is recorded
135 an entry is made for it in the table `replacements'.
136 Then later `subst_reloads' can look through that table and
137 perform all the replacements needed. */
139 /* Nonzero means record the places to replace. */
140 static int replace_reloads
;
142 /* Each replacement is recorded with a structure like this. */
145 rtx
*where
; /* Location to store in */
146 rtx
*subreg_loc
; /* Location of SUBREG if WHERE is inside
147 a SUBREG; 0 otherwise. */
148 int what
; /* which reload this is for */
149 enum machine_mode mode
; /* mode it must have */
152 static struct replacement replacements
[MAX_RECOG_OPERANDS
* ((MAX_REGS_PER_ADDRESS
* 2) + 1)];
154 /* Number of replacements currently recorded. */
155 static int n_replacements
;
157 /* Used to track what is modified by an operand. */
160 int reg_flag
; /* Nonzero if referencing a register. */
161 int safe
; /* Nonzero if this can't conflict with anything. */
162 rtx base
; /* Base address for MEM. */
163 HOST_WIDE_INT start
; /* Starting offset or register number. */
164 HOST_WIDE_INT end
; /* Ending offset or register number. */
167 #ifdef SECONDARY_MEMORY_NEEDED
169 /* Save MEMs needed to copy from one class of registers to another. One MEM
170 is used per mode, but normally only one or two modes are ever used.
172 We keep two versions, before and after register elimination. The one
173 after register elimination is record separately for each operand. This
174 is done in case the address is not valid to be sure that we separately
177 static rtx secondary_memlocs
[NUM_MACHINE_MODES
];
178 static rtx secondary_memlocs_elim
[NUM_MACHINE_MODES
][MAX_RECOG_OPERANDS
];
181 /* The instruction we are doing reloads for;
182 so we can test whether a register dies in it. */
183 static rtx this_insn
;
185 /* Nonzero if this instruction is a user-specified asm with operands. */
186 static int this_insn_is_asm
;
188 /* If hard_regs_live_known is nonzero,
189 we can tell which hard regs are currently live,
190 at least enough to succeed in choosing dummy reloads. */
191 static int hard_regs_live_known
;
193 /* Indexed by hard reg number,
194 element is nonnegative if hard reg has been spilled.
195 This vector is passed to `find_reloads' as an argument
196 and is not changed here. */
197 static short *static_reload_reg_p
;
199 /* Set to 1 in subst_reg_equivs if it changes anything. */
200 static int subst_reg_equivs_changed
;
202 /* On return from push_reload, holds the reload-number for the OUT
203 operand, which can be different for that from the input operand. */
204 static int output_reloadnum
;
206 /* Compare two RTX's. */
207 #define MATCHES(x, y) \
208 (x == y || (x != 0 && (GET_CODE (x) == REG \
209 ? GET_CODE (y) == REG && REGNO (x) == REGNO (y) \
210 : rtx_equal_p (x, y) && ! side_effects_p (x))))
212 /* Indicates if two reloads purposes are for similar enough things that we
213 can merge their reloads. */
214 #define MERGABLE_RELOADS(when1, when2, op1, op2) \
215 ((when1) == RELOAD_OTHER || (when2) == RELOAD_OTHER \
216 || ((when1) == (when2) && (op1) == (op2)) \
217 || ((when1) == RELOAD_FOR_INPUT && (when2) == RELOAD_FOR_INPUT) \
218 || ((when1) == RELOAD_FOR_OPERAND_ADDRESS \
219 && (when2) == RELOAD_FOR_OPERAND_ADDRESS) \
220 || ((when1) == RELOAD_FOR_OTHER_ADDRESS \
221 && (when2) == RELOAD_FOR_OTHER_ADDRESS))
223 /* Nonzero if these two reload purposes produce RELOAD_OTHER when merged. */
224 #define MERGE_TO_OTHER(when1, when2, op1, op2) \
225 ((when1) != (when2) \
226 || ! ((op1) == (op2) \
227 || (when1) == RELOAD_FOR_INPUT \
228 || (when1) == RELOAD_FOR_OPERAND_ADDRESS \
229 || (when1) == RELOAD_FOR_OTHER_ADDRESS))
231 /* If we are going to reload an address, compute the reload type to
233 #define ADDR_TYPE(type) \
234 ((type) == RELOAD_FOR_INPUT_ADDRESS \
235 ? RELOAD_FOR_INPADDR_ADDRESS \
236 : ((type) == RELOAD_FOR_OUTPUT_ADDRESS \
237 ? RELOAD_FOR_OUTADDR_ADDRESS \
240 #ifdef HAVE_SECONDARY_RELOADS
241 static int push_secondary_reload
PARAMS ((int, rtx
, int, int, enum reg_class
,
242 enum machine_mode
, enum reload_type
,
245 static enum reg_class find_valid_class
PARAMS ((enum machine_mode
, int));
246 static int push_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*, enum reg_class
,
247 enum machine_mode
, enum machine_mode
,
248 int, int, int, enum reload_type
));
249 static void push_replacement
PARAMS ((rtx
*, int, enum machine_mode
));
250 static void combine_reloads
PARAMS ((void));
251 static int find_reusable_reload
PARAMS ((rtx
*, rtx
, enum reg_class
,
252 enum reload_type
, int, int));
253 static rtx find_dummy_reload
PARAMS ((rtx
, rtx
, rtx
*, rtx
*,
254 enum machine_mode
, enum machine_mode
,
255 enum reg_class
, int, int));
256 static int hard_reg_set_here_p
PARAMS ((unsigned int, unsigned int, rtx
));
257 static struct decomposition decompose
PARAMS ((rtx
));
258 static int immune_p
PARAMS ((rtx
, rtx
, struct decomposition
));
259 static int alternative_allows_memconst
PARAMS ((const char *, int));
260 static rtx find_reloads_toplev
PARAMS ((rtx
, int, enum reload_type
, int,
262 static rtx make_memloc
PARAMS ((rtx
, int));
263 static int find_reloads_address
PARAMS ((enum machine_mode
, rtx
*, rtx
, rtx
*,
264 int, enum reload_type
, int, rtx
));
265 static rtx subst_reg_equivs
PARAMS ((rtx
, rtx
));
266 static rtx subst_indexed_address
PARAMS ((rtx
));
267 static int find_reloads_address_1
PARAMS ((enum machine_mode
, rtx
, int, rtx
*,
268 int, enum reload_type
,int, rtx
));
269 static void find_reloads_address_part
PARAMS ((rtx
, rtx
*, enum reg_class
,
270 enum machine_mode
, int,
271 enum reload_type
, int));
272 static rtx find_reloads_subreg_address
PARAMS ((rtx
, int, int, enum reload_type
,
274 static int find_inc_amount
PARAMS ((rtx
, rtx
));
275 extern void debug_reload_to_stream
PARAMS ((FILE *));
276 extern void debug_reload
PARAMS ((void));
278 #ifdef HAVE_SECONDARY_RELOADS
280 /* Determine if any secondary reloads are needed for loading (if IN_P is
281 non-zero) or storing (if IN_P is zero) X to or from a reload register of
282 register class RELOAD_CLASS in mode RELOAD_MODE. If secondary reloads
283 are needed, push them.
285 Return the reload number of the secondary reload we made, or -1 if
286 we didn't need one. *PICODE is set to the insn_code to use if we do
287 need a secondary reload. */
290 push_secondary_reload (in_p
, x
, opnum
, optional
, reload_class
, reload_mode
,
296 enum reg_class reload_class
;
297 enum machine_mode reload_mode
;
298 enum reload_type type
;
299 enum insn_code
*picode
;
301 enum reg_class
class = NO_REGS
;
302 enum machine_mode mode
= reload_mode
;
303 enum insn_code icode
= CODE_FOR_nothing
;
304 enum reg_class t_class
= NO_REGS
;
305 enum machine_mode t_mode
= VOIDmode
;
306 enum insn_code t_icode
= CODE_FOR_nothing
;
307 enum reload_type secondary_type
;
308 int s_reload
, t_reload
= -1;
310 if (type
== RELOAD_FOR_INPUT_ADDRESS
311 || type
== RELOAD_FOR_OUTPUT_ADDRESS
312 || type
== RELOAD_FOR_INPADDR_ADDRESS
313 || type
== RELOAD_FOR_OUTADDR_ADDRESS
)
314 secondary_type
= type
;
316 secondary_type
= in_p
? RELOAD_FOR_INPUT_ADDRESS
: RELOAD_FOR_OUTPUT_ADDRESS
;
318 *picode
= CODE_FOR_nothing
;
320 /* If X is a paradoxical SUBREG, use the inner value to determine both the
321 mode and object being reloaded. */
322 if (GET_CODE (x
) == SUBREG
323 && (GET_MODE_SIZE (GET_MODE (x
))
324 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
327 reload_mode
= GET_MODE (x
);
330 /* If X is a pseudo-register that has an equivalent MEM (actually, if it
331 is still a pseudo-register by now, it *must* have an equivalent MEM
332 but we don't want to assume that), use that equivalent when seeing if
333 a secondary reload is needed since whether or not a reload is needed
334 might be sensitive to the form of the MEM. */
336 if (GET_CODE (x
) == REG
&& REGNO (x
) >= FIRST_PSEUDO_REGISTER
337 && reg_equiv_mem
[REGNO (x
)] != 0)
338 x
= reg_equiv_mem
[REGNO (x
)];
340 #ifdef SECONDARY_INPUT_RELOAD_CLASS
342 class = SECONDARY_INPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
345 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
347 class = SECONDARY_OUTPUT_RELOAD_CLASS (reload_class
, reload_mode
, x
);
350 /* If we don't need any secondary registers, done. */
351 if (class == NO_REGS
)
354 /* Get a possible insn to use. If the predicate doesn't accept X, don't
357 icode
= (in_p
? reload_in_optab
[(int) reload_mode
]
358 : reload_out_optab
[(int) reload_mode
]);
360 if (icode
!= CODE_FOR_nothing
361 && insn_data
[(int) icode
].operand
[in_p
].predicate
362 && (! (insn_data
[(int) icode
].operand
[in_p
].predicate
) (x
, reload_mode
)))
363 icode
= CODE_FOR_nothing
;
365 /* If we will be using an insn, see if it can directly handle the reload
366 register we will be using. If it can, the secondary reload is for a
367 scratch register. If it can't, we will use the secondary reload for
368 an intermediate register and require a tertiary reload for the scratch
371 if (icode
!= CODE_FOR_nothing
)
373 /* If IN_P is non-zero, the reload register will be the output in
374 operand 0. If IN_P is zero, the reload register will be the input
375 in operand 1. Outputs should have an initial "=", which we must
379 = insn_data
[(int) icode
].operand
[!in_p
].constraint
[in_p
];
380 enum reg_class insn_class
381 = (insn_letter
== 'r' ? GENERAL_REGS
382 : REG_CLASS_FROM_LETTER ((unsigned char) insn_letter
));
384 if (insn_class
== NO_REGS
386 && insn_data
[(int) icode
].operand
[!in_p
].constraint
[0] != '=')
387 /* The scratch register's constraint must start with "=&". */
388 || insn_data
[(int) icode
].operand
[2].constraint
[0] != '='
389 || insn_data
[(int) icode
].operand
[2].constraint
[1] != '&')
392 if (reg_class_subset_p (reload_class
, insn_class
))
393 mode
= insn_data
[(int) icode
].operand
[2].mode
;
396 char t_letter
= insn_data
[(int) icode
].operand
[2].constraint
[2];
398 t_mode
= insn_data
[(int) icode
].operand
[2].mode
;
399 t_class
= (t_letter
== 'r' ? GENERAL_REGS
400 : REG_CLASS_FROM_LETTER ((unsigned char) t_letter
));
402 icode
= CODE_FOR_nothing
;
405 secondary_type
= in_p
? RELOAD_FOR_INPUT
: RELOAD_FOR_OUTPUT
;
408 /* This case isn't valid, so fail. Reload is allowed to use the same
409 register for RELOAD_FOR_INPUT_ADDRESS and RELOAD_FOR_INPUT reloads, but
410 in the case of a secondary register, we actually need two different
411 registers for correct code. We fail here to prevent the possibility of
412 silently generating incorrect code later.
414 The convention is that secondary input reloads are valid only if the
415 secondary_class is different from class. If you have such a case, you
416 can not use secondary reloads, you must work around the problem some
419 Allow this when MODE is not reload_mode and assume that the generated
420 code handles this case (it does on the Alpha, which is the only place
421 this currently happens). */
423 if (in_p
&& class == reload_class
&& mode
== reload_mode
)
426 /* If we need a tertiary reload, see if we have one we can reuse or else
429 if (t_class
!= NO_REGS
)
431 for (t_reload
= 0; t_reload
< n_reloads
; t_reload
++)
432 if (rld
[t_reload
].secondary_p
433 && (reg_class_subset_p (t_class
, rld
[t_reload
].class)
434 || reg_class_subset_p (rld
[t_reload
].class, t_class
))
435 && ((in_p
&& rld
[t_reload
].inmode
== t_mode
)
436 || (! in_p
&& rld
[t_reload
].outmode
== t_mode
))
437 && ((in_p
&& (rld
[t_reload
].secondary_in_icode
438 == CODE_FOR_nothing
))
439 || (! in_p
&&(rld
[t_reload
].secondary_out_icode
440 == CODE_FOR_nothing
)))
441 && (reg_class_size
[(int) t_class
] == 1 || SMALL_REGISTER_CLASSES
)
442 && MERGABLE_RELOADS (secondary_type
,
443 rld
[t_reload
].when_needed
,
444 opnum
, rld
[t_reload
].opnum
))
447 rld
[t_reload
].inmode
= t_mode
;
449 rld
[t_reload
].outmode
= t_mode
;
451 if (reg_class_subset_p (t_class
, rld
[t_reload
].class))
452 rld
[t_reload
].class = t_class
;
454 rld
[t_reload
].opnum
= MIN (rld
[t_reload
].opnum
, opnum
);
455 rld
[t_reload
].optional
&= optional
;
456 rld
[t_reload
].secondary_p
= 1;
457 if (MERGE_TO_OTHER (secondary_type
, rld
[t_reload
].when_needed
,
458 opnum
, rld
[t_reload
].opnum
))
459 rld
[t_reload
].when_needed
= RELOAD_OTHER
;
462 if (t_reload
== n_reloads
)
464 /* We need to make a new tertiary reload for this register class. */
465 rld
[t_reload
].in
= rld
[t_reload
].out
= 0;
466 rld
[t_reload
].class = t_class
;
467 rld
[t_reload
].inmode
= in_p
? t_mode
: VOIDmode
;
468 rld
[t_reload
].outmode
= ! in_p
? t_mode
: VOIDmode
;
469 rld
[t_reload
].reg_rtx
= 0;
470 rld
[t_reload
].optional
= optional
;
471 rld
[t_reload
].inc
= 0;
472 /* Maybe we could combine these, but it seems too tricky. */
473 rld
[t_reload
].nocombine
= 1;
474 rld
[t_reload
].in_reg
= 0;
475 rld
[t_reload
].out_reg
= 0;
476 rld
[t_reload
].opnum
= opnum
;
477 rld
[t_reload
].when_needed
= secondary_type
;
478 rld
[t_reload
].secondary_in_reload
= -1;
479 rld
[t_reload
].secondary_out_reload
= -1;
480 rld
[t_reload
].secondary_in_icode
= CODE_FOR_nothing
;
481 rld
[t_reload
].secondary_out_icode
= CODE_FOR_nothing
;
482 rld
[t_reload
].secondary_p
= 1;
488 /* See if we can reuse an existing secondary reload. */
489 for (s_reload
= 0; s_reload
< n_reloads
; s_reload
++)
490 if (rld
[s_reload
].secondary_p
491 && (reg_class_subset_p (class, rld
[s_reload
].class)
492 || reg_class_subset_p (rld
[s_reload
].class, class))
493 && ((in_p
&& rld
[s_reload
].inmode
== mode
)
494 || (! in_p
&& rld
[s_reload
].outmode
== mode
))
495 && ((in_p
&& rld
[s_reload
].secondary_in_reload
== t_reload
)
496 || (! in_p
&& rld
[s_reload
].secondary_out_reload
== t_reload
))
497 && ((in_p
&& rld
[s_reload
].secondary_in_icode
== t_icode
)
498 || (! in_p
&& rld
[s_reload
].secondary_out_icode
== t_icode
))
499 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
500 && MERGABLE_RELOADS (secondary_type
, rld
[s_reload
].when_needed
,
501 opnum
, rld
[s_reload
].opnum
))
504 rld
[s_reload
].inmode
= mode
;
506 rld
[s_reload
].outmode
= mode
;
508 if (reg_class_subset_p (class, rld
[s_reload
].class))
509 rld
[s_reload
].class = class;
511 rld
[s_reload
].opnum
= MIN (rld
[s_reload
].opnum
, opnum
);
512 rld
[s_reload
].optional
&= optional
;
513 rld
[s_reload
].secondary_p
= 1;
514 if (MERGE_TO_OTHER (secondary_type
, rld
[s_reload
].when_needed
,
515 opnum
, rld
[s_reload
].opnum
))
516 rld
[s_reload
].when_needed
= RELOAD_OTHER
;
519 if (s_reload
== n_reloads
)
521 #ifdef SECONDARY_MEMORY_NEEDED
522 /* If we need a memory location to copy between the two reload regs,
523 set it up now. Note that we do the input case before making
524 the reload and the output case after. This is due to the
525 way reloads are output. */
527 if (in_p
&& icode
== CODE_FOR_nothing
528 && SECONDARY_MEMORY_NEEDED (class, reload_class
, mode
))
530 get_secondary_mem (x
, reload_mode
, opnum
, type
);
532 /* We may have just added new reloads. Make sure we add
533 the new reload at the end. */
534 s_reload
= n_reloads
;
538 /* We need to make a new secondary reload for this register class. */
539 rld
[s_reload
].in
= rld
[s_reload
].out
= 0;
540 rld
[s_reload
].class = class;
542 rld
[s_reload
].inmode
= in_p
? mode
: VOIDmode
;
543 rld
[s_reload
].outmode
= ! in_p
? mode
: VOIDmode
;
544 rld
[s_reload
].reg_rtx
= 0;
545 rld
[s_reload
].optional
= optional
;
546 rld
[s_reload
].inc
= 0;
547 /* Maybe we could combine these, but it seems too tricky. */
548 rld
[s_reload
].nocombine
= 1;
549 rld
[s_reload
].in_reg
= 0;
550 rld
[s_reload
].out_reg
= 0;
551 rld
[s_reload
].opnum
= opnum
;
552 rld
[s_reload
].when_needed
= secondary_type
;
553 rld
[s_reload
].secondary_in_reload
= in_p
? t_reload
: -1;
554 rld
[s_reload
].secondary_out_reload
= ! in_p
? t_reload
: -1;
555 rld
[s_reload
].secondary_in_icode
= in_p
? t_icode
: CODE_FOR_nothing
;
556 rld
[s_reload
].secondary_out_icode
557 = ! in_p
? t_icode
: CODE_FOR_nothing
;
558 rld
[s_reload
].secondary_p
= 1;
562 #ifdef SECONDARY_MEMORY_NEEDED
563 if (! in_p
&& icode
== CODE_FOR_nothing
564 && SECONDARY_MEMORY_NEEDED (reload_class
, class, mode
))
565 get_secondary_mem (x
, mode
, opnum
, type
);
572 #endif /* HAVE_SECONDARY_RELOADS */
574 #ifdef SECONDARY_MEMORY_NEEDED
576 /* Return a memory location that will be used to copy X in mode MODE.
577 If we haven't already made a location for this mode in this insn,
578 call find_reloads_address on the location being returned. */
581 get_secondary_mem (x
, mode
, opnum
, type
)
582 rtx x ATTRIBUTE_UNUSED
;
583 enum machine_mode mode
;
585 enum reload_type type
;
590 /* By default, if MODE is narrower than a word, widen it to a word.
591 This is required because most machines that require these memory
592 locations do not support short load and stores from all registers
593 (e.g., FP registers). */
595 #ifdef SECONDARY_MEMORY_NEEDED_MODE
596 mode
= SECONDARY_MEMORY_NEEDED_MODE (mode
);
598 if (GET_MODE_BITSIZE (mode
) < BITS_PER_WORD
&& INTEGRAL_MODE_P (mode
))
599 mode
= mode_for_size (BITS_PER_WORD
, GET_MODE_CLASS (mode
), 0);
602 /* If we already have made a MEM for this operand in MODE, return it. */
603 if (secondary_memlocs_elim
[(int) mode
][opnum
] != 0)
604 return secondary_memlocs_elim
[(int) mode
][opnum
];
606 /* If this is the first time we've tried to get a MEM for this mode,
607 allocate a new one. `something_changed' in reload will get set
608 by noticing that the frame size has changed. */
610 if (secondary_memlocs
[(int) mode
] == 0)
612 #ifdef SECONDARY_MEMORY_NEEDED_RTX
613 secondary_memlocs
[(int) mode
] = SECONDARY_MEMORY_NEEDED_RTX (mode
);
615 secondary_memlocs
[(int) mode
]
616 = assign_stack_local (mode
, GET_MODE_SIZE (mode
), 0);
620 /* Get a version of the address doing any eliminations needed. If that
621 didn't give us a new MEM, make a new one if it isn't valid. */
623 loc
= eliminate_regs (secondary_memlocs
[(int) mode
], VOIDmode
, NULL_RTX
);
624 mem_valid
= strict_memory_address_p (mode
, XEXP (loc
, 0));
626 if (! mem_valid
&& loc
== secondary_memlocs
[(int) mode
])
627 loc
= copy_rtx (loc
);
629 /* The only time the call below will do anything is if the stack
630 offset is too large. In that case IND_LEVELS doesn't matter, so we
631 can just pass a zero. Adjust the type to be the address of the
632 corresponding object. If the address was valid, save the eliminated
633 address. If it wasn't valid, we need to make a reload each time, so
638 type
= (type
== RELOAD_FOR_INPUT
? RELOAD_FOR_INPUT_ADDRESS
639 : type
== RELOAD_FOR_OUTPUT
? RELOAD_FOR_OUTPUT_ADDRESS
642 find_reloads_address (mode
, NULL_PTR
, XEXP (loc
, 0), &XEXP (loc
, 0),
646 secondary_memlocs_elim
[(int) mode
][opnum
] = loc
;
650 /* Clear any secondary memory locations we've made. */
653 clear_secondary_mem ()
655 bzero ((char *) secondary_memlocs
, sizeof secondary_memlocs
);
657 #endif /* SECONDARY_MEMORY_NEEDED */
659 /* Find the largest class for which every register number plus N is valid in
660 M1 (if in range). Abort if no such class exists. */
662 static enum reg_class
663 find_valid_class (m1
, n
)
664 enum machine_mode m1 ATTRIBUTE_UNUSED
;
669 enum reg_class best_class
= NO_REGS
;
670 unsigned int best_size
= 0;
672 for (class = 1; class < N_REG_CLASSES
; class++)
675 for (regno
= 0; regno
< FIRST_PSEUDO_REGISTER
&& ! bad
; regno
++)
676 if (TEST_HARD_REG_BIT (reg_class_contents
[class], regno
)
677 && TEST_HARD_REG_BIT (reg_class_contents
[class], regno
+ n
)
678 && ! HARD_REGNO_MODE_OK (regno
+ n
, m1
))
681 if (! bad
&& reg_class_size
[class] > best_size
)
682 best_class
= class, best_size
= reg_class_size
[class];
691 /* Return the number of a previously made reload that can be combined with
692 a new one, or n_reloads if none of the existing reloads can be used.
693 OUT, CLASS, TYPE and OPNUM are the same arguments as passed to
694 push_reload, they determine the kind of the new reload that we try to
695 combine. P_IN points to the corresponding value of IN, which can be
696 modified by this function.
697 DONT_SHARE is nonzero if we can't share any input-only reload for IN. */
699 find_reusable_reload (p_in
, out
, class, type
, opnum
, dont_share
)
701 enum reg_class
class;
702 enum reload_type type
;
703 int opnum
, dont_share
;
707 /* We can't merge two reloads if the output of either one is
710 if (earlyclobber_operand_p (out
))
713 /* We can use an existing reload if the class is right
714 and at least one of IN and OUT is a match
715 and the other is at worst neutral.
716 (A zero compared against anything is neutral.)
718 If SMALL_REGISTER_CLASSES, don't use existing reloads unless they are
719 for the same thing since that can cause us to need more reload registers
720 than we otherwise would. */
722 for (i
= 0; i
< n_reloads
; i
++)
723 if ((reg_class_subset_p (class, rld
[i
].class)
724 || reg_class_subset_p (rld
[i
].class, class))
725 /* If the existing reload has a register, it must fit our class. */
726 && (rld
[i
].reg_rtx
== 0
727 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
728 true_regnum (rld
[i
].reg_rtx
)))
729 && ((in
!= 0 && MATCHES (rld
[i
].in
, in
) && ! dont_share
730 && (out
== 0 || rld
[i
].out
== 0 || MATCHES (rld
[i
].out
, out
)))
731 || (out
!= 0 && MATCHES (rld
[i
].out
, out
)
732 && (in
== 0 || rld
[i
].in
== 0 || MATCHES (rld
[i
].in
, in
))))
733 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
734 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
735 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
, opnum
, rld
[i
].opnum
))
738 /* Reloading a plain reg for input can match a reload to postincrement
739 that reg, since the postincrement's value is the right value.
740 Likewise, it can match a preincrement reload, since we regard
741 the preincrementation as happening before any ref in this insn
743 for (i
= 0; i
< n_reloads
; i
++)
744 if ((reg_class_subset_p (class, rld
[i
].class)
745 || reg_class_subset_p (rld
[i
].class, class))
746 /* If the existing reload has a register, it must fit our
748 && (rld
[i
].reg_rtx
== 0
749 || TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
750 true_regnum (rld
[i
].reg_rtx
)))
751 && out
== 0 && rld
[i
].out
== 0 && rld
[i
].in
!= 0
752 && ((GET_CODE (in
) == REG
753 && GET_RTX_CLASS (GET_CODE (rld
[i
].in
)) == 'a'
754 && MATCHES (XEXP (rld
[i
].in
, 0), in
))
755 || (GET_CODE (rld
[i
].in
) == REG
756 && GET_RTX_CLASS (GET_CODE (in
)) == 'a'
757 && MATCHES (XEXP (in
, 0), rld
[i
].in
)))
758 && (rld
[i
].out
== 0 || ! earlyclobber_operand_p (rld
[i
].out
))
759 && (reg_class_size
[(int) class] == 1 || SMALL_REGISTER_CLASSES
)
760 && MERGABLE_RELOADS (type
, rld
[i
].when_needed
,
761 opnum
, rld
[i
].opnum
))
763 /* Make sure reload_in ultimately has the increment,
764 not the plain register. */
765 if (GET_CODE (in
) == REG
)
772 /* Record one reload that needs to be performed.
773 IN is an rtx saying where the data are to be found before this instruction.
774 OUT says where they must be stored after the instruction.
775 (IN is zero for data not read, and OUT is zero for data not written.)
776 INLOC and OUTLOC point to the places in the instructions where
777 IN and OUT were found.
778 If IN and OUT are both non-zero, it means the same register must be used
779 to reload both IN and OUT.
781 CLASS is a register class required for the reloaded data.
782 INMODE is the machine mode that the instruction requires
783 for the reg that replaces IN and OUTMODE is likewise for OUT.
785 If IN is zero, then OUT's location and mode should be passed as
788 STRICT_LOW is the 1 if there is a containing STRICT_LOW_PART rtx.
790 OPTIONAL nonzero means this reload does not need to be performed:
791 it can be discarded if that is more convenient.
793 OPNUM and TYPE say what the purpose of this reload is.
795 The return value is the reload-number for this reload.
797 If both IN and OUT are nonzero, in some rare cases we might
798 want to make two separate reloads. (Actually we never do this now.)
799 Therefore, the reload-number for OUT is stored in
800 output_reloadnum when we return; the return value applies to IN.
801 Usually (presently always), when IN and OUT are nonzero,
802 the two reload-numbers are equal, but the caller should be careful to
806 push_reload (in
, out
, inloc
, outloc
, class,
807 inmode
, outmode
, strict_low
, optional
, opnum
, type
)
810 enum reg_class
class;
811 enum machine_mode inmode
, outmode
;
815 enum reload_type type
;
819 int dont_remove_subreg
= 0;
820 rtx
*in_subreg_loc
= 0, *out_subreg_loc
= 0;
821 int secondary_in_reload
= -1, secondary_out_reload
= -1;
822 enum insn_code secondary_in_icode
= CODE_FOR_nothing
;
823 enum insn_code secondary_out_icode
= CODE_FOR_nothing
;
825 /* INMODE and/or OUTMODE could be VOIDmode if no mode
826 has been specified for the operand. In that case,
827 use the operand's mode as the mode to reload. */
828 if (inmode
== VOIDmode
&& in
!= 0)
829 inmode
= GET_MODE (in
);
830 if (outmode
== VOIDmode
&& out
!= 0)
831 outmode
= GET_MODE (out
);
833 /* If IN is a pseudo register everywhere-equivalent to a constant, and
834 it is not in a hard register, reload straight from the constant,
835 since we want to get rid of such pseudo registers.
836 Often this is done earlier, but not always in find_reloads_address. */
837 if (in
!= 0 && GET_CODE (in
) == REG
)
839 register int regno
= REGNO (in
);
841 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
842 && reg_equiv_constant
[regno
] != 0)
843 in
= reg_equiv_constant
[regno
];
846 /* Likewise for OUT. Of course, OUT will never be equivalent to
847 an actual constant, but it might be equivalent to a memory location
848 (in the case of a parameter). */
849 if (out
!= 0 && GET_CODE (out
) == REG
)
851 register int regno
= REGNO (out
);
853 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
854 && reg_equiv_constant
[regno
] != 0)
855 out
= reg_equiv_constant
[regno
];
858 /* If we have a read-write operand with an address side-effect,
859 change either IN or OUT so the side-effect happens only once. */
860 if (in
!= 0 && out
!= 0 && GET_CODE (in
) == MEM
&& rtx_equal_p (in
, out
))
862 if (GET_CODE (XEXP (in
, 0)) == POST_INC
863 || GET_CODE (XEXP (in
, 0)) == POST_DEC
864 || GET_CODE (XEXP (in
, 0)) == POST_MODIFY
)
866 rtx
new = gen_rtx_MEM (GET_MODE (in
), XEXP (XEXP (in
, 0), 0));
868 MEM_COPY_ATTRIBUTES (new, in
);
871 if (GET_CODE (XEXP (in
, 0)) == PRE_INC
872 || GET_CODE (XEXP (in
, 0)) == PRE_DEC
873 || GET_CODE (XEXP (in
, 0)) == PRE_MODIFY
)
875 rtx
new = gen_rtx_MEM (GET_MODE (out
), XEXP (XEXP (out
, 0), 0));
877 MEM_COPY_ATTRIBUTES (new, out
);
882 /* If we are reloading a (SUBREG constant ...), really reload just the
883 inside expression in its own mode. Similarly for (SUBREG (PLUS ...)).
884 If we have (SUBREG:M1 (MEM:M2 ...) ...) (or an inner REG that is still
885 a pseudo and hence will become a MEM) with M1 wider than M2 and the
886 register is a pseudo, also reload the inside expression.
887 For machines that extend byte loads, do this for any SUBREG of a pseudo
888 where both M1 and M2 are a word or smaller, M1 is wider than M2, and
889 M2 is an integral mode that gets extended when loaded.
890 Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
891 either M1 is not valid for R or M2 is wider than a word but we only
892 need one word to store an M2-sized quantity in R.
893 (However, if OUT is nonzero, we need to reload the reg *and*
894 the subreg, so do nothing here, and let following statement handle it.)
896 Note that the case of (SUBREG (CONST_INT...)...) is handled elsewhere;
897 we can't handle it here because CONST_INT does not indicate a mode.
899 Similarly, we must reload the inside expression if we have a
900 STRICT_LOW_PART (presumably, in == out in the cas).
902 Also reload the inner expression if it does not require a secondary
903 reload but the SUBREG does.
905 Finally, reload the inner expression if it is a register that is in
906 the class whose registers cannot be referenced in a different size
907 and M1 is not the same size as M2. If SUBREG_WORD is nonzero, we
908 cannot reload just the inside since we might end up with the wrong
909 register class. But if it is inside a STRICT_LOW_PART, we have
910 no choice, so we hope we do get the right register class there. */
912 if (in
!= 0 && GET_CODE (in
) == SUBREG
913 && (SUBREG_WORD (in
) == 0 || strict_low
)
914 #ifdef CLASS_CANNOT_CHANGE_MODE
915 && class != CLASS_CANNOT_CHANGE_MODE
917 && (CONSTANT_P (SUBREG_REG (in
))
918 || GET_CODE (SUBREG_REG (in
)) == PLUS
920 || (((GET_CODE (SUBREG_REG (in
)) == REG
921 && REGNO (SUBREG_REG (in
)) >= FIRST_PSEUDO_REGISTER
)
922 || GET_CODE (SUBREG_REG (in
)) == MEM
)
923 && ((GET_MODE_SIZE (inmode
)
924 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
925 #ifdef LOAD_EXTEND_OP
926 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
927 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
929 && (GET_MODE_SIZE (inmode
)
930 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
931 && INTEGRAL_MODE_P (GET_MODE (SUBREG_REG (in
)))
932 && LOAD_EXTEND_OP (GET_MODE (SUBREG_REG (in
))) != NIL
)
934 #ifdef WORD_REGISTER_OPERATIONS
935 || ((GET_MODE_SIZE (inmode
)
936 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))))
937 && ((GET_MODE_SIZE (inmode
) - 1) / UNITS_PER_WORD
==
938 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
))) - 1)
942 || (GET_CODE (SUBREG_REG (in
)) == REG
943 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
944 /* The case where out is nonzero
945 is handled differently in the following statement. */
946 && (out
== 0 || SUBREG_WORD (in
) == 0)
947 && ((GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
948 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
950 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
952 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
953 GET_MODE (SUBREG_REG (in
)))))
954 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (in
))
957 #ifdef SECONDARY_INPUT_RELOAD_CLASS
958 || (SECONDARY_INPUT_RELOAD_CLASS (class, inmode
, in
) != NO_REGS
959 && (SECONDARY_INPUT_RELOAD_CLASS (class,
960 GET_MODE (SUBREG_REG (in
)),
964 #ifdef CLASS_CANNOT_CHANGE_MODE
965 || (GET_CODE (SUBREG_REG (in
)) == REG
966 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
967 && (TEST_HARD_REG_BIT
968 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
969 REGNO (SUBREG_REG (in
))))
970 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (in
)),
975 in_subreg_loc
= inloc
;
976 inloc
= &SUBREG_REG (in
);
978 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
979 if (GET_CODE (in
) == MEM
)
980 /* This is supposed to happen only for paradoxical subregs made by
981 combine.c. (SUBREG (MEM)) isn't supposed to occur other ways. */
982 if (GET_MODE_SIZE (GET_MODE (in
)) > GET_MODE_SIZE (inmode
))
985 inmode
= GET_MODE (in
);
988 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
989 either M1 is not valid for R or M2 is wider than a word but we only
990 need one word to store an M2-sized quantity in R.
992 However, we must reload the inner reg *as well as* the subreg in
995 /* Similar issue for (SUBREG constant ...) if it was not handled by the
996 code above. This can happen if SUBREG_WORD != 0. */
998 if (in
!= 0 && GET_CODE (in
) == SUBREG
999 && (CONSTANT_P (SUBREG_REG (in
))
1000 || (GET_CODE (SUBREG_REG (in
)) == REG
1001 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1002 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (in
))
1005 || (GET_MODE_SIZE (inmode
) <= UNITS_PER_WORD
1006 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1008 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1010 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (in
)),
1011 GET_MODE (SUBREG_REG (in
)))))))))
1013 /* This relies on the fact that emit_reload_insns outputs the
1014 instructions for input reloads of type RELOAD_OTHER in the same
1015 order as the reloads. Thus if the outer reload is also of type
1016 RELOAD_OTHER, we are guaranteed that this inner reload will be
1017 output before the outer reload. */
1018 push_reload (SUBREG_REG (in
), NULL_RTX
, &SUBREG_REG (in
), NULL_PTR
,
1019 find_valid_class (inmode
, SUBREG_WORD (in
)),
1020 VOIDmode
, VOIDmode
, 0, 0, opnum
, type
);
1021 dont_remove_subreg
= 1;
1024 /* Similarly for paradoxical and problematical SUBREGs on the output.
1025 Note that there is no reason we need worry about the previous value
1026 of SUBREG_REG (out); even if wider than out,
1027 storing in a subreg is entitled to clobber it all
1028 (except in the case of STRICT_LOW_PART,
1029 and in that case the constraint should label it input-output.) */
1030 if (out
!= 0 && GET_CODE (out
) == SUBREG
1031 && (SUBREG_WORD (out
) == 0 || strict_low
)
1032 #ifdef CLASS_CANNOT_CHANGE_MODE
1033 && class != CLASS_CANNOT_CHANGE_MODE
1035 && (CONSTANT_P (SUBREG_REG (out
))
1037 || (((GET_CODE (SUBREG_REG (out
)) == REG
1038 && REGNO (SUBREG_REG (out
)) >= FIRST_PSEUDO_REGISTER
)
1039 || GET_CODE (SUBREG_REG (out
)) == MEM
)
1040 && ((GET_MODE_SIZE (outmode
)
1041 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1042 #ifdef WORD_REGISTER_OPERATIONS
1043 || ((GET_MODE_SIZE (outmode
)
1044 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))))
1045 && ((GET_MODE_SIZE (outmode
) - 1) / UNITS_PER_WORD
==
1046 ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
))) - 1)
1050 || (GET_CODE (SUBREG_REG (out
)) == REG
1051 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1052 && ((GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1053 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1055 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1057 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1058 GET_MODE (SUBREG_REG (out
)))))
1059 || ! HARD_REGNO_MODE_OK ((REGNO (SUBREG_REG (out
))
1060 + SUBREG_WORD (out
)),
1062 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1063 || (SECONDARY_OUTPUT_RELOAD_CLASS (class, outmode
, out
) != NO_REGS
1064 && (SECONDARY_OUTPUT_RELOAD_CLASS (class,
1065 GET_MODE (SUBREG_REG (out
)),
1069 #ifdef CLASS_CANNOT_CHANGE_MODE
1070 || (GET_CODE (SUBREG_REG (out
)) == REG
1071 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1072 && (TEST_HARD_REG_BIT
1073 (reg_class_contents
[(int) CLASS_CANNOT_CHANGE_MODE
],
1074 REGNO (SUBREG_REG (out
))))
1075 && CLASS_CANNOT_CHANGE_MODE_P (GET_MODE (SUBREG_REG (out
)),
1080 out_subreg_loc
= outloc
;
1081 outloc
= &SUBREG_REG (out
);
1083 #if ! defined (LOAD_EXTEND_OP) && ! defined (WORD_REGISTER_OPERATIONS)
1084 if (GET_CODE (out
) == MEM
1085 && GET_MODE_SIZE (GET_MODE (out
)) > GET_MODE_SIZE (outmode
))
1088 outmode
= GET_MODE (out
);
1091 /* Similar issue for (SUBREG:M1 (REG:M2 ...) ...) for a hard register R where
1092 either M1 is not valid for R or M2 is wider than a word but we only
1093 need one word to store an M2-sized quantity in R.
1095 However, we must reload the inner reg *as well as* the subreg in
1096 that case. In this case, the inner reg is an in-out reload. */
1098 if (out
!= 0 && GET_CODE (out
) == SUBREG
1099 && GET_CODE (SUBREG_REG (out
)) == REG
1100 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1101 && (! HARD_REGNO_MODE_OK (REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
),
1103 || (GET_MODE_SIZE (outmode
) <= UNITS_PER_WORD
1104 && (GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1106 && ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (out
)))
1108 != HARD_REGNO_NREGS (REGNO (SUBREG_REG (out
)),
1109 GET_MODE (SUBREG_REG (out
)))))))
1111 /* This relies on the fact that emit_reload_insns outputs the
1112 instructions for output reloads of type RELOAD_OTHER in reverse
1113 order of the reloads. Thus if the outer reload is also of type
1114 RELOAD_OTHER, we are guaranteed that this inner reload will be
1115 output after the outer reload. */
1116 dont_remove_subreg
= 1;
1117 push_reload (SUBREG_REG (out
), SUBREG_REG (out
), &SUBREG_REG (out
),
1119 find_valid_class (outmode
, SUBREG_WORD (out
)),
1120 VOIDmode
, VOIDmode
, 0, 0,
1121 opnum
, RELOAD_OTHER
);
1124 /* If IN appears in OUT, we can't share any input-only reload for IN. */
1125 if (in
!= 0 && out
!= 0 && GET_CODE (out
) == MEM
1126 && (GET_CODE (in
) == REG
|| GET_CODE (in
) == MEM
)
1127 && reg_overlap_mentioned_for_reload_p (in
, XEXP (out
, 0)))
1130 /* If IN is a SUBREG of a hard register, make a new REG. This
1131 simplifies some of the cases below. */
1133 if (in
!= 0 && GET_CODE (in
) == SUBREG
&& GET_CODE (SUBREG_REG (in
)) == REG
1134 && REGNO (SUBREG_REG (in
)) < FIRST_PSEUDO_REGISTER
1135 && ! dont_remove_subreg
)
1136 in
= gen_rtx_REG (GET_MODE (in
),
1137 REGNO (SUBREG_REG (in
)) + SUBREG_WORD (in
));
1139 /* Similarly for OUT. */
1140 if (out
!= 0 && GET_CODE (out
) == SUBREG
1141 && GET_CODE (SUBREG_REG (out
)) == REG
1142 && REGNO (SUBREG_REG (out
)) < FIRST_PSEUDO_REGISTER
1143 && ! dont_remove_subreg
)
1144 out
= gen_rtx_REG (GET_MODE (out
),
1145 REGNO (SUBREG_REG (out
)) + SUBREG_WORD (out
));
1147 /* Narrow down the class of register wanted if that is
1148 desirable on this machine for efficiency. */
1150 class = PREFERRED_RELOAD_CLASS (in
, class);
1152 /* Output reloads may need analogous treatment, different in detail. */
1153 #ifdef PREFERRED_OUTPUT_RELOAD_CLASS
1155 class = PREFERRED_OUTPUT_RELOAD_CLASS (out
, class);
1158 /* Make sure we use a class that can handle the actual pseudo
1159 inside any subreg. For example, on the 386, QImode regs
1160 can appear within SImode subregs. Although GENERAL_REGS
1161 can handle SImode, QImode needs a smaller class. */
1162 #ifdef LIMIT_RELOAD_CLASS
1164 class = LIMIT_RELOAD_CLASS (inmode
, class);
1165 else if (in
!= 0 && GET_CODE (in
) == SUBREG
)
1166 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (in
)), class);
1169 class = LIMIT_RELOAD_CLASS (outmode
, class);
1170 if (out
!= 0 && GET_CODE (out
) == SUBREG
)
1171 class = LIMIT_RELOAD_CLASS (GET_MODE (SUBREG_REG (out
)), class);
1174 /* Verify that this class is at least possible for the mode that
1176 if (this_insn_is_asm
)
1178 enum machine_mode mode
;
1179 if (GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (outmode
))
1183 if (mode
== VOIDmode
)
1185 error_for_asm (this_insn
, "cannot reload integer constant operand in `asm'");
1190 outmode
= word_mode
;
1192 for (i
= 0; i
< FIRST_PSEUDO_REGISTER
; i
++)
1193 if (HARD_REGNO_MODE_OK (i
, mode
)
1194 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
))
1196 int nregs
= HARD_REGNO_NREGS (i
, mode
);
1199 for (j
= 1; j
< nregs
; j
++)
1200 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class], i
+ j
))
1205 if (i
== FIRST_PSEUDO_REGISTER
)
1207 error_for_asm (this_insn
, "impossible register constraint in `asm'");
1212 /* Optional output reloads are always OK even if we have no register class,
1213 since the function of these reloads is only to have spill_reg_store etc.
1214 set, so that the storing insn can be deleted later. */
1215 if (class == NO_REGS
1216 && (optional
== 0 || type
!= RELOAD_FOR_OUTPUT
))
1219 i
= find_reusable_reload (&in
, out
, class, type
, opnum
, dont_share
);
1223 /* See if we need a secondary reload register to move between CLASS
1224 and IN or CLASS and OUT. Get the icode and push any required reloads
1225 needed for each of them if so. */
1227 #ifdef SECONDARY_INPUT_RELOAD_CLASS
1230 = push_secondary_reload (1, in
, opnum
, optional
, class, inmode
, type
,
1231 &secondary_in_icode
);
1234 #ifdef SECONDARY_OUTPUT_RELOAD_CLASS
1235 if (out
!= 0 && GET_CODE (out
) != SCRATCH
)
1236 secondary_out_reload
1237 = push_secondary_reload (0, out
, opnum
, optional
, class, outmode
,
1238 type
, &secondary_out_icode
);
1241 /* We found no existing reload suitable for re-use.
1242 So add an additional reload. */
1244 #ifdef SECONDARY_MEMORY_NEEDED
1245 /* If a memory location is needed for the copy, make one. */
1246 if (in
!= 0 && GET_CODE (in
) == REG
1247 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1248 && SECONDARY_MEMORY_NEEDED (REGNO_REG_CLASS (REGNO (in
)),
1250 get_secondary_mem (in
, inmode
, opnum
, type
);
1256 rld
[i
].class = class;
1257 rld
[i
].inmode
= inmode
;
1258 rld
[i
].outmode
= outmode
;
1260 rld
[i
].optional
= optional
;
1262 rld
[i
].nocombine
= 0;
1263 rld
[i
].in_reg
= inloc
? *inloc
: 0;
1264 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1265 rld
[i
].opnum
= opnum
;
1266 rld
[i
].when_needed
= type
;
1267 rld
[i
].secondary_in_reload
= secondary_in_reload
;
1268 rld
[i
].secondary_out_reload
= secondary_out_reload
;
1269 rld
[i
].secondary_in_icode
= secondary_in_icode
;
1270 rld
[i
].secondary_out_icode
= secondary_out_icode
;
1271 rld
[i
].secondary_p
= 0;
1275 #ifdef SECONDARY_MEMORY_NEEDED
1276 if (out
!= 0 && GET_CODE (out
) == REG
1277 && REGNO (out
) < FIRST_PSEUDO_REGISTER
1278 && SECONDARY_MEMORY_NEEDED (class, REGNO_REG_CLASS (REGNO (out
)),
1280 get_secondary_mem (out
, outmode
, opnum
, type
);
1285 /* We are reusing an existing reload,
1286 but we may have additional information for it.
1287 For example, we may now have both IN and OUT
1288 while the old one may have just one of them. */
1290 /* The modes can be different. If they are, we want to reload in
1291 the larger mode, so that the value is valid for both modes. */
1292 if (inmode
!= VOIDmode
1293 && GET_MODE_SIZE (inmode
) > GET_MODE_SIZE (rld
[i
].inmode
))
1294 rld
[i
].inmode
= inmode
;
1295 if (outmode
!= VOIDmode
1296 && GET_MODE_SIZE (outmode
) > GET_MODE_SIZE (rld
[i
].outmode
))
1297 rld
[i
].outmode
= outmode
;
1300 rtx in_reg
= inloc
? *inloc
: 0;
1301 /* If we merge reloads for two distinct rtl expressions that
1302 are identical in content, there might be duplicate address
1303 reloads. Remove the extra set now, so that if we later find
1304 that we can inherit this reload, we can get rid of the
1305 address reloads altogether.
1307 Do not do this if both reloads are optional since the result
1308 would be an optional reload which could potentially leave
1309 unresolved address replacements.
1311 It is not sufficient to call transfer_replacements since
1312 choose_reload_regs will remove the replacements for address
1313 reloads of inherited reloads which results in the same
1315 if (rld
[i
].in
!= in
&& rtx_equal_p (in
, rld
[i
].in
)
1316 && ! (rld
[i
].optional
&& optional
))
1318 /* We must keep the address reload with the lower operand
1320 if (opnum
> rld
[i
].opnum
)
1322 remove_address_replacements (in
);
1324 in_reg
= rld
[i
].in_reg
;
1327 remove_address_replacements (rld
[i
].in
);
1330 rld
[i
].in_reg
= in_reg
;
1335 rld
[i
].out_reg
= outloc
? *outloc
: 0;
1337 if (reg_class_subset_p (class, rld
[i
].class))
1338 rld
[i
].class = class;
1339 rld
[i
].optional
&= optional
;
1340 if (MERGE_TO_OTHER (type
, rld
[i
].when_needed
,
1341 opnum
, rld
[i
].opnum
))
1342 rld
[i
].when_needed
= RELOAD_OTHER
;
1343 rld
[i
].opnum
= MIN (rld
[i
].opnum
, opnum
);
1346 /* If the ostensible rtx being reload differs from the rtx found
1347 in the location to substitute, this reload is not safe to combine
1348 because we cannot reliably tell whether it appears in the insn. */
1350 if (in
!= 0 && in
!= *inloc
)
1351 rld
[i
].nocombine
= 1;
1354 /* This was replaced by changes in find_reloads_address_1 and the new
1355 function inc_for_reload, which go with a new meaning of reload_inc. */
1357 /* If this is an IN/OUT reload in an insn that sets the CC,
1358 it must be for an autoincrement. It doesn't work to store
1359 the incremented value after the insn because that would clobber the CC.
1360 So we must do the increment of the value reloaded from,
1361 increment it, store it back, then decrement again. */
1362 if (out
!= 0 && sets_cc0_p (PATTERN (this_insn
)))
1366 rld
[i
].inc
= find_inc_amount (PATTERN (this_insn
), in
);
1367 /* If we did not find a nonzero amount-to-increment-by,
1368 that contradicts the belief that IN is being incremented
1369 in an address in this insn. */
1370 if (rld
[i
].inc
== 0)
1375 /* If we will replace IN and OUT with the reload-reg,
1376 record where they are located so that substitution need
1377 not do a tree walk. */
1379 if (replace_reloads
)
1383 register struct replacement
*r
= &replacements
[n_replacements
++];
1385 r
->subreg_loc
= in_subreg_loc
;
1389 if (outloc
!= 0 && outloc
!= inloc
)
1391 register struct replacement
*r
= &replacements
[n_replacements
++];
1394 r
->subreg_loc
= out_subreg_loc
;
1399 /* If this reload is just being introduced and it has both
1400 an incoming quantity and an outgoing quantity that are
1401 supposed to be made to match, see if either one of the two
1402 can serve as the place to reload into.
1404 If one of them is acceptable, set rld[i].reg_rtx
1407 if (in
!= 0 && out
!= 0 && in
!= out
&& rld
[i
].reg_rtx
== 0)
1409 rld
[i
].reg_rtx
= find_dummy_reload (in
, out
, inloc
, outloc
,
1412 earlyclobber_operand_p (out
));
1414 /* If the outgoing register already contains the same value
1415 as the incoming one, we can dispense with loading it.
1416 The easiest way to tell the caller that is to give a phony
1417 value for the incoming operand (same as outgoing one). */
1418 if (rld
[i
].reg_rtx
== out
1419 && (GET_CODE (in
) == REG
|| CONSTANT_P (in
))
1420 && 0 != find_equiv_reg (in
, this_insn
, 0, REGNO (out
),
1421 static_reload_reg_p
, i
, inmode
))
1425 /* If this is an input reload and the operand contains a register that
1426 dies in this insn and is used nowhere else, see if it is the right class
1427 to be used for this reload. Use it if so. (This occurs most commonly
1428 in the case of paradoxical SUBREGs and in-out reloads). We cannot do
1429 this if it is also an output reload that mentions the register unless
1430 the output is a SUBREG that clobbers an entire register.
1432 Note that the operand might be one of the spill regs, if it is a
1433 pseudo reg and we are in a block where spilling has not taken place.
1434 But if there is no spilling in this block, that is OK.
1435 An explicitly used hard reg cannot be a spill reg. */
1437 if (rld
[i
].reg_rtx
== 0 && in
!= 0)
1442 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1443 if (REG_NOTE_KIND (note
) == REG_DEAD
1444 && GET_CODE (XEXP (note
, 0)) == REG
1445 && (regno
= REGNO (XEXP (note
, 0))) < FIRST_PSEUDO_REGISTER
1446 && reg_mentioned_p (XEXP (note
, 0), in
)
1447 && ! refers_to_regno_for_reload_p (regno
,
1449 + HARD_REGNO_NREGS (regno
,
1451 PATTERN (this_insn
), inloc
)
1452 /* If this is also an output reload, IN cannot be used as
1453 the reload register if it is set in this insn unless IN
1455 && (out
== 0 || in
== out
1456 || ! hard_reg_set_here_p (regno
,
1458 + HARD_REGNO_NREGS (regno
,
1460 PATTERN (this_insn
)))
1461 /* ??? Why is this code so different from the previous?
1462 Is there any simple coherent way to describe the two together?
1463 What's going on here. */
1465 || (GET_CODE (in
) == SUBREG
1466 && (((GET_MODE_SIZE (GET_MODE (in
)) + (UNITS_PER_WORD
- 1))
1468 == ((GET_MODE_SIZE (GET_MODE (SUBREG_REG (in
)))
1469 + (UNITS_PER_WORD
- 1)) / UNITS_PER_WORD
))))
1470 /* Make sure the operand fits in the reg that dies. */
1471 && GET_MODE_SIZE (inmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1472 && HARD_REGNO_MODE_OK (regno
, inmode
)
1473 && GET_MODE_SIZE (outmode
) <= GET_MODE_SIZE (GET_MODE (XEXP (note
, 0)))
1474 && HARD_REGNO_MODE_OK (regno
, outmode
))
1477 unsigned int nregs
= MAX (HARD_REGNO_NREGS (regno
, inmode
),
1478 HARD_REGNO_NREGS (regno
, outmode
));
1480 for (offs
= 0; offs
< nregs
; offs
++)
1481 if (fixed_regs
[regno
+ offs
]
1482 || ! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1488 rld
[i
].reg_rtx
= gen_rtx_REG (inmode
, regno
);
1495 output_reloadnum
= i
;
1500 /* Record an additional place we must replace a value
1501 for which we have already recorded a reload.
1502 RELOADNUM is the value returned by push_reload
1503 when the reload was recorded.
1504 This is used in insn patterns that use match_dup. */
1507 push_replacement (loc
, reloadnum
, mode
)
1510 enum machine_mode mode
;
1512 if (replace_reloads
)
1514 register struct replacement
*r
= &replacements
[n_replacements
++];
1515 r
->what
= reloadnum
;
1522 /* Transfer all replacements that used to be in reload FROM to be in
1526 transfer_replacements (to
, from
)
1531 for (i
= 0; i
< n_replacements
; i
++)
1532 if (replacements
[i
].what
== from
)
1533 replacements
[i
].what
= to
;
1536 /* IN_RTX is the value loaded by a reload that we now decided to inherit,
1537 or a subpart of it. If we have any replacements registered for IN_RTX,
1538 cancel the reloads that were supposed to load them.
1539 Return non-zero if we canceled any reloads. */
1541 remove_address_replacements (in_rtx
)
1545 char reload_flags
[MAX_RELOADS
];
1546 int something_changed
= 0;
1548 bzero (reload_flags
, sizeof reload_flags
);
1549 for (i
= 0, j
= 0; i
< n_replacements
; i
++)
1551 if (loc_mentioned_in_p (replacements
[i
].where
, in_rtx
))
1552 reload_flags
[replacements
[i
].what
] |= 1;
1555 replacements
[j
++] = replacements
[i
];
1556 reload_flags
[replacements
[i
].what
] |= 2;
1559 /* Note that the following store must be done before the recursive calls. */
1562 for (i
= n_reloads
- 1; i
>= 0; i
--)
1564 if (reload_flags
[i
] == 1)
1566 deallocate_reload_reg (i
);
1567 remove_address_replacements (rld
[i
].in
);
1569 something_changed
= 1;
1572 return something_changed
;
1575 /* If there is only one output reload, and it is not for an earlyclobber
1576 operand, try to combine it with a (logically unrelated) input reload
1577 to reduce the number of reload registers needed.
1579 This is safe if the input reload does not appear in
1580 the value being output-reloaded, because this implies
1581 it is not needed any more once the original insn completes.
1583 If that doesn't work, see we can use any of the registers that
1584 die in this insn as a reload register. We can if it is of the right
1585 class and does not appear in the value being output-reloaded. */
1591 int output_reload
= -1;
1592 int secondary_out
= -1;
1595 /* Find the output reload; return unless there is exactly one
1596 and that one is mandatory. */
1598 for (i
= 0; i
< n_reloads
; i
++)
1599 if (rld
[i
].out
!= 0)
1601 if (output_reload
>= 0)
1606 if (output_reload
< 0 || rld
[output_reload
].optional
)
1609 /* An input-output reload isn't combinable. */
1611 if (rld
[output_reload
].in
!= 0)
1614 /* If this reload is for an earlyclobber operand, we can't do anything. */
1615 if (earlyclobber_operand_p (rld
[output_reload
].out
))
1618 /* Check each input reload; can we combine it? */
1620 for (i
= 0; i
< n_reloads
; i
++)
1621 if (rld
[i
].in
&& ! rld
[i
].optional
&& ! rld
[i
].nocombine
1622 /* Life span of this reload must not extend past main insn. */
1623 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
1624 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
1625 && rld
[i
].when_needed
!= RELOAD_OTHER
1626 && (CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].inmode
)
1627 == CLASS_MAX_NREGS (rld
[output_reload
].class,
1628 rld
[output_reload
].outmode
))
1630 && rld
[i
].reg_rtx
== 0
1631 #ifdef SECONDARY_MEMORY_NEEDED
1632 /* Don't combine two reloads with different secondary
1633 memory locations. */
1634 && (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
] == 0
1635 || secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] == 0
1636 || rtx_equal_p (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
],
1637 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
]))
1639 && (SMALL_REGISTER_CLASSES
1640 ? (rld
[i
].class == rld
[output_reload
].class)
1641 : (reg_class_subset_p (rld
[i
].class,
1642 rld
[output_reload
].class)
1643 || reg_class_subset_p (rld
[output_reload
].class,
1645 && (MATCHES (rld
[i
].in
, rld
[output_reload
].out
)
1646 /* Args reversed because the first arg seems to be
1647 the one that we imagine being modified
1648 while the second is the one that might be affected. */
1649 || (! reg_overlap_mentioned_for_reload_p (rld
[output_reload
].out
,
1651 /* However, if the input is a register that appears inside
1652 the output, then we also can't share.
1653 Imagine (set (mem (reg 69)) (plus (reg 69) ...)).
1654 If the same reload reg is used for both reg 69 and the
1655 result to be stored in memory, then that result
1656 will clobber the address of the memory ref. */
1657 && ! (GET_CODE (rld
[i
].in
) == REG
1658 && reg_overlap_mentioned_for_reload_p (rld
[i
].in
,
1659 rld
[output_reload
].out
))))
1660 && (reg_class_size
[(int) rld
[i
].class]
1661 || SMALL_REGISTER_CLASSES
)
1662 /* We will allow making things slightly worse by combining an
1663 input and an output, but no worse than that. */
1664 && (rld
[i
].when_needed
== RELOAD_FOR_INPUT
1665 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT
))
1669 /* We have found a reload to combine with! */
1670 rld
[i
].out
= rld
[output_reload
].out
;
1671 rld
[i
].out_reg
= rld
[output_reload
].out_reg
;
1672 rld
[i
].outmode
= rld
[output_reload
].outmode
;
1673 /* Mark the old output reload as inoperative. */
1674 rld
[output_reload
].out
= 0;
1675 /* The combined reload is needed for the entire insn. */
1676 rld
[i
].when_needed
= RELOAD_OTHER
;
1677 /* If the output reload had a secondary reload, copy it. */
1678 if (rld
[output_reload
].secondary_out_reload
!= -1)
1680 rld
[i
].secondary_out_reload
1681 = rld
[output_reload
].secondary_out_reload
;
1682 rld
[i
].secondary_out_icode
1683 = rld
[output_reload
].secondary_out_icode
;
1686 #ifdef SECONDARY_MEMORY_NEEDED
1687 /* Copy any secondary MEM. */
1688 if (secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
] != 0)
1689 secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[i
].opnum
]
1690 = secondary_memlocs_elim
[(int) rld
[output_reload
].outmode
][rld
[output_reload
].opnum
];
1692 /* If required, minimize the register class. */
1693 if (reg_class_subset_p (rld
[output_reload
].class,
1695 rld
[i
].class = rld
[output_reload
].class;
1697 /* Transfer all replacements from the old reload to the combined. */
1698 for (j
= 0; j
< n_replacements
; j
++)
1699 if (replacements
[j
].what
== output_reload
)
1700 replacements
[j
].what
= i
;
1705 /* If this insn has only one operand that is modified or written (assumed
1706 to be the first), it must be the one corresponding to this reload. It
1707 is safe to use anything that dies in this insn for that output provided
1708 that it does not occur in the output (we already know it isn't an
1709 earlyclobber. If this is an asm insn, give up. */
1711 if (INSN_CODE (this_insn
) == -1)
1714 for (i
= 1; i
< insn_data
[INSN_CODE (this_insn
)].n_operands
; i
++)
1715 if (insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '='
1716 || insn_data
[INSN_CODE (this_insn
)].operand
[i
].constraint
[0] == '+')
1719 /* See if some hard register that dies in this insn and is not used in
1720 the output is the right class. Only works if the register we pick
1721 up can fully hold our output reload. */
1722 for (note
= REG_NOTES (this_insn
); note
; note
= XEXP (note
, 1))
1723 if (REG_NOTE_KIND (note
) == REG_DEAD
1724 && GET_CODE (XEXP (note
, 0)) == REG
1725 && ! reg_overlap_mentioned_for_reload_p (XEXP (note
, 0),
1726 rld
[output_reload
].out
)
1727 && REGNO (XEXP (note
, 0)) < FIRST_PSEUDO_REGISTER
1728 && HARD_REGNO_MODE_OK (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1729 && TEST_HARD_REG_BIT (reg_class_contents
[(int) rld
[output_reload
].class],
1730 REGNO (XEXP (note
, 0)))
1731 && (HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), rld
[output_reload
].outmode
)
1732 <= HARD_REGNO_NREGS (REGNO (XEXP (note
, 0)), GET_MODE (XEXP (note
, 0))))
1733 /* Ensure that a secondary or tertiary reload for this output
1734 won't want this register. */
1735 && ((secondary_out
= rld
[output_reload
].secondary_out_reload
) == -1
1736 || (! (TEST_HARD_REG_BIT
1737 (reg_class_contents
[(int) rld
[secondary_out
].class],
1738 REGNO (XEXP (note
, 0))))
1739 && ((secondary_out
= rld
[secondary_out
].secondary_out_reload
) == -1
1740 || ! (TEST_HARD_REG_BIT
1741 (reg_class_contents
[(int) rld
[secondary_out
].class],
1742 REGNO (XEXP (note
, 0)))))))
1743 && ! fixed_regs
[REGNO (XEXP (note
, 0))])
1745 rld
[output_reload
].reg_rtx
1746 = gen_rtx_REG (rld
[output_reload
].outmode
,
1747 REGNO (XEXP (note
, 0)));
1752 /* Try to find a reload register for an in-out reload (expressions IN and OUT).
1753 See if one of IN and OUT is a register that may be used;
1754 this is desirable since a spill-register won't be needed.
1755 If so, return the register rtx that proves acceptable.
1757 INLOC and OUTLOC are locations where IN and OUT appear in the insn.
1758 CLASS is the register class required for the reload.
1760 If FOR_REAL is >= 0, it is the number of the reload,
1761 and in some cases when it can be discovered that OUT doesn't need
1762 to be computed, clear out rld[FOR_REAL].out.
1764 If FOR_REAL is -1, this should not be done, because this call
1765 is just to see if a register can be found, not to find and install it.
1767 EARLYCLOBBER is non-zero if OUT is an earlyclobber operand. This
1768 puts an additional constraint on being able to use IN for OUT since
1769 IN must not appear elsewhere in the insn (it is assumed that IN itself
1770 is safe from the earlyclobber). */
1773 find_dummy_reload (real_in
, real_out
, inloc
, outloc
,
1774 inmode
, outmode
, class, for_real
, earlyclobber
)
1775 rtx real_in
, real_out
;
1776 rtx
*inloc
, *outloc
;
1777 enum machine_mode inmode
, outmode
;
1778 enum reg_class
class;
1788 /* If operands exceed a word, we can't use either of them
1789 unless they have the same size. */
1790 if (GET_MODE_SIZE (outmode
) != GET_MODE_SIZE (inmode
)
1791 && (GET_MODE_SIZE (outmode
) > UNITS_PER_WORD
1792 || GET_MODE_SIZE (inmode
) > UNITS_PER_WORD
))
1795 /* Find the inside of any subregs. */
1796 while (GET_CODE (out
) == SUBREG
)
1798 out_offset
= SUBREG_WORD (out
);
1799 out
= SUBREG_REG (out
);
1801 while (GET_CODE (in
) == SUBREG
)
1803 in_offset
= SUBREG_WORD (in
);
1804 in
= SUBREG_REG (in
);
1807 /* Narrow down the reg class, the same way push_reload will;
1808 otherwise we might find a dummy now, but push_reload won't. */
1809 class = PREFERRED_RELOAD_CLASS (in
, class);
1811 /* See if OUT will do. */
1812 if (GET_CODE (out
) == REG
1813 && REGNO (out
) < FIRST_PSEUDO_REGISTER
)
1815 unsigned int regno
= REGNO (out
) + out_offset
;
1816 unsigned int nwords
= HARD_REGNO_NREGS (regno
, outmode
);
1819 /* When we consider whether the insn uses OUT,
1820 ignore references within IN. They don't prevent us
1821 from copying IN into OUT, because those refs would
1822 move into the insn that reloads IN.
1824 However, we only ignore IN in its role as this reload.
1825 If the insn uses IN elsewhere and it contains OUT,
1826 that counts. We can't be sure it's the "same" operand
1827 so it might not go through this reload. */
1829 *inloc
= const0_rtx
;
1831 if (regno
< FIRST_PSEUDO_REGISTER
1832 && ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1833 PATTERN (this_insn
), outloc
))
1837 for (i
= 0; i
< nwords
; i
++)
1838 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1844 if (GET_CODE (real_out
) == REG
)
1847 value
= gen_rtx_REG (outmode
, regno
);
1854 /* Consider using IN if OUT was not acceptable
1855 or if OUT dies in this insn (like the quotient in a divmod insn).
1856 We can't use IN unless it is dies in this insn,
1857 which means we must know accurately which hard regs are live.
1858 Also, the result can't go in IN if IN is used within OUT,
1859 or if OUT is an earlyclobber and IN appears elsewhere in the insn. */
1860 if (hard_regs_live_known
1861 && GET_CODE (in
) == REG
1862 && REGNO (in
) < FIRST_PSEUDO_REGISTER
1864 || find_reg_note (this_insn
, REG_UNUSED
, real_out
))
1865 && find_reg_note (this_insn
, REG_DEAD
, real_in
)
1866 && !fixed_regs
[REGNO (in
)]
1867 && HARD_REGNO_MODE_OK (REGNO (in
),
1868 /* The only case where out and real_out might
1869 have different modes is where real_out
1870 is a subreg, and in that case, out
1872 (GET_MODE (out
) != VOIDmode
1873 ? GET_MODE (out
) : outmode
)))
1875 unsigned int regno
= REGNO (in
) + in_offset
;
1876 unsigned int nwords
= HARD_REGNO_NREGS (regno
, inmode
);
1878 if (! refers_to_regno_for_reload_p (regno
, regno
+ nwords
, out
, NULL_PTR
)
1879 && ! hard_reg_set_here_p (regno
, regno
+ nwords
,
1880 PATTERN (this_insn
))
1882 || ! refers_to_regno_for_reload_p (regno
, regno
+ nwords
,
1883 PATTERN (this_insn
), inloc
)))
1887 for (i
= 0; i
< nwords
; i
++)
1888 if (! TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
1894 /* If we were going to use OUT as the reload reg
1895 and changed our mind, it means OUT is a dummy that
1896 dies here. So don't bother copying value to it. */
1897 if (for_real
>= 0 && value
== real_out
)
1898 rld
[for_real
].out
= 0;
1899 if (GET_CODE (real_in
) == REG
)
1902 value
= gen_rtx_REG (inmode
, regno
);
1910 /* This page contains subroutines used mainly for determining
1911 whether the IN or an OUT of a reload can serve as the
1914 /* Return 1 if X is an operand of an insn that is being earlyclobbered. */
1917 earlyclobber_operand_p (x
)
1922 for (i
= 0; i
< n_earlyclobbers
; i
++)
1923 if (reload_earlyclobbers
[i
] == x
)
1929 /* Return 1 if expression X alters a hard reg in the range
1930 from BEG_REGNO (inclusive) to END_REGNO (exclusive),
1931 either explicitly or in the guise of a pseudo-reg allocated to REGNO.
1932 X should be the body of an instruction. */
1935 hard_reg_set_here_p (beg_regno
, end_regno
, x
)
1936 unsigned int beg_regno
, end_regno
;
1939 if (GET_CODE (x
) == SET
|| GET_CODE (x
) == CLOBBER
)
1941 register rtx op0
= SET_DEST (x
);
1943 while (GET_CODE (op0
) == SUBREG
)
1944 op0
= SUBREG_REG (op0
);
1945 if (GET_CODE (op0
) == REG
)
1947 unsigned int r
= REGNO (op0
);
1949 /* See if this reg overlaps range under consideration. */
1951 && r
+ HARD_REGNO_NREGS (r
, GET_MODE (op0
)) > beg_regno
)
1955 else if (GET_CODE (x
) == PARALLEL
)
1957 register int i
= XVECLEN (x
, 0) - 1;
1960 if (hard_reg_set_here_p (beg_regno
, end_regno
, XVECEXP (x
, 0, i
)))
1967 /* Return 1 if ADDR is a valid memory address for mode MODE,
1968 and check that each pseudo reg has the proper kind of
1972 strict_memory_address_p (mode
, addr
)
1973 enum machine_mode mode ATTRIBUTE_UNUSED
;
1976 GO_IF_LEGITIMATE_ADDRESS (mode
, addr
, win
);
1983 /* Like rtx_equal_p except that it allows a REG and a SUBREG to match
1984 if they are the same hard reg, and has special hacks for
1985 autoincrement and autodecrement.
1986 This is specifically intended for find_reloads to use
1987 in determining whether two operands match.
1988 X is the operand whose number is the lower of the two.
1990 The value is 2 if Y contains a pre-increment that matches
1991 a non-incrementing address in X. */
1993 /* ??? To be completely correct, we should arrange to pass
1994 for X the output operand and for Y the input operand.
1995 For now, we assume that the output operand has the lower number
1996 because that is natural in (SET output (... input ...)). */
1999 operands_match_p (x
, y
)
2003 register RTX_CODE code
= GET_CODE (x
);
2004 register const char *fmt
;
2009 if ((code
== REG
|| (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
))
2010 && (GET_CODE (y
) == REG
|| (GET_CODE (y
) == SUBREG
2011 && GET_CODE (SUBREG_REG (y
)) == REG
)))
2017 i
= REGNO (SUBREG_REG (x
));
2018 if (i
>= FIRST_PSEUDO_REGISTER
)
2020 i
+= SUBREG_WORD (x
);
2025 if (GET_CODE (y
) == SUBREG
)
2027 j
= REGNO (SUBREG_REG (y
));
2028 if (j
>= FIRST_PSEUDO_REGISTER
)
2030 j
+= SUBREG_WORD (y
);
2035 /* On a WORDS_BIG_ENDIAN machine, point to the last register of a
2036 multiple hard register group, so that for example (reg:DI 0) and
2037 (reg:SI 1) will be considered the same register. */
2038 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (x
)) > UNITS_PER_WORD
2039 && i
< FIRST_PSEUDO_REGISTER
)
2040 i
+= (GET_MODE_SIZE (GET_MODE (x
)) / UNITS_PER_WORD
) - 1;
2041 if (WORDS_BIG_ENDIAN
&& GET_MODE_SIZE (GET_MODE (y
)) > UNITS_PER_WORD
2042 && j
< FIRST_PSEUDO_REGISTER
)
2043 j
+= (GET_MODE_SIZE (GET_MODE (y
)) / UNITS_PER_WORD
) - 1;
2047 /* If two operands must match, because they are really a single
2048 operand of an assembler insn, then two postincrements are invalid
2049 because the assembler insn would increment only once.
2050 On the other hand, an postincrement matches ordinary indexing
2051 if the postincrement is the output operand. */
2052 if (code
== POST_DEC
|| code
== POST_INC
|| code
== POST_MODIFY
)
2053 return operands_match_p (XEXP (x
, 0), y
);
2054 /* Two preincrements are invalid
2055 because the assembler insn would increment only once.
2056 On the other hand, an preincrement matches ordinary indexing
2057 if the preincrement is the input operand.
2058 In this case, return 2, since some callers need to do special
2059 things when this happens. */
2060 if (GET_CODE (y
) == PRE_DEC
|| GET_CODE (y
) == PRE_INC
2061 || GET_CODE (y
) == PRE_MODIFY
)
2062 return operands_match_p (x
, XEXP (y
, 0)) ? 2 : 0;
2066 /* Now we have disposed of all the cases
2067 in which different rtx codes can match. */
2068 if (code
!= GET_CODE (y
))
2070 if (code
== LABEL_REF
)
2071 return XEXP (x
, 0) == XEXP (y
, 0);
2072 if (code
== SYMBOL_REF
)
2073 return XSTR (x
, 0) == XSTR (y
, 0);
2075 /* (MULT:SI x y) and (MULT:HI x y) are NOT equivalent. */
2077 if (GET_MODE (x
) != GET_MODE (y
))
2080 /* Compare the elements. If any pair of corresponding elements
2081 fail to match, return 0 for the whole things. */
2084 fmt
= GET_RTX_FORMAT (code
);
2085 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
2091 if (XWINT (x
, i
) != XWINT (y
, i
))
2096 if (XINT (x
, i
) != XINT (y
, i
))
2101 val
= operands_match_p (XEXP (x
, i
), XEXP (y
, i
));
2104 /* If any subexpression returns 2,
2105 we should return 2 if we are successful. */
2114 if (XVECLEN (x
, i
) != XVECLEN (y
, i
))
2116 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; --j
)
2118 val
= operands_match_p (XVECEXP (x
, i
, j
), XVECEXP (y
, i
, j
));
2126 /* It is believed that rtx's at this level will never
2127 contain anything but integers and other rtx's,
2128 except for within LABEL_REFs and SYMBOL_REFs. */
2133 return 1 + success_2
;
2136 /* Describe the range of registers or memory referenced by X.
2137 If X is a register, set REG_FLAG and put the first register
2138 number into START and the last plus one into END.
2139 If X is a memory reference, put a base address into BASE
2140 and a range of integer offsets into START and END.
2141 If X is pushing on the stack, we can assume it causes no trouble,
2142 so we set the SAFE field. */
2144 static struct decomposition
2148 struct decomposition val
;
2154 if (GET_CODE (x
) == MEM
)
2156 rtx base
= NULL_RTX
, offset
= 0;
2157 rtx addr
= XEXP (x
, 0);
2159 if (GET_CODE (addr
) == PRE_DEC
|| GET_CODE (addr
) == PRE_INC
2160 || GET_CODE (addr
) == POST_DEC
|| GET_CODE (addr
) == POST_INC
)
2162 val
.base
= XEXP (addr
, 0);
2163 val
.start
= - GET_MODE_SIZE (GET_MODE (x
));
2164 val
.end
= GET_MODE_SIZE (GET_MODE (x
));
2165 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2169 if (GET_CODE (addr
) == PRE_MODIFY
|| GET_CODE (addr
) == POST_MODIFY
)
2171 if (GET_CODE (XEXP (addr
, 1)) == PLUS
2172 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
2173 && CONSTANT_P (XEXP (XEXP (addr
, 1), 1)))
2175 val
.base
= XEXP (addr
, 0);
2176 val
.start
= -INTVAL (XEXP (XEXP (addr
, 1), 1));
2177 val
.end
= INTVAL (XEXP (XEXP (addr
, 1), 1));
2178 val
.safe
= REGNO (val
.base
) == STACK_POINTER_REGNUM
;
2183 if (GET_CODE (addr
) == CONST
)
2185 addr
= XEXP (addr
, 0);
2188 if (GET_CODE (addr
) == PLUS
)
2190 if (CONSTANT_P (XEXP (addr
, 0)))
2192 base
= XEXP (addr
, 1);
2193 offset
= XEXP (addr
, 0);
2195 else if (CONSTANT_P (XEXP (addr
, 1)))
2197 base
= XEXP (addr
, 0);
2198 offset
= XEXP (addr
, 1);
2205 offset
= const0_rtx
;
2207 if (GET_CODE (offset
) == CONST
)
2208 offset
= XEXP (offset
, 0);
2209 if (GET_CODE (offset
) == PLUS
)
2211 if (GET_CODE (XEXP (offset
, 0)) == CONST_INT
)
2213 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 1));
2214 offset
= XEXP (offset
, 0);
2216 else if (GET_CODE (XEXP (offset
, 1)) == CONST_INT
)
2218 base
= gen_rtx_PLUS (GET_MODE (base
), base
, XEXP (offset
, 0));
2219 offset
= XEXP (offset
, 1);
2223 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2224 offset
= const0_rtx
;
2227 else if (GET_CODE (offset
) != CONST_INT
)
2229 base
= gen_rtx_PLUS (GET_MODE (base
), base
, offset
);
2230 offset
= const0_rtx
;
2233 if (all_const
&& GET_CODE (base
) == PLUS
)
2234 base
= gen_rtx_CONST (GET_MODE (base
), base
);
2236 if (GET_CODE (offset
) != CONST_INT
)
2239 val
.start
= INTVAL (offset
);
2240 val
.end
= val
.start
+ GET_MODE_SIZE (GET_MODE (x
));
2244 else if (GET_CODE (x
) == REG
)
2247 val
.start
= true_regnum (x
);
2250 /* A pseudo with no hard reg. */
2251 val
.start
= REGNO (x
);
2252 val
.end
= val
.start
+ 1;
2256 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2258 else if (GET_CODE (x
) == SUBREG
)
2260 if (GET_CODE (SUBREG_REG (x
)) != REG
)
2261 /* This could be more precise, but it's good enough. */
2262 return decompose (SUBREG_REG (x
));
2264 val
.start
= true_regnum (x
);
2266 return decompose (SUBREG_REG (x
));
2269 val
.end
= val
.start
+ HARD_REGNO_NREGS (val
.start
, GET_MODE (x
));
2271 else if (CONSTANT_P (x
)
2272 /* This hasn't been assigned yet, so it can't conflict yet. */
2273 || GET_CODE (x
) == SCRATCH
)
2280 /* Return 1 if altering Y will not modify the value of X.
2281 Y is also described by YDATA, which should be decompose (Y). */
2284 immune_p (x
, y
, ydata
)
2286 struct decomposition ydata
;
2288 struct decomposition xdata
;
2291 return !refers_to_regno_for_reload_p (ydata
.start
, ydata
.end
, x
, NULL_PTR
);
2295 if (GET_CODE (y
) != MEM
)
2297 /* If Y is memory and X is not, Y can't affect X. */
2298 if (GET_CODE (x
) != MEM
)
2301 xdata
= decompose (x
);
2303 if (! rtx_equal_p (xdata
.base
, ydata
.base
))
2305 /* If bases are distinct symbolic constants, there is no overlap. */
2306 if (CONSTANT_P (xdata
.base
) && CONSTANT_P (ydata
.base
))
2308 /* Constants and stack slots never overlap. */
2309 if (CONSTANT_P (xdata
.base
)
2310 && (ydata
.base
== frame_pointer_rtx
2311 || ydata
.base
== hard_frame_pointer_rtx
2312 || ydata
.base
== stack_pointer_rtx
))
2314 if (CONSTANT_P (ydata
.base
)
2315 && (xdata
.base
== frame_pointer_rtx
2316 || xdata
.base
== hard_frame_pointer_rtx
2317 || xdata
.base
== stack_pointer_rtx
))
2319 /* If either base is variable, we don't know anything. */
2324 return (xdata
.start
>= ydata
.end
|| ydata
.start
>= xdata
.end
);
2327 /* Similar, but calls decompose. */
2330 safe_from_earlyclobber (op
, clobber
)
2333 struct decomposition early_data
;
2335 early_data
= decompose (clobber
);
2336 return immune_p (op
, clobber
, early_data
);
2339 /* Main entry point of this file: search the body of INSN
2340 for values that need reloading and record them with push_reload.
2341 REPLACE nonzero means record also where the values occur
2342 so that subst_reloads can be used.
2344 IND_LEVELS says how many levels of indirection are supported by this
2345 machine; a value of zero means that a memory reference is not a valid
2348 LIVE_KNOWN says we have valid information about which hard
2349 regs are live at each point in the program; this is true when
2350 we are called from global_alloc but false when stupid register
2351 allocation has been done.
2353 RELOAD_REG_P if nonzero is a vector indexed by hard reg number
2354 which is nonnegative if the reg has been commandeered for reloading into.
2355 It is copied into STATIC_RELOAD_REG_P and referenced from there
2356 by various subroutines.
2358 Return TRUE if some operands need to be changed, because of swapping
2359 commutative operands, reg_equiv_address substitution, or whatever. */
2362 find_reloads (insn
, replace
, ind_levels
, live_known
, reload_reg_p
)
2364 int replace
, ind_levels
;
2366 short *reload_reg_p
;
2368 register int insn_code_number
;
2371 /* These start out as the constraints for the insn
2372 and they are chewed up as we consider alternatives. */
2373 char *constraints
[MAX_RECOG_OPERANDS
];
2374 /* These are the preferred classes for an operand, or NO_REGS if it isn't
2376 enum reg_class preferred_class
[MAX_RECOG_OPERANDS
];
2377 char pref_or_nothing
[MAX_RECOG_OPERANDS
];
2378 /* Nonzero for a MEM operand whose entire address needs a reload. */
2379 int address_reloaded
[MAX_RECOG_OPERANDS
];
2380 /* Value of enum reload_type to use for operand. */
2381 enum reload_type operand_type
[MAX_RECOG_OPERANDS
];
2382 /* Value of enum reload_type to use within address of operand. */
2383 enum reload_type address_type
[MAX_RECOG_OPERANDS
];
2384 /* Save the usage of each operand. */
2385 enum reload_usage
{ RELOAD_READ
, RELOAD_READ_WRITE
, RELOAD_WRITE
} modified
[MAX_RECOG_OPERANDS
];
2386 int no_input_reloads
= 0, no_output_reloads
= 0;
2388 int this_alternative
[MAX_RECOG_OPERANDS
];
2389 char this_alternative_win
[MAX_RECOG_OPERANDS
];
2390 char this_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2391 char this_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2392 int this_alternative_matches
[MAX_RECOG_OPERANDS
];
2394 int goal_alternative
[MAX_RECOG_OPERANDS
];
2395 int this_alternative_number
;
2396 int goal_alternative_number
= 0;
2397 int operand_reloadnum
[MAX_RECOG_OPERANDS
];
2398 int goal_alternative_matches
[MAX_RECOG_OPERANDS
];
2399 int goal_alternative_matched
[MAX_RECOG_OPERANDS
];
2400 char goal_alternative_win
[MAX_RECOG_OPERANDS
];
2401 char goal_alternative_offmemok
[MAX_RECOG_OPERANDS
];
2402 char goal_alternative_earlyclobber
[MAX_RECOG_OPERANDS
];
2403 int goal_alternative_swapped
;
2406 char operands_match
[MAX_RECOG_OPERANDS
][MAX_RECOG_OPERANDS
];
2407 rtx substed_operand
[MAX_RECOG_OPERANDS
];
2408 rtx body
= PATTERN (insn
);
2409 rtx set
= single_set (insn
);
2410 int goal_earlyclobber
= 0, this_earlyclobber
;
2411 enum machine_mode operand_mode
[MAX_RECOG_OPERANDS
];
2417 n_earlyclobbers
= 0;
2418 replace_reloads
= replace
;
2419 hard_regs_live_known
= live_known
;
2420 static_reload_reg_p
= reload_reg_p
;
2422 /* JUMP_INSNs and CALL_INSNs are not allowed to have any output reloads;
2423 neither are insns that SET cc0. Insns that use CC0 are not allowed
2424 to have any input reloads. */
2425 if (GET_CODE (insn
) == JUMP_INSN
|| GET_CODE (insn
) == CALL_INSN
)
2426 no_output_reloads
= 1;
2429 if (reg_referenced_p (cc0_rtx
, PATTERN (insn
)))
2430 no_input_reloads
= 1;
2431 if (reg_set_p (cc0_rtx
, PATTERN (insn
)))
2432 no_output_reloads
= 1;
2435 #ifdef SECONDARY_MEMORY_NEEDED
2436 /* The eliminated forms of any secondary memory locations are per-insn, so
2437 clear them out here. */
2439 bzero ((char *) secondary_memlocs_elim
, sizeof secondary_memlocs_elim
);
2442 /* Dispose quickly of (set (reg..) (reg..)) if both have hard regs and it
2443 is cheap to move between them. If it is not, there may not be an insn
2444 to do the copy, so we may need a reload. */
2445 if (GET_CODE (body
) == SET
2446 && GET_CODE (SET_DEST (body
)) == REG
2447 && REGNO (SET_DEST (body
)) < FIRST_PSEUDO_REGISTER
2448 && GET_CODE (SET_SRC (body
)) == REG
2449 && REGNO (SET_SRC (body
)) < FIRST_PSEUDO_REGISTER
2450 && REGISTER_MOVE_COST (REGNO_REG_CLASS (REGNO (SET_SRC (body
))),
2451 REGNO_REG_CLASS (REGNO (SET_DEST (body
)))) == 2)
2454 extract_insn (insn
);
2456 noperands
= reload_n_operands
= recog_data
.n_operands
;
2457 n_alternatives
= recog_data
.n_alternatives
;
2459 /* Just return "no reloads" if insn has no operands with constraints. */
2460 if (noperands
== 0 || n_alternatives
== 0)
2463 insn_code_number
= INSN_CODE (insn
);
2464 this_insn_is_asm
= insn_code_number
< 0;
2466 memcpy (operand_mode
, recog_data
.operand_mode
,
2467 noperands
* sizeof (enum machine_mode
));
2468 memcpy (constraints
, recog_data
.constraints
, noperands
* sizeof (char *));
2472 /* If we will need to know, later, whether some pair of operands
2473 are the same, we must compare them now and save the result.
2474 Reloading the base and index registers will clobber them
2475 and afterward they will fail to match. */
2477 for (i
= 0; i
< noperands
; i
++)
2482 substed_operand
[i
] = recog_data
.operand
[i
];
2485 modified
[i
] = RELOAD_READ
;
2487 /* Scan this operand's constraint to see if it is an output operand,
2488 an in-out operand, is commutative, or should match another. */
2493 modified
[i
] = RELOAD_WRITE
;
2495 modified
[i
] = RELOAD_READ_WRITE
;
2498 /* The last operand should not be marked commutative. */
2499 if (i
== noperands
- 1)
2504 else if (c
>= '0' && c
<= '9')
2507 operands_match
[c
][i
]
2508 = operands_match_p (recog_data
.operand
[c
],
2509 recog_data
.operand
[i
]);
2511 /* An operand may not match itself. */
2515 /* If C can be commuted with C+1, and C might need to match I,
2516 then C+1 might also need to match I. */
2517 if (commutative
>= 0)
2519 if (c
== commutative
|| c
== commutative
+ 1)
2521 int other
= c
+ (c
== commutative
? 1 : -1);
2522 operands_match
[other
][i
]
2523 = operands_match_p (recog_data
.operand
[other
],
2524 recog_data
.operand
[i
]);
2526 if (i
== commutative
|| i
== commutative
+ 1)
2528 int other
= i
+ (i
== commutative
? 1 : -1);
2529 operands_match
[c
][other
]
2530 = operands_match_p (recog_data
.operand
[c
],
2531 recog_data
.operand
[other
]);
2533 /* Note that C is supposed to be less than I.
2534 No need to consider altering both C and I because in
2535 that case we would alter one into the other. */
2541 /* Examine each operand that is a memory reference or memory address
2542 and reload parts of the addresses into index registers.
2543 Also here any references to pseudo regs that didn't get hard regs
2544 but are equivalent to constants get replaced in the insn itself
2545 with those constants. Nobody will ever see them again.
2547 Finally, set up the preferred classes of each operand. */
2549 for (i
= 0; i
< noperands
; i
++)
2551 register RTX_CODE code
= GET_CODE (recog_data
.operand
[i
]);
2553 address_reloaded
[i
] = 0;
2554 operand_type
[i
] = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT
2555 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT
2558 = (modified
[i
] == RELOAD_READ
? RELOAD_FOR_INPUT_ADDRESS
2559 : modified
[i
] == RELOAD_WRITE
? RELOAD_FOR_OUTPUT_ADDRESS
2562 if (*constraints
[i
] == 0)
2563 /* Ignore things like match_operator operands. */
2565 else if (constraints
[i
][0] == 'p')
2567 find_reloads_address (VOIDmode
, NULL_PTR
,
2568 recog_data
.operand
[i
],
2569 recog_data
.operand_loc
[i
],
2570 i
, operand_type
[i
], ind_levels
, insn
);
2572 /* If we now have a simple operand where we used to have a
2573 PLUS or MULT, re-recognize and try again. */
2574 if ((GET_RTX_CLASS (GET_CODE (*recog_data
.operand_loc
[i
])) == 'o'
2575 || GET_CODE (*recog_data
.operand_loc
[i
]) == SUBREG
)
2576 && (GET_CODE (recog_data
.operand
[i
]) == MULT
2577 || GET_CODE (recog_data
.operand
[i
]) == PLUS
))
2579 INSN_CODE (insn
) = -1;
2580 retval
= find_reloads (insn
, replace
, ind_levels
, live_known
,
2585 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2586 substed_operand
[i
] = recog_data
.operand
[i
];
2588 else if (code
== MEM
)
2591 = find_reloads_address (GET_MODE (recog_data
.operand
[i
]),
2592 recog_data
.operand_loc
[i
],
2593 XEXP (recog_data
.operand
[i
], 0),
2594 &XEXP (recog_data
.operand
[i
], 0),
2595 i
, address_type
[i
], ind_levels
, insn
);
2596 recog_data
.operand
[i
] = *recog_data
.operand_loc
[i
];
2597 substed_operand
[i
] = recog_data
.operand
[i
];
2599 else if (code
== SUBREG
)
2601 rtx reg
= SUBREG_REG (recog_data
.operand
[i
]);
2603 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2606 && &SET_DEST (set
) == recog_data
.operand_loc
[i
],
2608 &address_reloaded
[i
]);
2610 /* If we made a MEM to load (a part of) the stackslot of a pseudo
2611 that didn't get a hard register, emit a USE with a REG_EQUAL
2612 note in front so that we might inherit a previous, possibly
2616 && GET_CODE (op
) == MEM
2617 && GET_CODE (reg
) == REG
2618 && (GET_MODE_SIZE (GET_MODE (reg
))
2619 >= GET_MODE_SIZE (GET_MODE (op
))))
2620 REG_NOTES (emit_insn_before (gen_rtx_USE (VOIDmode
, reg
), insn
))
2621 = gen_rtx_EXPR_LIST (REG_EQUAL
,
2622 reg_equiv_memory_loc
[REGNO (reg
)], NULL_RTX
);
2624 substed_operand
[i
] = recog_data
.operand
[i
] = op
;
2626 else if (code
== PLUS
|| GET_RTX_CLASS (code
) == '1')
2627 /* We can get a PLUS as an "operand" as a result of register
2628 elimination. See eliminate_regs and gen_reload. We handle
2629 a unary operator by reloading the operand. */
2630 substed_operand
[i
] = recog_data
.operand
[i
]
2631 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2632 ind_levels
, 0, insn
,
2633 &address_reloaded
[i
]);
2634 else if (code
== REG
)
2636 /* This is equivalent to calling find_reloads_toplev.
2637 The code is duplicated for speed.
2638 When we find a pseudo always equivalent to a constant,
2639 we replace it by the constant. We must be sure, however,
2640 that we don't try to replace it in the insn in which it
2642 register int regno
= REGNO (recog_data
.operand
[i
]);
2643 if (reg_equiv_constant
[regno
] != 0
2644 && (set
== 0 || &SET_DEST (set
) != recog_data
.operand_loc
[i
]))
2646 /* Record the existing mode so that the check if constants are
2647 allowed will work when operand_mode isn't specified. */
2649 if (operand_mode
[i
] == VOIDmode
)
2650 operand_mode
[i
] = GET_MODE (recog_data
.operand
[i
]);
2652 substed_operand
[i
] = recog_data
.operand
[i
]
2653 = reg_equiv_constant
[regno
];
2655 if (reg_equiv_memory_loc
[regno
] != 0
2656 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
2657 /* We need not give a valid is_set_dest argument since the case
2658 of a constant equivalence was checked above. */
2659 substed_operand
[i
] = recog_data
.operand
[i
]
2660 = find_reloads_toplev (recog_data
.operand
[i
], i
, address_type
[i
],
2661 ind_levels
, 0, insn
,
2662 &address_reloaded
[i
]);
2664 /* If the operand is still a register (we didn't replace it with an
2665 equivalent), get the preferred class to reload it into. */
2666 code
= GET_CODE (recog_data
.operand
[i
]);
2668 = ((code
== REG
&& REGNO (recog_data
.operand
[i
])
2669 >= FIRST_PSEUDO_REGISTER
)
2670 ? reg_preferred_class (REGNO (recog_data
.operand
[i
]))
2674 && REGNO (recog_data
.operand
[i
]) >= FIRST_PSEUDO_REGISTER
2675 && reg_alternate_class (REGNO (recog_data
.operand
[i
])) == NO_REGS
);
2678 /* If this is simply a copy from operand 1 to operand 0, merge the
2679 preferred classes for the operands. */
2680 if (set
!= 0 && noperands
>= 2 && recog_data
.operand
[0] == SET_DEST (set
)
2681 && recog_data
.operand
[1] == SET_SRC (set
))
2683 preferred_class
[0] = preferred_class
[1]
2684 = reg_class_subunion
[(int) preferred_class
[0]][(int) preferred_class
[1]];
2685 pref_or_nothing
[0] |= pref_or_nothing
[1];
2686 pref_or_nothing
[1] |= pref_or_nothing
[0];
2689 /* Now see what we need for pseudo-regs that didn't get hard regs
2690 or got the wrong kind of hard reg. For this, we must consider
2691 all the operands together against the register constraints. */
2693 best
= MAX_RECOG_OPERANDS
* 2 + 600;
2696 goal_alternative_swapped
= 0;
2699 /* The constraints are made of several alternatives.
2700 Each operand's constraint looks like foo,bar,... with commas
2701 separating the alternatives. The first alternatives for all
2702 operands go together, the second alternatives go together, etc.
2704 First loop over alternatives. */
2706 for (this_alternative_number
= 0;
2707 this_alternative_number
< n_alternatives
;
2708 this_alternative_number
++)
2710 /* Loop over operands for one constraint alternative. */
2711 /* LOSERS counts those that don't fit this alternative
2712 and would require loading. */
2714 /* BAD is set to 1 if it some operand can't fit this alternative
2715 even after reloading. */
2717 /* REJECT is a count of how undesirable this alternative says it is
2718 if any reloading is required. If the alternative matches exactly
2719 then REJECT is ignored, but otherwise it gets this much
2720 counted against it in addition to the reloading needed. Each
2721 ? counts three times here since we want the disparaging caused by
2722 a bad register class to only count 1/3 as much. */
2725 this_earlyclobber
= 0;
2727 for (i
= 0; i
< noperands
; i
++)
2729 register char *p
= constraints
[i
];
2730 register int win
= 0;
2731 /* 0 => this operand can be reloaded somehow for this alternative */
2733 /* 0 => this operand can be reloaded if the alternative allows regs. */
2736 register rtx operand
= recog_data
.operand
[i
];
2738 /* Nonzero means this is a MEM that must be reloaded into a reg
2739 regardless of what the constraint says. */
2740 int force_reload
= 0;
2742 /* Nonzero if a constant forced into memory would be OK for this
2745 int earlyclobber
= 0;
2747 /* If the predicate accepts a unary operator, it means that
2748 we need to reload the operand, but do not do this for
2749 match_operator and friends. */
2750 if (GET_RTX_CLASS (GET_CODE (operand
)) == '1' && *p
!= 0)
2751 operand
= XEXP (operand
, 0);
2753 /* If the operand is a SUBREG, extract
2754 the REG or MEM (or maybe even a constant) within.
2755 (Constants can occur as a result of reg_equiv_constant.) */
2757 while (GET_CODE (operand
) == SUBREG
)
2759 offset
+= SUBREG_WORD (operand
);
2760 operand
= SUBREG_REG (operand
);
2761 /* Force reload if this is a constant or PLUS or if there may
2762 be a problem accessing OPERAND in the outer mode. */
2763 if (CONSTANT_P (operand
)
2764 || GET_CODE (operand
) == PLUS
2765 /* We must force a reload of paradoxical SUBREGs
2766 of a MEM because the alignment of the inner value
2767 may not be enough to do the outer reference. On
2768 big-endian machines, it may also reference outside
2771 On machines that extend byte operations and we have a
2772 SUBREG where both the inner and outer modes are no wider
2773 than a word and the inner mode is narrower, is integral,
2774 and gets extended when loaded from memory, combine.c has
2775 made assumptions about the behavior of the machine in such
2776 register access. If the data is, in fact, in memory we
2777 must always load using the size assumed to be in the
2778 register and let the insn do the different-sized
2781 This is doubly true if WORD_REGISTER_OPERATIONS. In
2782 this case eliminate_regs has left non-paradoxical
2783 subregs for push_reloads to see. Make sure it does
2784 by forcing the reload.
2786 ??? When is it right at this stage to have a subreg
2787 of a mem that is _not_ to be handled specialy? IMO
2788 those should have been reduced to just a mem. */
2789 || ((GET_CODE (operand
) == MEM
2790 || (GET_CODE (operand
)== REG
2791 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
2792 #ifndef WORD_REGISTER_OPERATIONS
2793 && (((GET_MODE_BITSIZE (GET_MODE (operand
))
2794 < BIGGEST_ALIGNMENT
)
2795 && (GET_MODE_SIZE (operand_mode
[i
])
2796 > GET_MODE_SIZE (GET_MODE (operand
))))
2797 || (GET_CODE (operand
) == MEM
&& BYTES_BIG_ENDIAN
)
2798 #ifdef LOAD_EXTEND_OP
2799 || (GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2800 && (GET_MODE_SIZE (GET_MODE (operand
))
2802 && (GET_MODE_SIZE (operand_mode
[i
])
2803 > GET_MODE_SIZE (GET_MODE (operand
)))
2804 && INTEGRAL_MODE_P (GET_MODE (operand
))
2805 && LOAD_EXTEND_OP (GET_MODE (operand
)) != NIL
)
2810 /* Subreg of a hard reg which can't handle the subreg's mode
2811 or which would handle that mode in the wrong number of
2812 registers for subregging to work. */
2813 || (GET_CODE (operand
) == REG
2814 && REGNO (operand
) < FIRST_PSEUDO_REGISTER
2815 && ((GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
2816 && (GET_MODE_SIZE (GET_MODE (operand
))
2818 && ((GET_MODE_SIZE (GET_MODE (operand
))
2820 != HARD_REGNO_NREGS (REGNO (operand
),
2821 GET_MODE (operand
))))
2822 || ! HARD_REGNO_MODE_OK (REGNO (operand
) + offset
,
2827 this_alternative
[i
] = (int) NO_REGS
;
2828 this_alternative_win
[i
] = 0;
2829 this_alternative_offmemok
[i
] = 0;
2830 this_alternative_earlyclobber
[i
] = 0;
2831 this_alternative_matches
[i
] = -1;
2833 /* An empty constraint or empty alternative
2834 allows anything which matched the pattern. */
2835 if (*p
== 0 || *p
== ',')
2838 /* Scan this alternative's specs for this operand;
2839 set WIN if the operand fits any letter in this alternative.
2840 Otherwise, clear BADOP if this operand could
2841 fit some letter after reloads,
2842 or set WINREG if this operand could fit after reloads
2843 provided the constraint allows some registers. */
2845 while (*p
&& (c
= *p
++) != ',')
2848 case '=': case '+': case '*':
2852 /* The last operand should not be marked commutative. */
2853 if (i
!= noperands
- 1)
2866 /* Ignore rest of this alternative as far as
2867 reloading is concerned. */
2868 while (*p
&& *p
!= ',') p
++;
2871 case '0': case '1': case '2': case '3': case '4':
2872 case '5': case '6': case '7': case '8': case '9':
2875 this_alternative_matches
[i
] = c
;
2876 /* We are supposed to match a previous operand.
2877 If we do, we win if that one did.
2878 If we do not, count both of the operands as losers.
2879 (This is too conservative, since most of the time
2880 only a single reload insn will be needed to make
2881 the two operands win. As a result, this alternative
2882 may be rejected when it is actually desirable.) */
2883 if ((swapped
&& (c
!= commutative
|| i
!= commutative
+ 1))
2884 /* If we are matching as if two operands were swapped,
2885 also pretend that operands_match had been computed
2887 But if I is the second of those and C is the first,
2888 don't exchange them, because operands_match is valid
2889 only on one side of its diagonal. */
2891 [(c
== commutative
|| c
== commutative
+ 1)
2892 ? 2*commutative
+ 1 - c
: c
]
2893 [(i
== commutative
|| i
== commutative
+ 1)
2894 ? 2*commutative
+ 1 - i
: i
])
2895 : operands_match
[c
][i
])
2897 /* If we are matching a non-offsettable address where an
2898 offsettable address was expected, then we must reject
2899 this combination, because we can't reload it. */
2900 if (this_alternative_offmemok
[c
]
2901 && GET_CODE (recog_data
.operand
[c
]) == MEM
2902 && this_alternative
[c
] == (int) NO_REGS
2903 && ! this_alternative_win
[c
])
2906 win
= this_alternative_win
[c
];
2910 /* Operands don't match. */
2912 /* Retroactively mark the operand we had to match
2913 as a loser, if it wasn't already. */
2914 if (this_alternative_win
[c
])
2916 this_alternative_win
[c
] = 0;
2917 if (this_alternative
[c
] == (int) NO_REGS
)
2919 /* But count the pair only once in the total badness of
2920 this alternative, if the pair can be a dummy reload. */
2922 = find_dummy_reload (recog_data
.operand
[i
],
2923 recog_data
.operand
[c
],
2924 recog_data
.operand_loc
[i
],
2925 recog_data
.operand_loc
[c
],
2926 operand_mode
[i
], operand_mode
[c
],
2927 this_alternative
[c
], -1,
2928 this_alternative_earlyclobber
[c
]);
2933 /* This can be fixed with reloads if the operand
2934 we are supposed to match can be fixed with reloads. */
2936 this_alternative
[i
] = this_alternative
[c
];
2938 /* If we have to reload this operand and some previous
2939 operand also had to match the same thing as this
2940 operand, we don't know how to do that. So reject this
2942 if (! win
|| force_reload
)
2943 for (j
= 0; j
< i
; j
++)
2944 if (this_alternative_matches
[j
]
2945 == this_alternative_matches
[i
])
2951 /* All necessary reloads for an address_operand
2952 were handled in find_reloads_address. */
2953 this_alternative
[i
] = (int) BASE_REG_CLASS
;
2960 if (GET_CODE (operand
) == MEM
2961 || (GET_CODE (operand
) == REG
2962 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
2963 && reg_renumber
[REGNO (operand
)] < 0))
2965 if (CONSTANT_P (operand
)
2966 /* force_const_mem does not accept HIGH. */
2967 && GET_CODE (operand
) != HIGH
)
2973 if (GET_CODE (operand
) == MEM
2974 && ! address_reloaded
[i
]
2975 && (GET_CODE (XEXP (operand
, 0)) == PRE_DEC
2976 || GET_CODE (XEXP (operand
, 0)) == POST_DEC
))
2981 if (GET_CODE (operand
) == MEM
2982 && ! address_reloaded
[i
]
2983 && (GET_CODE (XEXP (operand
, 0)) == PRE_INC
2984 || GET_CODE (XEXP (operand
, 0)) == POST_INC
))
2988 /* Memory operand whose address is not offsettable. */
2992 if (GET_CODE (operand
) == MEM
2993 && ! (ind_levels
? offsettable_memref_p (operand
)
2994 : offsettable_nonstrict_memref_p (operand
))
2995 /* Certain mem addresses will become offsettable
2996 after they themselves are reloaded. This is important;
2997 we don't want our own handling of unoffsettables
2998 to override the handling of reg_equiv_address. */
2999 && !(GET_CODE (XEXP (operand
, 0)) == REG
3001 || reg_equiv_address
[REGNO (XEXP (operand
, 0))] != 0)))
3005 /* Memory operand whose address is offsettable. */
3009 if ((GET_CODE (operand
) == MEM
3010 /* If IND_LEVELS, find_reloads_address won't reload a
3011 pseudo that didn't get a hard reg, so we have to
3012 reject that case. */
3013 && ((ind_levels
? offsettable_memref_p (operand
)
3014 : offsettable_nonstrict_memref_p (operand
))
3015 /* A reloaded address is offsettable because it is now
3016 just a simple register indirect. */
3017 || address_reloaded
[i
]))
3018 || (GET_CODE (operand
) == REG
3019 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3020 && reg_renumber
[REGNO (operand
)] < 0
3021 /* If reg_equiv_address is nonzero, we will be
3022 loading it into a register; hence it will be
3023 offsettable, but we cannot say that reg_equiv_mem
3024 is offsettable without checking. */
3025 && ((reg_equiv_mem
[REGNO (operand
)] != 0
3026 && offsettable_memref_p (reg_equiv_mem
[REGNO (operand
)]))
3027 || (reg_equiv_address
[REGNO (operand
)] != 0))))
3029 /* force_const_mem does not accept HIGH. */
3030 if ((CONSTANT_P (operand
) && GET_CODE (operand
) != HIGH
)
3031 || GET_CODE (operand
) == MEM
)
3038 /* Output operand that is stored before the need for the
3039 input operands (and their index registers) is over. */
3040 earlyclobber
= 1, this_earlyclobber
= 1;
3044 #ifndef REAL_ARITHMETIC
3045 /* Match any floating double constant, but only if
3046 we can examine the bits of it reliably. */
3047 if ((HOST_FLOAT_FORMAT
!= TARGET_FLOAT_FORMAT
3048 || HOST_BITS_PER_WIDE_INT
!= BITS_PER_WORD
)
3049 && GET_MODE (operand
) != VOIDmode
&& ! flag_pretend_float
)
3052 if (GET_CODE (operand
) == CONST_DOUBLE
)
3057 if (GET_CODE (operand
) == CONST_DOUBLE
)
3063 if (GET_CODE (operand
) == CONST_DOUBLE
3064 && CONST_DOUBLE_OK_FOR_LETTER_P (operand
, c
))
3069 if (GET_CODE (operand
) == CONST_INT
3070 || (GET_CODE (operand
) == CONST_DOUBLE
3071 && GET_MODE (operand
) == VOIDmode
))
3074 if (CONSTANT_P (operand
)
3075 #ifdef LEGITIMATE_PIC_OPERAND_P
3076 && (! flag_pic
|| LEGITIMATE_PIC_OPERAND_P (operand
))
3083 if (GET_CODE (operand
) == CONST_INT
3084 || (GET_CODE (operand
) == CONST_DOUBLE
3085 && GET_MODE (operand
) == VOIDmode
))
3097 if (GET_CODE (operand
) == CONST_INT
3098 && CONST_OK_FOR_LETTER_P (INTVAL (operand
), c
))
3108 /* A PLUS is never a valid operand, but reload can make
3109 it from a register when eliminating registers. */
3110 && GET_CODE (operand
) != PLUS
3111 /* A SCRATCH is not a valid operand. */
3112 && GET_CODE (operand
) != SCRATCH
3113 #ifdef LEGITIMATE_PIC_OPERAND_P
3114 && (! CONSTANT_P (operand
)
3116 || LEGITIMATE_PIC_OPERAND_P (operand
))
3118 && (GENERAL_REGS
== ALL_REGS
3119 || GET_CODE (operand
) != REG
3120 || (REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3121 && reg_renumber
[REGNO (operand
)] < 0)))
3123 /* Drop through into 'r' case */
3127 = (int) reg_class_subunion
[this_alternative
[i
]][(int) GENERAL_REGS
];
3130 #ifdef EXTRA_CONSTRAINT
3136 if (EXTRA_CONSTRAINT (operand
, c
))
3143 = (int) reg_class_subunion
[this_alternative
[i
]][(int) REG_CLASS_FROM_LETTER (c
)];
3146 if (GET_MODE (operand
) == BLKmode
)
3149 if (GET_CODE (operand
) == REG
3150 && reg_fits_class_p (operand
, this_alternative
[i
],
3151 offset
, GET_MODE (recog_data
.operand
[i
])))
3158 /* If this operand could be handled with a reg,
3159 and some reg is allowed, then this operand can be handled. */
3160 if (winreg
&& this_alternative
[i
] != (int) NO_REGS
)
3163 /* Record which operands fit this alternative. */
3164 this_alternative_earlyclobber
[i
] = earlyclobber
;
3165 if (win
&& ! force_reload
)
3166 this_alternative_win
[i
] = 1;
3169 int const_to_mem
= 0;
3171 this_alternative_offmemok
[i
] = offmemok
;
3175 /* Alternative loses if it has no regs for a reg operand. */
3176 if (GET_CODE (operand
) == REG
3177 && this_alternative
[i
] == (int) NO_REGS
3178 && this_alternative_matches
[i
] < 0)
3181 /* If this is a constant that is reloaded into the desired
3182 class by copying it to memory first, count that as another
3183 reload. This is consistent with other code and is
3184 required to avoid choosing another alternative when
3185 the constant is moved into memory by this function on
3186 an early reload pass. Note that the test here is
3187 precisely the same as in the code below that calls
3189 if (CONSTANT_P (operand
)
3190 /* force_const_mem does not accept HIGH. */
3191 && GET_CODE (operand
) != HIGH
3192 && ((PREFERRED_RELOAD_CLASS (operand
,
3193 (enum reg_class
) this_alternative
[i
])
3195 || no_input_reloads
)
3196 && operand_mode
[i
] != VOIDmode
)
3199 if (this_alternative
[i
] != (int) NO_REGS
)
3203 /* If we can't reload this value at all, reject this
3204 alternative. Note that we could also lose due to
3205 LIMIT_RELOAD_RELOAD_CLASS, but we don't check that
3208 if (! CONSTANT_P (operand
)
3209 && (enum reg_class
) this_alternative
[i
] != NO_REGS
3210 && (PREFERRED_RELOAD_CLASS (operand
,
3211 (enum reg_class
) this_alternative
[i
])
3215 /* Alternative loses if it requires a type of reload not
3216 permitted for this insn. We can always reload SCRATCH
3217 and objects with a REG_UNUSED note. */
3218 else if (GET_CODE (operand
) != SCRATCH
3219 && modified
[i
] != RELOAD_READ
&& no_output_reloads
3220 && ! find_reg_note (insn
, REG_UNUSED
, operand
))
3222 else if (modified
[i
] != RELOAD_WRITE
&& no_input_reloads
3227 /* We prefer to reload pseudos over reloading other things,
3228 since such reloads may be able to be eliminated later.
3229 If we are reloading a SCRATCH, we won't be generating any
3230 insns, just using a register, so it is also preferred.
3231 So bump REJECT in other cases. Don't do this in the
3232 case where we are forcing a constant into memory and
3233 it will then win since we don't want to have a different
3234 alternative match then. */
3235 if (! (GET_CODE (operand
) == REG
3236 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
)
3237 && GET_CODE (operand
) != SCRATCH
3238 && ! (const_to_mem
&& constmemok
))
3241 /* Input reloads can be inherited more often than output
3242 reloads can be removed, so penalize output reloads. */
3243 if (operand_type
[i
] != RELOAD_FOR_INPUT
3244 && GET_CODE (operand
) != SCRATCH
)
3248 /* If this operand is a pseudo register that didn't get a hard
3249 reg and this alternative accepts some register, see if the
3250 class that we want is a subset of the preferred class for this
3251 register. If not, but it intersects that class, use the
3252 preferred class instead. If it does not intersect the preferred
3253 class, show that usage of this alternative should be discouraged;
3254 it will be discouraged more still if the register is `preferred
3255 or nothing'. We do this because it increases the chance of
3256 reusing our spill register in a later insn and avoiding a pair
3257 of memory stores and loads.
3259 Don't bother with this if this alternative will accept this
3262 Don't do this for a multiword operand, since it is only a
3263 small win and has the risk of requiring more spill registers,
3264 which could cause a large loss.
3266 Don't do this if the preferred class has only one register
3267 because we might otherwise exhaust the class. */
3270 if (! win
&& this_alternative
[i
] != (int) NO_REGS
3271 && GET_MODE_SIZE (operand_mode
[i
]) <= UNITS_PER_WORD
3272 && reg_class_size
[(int) preferred_class
[i
]] > 1)
3274 if (! reg_class_subset_p (this_alternative
[i
],
3275 preferred_class
[i
]))
3277 /* Since we don't have a way of forming the intersection,
3278 we just do something special if the preferred class
3279 is a subset of the class we have; that's the most
3280 common case anyway. */
3281 if (reg_class_subset_p (preferred_class
[i
],
3282 this_alternative
[i
]))
3283 this_alternative
[i
] = (int) preferred_class
[i
];
3285 reject
+= (2 + 2 * pref_or_nothing
[i
]);
3290 /* Now see if any output operands that are marked "earlyclobber"
3291 in this alternative conflict with any input operands
3292 or any memory addresses. */
3294 for (i
= 0; i
< noperands
; i
++)
3295 if (this_alternative_earlyclobber
[i
]
3296 && this_alternative_win
[i
])
3298 struct decomposition early_data
;
3300 early_data
= decompose (recog_data
.operand
[i
]);
3302 if (modified
[i
] == RELOAD_READ
)
3305 if (this_alternative
[i
] == NO_REGS
)
3307 this_alternative_earlyclobber
[i
] = 0;
3308 if (this_insn_is_asm
)
3309 error_for_asm (this_insn
,
3310 "`&' constraint used with no register class");
3315 for (j
= 0; j
< noperands
; j
++)
3316 /* Is this an input operand or a memory ref? */
3317 if ((GET_CODE (recog_data
.operand
[j
]) == MEM
3318 || modified
[j
] != RELOAD_WRITE
)
3320 /* Ignore things like match_operator operands. */
3321 && *recog_data
.constraints
[j
] != 0
3322 /* Don't count an input operand that is constrained to match
3323 the early clobber operand. */
3324 && ! (this_alternative_matches
[j
] == i
3325 && rtx_equal_p (recog_data
.operand
[i
],
3326 recog_data
.operand
[j
]))
3327 /* Is it altered by storing the earlyclobber operand? */
3328 && !immune_p (recog_data
.operand
[j
], recog_data
.operand
[i
],
3331 /* If the output is in a single-reg class,
3332 it's costly to reload it, so reload the input instead. */
3333 if (reg_class_size
[this_alternative
[i
]] == 1
3334 && (GET_CODE (recog_data
.operand
[j
]) == REG
3335 || GET_CODE (recog_data
.operand
[j
]) == SUBREG
))
3338 this_alternative_win
[j
] = 0;
3343 /* If an earlyclobber operand conflicts with something,
3344 it must be reloaded, so request this and count the cost. */
3348 this_alternative_win
[i
] = 0;
3349 for (j
= 0; j
< noperands
; j
++)
3350 if (this_alternative_matches
[j
] == i
3351 && this_alternative_win
[j
])
3353 this_alternative_win
[j
] = 0;
3359 /* If one alternative accepts all the operands, no reload required,
3360 choose that alternative; don't consider the remaining ones. */
3363 /* Unswap these so that they are never swapped at `finish'. */
3364 if (commutative
>= 0)
3366 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3367 recog_data
.operand
[commutative
+ 1]
3368 = substed_operand
[commutative
+ 1];
3370 for (i
= 0; i
< noperands
; i
++)
3372 goal_alternative_win
[i
] = 1;
3373 goal_alternative
[i
] = this_alternative
[i
];
3374 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3375 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3376 goal_alternative_earlyclobber
[i
]
3377 = this_alternative_earlyclobber
[i
];
3379 goal_alternative_number
= this_alternative_number
;
3380 goal_alternative_swapped
= swapped
;
3381 goal_earlyclobber
= this_earlyclobber
;
3385 /* REJECT, set by the ! and ? constraint characters and when a register
3386 would be reloaded into a non-preferred class, discourages the use of
3387 this alternative for a reload goal. REJECT is incremented by six
3388 for each ? and two for each non-preferred class. */
3389 losers
= losers
* 6 + reject
;
3391 /* If this alternative can be made to work by reloading,
3392 and it needs less reloading than the others checked so far,
3393 record it as the chosen goal for reloading. */
3394 if (! bad
&& best
> losers
)
3396 for (i
= 0; i
< noperands
; i
++)
3398 goal_alternative
[i
] = this_alternative
[i
];
3399 goal_alternative_win
[i
] = this_alternative_win
[i
];
3400 goal_alternative_offmemok
[i
] = this_alternative_offmemok
[i
];
3401 goal_alternative_matches
[i
] = this_alternative_matches
[i
];
3402 goal_alternative_earlyclobber
[i
]
3403 = this_alternative_earlyclobber
[i
];
3405 goal_alternative_swapped
= swapped
;
3407 goal_alternative_number
= this_alternative_number
;
3408 goal_earlyclobber
= this_earlyclobber
;
3412 /* If insn is commutative (it's safe to exchange a certain pair of operands)
3413 then we need to try each alternative twice,
3414 the second time matching those two operands
3415 as if we had exchanged them.
3416 To do this, really exchange them in operands.
3418 If we have just tried the alternatives the second time,
3419 return operands to normal and drop through. */
3421 if (commutative
>= 0)
3426 register enum reg_class tclass
;
3429 recog_data
.operand
[commutative
] = substed_operand
[commutative
+ 1];
3430 recog_data
.operand
[commutative
+ 1] = substed_operand
[commutative
];
3432 tclass
= preferred_class
[commutative
];
3433 preferred_class
[commutative
] = preferred_class
[commutative
+ 1];
3434 preferred_class
[commutative
+ 1] = tclass
;
3436 t
= pref_or_nothing
[commutative
];
3437 pref_or_nothing
[commutative
] = pref_or_nothing
[commutative
+ 1];
3438 pref_or_nothing
[commutative
+ 1] = t
;
3440 memcpy (constraints
, recog_data
.constraints
,
3441 noperands
* sizeof (char *));
3446 recog_data
.operand
[commutative
] = substed_operand
[commutative
];
3447 recog_data
.operand
[commutative
+ 1]
3448 = substed_operand
[commutative
+ 1];
3452 /* The operands don't meet the constraints.
3453 goal_alternative describes the alternative
3454 that we could reach by reloading the fewest operands.
3455 Reload so as to fit it. */
3457 if (best
== MAX_RECOG_OPERANDS
* 2 + 600)
3459 /* No alternative works with reloads?? */
3460 if (insn_code_number
>= 0)
3461 fatal_insn ("Unable to generate reloads for:", insn
);
3462 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3463 /* Avoid further trouble with this insn. */
3464 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3469 /* Jump to `finish' from above if all operands are valid already.
3470 In that case, goal_alternative_win is all 1. */
3473 /* Right now, for any pair of operands I and J that are required to match,
3475 goal_alternative_matches[J] is I.
3476 Set up goal_alternative_matched as the inverse function:
3477 goal_alternative_matched[I] = J. */
3479 for (i
= 0; i
< noperands
; i
++)
3480 goal_alternative_matched
[i
] = -1;
3482 for (i
= 0; i
< noperands
; i
++)
3483 if (! goal_alternative_win
[i
]
3484 && goal_alternative_matches
[i
] >= 0)
3485 goal_alternative_matched
[goal_alternative_matches
[i
]] = i
;
3487 /* If the best alternative is with operands 1 and 2 swapped,
3488 consider them swapped before reporting the reloads. Update the
3489 operand numbers of any reloads already pushed. */
3491 if (goal_alternative_swapped
)
3495 tem
= substed_operand
[commutative
];
3496 substed_operand
[commutative
] = substed_operand
[commutative
+ 1];
3497 substed_operand
[commutative
+ 1] = tem
;
3498 tem
= recog_data
.operand
[commutative
];
3499 recog_data
.operand
[commutative
] = recog_data
.operand
[commutative
+ 1];
3500 recog_data
.operand
[commutative
+ 1] = tem
;
3501 tem
= *recog_data
.operand_loc
[commutative
];
3502 *recog_data
.operand_loc
[commutative
]
3503 = *recog_data
.operand_loc
[commutative
+ 1];
3504 *recog_data
.operand_loc
[commutative
+1] = tem
;
3506 for (i
= 0; i
< n_reloads
; i
++)
3508 if (rld
[i
].opnum
== commutative
)
3509 rld
[i
].opnum
= commutative
+ 1;
3510 else if (rld
[i
].opnum
== commutative
+ 1)
3511 rld
[i
].opnum
= commutative
;
3515 for (i
= 0; i
< noperands
; i
++)
3517 operand_reloadnum
[i
] = -1;
3519 /* If this is an earlyclobber operand, we need to widen the scope.
3520 The reload must remain valid from the start of the insn being
3521 reloaded until after the operand is stored into its destination.
3522 We approximate this with RELOAD_OTHER even though we know that we
3523 do not conflict with RELOAD_FOR_INPUT_ADDRESS reloads.
3525 One special case that is worth checking is when we have an
3526 output that is earlyclobber but isn't used past the insn (typically
3527 a SCRATCH). In this case, we only need have the reload live
3528 through the insn itself, but not for any of our input or output
3530 But we must not accidentally narrow the scope of an existing
3531 RELOAD_OTHER reload - leave these alone.
3533 In any case, anything needed to address this operand can remain
3534 however they were previously categorized. */
3536 if (goal_alternative_earlyclobber
[i
] && operand_type
[i
] != RELOAD_OTHER
)
3538 = (find_reg_note (insn
, REG_UNUSED
, recog_data
.operand
[i
])
3539 ? RELOAD_FOR_INSN
: RELOAD_OTHER
);
3542 /* Any constants that aren't allowed and can't be reloaded
3543 into registers are here changed into memory references. */
3544 for (i
= 0; i
< noperands
; i
++)
3545 if (! goal_alternative_win
[i
]
3546 && CONSTANT_P (recog_data
.operand
[i
])
3547 /* force_const_mem does not accept HIGH. */
3548 && GET_CODE (recog_data
.operand
[i
]) != HIGH
3549 && ((PREFERRED_RELOAD_CLASS (recog_data
.operand
[i
],
3550 (enum reg_class
) goal_alternative
[i
])
3552 || no_input_reloads
)
3553 && operand_mode
[i
] != VOIDmode
)
3555 substed_operand
[i
] = recog_data
.operand
[i
]
3556 = find_reloads_toplev (force_const_mem (operand_mode
[i
],
3557 recog_data
.operand
[i
]),
3558 i
, address_type
[i
], ind_levels
, 0, insn
,
3560 if (alternative_allows_memconst (recog_data
.constraints
[i
],
3561 goal_alternative_number
))
3562 goal_alternative_win
[i
] = 1;
3565 /* Record the values of the earlyclobber operands for the caller. */
3566 if (goal_earlyclobber
)
3567 for (i
= 0; i
< noperands
; i
++)
3568 if (goal_alternative_earlyclobber
[i
])
3569 reload_earlyclobbers
[n_earlyclobbers
++] = recog_data
.operand
[i
];
3571 /* Now record reloads for all the operands that need them. */
3572 for (i
= 0; i
< noperands
; i
++)
3573 if (! goal_alternative_win
[i
])
3575 /* Operands that match previous ones have already been handled. */
3576 if (goal_alternative_matches
[i
] >= 0)
3578 /* Handle an operand with a nonoffsettable address
3579 appearing where an offsettable address will do
3580 by reloading the address into a base register.
3582 ??? We can also do this when the operand is a register and
3583 reg_equiv_mem is not offsettable, but this is a bit tricky,
3584 so we don't bother with it. It may not be worth doing. */
3585 else if (goal_alternative_matched
[i
] == -1
3586 && goal_alternative_offmemok
[i
]
3587 && GET_CODE (recog_data
.operand
[i
]) == MEM
)
3589 operand_reloadnum
[i
]
3590 = push_reload (XEXP (recog_data
.operand
[i
], 0), NULL_RTX
,
3591 &XEXP (recog_data
.operand
[i
], 0), NULL_PTR
,
3593 GET_MODE (XEXP (recog_data
.operand
[i
], 0)),
3594 VOIDmode
, 0, 0, i
, RELOAD_FOR_INPUT
);
3595 rld
[operand_reloadnum
[i
]].inc
3596 = GET_MODE_SIZE (GET_MODE (recog_data
.operand
[i
]));
3598 /* If this operand is an output, we will have made any
3599 reloads for its address as RELOAD_FOR_OUTPUT_ADDRESS, but
3600 now we are treating part of the operand as an input, so
3601 we must change these to RELOAD_FOR_INPUT_ADDRESS. */
3603 if (modified
[i
] == RELOAD_WRITE
)
3605 for (j
= 0; j
< n_reloads
; j
++)
3607 if (rld
[j
].opnum
== i
)
3609 if (rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
)
3610 rld
[j
].when_needed
= RELOAD_FOR_INPUT_ADDRESS
;
3611 else if (rld
[j
].when_needed
3612 == RELOAD_FOR_OUTADDR_ADDRESS
)
3613 rld
[j
].when_needed
= RELOAD_FOR_INPADDR_ADDRESS
;
3618 else if (goal_alternative_matched
[i
] == -1)
3620 operand_reloadnum
[i
]
3621 = push_reload ((modified
[i
] != RELOAD_WRITE
3622 ? recog_data
.operand
[i
] : 0),
3623 (modified
[i
] != RELOAD_READ
3624 ? recog_data
.operand
[i
] : 0),
3625 (modified
[i
] != RELOAD_WRITE
3626 ? recog_data
.operand_loc
[i
] : 0),
3627 (modified
[i
] != RELOAD_READ
3628 ? recog_data
.operand_loc
[i
] : 0),
3629 (enum reg_class
) goal_alternative
[i
],
3630 (modified
[i
] == RELOAD_WRITE
3631 ? VOIDmode
: operand_mode
[i
]),
3632 (modified
[i
] == RELOAD_READ
3633 ? VOIDmode
: operand_mode
[i
]),
3634 (insn_code_number
< 0 ? 0
3635 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3636 0, i
, operand_type
[i
]);
3638 /* In a matching pair of operands, one must be input only
3639 and the other must be output only.
3640 Pass the input operand as IN and the other as OUT. */
3641 else if (modified
[i
] == RELOAD_READ
3642 && modified
[goal_alternative_matched
[i
]] == RELOAD_WRITE
)
3644 operand_reloadnum
[i
]
3645 = push_reload (recog_data
.operand
[i
],
3646 recog_data
.operand
[goal_alternative_matched
[i
]],
3647 recog_data
.operand_loc
[i
],
3648 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3649 (enum reg_class
) goal_alternative
[i
],
3651 operand_mode
[goal_alternative_matched
[i
]],
3652 0, 0, i
, RELOAD_OTHER
);
3653 operand_reloadnum
[goal_alternative_matched
[i
]] = output_reloadnum
;
3655 else if (modified
[i
] == RELOAD_WRITE
3656 && modified
[goal_alternative_matched
[i
]] == RELOAD_READ
)
3658 operand_reloadnum
[goal_alternative_matched
[i
]]
3659 = push_reload (recog_data
.operand
[goal_alternative_matched
[i
]],
3660 recog_data
.operand
[i
],
3661 recog_data
.operand_loc
[goal_alternative_matched
[i
]],
3662 recog_data
.operand_loc
[i
],
3663 (enum reg_class
) goal_alternative
[i
],
3664 operand_mode
[goal_alternative_matched
[i
]],
3666 0, 0, i
, RELOAD_OTHER
);
3667 operand_reloadnum
[i
] = output_reloadnum
;
3669 else if (insn_code_number
>= 0)
3673 error_for_asm (insn
, "inconsistent operand constraints in an `asm'");
3674 /* Avoid further trouble with this insn. */
3675 PATTERN (insn
) = gen_rtx_USE (VOIDmode
, const0_rtx
);
3680 else if (goal_alternative_matched
[i
] < 0
3681 && goal_alternative_matches
[i
] < 0
3684 /* For each non-matching operand that's a MEM or a pseudo-register
3685 that didn't get a hard register, make an optional reload.
3686 This may get done even if the insn needs no reloads otherwise. */
3688 rtx operand
= recog_data
.operand
[i
];
3690 while (GET_CODE (operand
) == SUBREG
)
3691 operand
= XEXP (operand
, 0);
3692 if ((GET_CODE (operand
) == MEM
3693 || (GET_CODE (operand
) == REG
3694 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3695 /* If this is only for an output, the optional reload would not
3696 actually cause us to use a register now, just note that
3697 something is stored here. */
3698 && ((enum reg_class
) goal_alternative
[i
] != NO_REGS
3699 || modified
[i
] == RELOAD_WRITE
)
3700 && ! no_input_reloads
3701 /* An optional output reload might allow to delete INSN later.
3702 We mustn't make in-out reloads on insns that are not permitted
3704 If this is an asm, we can't delete it; we must not even call
3705 push_reload for an optional output reload in this case,
3706 because we can't be sure that the constraint allows a register,
3707 and push_reload verifies the constraints for asms. */
3708 && (modified
[i
] == RELOAD_READ
3709 || (! no_output_reloads
&& ! this_insn_is_asm
)))
3710 operand_reloadnum
[i
]
3711 = push_reload ((modified
[i
] != RELOAD_WRITE
3712 ? recog_data
.operand
[i
] : 0),
3713 (modified
[i
] != RELOAD_READ
3714 ? recog_data
.operand
[i
] : 0),
3715 (modified
[i
] != RELOAD_WRITE
3716 ? recog_data
.operand_loc
[i
] : 0),
3717 (modified
[i
] != RELOAD_READ
3718 ? recog_data
.operand_loc
[i
] : 0),
3719 (enum reg_class
) goal_alternative
[i
],
3720 (modified
[i
] == RELOAD_WRITE
3721 ? VOIDmode
: operand_mode
[i
]),
3722 (modified
[i
] == RELOAD_READ
3723 ? VOIDmode
: operand_mode
[i
]),
3724 (insn_code_number
< 0 ? 0
3725 : insn_data
[insn_code_number
].operand
[i
].strict_low
),
3726 1, i
, operand_type
[i
]);
3727 /* If a memory reference remains (either as a MEM or a pseudo that
3728 did not get a hard register), yet we can't make an optional
3729 reload, check if this is actually a pseudo register reference;
3730 we then need to emit a USE and/or a CLOBBER so that reload
3731 inheritance will do the right thing. */
3733 && (GET_CODE (operand
) == MEM
3734 || (GET_CODE (operand
) == REG
3735 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
3736 && reg_renumber
[REGNO (operand
)] < 0)))
3738 operand
= *recog_data
.operand_loc
[i
];
3740 while (GET_CODE (operand
) == SUBREG
)
3741 operand
= XEXP (operand
, 0);
3742 if (GET_CODE (operand
) == REG
)
3744 if (modified
[i
] != RELOAD_WRITE
)
3745 emit_insn_before (gen_rtx_USE (VOIDmode
, operand
), insn
);
3746 if (modified
[i
] != RELOAD_READ
)
3747 emit_insn_after (gen_rtx_CLOBBER (VOIDmode
, operand
), insn
);
3751 else if (goal_alternative_matches
[i
] >= 0
3752 && goal_alternative_win
[goal_alternative_matches
[i
]]
3753 && modified
[i
] == RELOAD_READ
3754 && modified
[goal_alternative_matches
[i
]] == RELOAD_WRITE
3755 && ! no_input_reloads
&& ! no_output_reloads
3758 /* Similarly, make an optional reload for a pair of matching
3759 objects that are in MEM or a pseudo that didn't get a hard reg. */
3761 rtx operand
= recog_data
.operand
[i
];
3763 while (GET_CODE (operand
) == SUBREG
)
3764 operand
= XEXP (operand
, 0);
3765 if ((GET_CODE (operand
) == MEM
3766 || (GET_CODE (operand
) == REG
3767 && REGNO (operand
) >= FIRST_PSEUDO_REGISTER
))
3768 && ((enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]]
3770 operand_reloadnum
[i
] = operand_reloadnum
[goal_alternative_matches
[i
]]
3771 = push_reload (recog_data
.operand
[goal_alternative_matches
[i
]],
3772 recog_data
.operand
[i
],
3773 recog_data
.operand_loc
[goal_alternative_matches
[i
]],
3774 recog_data
.operand_loc
[i
],
3775 (enum reg_class
) goal_alternative
[goal_alternative_matches
[i
]],
3776 operand_mode
[goal_alternative_matches
[i
]],
3778 0, 1, goal_alternative_matches
[i
], RELOAD_OTHER
);
3781 /* Perform whatever substitutions on the operands we are supposed
3782 to make due to commutativity or replacement of registers
3783 with equivalent constants or memory slots. */
3785 for (i
= 0; i
< noperands
; i
++)
3787 /* We only do this on the last pass through reload, because it is
3788 possible for some data (like reg_equiv_address) to be changed during
3789 later passes. Moreover, we loose the opportunity to get a useful
3790 reload_{in,out}_reg when we do these replacements. */
3794 rtx substitution
= substed_operand
[i
];
3796 *recog_data
.operand_loc
[i
] = substitution
;
3798 /* If we're replacing an operand with a LABEL_REF, we need
3799 to make sure that there's a REG_LABEL note attached to
3800 this instruction. */
3801 if (GET_CODE (insn
) != JUMP_INSN
3802 && GET_CODE (substitution
) == LABEL_REF
3803 && !find_reg_note (insn
, REG_LABEL
, XEXP (substitution
, 0)))
3804 REG_NOTES (insn
) = gen_rtx_EXPR_LIST (REG_LABEL
,
3805 XEXP (substitution
, 0),
3809 retval
|= (substed_operand
[i
] != *recog_data
.operand_loc
[i
]);
3812 /* If this insn pattern contains any MATCH_DUP's, make sure that
3813 they will be substituted if the operands they match are substituted.
3814 Also do now any substitutions we already did on the operands.
3816 Don't do this if we aren't making replacements because we might be
3817 propagating things allocated by frame pointer elimination into places
3818 it doesn't expect. */
3820 if (insn_code_number
>= 0 && replace
)
3821 for (i
= insn_data
[insn_code_number
].n_dups
- 1; i
>= 0; i
--)
3823 int opno
= recog_data
.dup_num
[i
];
3824 *recog_data
.dup_loc
[i
] = *recog_data
.operand_loc
[opno
];
3825 if (operand_reloadnum
[opno
] >= 0)
3826 push_replacement (recog_data
.dup_loc
[i
], operand_reloadnum
[opno
],
3827 insn_data
[insn_code_number
].operand
[opno
].mode
);
3831 /* This loses because reloading of prior insns can invalidate the equivalence
3832 (or at least find_equiv_reg isn't smart enough to find it any more),
3833 causing this insn to need more reload regs than it needed before.
3834 It may be too late to make the reload regs available.
3835 Now this optimization is done safely in choose_reload_regs. */
3837 /* For each reload of a reg into some other class of reg,
3838 search for an existing equivalent reg (same value now) in the right class.
3839 We can use it as long as we don't need to change its contents. */
3840 for (i
= 0; i
< n_reloads
; i
++)
3841 if (rld
[i
].reg_rtx
== 0
3843 && GET_CODE (rld
[i
].in
) == REG
3847 = find_equiv_reg (rld
[i
].in
, insn
, rld
[i
].class, -1,
3848 static_reload_reg_p
, 0, rld
[i
].inmode
);
3849 /* Prevent generation of insn to load the value
3850 because the one we found already has the value. */
3852 rld
[i
].in
= rld
[i
].reg_rtx
;
3856 /* Perhaps an output reload can be combined with another
3857 to reduce needs by one. */
3858 if (!goal_earlyclobber
)
3861 /* If we have a pair of reloads for parts of an address, they are reloading
3862 the same object, the operands themselves were not reloaded, and they
3863 are for two operands that are supposed to match, merge the reloads and
3864 change the type of the surviving reload to RELOAD_FOR_OPERAND_ADDRESS. */
3866 for (i
= 0; i
< n_reloads
; i
++)
3870 for (j
= i
+ 1; j
< n_reloads
; j
++)
3871 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3872 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3873 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3874 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3875 && (rld
[j
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3876 || rld
[j
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3877 || rld
[j
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3878 || rld
[j
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3879 && rtx_equal_p (rld
[i
].in
, rld
[j
].in
)
3880 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3881 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
)
3882 && (operand_reloadnum
[rld
[j
].opnum
] < 0
3883 || rld
[operand_reloadnum
[rld
[j
].opnum
]].optional
)
3884 && (goal_alternative_matches
[rld
[i
].opnum
] == rld
[j
].opnum
3885 || (goal_alternative_matches
[rld
[j
].opnum
]
3888 for (k
= 0; k
< n_replacements
; k
++)
3889 if (replacements
[k
].what
== j
)
3890 replacements
[k
].what
= i
;
3892 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3893 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3894 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3896 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3901 /* Scan all the reloads and update their type.
3902 If a reload is for the address of an operand and we didn't reload
3903 that operand, change the type. Similarly, change the operand number
3904 of a reload when two operands match. If a reload is optional, treat it
3905 as though the operand isn't reloaded.
3907 ??? This latter case is somewhat odd because if we do the optional
3908 reload, it means the object is hanging around. Thus we need only
3909 do the address reload if the optional reload was NOT done.
3911 Change secondary reloads to be the address type of their operand, not
3914 If an operand's reload is now RELOAD_OTHER, change any
3915 RELOAD_FOR_INPUT_ADDRESS reloads of that operand to
3916 RELOAD_FOR_OTHER_ADDRESS. */
3918 for (i
= 0; i
< n_reloads
; i
++)
3920 if (rld
[i
].secondary_p
3921 && rld
[i
].when_needed
== operand_type
[rld
[i
].opnum
]
3922 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3923 || (rld
[operand_reloadnum
[rld
[i
].opnum
]].secondary_in_icode
== -1
3924 && rld
[operand_reloadnum
[rld
[i
].opnum
]].secondary_out_icode
== -1)))
3925 rld
[i
].when_needed
= address_type
[rld
[i
].opnum
];
3927 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3928 || rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3929 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3930 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3931 && (operand_reloadnum
[rld
[i
].opnum
] < 0
3932 || rld
[operand_reloadnum
[rld
[i
].opnum
]].optional
))
3934 /* If we have a secondary reload to go along with this reload,
3935 change its type to RELOAD_FOR_OPADDR_ADDR. */
3937 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3938 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3939 && rld
[i
].secondary_in_reload
!= -1)
3941 int secondary_in_reload
= rld
[i
].secondary_in_reload
;
3943 rld
[secondary_in_reload
].when_needed
3944 = (rld
[i
].secondary_in_icode
== -1
3945 ? RELOAD_FOR_OPADDR_ADDR
3946 : RELOAD_FOR_OPERAND_ADDRESS
);
3948 /* If there's a tertiary reload we have to change it also. */
3949 if (secondary_in_reload
> 0
3950 && rld
[secondary_in_reload
].secondary_in_reload
!= -1)
3951 rld
[rld
[secondary_in_reload
].secondary_in_reload
].when_needed
3952 = rld
[secondary_in_reload
].when_needed
;
3955 if ((rld
[i
].when_needed
== RELOAD_FOR_OUTPUT_ADDRESS
3956 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3957 && rld
[i
].secondary_out_reload
!= -1)
3959 int secondary_out_reload
= rld
[i
].secondary_out_reload
;
3961 rld
[secondary_out_reload
].when_needed
3962 = (rld
[i
].secondary_out_icode
== -1
3963 ? RELOAD_FOR_OPADDR_ADDR
3964 : RELOAD_FOR_OPERAND_ADDRESS
);
3966 /* If there's a tertiary reload we have to change it also. */
3967 if (secondary_out_reload
3968 && rld
[secondary_out_reload
].secondary_out_reload
!= -1)
3969 rld
[rld
[secondary_out_reload
].secondary_out_reload
].when_needed
3970 = rld
[secondary_out_reload
].when_needed
;
3973 if (rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
3974 || rld
[i
].when_needed
== RELOAD_FOR_OUTADDR_ADDRESS
)
3975 rld
[i
].when_needed
= RELOAD_FOR_OPADDR_ADDR
;
3977 rld
[i
].when_needed
= RELOAD_FOR_OPERAND_ADDRESS
;
3980 if ((rld
[i
].when_needed
== RELOAD_FOR_INPUT_ADDRESS
3981 || rld
[i
].when_needed
== RELOAD_FOR_INPADDR_ADDRESS
)
3982 && operand_reloadnum
[rld
[i
].opnum
] >= 0
3983 && (rld
[operand_reloadnum
[rld
[i
].opnum
]].when_needed
3985 rld
[i
].when_needed
= RELOAD_FOR_OTHER_ADDRESS
;
3987 if (goal_alternative_matches
[rld
[i
].opnum
] >= 0)
3988 rld
[i
].opnum
= goal_alternative_matches
[rld
[i
].opnum
];
3991 /* Scan all the reloads, and check for RELOAD_FOR_OPERAND_ADDRESS reloads.
3992 If we have more than one, then convert all RELOAD_FOR_OPADDR_ADDR
3993 reloads to RELOAD_FOR_OPERAND_ADDRESS reloads.
3995 choose_reload_regs assumes that RELOAD_FOR_OPADDR_ADDR reloads never
3996 conflict with RELOAD_FOR_OPERAND_ADDRESS reloads. This is true for a
3997 single pair of RELOAD_FOR_OPADDR_ADDR/RELOAD_FOR_OPERAND_ADDRESS reloads.
3998 However, if there is more than one RELOAD_FOR_OPERAND_ADDRESS reload,
3999 then a RELOAD_FOR_OPADDR_ADDR reload conflicts with all
4000 RELOAD_FOR_OPERAND_ADDRESS reloads other than the one that uses it.
4001 This is complicated by the fact that a single operand can have more
4002 than one RELOAD_FOR_OPERAND_ADDRESS reload. It is very difficult to fix
4003 choose_reload_regs without affecting code quality, and cases that
4004 actually fail are extremely rare, so it turns out to be better to fix
4005 the problem here by not generating cases that choose_reload_regs will
4007 /* There is a similar problem with RELOAD_FOR_INPUT_ADDRESS /
4008 RELOAD_FOR_OUTPUT_ADDRESS when there is more than one of a kind for
4010 We can reduce the register pressure by exploiting that a
4011 RELOAD_FOR_X_ADDR_ADDR that precedes all RELOAD_FOR_X_ADDRESS reloads
4012 does not conflict with any of them, if it is only used for the first of
4013 the RELOAD_FOR_X_ADDRESS reloads. */
4015 int first_op_addr_num
= -2;
4016 int first_inpaddr_num
[MAX_RECOG_OPERANDS
];
4017 int first_outpaddr_num
[MAX_RECOG_OPERANDS
];
4019 /* We use last_op_addr_reload and the contents of the above arrays
4020 first as flags - -2 means no instance encountered, -1 means exactly
4021 one instance encountered.
4022 If more than one instance has been encountered, we store the reload
4023 number of the first reload of the kind in question; reload numbers
4024 are known to be non-negative. */
4025 for (i
= 0; i
< noperands
; i
++)
4026 first_inpaddr_num
[i
] = first_outpaddr_num
[i
] = -2;
4027 for (i
= n_reloads
- 1; i
>= 0; i
--)
4029 switch (rld
[i
].when_needed
)
4031 case RELOAD_FOR_OPERAND_ADDRESS
:
4032 if (++first_op_addr_num
>= 0)
4034 first_op_addr_num
= i
;
4038 case RELOAD_FOR_INPUT_ADDRESS
:
4039 if (++first_inpaddr_num
[rld
[i
].opnum
] >= 0)
4041 first_inpaddr_num
[rld
[i
].opnum
] = i
;
4045 case RELOAD_FOR_OUTPUT_ADDRESS
:
4046 if (++first_outpaddr_num
[rld
[i
].opnum
] >= 0)
4048 first_outpaddr_num
[rld
[i
].opnum
] = i
;
4059 for (i
= 0; i
< n_reloads
; i
++)
4062 enum reload_type type
;
4064 switch (rld
[i
].when_needed
)
4066 case RELOAD_FOR_OPADDR_ADDR
:
4067 first_num
= first_op_addr_num
;
4068 type
= RELOAD_FOR_OPERAND_ADDRESS
;
4070 case RELOAD_FOR_INPADDR_ADDRESS
:
4071 first_num
= first_inpaddr_num
[rld
[i
].opnum
];
4072 type
= RELOAD_FOR_INPUT_ADDRESS
;
4074 case RELOAD_FOR_OUTADDR_ADDRESS
:
4075 first_num
= first_outpaddr_num
[rld
[i
].opnum
];
4076 type
= RELOAD_FOR_OUTPUT_ADDRESS
;
4083 else if (i
> first_num
)
4084 rld
[i
].when_needed
= type
;
4087 /* Check if the only TYPE reload that uses reload I is
4088 reload FIRST_NUM. */
4089 for (j
= n_reloads
- 1; j
> first_num
; j
--)
4091 if (rld
[j
].when_needed
== type
4092 && (rld
[i
].secondary_p
4093 ? rld
[j
].secondary_in_reload
== i
4094 : reg_mentioned_p (rld
[i
].in
, rld
[j
].in
)))
4096 rld
[i
].when_needed
= type
;
4105 /* See if we have any reloads that are now allowed to be merged
4106 because we've changed when the reload is needed to
4107 RELOAD_FOR_OPERAND_ADDRESS or RELOAD_FOR_OTHER_ADDRESS. Only
4108 check for the most common cases. */
4110 for (i
= 0; i
< n_reloads
; i
++)
4111 if (rld
[i
].in
!= 0 && rld
[i
].out
== 0
4112 && (rld
[i
].when_needed
== RELOAD_FOR_OPERAND_ADDRESS
4113 || rld
[i
].when_needed
== RELOAD_FOR_OPADDR_ADDR
4114 || rld
[i
].when_needed
== RELOAD_FOR_OTHER_ADDRESS
))
4115 for (j
= 0; j
< n_reloads
; j
++)
4116 if (i
!= j
&& rld
[j
].in
!= 0 && rld
[j
].out
== 0
4117 && rld
[j
].when_needed
== rld
[i
].when_needed
4118 && MATCHES (rld
[i
].in
, rld
[j
].in
)
4119 && rld
[i
].class == rld
[j
].class
4120 && !rld
[i
].nocombine
&& !rld
[j
].nocombine
4121 && rld
[i
].reg_rtx
== rld
[j
].reg_rtx
)
4123 rld
[i
].opnum
= MIN (rld
[i
].opnum
, rld
[j
].opnum
);
4124 transfer_replacements (i
, j
);
4129 /* If we made any reloads for addresses, see if they violate a
4130 "no input reloads" requirement for this insn. But loads that we
4131 do after the insn (such as for output addresses) are fine. */
4132 if (no_input_reloads
)
4133 for (i
= 0; i
< n_reloads
; i
++)
4135 && rld
[i
].when_needed
!= RELOAD_FOR_OUTADDR_ADDRESS
4136 && rld
[i
].when_needed
!= RELOAD_FOR_OUTPUT_ADDRESS
)
4140 /* Compute reload_mode and reload_nregs. */
4141 for (i
= 0; i
< n_reloads
; i
++)
4144 = (rld
[i
].inmode
== VOIDmode
4145 || (GET_MODE_SIZE (rld
[i
].outmode
)
4146 > GET_MODE_SIZE (rld
[i
].inmode
)))
4147 ? rld
[i
].outmode
: rld
[i
].inmode
;
4149 rld
[i
].nregs
= CLASS_MAX_NREGS (rld
[i
].class, rld
[i
].mode
);
4155 /* Return 1 if alternative number ALTNUM in constraint-string CONSTRAINT
4156 accepts a memory operand with constant address. */
4159 alternative_allows_memconst (constraint
, altnum
)
4160 const char *constraint
;
4164 /* Skip alternatives before the one requested. */
4167 while (*constraint
++ != ',');
4170 /* Scan the requested alternative for 'm' or 'o'.
4171 If one of them is present, this alternative accepts memory constants. */
4172 while ((c
= *constraint
++) && c
!= ',' && c
!= '#')
4173 if (c
== 'm' || c
== 'o')
4178 /* Scan X for memory references and scan the addresses for reloading.
4179 Also checks for references to "constant" regs that we want to eliminate
4180 and replaces them with the values they stand for.
4181 We may alter X destructively if it contains a reference to such.
4182 If X is just a constant reg, we return the equivalent value
4185 IND_LEVELS says how many levels of indirect addressing this machine
4188 OPNUM and TYPE identify the purpose of the reload.
4190 IS_SET_DEST is true if X is the destination of a SET, which is not
4191 appropriate to be replaced by a constant.
4193 INSN, if nonzero, is the insn in which we do the reload. It is used
4194 to determine if we may generate output reloads, and where to put USEs
4195 for pseudos that we have to replace with stack slots.
4197 ADDRESS_RELOADED. If nonzero, is a pointer to where we put the
4198 result of find_reloads_address. */
4201 find_reloads_toplev (x
, opnum
, type
, ind_levels
, is_set_dest
, insn
,
4205 enum reload_type type
;
4209 int *address_reloaded
;
4211 register RTX_CODE code
= GET_CODE (x
);
4213 register const char *fmt
= GET_RTX_FORMAT (code
);
4219 /* This code is duplicated for speed in find_reloads. */
4220 register int regno
= REGNO (x
);
4221 if (reg_equiv_constant
[regno
] != 0 && !is_set_dest
)
4222 x
= reg_equiv_constant
[regno
];
4224 /* This creates (subreg (mem...)) which would cause an unnecessary
4225 reload of the mem. */
4226 else if (reg_equiv_mem
[regno
] != 0)
4227 x
= reg_equiv_mem
[regno
];
4229 else if (reg_equiv_memory_loc
[regno
]
4230 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
4232 rtx mem
= make_memloc (x
, regno
);
4233 if (reg_equiv_address
[regno
]
4234 || ! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4236 /* If this is not a toplevel operand, find_reloads doesn't see
4237 this substitution. We have to emit a USE of the pseudo so
4238 that delete_output_reload can see it. */
4239 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
4240 emit_insn_before (gen_rtx_USE (VOIDmode
, x
), insn
);
4242 i
= find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0), &XEXP (x
, 0),
4243 opnum
, type
, ind_levels
, insn
);
4244 if (address_reloaded
)
4245 *address_reloaded
= i
;
4254 i
= find_reloads_address (GET_MODE (x
), &tem
, XEXP (x
, 0), &XEXP (x
, 0),
4255 opnum
, type
, ind_levels
, insn
);
4256 if (address_reloaded
)
4257 *address_reloaded
= i
;
4262 if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == REG
)
4264 /* Check for SUBREG containing a REG that's equivalent to a constant.
4265 If the constant has a known value, truncate it right now.
4266 Similarly if we are extracting a single-word of a multi-word
4267 constant. If the constant is symbolic, allow it to be substituted
4268 normally. push_reload will strip the subreg later. If the
4269 constant is VOIDmode, abort because we will lose the mode of
4270 the register (this should never happen because one of the cases
4271 above should handle it). */
4273 register int regno
= REGNO (SUBREG_REG (x
));
4276 if (subreg_lowpart_p (x
)
4277 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4278 && reg_equiv_constant
[regno
] != 0
4279 && (tem
= gen_lowpart_common (GET_MODE (x
),
4280 reg_equiv_constant
[regno
])) != 0)
4283 if (GET_MODE_BITSIZE (GET_MODE (x
)) == BITS_PER_WORD
4284 && regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4285 && reg_equiv_constant
[regno
] != 0
4286 && (tem
= operand_subword (reg_equiv_constant
[regno
],
4288 GET_MODE (SUBREG_REG (x
)))) != 0)
4290 /* TEM is now a word sized constant for the bits from X that
4291 we wanted. However, TEM may be the wrong representation.
4293 Use gen_lowpart_common to convert a CONST_INT into a
4294 CONST_DOUBLE and vice versa as needed according to by the mode
4296 tem
= gen_lowpart_common (GET_MODE (x
), tem
);
4302 /* If the SUBREG is wider than a word, the above test will fail.
4303 For example, we might have a SImode SUBREG of a DImode SUBREG_REG
4304 for a 16 bit target, or a DImode SUBREG of a TImode SUBREG_REG for
4305 a 32 bit target. We still can - and have to - handle this
4306 for non-paradoxical subregs of CONST_INTs. */
4307 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4308 && reg_equiv_constant
[regno
] != 0
4309 && GET_CODE (reg_equiv_constant
[regno
]) == CONST_INT
4310 && (GET_MODE_SIZE (GET_MODE (x
))
4311 < GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)))))
4313 int shift
= SUBREG_WORD (x
) * BITS_PER_WORD
;
4314 if (WORDS_BIG_ENDIAN
)
4315 shift
= (GET_MODE_BITSIZE (GET_MODE (SUBREG_REG (x
)))
4316 - GET_MODE_BITSIZE (GET_MODE (x
))
4318 /* Here we use the knowledge that CONST_INTs have a
4319 HOST_WIDE_INT field. */
4320 if (shift
>= HOST_BITS_PER_WIDE_INT
)
4321 shift
= HOST_BITS_PER_WIDE_INT
- 1;
4322 return GEN_INT (INTVAL (reg_equiv_constant
[regno
]) >> shift
);
4325 if (regno
>= FIRST_PSEUDO_REGISTER
&& reg_renumber
[regno
] < 0
4326 && reg_equiv_constant
[regno
] != 0
4327 && GET_MODE (reg_equiv_constant
[regno
]) == VOIDmode
)
4330 /* If the subreg contains a reg that will be converted to a mem,
4331 convert the subreg to a narrower memref now.
4332 Otherwise, we would get (subreg (mem ...) ...),
4333 which would force reload of the mem.
4335 We also need to do this if there is an equivalent MEM that is
4336 not offsettable. In that case, alter_subreg would produce an
4337 invalid address on big-endian machines.
4339 For machines that extend byte loads, we must not reload using
4340 a wider mode if we have a paradoxical SUBREG. find_reloads will
4341 force a reload in that case. So we should not do anything here. */
4343 else if (regno
>= FIRST_PSEUDO_REGISTER
4344 #ifdef LOAD_EXTEND_OP
4345 && (GET_MODE_SIZE (GET_MODE (x
))
4346 <= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4348 && (reg_equiv_address
[regno
] != 0
4349 || (reg_equiv_mem
[regno
] != 0
4350 && (! strict_memory_address_p (GET_MODE (x
),
4351 XEXP (reg_equiv_mem
[regno
], 0))
4352 || ! offsettable_memref_p (reg_equiv_mem
[regno
])
4353 || num_not_at_initial_offset
))))
4354 x
= find_reloads_subreg_address (x
, 1, opnum
, type
, ind_levels
,
4357 else if (code
== SUBREG
&& GET_CODE (SUBREG_REG (x
)) == MEM
4358 && (GET_MODE_SIZE (GET_MODE (x
))
4359 > GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
))))
4360 && mode_dependent_address_p (XEXP (SUBREG_REG (x
), 0)))
4362 /* A paradoxical subreg will simply have the mode of the access
4363 changed, so we need to reload such a memory operand to stabilize
4364 the meaning of the memory access. */
4365 enum machine_mode subreg_mode
= GET_MODE (SUBREG_REG (x
));
4368 push_reload (NULL_RTX
, SUBREG_REG (x
), NULL_PTR
, &SUBREG_REG (x
),
4369 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4370 VOIDmode
, subreg_mode
, 0, 0, opnum
, type
);
4372 push_reload (SUBREG_REG (x
), NULL_RTX
, &SUBREG_REG (x
), NULL_PTR
,
4373 find_valid_class (subreg_mode
, SUBREG_WORD (x
)),
4374 subreg_mode
, VOIDmode
, 0, 0, opnum
, type
);
4377 for (copied
= 0, i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4381 rtx new_part
= find_reloads_toplev (XEXP (x
, i
), opnum
, type
,
4382 ind_levels
, is_set_dest
, insn
,
4384 /* If we have replaced a reg with it's equivalent memory loc -
4385 that can still be handled here e.g. if it's in a paradoxical
4386 subreg - we must make the change in a copy, rather than using
4387 a destructive change. This way, find_reloads can still elect
4388 not to do the change. */
4389 if (new_part
!= XEXP (x
, i
) && ! CONSTANT_P (new_part
) && ! copied
)
4391 x
= shallow_copy_rtx (x
);
4394 XEXP (x
, i
) = new_part
;
4400 /* Return a mem ref for the memory equivalent of reg REGNO.
4401 This mem ref is not shared with anything. */
4404 make_memloc (ad
, regno
)
4408 /* We must rerun eliminate_regs, in case the elimination
4409 offsets have changed. */
4411 = XEXP (eliminate_regs (reg_equiv_memory_loc
[regno
], 0, NULL_RTX
), 0);
4413 /* If TEM might contain a pseudo, we must copy it to avoid
4414 modifying it when we do the substitution for the reload. */
4415 if (rtx_varies_p (tem
))
4416 tem
= copy_rtx (tem
);
4418 tem
= gen_rtx_MEM (GET_MODE (ad
), tem
);
4419 MEM_COPY_ATTRIBUTES (tem
, reg_equiv_memory_loc
[regno
]);
4423 /* Record all reloads needed for handling memory address AD
4424 which appears in *LOC in a memory reference to mode MODE
4425 which itself is found in location *MEMREFLOC.
4426 Note that we take shortcuts assuming that no multi-reg machine mode
4427 occurs as part of an address.
4429 OPNUM and TYPE specify the purpose of this reload.
4431 IND_LEVELS says how many levels of indirect addressing this machine
4434 INSN, if nonzero, is the insn in which we do the reload. It is used
4435 to determine if we may generate output reloads, and where to put USEs
4436 for pseudos that we have to replace with stack slots.
4438 Value is nonzero if this address is reloaded or replaced as a whole.
4439 This is interesting to the caller if the address is an autoincrement.
4441 Note that there is no verification that the address will be valid after
4442 this routine does its work. Instead, we rely on the fact that the address
4443 was valid when reload started. So we need only undo things that reload
4444 could have broken. These are wrong register types, pseudos not allocated
4445 to a hard register, and frame pointer elimination. */
4448 find_reloads_address (mode
, memrefloc
, ad
, loc
, opnum
, type
, ind_levels
, insn
)
4449 enum machine_mode mode
;
4454 enum reload_type type
;
4459 int removed_and
= 0;
4462 /* If the address is a register, see if it is a legitimate address and
4463 reload if not. We first handle the cases where we need not reload
4464 or where we must reload in a non-standard way. */
4466 if (GET_CODE (ad
) == REG
)
4470 if (reg_equiv_constant
[regno
] != 0
4471 && strict_memory_address_p (mode
, reg_equiv_constant
[regno
]))
4473 *loc
= ad
= reg_equiv_constant
[regno
];
4477 tem
= reg_equiv_memory_loc
[regno
];
4480 if (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
)
4482 tem
= make_memloc (ad
, regno
);
4483 if (! strict_memory_address_p (GET_MODE (tem
), XEXP (tem
, 0)))
4485 find_reloads_address (GET_MODE (tem
), NULL_PTR
, XEXP (tem
, 0),
4486 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
4489 /* We can avoid a reload if the register's equivalent memory
4490 expression is valid as an indirect memory address.
4491 But not all addresses are valid in a mem used as an indirect
4492 address: only reg or reg+constant. */
4495 && strict_memory_address_p (mode
, tem
)
4496 && (GET_CODE (XEXP (tem
, 0)) == REG
4497 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4498 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4499 && CONSTANT_P (XEXP (XEXP (tem
, 0), 1)))))
4501 /* TEM is not the same as what we'll be replacing the
4502 pseudo with after reload, put a USE in front of INSN
4503 in the final reload pass. */
4505 && num_not_at_initial_offset
4506 && ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
4509 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4510 /* This doesn't really count as replacing the address
4511 as a whole, since it is still a memory access. */
4519 /* The only remaining case where we can avoid a reload is if this is a
4520 hard register that is valid as a base register and which is not the
4521 subject of a CLOBBER in this insn. */
4523 else if (regno
< FIRST_PSEUDO_REGISTER
4524 && REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)
4525 && ! regno_clobbered_p (regno
, this_insn
))
4528 /* If we do not have one of the cases above, we must do the reload. */
4529 push_reload (ad
, NULL_RTX
, loc
, NULL_PTR
, BASE_REG_CLASS
,
4530 GET_MODE (ad
), VOIDmode
, 0, 0, opnum
, type
);
4534 if (strict_memory_address_p (mode
, ad
))
4536 /* The address appears valid, so reloads are not needed.
4537 But the address may contain an eliminable register.
4538 This can happen because a machine with indirect addressing
4539 may consider a pseudo register by itself a valid address even when
4540 it has failed to get a hard reg.
4541 So do a tree-walk to find and eliminate all such regs. */
4543 /* But first quickly dispose of a common case. */
4544 if (GET_CODE (ad
) == PLUS
4545 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
4546 && GET_CODE (XEXP (ad
, 0)) == REG
4547 && reg_equiv_constant
[REGNO (XEXP (ad
, 0))] == 0)
4550 subst_reg_equivs_changed
= 0;
4551 *loc
= subst_reg_equivs (ad
, insn
);
4553 if (! subst_reg_equivs_changed
)
4556 /* Check result for validity after substitution. */
4557 if (strict_memory_address_p (mode
, ad
))
4561 #ifdef LEGITIMIZE_RELOAD_ADDRESS
4566 LEGITIMIZE_RELOAD_ADDRESS (ad
, GET_MODE (*memrefloc
), opnum
, type
,
4571 *memrefloc
= copy_rtx (*memrefloc
);
4572 XEXP (*memrefloc
, 0) = ad
;
4573 move_replacements (&ad
, &XEXP (*memrefloc
, 0));
4579 /* The address is not valid. We have to figure out why. First see if
4580 we have an outer AND and remove it if so. Then analyze what's inside. */
4582 if (GET_CODE (ad
) == AND
)
4585 loc
= &XEXP (ad
, 0);
4589 /* One possibility for why the address is invalid is that it is itself
4590 a MEM. This can happen when the frame pointer is being eliminated, a
4591 pseudo is not allocated to a hard register, and the offset between the
4592 frame and stack pointers is not its initial value. In that case the
4593 pseudo will have been replaced by a MEM referring to the
4595 if (GET_CODE (ad
) == MEM
)
4597 /* First ensure that the address in this MEM is valid. Then, unless
4598 indirect addresses are valid, reload the MEM into a register. */
4600 find_reloads_address (GET_MODE (ad
), &tem
, XEXP (ad
, 0), &XEXP (ad
, 0),
4601 opnum
, ADDR_TYPE (type
),
4602 ind_levels
== 0 ? 0 : ind_levels
- 1, insn
);
4604 /* If tem was changed, then we must create a new memory reference to
4605 hold it and store it back into memrefloc. */
4606 if (tem
!= ad
&& memrefloc
)
4608 *memrefloc
= copy_rtx (*memrefloc
);
4609 copy_replacements (tem
, XEXP (*memrefloc
, 0));
4610 loc
= &XEXP (*memrefloc
, 0);
4612 loc
= &XEXP (*loc
, 0);
4615 /* Check similar cases as for indirect addresses as above except
4616 that we can allow pseudos and a MEM since they should have been
4617 taken care of above. */
4620 || (GET_CODE (XEXP (tem
, 0)) == SYMBOL_REF
&& ! indirect_symref_ok
)
4621 || GET_CODE (XEXP (tem
, 0)) == MEM
4622 || ! (GET_CODE (XEXP (tem
, 0)) == REG
4623 || (GET_CODE (XEXP (tem
, 0)) == PLUS
4624 && GET_CODE (XEXP (XEXP (tem
, 0), 0)) == REG
4625 && GET_CODE (XEXP (XEXP (tem
, 0), 1)) == CONST_INT
)))
4627 /* Must use TEM here, not AD, since it is the one that will
4628 have any subexpressions reloaded, if needed. */
4629 push_reload (tem
, NULL_RTX
, loc
, NULL_PTR
,
4630 BASE_REG_CLASS
, GET_MODE (tem
),
4633 return ! removed_and
;
4639 /* If we have address of a stack slot but it's not valid because the
4640 displacement is too large, compute the sum in a register.
4641 Handle all base registers here, not just fp/ap/sp, because on some
4642 targets (namely SH) we can also get too large displacements from
4643 big-endian corrections. */
4644 else if (GET_CODE (ad
) == PLUS
4645 && GET_CODE (XEXP (ad
, 0)) == REG
4646 && REGNO (XEXP (ad
, 0)) < FIRST_PSEUDO_REGISTER
4647 && REG_MODE_OK_FOR_BASE_P (XEXP (ad
, 0), mode
)
4648 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4650 /* Unshare the MEM rtx so we can safely alter it. */
4653 *memrefloc
= copy_rtx (*memrefloc
);
4654 loc
= &XEXP (*memrefloc
, 0);
4656 loc
= &XEXP (*loc
, 0);
4659 if (double_reg_address_ok
)
4661 /* Unshare the sum as well. */
4662 *loc
= ad
= copy_rtx (ad
);
4664 /* Reload the displacement into an index reg.
4665 We assume the frame pointer or arg pointer is a base reg. */
4666 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1),
4667 INDEX_REG_CLASS
, GET_MODE (ad
), opnum
,
4673 /* If the sum of two regs is not necessarily valid,
4674 reload the sum into a base reg.
4675 That will at least work. */
4676 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
,
4677 Pmode
, opnum
, type
, ind_levels
);
4679 return ! removed_and
;
4682 /* If we have an indexed stack slot, there are three possible reasons why
4683 it might be invalid: The index might need to be reloaded, the address
4684 might have been made by frame pointer elimination and hence have a
4685 constant out of range, or both reasons might apply.
4687 We can easily check for an index needing reload, but even if that is the
4688 case, we might also have an invalid constant. To avoid making the
4689 conservative assumption and requiring two reloads, we see if this address
4690 is valid when not interpreted strictly. If it is, the only problem is
4691 that the index needs a reload and find_reloads_address_1 will take care
4694 If we decide to do something here, it must be that
4695 `double_reg_address_ok' is true and that this address rtl was made by
4696 eliminate_regs. We generate a reload of the fp/sp/ap + constant and
4697 rework the sum so that the reload register will be added to the index.
4698 This is safe because we know the address isn't shared.
4700 We check for fp/ap/sp as both the first and second operand of the
4703 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4704 && GET_CODE (XEXP (ad
, 0)) == PLUS
4705 && (XEXP (XEXP (ad
, 0), 0) == frame_pointer_rtx
4706 #if FRAME_POINTER_REGNUM != HARD_FRAME_POINTER_REGNUM
4707 || XEXP (XEXP (ad
, 0), 0) == hard_frame_pointer_rtx
4709 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4710 || XEXP (XEXP (ad
, 0), 0) == arg_pointer_rtx
4712 || XEXP (XEXP (ad
, 0), 0) == stack_pointer_rtx
)
4713 && ! memory_address_p (mode
, ad
))
4715 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4716 plus_constant (XEXP (XEXP (ad
, 0), 0),
4717 INTVAL (XEXP (ad
, 1))),
4718 XEXP (XEXP (ad
, 0), 1));
4719 find_reloads_address_part (XEXP (ad
, 0), &XEXP (ad
, 0), BASE_REG_CLASS
,
4720 GET_MODE (ad
), opnum
, type
, ind_levels
);
4721 find_reloads_address_1 (mode
, XEXP (ad
, 1), 1, &XEXP (ad
, 1), opnum
,
4727 else if (GET_CODE (ad
) == PLUS
&& GET_CODE (XEXP (ad
, 1)) == CONST_INT
4728 && GET_CODE (XEXP (ad
, 0)) == PLUS
4729 && (XEXP (XEXP (ad
, 0), 1) == frame_pointer_rtx
4730 #if HARD_FRAME_POINTER_REGNUM != FRAME_POINTER_REGNUM
4731 || XEXP (XEXP (ad
, 0), 1) == hard_frame_pointer_rtx
4733 #if FRAME_POINTER_REGNUM != ARG_POINTER_REGNUM
4734 || XEXP (XEXP (ad
, 0), 1) == arg_pointer_rtx
4736 || XEXP (XEXP (ad
, 0), 1) == stack_pointer_rtx
)
4737 && ! memory_address_p (mode
, ad
))
4739 *loc
= ad
= gen_rtx_PLUS (GET_MODE (ad
),
4740 XEXP (XEXP (ad
, 0), 0),
4741 plus_constant (XEXP (XEXP (ad
, 0), 1),
4742 INTVAL (XEXP (ad
, 1))));
4743 find_reloads_address_part (XEXP (ad
, 1), &XEXP (ad
, 1), BASE_REG_CLASS
,
4744 GET_MODE (ad
), opnum
, type
, ind_levels
);
4745 find_reloads_address_1 (mode
, XEXP (ad
, 0), 1, &XEXP (ad
, 0), opnum
,
4751 /* See if address becomes valid when an eliminable register
4752 in a sum is replaced. */
4755 if (GET_CODE (ad
) == PLUS
)
4756 tem
= subst_indexed_address (ad
);
4757 if (tem
!= ad
&& strict_memory_address_p (mode
, tem
))
4759 /* Ok, we win that way. Replace any additional eliminable
4762 subst_reg_equivs_changed
= 0;
4763 tem
= subst_reg_equivs (tem
, insn
);
4765 /* Make sure that didn't make the address invalid again. */
4767 if (! subst_reg_equivs_changed
|| strict_memory_address_p (mode
, tem
))
4774 /* If constants aren't valid addresses, reload the constant address
4776 if (CONSTANT_P (ad
) && ! strict_memory_address_p (mode
, ad
))
4778 /* If AD is in address in the constant pool, the MEM rtx may be shared.
4779 Unshare it so we can safely alter it. */
4780 if (memrefloc
&& GET_CODE (ad
) == SYMBOL_REF
4781 && CONSTANT_POOL_ADDRESS_P (ad
))
4783 *memrefloc
= copy_rtx (*memrefloc
);
4784 loc
= &XEXP (*memrefloc
, 0);
4786 loc
= &XEXP (*loc
, 0);
4789 find_reloads_address_part (ad
, loc
, BASE_REG_CLASS
, Pmode
, opnum
, type
,
4791 return ! removed_and
;
4794 return find_reloads_address_1 (mode
, ad
, 0, loc
, opnum
, type
, ind_levels
,
4798 /* Find all pseudo regs appearing in AD
4799 that are eliminable in favor of equivalent values
4800 and do not have hard regs; replace them by their equivalents.
4801 INSN, if nonzero, is the insn in which we do the reload. We put USEs in
4802 front of it for pseudos that we have to replace with stack slots. */
4805 subst_reg_equivs (ad
, insn
)
4809 register RTX_CODE code
= GET_CODE (ad
);
4811 register const char *fmt
;
4827 register int regno
= REGNO (ad
);
4829 if (reg_equiv_constant
[regno
] != 0)
4831 subst_reg_equivs_changed
= 1;
4832 return reg_equiv_constant
[regno
];
4834 if (reg_equiv_memory_loc
[regno
] && num_not_at_initial_offset
)
4836 rtx mem
= make_memloc (ad
, regno
);
4837 if (! rtx_equal_p (mem
, reg_equiv_mem
[regno
]))
4839 subst_reg_equivs_changed
= 1;
4840 emit_insn_before (gen_rtx_USE (VOIDmode
, ad
), insn
);
4848 /* Quickly dispose of a common case. */
4849 if (XEXP (ad
, 0) == frame_pointer_rtx
4850 && GET_CODE (XEXP (ad
, 1)) == CONST_INT
)
4858 fmt
= GET_RTX_FORMAT (code
);
4859 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
4861 XEXP (ad
, i
) = subst_reg_equivs (XEXP (ad
, i
), insn
);
4865 /* Compute the sum of X and Y, making canonicalizations assumed in an
4866 address, namely: sum constant integers, surround the sum of two
4867 constants with a CONST, put the constant as the second operand, and
4868 group the constant on the outermost sum.
4870 This routine assumes both inputs are already in canonical form. */
4877 enum machine_mode mode
= GET_MODE (x
);
4879 if (mode
== VOIDmode
)
4880 mode
= GET_MODE (y
);
4882 if (mode
== VOIDmode
)
4885 if (GET_CODE (x
) == CONST_INT
)
4886 return plus_constant (y
, INTVAL (x
));
4887 else if (GET_CODE (y
) == CONST_INT
)
4888 return plus_constant (x
, INTVAL (y
));
4889 else if (CONSTANT_P (x
))
4890 tem
= x
, x
= y
, y
= tem
;
4892 if (GET_CODE (x
) == PLUS
&& CONSTANT_P (XEXP (x
, 1)))
4893 return form_sum (XEXP (x
, 0), form_sum (XEXP (x
, 1), y
));
4895 /* Note that if the operands of Y are specified in the opposite
4896 order in the recursive calls below, infinite recursion will occur. */
4897 if (GET_CODE (y
) == PLUS
&& CONSTANT_P (XEXP (y
, 1)))
4898 return form_sum (form_sum (x
, XEXP (y
, 0)), XEXP (y
, 1));
4900 /* If both constant, encapsulate sum. Otherwise, just form sum. A
4901 constant will have been placed second. */
4902 if (CONSTANT_P (x
) && CONSTANT_P (y
))
4904 if (GET_CODE (x
) == CONST
)
4906 if (GET_CODE (y
) == CONST
)
4909 return gen_rtx_CONST (VOIDmode
, gen_rtx_PLUS (mode
, x
, y
));
4912 return gen_rtx_PLUS (mode
, x
, y
);
4915 /* If ADDR is a sum containing a pseudo register that should be
4916 replaced with a constant (from reg_equiv_constant),
4917 return the result of doing so, and also apply the associative
4918 law so that the result is more likely to be a valid address.
4919 (But it is not guaranteed to be one.)
4921 Note that at most one register is replaced, even if more are
4922 replaceable. Also, we try to put the result into a canonical form
4923 so it is more likely to be a valid address.
4925 In all other cases, return ADDR. */
4928 subst_indexed_address (addr
)
4931 rtx op0
= 0, op1
= 0, op2
= 0;
4935 if (GET_CODE (addr
) == PLUS
)
4937 /* Try to find a register to replace. */
4938 op0
= XEXP (addr
, 0), op1
= XEXP (addr
, 1), op2
= 0;
4939 if (GET_CODE (op0
) == REG
4940 && (regno
= REGNO (op0
)) >= FIRST_PSEUDO_REGISTER
4941 && reg_renumber
[regno
] < 0
4942 && reg_equiv_constant
[regno
] != 0)
4943 op0
= reg_equiv_constant
[regno
];
4944 else if (GET_CODE (op1
) == REG
4945 && (regno
= REGNO (op1
)) >= FIRST_PSEUDO_REGISTER
4946 && reg_renumber
[regno
] < 0
4947 && reg_equiv_constant
[regno
] != 0)
4948 op1
= reg_equiv_constant
[regno
];
4949 else if (GET_CODE (op0
) == PLUS
4950 && (tem
= subst_indexed_address (op0
)) != op0
)
4952 else if (GET_CODE (op1
) == PLUS
4953 && (tem
= subst_indexed_address (op1
)) != op1
)
4958 /* Pick out up to three things to add. */
4959 if (GET_CODE (op1
) == PLUS
)
4960 op2
= XEXP (op1
, 1), op1
= XEXP (op1
, 0);
4961 else if (GET_CODE (op0
) == PLUS
)
4962 op2
= op1
, op1
= XEXP (op0
, 1), op0
= XEXP (op0
, 0);
4964 /* Compute the sum. */
4966 op1
= form_sum (op1
, op2
);
4968 op0
= form_sum (op0
, op1
);
4975 /* Record the pseudo registers we must reload into hard registers in a
4976 subexpression of a would-be memory address, X referring to a value
4977 in mode MODE. (This function is not called if the address we find
4980 CONTEXT = 1 means we are considering regs as index regs,
4981 = 0 means we are considering them as base regs.
4983 OPNUM and TYPE specify the purpose of any reloads made.
4985 IND_LEVELS says how many levels of indirect addressing are
4986 supported at this point in the address.
4988 INSN, if nonzero, is the insn in which we do the reload. It is used
4989 to determine if we may generate output reloads.
4991 We return nonzero if X, as a whole, is reloaded or replaced. */
4993 /* Note that we take shortcuts assuming that no multi-reg machine mode
4994 occurs as part of an address.
4995 Also, this is not fully machine-customizable; it works for machines
4996 such as vaxes and 68000's and 32000's, but other possible machines
4997 could have addressing modes that this does not handle right. */
5000 find_reloads_address_1 (mode
, x
, context
, loc
, opnum
, type
, ind_levels
, insn
)
5001 enum machine_mode mode
;
5006 enum reload_type type
;
5010 register RTX_CODE code
= GET_CODE (x
);
5016 register rtx orig_op0
= XEXP (x
, 0);
5017 register rtx orig_op1
= XEXP (x
, 1);
5018 register RTX_CODE code0
= GET_CODE (orig_op0
);
5019 register RTX_CODE code1
= GET_CODE (orig_op1
);
5020 register rtx op0
= orig_op0
;
5021 register rtx op1
= orig_op1
;
5023 if (GET_CODE (op0
) == SUBREG
)
5025 op0
= SUBREG_REG (op0
);
5026 code0
= GET_CODE (op0
);
5027 if (code0
== REG
&& REGNO (op0
) < FIRST_PSEUDO_REGISTER
)
5028 op0
= gen_rtx_REG (word_mode
,
5029 REGNO (op0
) + SUBREG_WORD (orig_op0
));
5032 if (GET_CODE (op1
) == SUBREG
)
5034 op1
= SUBREG_REG (op1
);
5035 code1
= GET_CODE (op1
);
5036 if (code1
== REG
&& REGNO (op1
) < FIRST_PSEUDO_REGISTER
)
5037 op1
= gen_rtx_REG (GET_MODE (op1
),
5038 REGNO (op1
) + SUBREG_WORD (orig_op1
));
5041 if (code0
== MULT
|| code0
== SIGN_EXTEND
|| code0
== TRUNCATE
5042 || code0
== ZERO_EXTEND
|| code1
== MEM
)
5044 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5045 type
, ind_levels
, insn
);
5046 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5047 type
, ind_levels
, insn
);
5050 else if (code1
== MULT
|| code1
== SIGN_EXTEND
|| code1
== TRUNCATE
5051 || code1
== ZERO_EXTEND
|| code0
== MEM
)
5053 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5054 type
, ind_levels
, insn
);
5055 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5056 type
, ind_levels
, insn
);
5059 else if (code0
== CONST_INT
|| code0
== CONST
5060 || code0
== SYMBOL_REF
|| code0
== LABEL_REF
)
5061 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5062 type
, ind_levels
, insn
);
5064 else if (code1
== CONST_INT
|| code1
== CONST
5065 || code1
== SYMBOL_REF
|| code1
== LABEL_REF
)
5066 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5067 type
, ind_levels
, insn
);
5069 else if (code0
== REG
&& code1
== REG
)
5071 if (REG_OK_FOR_INDEX_P (op0
)
5072 && REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5074 else if (REG_OK_FOR_INDEX_P (op1
)
5075 && REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5077 else if (REG_MODE_OK_FOR_BASE_P (op1
, mode
))
5078 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5079 type
, ind_levels
, insn
);
5080 else if (REG_MODE_OK_FOR_BASE_P (op0
, mode
))
5081 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5082 type
, ind_levels
, insn
);
5083 else if (REG_OK_FOR_INDEX_P (op1
))
5084 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5085 type
, ind_levels
, insn
);
5086 else if (REG_OK_FOR_INDEX_P (op0
))
5087 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5088 type
, ind_levels
, insn
);
5091 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5092 type
, ind_levels
, insn
);
5093 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5094 type
, ind_levels
, insn
);
5098 else if (code0
== REG
)
5100 find_reloads_address_1 (mode
, orig_op0
, 1, &XEXP (x
, 0), opnum
,
5101 type
, ind_levels
, insn
);
5102 find_reloads_address_1 (mode
, orig_op1
, 0, &XEXP (x
, 1), opnum
,
5103 type
, ind_levels
, insn
);
5106 else if (code1
== REG
)
5108 find_reloads_address_1 (mode
, orig_op1
, 1, &XEXP (x
, 1), opnum
,
5109 type
, ind_levels
, insn
);
5110 find_reloads_address_1 (mode
, orig_op0
, 0, &XEXP (x
, 0), opnum
,
5111 type
, ind_levels
, insn
);
5120 rtx op0
= XEXP (x
, 0);
5121 rtx op1
= XEXP (x
, 1);
5123 if (GET_CODE (op1
) != PLUS
&& GET_CODE (op1
) != MINUS
)
5126 /* Currently, we only support {PRE,POST}_MODIFY constructs
5127 where a base register is {inc,dec}remented by the contents
5128 of another register or by a constant value. Thus, these
5129 operands must match. */
5130 if (op0
!= XEXP (op1
, 0))
5133 /* Require index register (or constant). Let's just handle the
5134 register case in the meantime... If the target allows
5135 auto-modify by a constant then we could try replacing a pseudo
5136 register with its equivalent constant where applicable. */
5137 if (REG_P (XEXP (op1
, 1)))
5138 if (!REGNO_OK_FOR_INDEX_P (REGNO (XEXP (op1
, 1))))
5139 find_reloads_address_1 (mode
, XEXP (op1
, 1), 1, &XEXP (op1
, 1),
5140 opnum
, type
, ind_levels
, insn
);
5142 if (REG_P (XEXP (op1
, 0)))
5144 register int regno
= REGNO (XEXP (op1
, 0));
5146 /* A register that is incremented cannot be constant! */
5147 if (regno
>= FIRST_PSEUDO_REGISTER
5148 && reg_equiv_constant
[regno
] != 0)
5151 /* Handle a register that is equivalent to a memory location
5152 which cannot be addressed directly. */
5153 if (reg_equiv_memory_loc
[regno
] != 0
5154 && (reg_equiv_address
[regno
] != 0
5155 || num_not_at_initial_offset
))
5157 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5159 if (reg_equiv_address
[regno
]
5160 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5162 /* First reload the memory location's address.
5163 We can't use ADDR_TYPE (type) here, because we need to
5164 write back the value after reading it, hence we actually
5165 need two registers. */
5166 find_reloads_address (GET_MODE (tem
), 0, XEXP (tem
, 0),
5167 &XEXP (tem
, 0), opnum
, type
,
5170 /* Then reload the memory location into a base
5172 push_reload (tem
, tem
, &XEXP (x
, 0), &XEXP (op1
, 0),
5173 BASE_REG_CLASS
, GET_MODE (x
), GET_MODE (x
),
5174 0, 0, opnum
, RELOAD_OTHER
);
5179 if (reg_renumber
[regno
] >= 0)
5180 regno
= reg_renumber
[regno
];
5182 /* We require a base register here... */
5183 if (!REGNO_MODE_OK_FOR_BASE_P (regno
, GET_MODE (x
)))
5185 push_reload (XEXP (op1
, 0), XEXP (x
, 0),
5186 &XEXP (op1
, 0), &XEXP (x
, 0),
5188 GET_MODE (x
), GET_MODE (x
), 0, 0,
5189 opnum
, RELOAD_OTHER
);
5201 if (GET_CODE (XEXP (x
, 0)) == REG
)
5203 register int regno
= REGNO (XEXP (x
, 0));
5207 /* A register that is incremented cannot be constant! */
5208 if (regno
>= FIRST_PSEUDO_REGISTER
5209 && reg_equiv_constant
[regno
] != 0)
5212 /* Handle a register that is equivalent to a memory location
5213 which cannot be addressed directly. */
5214 if (reg_equiv_memory_loc
[regno
] != 0
5215 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5217 rtx tem
= make_memloc (XEXP (x
, 0), regno
);
5218 if (reg_equiv_address
[regno
]
5219 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5221 /* First reload the memory location's address.
5222 We can't use ADDR_TYPE (type) here, because we need to
5223 write back the value after reading it, hence we actually
5224 need two registers. */
5225 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5226 &XEXP (tem
, 0), opnum
, type
,
5228 /* Put this inside a new increment-expression. */
5229 x
= gen_rtx_fmt_e (GET_CODE (x
), GET_MODE (x
), tem
);
5230 /* Proceed to reload that, as if it contained a register. */
5234 /* If we have a hard register that is ok as an index,
5235 don't make a reload. If an autoincrement of a nice register
5236 isn't "valid", it must be that no autoincrement is "valid".
5237 If that is true and something made an autoincrement anyway,
5238 this must be a special context where one is allowed.
5239 (For example, a "push" instruction.)
5240 We can't improve this address, so leave it alone. */
5242 /* Otherwise, reload the autoincrement into a suitable hard reg
5243 and record how much to increment by. */
5245 if (reg_renumber
[regno
] >= 0)
5246 regno
= reg_renumber
[regno
];
5247 if ((regno
>= FIRST_PSEUDO_REGISTER
5248 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5249 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5256 /* If we can output the register afterwards, do so, this
5257 saves the extra update.
5258 We can do so if we have an INSN - i.e. no JUMP_INSN nor
5259 CALL_INSN - and it does not set CC0.
5260 But don't do this if we cannot directly address the
5261 memory location, since this will make it harder to
5262 reuse address reloads, and increases register pressure.
5263 Also don't do this if we can probably update x directly. */
5264 rtx equiv
= (GET_CODE (XEXP (x
, 0)) == MEM
5266 : reg_equiv_mem
[regno
]);
5267 int icode
= (int) add_optab
->handlers
[(int) Pmode
].insn_code
;
5268 if (insn
&& GET_CODE (insn
) == INSN
&& equiv
5269 && memory_operand (equiv
, GET_MODE (equiv
))
5271 && ! sets_cc0_p (PATTERN (insn
))
5273 && ! (icode
!= CODE_FOR_nothing
5274 && ((*insn_data
[icode
].operand
[0].predicate
)
5276 && ((*insn_data
[icode
].operand
[1].predicate
)
5282 = push_reload (x
, x
, loc
, loc
,
5283 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5284 GET_MODE (x
), GET_MODE (x
), 0, 0,
5285 opnum
, RELOAD_OTHER
);
5287 /* If we created a new MEM based on reg_equiv_mem[REGNO], then
5288 LOC above is part of the new MEM, not the MEM in INSN.
5290 We must also replace the address of the MEM in INSN. */
5291 if (&XEXP (x_orig
, 0) != loc
)
5292 push_replacement (&XEXP (x_orig
, 0), reloadnum
, VOIDmode
);
5298 = push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5299 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5300 GET_MODE (x
), GET_MODE (x
), 0, 0,
5303 = find_inc_amount (PATTERN (this_insn
), XEXP (x_orig
, 0));
5309 /* Update the REG_INC notes. */
5311 for (link
= REG_NOTES (this_insn
);
5312 link
; link
= XEXP (link
, 1))
5313 if (REG_NOTE_KIND (link
) == REG_INC
5314 && REGNO (XEXP (link
, 0)) == REGNO (XEXP (x_orig
, 0)))
5315 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5321 else if (GET_CODE (XEXP (x
, 0)) == MEM
)
5323 /* This is probably the result of a substitution, by eliminate_regs,
5324 of an equivalent address for a pseudo that was not allocated to a
5325 hard register. Verify that the specified address is valid and
5326 reload it into a register. */
5327 /* Variable `tem' might or might not be used in FIND_REG_INC_NOTE. */
5328 rtx tem ATTRIBUTE_UNUSED
= XEXP (x
, 0);
5332 /* Since we know we are going to reload this item, don't decrement
5333 for the indirection level.
5335 Note that this is actually conservative: it would be slightly
5336 more efficient to use the value of SPILL_INDIRECT_LEVELS from
5338 /* We can't use ADDR_TYPE (type) here, because we need to
5339 write back the value after reading it, hence we actually
5340 need two registers. */
5341 find_reloads_address (GET_MODE (x
), &XEXP (x
, 0),
5342 XEXP (XEXP (x
, 0), 0), &XEXP (XEXP (x
, 0), 0),
5343 opnum
, type
, ind_levels
, insn
);
5345 reloadnum
= push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5346 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5347 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5349 = find_inc_amount (PATTERN (this_insn
), XEXP (x
, 0));
5351 link
= FIND_REG_INC_NOTE (this_insn
, tem
);
5353 push_replacement (&XEXP (link
, 0), reloadnum
, VOIDmode
);
5360 /* This is probably the result of a substitution, by eliminate_regs, of
5361 an equivalent address for a pseudo that was not allocated to a hard
5362 register. Verify that the specified address is valid and reload it
5365 Since we know we are going to reload this item, don't decrement for
5366 the indirection level.
5368 Note that this is actually conservative: it would be slightly more
5369 efficient to use the value of SPILL_INDIRECT_LEVELS from
5372 find_reloads_address (GET_MODE (x
), loc
, XEXP (x
, 0), &XEXP (x
, 0),
5373 opnum
, ADDR_TYPE (type
), ind_levels
, insn
);
5374 push_reload (*loc
, NULL_RTX
, loc
, NULL_PTR
,
5375 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5376 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5381 register int regno
= REGNO (x
);
5383 if (reg_equiv_constant
[regno
] != 0)
5385 find_reloads_address_part (reg_equiv_constant
[regno
], loc
,
5386 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5387 GET_MODE (x
), opnum
, type
, ind_levels
);
5391 #if 0 /* This might screw code in reload1.c to delete prior output-reload
5392 that feeds this insn. */
5393 if (reg_equiv_mem
[regno
] != 0)
5395 push_reload (reg_equiv_mem
[regno
], NULL_RTX
, loc
, NULL_PTR
,
5396 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5397 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5402 if (reg_equiv_memory_loc
[regno
]
5403 && (reg_equiv_address
[regno
] != 0 || num_not_at_initial_offset
))
5405 rtx tem
= make_memloc (x
, regno
);
5406 if (reg_equiv_address
[regno
] != 0
5407 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5410 find_reloads_address (GET_MODE (x
), &x
, XEXP (x
, 0),
5411 &XEXP (x
, 0), opnum
, ADDR_TYPE (type
),
5416 if (reg_renumber
[regno
] >= 0)
5417 regno
= reg_renumber
[regno
];
5419 if ((regno
>= FIRST_PSEUDO_REGISTER
5420 || !(context
? REGNO_OK_FOR_INDEX_P (regno
)
5421 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
))))
5423 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5424 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5425 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5429 /* If a register appearing in an address is the subject of a CLOBBER
5430 in this insn, reload it into some other register to be safe.
5431 The CLOBBER is supposed to make the register unavailable
5432 from before this insn to after it. */
5433 if (regno_clobbered_p (regno
, this_insn
))
5435 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5436 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5437 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5444 if (GET_CODE (SUBREG_REG (x
)) == REG
)
5446 /* If this is a SUBREG of a hard register and the resulting register
5447 is of the wrong class, reload the whole SUBREG. This avoids
5448 needless copies if SUBREG_REG is multi-word. */
5449 if (REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5451 int regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5453 if (! (context
? REGNO_OK_FOR_INDEX_P (regno
)
5454 : REGNO_MODE_OK_FOR_BASE_P (regno
, mode
)))
5456 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
,
5457 (context
? INDEX_REG_CLASS
: BASE_REG_CLASS
),
5458 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5462 /* If this is a SUBREG of a pseudo-register, and the pseudo-register
5463 is larger than the class size, then reload the whole SUBREG. */
5466 enum reg_class
class = (context
? INDEX_REG_CLASS
5468 if (CLASS_MAX_NREGS (class, GET_MODE (SUBREG_REG (x
)))
5469 > reg_class_size
[class])
5471 x
= find_reloads_subreg_address (x
, 0, opnum
, type
,
5473 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5474 GET_MODE (x
), VOIDmode
, 0, 0, opnum
, type
);
5486 register const char *fmt
= GET_RTX_FORMAT (code
);
5489 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5492 find_reloads_address_1 (mode
, XEXP (x
, i
), context
, &XEXP (x
, i
),
5493 opnum
, type
, ind_levels
, insn
);
5500 /* X, which is found at *LOC, is a part of an address that needs to be
5501 reloaded into a register of class CLASS. If X is a constant, or if
5502 X is a PLUS that contains a constant, check that the constant is a
5503 legitimate operand and that we are supposed to be able to load
5504 it into the register.
5506 If not, force the constant into memory and reload the MEM instead.
5508 MODE is the mode to use, in case X is an integer constant.
5510 OPNUM and TYPE describe the purpose of any reloads made.
5512 IND_LEVELS says how many levels of indirect addressing this machine
5516 find_reloads_address_part (x
, loc
, class, mode
, opnum
, type
, ind_levels
)
5519 enum reg_class
class;
5520 enum machine_mode mode
;
5522 enum reload_type type
;
5526 && (! LEGITIMATE_CONSTANT_P (x
)
5527 || PREFERRED_RELOAD_CLASS (x
, class) == NO_REGS
))
5531 /* If this is a CONST_INT, it could have been created by a
5532 plus_constant call in eliminate_regs, which means it may be
5533 on the reload_obstack. reload_obstack will be freed later, so
5534 we can't allow such RTL to be put in the constant pool. There
5535 is code in force_const_mem to check for this case, but it doesn't
5536 work because we have already popped off the reload_obstack, so
5537 rtl_obstack == saveable_obstack is true at this point. */
5538 if (GET_CODE (x
) == CONST_INT
)
5539 tem
= x
= force_const_mem (mode
, GEN_INT (INTVAL (x
)));
5541 tem
= x
= force_const_mem (mode
, x
);
5543 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5544 opnum
, type
, ind_levels
, 0);
5547 else if (GET_CODE (x
) == PLUS
5548 && CONSTANT_P (XEXP (x
, 1))
5549 && (! LEGITIMATE_CONSTANT_P (XEXP (x
, 1))
5550 || PREFERRED_RELOAD_CLASS (XEXP (x
, 1), class) == NO_REGS
))
5554 /* See comment above. */
5555 if (GET_CODE (XEXP (x
, 1)) == CONST_INT
)
5556 tem
= force_const_mem (GET_MODE (x
), GEN_INT (INTVAL (XEXP (x
, 1))));
5558 tem
= force_const_mem (GET_MODE (x
), XEXP (x
, 1));
5560 x
= gen_rtx_PLUS (GET_MODE (x
), XEXP (x
, 0), tem
);
5561 find_reloads_address (mode
, &tem
, XEXP (tem
, 0), &XEXP (tem
, 0),
5562 opnum
, type
, ind_levels
, 0);
5565 push_reload (x
, NULL_RTX
, loc
, NULL_PTR
, class,
5566 mode
, VOIDmode
, 0, 0, opnum
, type
);
5569 /* X, a subreg of a pseudo, is a part of an address that needs to be
5572 If the pseudo is equivalent to a memory location that cannot be directly
5573 addressed, make the necessary address reloads.
5575 If address reloads have been necessary, or if the address is changed
5576 by register elimination, return the rtx of the memory location;
5577 otherwise, return X.
5579 If FORCE_REPLACE is nonzero, unconditionally replace the subreg with the
5582 OPNUM and TYPE identify the purpose of the reload.
5584 IND_LEVELS says how many levels of indirect addressing are
5585 supported at this point in the address.
5587 INSN, if nonzero, is the insn in which we do the reload. It is used
5588 to determine where to put USEs for pseudos that we have to replace with
5592 find_reloads_subreg_address (x
, force_replace
, opnum
, type
,
5597 enum reload_type type
;
5601 int regno
= REGNO (SUBREG_REG (x
));
5603 if (reg_equiv_memory_loc
[regno
])
5605 /* If the address is not directly addressable, or if the address is not
5606 offsettable, then it must be replaced. */
5608 && (reg_equiv_address
[regno
]
5609 || ! offsettable_memref_p (reg_equiv_mem
[regno
])))
5612 if (force_replace
|| num_not_at_initial_offset
)
5614 rtx tem
= make_memloc (SUBREG_REG (x
), regno
);
5616 /* If the address changes because of register elimination, then
5617 it must be replaced. */
5619 || ! rtx_equal_p (tem
, reg_equiv_mem
[regno
]))
5621 int offset
= SUBREG_WORD (x
) * UNITS_PER_WORD
;
5623 if (BYTES_BIG_ENDIAN
)
5627 size
= GET_MODE_SIZE (GET_MODE (SUBREG_REG (x
)));
5628 offset
+= MIN (size
, UNITS_PER_WORD
);
5629 size
= GET_MODE_SIZE (GET_MODE (x
));
5630 offset
-= MIN (size
, UNITS_PER_WORD
);
5632 XEXP (tem
, 0) = plus_constant (XEXP (tem
, 0), offset
);
5633 PUT_MODE (tem
, GET_MODE (x
));
5634 find_reloads_address (GET_MODE (tem
), &tem
, XEXP (tem
, 0),
5635 &XEXP (tem
, 0), opnum
, ADDR_TYPE (type
),
5637 /* If this is not a toplevel operand, find_reloads doesn't see
5638 this substitution. We have to emit a USE of the pseudo so
5639 that delete_output_reload can see it. */
5640 if (replace_reloads
&& recog_data
.operand
[opnum
] != x
)
5641 emit_insn_before (gen_rtx_USE (VOIDmode
, SUBREG_REG (x
)), insn
);
5649 /* Substitute into the current INSN the registers into which we have reloaded
5650 the things that need reloading. The array `replacements'
5651 contains the locations of all pointers that must be changed
5652 and says what to replace them with.
5654 Return the rtx that X translates into; usually X, but modified. */
5661 for (i
= 0; i
< n_replacements
; i
++)
5663 register struct replacement
*r
= &replacements
[i
];
5664 register rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5667 /* Encapsulate RELOADREG so its machine mode matches what
5668 used to be there. Note that gen_lowpart_common will
5669 do the wrong thing if RELOADREG is multi-word. RELOADREG
5670 will always be a REG here. */
5671 if (GET_MODE (reloadreg
) != r
->mode
&& r
->mode
!= VOIDmode
)
5672 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5674 /* If we are putting this into a SUBREG and RELOADREG is a
5675 SUBREG, we would be making nested SUBREGs, so we have to fix
5676 this up. Note that r->where == &SUBREG_REG (*r->subreg_loc). */
5678 if (r
->subreg_loc
!= 0 && GET_CODE (reloadreg
) == SUBREG
)
5680 if (GET_MODE (*r
->subreg_loc
)
5681 == GET_MODE (SUBREG_REG (reloadreg
)))
5682 *r
->subreg_loc
= SUBREG_REG (reloadreg
);
5685 *r
->where
= SUBREG_REG (reloadreg
);
5686 SUBREG_WORD (*r
->subreg_loc
) += SUBREG_WORD (reloadreg
);
5690 *r
->where
= reloadreg
;
5692 /* If reload got no reg and isn't optional, something's wrong. */
5693 else if (! rld
[r
->what
].optional
)
5698 /* Make a copy of any replacements being done into X and move those copies
5699 to locations in Y, a copy of X. We only look at the highest level of
5703 copy_replacements (x
, y
)
5708 enum rtx_code code
= GET_CODE (x
);
5709 const char *fmt
= GET_RTX_FORMAT (code
);
5710 struct replacement
*r
;
5712 /* We can't support X being a SUBREG because we might then need to know its
5713 location if something inside it was replaced. */
5717 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5719 for (j
= 0; j
< n_replacements
; j
++)
5721 if (replacements
[j
].subreg_loc
== &XEXP (x
, i
))
5723 r
= &replacements
[n_replacements
++];
5724 r
->where
= replacements
[j
].where
;
5725 r
->subreg_loc
= &XEXP (y
, i
);
5726 r
->what
= replacements
[j
].what
;
5727 r
->mode
= replacements
[j
].mode
;
5729 else if (replacements
[j
].where
== &XEXP (x
, i
))
5731 r
= &replacements
[n_replacements
++];
5732 r
->where
= &XEXP (y
, i
);
5734 r
->what
= replacements
[j
].what
;
5735 r
->mode
= replacements
[j
].mode
;
5740 /* Change any replacements being done to *X to be done to *Y */
5743 move_replacements (x
, y
)
5749 for (i
= 0; i
< n_replacements
; i
++)
5750 if (replacements
[i
].subreg_loc
== x
)
5751 replacements
[i
].subreg_loc
= y
;
5752 else if (replacements
[i
].where
== x
)
5754 replacements
[i
].where
= y
;
5755 replacements
[i
].subreg_loc
= 0;
5759 /* If LOC was scheduled to be replaced by something, return the replacement.
5760 Otherwise, return *LOC. */
5763 find_replacement (loc
)
5766 struct replacement
*r
;
5768 for (r
= &replacements
[0]; r
< &replacements
[n_replacements
]; r
++)
5770 rtx reloadreg
= rld
[r
->what
].reg_rtx
;
5772 if (reloadreg
&& r
->where
== loc
)
5774 if (r
->mode
!= VOIDmode
&& GET_MODE (reloadreg
) != r
->mode
)
5775 reloadreg
= gen_rtx_REG (r
->mode
, REGNO (reloadreg
));
5779 else if (reloadreg
&& r
->subreg_loc
== loc
)
5781 /* RELOADREG must be either a REG or a SUBREG.
5783 ??? Is it actually still ever a SUBREG? If so, why? */
5785 if (GET_CODE (reloadreg
) == REG
)
5786 return gen_rtx_REG (GET_MODE (*loc
),
5787 REGNO (reloadreg
) + SUBREG_WORD (*loc
));
5788 else if (GET_MODE (reloadreg
) == GET_MODE (*loc
))
5791 return gen_rtx_SUBREG (GET_MODE (*loc
), SUBREG_REG (reloadreg
),
5792 SUBREG_WORD (reloadreg
) + SUBREG_WORD (*loc
));
5796 /* If *LOC is a PLUS, MINUS, or MULT, see if a replacement is scheduled for
5797 what's inside and make a new rtl if so. */
5798 if (GET_CODE (*loc
) == PLUS
|| GET_CODE (*loc
) == MINUS
5799 || GET_CODE (*loc
) == MULT
)
5801 rtx x
= find_replacement (&XEXP (*loc
, 0));
5802 rtx y
= find_replacement (&XEXP (*loc
, 1));
5804 if (x
!= XEXP (*loc
, 0) || y
!= XEXP (*loc
, 1))
5805 return gen_rtx_fmt_ee (GET_CODE (*loc
), GET_MODE (*loc
), x
, y
);
5811 /* Return nonzero if register in range [REGNO, ENDREGNO)
5812 appears either explicitly or implicitly in X
5813 other than being stored into (except for earlyclobber operands).
5815 References contained within the substructure at LOC do not count.
5816 LOC may be zero, meaning don't ignore anything.
5818 This is similar to refers_to_regno_p in rtlanal.c except that we
5819 look at equivalences for pseudos that didn't get hard registers. */
5822 refers_to_regno_for_reload_p (regno
, endregno
, x
, loc
)
5823 unsigned int regno
, endregno
;
5836 code
= GET_CODE (x
);
5843 /* If this is a pseudo, a hard register must not have been allocated.
5844 X must therefore either be a constant or be in memory. */
5845 if (r
>= FIRST_PSEUDO_REGISTER
)
5847 if (reg_equiv_memory_loc
[r
])
5848 return refers_to_regno_for_reload_p (regno
, endregno
,
5849 reg_equiv_memory_loc
[r
],
5852 if (reg_equiv_constant
[r
])
5858 return (endregno
> r
5859 && regno
< r
+ (r
< FIRST_PSEUDO_REGISTER
5860 ? HARD_REGNO_NREGS (r
, GET_MODE (x
))
5864 /* If this is a SUBREG of a hard reg, we can see exactly which
5865 registers are being modified. Otherwise, handle normally. */
5866 if (GET_CODE (SUBREG_REG (x
)) == REG
5867 && REGNO (SUBREG_REG (x
)) < FIRST_PSEUDO_REGISTER
)
5869 unsigned int inner_regno
= REGNO (SUBREG_REG (x
)) + SUBREG_WORD (x
);
5870 unsigned int inner_endregno
5871 = inner_regno
+ (inner_regno
< FIRST_PSEUDO_REGISTER
5872 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5874 return endregno
> inner_regno
&& regno
< inner_endregno
;
5880 if (&SET_DEST (x
) != loc
5881 /* Note setting a SUBREG counts as referring to the REG it is in for
5882 a pseudo but not for hard registers since we can
5883 treat each word individually. */
5884 && ((GET_CODE (SET_DEST (x
)) == SUBREG
5885 && loc
!= &SUBREG_REG (SET_DEST (x
))
5886 && GET_CODE (SUBREG_REG (SET_DEST (x
))) == REG
5887 && REGNO (SUBREG_REG (SET_DEST (x
))) >= FIRST_PSEUDO_REGISTER
5888 && refers_to_regno_for_reload_p (regno
, endregno
,
5889 SUBREG_REG (SET_DEST (x
)),
5891 /* If the output is an earlyclobber operand, this is
5893 || ((GET_CODE (SET_DEST (x
)) != REG
5894 || earlyclobber_operand_p (SET_DEST (x
)))
5895 && refers_to_regno_for_reload_p (regno
, endregno
,
5896 SET_DEST (x
), loc
))))
5899 if (code
== CLOBBER
|| loc
== &SET_SRC (x
))
5908 /* X does not match, so try its subexpressions. */
5910 fmt
= GET_RTX_FORMAT (code
);
5911 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
5913 if (fmt
[i
] == 'e' && loc
!= &XEXP (x
, i
))
5921 if (refers_to_regno_for_reload_p (regno
, endregno
,
5925 else if (fmt
[i
] == 'E')
5928 for (j
= XVECLEN (x
, i
) - 1; j
>=0; j
--)
5929 if (loc
!= &XVECEXP (x
, i
, j
)
5930 && refers_to_regno_for_reload_p (regno
, endregno
,
5931 XVECEXP (x
, i
, j
), loc
))
5938 /* Nonzero if modifying X will affect IN. If X is a register or a SUBREG,
5939 we check if any register number in X conflicts with the relevant register
5940 numbers. If X is a constant, return 0. If X is a MEM, return 1 iff IN
5941 contains a MEM (we don't bother checking for memory addresses that can't
5942 conflict because we expect this to be a rare case.
5944 This function is similar to reg_overlap_mention_p in rtlanal.c except
5945 that we look at equivalences for pseudos that didn't get hard registers. */
5948 reg_overlap_mentioned_for_reload_p (x
, in
)
5951 int regno
, endregno
;
5953 /* Overly conservative. */
5954 if (GET_CODE (x
) == STRICT_LOW_PART
)
5957 /* If either argument is a constant, then modifying X can not affect IN. */
5958 if (CONSTANT_P (x
) || CONSTANT_P (in
))
5960 else if (GET_CODE (x
) == SUBREG
)
5962 regno
= REGNO (SUBREG_REG (x
));
5963 if (regno
< FIRST_PSEUDO_REGISTER
)
5964 regno
+= SUBREG_WORD (x
);
5966 else if (GET_CODE (x
) == REG
)
5970 /* If this is a pseudo, it must not have been assigned a hard register.
5971 Therefore, it must either be in memory or be a constant. */
5973 if (regno
>= FIRST_PSEUDO_REGISTER
)
5975 if (reg_equiv_memory_loc
[regno
])
5976 return refers_to_mem_for_reload_p (in
);
5977 else if (reg_equiv_constant
[regno
])
5982 else if (GET_CODE (x
) == MEM
)
5983 return refers_to_mem_for_reload_p (in
);
5984 else if (GET_CODE (x
) == SCRATCH
|| GET_CODE (x
) == PC
5985 || GET_CODE (x
) == CC0
)
5986 return reg_mentioned_p (x
, in
);
5990 endregno
= regno
+ (regno
< FIRST_PSEUDO_REGISTER
5991 ? HARD_REGNO_NREGS (regno
, GET_MODE (x
)) : 1);
5993 return refers_to_regno_for_reload_p (regno
, endregno
, in
, NULL_PTR
);
5996 /* Return nonzero if anything in X contains a MEM. Look also for pseudo
6000 refers_to_mem_for_reload_p (x
)
6006 if (GET_CODE (x
) == MEM
)
6009 if (GET_CODE (x
) == REG
)
6010 return (REGNO (x
) >= FIRST_PSEUDO_REGISTER
6011 && reg_equiv_memory_loc
[REGNO (x
)]);
6013 fmt
= GET_RTX_FORMAT (GET_CODE (x
));
6014 for (i
= GET_RTX_LENGTH (GET_CODE (x
)) - 1; i
>= 0; i
--)
6016 && (GET_CODE (XEXP (x
, i
)) == MEM
6017 || refers_to_mem_for_reload_p (XEXP (x
, i
))))
6023 /* Check the insns before INSN to see if there is a suitable register
6024 containing the same value as GOAL.
6025 If OTHER is -1, look for a register in class CLASS.
6026 Otherwise, just see if register number OTHER shares GOAL's value.
6028 Return an rtx for the register found, or zero if none is found.
6030 If RELOAD_REG_P is (short *)1,
6031 we reject any hard reg that appears in reload_reg_rtx
6032 because such a hard reg is also needed coming into this insn.
6034 If RELOAD_REG_P is any other nonzero value,
6035 it is a vector indexed by hard reg number
6036 and we reject any hard reg whose element in the vector is nonnegative
6037 as well as any that appears in reload_reg_rtx.
6039 If GOAL is zero, then GOALREG is a register number; we look
6040 for an equivalent for that register.
6042 MODE is the machine mode of the value we want an equivalence for.
6043 If GOAL is nonzero and not VOIDmode, then it must have mode MODE.
6045 This function is used by jump.c as well as in the reload pass.
6047 If GOAL is the sum of the stack pointer and a constant, we treat it
6048 as if it were a constant except that sp is required to be unchanging. */
6051 find_equiv_reg (goal
, insn
, class, other
, reload_reg_p
, goalreg
, mode
)
6054 enum reg_class
class;
6056 short *reload_reg_p
;
6058 enum machine_mode mode
;
6060 register rtx p
= insn
;
6061 rtx goaltry
, valtry
, value
, where
;
6063 register int regno
= -1;
6067 int goal_mem_addr_varies
= 0;
6068 int need_stable_sp
= 0;
6074 else if (GET_CODE (goal
) == REG
)
6075 regno
= REGNO (goal
);
6076 else if (GET_CODE (goal
) == MEM
)
6078 enum rtx_code code
= GET_CODE (XEXP (goal
, 0));
6079 if (MEM_VOLATILE_P (goal
))
6081 if (flag_float_store
&& GET_MODE_CLASS (GET_MODE (goal
)) == MODE_FLOAT
)
6083 /* An address with side effects must be reexecuted. */
6098 else if (CONSTANT_P (goal
))
6100 else if (GET_CODE (goal
) == PLUS
6101 && XEXP (goal
, 0) == stack_pointer_rtx
6102 && CONSTANT_P (XEXP (goal
, 1)))
6103 goal_const
= need_stable_sp
= 1;
6104 else if (GET_CODE (goal
) == PLUS
6105 && XEXP (goal
, 0) == frame_pointer_rtx
6106 && CONSTANT_P (XEXP (goal
, 1)))
6111 /* Scan insns back from INSN, looking for one that copies
6112 a value into or out of GOAL.
6113 Stop and give up if we reach a label. */
6118 if (p
== 0 || GET_CODE (p
) == CODE_LABEL
)
6121 if (GET_CODE (p
) == INSN
6122 /* If we don't want spill regs ... */
6123 && (! (reload_reg_p
!= 0
6124 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6125 /* ... then ignore insns introduced by reload; they aren't
6126 useful and can cause results in reload_as_needed to be
6127 different from what they were when calculating the need for
6128 spills. If we notice an input-reload insn here, we will
6129 reject it below, but it might hide a usable equivalent.
6130 That makes bad code. It may even abort: perhaps no reg was
6131 spilled for this insn because it was assumed we would find
6133 || INSN_UID (p
) < reload_first_uid
))
6136 pat
= single_set (p
);
6138 /* First check for something that sets some reg equal to GOAL. */
6141 && true_regnum (SET_SRC (pat
)) == regno
6142 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6145 && true_regnum (SET_DEST (pat
)) == regno
6146 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0)
6148 (goal_const
&& rtx_equal_p (SET_SRC (pat
), goal
)
6149 /* When looking for stack pointer + const,
6150 make sure we don't use a stack adjust. */
6151 && !reg_overlap_mentioned_for_reload_p (SET_DEST (pat
), goal
)
6152 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6154 && (valueno
= true_regnum (valtry
= SET_DEST (pat
))) >= 0
6155 && rtx_renumbered_equal_p (goal
, SET_SRC (pat
)))
6157 && (valueno
= true_regnum (valtry
= SET_SRC (pat
))) >= 0
6158 && rtx_renumbered_equal_p (goal
, SET_DEST (pat
)))
6159 /* If we are looking for a constant,
6160 and something equivalent to that constant was copied
6161 into a reg, we can use that reg. */
6162 || (goal_const
&& REG_NOTES (p
) != 0
6163 && (tem
= find_reg_note (p
, REG_EQUIV
, NULL_RTX
))
6164 && ((rtx_equal_p (XEXP (tem
, 0), goal
)
6166 = true_regnum (valtry
= SET_DEST (pat
))) >= 0)
6167 || (GET_CODE (SET_DEST (pat
)) == REG
6168 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6169 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6171 && GET_CODE (goal
) == CONST_INT
6173 = operand_subword (XEXP (tem
, 0), 0, 0,
6175 && rtx_equal_p (goal
, goaltry
)
6177 = operand_subword (SET_DEST (pat
), 0, 0,
6179 && (valueno
= true_regnum (valtry
)) >= 0)))
6180 || (goal_const
&& (tem
= find_reg_note (p
, REG_EQUIV
,
6182 && GET_CODE (SET_DEST (pat
)) == REG
6183 && GET_CODE (XEXP (tem
, 0)) == CONST_DOUBLE
6184 && (GET_MODE_CLASS (GET_MODE (XEXP (tem
, 0)))
6186 && GET_CODE (goal
) == CONST_INT
6187 && 0 != (goaltry
= operand_subword (XEXP (tem
, 0), 1, 0,
6189 && rtx_equal_p (goal
, goaltry
)
6191 = operand_subword (SET_DEST (pat
), 1, 0, VOIDmode
))
6192 && (valueno
= true_regnum (valtry
)) >= 0)))
6195 : ((unsigned) valueno
< FIRST_PSEUDO_REGISTER
6196 && TEST_HARD_REG_BIT (reg_class_contents
[(int) class],
6206 /* We found a previous insn copying GOAL into a suitable other reg VALUE
6207 (or copying VALUE into GOAL, if GOAL is also a register).
6208 Now verify that VALUE is really valid. */
6210 /* VALUENO is the register number of VALUE; a hard register. */
6212 /* Don't try to re-use something that is killed in this insn. We want
6213 to be able to trust REG_UNUSED notes. */
6214 if (REG_NOTES (where
) != 0 && find_reg_note (where
, REG_UNUSED
, value
))
6217 /* If we propose to get the value from the stack pointer or if GOAL is
6218 a MEM based on the stack pointer, we need a stable SP. */
6219 if (valueno
== STACK_POINTER_REGNUM
|| regno
== STACK_POINTER_REGNUM
6220 || (goal_mem
&& reg_overlap_mentioned_for_reload_p (stack_pointer_rtx
,
6224 /* Reject VALUE if the copy-insn moved the wrong sort of datum. */
6225 if (GET_MODE (value
) != mode
)
6228 /* Reject VALUE if it was loaded from GOAL
6229 and is also a register that appears in the address of GOAL. */
6231 if (goal_mem
&& value
== SET_DEST (single_set (where
))
6232 && refers_to_regno_for_reload_p (valueno
,
6234 + HARD_REGNO_NREGS (valueno
, mode
)),
6238 /* Reject registers that overlap GOAL. */
6240 if (!goal_mem
&& !goal_const
6241 && regno
+ (int) HARD_REGNO_NREGS (regno
, mode
) > valueno
6242 && regno
< valueno
+ (int) HARD_REGNO_NREGS (valueno
, mode
))
6245 nregs
= HARD_REGNO_NREGS (regno
, mode
);
6246 valuenregs
= HARD_REGNO_NREGS (valueno
, mode
);
6248 /* Reject VALUE if it is one of the regs reserved for reloads.
6249 Reload1 knows how to reuse them anyway, and it would get
6250 confused if we allocated one without its knowledge.
6251 (Now that insns introduced by reload are ignored above,
6252 this case shouldn't happen, but I'm not positive.) */
6254 if (reload_reg_p
!= 0 && reload_reg_p
!= (short *) (HOST_WIDE_INT
) 1)
6257 for (i
= 0; i
< valuenregs
; ++i
)
6258 if (reload_reg_p
[valueno
+ i
] >= 0)
6262 /* Reject VALUE if it is a register being used for an input reload
6263 even if it is not one of those reserved. */
6265 if (reload_reg_p
!= 0)
6268 for (i
= 0; i
< n_reloads
; i
++)
6269 if (rld
[i
].reg_rtx
!= 0 && rld
[i
].in
)
6271 int regno1
= REGNO (rld
[i
].reg_rtx
);
6272 int nregs1
= HARD_REGNO_NREGS (regno1
,
6273 GET_MODE (rld
[i
].reg_rtx
));
6274 if (regno1
< valueno
+ valuenregs
6275 && regno1
+ nregs1
> valueno
)
6281 /* We must treat frame pointer as varying here,
6282 since it can vary--in a nonlocal goto as generated by expand_goto. */
6283 goal_mem_addr_varies
= !CONSTANT_ADDRESS_P (XEXP (goal
, 0));
6285 /* Now verify that the values of GOAL and VALUE remain unaltered
6286 until INSN is reached. */
6295 /* Don't trust the conversion past a function call
6296 if either of the two is in a call-clobbered register, or memory. */
6297 if (GET_CODE (p
) == CALL_INSN
)
6301 if (goal_mem
|| need_stable_sp
)
6304 if (regno
>= 0 && regno
< FIRST_PSEUDO_REGISTER
)
6305 for (i
= 0; i
< nregs
; ++i
)
6306 if (call_used_regs
[regno
+ i
])
6309 if (valueno
>= 0 && valueno
< FIRST_PSEUDO_REGISTER
)
6310 for (i
= 0; i
< valuenregs
; ++i
)
6311 if (call_used_regs
[valueno
+ i
])
6315 #ifdef NON_SAVING_SETJMP
6316 if (NON_SAVING_SETJMP
&& GET_CODE (p
) == NOTE
6317 && NOTE_LINE_NUMBER (p
) == NOTE_INSN_SETJMP
)
6325 /* Watch out for unspec_volatile, and volatile asms. */
6326 if (volatile_insn_p (pat
))
6329 /* If this insn P stores in either GOAL or VALUE, return 0.
6330 If GOAL is a memory ref and this insn writes memory, return 0.
6331 If GOAL is a memory ref and its address is not constant,
6332 and this insn P changes a register used in GOAL, return 0. */
6334 if (GET_CODE (pat
) == COND_EXEC
)
6335 pat
= COND_EXEC_CODE (pat
);
6336 if (GET_CODE (pat
) == SET
|| GET_CODE (pat
) == CLOBBER
)
6338 register rtx dest
= SET_DEST (pat
);
6339 while (GET_CODE (dest
) == SUBREG
6340 || GET_CODE (dest
) == ZERO_EXTRACT
6341 || GET_CODE (dest
) == SIGN_EXTRACT
6342 || GET_CODE (dest
) == STRICT_LOW_PART
)
6343 dest
= XEXP (dest
, 0);
6344 if (GET_CODE (dest
) == REG
)
6346 register int xregno
= REGNO (dest
);
6348 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6349 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6352 if (xregno
< regno
+ nregs
&& xregno
+ xnregs
> regno
)
6354 if (xregno
< valueno
+ valuenregs
6355 && xregno
+ xnregs
> valueno
)
6357 if (goal_mem_addr_varies
6358 && reg_overlap_mentioned_for_reload_p (dest
, goal
))
6360 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6363 else if (goal_mem
&& GET_CODE (dest
) == MEM
6364 && ! push_operand (dest
, GET_MODE (dest
)))
6366 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6367 && reg_equiv_memory_loc
[regno
] != 0)
6369 else if (need_stable_sp
&& push_operand (dest
, GET_MODE (dest
)))
6372 else if (GET_CODE (pat
) == PARALLEL
)
6375 for (i
= XVECLEN (pat
, 0) - 1; i
>= 0; i
--)
6377 register rtx v1
= XVECEXP (pat
, 0, i
);
6378 if (GET_CODE (v1
) == COND_EXEC
)
6379 v1
= COND_EXEC_CODE (v1
);
6380 if (GET_CODE (v1
) == SET
|| GET_CODE (v1
) == CLOBBER
)
6382 register rtx dest
= SET_DEST (v1
);
6383 while (GET_CODE (dest
) == SUBREG
6384 || GET_CODE (dest
) == ZERO_EXTRACT
6385 || GET_CODE (dest
) == SIGN_EXTRACT
6386 || GET_CODE (dest
) == STRICT_LOW_PART
)
6387 dest
= XEXP (dest
, 0);
6388 if (GET_CODE (dest
) == REG
)
6390 register int xregno
= REGNO (dest
);
6392 if (REGNO (dest
) < FIRST_PSEUDO_REGISTER
)
6393 xnregs
= HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6396 if (xregno
< regno
+ nregs
6397 && xregno
+ xnregs
> regno
)
6399 if (xregno
< valueno
+ valuenregs
6400 && xregno
+ xnregs
> valueno
)
6402 if (goal_mem_addr_varies
6403 && reg_overlap_mentioned_for_reload_p (dest
,
6406 if (xregno
== STACK_POINTER_REGNUM
&& need_stable_sp
)
6409 else if (goal_mem
&& GET_CODE (dest
) == MEM
6410 && ! push_operand (dest
, GET_MODE (dest
)))
6412 else if (GET_CODE (dest
) == MEM
&& regno
>= FIRST_PSEUDO_REGISTER
6413 && reg_equiv_memory_loc
[regno
] != 0)
6415 else if (need_stable_sp
6416 && push_operand (dest
, GET_MODE (dest
)))
6422 if (GET_CODE (p
) == CALL_INSN
&& CALL_INSN_FUNCTION_USAGE (p
))
6426 for (link
= CALL_INSN_FUNCTION_USAGE (p
); XEXP (link
, 1) != 0;
6427 link
= XEXP (link
, 1))
6429 pat
= XEXP (link
, 0);
6430 if (GET_CODE (pat
) == CLOBBER
)
6432 register rtx dest
= SET_DEST (pat
);
6434 if (GET_CODE (dest
) == REG
)
6436 register int xregno
= REGNO (dest
);
6438 = HARD_REGNO_NREGS (xregno
, GET_MODE (dest
));
6440 if (xregno
< regno
+ nregs
6441 && xregno
+ xnregs
> regno
)
6443 else if (xregno
< valueno
+ valuenregs
6444 && xregno
+ xnregs
> valueno
)
6446 else if (goal_mem_addr_varies
6447 && reg_overlap_mentioned_for_reload_p (dest
,
6452 else if (goal_mem
&& GET_CODE (dest
) == MEM
6453 && ! push_operand (dest
, GET_MODE (dest
)))
6455 else if (need_stable_sp
6456 && push_operand (dest
, GET_MODE (dest
)))
6463 /* If this insn auto-increments or auto-decrements
6464 either regno or valueno, return 0 now.
6465 If GOAL is a memory ref and its address is not constant,
6466 and this insn P increments a register used in GOAL, return 0. */
6470 for (link
= REG_NOTES (p
); link
; link
= XEXP (link
, 1))
6471 if (REG_NOTE_KIND (link
) == REG_INC
6472 && GET_CODE (XEXP (link
, 0)) == REG
)
6474 register int incno
= REGNO (XEXP (link
, 0));
6475 if (incno
< regno
+ nregs
&& incno
>= regno
)
6477 if (incno
< valueno
+ valuenregs
&& incno
>= valueno
)
6479 if (goal_mem_addr_varies
6480 && reg_overlap_mentioned_for_reload_p (XEXP (link
, 0),
6490 /* Find a place where INCED appears in an increment or decrement operator
6491 within X, and return the amount INCED is incremented or decremented by.
6492 The value is always positive. */
6495 find_inc_amount (x
, inced
)
6498 register enum rtx_code code
= GET_CODE (x
);
6499 register const char *fmt
;
6504 register rtx addr
= XEXP (x
, 0);
6505 if ((GET_CODE (addr
) == PRE_DEC
6506 || GET_CODE (addr
) == POST_DEC
6507 || GET_CODE (addr
) == PRE_INC
6508 || GET_CODE (addr
) == POST_INC
)
6509 && XEXP (addr
, 0) == inced
)
6510 return GET_MODE_SIZE (GET_MODE (x
));
6511 else if ((GET_CODE (addr
) == PRE_MODIFY
6512 || GET_CODE (addr
) == POST_MODIFY
)
6513 && GET_CODE (XEXP (addr
, 1)) == PLUS
6514 && XEXP (addr
, 0) == XEXP (XEXP (addr
, 1), 0)
6515 && XEXP (addr
, 0) == inced
6516 && GET_CODE (XEXP (XEXP (addr
, 1), 1)) == CONST_INT
)
6518 i
= INTVAL (XEXP (XEXP (addr
, 1), 1));
6519 return i
< 0 ? -i
: i
;
6523 fmt
= GET_RTX_FORMAT (code
);
6524 for (i
= GET_RTX_LENGTH (code
) - 1; i
>= 0; i
--)
6528 register int tem
= find_inc_amount (XEXP (x
, i
), inced
);
6535 for (j
= XVECLEN (x
, i
) - 1; j
>= 0; j
--)
6537 register int tem
= find_inc_amount (XVECEXP (x
, i
, j
), inced
);
6547 /* Return 1 if register REGNO is the subject of a clobber in insn INSN. */
6550 regno_clobbered_p (regno
, insn
)
6554 if (GET_CODE (PATTERN (insn
)) == CLOBBER
6555 && GET_CODE (XEXP (PATTERN (insn
), 0)) == REG
)
6556 return REGNO (XEXP (PATTERN (insn
), 0)) == regno
;
6558 if (GET_CODE (PATTERN (insn
)) == PARALLEL
)
6560 int i
= XVECLEN (PATTERN (insn
), 0) - 1;
6564 rtx elt
= XVECEXP (PATTERN (insn
), 0, i
);
6565 if (GET_CODE (elt
) == CLOBBER
&& GET_CODE (XEXP (elt
, 0)) == REG
6566 && REGNO (XEXP (elt
, 0)) == regno
)
6574 static const char *reload_when_needed_name
[] =
6577 "RELOAD_FOR_OUTPUT",
6579 "RELOAD_FOR_INPUT_ADDRESS",
6580 "RELOAD_FOR_INPADDR_ADDRESS",
6581 "RELOAD_FOR_OUTPUT_ADDRESS",
6582 "RELOAD_FOR_OUTADDR_ADDRESS",
6583 "RELOAD_FOR_OPERAND_ADDRESS",
6584 "RELOAD_FOR_OPADDR_ADDR",
6586 "RELOAD_FOR_OTHER_ADDRESS"
6589 static const char * const reg_class_names
[] = REG_CLASS_NAMES
;
6591 /* These functions are used to print the variables set by 'find_reloads' */
6594 debug_reload_to_stream (f
)
6602 for (r
= 0; r
< n_reloads
; r
++)
6604 fprintf (f
, "Reload %d: ", r
);
6608 fprintf (f
, "reload_in (%s) = ",
6609 GET_MODE_NAME (rld
[r
].inmode
));
6610 print_inline_rtx (f
, rld
[r
].in
, 24);
6611 fprintf (f
, "\n\t");
6614 if (rld
[r
].out
!= 0)
6616 fprintf (f
, "reload_out (%s) = ",
6617 GET_MODE_NAME (rld
[r
].outmode
));
6618 print_inline_rtx (f
, rld
[r
].out
, 24);
6619 fprintf (f
, "\n\t");
6622 fprintf (f
, "%s, ", reg_class_names
[(int) rld
[r
].class]);
6624 fprintf (f
, "%s (opnum = %d)",
6625 reload_when_needed_name
[(int) rld
[r
].when_needed
],
6628 if (rld
[r
].optional
)
6629 fprintf (f
, ", optional");
6631 if (rld
[r
].nongroup
)
6632 fprintf (stderr
, ", nongroup");
6634 if (rld
[r
].inc
!= 0)
6635 fprintf (f
, ", inc by %d", rld
[r
].inc
);
6637 if (rld
[r
].nocombine
)
6638 fprintf (f
, ", can't combine");
6640 if (rld
[r
].secondary_p
)
6641 fprintf (f
, ", secondary_reload_p");
6643 if (rld
[r
].in_reg
!= 0)
6645 fprintf (f
, "\n\treload_in_reg: ");
6646 print_inline_rtx (f
, rld
[r
].in_reg
, 24);
6649 if (rld
[r
].out_reg
!= 0)
6651 fprintf (f
, "\n\treload_out_reg: ");
6652 print_inline_rtx (f
, rld
[r
].out_reg
, 24);
6655 if (rld
[r
].reg_rtx
!= 0)
6657 fprintf (f
, "\n\treload_reg_rtx: ");
6658 print_inline_rtx (f
, rld
[r
].reg_rtx
, 24);
6662 if (rld
[r
].secondary_in_reload
!= -1)
6664 fprintf (f
, "%ssecondary_in_reload = %d",
6665 prefix
, rld
[r
].secondary_in_reload
);
6669 if (rld
[r
].secondary_out_reload
!= -1)
6670 fprintf (f
, "%ssecondary_out_reload = %d\n",
6671 prefix
, rld
[r
].secondary_out_reload
);
6674 if (rld
[r
].secondary_in_icode
!= CODE_FOR_nothing
)
6676 fprintf (stderr
, "%ssecondary_in_icode = %s", prefix
,
6677 insn_data
[rld
[r
].secondary_in_icode
].name
);
6681 if (rld
[r
].secondary_out_icode
!= CODE_FOR_nothing
)
6682 fprintf (stderr
, "%ssecondary_out_icode = %s", prefix
,
6683 insn_data
[rld
[r
].secondary_out_icode
].name
);
6692 debug_reload_to_stream (stderr
);