gcc/config/arm/aarch-cost-tables.h

   1 /* RTX cost tables shared between arm and aarch64.
   2
   3    Copyright (C) 2013-2015 Free Software Foundation, Inc.
   4    Contributed by ARM Ltd.
   5
   6    This file is part of GCC.
   7
   8    GCC is free software; you can redistribute it and/or modify it
   9    under the terms of the GNU General Public License as published
  10    by the Free Software Foundation; either version 3, or (at your
  11    option) any later version.
  12
  13    GCC is distributed in the hope that it will be useful, but WITHOUT
  14    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  15    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  16    License for more details.
  17
  18    You should have received a copy of the GNU General Public License
  19    along with GCC; see the file COPYING3.  If not see
  20    <http://www.gnu.org/licenses/>.  */
  21
  22 #ifndef GCC_AARCH_COST_TABLES_H
  23 #define GCC_AARCH_COST_TABLES_H
  24
  25 const struct cpu_cost_table generic_extra_costs =
  26 {
  27   /* ALU */
  28   {
  29     0,                  /* arith.  */
  30     0,                  /* logical.  */
  31     0,                  /* shift.  */
  32     COSTS_N_INSNS (1),  /* shift_reg.  */
  33     0,                  /* arith_shift.  */
  34     COSTS_N_INSNS (1),  /* arith_shift_reg.  */
  35     0,                  /* log_shift.  */
  36     COSTS_N_INSNS (1),  /* log_shift_reg.  */
  37     0,                  /* extend.  */
  38     COSTS_N_INSNS (1),  /* extend_arith.  */
  39     0,                  /* bfi.  */
  40     0,                  /* bfx.  */
  41     0,                  /* clz.  */
  42     0,                  /* rev.  */
  43     COSTS_N_INSNS (1),  /* non_exec.  */
  44     false               /* non_exec_costs_exec.  */
  45   },
  46   {
  47     /* MULT SImode */
  48     {
  49       COSTS_N_INSNS (2),        /* simple.  */
  50       COSTS_N_INSNS (1),        /* flag_setting.  */
  51       COSTS_N_INSNS (2),        /* extend.  */
  52       COSTS_N_INSNS (3),        /* add.  */
  53       COSTS_N_INSNS (3),        /* extend_add.  */
  54       COSTS_N_INSNS (8)         /* idiv.  */
  55     },
  56     /* MULT DImode */
  57     {
  58       0,                        /* simple (N/A).  */
  59       0,                        /* flag_setting (N/A).  */
  60       COSTS_N_INSNS (2),        /* extend.  */
  61       0,                        /* add (N/A).  */
  62       COSTS_N_INSNS (3),        /* extend_add.  */
  63       0                         /* idiv (N/A).  */
  64     }
  65   },
  66   /* LD/ST */
  67   {
  68     COSTS_N_INSNS (2),  /* load.  */
  69     COSTS_N_INSNS (2),  /* load_sign_extend.  */
  70     COSTS_N_INSNS (3),  /* ldrd.  */
  71     COSTS_N_INSNS (2),  /* ldm_1st.  */
  72     1,                  /* ldm_regs_per_insn_1st.  */
  73     1,                  /* ldm_regs_per_insn_subsequent.  */
  74     COSTS_N_INSNS (2),  /* loadf.  */
  75     COSTS_N_INSNS (3),  /* loadd.  */
  76     COSTS_N_INSNS (1),  /* load_unaligned.  */
  77     COSTS_N_INSNS (2),  /* store.  */
  78     COSTS_N_INSNS (3),  /* strd.  */
  79     COSTS_N_INSNS (2),  /* stm_1st.  */
  80     1,                  /* stm_regs_per_insn_1st.  */
  81     1,                  /* stm_regs_per_insn_subsequent.  */
  82     COSTS_N_INSNS (2),  /* storef.  */
  83     COSTS_N_INSNS (3),  /* stored.  */
  84     COSTS_N_INSNS (1)  /* store_unaligned.  */
  85   },
  86   {
  87     /* FP SFmode */
  88     {
  89       COSTS_N_INSNS (7),        /* div.  */
  90       COSTS_N_INSNS (2),        /* mult.  */
  91       COSTS_N_INSNS (3),        /* mult_addsub.  */
  92       COSTS_N_INSNS (3),        /* fma.  */
  93       COSTS_N_INSNS (1),        /* addsub.  */
  94       0,                        /* fpconst.  */
  95       0,                        /* neg.  */
  96       0,                        /* compare.  */
  97       0,                        /* widen.  */
  98       0,                        /* narrow.  */
  99       0,                        /* toint.  */
 100       0,                        /* fromint.  */
 101       0                         /* roundint.  */
 102     },
 103     /* FP DFmode */
 104     {
 105       COSTS_N_INSNS (15),       /* div.  */
 106       COSTS_N_INSNS (5),        /* mult.  */
 107       COSTS_N_INSNS (7),        /* mult_addsub.  */
 108       COSTS_N_INSNS (7),        /* fma.  */
 109       COSTS_N_INSNS (3),        /* addsub.  */
 110       0,                        /* fpconst.  */
 111       0,                        /* neg.  */
 112       0,                        /* compare.  */
 113       0,                        /* widen.  */
 114       0,                        /* narrow.  */
 115       0,                        /* toint.  */
 116       0,                        /* fromint.  */
 117       0                         /* roundint.  */
 118     }
 119   },
 120   /* Vector */
 121   {
 122     COSTS_N_INSNS (1)   /* alu.  */
 123   }
 124 };
 125
 126 const struct cpu_cost_table cortexa53_extra_costs =
 127 {
 128   /* ALU */
 129   {
 130     0,                  /* arith.  */
 131     0,                  /* logical.  */
 132     COSTS_N_INSNS (1),  /* shift.  */
 133     0,                  /* shift_reg.  */
 134     COSTS_N_INSNS (1),  /* arith_shift.  */
 135     COSTS_N_INSNS (1),  /* arith_shift_reg.  */
 136     COSTS_N_INSNS (1),  /* log_shift.  */
 137     COSTS_N_INSNS (1),  /* log_shift_reg.  */
 138     COSTS_N_INSNS (1),  /* extend.  */
 139     COSTS_N_INSNS (1),  /* extend_arith.  */
 140     COSTS_N_INSNS (1),  /* bfi.  */
 141     COSTS_N_INSNS (1),  /* bfx.  */
 142     0,                  /* clz.  */
 143     0,                  /* rev.  */
 144     0,                  /* non_exec.  */
 145     true                /* non_exec_costs_exec.  */
 146   },
 147   {
 148     /* MULT SImode */
 149     {
 150       COSTS_N_INSNS (1),        /* simple.  */
 151       COSTS_N_INSNS (2),        /* flag_setting.  */
 152       COSTS_N_INSNS (1),        /* extend.  */
 153       COSTS_N_INSNS (1),        /* add.  */
 154       COSTS_N_INSNS (1),        /* extend_add.  */
 155       COSTS_N_INSNS (7)         /* idiv.  */
 156     },
 157     /* MULT DImode */
 158     {
 159       COSTS_N_INSNS (2),        /* simple.  */
 160       0,                        /* flag_setting (N/A).  */
 161       COSTS_N_INSNS (2),        /* extend.  */
 162       COSTS_N_INSNS (2),        /* add.  */
 163       COSTS_N_INSNS (2),        /* extend_add.  */
 164       COSTS_N_INSNS (15)        /* idiv.  */
 165     }
 166   },
 167   /* LD/ST */
 168   {
 169     COSTS_N_INSNS (1),          /* load.  */
 170     COSTS_N_INSNS (1),          /* load_sign_extend.  */
 171     COSTS_N_INSNS (1),          /* ldrd.  */
 172     COSTS_N_INSNS (1),          /* ldm_1st.  */
 173     1,                          /* ldm_regs_per_insn_1st.  */
 174     2,                          /* ldm_regs_per_insn_subsequent.  */
 175     COSTS_N_INSNS (1),          /* loadf.  */
 176     COSTS_N_INSNS (1),          /* loadd.  */
 177     COSTS_N_INSNS (1),          /* load_unaligned.  */
 178     0,                          /* store.  */
 179     0,                          /* strd.  */
 180     0,                          /* stm_1st.  */
 181     1,                          /* stm_regs_per_insn_1st.  */
 182     2,                          /* stm_regs_per_insn_subsequent.  */
 183     0,                          /* storef.  */
 184     0,                          /* stored.  */
 185     COSTS_N_INSNS (1)           /* store_unaligned.  */
 186   },
 187   {
 188     /* FP SFmode */
 189     {
 190       COSTS_N_INSNS (15),       /* div.  */
 191       COSTS_N_INSNS (3),        /* mult.  */
 192       COSTS_N_INSNS (7),        /* mult_addsub. */
 193       COSTS_N_INSNS (7),        /* fma.  */
 194       COSTS_N_INSNS (3),        /* addsub.  */
 195       COSTS_N_INSNS (1),        /* fpconst. */
 196       COSTS_N_INSNS (2),        /* neg.  */
 197       COSTS_N_INSNS (1),        /* compare.  */
 198       COSTS_N_INSNS (3),        /* widen.  */
 199       COSTS_N_INSNS (3),        /* narrow.  */
 200       COSTS_N_INSNS (3),        /* toint.  */
 201       COSTS_N_INSNS (3),        /* fromint.  */
 202       COSTS_N_INSNS (3)         /* roundint.  */
 203     },
 204     /* FP DFmode */
 205     {
 206       COSTS_N_INSNS (30),       /* div.  */
 207       COSTS_N_INSNS (3),        /* mult.  */
 208       COSTS_N_INSNS (7),        /* mult_addsub.  */
 209       COSTS_N_INSNS (7),        /* fma.  */
 210       COSTS_N_INSNS (3),        /* addsub.  */
 211       COSTS_N_INSNS (1),        /* fpconst.  */
 212       COSTS_N_INSNS (2),        /* neg.  */
 213       COSTS_N_INSNS (1),        /* compare.  */
 214       COSTS_N_INSNS (3),        /* widen.  */
 215       COSTS_N_INSNS (3),        /* narrow.  */
 216       COSTS_N_INSNS (3),        /* toint.  */
 217       COSTS_N_INSNS (3),        /* fromint.  */
 218       COSTS_N_INSNS (3)         /* roundint.  */
 219     }
 220   },
 221   /* Vector */
 222   {
 223     COSTS_N_INSNS (1)   /* alu.  */
 224   }
 225 };
 226
 227 const struct cpu_cost_table cortexa57_extra_costs =
 228 {
 229   /* ALU */
 230   {
 231     0,                 /* arith.  */
 232     0,                 /* logical.  */
 233     0,                 /* shift.  */
 234     COSTS_N_INSNS (1), /* shift_reg.  */
 235     COSTS_N_INSNS (1), /* arith_shift.  */
 236     COSTS_N_INSNS (1), /* arith_shift_reg.  */
 237     COSTS_N_INSNS (1), /* log_shift.  */
 238     COSTS_N_INSNS (1), /* log_shift_reg.  */
 239     0,                 /* extend.  */
 240     COSTS_N_INSNS (1), /* extend_arith.  */
 241     COSTS_N_INSNS (1), /* bfi.  */
 242     0,                 /* bfx.  */
 243     0,                 /* clz.  */
 244     0,                  /* rev.  */
 245     0,                 /* non_exec.  */
 246     true               /* non_exec_costs_exec.  */
 247   },
 248   {
 249     /* MULT SImode */
 250     {
 251       COSTS_N_INSNS (2),       /* simple.  */
 252       COSTS_N_INSNS (3),       /* flag_setting.  */
 253       COSTS_N_INSNS (2),       /* extend.  */
 254       COSTS_N_INSNS (2),       /* add.  */
 255       COSTS_N_INSNS (2),       /* extend_add.  */
 256       COSTS_N_INSNS (18)       /* idiv.  */
 257     },
 258     /* MULT DImode */
 259     {
 260       COSTS_N_INSNS (4),       /* simple.  */
 261       0,                       /* flag_setting (N/A).  */
 262       COSTS_N_INSNS (2),       /* extend.  */
 263       COSTS_N_INSNS (4),       /* add.  */
 264       COSTS_N_INSNS (2),       /* extend_add.  */
 265       COSTS_N_INSNS (34)       /* idiv.  */
 266     }
 267   },
 268   /* LD/ST */
 269   {
 270     COSTS_N_INSNS (3),         /* load.  */
 271     COSTS_N_INSNS (3),         /* load_sign_extend.  */
 272     COSTS_N_INSNS (3),         /* ldrd.  */
 273     COSTS_N_INSNS (2),         /* ldm_1st.  */
 274     1,                         /* ldm_regs_per_insn_1st.  */
 275     2,                         /* ldm_regs_per_insn_subsequent.  */
 276     COSTS_N_INSNS (4),         /* loadf.  */
 277     COSTS_N_INSNS (4),         /* loadd.  */
 278     COSTS_N_INSNS (5),         /* load_unaligned.  */
 279     0,                         /* store.  */
 280     0,                         /* strd.  */
 281     0,                         /* stm_1st.  */
 282     1,                         /* stm_regs_per_insn_1st.  */
 283     2,                         /* stm_regs_per_insn_subsequent.  */
 284     0,                         /* storef.  */
 285     0,                         /* stored.  */
 286     COSTS_N_INSNS (1)          /* store_unaligned.  */
 287   },
 288   {
 289     /* FP SFmode */
 290     {
 291       COSTS_N_INSNS (17),      /* div.  */
 292       COSTS_N_INSNS (5),       /* mult.  */
 293       COSTS_N_INSNS (9),       /* mult_addsub. */
 294       COSTS_N_INSNS (9),       /* fma.  */
 295       COSTS_N_INSNS (4),       /* addsub.  */
 296       COSTS_N_INSNS (2),       /* fpconst. */
 297       COSTS_N_INSNS (2),       /* neg.  */
 298       COSTS_N_INSNS (2),       /* compare.  */
 299       COSTS_N_INSNS (4),       /* widen.  */
 300       COSTS_N_INSNS (4),       /* narrow.  */
 301       COSTS_N_INSNS (4),       /* toint.  */
 302       COSTS_N_INSNS (4),       /* fromint.  */
 303       COSTS_N_INSNS (4)        /* roundint.  */
 304     },
 305     /* FP DFmode */
 306     {
 307       COSTS_N_INSNS (31),      /* div.  */
 308       COSTS_N_INSNS (5),       /* mult.  */
 309       COSTS_N_INSNS (9),       /* mult_addsub.  */
 310       COSTS_N_INSNS (9),       /* fma.  */
 311       COSTS_N_INSNS (4),       /* addsub.  */
 312       COSTS_N_INSNS (2),       /* fpconst.  */
 313       COSTS_N_INSNS (2),       /* neg.  */
 314       COSTS_N_INSNS (2),       /* compare.  */
 315       COSTS_N_INSNS (4),       /* widen.  */
 316       COSTS_N_INSNS (4),       /* narrow.  */
 317       COSTS_N_INSNS (4),       /* toint.  */
 318       COSTS_N_INSNS (4),       /* fromint.  */
 319       COSTS_N_INSNS (4)        /* roundint.  */
 320     }
 321   },
 322   /* Vector */
 323   {
 324     COSTS_N_INSNS (1)  /* alu.  */
 325   }
 326 };
 327
 328 const struct cpu_cost_table xgene1_extra_costs =
 329 {
 330   /* ALU */
 331   {
 332     0,                 /* arith.  */
 333     0,                 /* logical.  */
 334     0,                 /* shift.  */
 335     COSTS_N_INSNS (1), /* shift_reg.  */
 336     COSTS_N_INSNS (1), /* arith_shift.  */
 337     COSTS_N_INSNS (1), /* arith_shift_reg.  */
 338     COSTS_N_INSNS (1), /* log_shift.  */
 339     COSTS_N_INSNS (1), /* log_shift_reg.  */
 340     COSTS_N_INSNS (1), /* extend.  */
 341     0,                 /* extend_arithm.  */
 342     COSTS_N_INSNS (1), /* bfi.  */
 343     COSTS_N_INSNS (1), /* bfx.  */
 344     0,                 /* clz.  */
 345     COSTS_N_INSNS (1), /* rev.  */
 346     0,                 /* non_exec.  */
 347     true               /* non_exec_costs_exec.  */
 348   },
 349   {
 350     /* MULT SImode */
 351     {
 352       COSTS_N_INSNS (4),       /* simple.  */
 353       COSTS_N_INSNS (4),       /* flag_setting.  */
 354       COSTS_N_INSNS (4),       /* extend.  */
 355       COSTS_N_INSNS (4),       /* add.  */
 356       COSTS_N_INSNS (4),       /* extend_add.  */
 357       COSTS_N_INSNS (20)       /* idiv.  */
 358     },
 359     /* MULT DImode */
 360     {
 361       COSTS_N_INSNS (5),       /* simple.  */
 362       0,                       /* flag_setting (N/A).  */
 363       COSTS_N_INSNS (5),       /* extend.  */
 364       COSTS_N_INSNS (5),       /* add.  */
 365       COSTS_N_INSNS (5),       /* extend_add.  */
 366       COSTS_N_INSNS (21)       /* idiv.  */
 367     }
 368   },
 369   /* LD/ST */
 370   {
 371     COSTS_N_INSNS (5),         /* load.  */
 372     COSTS_N_INSNS (6),         /* load_sign_extend.  */
 373     COSTS_N_INSNS (5),         /* ldrd.  */
 374     COSTS_N_INSNS (5),         /* ldm_1st.  */
 375     1,                         /* ldm_regs_per_insn_1st.  */
 376     1,                         /* ldm_regs_per_insn_subsequent.  */
 377     COSTS_N_INSNS (10),        /* loadf.  */
 378     COSTS_N_INSNS (10),        /* loadd.  */
 379     COSTS_N_INSNS (5),         /* load_unaligned.  */
 380     0,                         /* store.  */
 381     0,                         /* strd.  */
 382     0,                         /* stm_1st.  */
 383     1,                         /* stm_regs_per_insn_1st.  */
 384     1,                         /* stm_regs_per_insn_subsequent.  */
 385     0,                         /* storef.  */
 386     0,                         /* stored.  */
 387     0,                         /* store_unaligned.  */
 388   },
 389   {
 390     /* FP SFmode */
 391     {
 392       COSTS_N_INSNS (23),      /* div.  */
 393       COSTS_N_INSNS (5),       /* mult.  */
 394       COSTS_N_INSNS (5),       /* mult_addsub. */
 395       COSTS_N_INSNS (5),       /* fma.  */
 396       COSTS_N_INSNS (5),       /* addsub.  */
 397       COSTS_N_INSNS (2),       /* fpconst. */
 398       COSTS_N_INSNS (3),       /* neg.  */
 399       COSTS_N_INSNS (2),       /* compare.  */
 400       COSTS_N_INSNS (6),       /* widen.  */
 401       COSTS_N_INSNS (6),       /* narrow.  */
 402       COSTS_N_INSNS (4),       /* toint.  */
 403       COSTS_N_INSNS (4),       /* fromint.  */
 404       COSTS_N_INSNS (4)        /* roundint.  */
 405     },
 406     /* FP DFmode */
 407     {
 408       COSTS_N_INSNS (29),      /* div.  */
 409       COSTS_N_INSNS (5),       /* mult.  */
 410       COSTS_N_INSNS (5),       /* mult_addsub.  */
 411       COSTS_N_INSNS (5),       /* fma.  */
 412       COSTS_N_INSNS (5),       /* addsub.  */
 413       COSTS_N_INSNS (3),       /* fpconst.  */
 414       COSTS_N_INSNS (3),       /* neg.  */
 415       COSTS_N_INSNS (2),       /* compare.  */
 416       COSTS_N_INSNS (6),       /* widen.  */
 417       COSTS_N_INSNS (6),       /* narrow.  */
 418       COSTS_N_INSNS (4),       /* toint.  */
 419       COSTS_N_INSNS (4),       /* fromint.  */
 420       COSTS_N_INSNS (4)        /* roundint.  */
 421     }
 422   },
 423   /* Vector */
 424   {
 425     COSTS_N_INSNS (2)  /* alu.  */
 426   }
 427 };
 428
 429 #endif /* GCC_AARCH_COST_TABLES_H */