| blob | 138696530db586f690ef5bc5cc76ab9213e8eff2 |
1 /* Definitions of target machine for GNU compiler. AT&T DSP1600.
2 Copyright (C) 1994, 1995, 1996, 1997, 1998 Free Software Foundation, Inc.
3 Contributed by Michael Collison (collison@world.std.com).
5 This file is part of GNU CC.
7 GNU CC is free software; you can redistribute it and/or modify
8 it under the terms of the GNU General Public License as published by
9 the Free Software Foundation; either version 1, or (at your option)
10 any later version.
12 GNU CC is distributed in the hope that it will be useful,
13 but WITHOUT ANY WARRANTY; without even the implied warranty of
14 MERCHANTABILITY or FITNESS FOR A PARTICULAR PURPOSE. See the
15 GNU General Public License for more details.
17 You should have received a copy of the GNU General Public License
18 along with GNU CC; see the file COPYING. If not, write to
19 the Free Software Foundation, 59 Temple Place - Suite 330,
20 Boston, MA 02111-1307, USA. */
83 /* RUN-TIME TARGET SPECIFICATION */
84 #define DSP16XX 1
86 /* Name of the AT&T assembler */
90 /* Name of the AT&T linker */
94 /* Define which switches take word arguments */
95 #define WORD_SWITCH_TAKES_ARG(STR) \
97 0)
99 #ifdef CC1_SPEC
100 #undef CC1_SPEC
101 #endif
104 /* Define this as a spec to call the AT&T assembler */
108 /* Define this as a spec to call the AT&T linker */
111 %{r} %{s} %{t} %{u*} %{x}\
112 %{!A:%{!nostdlib:%{!nostartfiles:%S}}} %{static:}\
113 %{L*} %D %o %{!nostdlib:-le1600 %L -le1600}\
116 /* Nothing complicated here, just link with libc.a under normal
117 circumstances */
120 /* Specify the startup file to link with. */
122 %{mmap2:m2_crt0.o%s} \
123 %{mmap3:m3_crt0.o%s} \
124 %{mmap4:m4_crt0.o%s} \
125 %{!mmap*: %{!ifile*: m4_crt0.o%s} %{ifile*: \
126 %eA -ifile option requires a -map option}}"
128 /* Specify the end file to link with */
131 %{mmap2:m2_crtn.o%s} \
132 %{mmap3:m3_crtn.o%s} \
133 %{mmap4:m4_crtn.o%s} \
134 %{!mmap*: %{!ifile*: m4_crtn.o%s} %{ifile*: \
135 %eA -ifile option requires a -map option}}"
138 /* Tell gcc where to look for the startfile */
141 /* Tell gcc where to look for it's executables */
144 /* Command line options to the AT&T assembler */
147 /* Command line options for the AT&T linker */
149 %{!ifile*:%{mmap1:-ifile m1_deflt.if%s} \
150 %{mmap2:-ifile m2_deflt.if%s} \
151 %{mmap3:-ifile m3_deflt.if%s} \
152 %{mmap4:-ifile m4_deflt.if%s} \
153 %{!mmap*:-ifile m4_deflt.if%s}} \
154 %{ifile*} %{!r:-a}"
156 /* Names to predefine in the preprocessor for this target machine. */
157 #ifdef __MSDOS__
159 #else
161 #endif
163 /* Run-time compilation parameters selecting different hardware subsets. */
167 /* Macros used in the machine description to test the flags. */
181 initialize data at startup */
185 /* Compile passing first two args in regs 0 and 1.
186 This exists only to test compiler features that will
187 be needed for RISC chips. It is not usable
188 and is not intended to be usable on this cpu. */
189 #define TARGET_REGPARM (target_flags & MASK_REGPARM)
191 /* The call is on the same 4k page, so instead of loading
192 the 'pt' register and branching, we can branch directly */
194 #define TARGET_NEAR_CALL (target_flags & MASK_NEAR_CALL)
196 /* The jump is on the same 4k page, so instead of loading
197 the 'pt' register and branching, we can branch directly */
199 #define TARGET_NEAR_JUMP (target_flags & MASK_NEAR_JUMP)
201 /* Generate shift instructions to use the 1610 Bit Manipulation
202 Unit. */
203 #define TARGET_BMU (target_flags & MASK_BMU)
205 /* Optimize to conserve memory */
206 #define TARGET_OPTIMIZE_MEMORY (target_flags & MASK_OPTIMIZE_MEMORY)
208 /* Optimize for maximum speed */
209 #define TARGET_OPTIMIZE_SPEED (target_flags & MASK_OPTIMIZE_SPEED)
211 #define TARGET_YBASE_HIGH (target_flags & MASK_YBASE_HIGH)
213 /* Direct the linker to output extra info for initialized data */
214 #define TARGET_MASK_INIT (target_flags & MASK_INIT)
216 #define TARGET_INLINE_MULT (target_flags & MASK_INLINE_MULT)
218 /* Reserve the ybase registers *(0) - *(31) */
219 #define TARGET_RESERVE_YBASE (target_flags & MASK_RESERVE_YBASE)
221 /* Macro to define tables used to set the flags.
222 This is a list in braces of pairs in braces,
223 each pair being { "NAME", VALUE }
224 where VALUE is the bits to set or minus the bits to clear.
225 An empty string NAME is used to identify the default VALUE. */
228 #define TARGET_SWITCHES \
229 { \
248 }
250 /* Default target_flags if no switches are specified */
251 #ifndef TARGET_DEFAULT
252 #define TARGET_DEFAULT MASK_OPTIMIZE_MEMORY|MASK_REGPARM|MASK_YBASE_HIGH
253 #endif
255 /* This macro is similar to `TARGET_SWITCHES' but defines names of
256 command options that have values. Its definition is an
257 initializer with a subgrouping for each command option.
259 Each subgrouping contains a string constant, that defines the
260 fixed part of the option name, and the address of a variable.
261 The variable, type `char *', is set to the variable part of the
262 given option if the fixed part matches. The actual option name
263 is made by appending `-m' to the specified name.
265 Here is an example which defines `-mshort-data-NUMBER'. If the
266 given option is `-mshort-data-512', the variable `m88k_short_data'
267 will be set to the string `"512"'.
269 extern char *m88k_short_data;
270 #define TARGET_OPTIONS { { "short-data-", &m88k_short_data } } */
272 #define TARGET_OPTIONS \
273 { \
279 }
281 /* Sometimes certain combinations of command options do not make sense
282 on a particular target machine. You can define a macro
283 `OVERRIDE_OPTIONS' to take account of this. This macro, if
284 defined, is executed once just after all the command options have
285 been parsed. */
287 #define OVERRIDE_OPTIONS override_options ()
289 #define OPTIMIZATION_OPTIONS(LEVEL,SIZE) \
290 { \
291 flag_gnu_linker = FALSE; \
292 \
293 if (LEVEL) \
294 { \
295 flag_omit_frame_pointer = TRUE; \
296 flag_thread_jumps = TRUE; \
297 } \
298 \
299 if (LEVEL >= 2) \
300 { \
301 if (! SIZE) \
302 flag_strength_reduce = TRUE; \
303 flag_cse_follow_jumps = TRUE; \
304 flag_cse_skip_blocks = TRUE; \
305 flag_expensive_optimizations = TRUE; \
306 flag_rerun_cse_after_loop = TRUE; \
307 } \
308 \
309 if ((LEVEL >= 3) && ! SIZE) \
310 { \
311 flag_inline_functions = 1; \
312 } \
313 }
314 \f
315 /* STORAGE LAYOUT */
317 /* Define if you don't want extended real, but do want to use the
318 software floating point emulator for REAL_ARITHMETIC and
319 decimal <-> binary conversion. */
320 #define REAL_ARITHMETIC
322 /* Define this if most significant bit is lowest numbered
323 in instructions that operate on numbered bit-fields.
324 */
325 #define BITS_BIG_ENDIAN 1
327 /* Define this if most significant byte of a word is the lowest numbered.
328 We define big-endian, but since the 1600 series cannot address bytes
329 it does not matter. */
330 #define BYTES_BIG_ENDIAN 1
332 /* Define this if most significant word of a multiword number is numbered.
333 For the 1600 we can decide arbitrarily since there are no machine instructions for them. */
334 #define WORDS_BIG_ENDIAN 1
336 /* number of bits in an addressable storage unit */
337 #define BITS_PER_UNIT 16
339 /* Width in bits of a "word", which is the contents of a machine register.
340 Note that this is not necessarily the width of data type `int';
341 if using 16-bit ints on a 68000, this would still be 32.
342 But on a machine with 16-bit registers, this would be 16. */
343 #define BITS_PER_WORD 16
345 /* Maximum number of bits in a word. */
346 #define MAX_BITS_PER_WORD 16
348 /* Width of a word, in units (bytes). */
349 #define UNITS_PER_WORD 1
351 /* Width in bits of a pointer.
352 See also the macro `Pmode' defined below. */
353 #define POINTER_SIZE 16
355 /* Allocation boundary (in *bits*) for storing pointers in memory. */
356 #define POINTER_BOUNDARY 16
358 /* Allocation boundary (in *bits*) for storing arguments in argument list. */
359 #define PARM_BOUNDARY 16
361 /* Boundary (in *bits*) on which stack pointer should be aligned. */
362 #define STACK_BOUNDARY 16
364 /* Allocation boundary (in *bits*) for the code of a function. */
365 #define FUNCTION_BOUNDARY 16
367 /* Biggest alignment that any data type can require on this machine, in bits. */
368 #define BIGGEST_ALIGNMENT 16
370 /* Biggest alignment that any structure field can require on this machine, in bits */
371 #define BIGGEST_FIELD_ALIGNMENT 16
373 /* Alignment of field after `int : 0' in a structure. */
374 #define EMPTY_FIELD_BOUNDARY 16
376 /* Number of bits which any structure or union's size must be a multiple of. Each structure
377 or union's size is rounded up to a multiple of this */
378 #define STRUCTURE_SIZE_BOUNDARY 16
380 /* Define this if move instructions will actually fail to work
381 when given unaligned data. */
382 #define STRICT_ALIGNMENT 1
384 /* An integer expression for the size in bits of the largest integer machine mode that
385 should actually be used. All integer machine modes of this size or smaller can be
386 used for structures and unions with the appropriate sizes. */
387 #define MAX_FIXED_MODE_SIZE 32
388 \f
389 /* LAYOUT OF SOURCE LANGUAGE DATA TYPES */
391 #define CHAR_TYPE_SIZE 16
392 #define SHORT_TYPE_SIZE 16
393 #define INT_TYPE_SIZE 16
394 #define LONG_TYPE_SIZE 32
395 #define LONG_LONG_TYPE_SIZE 32
396 #define FLOAT_TYPE_SIZE 32
397 #define DOUBLE_TYPE_SIZE 32
398 #define LONG_DOUBLE_TYPE_SIZE 32
400 /* An expression whose value is 1 or 0, according to whether the type char should be
401 signed or unsigned by default. */
403 #define DEFAULT_SIGNED_CHAR 1
405 /* A C expression to determine whether to give an enum type only as many bytes
406 as it takes to represent the range of possible values of that type. A nonzero
407 value means to do that; a zero value means all enum types should be allocated
408 like int. */
410 #define DEFAULT_SHORT_ENUMS 0
412 /* A C expression for a string describing the name of the data type to use for
413 size values. */
417 /* A C expression for a string describing the name of the datat type to use for the
418 result of subtracting two pointers */
430 \f
431 /* REGISTER USAGE. */
433 #define ALL_16_BIT_REGISTERS 1
435 /* Number of actual hardware registers.
436 The hardware registers are assigned numbers for the compiler
437 from 0 to FIRST_PSEUDO_REGISTER-1 */
439 #define FIRST_PSEUDO_REGISTER REG_YBASE31 + 1
441 /* 1 for registers that have pervasive standard uses
442 and are not available for the register allocator.
444 The registers are laid out as follows:
446 {a0,a0l,a1,a1l,x,y,yl,p,pl} - Data Arithmetic Unit
447 {r0,r1,r2,r3,j,k,ybase} - Y Space Address Arithmetic Unit
448 {pt} - X Space Address Arithmetic Unit
449 {ar0,ar1,ar2,ar3} - Bit Manipulation UNit
450 {pr} - Return Address Register
452 We reserve r2 for the Stack Pointer.
453 We specify r3 for the Frame Pointer but allow the compiler
454 to omit it when possible since we have so few pointer registers. */
456 #define REG_A0 0
457 #define REG_A0L 1
458 #define REG_A1 2
459 #define REG_A1L 3
460 #define REG_X 4
461 #define REG_Y 5
462 #define REG_YL 6
463 #define REG_PROD 7
464 #define REG_PRODL 8
465 #define REG_R0 9
466 #define REG_R1 10
467 #define REG_R2 11
468 #define REG_R3 12
469 #define REG_J 13
470 #define REG_K 14
471 #define REG_YBASE 15
472 #define REG_PT 16
473 #define REG_AR0 17
474 #define REG_AR1 18
475 #define REG_AR2 19
476 #define REG_AR3 20
477 #define REG_C0 21
478 #define REG_C1 22
479 #define REG_C2 23
480 #define REG_PR 24
481 #define REG_RB 25
482 #define REG_YBASE0 26
483 #define REG_YBASE1 27
484 #define REG_YBASE2 28
485 #define REG_YBASE3 29
486 #define REG_YBASE4 30
487 #define REG_YBASE5 31
488 #define REG_YBASE6 32
489 #define REG_YBASE7 33
490 #define REG_YBASE8 34
491 #define REG_YBASE9 35
492 #define REG_YBASE10 36
493 #define REG_YBASE11 37
494 #define REG_YBASE12 38
495 #define REG_YBASE13 39
496 #define REG_YBASE14 40
497 #define REG_YBASE15 41
498 #define REG_YBASE16 42
499 #define REG_YBASE17 43
500 #define REG_YBASE18 44
501 #define REG_YBASE19 45
502 #define REG_YBASE20 46
503 #define REG_YBASE21 47
504 #define REG_YBASE22 48
505 #define REG_YBASE23 49
506 #define REG_YBASE24 50
507 #define REG_YBASE25 51
508 #define REG_YBASE26 52
509 #define REG_YBASE27 53
510 #define REG_YBASE28 54
511 #define REG_YBASE29 55
512 #define REG_YBASE30 56
513 #define REG_YBASE31 57
515 /* Do we have a accumulator register? */
516 #define IS_ACCUM_REG(REGNO) ((REGNO) >= REG_A0 && (REGNO) <= REG_A1L)
517 #define IS_ACCUM_LOW_REG(REGNO) ((REGNO) == REG_A0L || (REGNO) == REG_A1L)
519 /* Do we have a virtual ybase register */
520 #define IS_YBASE_REGISTER_WINDOW(REGNO) ((REGNO) >= REG_YBASE0 && (REGNO) <= REG_YBASE31)
522 #define IS_ADDRESS_REGISTER(REGNO) ((REGNO) >= REG_R0 && (REGNO) <= REG_R3)
524 #define FIXED_REGISTERS \
525 {0, 0, 0, 0, 0, 0, 0, 0, 0, \
526 0, 0, 0, 1, 0, 0, 1, \
527 1, \
528 0, 0, 0, 0, \
529 1, 1, 1, \
530 0, 0, \
531 0, 0, 0, 0, 0, 0, 0, 0, \
532 0, 0, 0, 0, 0, 0, 0, 0, \
533 0, 0, 0, 0, 0, 0, 0, 0, \
534 0, 0, 0, 0, 0, 0, 0, 0}
536 /* 1 for registers not available across function calls.
537 These must include the FIXED_REGISTERS and also any
538 registers that can be used without being saved.
539 The latter must include the registers where values are returned
540 and the register where structure-value addresses are passed.
541 On the 1610 'a0' holds return values from functions. 'r0' holds
542 structure-value addresses.
544 In addition we don't save either j, k, ybase or any of the
545 bit manipulation registers. */
548 #define CALL_USED_REGISTERS \
549 {1, 1, 1, 1, 0, 1, 1, 1, 1, \
550 1, 0, 0, 1, 1, 1, 1, \
551 1, \
552 0, 0, 1, 1, \
553 1, 1, 1, \
554 0, 1, \
555 0, 0, 0, 0, 0, 0, 0, 0, \
556 0, 0, 0, 0, 0, 0, 0, 0, \
557 0, 0, 0, 0, 0, 0, 0, 0, \
558 0, 0, 0, 0, 0, 0, 0, 0}
560 /* List the order in which to allocate registers. Each register must be
561 listed once, even those in FIXED_REGISTERS.
563 We allocate in the following order:
564 */
566 #define REG_ALLOC_ORDER \
567 { REG_R0, REG_R1, REG_R2, REG_PROD, REG_Y, REG_X, \
568 REG_PRODL, REG_YL, REG_AR0, REG_AR1, \
569 REG_RB, REG_A0, REG_A1, REG_A0L, \
570 REG_A1L, REG_AR2, REG_AR3, \
571 REG_YBASE, REG_J, REG_K, REG_PR, REG_PT, REG_C0, \
572 REG_C1, REG_C2, REG_R3, \
573 REG_YBASE0, REG_YBASE1, REG_YBASE2, REG_YBASE3, \
574 REG_YBASE4, REG_YBASE5, REG_YBASE6, REG_YBASE7, \
575 REG_YBASE8, REG_YBASE9, REG_YBASE10, REG_YBASE11, \
576 REG_YBASE12, REG_YBASE13, REG_YBASE14, REG_YBASE15, \
577 REG_YBASE16, REG_YBASE17, REG_YBASE18, REG_YBASE19, \
578 REG_YBASE20, REG_YBASE21, REG_YBASE22, REG_YBASE23, \
579 REG_YBASE24, REG_YBASE25, REG_YBASE26, REG_YBASE27, \
580 REG_YBASE28, REG_YBASE29, REG_YBASE30, REG_YBASE31 }
582 /* Zero or more C statements that may conditionally modify two
583 variables `fixed_regs' and `call_used_regs' (both of type `char
584 []') after they have been initialized from the two preceding
585 macros.
587 This is necessary in case the fixed or call-clobbered registers
588 depend on target flags.
590 You need not define this macro if it has no work to do.
592 If the usage of an entire class of registers depends on the target
593 flags, you may indicate this to GCC by using this macro to modify
594 `fixed_regs' and `call_used_regs' to 1 for each of the registers in
595 the classes which should not be used by GCC. Also define the macro
596 `REG_CLASS_FROM_LETTER' to return `NO_REGS' if it is called with a
597 letter for a class that shouldn't be used.
599 (However, if this class is not included in `GENERAL_REGS' and all
600 of the insn patterns whose constraints permit this class are
601 controlled by target switches, then GCC will automatically avoid
602 using these registers when the target switches are opposed to
603 them.) If the user tells us there is no BMU, we can't use
604 ar0-ar3 for register allocation */
606 #define CONDITIONAL_REGISTER_USAGE \
607 do \
608 { \
609 if (!TARGET_BMU) \
610 { \
611 int regno; \
612 \
613 for (regno = REG_AR0; regno <= REG_AR3; regno++) \
614 fixed_regs[regno] = call_used_regs[regno] = 1; \
615 } \
616 if (TARGET_RESERVE_YBASE) \
617 { \
618 int regno; \
619 \
620 for (regno = REG_YBASE0; regno <= REG_YBASE31; regno++) \
621 fixed_regs[regno] = call_used_regs[regno] = 1; \
622 } \
623 } \
624 while (0)
626 /* Determine which register classes are very likely used by spill registers.
627 local-alloc.c won't allocate pseudos that have these classes as their
628 preferred class unless they are "preferred or nothing". */
630 #define CLASS_LIKELY_SPILLED_P(CLASS) \
631 ((CLASS) != ALL_REGS && (CLASS) != YBASE_VIRT_REGS)
633 /* Return number of consecutive hard regs needed starting at reg REGNO
634 to hold something of mode MODE.
635 This is ordinarily the length in words of a value of mode MODE
636 but can be less for certain modes in special long registers. */
638 #define HARD_REGNO_NREGS(REGNO, MODE) \
639 (GET_MODE_SIZE(MODE))
641 /* Value is 1 if hard register REGNO can hold a value of machine-mode MODE. */
643 #define HARD_REGNO_MODE_OK(REGNO, MODE) hard_regno_mode_ok(REGNO, MODE)
645 /* Value is 1 if it is a good idea to tie two pseudo registers
646 when one has mode MODE1 and one has mode MODE2.
647 If HARD_REGNO_MODE_OK could produce different values for MODE1 and MODE2,
648 for any hard reg, then this must be 0 for correct output. */
649 #define MODES_TIEABLE_P(MODE1, MODE2) \
650 (((MODE1) == (MODE2)) || \
651 (GET_MODE_CLASS((MODE1)) == MODE_FLOAT) \
652 == (GET_MODE_CLASS((MODE2)) == MODE_FLOAT))
654 /* Specify the registers used for certain standard purposes.
655 The values of these macros are register numbers. */
657 /* DSP1600 pc isn't overloaded on a register. */
658 /* #define PC_REGNUM */
660 /* Register to use for pushing function arguments.
661 This is r3 in our case */
662 #define STACK_POINTER_REGNUM REG_R3
664 /* Base register for access to local variables of the function.
665 This is r2 in our case */
666 #define FRAME_POINTER_REGNUM REG_R2
668 /* We can debug without the frame pointer */
669 #define CAN_DEBUG_WITHOUT_FP 1
671 /* The 1610 saves the return address in this register */
672 #define RETURN_ADDRESS_REGNUM REG_PR
674 /* Base register for access to arguments of the function. */
675 #define ARG_POINTER_REGNUM FRAME_POINTER_REGNUM
677 /* Register in which static-chain is passed to a function. */
679 #define STATIC_CHAIN_REGNUM 4
681 /* Register in which address to store a structure value
682 is passed to a function. This is 'r0' in our case */
683 #define STRUCT_VALUE_REGNUM REG_R0
684 \f
685 /* Define the classes of registers for register constraints in the
686 machine description. Also define ranges of constants.
688 One of the classes must always be named ALL_REGS and include all hard regs.
689 If there is more than one class, another class must be named NO_REGS
690 and contain no registers.
692 The name GENERAL_REGS must be the name of a class (or an alias for
693 another name such as ALL_REGS). This is the class of registers
694 that is allowed by "g" or "r" in a register constraint.
695 Also, registers outside this class are allocated only when
696 instructions express preferences for them.
698 The classes must be numbered in nondecreasing order; that is,
699 a larger-numbered class must never be contained completely
700 in a smaller-numbered class.
702 For any two classes, it is very desirable that there be another
703 class that represents their union. */
706 enum reg_class
707 {
708 NO_REGS,
709 A0H_REG,
710 A0L_REG,
711 A0_REG,
712 A1H_REG,
713 ACCUM_HIGH_REGS,
714 A1L_REG,
715 ACCUM_LOW_REGS,
716 A1_REG,
717 ACCUM_REGS,
718 X_REG,
719 X_OR_ACCUM_LOW_REGS,
720 X_OR_ACCUM_REGS,
721 YH_REG,
722 YH_OR_ACCUM_HIGH_REGS,
723 X_OR_YH_REGS,
724 YL_REG,
725 YL_OR_ACCUM_LOW_REGS,
726 X_OR_YL_REGS,
727 X_OR_Y_REGS,
728 Y_REG,
729 ACCUM_OR_Y_REGS,
730 PH_REG,
731 X_OR_PH_REGS,
732 PL_REG,
733 PL_OR_ACCUM_LOW_REGS,
734 X_OR_PL_REGS,
735 YL_OR_PL_OR_ACCUM_LOW_REGS,
736 P_REG,
737 ACCUM_OR_P_REGS,
738 YL_OR_P_REGS,
739 ACCUM_LOW_OR_YL_OR_P_REGS,
740 Y_OR_P_REGS,
741 ACCUM_Y_OR_P_REGS,
742 NO_FRAME_Y_ADDR_REGS,
743 Y_ADDR_REGS,
744 ACCUM_LOW_OR_Y_ADDR_REGS,
745 ACCUM_OR_Y_ADDR_REGS,
746 X_OR_Y_ADDR_REGS,
747 Y_OR_Y_ADDR_REGS,
748 P_OR_Y_ADDR_REGS,
749 NON_HIGH_YBASE_ELIGIBLE_REGS,
750 YBASE_ELIGIBLE_REGS,
751 J_REG,
752 J_OR_DAU_16_BIT_REGS,
753 BMU_REGS,
754 NOHIGH_NON_ADDR_REGS,
755 NON_ADDR_REGS,
756 SLOW_MEM_LOAD_REGS,
757 NOHIGH_NON_YBASE_REGS,
758 NO_ACCUM_NON_YBASE_REGS,
759 NON_YBASE_REGS,
760 YBASE_VIRT_REGS,
761 ACCUM_LOW_OR_YBASE_REGS,
762 ACCUM_OR_YBASE_REGS,
763 X_OR_YBASE_REGS,
764 Y_OR_YBASE_REGS,
765 ACCUM_LOW_YL_PL_OR_YBASE_REGS,
766 P_OR_YBASE_REGS,
767 ACCUM_Y_P_OR_YBASE_REGS,
768 Y_ADDR_OR_YBASE_REGS,
769 YBASE_OR_NOHIGH_YBASE_ELIGIBLE_REGS,
770 YBASE_OR_YBASE_ELIGIBLE_REGS,
771 NO_HIGH_ALL_REGS,
772 ALL_REGS,
773 LIM_REG_CLASSES
774 };
776 /* GENERAL_REGS must be the name of a register class */
777 #define GENERAL_REGS ALL_REGS
779 #define N_REG_CLASSES (int) LIM_REG_CLASSES
781 /* Give names of register classes as strings for dump file. */
783 #define REG_CLASS_NAMES \
784 { \
850 }
852 /* Define which registers fit in which classes.
853 This is an initializer for a vector of HARD_REG_SET
854 of length N_REG_CLASSES. */
856 #define REG_CLASS_CONTENTS \
857 { \
923 }
926 /* The same information, inverted:
927 Return the class number of the smallest class containing
928 reg number REGNO. This could be a conditional expression
929 or could index an array. */
931 #define REGNO_REG_CLASS(REGNO) regno_reg_class(REGNO)
933 /* The class value for index registers, and the one for base regs. */
935 #define INDEX_REG_CLASS NO_REGS
936 #define BASE_REG_CLASS Y_ADDR_REGS
938 /* Get reg_class from a letter such as appears in the machine description. */
940 #define REG_CLASS_FROM_LETTER(C) \
941 dsp16xx_reg_class_from_letter(C)
943 #define SECONDARY_RELOAD_CLASS(CLASS, MODE, X) \
944 secondary_reload_class(CLASS, MODE, X)
946 /* When defined, the compiler allows registers explicitly used in the
947 rtl to be used as spill registers but prevents the compiler from
948 extending the lifetime of these registers. */
950 #define SMALL_REGISTER_CLASSES 1
952 /* Macros to check register numbers against specific register classes. */
954 /* These assume that REGNO is a hard or pseudo reg number.
955 They give nonzero only if REGNO is a hard reg of the suitable class
956 or a pseudo reg currently allocated to a suitable hard reg.
957 Since they use reg_renumber, they are safe only once reg_renumber
958 has been allocated, which happens in local-alloc.c. */
960 /* A C expression which is nonzero if register REGNO is suitable for use
961 as a base register in operand addresses. It may be either a suitable
962 hard register or a pseudo register that has been allocated such a
963 hard register.
965 On the 1610 the Y address pointers can be used as a base registers */
966 #define REGNO_OK_FOR_BASE_P(REGNO) \
967 (((REGNO) >= REG_R0 && (REGNO) < REG_R3 + 1) || ((unsigned) reg_renumber[REGNO] >= REG_R0 \
968 && (unsigned) reg_renumber[REGNO] < REG_R3 + 1))
970 #define REGNO_OK_FOR_YBASE_P(REGNO) \
971 (((REGNO) == REG_YBASE) || ((unsigned) reg_renumber[REGNO] == REG_YBASE))
973 #define REGNO_OK_FOR_INDEX_P(REGNO) 0
975 #ifdef ALL_16_BIT_REGISTERS
976 #define IS_32_BIT_REG(REGNO) 0
977 #else
978 #define IS_32_BIT_REG(REGNO) \
979 ((REGNO) == REG_A0 || (REGNO) == REG_A1 || (REGNO) == REG_Y || (REGNO) == REG_PROD)
980 #endif
982 /* Given an rtx X being reloaded into a reg required to be
983 in class CLASS, return the class of reg to actually use.
984 In general this is just CLASS; but on some machines
985 in some cases it is preferable to use a more restrictive class.
986 Also, we must ensure that a PLUS is reloaded either
987 into an accumulator or an address register. */
989 #define PREFERRED_RELOAD_CLASS(X,CLASS) preferred_reload_class (X, CLASS)
991 /* A C expression that places additional restrictions on the register
992 class to use when it is necessary to be able to hold a value of
993 mode MODE in a reload register for which class CLASS would
994 ordinarily be used.
996 Unlike `PREFERRED_RELOAD_CLASS', this macro should be used when
997 there are certain modes that simply can't go in certain reload
998 classes.
1000 The value is a register class; perhaps CLASS, or perhaps another,
1001 smaller class.
1003 Don't define this macro unless the target machine has limitations
1004 which require the macro to do something nontrivial. */
1006 #if 0
1007 #define LIMIT_RELOAD_CLASS(MODE, CLASS) dsp16xx_limit_reload_class (MODE, CLASS)
1008 #endif
1010 /* A C expression for the maximum number of consecutive registers of class CLASS
1011 needed to hold a value of mode MODE */
1012 #define CLASS_MAX_NREGS(CLASS, MODE) \
1013 class_max_nregs(CLASS, MODE)
1015 /* The letters 'I' through 'P' in a register constraint string
1016 can be used to stand for particular ranges of immediate operands.
1017 This macro defines what the ranges are.
1018 C is the letter, and VALUE is a constant value.
1019 Return 1 if VALUE is in the range specified by C.
1021 For the 16xx, the following constraints are used:
1022 'I' requires a non-negative 16-bit value.
1023 'J' requires a non-negative 9-bit value
1024 'K' requires a constant 0 operand.
1025 'L' requires 16-bit value
1026 'M' 32-bit value -- low 16-bits zero
1027 */
1029 #define SMALL_INT(X) (SMALL_INTVAL (INTVAL (X)))
1030 #define SMALL_INTVAL(I) ((unsigned) (I) < 0x10000)
1031 #define SHORT_IMMEDIATE(X) (SHORT_INTVAL (INTVAL(X)))
1032 #define SHORT_INTVAL(I) ((unsigned) (I) < 0x100)
1034 #define CONST_OK_FOR_LETTER_P(VALUE, C) \
1041 (VALUE) == -2 || (VALUE) == 2) \
1042 : 0)
1044 #define CONST_DOUBLE_OK_FOR_LETTER_P(VALUE, C) 1
1046 /* Optional extra constraints for this machine */
1047 #define EXTRA_CONSTRAINT(OP,C) \
1049 : 0)
1050 \f
1051 /* DESCRIBING STACK LAYOUT AND CALLING CONVENTIONS */
1053 /* Define this if pushing a word on the stack
1054 makes the stack pointer a smaller address. */
1055 /* #define STACK_GROWS_DOWNWARD */
1057 /* Define this if the nominal address of the stack frame
1058 is at the high-address end of the local variables;
1059 that is, each additional local variable allocated
1060 goes at a more negative offset in the frame. */
1061 /* #define FRAME_GROWS_DOWNWARD */
1063 #define ARGS_GROW_DOWNWARD
1065 /* We use post decrement on the 1600 because there isn't
1066 a pre-decrement addressing mode. This means that we
1067 assume the stack pointer always points at the next
1068 FREE location on the stack. */
1069 #define STACK_PUSH_CODE POST_INC
1071 /* Offset within stack frame to start allocating local variables at.
1072 If FRAME_GROWS_DOWNWARD, this is the offset to the END of the
1073 first local allocated. Otherwise, it is the offset to the BEGINNING
1074 of the first local allocated. */
1075 #define STARTING_FRAME_OFFSET 0
1077 /* Offset from the stack pointer register to the first
1078 location at which outgoing arguments are placed. */
1079 #define STACK_POINTER_OFFSET (0)
1081 struct dsp16xx_frame_info
1082 {
1093 };
1097 /* If we generate an insn to push BYTES bytes,
1098 this says how many the stack pointer really advances by. */
1099 /* #define PUSH_ROUNDING(BYTES) ((BYTES)) */
1101 /* If defined, the maximum amount of space required for outgoing
1102 arguments will be computed and placed into the variable
1103 'current_function_outgoing_args_size'. No space will be pushed
1104 onto the stack for each call; instead, the function prologue should
1105 increase the stack frame size by this amount.
1107 It is not proper to define both 'PUSH_ROUNDING' and
1108 'ACCUMULATE_OUTGOING_ARGS'. */
1109 #define ACCUMULATE_OUTGOING_ARGS
1111 /* Offset of first parameter from the argument pointer
1112 register value. */
1114 #define FIRST_PARM_OFFSET(FNDECL) (0)
1116 /* Value is 1 if returning from a function call automatically
1117 pops the arguments described by the number-of-args field in the call.
1118 FUNDECL is the declaration node of the function (as a tree),
1119 FUNTYPE is the data type of the function (as a tree),
1120 or for a library call it is an identifier node for the subroutine name. */
1122 #define RETURN_POPS_ARGS(FUNDECL,FUNTYPE,SIZE) 0
1124 /* Define how to find the value returned by a function.
1125 VALTYPE is the data type of the value (as a tree).
1126 If the precise function being called is known, FUNC is its FUNCTION_DECL;
1127 otherwise, FUNC is 0. On the 1610 all function return their values
1128 in a0 (i.e. the upper 16 bits). If the return value is 32-bits the
1129 entire register is significant. */
1131 #define VALUE_REGNO(MODE) (REG_Y)
1133 #define FUNCTION_VALUE(VALTYPE, FUNC) \
1134 gen_rtx (REG, TYPE_MODE (VALTYPE), VALUE_REGNO(TYPE_MODE(VALTYPE)))
1136 /* Define how to find the value returned by a library function
1137 assuming the value has mode MODE. */
1138 #define LIBCALL_VALUE(MODE) gen_rtx (REG, MODE, VALUE_REGNO(MODE))
1140 /* 1 if N is a possible register number for a function value. */
1141 #define FUNCTION_VALUE_REGNO_P(N) ((N) == REG_Y)
1142 \f
1144 /* Define where to put the arguments to a function.
1145 Value is zero to push the argument on the stack,
1146 or a hard register in which to store the argument.
1148 MODE is the argument's machine mode.
1149 TYPE is the data type of the argument (as a tree).
1150 This is null for libcalls where that information may
1151 not be available.
1152 CUM is a variable of type CUMULATIVE_ARGS which gives info about
1153 the preceding args and about the function being called.
1154 NAMED is nonzero if this argument is a named parameter
1155 (otherwise it is an extra parameter matching an ellipsis). */
1157 /* On the 1610 all args are pushed, except if -mregparm is specified
1158 then the first two words of arguments are passed in a0, a1. */
1159 #define FUNCTION_ARG(CUM, MODE, TYPE, NAMED) \
1160 dsp16xx_function_arg (CUM, MODE, TYPE, NAMED)
1162 /* Define the first register to be used for argument passing */
1163 #define FIRST_REG_FOR_FUNCTION_ARG REG_Y
1165 /* Define the profitability of saving registers around calls.
1166 NOTE: For now we turn this off because of a bug in the
1167 caller-saves code and also because i'm not sure it is helpful
1168 on the 1610. */
1170 #define CALLER_SAVE_PROFITABLE(REFS,CALLS) 0
1172 /* This indicates that an argument is to be passed with an invisible reference
1173 (i.e., a pointer to the object is passed).
1175 On the dsp16xx, we do this if it must be passed on the stack. */
1177 #define FUNCTION_ARG_PASS_BY_REFERENCE(CUM, MODE, TYPE, NAMED) \
1178 (MUST_PASS_IN_STACK (MODE, TYPE))
1180 /* For an arg passed partly in registers and partly in memory,
1181 this is the number of registers used.
1182 For args passed entirely in registers or entirely in memory, zero. */
1184 #define FUNCTION_ARG_PARTIAL_NREGS(CUM, MODE, TYPE, NAMED) (0)
1186 /* Define a data type for recording info about an argument list
1187 during the scan of that argument list. This data type should
1188 hold all necessary information about the function itself
1189 and about the args processed so far, enough to enable macros
1190 such as FUNCTION_ARG to determine where the next arg should go. */
1191 #define CUMULATIVE_ARGS int
1193 /* Initialize a variable CUM of type CUMULATIVE_ARGS
1194 for a call to a function whose data type is FNTYPE.
1195 For a library call, FNTYPE is 0. */
1196 #define INIT_CUMULATIVE_ARGS(CUM,FNTYPE,LIBNAME,INDIRECT) ((CUM) = 0)
1198 /* Update the data in CUM to advance over an argument
1199 of mode MODE and data type TYPE.
1200 (TYPE is null for libcalls where that information may not be available.) */
1202 #define FUNCTION_ARG_ADVANCE(CUM, MODE, TYPE, NAMED) \
1203 dsp16xx_function_arg_advance (&CUM, MODE,TYPE, NAMED)
1205 /* 1 if N is a possible register number for function argument passing. */
1206 #define FUNCTION_ARG_REGNO_P(N) \
1207 ((N) == REG_Y || (N) == REG_YL || (N) == REG_PROD || (N) == REG_PRODL)
1209 /* This macro generates the assembly code for function entry.
1210 FILE is a stdio stream to output the code to.
1211 SIZE is an int: how many units of temporary storage to allocate.
1212 Refer to the array `regs_ever_live' to determine which registers
1213 to save; `regs_ever_live[I]' is nonzero if register number I
1214 is ever used in the function. This macro is responsible for
1215 knowing which registers should not be saved even if used. */
1217 #define FUNCTION_PROLOGUE(FILE, SIZE) function_prologue(FILE, SIZE)
1219 /* Output assembler code to FILE to increment profiler label # LABELNO
1220 for profiling a function entry. */
1224 /* Output assembler code to FILE to initialize this source file's
1225 basic block profiling info, if that has not already been done. */
1228 /* Output assembler code to FILE to increment the entry-count for
1229 the BLOCKNO'th basic block in this source file. */
1233 /* EXIT_IGNORE_STACK should be nonzero if, when returning from a function,
1234 the stack pointer does not matter. The value is tested only in
1235 functions that have frame pointers.
1236 No definition is equivalent to always zero. */
1238 #define EXIT_IGNORE_STACK (0)
1242 /* Length in units of the trampoline for entering a nested function.
1243 This is a dummy value */
1245 #define TRAMPOLINE_SIZE 20
1247 /* Emit RTL insns to initialize the variable parts of a trampoline.
1248 FNADDR is an RTX for the address of the function's pure code.
1249 CXT is an RTX for the static chain value for the function. */
1251 #define INITIALIZE_TRAMPOLINE(TRAMP, FNADDR, CXT) \
1254 /* This macro generates the assembly code for function exit,
1255 on machines that need it. If FUNCTION_EPILOGUE is not defined
1256 then individual return instructions are generated for each
1257 return statement. Args are same as for FUNCTION_PROLOGUE.
1259 The function epilogue should not depend on the current stack pointer!
1260 It should use the frame pointer only. This is mandatory because
1261 of alloca; we also take advantage of it to omit stack adjustments
1262 before returning. */
1264 #define FUNCTION_EPILOGUE(FILE, SIZE) function_epilogue(FILE, SIZE)
1266 /* A C expression which is nonzero if a function must have and use a
1267 frame pointer. If its value is nonzero the functions will have a
1268 frame pointer. */
1269 #define FRAME_POINTER_REQUIRED (current_function_calls_alloca)
1271 /* A C statement to store in the variable 'DEPTH' the difference
1272 between the frame pointer and the stack pointer values immediately
1273 after the function prologue. */
1274 #define INITIAL_FRAME_POINTER_OFFSET(DEPTH) \
1275 { (DEPTH) = initial_frame_pointer_offset(); \
1276 }
1277 \f
1278 /* IMPLICIT CALLS TO LIBRARY ROUTINES */
1304 /* Define this macro if calls to the ANSI C library functions memcpy and
1305 memset should be generated instead of the BSD function bcopy & bzero. */
1306 #define TARGET_MEM_FUNCTIONS
1308 \f
1309 /* ADDRESSING MODES */
1311 /* The 1610 has post-increment and decrement, but no pre-modify */
1312 #define HAVE_POST_INCREMENT
1313 #define HAVE_POST_DECREMENT
1315 /* #define HAVE_PRE_DECREMENT */
1316 /* #define HAVE_PRE_INCREMENT */
1318 /* Recognize any constant value that is a valid address. */
1319 #define CONSTANT_ADDRESS_P(X) CONSTANT_P (X)
1321 /* Maximum number of registers that can appear in a valid memory address. */
1322 #define MAX_REGS_PER_ADDRESS 1
1324 /* The macros REG_OK_FOR..._P assume that the arg is a REG rtx
1325 and check its validity for a certain class.
1326 We have two alternate definitions for each of them.
1327 The usual definition accepts all pseudo regs; the other rejects
1328 them unless they have been allocated suitable hard regs.
1329 The symbol REG_OK_STRICT causes the latter definition to be used.
1331 Most source files want to accept pseudo regs in the hope that
1332 they will get allocated to the class that the insn wants them to be in.
1333 Source files for reload pass need to be strict.
1334 After reload, it makes no difference, since pseudo regs have
1335 been eliminated by then. */
1337 #ifndef REG_OK_STRICT
1339 /* Nonzero if X is a hard reg that can be used as an index
1340 or if it is a pseudo reg. */
1341 #define REG_OK_FOR_INDEX_P(X) 0
1343 /* Nonzero if X is a hard reg that can be used as a base reg
1344 or if it is a pseudo reg. */
1345 #define REG_OK_FOR_BASE_P(X) \
1346 ((REGNO (X) >= REG_R0 && REGNO (X) < REG_R3 + 1 ) \
1347 || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1349 /* Nonzero if X is the 'ybase' register */
1350 #define REG_OK_FOR_YBASE_P(X) \
1351 (REGNO(X) == REG_YBASE || (REGNO (X) >= FIRST_PSEUDO_REGISTER))
1352 #else
1354 /* Nonzero if X is a hard reg that can be used as an index. */
1355 #define REG_OK_FOR_INDEX_P(X) REGNO_OK_FOR_INDEX_P (REGNO (X))
1357 /* Nonzero if X is a hard reg that can be used as a base reg. */
1358 #define REG_OK_FOR_BASE_P(X) REGNO_OK_FOR_BASE_P (REGNO (X))
1360 /* Nonzero if X is the 'ybase' register */
1361 #define REG_OK_FOR_YBASE_P(X) REGNO_OK_FOR_YBASE_P (REGNO(X))
1363 #endif
1364 \f
1365 /* GO_IF_LEGITIMATE_ADDRESS recognizes an RTL expression
1366 that is a valid memory address for an instruction.
1367 The MODE argument is the machine mode for the MEM expression
1368 that wants to use this address.
1370 On the 1610, the actual legitimate addresses must be N (N must fit in
1371 5 bits), *rn (register indirect), *rn++, or *rn-- */
1373 #define INT_FITS_5_BITS(I) ((unsigned long) (I) < 0x20)
1374 #define INT_FITS_16_BITS(I) ((unsigned long) (I) < 0x10000)
1375 #define YBASE_CONST_OFFSET(I) ((I) >= -31 && (I) <= 0)
1376 #define YBASE_OFFSET(X) (GET_CODE (X) == CONST_INT && YBASE_CONST_OFFSET (INTVAL(X)))
1378 #define FITS_16_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_16_BITS(INTVAL(X)))
1379 #define FITS_5_BITS(X) (GET_CODE (X) == CONST_INT && INT_FITS_5_BITS(INTVAL(X)))
1380 #define ILLEGAL_HIMODE_ADDR(MODE, CONST) ((MODE) == HImode && CONST == -31)
1382 #define INDIRECTABLE_ADDRESS_P(X) \
1383 ((GET_CODE(X) == REG && REG_OK_FOR_BASE_P(X)) \
1384 || ((GET_CODE(X) == POST_DEC || GET_CODE(X) == POST_INC) \
1385 && REG_P(XEXP(X,0)) && REG_OK_FOR_BASE_P(XEXP(X,0))) \
1386 || (GET_CODE(X) == CONST_INT && (unsigned long) (X) < 0x20))
1389 #define INDEXABLE_ADDRESS_P(X,MODE) \
1390 ((GET_CODE(X) == PLUS && GET_CODE (XEXP (X,0)) == REG && \
1391 XEXP(X,0) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,1)) && \
1392 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,1)))) || \
1393 (GET_CODE(X) == PLUS && GET_CODE (XEXP (X,1)) == REG && \
1394 XEXP(X,1) == stack_pointer_rtx && YBASE_OFFSET(XEXP(X,0)) && \
1395 !ILLEGAL_HIMODE_ADDR(MODE, INTVAL(XEXP(X,0)))))
1397 #define GO_IF_LEGITIMATE_ADDRESS(MODE, X, ADDR) \
1398 { \
1399 if (INDIRECTABLE_ADDRESS_P(X)) \
1400 goto ADDR; \
1401 }
1403 \f
1404 /* Try machine-dependent ways of modifying an illegitimate address
1405 to be legitimate. If we find one, return the new, valid address.
1406 This macro is used in only one place: `memory_address' in explow.c.
1408 OLDX is the address as it was before break_out_memory_refs was called.
1409 In some cases it is useful to look at this to decide what needs to be done.
1411 MODE and WIN are passed so that this macro can use
1412 GO_IF_LEGITIMATE_ADDRESS.
1414 It is always safe for this macro to do nothing. It exists to recognize
1415 opportunities to optimize the output.
1417 For the 1610, we need not do anything. However, if we don't,
1418 `memory_address' will try lots of things to get a valid address, most of
1419 which will result in dead code and extra pseudos. So we make the address
1420 valid here.
1422 This is easy: The only valid addresses are an offset from a register
1423 and we know the address isn't valid. So just call either `force_operand'
1424 or `force_reg' unless this is a (plus (reg ...) (const_int 0)). */
1426 #define LEGITIMIZE_ADDRESS(X,OLDX,MODE,WIN) \
1427 { if (GET_CODE (X) == PLUS && XEXP (X, 1) == const0_rtx) \
1428 X = XEXP (x, 0); \
1429 if (GET_CODE (X) == MULT || GET_CODE (X) == PLUS) \
1430 X = force_operand (X, 0); \
1431 else \
1432 X = force_reg (Pmode, X); \
1433 goto WIN; \
1434 }
1436 /* Go to LABEL if ADDR (a legitimate address expression)
1437 has an effect that depends on the machine mode it is used for.
1438 On the 1610, only postdecrement and postincrement address depend thus
1439 (the amount of decrement or increment being the length of the operand). */
1441 #define GO_IF_MODE_DEPENDENT_ADDRESS(ADDR,LABEL) \
1442 if (GET_CODE (ADDR) == POST_INC || GET_CODE (ADDR) == POST_DEC) goto LABEL
1444 /* Nonzero if the constant value X is a legitimate general operand.
1445 It is given that X satisfies CONSTANT_P or is a CONST_DOUBLE. */
1446 #define LEGITIMATE_CONSTANT_P(X) (1)
1448 \f
1449 /* CONDITION CODE INFORMATION */
1451 /* Store in cc_status the expressions
1452 that the condition codes will describe
1453 after execution of an instruction whose pattern is EXP.
1454 Do not alter them if the instruction would not alter the cc's. */
1456 #define NOTICE_UPDATE_CC(EXP, INSN) \
1457 notice_update_cc( (EXP) )
1458 \f
1459 /* DESCRIBING RELATIVE COSTS OF OPERATIONS */
1461 /* Compute the cost of computing a constant rtl expression RTX
1462 whose rtx-code is CODE. The body of this macro is a portion
1463 of a switch statement. If the code is computed here,
1464 return it with a return statement. */
1465 #define CONST_COSTS(RTX,CODE,OUTER_CODE) \
1466 case CONST_INT: \
1467 return 0; \
1468 case LABEL_REF: \
1469 case SYMBOL_REF: \
1470 case CONST: \
1471 return COSTS_N_INSNS (1); \
1472 \
1473 case CONST_DOUBLE: \
1474 return COSTS_N_INSNS (2);
1476 /* Like CONST_COSTS but applies to nonconstant RTL expressions.
1477 This can be used, for example to indicate how costly a multiply
1478 instruction is. */
1479 #define RTX_COSTS(X,CODE,OUTER_CODE) \
1480 case MEM: \
1481 return GET_MODE (X) == QImode ? COSTS_N_INSNS (2) : \
1482 COSTS_N_INSNS (4); \
1483 case DIV: \
1484 case MOD: \
1485 return COSTS_N_INSNS (38); \
1486 case MULT: \
1487 if (GET_MODE (X) == QImode) \
1488 return COSTS_N_INSNS (2); \
1489 else \
1490 return COSTS_N_INSNS (38); \
1491 case PLUS: \
1492 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1493 { \
1494 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1495 { \
1496 int number = INTVAL(XEXP (X,1)); \
1497 if (number == 1) \
1498 return COSTS_N_INSNS (1); \
1499 if (INT_FITS_16_BITS(number)) \
1500 return COSTS_N_INSNS (2); \
1501 else \
1502 return COSTS_N_INSNS (4); \
1503 } \
1504 return COSTS_N_INSNS (1); \
1505 } \
1506 else \
1507 return COSTS_N_INSNS (38); \
1508 case MINUS: \
1509 if (GET_MODE_CLASS (GET_MODE (X)) == MODE_INT) \
1510 { \
1511 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1512 { \
1513 if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1514 return COSTS_N_INSNS (2); \
1515 else \
1516 return COSTS_N_INSNS (4); \
1517 } \
1518 return COSTS_N_INSNS (1); \
1519 } \
1520 else \
1521 return COSTS_N_INSNS (38); \
1522 case AND: case IOR: case XOR: \
1523 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1524 { \
1525 if (INT_FITS_16_BITS(INTVAL(XEXP(X,1)))) \
1526 return COSTS_N_INSNS (2); \
1527 else \
1528 return COSTS_N_INSNS (4); \
1529 } \
1530 return COSTS_N_INSNS (1); \
1531 case NEG: case NOT: \
1532 return COSTS_N_INSNS (1); \
1533 case ASHIFT: \
1534 case ASHIFTRT: \
1535 case LSHIFTRT: \
1536 if (GET_CODE (XEXP (X,1)) == CONST_INT) \
1537 { \
1538 int number = INTVAL(XEXP (X,1)); \
1539 if (number == 1 || number == 4 || number == 8 || \
1540 number == 16) \
1541 return COSTS_N_INSNS (1); \
1542 else \
1543 return COSTS_N_INSNS (2); \
1544 } \
1545 return COSTS_N_INSNS (1);
1547 /* An expression giving the cost of an addressing mode that contains
1548 address. */
1549 #define ADDRESS_COST(ADDR) dsp16xx_address_cost (ADDR)
1551 /* A c expression for the cost of moving data from a register in
1552 class FROM to one in class TO. The classes are expressed using
1553 the enumeration values such as GENERAL_REGS. A value of 2 is
1554 the default. */
1555 #define REGISTER_MOVE_COST(FROM,TO) dsp16xx_register_move_cost (FROM, TO)
1557 /* A C expression for the cost of moving data of mode MODE between
1558 a register and memory. A value of 2 is the default. */
1559 #define MEMORY_MOVE_COST(MODE) \
1560 (GET_MODE_CLASS(MODE) == MODE_INT && MODE == QImode ? 12 \
1561 : 16)
1563 /* A C expression for the cost of a branch instruction. A value of
1564 1 is the default; */
1565 #define BRANCH_COST 2
1566 \f
1568 /* Define this because otherwise gcc will try to put the function address
1569 in any old pseudo register. We can only use pt. */
1570 #define NO_FUNCTION_CSE
1572 /* Define this macro as a C expression which is nonzero if accessing less
1573 than a word of memory (i.e a char or short) is no faster than accessing
1574 a word of memory, i.e if such access require more than one instruction
1575 or if ther is no difference in cost between byte and (aligned) word
1576 loads. */
1577 #define SLOW_BYTE_ACCESS 1
1579 /* Define this macro if zero-extension (of a char or short to an int) can
1580 be done faster if the destination is a register that is know to be zero. */
1581 /* #define SLOW_ZERO_EXTEND */
1583 /* Define this macro if unaligned accesses have a cost many times greater than
1584 aligned accesses, for example if they are emulated in a trap handler */
1585 /* define SLOW_UNALIGNED_ACCESS */
1587 /* Define this macro to inhibit strength reduction of memory addresses */
1588 /* #define DONT_REDUCE_ADDR */
1590 \f
1591 /* DIVIDING THE OUTPUT IN SECTIONS */
1592 /* Output before read-only data. */
1595 #define TEXT_SECTION_ASM_OP rsect_text
1597 /* Output before constants and strings */
1599 #define READONLY_SECTION_ASM_OP rsect_const
1600 #define READONLY_DATA_SECTION const_section
1602 /* Output before writable data. */
1604 #define DATA_SECTION_ASM_OP rsect_data
1607 #define BSS_SECTION_ASM_OP rsect_bss
1609 /* We will default to using 1610 if the user doesn't
1610 specify it. */
1613 /* A list of names for sections other than the standard ones, which are
1614 'in_text' and 'in_data' (and .bss if BSS_SECTION_ASM_OP is defined). */
1615 #define EXTRA_SECTIONS in_const
1617 #define EXTRA_SECTION_FUNCTIONS \
1618 void \
1619 const_section () \
1620 { \
1621 if (in_section != in_const) \
1622 { \
1624 in_section = in_const; \
1625 } \
1626 }
1627 \f
1628 /* THE OVERALL FRAMEWORK OF AN ASSEMBLER FILE */
1630 /* Output at beginning of assembler file. */
1631 #define ASM_FILE_START(FILE) dsp16xx_file_start ()
1633 /* Prevent output of .gcc_compiled */
1634 #define ASM_IDENTIFY_GCC(FILE)
1636 /* A C string constant describing how to begin a comment in the target
1637 assembler language. */
1638 /* define ASM_COMMENT_START */
1640 /* Output to assembler file text saying following lines
1641 may contain character constants, extra white space, comments, etc. */
1644 /* Output to assembler file text saying following lines
1645 no longer contain unusual constructs. */
1647 \f
1648 /* OUTPUT OF DATA */
1650 /* This is how to output an assembler line defining a `double' constant. */
1651 #define ASM_OUTPUT_DOUBLE(FILE,VALUE) asm_output_float (FILE,VALUE)
1653 /* This is how to output an assembler line defining a `float' constant. */
1654 #define ASM_OUTPUT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1656 /* This is how to output an assembler line defining a 'float' constant of
1657 size HFmode. */
1658 #define ASM_OUTPUT_SHORT_FLOAT(FILE,VALUE) asm_output_float (FILE, VALUE)
1660 /* This is how to output an assembler line defining an `char' constant. */
1661 #define ASM_OUTPUT_CHAR(FILE,VALUE) \
1663 output_addr_const (FILE, (VALUE)), \
1666 /* This is how to output an assembler line defining an `short' constant. */
1667 #define ASM_OUTPUT_SHORT(FILE,EXP) asm_output_long(FILE,INTVAL(EXP))
1669 /* This is how to output an assembler line defining a 'int' constant. */
1670 #define ASM_OUTPUT_INT(FILE, EXP) asm_output_long(FILE,INTVAL(EXP))
1672 /* This is how to output an assembler line for a numeric constant byte. */
1673 #define ASM_OUTPUT_BYTE(FILE,VALUE) \
1677 /* This is how we output a 'c' character string. For the 16xx
1678 assembler we have to do it one letter at a time */
1680 #define ASCII_LENGTH 10
1682 #define ASM_OUTPUT_ASCII(MYFILE, MYSTRING, MYLENGTH) \
1683 do { \
1684 FILE *_hide_asm_out_file = (MYFILE); \
1685 unsigned char *_hide_p = (unsigned char *) (MYSTRING); \
1686 int _hide_thissize = (MYLENGTH); \
1687 { \
1688 FILE *asm_out_file = _hide_asm_out_file; \
1689 unsigned char *p = _hide_p; \
1690 int thissize = _hide_thissize; \
1691 int i; \
1692 \
1693 for (i = 0; i < thissize; i++) \
1694 { \
1695 register int c = p[i]; \
1696 \
1697 if (i % ASCII_LENGTH == 0) \
1699 \
1701 { \
1703 putc (c, asm_out_file); \
1705 } \
1706 else \
1707 { \
1709 /* After an octal-escape, if a digit follows, \
1710 terminate one string constant and start another. \
1711 The Vax assembler fails to stop reading the escape \
1712 after three digits, so this is the only way we \
1713 can get it to parse the data properly. \
1714 if (i < thissize - 1 \
1715 && p[i + 1] >= '0' && p[i + 1] <= '9') \
1716 fprintf (asm_out_file, "\'\n\tint \'"); \
1718 } \
1719 /* if: \
1720 we are not at the last char (i != thissize -1) \
1721 and (we are not at a line break multiple \
1722 but i == 0) (it will be the very first time) \
1723 then put out a comma to extend. \
1725 if ((i != thissize - 1) && ((i + 1) % ASCII_LENGTH)) \
1727 if (!((i + 1) % ASCII_LENGTH)) \
1729 } \
1731 } \
1732 } \
1733 while (0)
1735 /* Store in OUTPUT a string (made with alloca) containing
1736 an assembler-name for a local static variable or function
1737 named NAME. LABELNO is an integer which is different for
1738 each call. */
1740 #define ASM_FORMAT_PRIVATE_NAME(OUTPUT, NAME, LABELNO) \
1741 do { \
1742 int len = strlen (NAME); \
1743 char *temp = (char *) alloca (len + 3); \
1745 strcpy (&temp[1], (NAME)); \
1747 temp[len + 2] = 0; \
1748 (OUTPUT) = (char *) alloca (strlen (NAME) + 11); \
1749 ASM_GENERATE_INTERNAL_LABEL (OUTPUT, temp, LABELNO); \
1750 } while (0)
1755 \f
1756 /* OUTPUT OF UNINITIALIZED VARIABLES */
1758 /* This says how to output an assembler line
1759 to define a global common symbol. */
1761 #define ASM_OUTPUT_COMMON(FILE, NAME, SIZE, ROUNDED) \
1762 asm_output_common (FILE, NAME, SIZE, ROUNDED);
1764 /* This says how to output an assembler line
1765 to define a local common symbol. */
1767 #define ASM_OUTPUT_LOCAL(FILE, NAME, SIZE, ROUNDED) \
1768 asm_output_local (FILE, NAME, SIZE, ROUNDED);
1769 \f
1770 /* OUTPUT AND GENERATION OF LABELS */
1772 /* This is how to output the definition of a user-level label named NAME,
1773 such as the label on a static function or variable NAME. */
1774 #define ASM_OUTPUT_LABEL(FILE,NAME) \
1777 /* This is how to output a command to make the user-level label named NAME
1778 defined for reference from other files. */
1780 #define ASM_GLOBALIZE_LABEL(FILE,NAME) \
1783 /* A C statement to output to the stdio stream any text necessary
1784 for declaring the name of an external symbol named name which
1785 is referenced in this compilation but not defined. */
1787 #define ASM_OUTPUT_EXTERNAL(FILE, DECL, NAME) \
1788 { \
1790 assemble_name (FILE, NAME); \
1792 }
1793 /* A C statement to output on stream an assembler pseudo-op to
1794 declare a library function named external. */
1796 #define ASM_OUTPUT_EXTERNAL_LIBCALL(FILE, FUN) \
1797 { \
1799 assemble_name (FILE, XSTR (FUN, 0)); \
1801 }
1803 /* The prefix to add to user-visible assembler symbols. */
1807 /* This is how to output an internal numbered label where
1808 PREFIX is the class of label and NUM is the number within the class. */
1809 #define ASM_OUTPUT_INTERNAL_LABEL(FILE,PREFIX,NUM) \
1812 /* This is how to store into the string LABEL
1813 the symbol_ref name of an internal numbered label where
1814 PREFIX is the class of label and NUM is the number within the class.
1815 This is suitable for output with `assemble_name'. */
1816 #define ASM_GENERATE_INTERNAL_LABEL(LABEL,PREFIX,NUM) \
1819 \f
1820 /* OUTPUT OF ASSEMBLER INSTRUCTIONS */
1822 /* How to refer to registers in assembler output.
1823 This sequence is indexed by compiler's hard-register-number (see above). */
1825 #define REGISTER_NAMES \
1837 #define HIMODE_REGISTER_NAMES \
1849 #define PRINT_OPERAND_PUNCT_VALID_P(CODE) 0
1851 /* Print operand X (an rtx) in assembler syntax to file FILE.
1852 CODE is a letter or dot (`z' in `%z0') or 0 if no letter was specified.
1853 For `%' followed by punctuation, CODE is the punctuation and X is null.
1855 DSP1610 extensions for operand codes:
1857 %H - print lower 16 bits of constant
1858 %U - print upper 16 bits of constant
1859 %w - print low half of register (e.g 'a0l')
1860 %u - print upper half of register (e.g 'a0')
1861 %b - print high half of accumulator for F3 ALU instructions
1862 %h - print constant in decimal */
1864 #define PRINT_OPERAND(FILE, X, CODE) print_operand(FILE, X, CODE)
1867 /* Print a memory address as an operand to reference that memory location. */
1869 #define PRINT_OPERAND_ADDRESS(FILE, ADDR) print_operand_address (FILE, ADDR)
1871 /* This is how to output an insn to push a register on the stack.
1872 It need not be very fast code since it is used only for profiling */
1875 /* This is how to output an insn to pop a register from the stack.
1876 It need not be very fast code since it is used only for profiling */
1878 \f
1879 /* OUTPUT OF DISPATCH TABLES */
1881 /* This macro should be provided on machines where the addresses in a dispatch
1882 table are relative to the table's own address. */
1883 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, VALUE, REL) \
1886 /* This macro should be provided on machines where the addresses in a dispatch
1887 table are absolute. */
1888 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
1891 /* ASSEMBLER COMMANDS FOR ALIGNMENT */
1893 /* This is how to output an assembler line that says to advance
1894 the location counter to a multiple of 2**LOG bytes. We should
1895 not have to do any alignment since the 1610 is a word machine. */
1896 #define ASM_OUTPUT_ALIGN(FILE,LOG)
1898 /* Define this macro if ASM_OUTPUT_SKIP should not be used in the text section
1899 because it fails to put zero1 in the bytes that are skipped. */
1900 #define ASM_NO_SKIP_IN_TEXT 1
1902 #define ASM_OUTPUT_SKIP(FILE,SIZE) \
1905 /* CONTROLLING DEBUGGING INFORMATION FORMAT */
1907 /* Define this macro if GCC should produce COFF-style debugging output
1908 for SDB in response to the '-g' option */
1909 #define SDB_DEBUGGING_INFO
1911 /* Support generating stabs for the listing file generator */
1912 #define DBX_DEBUGGING_INFO
1914 /* The default format when -g is given is still COFF debug info */
1915 #define PREFERRED_DEBUGGING_TYPE SDB_DEBUG
1917 #define DBX_REGISTER_NUMBER(REGNO) (REGNO)
1918 \f
1919 /* MISCELLANEOUS PARAMETERS */
1921 /* Specify the machine mode that this machine uses
1922 for the index in the tablejump instruction. */
1923 #define CASE_VECTOR_MODE QImode
1925 /* Define as C expression which evaluates to nonzero if the tablejump
1926 instruction expects the table to contain offsets from the address of the
1927 table.
1928 Do not define this if the table should contain absolute addresses. */
1929 /* #define CASE_VECTOR_PC_RELATIVE 1 */
1931 /* Specify the tree operation to be used to convert reals to integers. */
1932 #define IMPLICIT_FIX_EXPR FIX_ROUND_EXPR
1934 /* This is the kind of divide that is easiest to do in the general case. */
1935 #define EASY_DIV_EXPR TRUNC_DIV_EXPR
1937 /* Max number of bytes we can move from memory to memory
1938 in one reasonably fast instruction. */
1939 #define MOVE_MAX 1
1941 /* Defining this macro causes the compiler to omit a sign-extend, zero-extend,
1942 or bitwise 'and' instruction that truncates the count of a shift operation
1943 to a width equal to the number of bits needed to represent the size of the
1944 object being shifted. Do not define this macro unless the truncation applies
1945 to both shift operations and bit-field operations (if any). */
1946 /* #define SHIFT_COUNT_TRUNCATED */
1948 /* Value is 1 if truncating an integer of INPREC bits to OUTPREC bits
1949 is done just by pretending it is already truncated. */
1950 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC) 1
1952 /* When a prototype says `char' or `short', really pass an `int'. */
1953 #define PROMOTE_PROTOTYPES
1955 /* An alias for the machine mode used for pointers */
1956 #define Pmode QImode
1958 /* A function address in a call instruction
1959 is a byte address (for indexing purposes)
1960 so give the MEM rtx a byte's mode. */
1961 #define FUNCTION_MODE QImode
1963 #if !defined(__DATE__)
1965 #else
1967 #endif
1972 /* Define this as 1 if `char' should by default be signed; else as 0. */
1973 #define DEFAULT_SIGNED_CHAR 1
1975 /* If this macro is defined, GNU CC gathers statistics about the number and
1976 kind of tree node it allocates during each run. The option '-fstats' will
1977 tell the compiler to print these statistics about the sizes of it obstacks. */
1978 #define GATHER_STATISTICS
1980 /* Define this so gcc does not output a call to __main, since we
1981 are not currently supporting c++. */
1982 #define INIT_SECTION_ASM_OP 1