1 ;; GCC assembler includefile for AS1750
4 ;; EFLR.M #d,#s Load the three regs starting at R#s to R#d following.
5 ;; RET.M #fs Return from function (uses the framesize #fs)
10 ; Return from function ; parameter: framesize
23 ; Useful instructions missing from the 1750A standard:
25 ; Extended Float Load from Registers
26 MACRO EFLR.M ; args : #1=dest-regno, #2=source-regno
29 IF `1` >= `2` || `1`+2 < `2`
35 DLR R`1`,R`1` ; Just to update condition codes
39 ; The following leave the condition codes haywire. But that is
40 ; accounted for (see notice_update_cc in config/1750a.c.)
42 ; Double ANd Register with Register
50 ; Double OR Register with Register
58 ; Double eXoR Register with Register
66 ; Double Nand Register with register
74 ; Unsigned Compare Immediate
90 ; Unsigned Compare Register with register
93 PSHM R10,R13 ; R12 and R13 are assumed not to be input parameters
103 ; Unsigned Compare register with memory
116 ; Double Unsigned Compare Register with register
119 PSHM R13,R14 ; R13 and R14 are assumed not to be input parameters
139 ; Double Unsigned Compare register with memory
142 PSHM R13,R14 ; R13 and R14 are assumed not to be input parameters
149 BNE +10 ; done, go pop the saved regs
150 DL R13,`2` ; interested in the *low* word (R14)