1 2024-01-08 Ilya Leoshkevich <iii@linux.ibm.com>
4 * varasm.cc (assemble_function_label_raw): Do not call
5 asan_function_start () without the current function.
7 2024-01-08 Cupertino Miranda <cupertino.miranda@oracle.com>
10 * btfout.cc (btf_collect_datasec): Skip creating BTF info for
11 extern and kernel_helper attributed function decls.
13 2024-01-08 Cupertino Miranda <cupertino.miranda@oracle.com>
15 * btfout.cc (output_btf_strs): Changed.
17 2024-01-08 Tobias Burnus <tobias@codesourcery.com>
19 * config/gcn/mkoffload.cc (main): Handle gfx1100
20 when setting the default XNACK.
22 2024-01-08 Tobias Burnus <tobias@codesourcery.com>
24 * config.gcc (amdgcn-*-amdhsa): Accept --with-arch=gfx1100.
25 * config/gcn/gcn-hsa.h (NO_XNACK): Add gfx1100:
26 (ASM_SPEC): Handle gfx1100.
27 * config/gcn/gcn-opts.h (enum processor_type): Add PROCESSOR_GFX1100.
28 (enum gcn_isa): Add ISA_RDNA3.
29 (TARGET_GFX1100, TARGET_RDNA2_PLUS, TARGET_RDNA3): Define.
30 * config/gcn/gcn-valu.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
31 * config/gcn/gcn.cc (gcn_option_override,
32 gcn_omp_device_kind_arch_isa, output_file_start): Handle gfx1100.
33 (gcn_global_address_p, gcn_addr_space_legitimate_address_p): Change
34 TARGET_RDNA2 to TARGET_RDNA2_PLUS.
35 (gcn_hsa_declare_function_name): Don't use '.amdhsa_reserve_flat_scratch'
37 * config/gcn/gcn.h (ASSEMBLER_DIALECT): Likewise.
38 (TARGET_CPU_CPP_BUILTINS): Define __RDNA3__, __gfx1030__ and
40 * config/gcn/gcn.md: Change TARGET_RDNA2 to TARGET_RDNA2_PLUS.
41 * config/gcn/gcn.opt (Enum gpu_type): Add gfx1100.
42 * config/gcn/mkoffload.cc (EF_AMDGPU_MACH_AMDGCN_GFX1100): Define.
43 (isa_has_combined_avgprs, main): Handle gfx1100.
44 * config/gcn/t-omp-device (isa): Add gfx1100.
46 2024-01-08 Richard Biener <rguenther@suse.de>
48 * doc/invoke.texi (-mmovbe): Clarify.
50 2024-01-08 Richard Biener <rguenther@suse.de>
52 PR tree-optimization/113026
53 * tree-vect-loop.cc (vect_need_peeling_or_partial_vectors_p):
54 Avoid an epilog in more cases.
55 * tree-vect-loop-manip.cc (vect_do_peeling): Adjust the
56 epilogues niter upper bounds and estimates.
58 2024-01-08 Jakub Jelinek <jakub@redhat.com>
60 PR tree-optimization/113228
61 * gimplify.cc (recalculate_side_effects): Do nothing for SSA_NAMEs.
63 2024-01-08 Jakub Jelinek <jakub@redhat.com>
65 PR tree-optimization/113120
66 * gimple-lower-bitint.cc (gimple_lower_bitint): Fix handling of very
67 large _BitInt zero INTEGER_CST PHI argument.
69 2024-01-08 Jakub Jelinek <jakub@redhat.com>
71 PR tree-optimization/113119
72 * gimple-lower-bitint.cc (optimizable_arith_overflow): Punt if
73 both REALPART_EXPR and cast from IMAGPART_EXPR appear, but cast
74 is before REALPART_EXPR.
76 2024-01-08 Georg-Johann Lay <avr@gjlay.de>
79 * config/avr/avr.cc (avr_handle_addr_attribute): Also print valid
80 range when diagnosing attribute "io" and "io_low" are out of range.
81 (avr_eval_addr_attrib): Don't ICE on empty address at that place.
82 (avr_insert_attributes): Reject if attribute "address", "io" or "io_low"
83 in contexts other than static storage.
84 (avr_asm_output_aligned_decl_common): Move output of decls with
85 attribute "address", "io", and "io_low" to...
86 (avr_output_addr_attrib): ...this new function.
87 (avr_asm_asm_output_aligned_bss): Remove output for decls with
88 attribute "address", "io", and "io_low".
89 (avr_encode_section_info): Rectify handling of decls with attribute
90 "address", "io", and "io_low".
92 2024-01-08 Andrew Stubbs <ams@codesourcery.com>
94 * config/gcn/mkoffload.cc (TEST_XNACK_UNSET): New.
95 (elf_flags): Remove XNACK from the default value.
96 (main): Set a default XNACK according to the arch.
98 2024-01-08 Andrew Stubbs <ams@codesourcery.com>
100 * config/gcn/mkoffload.cc (isa_has_combined_avgprs): Delete.
101 (process_asm): Don't count avgprs.
103 2024-01-08 Hongyu Wang <hongyu.wang@intel.com>
105 * config/i386/i386.opt: Add supported sub-features.
106 * doc/extend.texi: Add description for target attribute.
108 2024-01-08 Feng Wang <wangfeng@eswincomputing.com>
110 * config/riscv/vector.md: Modify avl_type operand index of zvbc ins.
112 2024-01-07 Roger Sayle <roger@nextmovesoftware.com>
113 Uros Bizjak <ubizjak@gmail.com>
116 * config/i386/i386-features.cc (compute_convert_gain): Include
117 the overhead of explicit load and store (movd) instructions when
118 converting non-store scalar operations with memory destinations.
119 Various indentation whitespace fixes.
121 2024-01-07 Tamar Christina <tamar.christina@arm.com>
123 * config/arm/neon.md (cbranch<mode>4): New.
125 2024-01-07 Juzhe-Zhong <juzhe.zhong@rivai.ai>
127 * config/riscv/riscv-vsetvl.cc: replace std::max by MAX.
129 2024-01-06 Jiahao Xu <xujiahao@loongson.cn>
131 * config/loongarch/lasx.md: Set the unused bits in operand[3] to 0.
133 2024-01-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
136 * config/riscv/riscv-vsetvl.cc (pre_vsetvl::fuse_local_vsetvl_info):
139 2024-01-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
141 * config/riscv/riscv-vector-costs.cc (loop_invariant_op_p): New function.
142 (variable_vectorized_p): Teach loop invariant.
143 (has_unexpected_spills_p): Ditto.
145 2024-01-06 Juzhe-Zhong <juzhe.zhong@rivai.ai>
147 * config/riscv/riscv-protos.h (whole_reg_to_reg_move_p): New function.
148 * config/riscv/riscv-v.cc (whole_reg_to_reg_move_p): Ditto.
149 * config/riscv/vector.md: Allow non-vlmax with len = NUNITS simplification.
151 2024-01-05 Richard Sandiford <richard.sandiford@arm.com>
154 * doc/invoke.texi (aarch64-sve-compare-costs): Replace with...
155 (aarch64-vect-compare-costs): ...this.
156 * config/aarch64/aarch64.opt (-param=aarch64-sve-compare-costs=):
158 (-param=aarch64-vect-compare-costs=): ...this new param.
159 * config/aarch64/aarch64.cc (aarch64_override_options_internal):
160 Don't disable it when vectorizing for Advanced SIMD only.
161 (aarch64_autovectorize_vector_modes): Apply VECT_COMPARE_COSTS
162 whenever aarch64_vect_compare_costs is true.
164 2024-01-05 Lulu Cheng <chenglulu@loongson.cn>
166 * config/loongarch/lasx.md (lasx_mxld_<lasxfmt_f>):
167 Modify the method of determining the memory offset of [x]vld/[x]vst.
168 (lasx_mxst_<lasxfmt_f>): Likewise.
169 * config/loongarch/loongarch.cc (loongarch_valid_offset_p): Delete.
170 (loongarch_address_insns): Likewise.
171 * config/loongarch/lsx.md (lsx_ld_<lsxfmt_f>): Likewise.
172 (lsx_st_<lsxfmt_f>): Likewise.
173 * config/loongarch/predicates.md (aq10b_operand): Likewise.
174 (aq10h_operand): Likewise.
175 (aq10w_operand): Likewise.
176 (aq10d_operand): Likewise.
178 2024-01-05 Alex Coplan <alex.coplan@arm.com>
181 * config/aarch64/aarch64-ldp-fusion.cc
182 (ldp_bb_info::try_fuse_pair): If the second access can throw,
183 narrow the move range to exactly that insn.
185 2024-01-05 Ilya Leoshkevich <iii@linux.ibm.com>
187 * asan.cc (asan_function_start): Drop switch_to_section ().
188 (asan_emit_stack_protection): Set .LASANPC alignment.
189 * config/i386/i386.cc: Use assemble_function_label_raw ()
190 instead of ASM_OUTPUT_LABEL ().
191 * config/s390/s390.cc (s390_asm_output_function_label):
193 * defaults.h (ASM_OUTPUT_FUNCTION_LABEL): Likewise.
194 * final.cc (final_start_function_1): Drop
195 asan_function_start ().
196 * output.h (assemble_function_label_raw): New function.
197 * varasm.cc (assemble_function_label_raw): Likewise.
199 2024-01-05 Ilya Leoshkevich <iii@linux.ibm.com>
201 * config/aarch64/aarch64.cc (aarch64_declare_function_name):
202 Use ASM_OUTPUT_FUNCTION_LABEL ().
203 * config/alpha/alpha.cc (alpha_start_function): Likewise.
204 * config/arm/aout.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
205 * config/arm/arm.cc (arm_asm_declare_function_name): Likewise.
206 * config/bfin/bfin.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
207 * config/c6x/c6x.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
208 * config/gcn/gcn.cc (gcn_hsa_declare_function_name): Likewise.
209 * config/h8300/h8300.h (ASM_DECLARE_FUNCTION_NAME): Likewise.
210 * config/ia64/ia64.cc (ia64_start_function): Likewise.
211 * config/mcore/mcore-elf.h (ASM_DECLARE_FUNCTION_NAME):
213 * config/microblaze/microblaze.cc (microblaze_function_prologue):
215 * config/mips/mips.cc (mips_start_unique_function): Return the
217 (mips_start_function_definition): Use
218 ASM_OUTPUT_FUNCTION_LABEL ().
219 (mips_finish_stub): Pass the tree to
220 mips_start_function_definition ().
221 (mips16_build_function_stub): Likewise.
222 (mips16_build_call_stub): Likewise.
223 (mips_output_function_prologue): Likewise.
224 * config/pa/pa.cc (pa_output_function_label): Use
225 ASM_OUTPUT_FUNCTION_LABEL ().
226 * config/riscv/riscv.cc (riscv_declare_function_name): Likewise.
227 * config/rs6000/rs6000.cc (rs6000_elf_declare_function_name):
229 (rs6000_xcoff_declare_function_name): Likewise.
231 2024-01-05 Jakub Jelinek <jakub@redhat.com>
233 PR tree-optimization/113201
234 * tree-scalar-evolution.cc (final_value_replacement_loop): Don't call
235 replace_uses_by on SSA_NAME_OCCURS_IN_ABNORMAL_PHI rslt.
237 2024-01-05 Jakub Jelinek <jakub@redhat.com>
239 PR tree-optimization/90693
240 * tree-ssa-math-opts.cc (match_single_bit_test): If
241 tree_expr_nonzero_p (arg), remember it in the second argument to
242 IFN_POPCOUNT or lower it as arg & (arg - 1) == 0 rather than
243 arg ^ (arg - 1) > arg - 1.
244 * internal-fn.cc (expand_POPCOUNT): If second argument to
245 IFN_POPCOUNT suggests arg is non-zero, try to expand it as
246 arg & (arg - 1) == 0 rather than arg ^ (arg - 1) > arg - 1.
248 2024-01-05 Kito Cheng <kito.cheng@sifive.com>
250 * config/riscv/riscv-v.cc (expand_load_store):
252 (expand_cond_len_op): Ditto.
253 (expand_gather_scatter): Ditto.
254 (expand_lanes_load_store): Ditto.
255 (expand_fold_extract_last): Ditto.
257 2024-01-05 Pan Li <pan2.li@intel.com>
260 2024-01-05 Feng Wang <wangfeng@eswincomputing.com>
262 * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
263 Add new function_base for crypto vector.
264 (class bitmanip): Ditto.
265 (class b_reverse):Ditto.
266 (class vwsll): Ditto.
267 (class clmul): Ditto.
268 (class vg_nhab): Ditto.
269 (class crypto_vv):Ditto.
270 (class crypto_vi):Ditto.
271 (class vaeskf2_vsm3c):Ditto.
272 (class vsm3me): Ditto.
273 (BASE): Add BASE declaration for crypto vector.
274 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
275 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
276 Add crypto vector intrinsic definition.
304 * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
305 Add new function_shape for crypto vector.
306 (struct crypto_vi_def): Ditto.
307 (struct crypto_vv_no_op_type_def): Ditto.
308 (SHAPE): Add SHAPE declaration of crypto vector.
309 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
310 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
311 Add new data type for crypto vector.
312 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
313 (vuint32mf2_t): Ditto.
314 (vuint32m1_t): Ditto.
315 (vuint32m2_t): Ditto.
316 (vuint32m4_t): Ditto.
317 (vuint32m8_t): Ditto.
318 (vuint64m1_t): Ditto.
319 (vuint64m2_t): Ditto.
320 (vuint64m4_t): Ditto.
321 (vuint64m8_t): Ditto.
322 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
323 Add new data struct for crypto vector.
324 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
325 (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
326 * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
328 2024-01-05 Feng Wang <wangfeng@eswincomputing.com>
330 * config/riscv/riscv-vector-builtins-bases.cc (class vandn):
331 Add new function_base for crypto vector.
332 (class bitmanip): Ditto.
333 (class b_reverse):Ditto.
334 (class vwsll): Ditto.
335 (class clmul): Ditto.
336 (class vg_nhab): Ditto.
337 (class crypto_vv):Ditto.
338 (class crypto_vi):Ditto.
339 (class vaeskf2_vsm3c):Ditto.
340 (class vsm3me): Ditto.
341 (BASE): Add BASE declaration for crypto vector.
342 * config/riscv/riscv-vector-builtins-bases.h: Ditto.
343 * config/riscv/riscv-vector-builtins-functions.def (REQUIRED_EXTENSIONS):
344 Add crypto vector intrinsic definition.
372 * config/riscv/riscv-vector-builtins-shapes.cc (struct crypto_vv_def):
373 Add new function_shape for crypto vector.
374 (struct crypto_vi_def): Ditto.
375 (struct crypto_vv_no_op_type_def): Ditto.
376 (SHAPE): Add SHAPE declaration of crypto vector.
377 * config/riscv/riscv-vector-builtins-shapes.h: Ditto.
378 * config/riscv/riscv-vector-builtins-types.def (DEF_RVV_CRYPTO_SEW32_OPS):
379 Add new data type for crypto vector.
380 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
381 (vuint32mf2_t): Ditto.
382 (vuint32m1_t): Ditto.
383 (vuint32m2_t): Ditto.
384 (vuint32m4_t): Ditto.
385 (vuint32m8_t): Ditto.
386 (vuint64m1_t): Ditto.
387 (vuint64m2_t): Ditto.
388 (vuint64m4_t): Ditto.
389 (vuint64m8_t): Ditto.
390 * config/riscv/riscv-vector-builtins.cc (DEF_RVV_CRYPTO_SEW32_OPS):
391 Add new data struct for crypto vector.
392 (DEF_RVV_CRYPTO_SEW64_OPS): Ditto.
393 (registered_function::overloaded_hash): Processing size_t uimm for C overloaded func.
394 * config/riscv/riscv-vector-builtins.def (vi): Add vi OP_TYPE.
396 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
398 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
400 2024-01-04 Andrew Pinski <quic_apinski@quicinc.com>
402 PR tree-optimization/113186
403 * gimple-match-head.cc (gimple_bitwise_inverted_equal_p):
404 Match `^` with the `==` for 1bit integral types.
405 * match.pd (maybe_cmp): Allow for bit_xor for 1bit
408 2024-01-04 David Malcolm <dmalcolm@redhat.com>
410 * toplev.cc (general_init): Pass lang_mask to urlifier.
412 2024-01-04 David Malcolm <dmalcolm@redhat.com>
414 * diagnostic.h (diagnostic_make_option_url_cb): Add lang_mask
416 (diagnostic_context::make_option_url): Update for lang_mask param.
417 * gcc-urlifier.cc: Include "opts.h" and "options.h".
418 (gcc_urlifier::gcc_urlifier): Add lang_mask param.
419 (gcc_urlifier::m_lang_mask): New field.
420 (doc_urls): Make static.
421 (gcc_urlifier::get_url_for_quoted_text): Use label_text.
422 (gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
423 Look for an option by name before trying a binary search in
425 (gcc_urlifier::get_url_suffix_for_quoted_text): Use label_text.
426 (gcc_urlifier::get_url_suffix_for_option): New.
427 (make_gcc_urlifier): Add lang_mask param.
428 (selftest::gcc_urlifier_cc_tests): Update for above changes.
429 Verify that a URL is found for "-fpack-struct".
430 * gcc-urlifier.def: Drop options "--version" and "-fpack-struct".
431 * gcc-urlifier.h (make_gcc_urlifier): Add lang_mask param.
432 * gcc.cc (driver::global_initializations): Pass 0 for lang_mask
433 to make_gcc_urlifier.
434 * opts-diagnostic.h (get_option_url): Add lang_mask param.
435 * opts.cc (get_option_html_page): Remove special-casing for
437 (get_option_url_suffix): New.
438 (get_option_url): Reimplement.
439 (selftest::test_get_option_html_page): Rename to...
440 (selftest::test_get_option_url_suffix): ...this and update for
442 (selftest::opts_cc_tests): Update for renaming.
443 * opts.h: Include "rich-location.h".
444 (get_option_url_suffix): New decl.
446 2024-01-04 David Malcolm <dmalcolm@redhat.com>
448 * Makefile.in (ALL_OPT_URL_FILES): New.
449 (GCC_OBJS): Add options-urls.o.
451 (OBJS-libcommon): Likewise.
452 (s-options): Depend on $(ALL_OPT_URL_FILES), and add this to
453 inputs to opt-gather.awk.
454 (options-urls.cc): New Makefile target.
455 * opt-functions.awk (url_suffix): New function.
456 (lang_url_suffix): New function.
457 * options-urls-cc-gen.awk: New file.
458 * opts.h (get_opt_url_suffix): New decl.
460 2024-01-04 David Malcolm <dmalcolm@redhat.com>
462 * params.opt.urls: New file, autogenerated by
463 regenerate-opt-urls.py.
465 2024-01-04 David Malcolm <dmalcolm@redhat.com>
467 * common.opt.urls: New file, autogenerated by
468 regenerate-opt-urls.py.
469 * config/aarch64/aarch64.opt.urls: Likewise.
470 * config/alpha/alpha.opt.urls: Likewise.
471 * config/alpha/elf.opt.urls: Likewise.
472 * config/arc/arc-tables.opt.urls: Likewise.
473 * config/arc/arc.opt.urls: Likewise.
474 * config/arm/arm-tables.opt.urls: Likewise.
475 * config/arm/arm.opt.urls: Likewise.
476 * config/arm/vxworks.opt.urls: Likewise.
477 * config/avr/avr.opt.urls: Likewise.
478 * config/bpf/bpf.opt.urls: Likewise.
479 * config/c6x/c6x-tables.opt.urls: Likewise.
480 * config/c6x/c6x.opt.urls: Likewise.
481 * config/cris/cris.opt.urls: Likewise.
482 * config/cris/elf.opt.urls: Likewise.
483 * config/csky/csky.opt.urls: Likewise.
484 * config/csky/csky_tables.opt.urls: Likewise.
485 * config/darwin.opt.urls: Likewise.
486 * config/dragonfly.opt.urls: Likewise.
487 * config/epiphany/epiphany.opt.urls: Likewise.
488 * config/fr30/fr30.opt.urls: Likewise.
489 * config/freebsd.opt.urls: Likewise.
490 * config/frv/frv.opt.urls: Likewise.
491 * config/ft32/ft32.opt.urls: Likewise.
492 * config/fused-madd.opt.urls: Likewise.
493 * config/g.opt.urls: Likewise.
494 * config/gcn/gcn.opt.urls: Likewise.
495 * config/gnu-user.opt.urls: Likewise.
496 * config/h8300/h8300.opt.urls: Likewise.
497 * config/hpux11.opt.urls: Likewise.
498 * config/i386/cygming.opt.urls: Likewise.
499 * config/i386/cygwin.opt.urls: Likewise.
500 * config/i386/djgpp.opt.urls: Likewise.
501 * config/i386/i386.opt.urls: Likewise.
502 * config/i386/mingw-w64.opt.urls: Likewise.
503 * config/i386/mingw.opt.urls: Likewise.
504 * config/i386/nto.opt.urls: Likewise.
505 * config/ia64/ia64.opt.urls: Likewise.
506 * config/ia64/ilp32.opt.urls: Likewise.
507 * config/ia64/vms.opt.urls: Likewise.
508 * config/iq2000/iq2000.opt.urls: Likewise.
509 * config/linux-android.opt.urls: Likewise.
510 * config/linux.opt.urls: Likewise.
511 * config/lm32/lm32.opt.urls: Likewise.
512 * config/loongarch/loongarch.opt.urls: Likewise.
513 * config/lynx.opt.urls: Likewise.
514 * config/m32c/m32c.opt.urls: Likewise.
515 * config/m32r/m32r.opt.urls: Likewise.
516 * config/m68k/ieee.opt.urls: Likewise.
517 * config/m68k/m68k-tables.opt.urls: Likewise.
518 * config/m68k/m68k.opt.urls: Likewise.
519 * config/m68k/uclinux.opt.urls: Likewise.
520 * config/mcore/mcore.opt.urls: Likewise.
521 * config/microblaze/microblaze.opt.urls: Likewise.
522 * config/mips/mips-tables.opt.urls: Likewise.
523 * config/mips/mips.opt.urls: Likewise.
524 * config/mips/sde.opt.urls: Likewise.
525 * config/mmix/mmix.opt.urls: Likewise.
526 * config/mn10300/mn10300.opt.urls: Likewise.
527 * config/moxie/moxie.opt.urls: Likewise.
528 * config/msp430/msp430.opt.urls: Likewise.
529 * config/nds32/nds32-elf.opt.urls: Likewise.
530 * config/nds32/nds32-linux.opt.urls: Likewise.
531 * config/nds32/nds32.opt.urls: Likewise.
532 * config/netbsd-elf.opt.urls: Likewise.
533 * config/netbsd.opt.urls: Likewise.
534 * config/nios2/elf.opt.urls: Likewise.
535 * config/nios2/nios2.opt.urls: Likewise.
536 * config/nvptx/nvptx-gen.opt.urls: Likewise.
537 * config/nvptx/nvptx.opt.urls: Likewise.
538 * config/openbsd.opt.urls: Likewise.
539 * config/or1k/elf.opt.urls: Likewise.
540 * config/or1k/or1k.opt.urls: Likewise.
541 * config/pa/pa-hpux.opt.urls: Likewise.
542 * config/pa/pa-hpux1010.opt.urls: Likewise.
543 * config/pa/pa-hpux1111.opt.urls: Likewise.
544 * config/pa/pa-hpux1131.opt.urls: Likewise.
545 * config/pa/pa.opt.urls: Likewise.
546 * config/pa/pa64-hpux.opt.urls: Likewise.
547 * config/pdp11/pdp11.opt.urls: Likewise.
548 * config/pru/pru.opt.urls: Likewise.
549 * config/riscv/riscv.opt.urls: Likewise.
550 * config/rl78/rl78.opt.urls: Likewise.
551 * config/rpath.opt.urls: Likewise.
552 * config/rs6000/476.opt.urls: Likewise.
553 * config/rs6000/aix64.opt.urls: Likewise.
554 * config/rs6000/darwin.opt.urls: Likewise.
555 * config/rs6000/linux64.opt.urls: Likewise.
556 * config/rs6000/rs6000-tables.opt.urls: Likewise.
557 * config/rs6000/rs6000.opt.urls: Likewise.
558 * config/rs6000/sysv4.opt.urls: Likewise.
559 * config/rtems.opt.urls: Likewise.
560 * config/rx/elf.opt.urls: Likewise.
561 * config/rx/rx.opt.urls: Likewise.
562 * config/s390/s390.opt.urls: Likewise.
563 * config/s390/tpf.opt.urls: Likewise.
564 * config/sh/sh.opt.urls: Likewise.
565 * config/sh/superh.opt.urls: Likewise.
566 * config/sol2.opt.urls: Likewise.
567 * config/sparc/long-double-switch.opt.urls: Likewise.
568 * config/sparc/sparc.opt.urls: Likewise.
569 * config/stormy16/stormy16.opt.urls: Likewise.
570 * config/v850/v850.opt.urls: Likewise.
571 * config/vax/elf.opt.urls: Likewise.
572 * config/vax/vax.opt.urls: Likewise.
573 * config/visium/visium.opt.urls: Likewise.
574 * config/vms/vms.opt.urls: Likewise.
575 * config/vxworks-smp.opt.urls: Likewise.
576 * config/vxworks.opt.urls: Likewise.
577 * config/xtensa/elf.opt.urls: Likewise.
578 * config/xtensa/uclinux.opt.urls: Likewise.
579 * config/xtensa/xtensa.opt.urls: Likewise.
580 * config/bfin/bfin.opt.urls: New file.
582 2024-01-04 David Malcolm <dmalcolm@redhat.com>
584 * Makefile.in (OPT_URLS_HTML_DEPS): New.
585 (regenerate-opt-urls): New target.
586 (regenerate-opt-urls-unit-test): New target.
587 * doc/options.texi (Option properties): Add UrlSuffix and
588 description of regenerate-opt-urls.py. Add LangUrlSuffix_*.
589 * doc/sourcebuild.texi (Anatomy of a Language Front End): Add
590 reference to regenerate-opt-urls.py's PER_LANGUAGE_OPTION_INDEXES
591 and Makefile.in's OPT_URLS_HTML_DEPS.
592 (Anatomy of a Target Back End): Add
593 reference to regenerate-opt-urls.py's TARGET_SPECIFIC_PAGES.
594 * regenerate-opt-urls.py: New file.
596 2024-01-04 David Malcolm <dmalcolm@redhat.com>
598 * diagnostic-format-sarif.cc
599 (sarif_builder::make_logical_location_object): Convert to...
600 (make_sarif_logical_location_object): ...this.
601 (sarif_builder::set_any_logical_locs_arr): Update for above
603 (sarif_builder::make_thread_flow_location_object): Call
604 maybe_add_sarif_properties on each diagnostic_event.
605 * diagnostic-format-sarif.h (class logical_location): New forward
607 (make_sarif_logical_location_object): New decl.
608 * diagnostic-path.h (class sarif_object): New forward decl.
609 (diagnostic_event::maybe_add_sarif_properties): New vfunc.
611 2024-01-04 Kuan-Lin Chen <rufus@andestech.com>
612 Patrick Lin <patrick@andestech.com>
613 Rufus Chen <rufus@andestech.com>
614 Monk Chiang <monk.chiang@sifive.com>
616 * config/riscv/riscv.cc (riscv_legitimize_move): Expand movfh
617 with Nan-boxing value.
618 * config/riscv/riscv.md (*movhf_softfloat_unspec): New pattern.
620 2024-01-04 Roger Sayle <roger@nextmovesoftware.com>
621 Jeff Law <jlaw@ventanamicro.com>
623 PR rtl-optimization/104914
624 * expr.cc (expand_assignment): When target is SUBREG_PROMOTED_VAR_P
625 a sign or zero extension is only required if the modified field
626 overlaps the SUBREG's most significant bit. On MODE_REP_EXTENDED
627 targets, don't refer to the temporarily incorrectly extended value
628 using a SUBREG, but instead generate an explicit TRUNCATE rtx.
630 2024-01-04 Pan Li <pan2.li@intel.com>
633 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
635 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
637 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
639 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): Teach vi variant.
641 2024-01-04 Kito Cheng <kito.cheng@sifive.com>
643 * config/riscv/riscv.cc (riscv_for_each_saved_reg): Adjust the
646 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
648 * config/riscv/riscv-vector-costs.cc (variable_vectorized_p): New function.
649 (compute_nregs_for_mode): Refine LMUL.
650 (max_number_of_live_regs): Ditto.
651 (compute_estimated_lmul): Ditto.
652 (has_unexpected_spills_p): Ditto.
654 2024-01-04 Li Wei <liwei@loongson.cn>
656 * config/loongarch/loongarch.cc (loongarch_is_odd_extraction):
657 Remove useless forward declaration.
658 (loongarch_is_even_extraction): Remove useless forward declaration.
659 (loongarch_try_expand_lsx_vshuf_const): Removed.
660 (loongarch_expand_vec_perm_const_1): Merged.
661 (loongarch_is_double_duplicate): Removed.
662 (loongarch_is_center_extraction): Ditto.
663 (loongarch_is_reversing_permutation): Ditto.
664 (loongarch_is_di_misalign_extract): Ditto.
665 (loongarch_is_si_misalign_extract): Ditto.
666 (loongarch_is_lasx_lowpart_extract): Ditto.
667 (loongarch_is_op_reverse_perm): Ditto.
668 (loongarch_is_single_op_perm): Ditto.
669 (loongarch_is_divisible_perm): Ditto.
670 (loongarch_is_triple_stride_extract): Ditto.
671 (loongarch_expand_vec_perm_const_2): Merged.
672 (loongarch_expand_vec_perm_const): New.
673 (loongarch_vectorize_vec_perm_const): Adjust.
675 2024-01-04 Sandra Loosemore <sandra@codesourcery.com>
677 * omp-general.cc: Fix comment typos and misplaced/confusing
678 comments. Delete redundant include of omp-general.h.
680 2024-01-04 YunQiang Su <syq@gcc.gnu.org>
682 PR rtl-optimization/104914
683 * config/mips/mips.md (insqisi_extended): New patterns.
684 (inshisi_extended): Ditto.
686 2024-01-04 YunQiang Su <syq@gcc.gnu.org>
688 * config/mips/mips.cc (mips_insn_cost): New function.
690 2024-01-04 YunQiang Su <syq@gcc.gnu.org>
692 * config/mips/mips.md (perf_ratio): New attribute.
694 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
698 * config/riscv/riscv-vsetvl.cc (invalid_opt_bb_p): New function.
699 (pre_vsetvl::compute_lcm_local_properties): Disable earliest fusion on
700 blocks belong to infinite loop.
701 (pre_vsetvl::emit_vsetvl): Remove fake edges.
702 * config/riscv/t-riscv: Add a new include file.
704 2024-01-04 Juzhe-Zhong <juzhe.zhong@rivai.ai>
706 * config/riscv/vector.md: Fix indent.
708 2024-01-03 Kwok Cheung Yeung <kcy@codesourcery.com>
710 * tree-core.h (enum omp_clause_code): Move OMP_CLAUSE_INDIRECT to before
711 OMP_CLAUSE__SIMDUID_.
712 * tree.cc (omp_clause_num_ops): Update position of entry for
713 OMP_CLAUSE_INDIRECT to correspond with omp_clause_code.
714 (omp_clause_code_name): Likewise.
716 2024-01-03 Kwok Cheung Yeung <kcy@codesourcery.com>
718 * config/nvptx/nvptx.cc (nvptx_record_offload_symbol): Restucture
719 printing of FUNC_MAP/IND_FUNC_MAP labels.
721 2024-01-03 Jakub Jelinek <jakub@redhat.com>
723 * gcc.cc (process_command): Update copyright notice dates.
724 * gcov-dump.cc (print_version): Ditto.
725 * gcov.cc (print_version): Ditto.
726 * gcov-tool.cc (print_version): Ditto.
727 * gengtype.cc (create_file): Ditto.
728 * doc/cpp.texi: Bump @copying's copyright year.
729 * doc/cppinternals.texi: Ditto.
730 * doc/gcc.texi: Ditto.
731 * doc/gccint.texi: Ditto.
732 * doc/gcov.texi: Ditto.
733 * doc/install.texi: Ditto.
734 * doc/invoke.texi: Ditto.
736 2024-01-03 Xi Ruoyao <xry111@xry111.site>
738 * config/loongarch/simd.md (fmax<mode>3): New define_insn.
739 (fmin<mode>3): Likewise.
740 (reduc_fmax_scal_<mode>3): New define_expand.
741 (reduc_fmin_scal_<mode>3): Likewise.
743 2024-01-03 Juzhe-Zhong <juzhe.zhong@rivai.ai>
746 * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Add rgroup info.
747 (max_number_of_live_regs): Ditto.
748 (has_unexpected_spills_p): Ditto.
750 2024-01-02 Jun Sha (Joshua) <cooper.joshua@linux.alibaba.com>
751 Jin Ma <jinma@linux.alibaba.com>
752 Xianmiao Qu <cooper.qu@linux.alibaba.com>
753 Christoph Müllner <christoph.muellner@vrull.eu>
755 * config/riscv/vector.md:
756 Use vector_length_operand for vsetvl patterns.
758 2024-01-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
760 * config/riscv/riscv-v.cc (is_vlmax_len_p): Remove satisfies_constraint_K.
761 (expand_cond_len_op): Add simplification of dummy len and dummy mask.
763 2024-01-02 Di Zhao <dizhao@os.amperecomputing.com>
765 * config/aarch64/aarch64-tuning-flags.def
766 (AARCH64_EXTRA_TUNING_OPTION): New tuning option
767 AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA.
768 * config/aarch64/aarch64.cc
769 (aarch64_override_options_internal): Set
770 param_fully_pipelined_fma according to tuning option.
771 * config/aarch64/tuning_models/ampere1.h: Add
772 AARCH64_EXTRA_TUNE_FULLY_PIPELINED_FMA to tune_flags.
773 * config/aarch64/tuning_models/ampere1a.h: Likewise.
774 * config/aarch64/tuning_models/ampere1b.h: Likewise.
776 2024-01-02 Feng Wang <wangfeng@eswincomputing.com>
778 * config/riscv/vector-crypto.md: Modify copyright year.
780 2024-01-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
782 * config/riscv/riscv-vector-costs.cc: Move STMT_VINFO_TYPE (...) to local.
784 2024-01-02 Lulu Cheng <chenglulu@loongson.cn>
786 * config.in: Regenerate.
787 * config/loongarch/loongarch-opts.h (HAVE_AS_TLS_LE_RELAXATION): Define.
788 * config/loongarch/loongarch.cc (loongarch_legitimize_tls_address):
789 Added TLS Le Relax support.
790 (loongarch_print_operand_reloc): Add the output string of TLS Le Relax.
791 * config/loongarch/loongarch.md (@add_tls_le_relax<mode>): New template.
792 * configure: Regenerate.
793 * configure.ac: Check if binutils supports TLS le relax.
795 2024-01-02 Feng Wang <wangfeng@eswincomputing.com>
797 * config/riscv/iterators.md: Add rotate insn name.
798 * config/riscv/riscv.md: Add new insns name for crypto vector.
799 * config/riscv/vector-iterators.md: Add new iterators for crypto vector.
800 * config/riscv/vector.md: Add the corresponding attr for crypto vector.
801 * config/riscv/vector-crypto.md: New file.The machine descriptions for crypto vector.
803 2024-01-02 Juzhe-Zhong <juzhe.zhong@rivai.ai>
806 * config/riscv/riscv-vector-costs.cc (compute_nregs_for_mode): Fix
807 pointer type liveness count.
809 Copyright (C) 2024 Free Software Foundation, Inc.
811 Copying and distribution of this file, with or without modification,
812 are permitted in any medium without royalty provided the copyright
813 notice and this notice are preserved.