gcc/config/msp430/msp430.h

   1 /* GCC backend definitions for the TI MSP430 Processor
   2    Copyright (C) 2012-2014 Free Software Foundation, Inc.
   3    Contributed by Red Hat.
   4
   5    This file is part of GCC.
   6
   7    GCC is free software; you can redistribute it and/or modify it
   8    under the terms of the GNU General Public License as published
   9    by the Free Software Foundation; either version 3, or (at your
  10    option) any later version.
  11
  12    GCC is distributed in the hope that it will be useful, but WITHOUT
  13    ANY WARRANTY; without even the implied warranty of MERCHANTABILITY
  14    or FITNESS FOR A PARTICULAR PURPOSE.  See the GNU General Public
  15    License for more details.
  16
  17    You should have received a copy of the GNU General Public License
  18    along with GCC; see the file COPYING3.  If not see
  19    <http://www.gnu.org/licenses/>.  */
  20 \f
  21
  22 /* Run-time Target Specification */
  23
  24 /* True if the MSP430x extensions are enabled.  */
  25 #ifndef IN_LIBGCC2
  26 extern bool msp430x;
  27 #endif
  28
  29 #define TARGET_CPU_CPP_BUILTINS()               \
  30   do                                            \
  31     {                                           \
  32       builtin_define ("NO_TRAMPOLINES");        \
  33       builtin_define ("__MSP430__");            \
  34       builtin_define (msp430_mcu_name ());      \
  35       if (msp430x)                              \
  36         {                                       \
  37           builtin_define ("__MSP430X__");       \
  38           builtin_assert ("cpu=MSP430X");       \
  39           if (TARGET_LARGE)                     \
  40             builtin_define ("__MSP430X_LARGE__");       \
  41         }                                       \
  42       else                                      \
  43         builtin_assert ("cpu=MSP430");          \
  44     }                                           \
  45   while (0)
  46
  47 #undef  STARTFILE_SPEC
  48 #define STARTFILE_SPEC "%{pg:gcrt0.o%s}%{!pg:%{minrt:crt0-minrt.o%s}%{!minrt:crt0.o%s}} %{!minrt:crtbegin.o%s}"
  49
  50 /* -lgcc is included because crtend.o needs __mspabi_func_epilog_1.  */
  51 #undef  ENDFILE_SPEC
  52 #define ENDFILE_SPEC "%{!minrt:crtend.o%s} %{minrt:crtn-minrt.o%s}%{!minrt:crtn.o%s} -lgcc"
  53
  54 #define ASM_SPEC "-mP " /* Enable polymorphic instructions.  */ \
  55   "%{mcpu=*:-mcpu=%*}%{!mcpu=*:%{mmcu=*:-mmcu=%*}} " /* Pass the CPU type on to the assembler.  */ \
  56   "%{mrelax=-mQ} " /* Pass the relax option on to the assembler.  */ \
  57   "%{mlarge:-ml} " /* Tell the assembler if we are building for the LARGE pointer model.  */ \
  58   "%{!msim:-md} %{msim:%{mlarge:-md}} " /* Copy data from ROM to RAM if necessary.  */ \
  59   "%{ffunction-sections:-gdwarf-sections} " /* If function sections are being created then create DWARF line number sections as well.  */
  60
  61 /* Enable linker section garbage collection by default, unless we
  62    are creating a relocatable binary (gc does not work) or debugging
  63    is enabled  (the GDB testsuite relies upon unused entities not being deleted).  */
  64 #define LINK_SPEC "%{mrelax:--relax} %{mlarge:%{!r:%{!g:--gc-sections}}}"
  65
  66 #undef  LIB_SPEC
  67 #define LIB_SPEC "                                      \
  68 --start-group                                           \
  69 -lc                                                     \
  70 -lgcc                                                   \
  71 -lcrt                                                   \
  72 %{msim:-lsim}                                           \
  73 --end-group                                             \
  74 %{!T*:%{!msim:%{mmcu=*:--script=%*.ld}}}                \
  75 %{!T*:%{!msim:%{!mmcu=*:%Tmsp430.ld}}}                  \
  76 %{!T*:%{msim:%{mlarge:%Tmsp430xl-sim.ld}%{!mlarge:%Tmsp430-sim.ld}}} \
  77 "
  78 \f
  79 /* Storage Layout */
  80
  81 #define BITS_BIG_ENDIAN                 0
  82 #define BYTES_BIG_ENDIAN                0
  83 #define WORDS_BIG_ENDIAN                0
  84
  85
  86 #ifdef IN_LIBGCC2
  87 /* This is to get correct SI and DI modes in libgcc2.c (32 and 64 bits).  */
  88 #define UNITS_PER_WORD                  4
  89 /* We have a problem with libgcc2.  It only defines two versions of
  90    each function, one for "int" and one for "long long".  Ie it assumes
  91    that "sizeof (int) == sizeof (long)".  For the MSP430 this is not true
  92    and we need a third set of functions.  We explicitly define
  93    LIBGCC2_UNITS_PER_WORD here so that it is clear that we are expecting
  94    to get the SI and DI versions from the libgcc2.c sources, and we
  95    provide our own set of HI functions, which is why this
  96    definition is surrounded by #ifndef..#endif.  */
  97 #ifndef LIBGCC2_UNITS_PER_WORD
  98 #define LIBGCC2_UNITS_PER_WORD          4
  99 #endif
 100 #else
 101 /* Actual width of a word, in units (bytes).  */
 102 #define UNITS_PER_WORD                  2
 103 #endif
 104
 105 #define SHORT_TYPE_SIZE                 16
 106 #define INT_TYPE_SIZE                   16
 107 #define LONG_TYPE_SIZE                  32
 108 #define LONG_LONG_TYPE_SIZE             64
 109
 110 #define FLOAT_TYPE_SIZE                 32
 111 #define DOUBLE_TYPE_SIZE                64
 112 #define LONG_DOUBLE_TYPE_SIZE           64 /*DOUBLE_TYPE_SIZE*/
 113
 114 #define LIBGCC2_LONG_DOUBLE_TYPE_SIZE   64
 115
 116 #define DEFAULT_SIGNED_CHAR             0
 117
 118 #define STRICT_ALIGNMENT                1
 119 #define FUNCTION_BOUNDARY               16
 120 #define BIGGEST_ALIGNMENT               16
 121 #define STACK_BOUNDARY                  16
 122 #define PARM_BOUNDARY                   8
 123 #define PCC_BITFIELD_TYPE_MATTERS       1
 124
 125 #define STACK_GROWS_DOWNWARD            1
 126 #define FRAME_GROWS_DOWNWARD            1
 127 #define FIRST_PARM_OFFSET(FNDECL)       0
 128
 129 #define MAX_REGS_PER_ADDRESS            1
 130
 131 #define Pmode                           (TARGET_LARGE ? PSImode : HImode)
 132 /* Note: 32 is a lie.  Large pointers are actually 20-bits wide.  But gcc
 133    thinks that any non-power-of-2 pointer size equates to BLKmode, which
 134    causes all kinds of problems...  */
 135 #define POINTER_SIZE                    (TARGET_LARGE ? 32 : 16)
 136 #define POINTERS_EXTEND_UNSIGNED        1
 137
 138 #define ADDR_SPACE_NEAR 1
 139 #define ADDR_SPACE_FAR  2
 140
 141 #define REGISTER_TARGET_PRAGMAS() msp430_register_pragmas()
 142
 143 #if 1 /* XXX */
 144 /* Define this macro if it is advisable to hold scalars in registers
 145    in a wider mode than that declared by the program.  In such cases,
 146    the value is constrained to be within the bounds of the declared
 147    type, but kept valid in the wider mode.  The signedness of the
 148    extension may differ from that of the type.  */
 149
 150 #define PROMOTE_MODE(MODE, UNSIGNEDP, TYPE)     \
 151   if (GET_MODE_CLASS (MODE) == MODE_INT         \
 152       && GET_MODE_SIZE (MODE) < 2)              \
 153     (MODE) = HImode;
 154 #endif
 155 \f
 156 /* Layout of Source Language Data Types */
 157
 158 #undef  SIZE_TYPE
 159 #define SIZE_TYPE                       (TARGET_LARGE ? "long unsigned int" : "unsigned int")
 160 #undef  PTRDIFF_TYPE
 161 #define PTRDIFF_TYPE                    (TARGET_LARGE ? "long int" : "int")
 162 #undef  WCHAR_TYPE
 163 #define WCHAR_TYPE                      "long int"
 164 #undef  WCHAR_TYPE_SIZE
 165 #define WCHAR_TYPE_SIZE                 BITS_PER_WORD
 166 #define FUNCTION_MODE                   HImode
 167 #define CASE_VECTOR_MODE                Pmode
 168 #define HAS_LONG_COND_BRANCH            0
 169 #define HAS_LONG_UNCOND_BRANCH          0
 170
 171 #define LOAD_EXTEND_OP(M)               ZERO_EXTEND
 172 /*#define WORD_REGISTER_OPERATIONS      1*/
 173
 174 #define MOVE_MAX                        8
 175 #define STARTING_FRAME_OFFSET           0
 176
 177 #define INCOMING_RETURN_ADDR_RTX \
 178   msp430_incoming_return_addr_rtx ()
 179
 180 #define RETURN_ADDR_RTX(COUNT, FA)              \
 181   msp430_return_addr_rtx (COUNT)
 182
 183 #define TRULY_NOOP_TRUNCATION(OUTPREC, INPREC)   1
 184
 185 #define SLOW_BYTE_ACCESS                0
 186 \f
 187
 188 /* Register Usage */
 189
 190 /* gas doesn't recognize PC (R0), SP (R1), and SR (R2) as register
 191    names.  */
 192 #define REGISTER_NAMES                                          \
 193 {                                                               \
 194   "R0", "R1", "R2", "R3", "R4", "R5", "R6", "R7",               \
 195     "R8", "R9", "R10", "R11", "R12", "R13", "R14", "R15",       \
 196   "argptr"                                                      \
 197 }
 198
 199 enum reg_class
 200 {
 201   NO_REGS,
 202   R12_REGS,
 203   R13_REGS,
 204   GEN_REGS,
 205   ALL_REGS,
 206   LIM_REG_CLASSES
 207 };
 208
 209 #define REG_CLASS_NAMES \
 210 {                       \
 211   "NO_REGS",            \
 212   "R12_REGS",           \
 213   "R13_REGS",           \
 214   "GEN_REGS",           \
 215   "ALL_REGS"            \
 216 }
 217
 218 #define REG_CLASS_CONTENTS \
 219 {                          \
 220   0x00000000,              \
 221   0x00001000,              \
 222   0x00002000,              \
 223   0x0000fff2,              \
 224   0x0001ffff               \
 225 }
 226
 227 #define GENERAL_REGS                    GEN_REGS
 228 #define BASE_REG_CLASS                  GEN_REGS
 229 #define INDEX_REG_CLASS                 GEN_REGS
 230 #define N_REG_CLASSES                   (int) LIM_REG_CLASSES
 231
 232 #define PC_REGNUM                       0
 233 #define STACK_POINTER_REGNUM            1
 234 #define CC_REGNUM                       2
 235 #define FRAME_POINTER_REGNUM            4 /* not usually used, call preserved */
 236 #define ARG_POINTER_REGNUM              16
 237 #define STATIC_CHAIN_REGNUM             5 /* FIXME */
 238
 239 #define FIRST_PSEUDO_REGISTER           17
 240
 241 #define REGNO_REG_CLASS(REGNO)          ((REGNO) < 17 \
 242                                          ? GEN_REGS : NO_REGS)
 243
 244 #define TRAMPOLINE_SIZE                 4 /* FIXME */
 245 #define TRAMPOLINE_ALIGNMENT            16 /* FIXME */
 246
 247 #define ELIMINABLE_REGS                                 \
 248 {{ ARG_POINTER_REGNUM,   STACK_POINTER_REGNUM },        \
 249  { ARG_POINTER_REGNUM,   FRAME_POINTER_REGNUM },        \
 250  { FRAME_POINTER_REGNUM, STACK_POINTER_REGNUM }}
 251
 252 #define INITIAL_ELIMINATION_OFFSET(FROM, TO, OFFSET)    \
 253   (OFFSET) = msp430_initial_elimination_offset ((FROM), (TO))
 254
 255
 256 #define FUNCTION_ARG_REGNO_P(N)         ((N) >= 8 && (N) < ARG_POINTER_REGNUM)
 257 #define DEFAULT_PCC_STRUCT_RETURN       0
 258
 259 /* 1 == register can't be used by gcc, in general
 260    0 == register can be used by gcc, in general */
 261 #define FIXED_REGISTERS                                 \
 262 {                                                       \
 263   1,0,1,1, 0,0,0,0,                                     \
 264   0,0,0,0, 0,0,0,0,                                     \
 265   1,                                                    \
 266 }
 267
 268 /* 1 == value changes across function calls
 269    0 == value is the same after a call      */
 270 /* R4 through R10 are callee-saved */
 271 #define CALL_USED_REGISTERS                             \
 272 {                                                       \
 273   1,0,1,1, 0,0,0,0,                                     \
 274   0,0,0,1, 1,1,1,1,                                     \
 275   1,                                            \
 276 }
 277
 278 #define REG_ALLOC_ORDER                                 \
 279   { 12, 13, 14, 15, 10, 9, 8, 7, 6, 5, 4, 11, 0, 1, 2, 3, 16 }
 280 /*  { 11, 15, 14, 13, 12, 10, 9, 8, 7, 6, 5, 4, 0, 1, 2, 3, 16 }*/
 281
 282 #define REGNO_OK_FOR_BASE_P(regno)      1
 283 #define REGNO_OK_FOR_INDEX_P(regno)     1
 284
 285 \f
 286
 287 typedef struct
 288 {
 289   /* These two are the current argument status.  */
 290   char reg_used[4];
 291 #define CA_FIRST_REG 12
 292   char can_split;
 293   /* These two are temporaries used internally.  */
 294   char start_reg;
 295   char reg_count;
 296   char mem_count;
 297   char special_p;
 298 } CUMULATIVE_ARGS;
 299
 300 #define INIT_CUMULATIVE_ARGS(CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS) \
 301   msp430_init_cumulative_args (&CA, FNTYPE, LIBNAME, INDIRECT, N_NAMED_ARGS)
 302
 303 \f
 304 /* FIXME */
 305 #define NO_PROFILE_COUNTERS     1
 306 #define PROFILE_BEFORE_PROLOGUE 1
 307
 308 #define FUNCTION_PROFILER(FILE, LABELNO)        \
 309     fprintf (FILE, "\tcall\t__mcount\n");
 310 \f
 311 #define HARD_REGNO_NREGS(REGNO, MODE)            \
 312   msp430_hard_regno_nregs (REGNO, MODE)
 313
 314 #define HARD_REGNO_MODE_OK(REGNO, MODE)                         \
 315   msp430_hard_regno_mode_ok (REGNO, MODE)
 316
 317 #define MODES_TIEABLE_P(MODE1, MODE2)                           \
 318   msp430_modes_tieable_p (MODE1, MODE2)
 319 \f
 320 /* Exception Handling */
 321
 322 /* R12,R13,R14 - EH data
 323    R15 - stack adjustment */
 324
 325 #define EH_RETURN_DATA_REGNO(N) \
 326   (((N) < 3) ? ((N) + 12) : INVALID_REGNUM)
 327
 328 #define EH_RETURN_HANDLER_RTX \
 329   gen_rtx_MEM(Pmode, gen_rtx_PLUS (Pmode, gen_rtx_REG(Pmode, SP_REGNO), gen_rtx_REG (Pmode, 15)))
 330
 331 #define EH_RETURN_STACKADJ_RTX gen_rtx_REG (Pmode, 15)
 332
 333 #define ASM_PREFERRED_EH_DATA_FORMAT(CODE,GLOBAL) DW_EH_PE_udata4
 334
 335 \f
 336 /* Stack Layout and Calling Conventions */
 337
 338 \f
 339 /* Addressing Modes */
 340
 341 \f
 342
 343 #define TEXT_SECTION_ASM_OP ".text"
 344 #define DATA_SECTION_ASM_OP ".data"
 345 #define BSS_SECTION_ASM_OP   "\t.section .bss"
 346
 347 #define ASM_COMMENT_START       " ;"
 348 #define ASM_APP_ON              ""
 349 #define ASM_APP_OFF             ""
 350 #define LOCAL_LABEL_PREFIX      ".L"
 351 #undef  USER_LABEL_PREFIX
 352 #define USER_LABEL_PREFIX       ""
 353
 354 #define GLOBAL_ASM_OP           "\t.global\t"
 355
 356 #define ASM_OUTPUT_LABELREF(FILE, SYM) msp430_output_labelref ((FILE), (SYM))
 357
 358 #define ASM_OUTPUT_ADDR_VEC_ELT(FILE, VALUE) \
 359   fprintf (FILE, "\t.long .L%d\n", VALUE)
 360
 361 /* This is how to output an element of a case-vector that is relative.
 362    Note: The local label referenced by the "3b" below is emitted by
 363    the tablejump insn.  */
 364
 365 #define ASM_OUTPUT_ADDR_DIFF_ELT(FILE, BODY, VALUE, REL) \
 366   fprintf (FILE, "\t.long .L%d - 1b\n", VALUE)
 367
 368
 369 #define ASM_OUTPUT_ALIGN(STREAM, LOG)           \
 370   do                                            \
 371     {                                           \
 372       if ((LOG) == 0)                           \
 373         break;                                  \
 374       fprintf (STREAM, "\t.balign %d\n", 1 << (LOG));   \
 375     }                                           \
 376   while (0)
 377
 378 #define JUMP_TABLES_IN_TEXT_SECTION     1
 379 \f
 380 #undef  DWARF2_ADDR_SIZE
 381 #define DWARF2_ADDR_SIZE                        4
 382
 383 #define INCOMING_FRAME_SP_OFFSET                (POINTER_SIZE / BITS_PER_UNIT)
 384
 385 #undef  PREFERRED_DEBUGGING_TYPE
 386 #define PREFERRED_DEBUGGING_TYPE DWARF2_DEBUG
 387
 388 #define DWARF2_ASM_LINE_DEBUG_INFO              1
 389
 390 /* Prevent reload (and others) from choosing HImode stack slots
 391    when spilling hard registers when they may contain PSImode values.  */
 392 #define HARD_REGNO_CALLER_SAVE_MODE(REGNO,NREGS,MODE) \
 393   ((TARGET_LARGE && ((NREGS) <= 2)) ? PSImode : choose_hard_reg_mode ((REGNO), (NREGS), false))
 394
 395 /* Also stop GCC from thinking that it can eliminate (SUBREG:PSI (SI)).  */
 396 #define CANNOT_CHANGE_MODE_CLASS(FROM,TO,CLASS) \
 397   (   ((TO) == PSImode && (FROM) == SImode)     \
 398    || ((TO) == SImode  && (FROM) == PSImode)    \
 399    || ((TO) == DImode  && (FROM) == PSImode)    \
 400    || ((TO) == PSImode && (FROM) == DImode)     \
 401       )
 402
 403 #define ACCUMULATE_OUTGOING_ARGS 1
 404
 405 #undef  ASM_DECLARE_FUNCTION_NAME
 406 #define ASM_DECLARE_FUNCTION_NAME(FILE, NAME, DECL) \
 407   msp430_start_function ((FILE), (NAME), (DECL))
 408
 409 #define TARGET_HAS_NO_HW_DIVIDE (! TARGET_HWMULT)